./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix026_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix026_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 88cbd88e52045a32aec6d1e1cb8aa16865bc8ffd ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:05:24,469 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:05:24,471 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:05:24,478 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:05:24,478 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:05:24,479 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:05:24,480 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:05:24,481 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:05:24,482 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:05:24,483 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:05:24,484 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:05:24,484 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:05:24,485 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:05:24,485 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:05:24,486 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:05:24,487 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:05:24,487 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:05:24,488 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:05:24,489 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:05:24,491 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:05:24,492 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:05:24,493 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:05:24,493 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:05:24,494 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:05:24,496 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:05:24,496 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:05:24,496 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:05:24,496 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:05:24,497 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:05:24,497 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:05:24,497 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:05:24,498 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:05:24,498 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:05:24,498 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:05:24,499 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:05:24,499 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:05:24,500 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:05:24,500 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:05:24,500 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:05:24,500 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:05:24,501 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:05:24,501 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:05:24,511 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:05:24,511 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:05:24,512 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:05:24,512 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:05:24,512 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:05:24,512 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:05:24,512 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:05:24,512 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:05:24,513 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:05:24,513 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:05:24,513 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:05:24,513 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:05:24,513 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:05:24,513 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:05:24,513 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:05:24,513 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:05:24,514 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:05:24,514 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:05:24,514 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:05:24,514 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:05:24,514 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:05:24,514 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:05:24,514 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:05:24,515 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:05:24,515 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:05:24,515 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:05:24,515 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:05:24,515 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:05:24,515 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:05:24,515 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 88cbd88e52045a32aec6d1e1cb8aa16865bc8ffd [2019-12-07 18:05:24,614 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:05:24,622 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:05:24,625 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:05:24,626 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:05:24,626 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:05:24,627 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix026_rmo.opt.i [2019-12-07 18:05:24,666 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/data/5bbaa3762/e9518e8145364ea6b102af9253f0e8d5/FLAG241fe6174 [2019-12-07 18:05:25,101 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:05:25,102 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/sv-benchmarks/c/pthread-wmm/mix026_rmo.opt.i [2019-12-07 18:05:25,113 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/data/5bbaa3762/e9518e8145364ea6b102af9253f0e8d5/FLAG241fe6174 [2019-12-07 18:05:25,432 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/data/5bbaa3762/e9518e8145364ea6b102af9253f0e8d5 [2019-12-07 18:05:25,439 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:05:25,440 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:05:25,443 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:05:25,443 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:05:25,447 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:05:25,448 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:05:25" (1/1) ... [2019-12-07 18:05:25,451 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@38cc2ad8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25, skipping insertion in model container [2019-12-07 18:05:25,451 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:05:25" (1/1) ... [2019-12-07 18:05:25,458 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:05:25,490 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:05:25,749 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:05:25,757 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:05:25,801 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:05:25,852 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:05:25,853 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25 WrapperNode [2019-12-07 18:05:25,853 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:05:25,853 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:05:25,853 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:05:25,853 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:05:25,859 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25" (1/1) ... [2019-12-07 18:05:25,872 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25" (1/1) ... [2019-12-07 18:05:25,891 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:05:25,891 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:05:25,891 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:05:25,891 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:05:25,897 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25" (1/1) ... [2019-12-07 18:05:25,897 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25" (1/1) ... [2019-12-07 18:05:25,901 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25" (1/1) ... [2019-12-07 18:05:25,901 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25" (1/1) ... [2019-12-07 18:05:25,908 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25" (1/1) ... [2019-12-07 18:05:25,911 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25" (1/1) ... [2019-12-07 18:05:25,913 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25" (1/1) ... [2019-12-07 18:05:25,917 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:05:25,917 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:05:25,917 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:05:25,917 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:05:25,918 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:05:25,963 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:05:25,963 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:05:25,963 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:05:25,963 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:05:25,963 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:05:25,964 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:05:25,964 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:05:25,964 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:05:25,964 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:05:25,964 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:05:25,964 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 18:05:25,964 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 18:05:25,964 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:05:25,964 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:05:25,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:05:25,965 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:05:26,363 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:05:26,363 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:05:26,364 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:05:26 BoogieIcfgContainer [2019-12-07 18:05:26,364 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:05:26,365 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:05:26,365 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:05:26,367 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:05:26,367 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:05:25" (1/3) ... [2019-12-07 18:05:26,367 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7cc2b1a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:05:26, skipping insertion in model container [2019-12-07 18:05:26,367 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:05:25" (2/3) ... [2019-12-07 18:05:26,368 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7cc2b1a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:05:26, skipping insertion in model container [2019-12-07 18:05:26,368 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:05:26" (3/3) ... [2019-12-07 18:05:26,369 INFO L109 eAbstractionObserver]: Analyzing ICFG mix026_rmo.opt.i [2019-12-07 18:05:26,375 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:05:26,375 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:05:26,380 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:05:26,380 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:05:26,406 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,406 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,406 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,406 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,407 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,407 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,408 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,408 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,408 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,408 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,408 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,408 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,408 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,408 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,408 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,409 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,409 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,409 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,409 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,409 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,409 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,409 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,409 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,409 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,409 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,410 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,410 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,410 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,410 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,410 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,410 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,410 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,410 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,411 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,411 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,411 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,411 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,411 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,411 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,411 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,411 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,411 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,412 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,412 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,412 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,412 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,412 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,412 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,412 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,412 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,412 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,413 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,413 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,413 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,413 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,413 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,413 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,413 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,413 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,413 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,413 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,418 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,418 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,418 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,418 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,419 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,419 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,419 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,419 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,422 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,422 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,422 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,422 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,422 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,422 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:05:26,440 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 18:05:26,454 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:05:26,454 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:05:26,454 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:05:26,454 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:05:26,454 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:05:26,454 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:05:26,454 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:05:26,454 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:05:26,465 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 181 places, 209 transitions [2019-12-07 18:05:26,466 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 18:05:26,530 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 18:05:26,530 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:05:26,540 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 719 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 18:05:26,554 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 18:05:26,586 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 18:05:26,586 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:05:26,591 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 719 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 18:05:26,606 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 18126 [2019-12-07 18:05:26,607 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:05:29,850 WARN L192 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 50 [2019-12-07 18:05:30,013 WARN L192 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 18:05:30,115 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66604 [2019-12-07 18:05:30,115 INFO L214 etLargeBlockEncoding]: Total number of compositions: 123 [2019-12-07 18:05:30,117 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 87 places, 92 transitions [2019-12-07 18:05:55,747 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 154566 states. [2019-12-07 18:05:55,748 INFO L276 IsEmpty]: Start isEmpty. Operand 154566 states. [2019-12-07 18:05:55,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 18:05:55,753 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:55,753 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:55,753 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:55,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:55,757 INFO L82 PathProgramCache]: Analyzing trace with hash -1218656403, now seen corresponding path program 1 times [2019-12-07 18:05:55,763 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:55,763 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [836857596] [2019-12-07 18:05:55,764 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:55,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:55,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:55,975 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [836857596] [2019-12-07 18:05:55,975 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:55,975 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:05:55,976 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [896470312] [2019-12-07 18:05:55,978 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:05:55,979 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:55,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:05:55,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:05:55,989 INFO L87 Difference]: Start difference. First operand 154566 states. Second operand 3 states. [2019-12-07 18:05:56,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:56,965 INFO L93 Difference]: Finished difference Result 152486 states and 727020 transitions. [2019-12-07 18:05:56,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:05:56,966 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 18:05:56,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:57,572 INFO L225 Difference]: With dead ends: 152486 [2019-12-07 18:05:57,572 INFO L226 Difference]: Without dead ends: 143750 [2019-12-07 18:05:57,573 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:06:03,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143750 states. [2019-12-07 18:06:06,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143750 to 143750. [2019-12-07 18:06:06,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143750 states. [2019-12-07 18:06:06,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143750 states to 143750 states and 684484 transitions. [2019-12-07 18:06:06,539 INFO L78 Accepts]: Start accepts. Automaton has 143750 states and 684484 transitions. Word has length 7 [2019-12-07 18:06:06,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:06:06,540 INFO L462 AbstractCegarLoop]: Abstraction has 143750 states and 684484 transitions. [2019-12-07 18:06:06,540 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:06:06,540 INFO L276 IsEmpty]: Start isEmpty. Operand 143750 states and 684484 transitions. [2019-12-07 18:06:06,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:06:06,547 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:06:06,547 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:06:06,547 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:06:06,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:06:06,548 INFO L82 PathProgramCache]: Analyzing trace with hash 1478379087, now seen corresponding path program 1 times [2019-12-07 18:06:06,548 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:06:06,548 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311311476] [2019-12-07 18:06:06,548 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:06:06,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:06:06,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:06:06,608 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [311311476] [2019-12-07 18:06:06,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:06:06,609 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:06:06,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1294064757] [2019-12-07 18:06:06,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:06:06,611 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:06:06,611 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:06:06,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:06:06,611 INFO L87 Difference]: Start difference. First operand 143750 states and 684484 transitions. Second operand 4 states. [2019-12-07 18:06:07,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:06:07,974 INFO L93 Difference]: Finished difference Result 226574 states and 1038112 transitions. [2019-12-07 18:06:07,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:06:07,975 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:06:07,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:06:11,187 INFO L225 Difference]: With dead ends: 226574 [2019-12-07 18:06:11,187 INFO L226 Difference]: Without dead ends: 226406 [2019-12-07 18:06:11,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:06:16,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226406 states. [2019-12-07 18:06:19,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226406 to 210054. [2019-12-07 18:06:19,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210054 states. [2019-12-07 18:06:20,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210054 states to 210054 states and 970358 transitions. [2019-12-07 18:06:20,766 INFO L78 Accepts]: Start accepts. Automaton has 210054 states and 970358 transitions. Word has length 15 [2019-12-07 18:06:20,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:06:20,766 INFO L462 AbstractCegarLoop]: Abstraction has 210054 states and 970358 transitions. [2019-12-07 18:06:20,766 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:06:20,766 INFO L276 IsEmpty]: Start isEmpty. Operand 210054 states and 970358 transitions. [2019-12-07 18:06:20,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:06:20,770 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:06:20,770 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:06:20,771 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:06:20,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:06:20,771 INFO L82 PathProgramCache]: Analyzing trace with hash -731927730, now seen corresponding path program 1 times [2019-12-07 18:06:20,771 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:06:20,771 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749836048] [2019-12-07 18:06:20,771 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:06:20,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:06:20,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:06:20,822 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1749836048] [2019-12-07 18:06:20,822 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:06:20,822 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:06:20,822 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [718224234] [2019-12-07 18:06:20,823 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:06:20,823 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:06:20,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:06:20,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:06:20,823 INFO L87 Difference]: Start difference. First operand 210054 states and 970358 transitions. Second operand 4 states. [2019-12-07 18:06:23,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:06:23,014 INFO L93 Difference]: Finished difference Result 290690 states and 1317990 transitions. [2019-12-07 18:06:23,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:06:23,015 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:06:23,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:06:23,975 INFO L225 Difference]: With dead ends: 290690 [2019-12-07 18:06:23,975 INFO L226 Difference]: Without dead ends: 290498 [2019-12-07 18:06:23,976 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:06:33,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290498 states. [2019-12-07 18:06:37,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290498 to 247334. [2019-12-07 18:06:37,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247334 states. [2019-12-07 18:06:38,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247334 states to 247334 states and 1137054 transitions. [2019-12-07 18:06:38,706 INFO L78 Accepts]: Start accepts. Automaton has 247334 states and 1137054 transitions. Word has length 15 [2019-12-07 18:06:38,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:06:38,706 INFO L462 AbstractCegarLoop]: Abstraction has 247334 states and 1137054 transitions. [2019-12-07 18:06:38,706 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:06:38,706 INFO L276 IsEmpty]: Start isEmpty. Operand 247334 states and 1137054 transitions. [2019-12-07 18:06:38,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:06:38,711 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:06:38,711 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:06:38,711 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:06:38,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:06:38,712 INFO L82 PathProgramCache]: Analyzing trace with hash -1917193142, now seen corresponding path program 1 times [2019-12-07 18:06:38,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:06:38,712 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [530588639] [2019-12-07 18:06:38,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:06:38,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:06:38,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:06:38,773 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [530588639] [2019-12-07 18:06:38,773 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:06:38,774 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:06:38,774 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [626353722] [2019-12-07 18:06:38,774 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:06:38,774 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:06:38,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:06:38,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:06:38,775 INFO L87 Difference]: Start difference. First operand 247334 states and 1137054 transitions. Second operand 5 states. [2019-12-07 18:06:41,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:06:41,446 INFO L93 Difference]: Finished difference Result 335030 states and 1515532 transitions. [2019-12-07 18:06:41,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:06:41,446 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:06:41,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:06:42,436 INFO L225 Difference]: With dead ends: 335030 [2019-12-07 18:06:42,436 INFO L226 Difference]: Without dead ends: 334758 [2019-12-07 18:06:42,436 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:06:49,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 334758 states. [2019-12-07 18:06:57,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 334758 to 261640. [2019-12-07 18:06:57,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 261640 states. [2019-12-07 18:06:58,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261640 states to 261640 states and 1201383 transitions. [2019-12-07 18:06:58,814 INFO L78 Accepts]: Start accepts. Automaton has 261640 states and 1201383 transitions. Word has length 16 [2019-12-07 18:06:58,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:06:58,814 INFO L462 AbstractCegarLoop]: Abstraction has 261640 states and 1201383 transitions. [2019-12-07 18:06:58,814 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:06:58,814 INFO L276 IsEmpty]: Start isEmpty. Operand 261640 states and 1201383 transitions. [2019-12-07 18:06:58,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 18:06:58,839 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:06:58,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:06:58,839 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:06:58,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:06:58,839 INFO L82 PathProgramCache]: Analyzing trace with hash -590847212, now seen corresponding path program 1 times [2019-12-07 18:06:58,839 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:06:58,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [680132784] [2019-12-07 18:06:58,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:06:58,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:06:58,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:06:58,890 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [680132784] [2019-12-07 18:06:58,891 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:06:58,891 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:06:58,891 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1112553083] [2019-12-07 18:06:58,891 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:06:58,891 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:06:58,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:06:58,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:06:58,891 INFO L87 Difference]: Start difference. First operand 261640 states and 1201383 transitions. Second operand 3 states. [2019-12-07 18:07:00,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:07:00,203 INFO L93 Difference]: Finished difference Result 246888 states and 1122565 transitions. [2019-12-07 18:07:00,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:07:00,204 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 18:07:00,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:07:01,486 INFO L225 Difference]: With dead ends: 246888 [2019-12-07 18:07:01,486 INFO L226 Difference]: Without dead ends: 246888 [2019-12-07 18:07:01,486 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:07:10,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246888 states. [2019-12-07 18:07:13,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246888 to 243128. [2019-12-07 18:07:13,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243128 states. [2019-12-07 18:07:14,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243128 states to 243128 states and 1106381 transitions. [2019-12-07 18:07:14,750 INFO L78 Accepts]: Start accepts. Automaton has 243128 states and 1106381 transitions. Word has length 20 [2019-12-07 18:07:14,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:07:14,750 INFO L462 AbstractCegarLoop]: Abstraction has 243128 states and 1106381 transitions. [2019-12-07 18:07:14,750 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:07:14,750 INFO L276 IsEmpty]: Start isEmpty. Operand 243128 states and 1106381 transitions. [2019-12-07 18:07:14,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 18:07:14,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:07:14,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:07:14,768 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:07:14,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:07:14,768 INFO L82 PathProgramCache]: Analyzing trace with hash 1133597908, now seen corresponding path program 1 times [2019-12-07 18:07:14,768 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:07:14,768 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1312240961] [2019-12-07 18:07:14,768 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:07:14,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:07:14,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:07:14,819 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1312240961] [2019-12-07 18:07:14,819 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:07:14,820 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:07:14,820 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [643365166] [2019-12-07 18:07:14,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:07:14,820 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:07:14,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:07:14,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:07:14,820 INFO L87 Difference]: Start difference. First operand 243128 states and 1106381 transitions. Second operand 3 states. [2019-12-07 18:07:17,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:07:17,345 INFO L93 Difference]: Finished difference Result 422040 states and 1897830 transitions. [2019-12-07 18:07:17,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:07:17,346 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 18:07:17,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:07:19,136 INFO L225 Difference]: With dead ends: 422040 [2019-12-07 18:07:19,136 INFO L226 Difference]: Without dead ends: 414536 [2019-12-07 18:07:19,137 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:07:29,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 414536 states. [2019-12-07 18:07:36,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 414536 to 399396. [2019-12-07 18:07:36,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 399396 states. [2019-12-07 18:07:38,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 399396 states to 399396 states and 1813434 transitions. [2019-12-07 18:07:38,214 INFO L78 Accepts]: Start accepts. Automaton has 399396 states and 1813434 transitions. Word has length 20 [2019-12-07 18:07:38,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:07:38,214 INFO L462 AbstractCegarLoop]: Abstraction has 399396 states and 1813434 transitions. [2019-12-07 18:07:38,214 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:07:38,214 INFO L276 IsEmpty]: Start isEmpty. Operand 399396 states and 1813434 transitions. [2019-12-07 18:07:38,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 18:07:38,248 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:07:38,248 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:07:38,248 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:07:38,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:07:38,249 INFO L82 PathProgramCache]: Analyzing trace with hash -1169391876, now seen corresponding path program 1 times [2019-12-07 18:07:38,249 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:07:38,249 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1864023028] [2019-12-07 18:07:38,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:07:38,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:07:38,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:07:38,314 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1864023028] [2019-12-07 18:07:38,314 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:07:38,314 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:07:38,315 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1693133470] [2019-12-07 18:07:38,315 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:07:38,315 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:07:38,315 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:07:38,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:07:38,316 INFO L87 Difference]: Start difference. First operand 399396 states and 1813434 transitions. Second operand 4 states. [2019-12-07 18:07:41,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:07:41,164 INFO L93 Difference]: Finished difference Result 412730 states and 1860443 transitions. [2019-12-07 18:07:41,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:07:41,165 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2019-12-07 18:07:41,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:07:47,287 INFO L225 Difference]: With dead ends: 412730 [2019-12-07 18:07:47,287 INFO L226 Difference]: Without dead ends: 412730 [2019-12-07 18:07:47,288 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:07:53,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 412730 states. [2019-12-07 18:08:00,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 412730 to 389970. [2019-12-07 18:08:00,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 389970 states. [2019-12-07 18:08:02,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389970 states to 389970 states and 1774788 transitions. [2019-12-07 18:08:02,230 INFO L78 Accepts]: Start accepts. Automaton has 389970 states and 1774788 transitions. Word has length 21 [2019-12-07 18:08:02,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:08:02,230 INFO L462 AbstractCegarLoop]: Abstraction has 389970 states and 1774788 transitions. [2019-12-07 18:08:02,231 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:08:02,231 INFO L276 IsEmpty]: Start isEmpty. Operand 389970 states and 1774788 transitions. [2019-12-07 18:08:02,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 18:08:02,266 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:08:02,266 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:08:02,266 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:08:02,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:08:02,266 INFO L82 PathProgramCache]: Analyzing trace with hash 1490679915, now seen corresponding path program 1 times [2019-12-07 18:08:02,266 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:08:02,267 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351214478] [2019-12-07 18:08:02,267 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:08:02,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:08:02,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:08:02,333 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [351214478] [2019-12-07 18:08:02,333 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:08:02,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:08:02,333 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1559030680] [2019-12-07 18:08:02,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:08:02,334 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:08:02,334 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:08:02,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:08:02,334 INFO L87 Difference]: Start difference. First operand 389970 states and 1774788 transitions. Second operand 6 states. [2019-12-07 18:08:07,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:08:07,030 INFO L93 Difference]: Finished difference Result 604168 states and 2684326 transitions. [2019-12-07 18:08:07,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:08:07,031 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2019-12-07 18:08:07,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:08:08,858 INFO L225 Difference]: With dead ends: 604168 [2019-12-07 18:08:08,858 INFO L226 Difference]: Without dead ends: 603748 [2019-12-07 18:08:08,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:08:23,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 603748 states. [2019-12-07 18:08:31,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 603748 to 404822. [2019-12-07 18:08:31,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 404822 states. [2019-12-07 18:08:33,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 404822 states to 404822 states and 1841309 transitions. [2019-12-07 18:08:33,486 INFO L78 Accepts]: Start accepts. Automaton has 404822 states and 1841309 transitions. Word has length 21 [2019-12-07 18:08:33,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:08:33,486 INFO L462 AbstractCegarLoop]: Abstraction has 404822 states and 1841309 transitions. [2019-12-07 18:08:33,486 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:08:33,486 INFO L276 IsEmpty]: Start isEmpty. Operand 404822 states and 1841309 transitions. [2019-12-07 18:08:33,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 18:08:33,522 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:08:33,522 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:08:33,522 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:08:33,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:08:33,523 INFO L82 PathProgramCache]: Analyzing trace with hash 543915511, now seen corresponding path program 1 times [2019-12-07 18:08:33,523 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:08:33,523 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [915947650] [2019-12-07 18:08:33,523 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:08:33,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:08:33,546 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:08:33,547 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [915947650] [2019-12-07 18:08:33,547 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:08:33,547 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:08:33,547 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [382505791] [2019-12-07 18:08:33,547 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:08:33,548 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:08:33,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:08:33,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:08:33,548 INFO L87 Difference]: Start difference. First operand 404822 states and 1841309 transitions. Second operand 3 states. [2019-12-07 18:08:34,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:08:34,727 INFO L93 Difference]: Finished difference Result 243693 states and 997846 transitions. [2019-12-07 18:08:34,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:08:34,728 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 18:08:34,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:08:35,943 INFO L225 Difference]: With dead ends: 243693 [2019-12-07 18:08:35,943 INFO L226 Difference]: Without dead ends: 243693 [2019-12-07 18:08:35,943 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:08:39,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243693 states. [2019-12-07 18:08:43,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243693 to 243693. [2019-12-07 18:08:43,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243693 states. [2019-12-07 18:08:44,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243693 states to 243693 states and 997846 transitions. [2019-12-07 18:08:44,375 INFO L78 Accepts]: Start accepts. Automaton has 243693 states and 997846 transitions. Word has length 21 [2019-12-07 18:08:44,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:08:44,375 INFO L462 AbstractCegarLoop]: Abstraction has 243693 states and 997846 transitions. [2019-12-07 18:08:44,375 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:08:44,375 INFO L276 IsEmpty]: Start isEmpty. Operand 243693 states and 997846 transitions. [2019-12-07 18:08:44,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:08:44,393 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:08:44,393 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:08:44,393 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:08:44,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:08:44,394 INFO L82 PathProgramCache]: Analyzing trace with hash -2129291057, now seen corresponding path program 1 times [2019-12-07 18:08:44,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:08:44,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1017999350] [2019-12-07 18:08:44,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:08:44,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:08:44,431 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:08:44,431 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1017999350] [2019-12-07 18:08:44,431 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:08:44,431 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:08:44,432 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1900790379] [2019-12-07 18:08:44,432 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:08:44,432 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:08:44,432 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:08:44,432 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:08:44,432 INFO L87 Difference]: Start difference. First operand 243693 states and 997846 transitions. Second operand 4 states. [2019-12-07 18:08:49,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:08:49,718 INFO L93 Difference]: Finished difference Result 404898 states and 1652712 transitions. [2019-12-07 18:08:49,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:08:49,719 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 18:08:49,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:08:50,326 INFO L225 Difference]: With dead ends: 404898 [2019-12-07 18:08:50,326 INFO L226 Difference]: Without dead ends: 229653 [2019-12-07 18:08:50,326 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:08:53,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229653 states. [2019-12-07 18:08:56,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229653 to 229026. [2019-12-07 18:08:56,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 229026 states. [2019-12-07 18:08:57,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 229026 states to 229026 states and 932216 transitions. [2019-12-07 18:08:57,693 INFO L78 Accepts]: Start accepts. Automaton has 229026 states and 932216 transitions. Word has length 22 [2019-12-07 18:08:57,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:08:57,693 INFO L462 AbstractCegarLoop]: Abstraction has 229026 states and 932216 transitions. [2019-12-07 18:08:57,693 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:08:57,693 INFO L276 IsEmpty]: Start isEmpty. Operand 229026 states and 932216 transitions. [2019-12-07 18:08:57,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:08:57,711 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:08:57,711 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:08:57,711 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:08:57,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:08:57,711 INFO L82 PathProgramCache]: Analyzing trace with hash -150132667, now seen corresponding path program 2 times [2019-12-07 18:08:57,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:08:57,712 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095463326] [2019-12-07 18:08:57,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:08:57,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:08:57,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:08:57,745 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095463326] [2019-12-07 18:08:57,745 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:08:57,745 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:08:57,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1834725340] [2019-12-07 18:08:57,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:08:57,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:08:57,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:08:57,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:08:57,745 INFO L87 Difference]: Start difference. First operand 229026 states and 932216 transitions. Second operand 4 states. [2019-12-07 18:08:58,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:08:58,307 INFO L93 Difference]: Finished difference Result 56020 states and 192457 transitions. [2019-12-07 18:08:58,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:08:58,307 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 18:08:58,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:08:58,395 INFO L225 Difference]: With dead ends: 56020 [2019-12-07 18:08:58,396 INFO L226 Difference]: Without dead ends: 56020 [2019-12-07 18:08:58,396 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:08:58,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56020 states. [2019-12-07 18:08:59,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56020 to 56020. [2019-12-07 18:08:59,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56020 states. [2019-12-07 18:08:59,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56020 states to 56020 states and 192457 transitions. [2019-12-07 18:08:59,323 INFO L78 Accepts]: Start accepts. Automaton has 56020 states and 192457 transitions. Word has length 22 [2019-12-07 18:08:59,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:08:59,323 INFO L462 AbstractCegarLoop]: Abstraction has 56020 states and 192457 transitions. [2019-12-07 18:08:59,324 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:08:59,324 INFO L276 IsEmpty]: Start isEmpty. Operand 56020 states and 192457 transitions. [2019-12-07 18:08:59,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 18:08:59,333 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:08:59,333 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:08:59,333 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:08:59,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:08:59,334 INFO L82 PathProgramCache]: Analyzing trace with hash 1134773804, now seen corresponding path program 1 times [2019-12-07 18:08:59,334 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:08:59,334 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933149854] [2019-12-07 18:08:59,334 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:08:59,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:08:59,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:08:59,381 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933149854] [2019-12-07 18:08:59,381 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:08:59,382 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:08:59,382 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551423706] [2019-12-07 18:08:59,382 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:08:59,382 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:08:59,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:08:59,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:08:59,383 INFO L87 Difference]: Start difference. First operand 56020 states and 192457 transitions. Second operand 6 states. [2019-12-07 18:09:00,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:00,002 INFO L93 Difference]: Finished difference Result 86095 states and 288193 transitions. [2019-12-07 18:09:00,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:09:00,002 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2019-12-07 18:09:00,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:00,143 INFO L225 Difference]: With dead ends: 86095 [2019-12-07 18:09:00,144 INFO L226 Difference]: Without dead ends: 85899 [2019-12-07 18:09:00,144 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:09:00,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85899 states. [2019-12-07 18:09:01,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85899 to 59374. [2019-12-07 18:09:01,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59374 states. [2019-12-07 18:09:01,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59374 states to 59374 states and 202497 transitions. [2019-12-07 18:09:01,631 INFO L78 Accepts]: Start accepts. Automaton has 59374 states and 202497 transitions. Word has length 24 [2019-12-07 18:09:01,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:01,632 INFO L462 AbstractCegarLoop]: Abstraction has 59374 states and 202497 transitions. [2019-12-07 18:09:01,632 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:09:01,632 INFO L276 IsEmpty]: Start isEmpty. Operand 59374 states and 202497 transitions. [2019-12-07 18:09:01,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:09:01,651 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:01,651 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:01,651 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:01,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:01,652 INFO L82 PathProgramCache]: Analyzing trace with hash 324599252, now seen corresponding path program 1 times [2019-12-07 18:09:01,652 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:01,652 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1693180248] [2019-12-07 18:09:01,652 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:01,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:01,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:01,693 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1693180248] [2019-12-07 18:09:01,693 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:01,694 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:09:01,694 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [265409413] [2019-12-07 18:09:01,694 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:09:01,694 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:01,694 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:09:01,694 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:09:01,695 INFO L87 Difference]: Start difference. First operand 59374 states and 202497 transitions. Second operand 5 states. [2019-12-07 18:09:02,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:02,117 INFO L93 Difference]: Finished difference Result 78236 states and 261174 transitions. [2019-12-07 18:09:02,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:09:02,118 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 18:09:02,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:02,240 INFO L225 Difference]: With dead ends: 78236 [2019-12-07 18:09:02,240 INFO L226 Difference]: Without dead ends: 77855 [2019-12-07 18:09:02,240 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:09:02,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77855 states. [2019-12-07 18:09:03,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77855 to 68007. [2019-12-07 18:09:03,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68007 states. [2019-12-07 18:09:03,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68007 states to 68007 states and 229538 transitions. [2019-12-07 18:09:03,570 INFO L78 Accepts]: Start accepts. Automaton has 68007 states and 229538 transitions. Word has length 28 [2019-12-07 18:09:03,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:03,571 INFO L462 AbstractCegarLoop]: Abstraction has 68007 states and 229538 transitions. [2019-12-07 18:09:03,571 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:09:03,571 INFO L276 IsEmpty]: Start isEmpty. Operand 68007 states and 229538 transitions. [2019-12-07 18:09:03,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:09:03,599 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:03,599 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:03,599 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:03,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:03,599 INFO L82 PathProgramCache]: Analyzing trace with hash 790027274, now seen corresponding path program 1 times [2019-12-07 18:09:03,599 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:03,600 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [631841389] [2019-12-07 18:09:03,600 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:03,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:03,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:03,650 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [631841389] [2019-12-07 18:09:03,650 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:03,650 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:09:03,650 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1180801573] [2019-12-07 18:09:03,650 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:09:03,650 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:03,650 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:09:03,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:09:03,651 INFO L87 Difference]: Start difference. First operand 68007 states and 229538 transitions. Second operand 6 states. [2019-12-07 18:09:04,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:04,241 INFO L93 Difference]: Finished difference Result 94344 states and 313595 transitions. [2019-12-07 18:09:04,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:09:04,241 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2019-12-07 18:09:04,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:04,394 INFO L225 Difference]: With dead ends: 94344 [2019-12-07 18:09:04,395 INFO L226 Difference]: Without dead ends: 93619 [2019-12-07 18:09:04,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:09:04,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93619 states. [2019-12-07 18:09:05,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93619 to 69791. [2019-12-07 18:09:05,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69791 states. [2019-12-07 18:09:05,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69791 states to 69791 states and 235369 transitions. [2019-12-07 18:09:05,939 INFO L78 Accepts]: Start accepts. Automaton has 69791 states and 235369 transitions. Word has length 30 [2019-12-07 18:09:05,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:05,940 INFO L462 AbstractCegarLoop]: Abstraction has 69791 states and 235369 transitions. [2019-12-07 18:09:05,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:09:05,940 INFO L276 IsEmpty]: Start isEmpty. Operand 69791 states and 235369 transitions. [2019-12-07 18:09:05,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:09:05,977 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:05,977 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:05,977 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:05,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:05,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1968017113, now seen corresponding path program 1 times [2019-12-07 18:09:05,978 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:05,978 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039740618] [2019-12-07 18:09:05,978 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:05,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:06,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:06,019 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2039740618] [2019-12-07 18:09:06,019 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:06,020 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:09:06,020 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [421946338] [2019-12-07 18:09:06,020 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:09:06,020 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:06,020 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:09:06,020 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:09:06,021 INFO L87 Difference]: Start difference. First operand 69791 states and 235369 transitions. Second operand 5 states. [2019-12-07 18:09:06,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:06,163 INFO L93 Difference]: Finished difference Result 33873 states and 117568 transitions. [2019-12-07 18:09:06,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:09:06,164 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2019-12-07 18:09:06,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:06,219 INFO L225 Difference]: With dead ends: 33873 [2019-12-07 18:09:06,219 INFO L226 Difference]: Without dead ends: 33873 [2019-12-07 18:09:06,219 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:09:06,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33873 states. [2019-12-07 18:09:06,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33873 to 28581. [2019-12-07 18:09:06,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28581 states. [2019-12-07 18:09:06,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28581 states to 28581 states and 95922 transitions. [2019-12-07 18:09:06,717 INFO L78 Accepts]: Start accepts. Automaton has 28581 states and 95922 transitions. Word has length 33 [2019-12-07 18:09:06,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:06,717 INFO L462 AbstractCegarLoop]: Abstraction has 28581 states and 95922 transitions. [2019-12-07 18:09:06,717 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:09:06,717 INFO L276 IsEmpty]: Start isEmpty. Operand 28581 states and 95922 transitions. [2019-12-07 18:09:06,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 18:09:06,750 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:06,750 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:06,750 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:06,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:06,750 INFO L82 PathProgramCache]: Analyzing trace with hash 261118904, now seen corresponding path program 1 times [2019-12-07 18:09:06,750 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:06,750 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397855907] [2019-12-07 18:09:06,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:06,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:06,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:06,803 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [397855907] [2019-12-07 18:09:06,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:06,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:09:06,803 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [184223694] [2019-12-07 18:09:06,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:09:06,804 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:06,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:09:06,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:09:06,804 INFO L87 Difference]: Start difference. First operand 28581 states and 95922 transitions. Second operand 7 states. [2019-12-07 18:09:07,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:07,455 INFO L93 Difference]: Finished difference Result 38265 states and 125377 transitions. [2019-12-07 18:09:07,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 18:09:07,455 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 42 [2019-12-07 18:09:07,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:07,511 INFO L225 Difference]: With dead ends: 38265 [2019-12-07 18:09:07,511 INFO L226 Difference]: Without dead ends: 37596 [2019-12-07 18:09:07,511 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=102, Invalid=278, Unknown=0, NotChecked=0, Total=380 [2019-12-07 18:09:07,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37596 states. [2019-12-07 18:09:07,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37596 to 27895. [2019-12-07 18:09:07,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27895 states. [2019-12-07 18:09:08,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27895 states to 27895 states and 93544 transitions. [2019-12-07 18:09:08,033 INFO L78 Accepts]: Start accepts. Automaton has 27895 states and 93544 transitions. Word has length 42 [2019-12-07 18:09:08,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:08,033 INFO L462 AbstractCegarLoop]: Abstraction has 27895 states and 93544 transitions. [2019-12-07 18:09:08,033 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:09:08,033 INFO L276 IsEmpty]: Start isEmpty. Operand 27895 states and 93544 transitions. [2019-12-07 18:09:08,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 18:09:08,064 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:08,064 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:08,064 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:08,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:08,065 INFO L82 PathProgramCache]: Analyzing trace with hash 799718125, now seen corresponding path program 1 times [2019-12-07 18:09:08,065 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:08,065 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270516387] [2019-12-07 18:09:08,065 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:08,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:08,110 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:08,110 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270516387] [2019-12-07 18:09:08,111 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:08,111 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:09:08,111 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1032370025] [2019-12-07 18:09:08,111 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:09:08,111 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:08,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:09:08,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:09:08,112 INFO L87 Difference]: Start difference. First operand 27895 states and 93544 transitions. Second operand 5 states. [2019-12-07 18:09:08,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:08,573 INFO L93 Difference]: Finished difference Result 42035 states and 140475 transitions. [2019-12-07 18:09:08,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:09:08,574 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-12-07 18:09:08,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:08,631 INFO L225 Difference]: With dead ends: 42035 [2019-12-07 18:09:08,631 INFO L226 Difference]: Without dead ends: 42035 [2019-12-07 18:09:08,631 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:09:08,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42035 states. [2019-12-07 18:09:09,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42035 to 35397. [2019-12-07 18:09:09,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35397 states. [2019-12-07 18:09:09,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35397 states to 35397 states and 118744 transitions. [2019-12-07 18:09:09,213 INFO L78 Accepts]: Start accepts. Automaton has 35397 states and 118744 transitions. Word has length 43 [2019-12-07 18:09:09,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:09,213 INFO L462 AbstractCegarLoop]: Abstraction has 35397 states and 118744 transitions. [2019-12-07 18:09:09,213 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:09:09,213 INFO L276 IsEmpty]: Start isEmpty. Operand 35397 states and 118744 transitions. [2019-12-07 18:09:09,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 18:09:09,251 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:09,251 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:09,251 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:09,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:09,252 INFO L82 PathProgramCache]: Analyzing trace with hash 585685071, now seen corresponding path program 2 times [2019-12-07 18:09:09,252 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:09,252 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1931203283] [2019-12-07 18:09:09,252 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:09,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:09,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:09,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1931203283] [2019-12-07 18:09:09,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:09,287 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:09:09,287 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [709452881] [2019-12-07 18:09:09,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:09:09,288 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:09,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:09:09,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:09:09,288 INFO L87 Difference]: Start difference. First operand 35397 states and 118744 transitions. Second operand 3 states. [2019-12-07 18:09:09,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:09,376 INFO L93 Difference]: Finished difference Result 27895 states and 92505 transitions. [2019-12-07 18:09:09,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:09:09,376 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 43 [2019-12-07 18:09:09,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:09,416 INFO L225 Difference]: With dead ends: 27895 [2019-12-07 18:09:09,416 INFO L226 Difference]: Without dead ends: 27895 [2019-12-07 18:09:09,416 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:09:09,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27895 states. [2019-12-07 18:09:09,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27895 to 27595. [2019-12-07 18:09:09,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27595 states. [2019-12-07 18:09:09,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27595 states to 27595 states and 91577 transitions. [2019-12-07 18:09:09,839 INFO L78 Accepts]: Start accepts. Automaton has 27595 states and 91577 transitions. Word has length 43 [2019-12-07 18:09:09,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:09,839 INFO L462 AbstractCegarLoop]: Abstraction has 27595 states and 91577 transitions. [2019-12-07 18:09:09,839 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:09:09,839 INFO L276 IsEmpty]: Start isEmpty. Operand 27595 states and 91577 transitions. [2019-12-07 18:09:09,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 18:09:09,870 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:09,870 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:09,870 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:09,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:09,870 INFO L82 PathProgramCache]: Analyzing trace with hash -626667720, now seen corresponding path program 1 times [2019-12-07 18:09:09,870 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:09,870 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167050101] [2019-12-07 18:09:09,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:09,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:09,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:09,914 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167050101] [2019-12-07 18:09:09,914 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:09,914 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:09:09,914 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890850859] [2019-12-07 18:09:09,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:09:09,915 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:09,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:09:09,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:09:09,915 INFO L87 Difference]: Start difference. First operand 27595 states and 91577 transitions. Second operand 6 states. [2019-12-07 18:09:10,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:10,026 INFO L93 Difference]: Finished difference Result 25582 states and 86980 transitions. [2019-12-07 18:09:10,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:09:10,026 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2019-12-07 18:09:10,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:10,065 INFO L225 Difference]: With dead ends: 25582 [2019-12-07 18:09:10,065 INFO L226 Difference]: Without dead ends: 25354 [2019-12-07 18:09:10,066 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:09:10,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25354 states. [2019-12-07 18:09:10,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25354 to 17869. [2019-12-07 18:09:10,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17869 states. [2019-12-07 18:09:10,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17869 states to 17869 states and 62755 transitions. [2019-12-07 18:09:10,405 INFO L78 Accepts]: Start accepts. Automaton has 17869 states and 62755 transitions. Word has length 44 [2019-12-07 18:09:10,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:10,405 INFO L462 AbstractCegarLoop]: Abstraction has 17869 states and 62755 transitions. [2019-12-07 18:09:10,405 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:09:10,405 INFO L276 IsEmpty]: Start isEmpty. Operand 17869 states and 62755 transitions. [2019-12-07 18:09:10,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:09:10,424 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:10,424 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:10,424 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:10,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:10,424 INFO L82 PathProgramCache]: Analyzing trace with hash 1045390656, now seen corresponding path program 1 times [2019-12-07 18:09:10,424 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:10,425 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842927890] [2019-12-07 18:09:10,425 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:10,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:10,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:10,449 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842927890] [2019-12-07 18:09:10,449 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:10,449 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:09:10,450 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [990932416] [2019-12-07 18:09:10,450 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:09:10,450 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:10,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:09:10,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:09:10,450 INFO L87 Difference]: Start difference. First operand 17869 states and 62755 transitions. Second operand 3 states. [2019-12-07 18:09:10,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:10,542 INFO L93 Difference]: Finished difference Result 24929 states and 87649 transitions. [2019-12-07 18:09:10,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:09:10,543 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 18:09:10,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:10,586 INFO L225 Difference]: With dead ends: 24929 [2019-12-07 18:09:10,586 INFO L226 Difference]: Without dead ends: 24929 [2019-12-07 18:09:10,586 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:09:10,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24929 states. [2019-12-07 18:09:10,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24929 to 20385. [2019-12-07 18:09:10,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20385 states. [2019-12-07 18:09:10,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20385 states to 20385 states and 71965 transitions. [2019-12-07 18:09:10,979 INFO L78 Accepts]: Start accepts. Automaton has 20385 states and 71965 transitions. Word has length 58 [2019-12-07 18:09:10,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:10,979 INFO L462 AbstractCegarLoop]: Abstraction has 20385 states and 71965 transitions. [2019-12-07 18:09:10,979 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:09:10,979 INFO L276 IsEmpty]: Start isEmpty. Operand 20385 states and 71965 transitions. [2019-12-07 18:09:11,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:09:11,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:11,004 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:11,004 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:11,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:11,005 INFO L82 PathProgramCache]: Analyzing trace with hash 723016660, now seen corresponding path program 1 times [2019-12-07 18:09:11,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:11,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1464150592] [2019-12-07 18:09:11,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:11,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:11,292 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:11,292 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1464150592] [2019-12-07 18:09:11,292 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:11,292 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 18:09:11,292 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [834563442] [2019-12-07 18:09:11,293 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:09:11,293 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:11,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:09:11,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:09:11,293 INFO L87 Difference]: Start difference. First operand 20385 states and 71965 transitions. Second operand 13 states. [2019-12-07 18:09:14,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:14,145 INFO L93 Difference]: Finished difference Result 67591 states and 239142 transitions. [2019-12-07 18:09:14,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 18:09:14,146 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 58 [2019-12-07 18:09:14,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:14,261 INFO L225 Difference]: With dead ends: 67591 [2019-12-07 18:09:14,261 INFO L226 Difference]: Without dead ends: 65733 [2019-12-07 18:09:14,262 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 210 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=206, Invalid=850, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 18:09:14,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65733 states. [2019-12-07 18:09:14,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65733 to 23267. [2019-12-07 18:09:14,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23267 states. [2019-12-07 18:09:14,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23267 states to 23267 states and 82752 transitions. [2019-12-07 18:09:14,960 INFO L78 Accepts]: Start accepts. Automaton has 23267 states and 82752 transitions. Word has length 58 [2019-12-07 18:09:14,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:14,960 INFO L462 AbstractCegarLoop]: Abstraction has 23267 states and 82752 transitions. [2019-12-07 18:09:14,960 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:09:14,960 INFO L276 IsEmpty]: Start isEmpty. Operand 23267 states and 82752 transitions. [2019-12-07 18:09:14,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:09:14,985 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:14,985 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:14,985 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:14,985 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:14,985 INFO L82 PathProgramCache]: Analyzing trace with hash -976447134, now seen corresponding path program 2 times [2019-12-07 18:09:14,985 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:14,985 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [45303511] [2019-12-07 18:09:14,986 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:14,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:15,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:15,049 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [45303511] [2019-12-07 18:09:15,049 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:15,049 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:09:15,049 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1978323179] [2019-12-07 18:09:15,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:09:15,049 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:15,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:09:15,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:09:15,050 INFO L87 Difference]: Start difference. First operand 23267 states and 82752 transitions. Second operand 4 states. [2019-12-07 18:09:15,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:15,175 INFO L93 Difference]: Finished difference Result 38033 states and 134419 transitions. [2019-12-07 18:09:15,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:09:15,176 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 58 [2019-12-07 18:09:15,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:15,231 INFO L225 Difference]: With dead ends: 38033 [2019-12-07 18:09:15,232 INFO L226 Difference]: Without dead ends: 34883 [2019-12-07 18:09:15,232 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:09:15,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34883 states. [2019-12-07 18:09:15,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34883 to 19461. [2019-12-07 18:09:15,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19461 states. [2019-12-07 18:09:15,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19461 states to 19461 states and 68246 transitions. [2019-12-07 18:09:15,671 INFO L78 Accepts]: Start accepts. Automaton has 19461 states and 68246 transitions. Word has length 58 [2019-12-07 18:09:15,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:15,671 INFO L462 AbstractCegarLoop]: Abstraction has 19461 states and 68246 transitions. [2019-12-07 18:09:15,671 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:09:15,671 INFO L276 IsEmpty]: Start isEmpty. Operand 19461 states and 68246 transitions. [2019-12-07 18:09:15,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:09:15,690 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:15,691 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:15,691 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:15,691 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:15,691 INFO L82 PathProgramCache]: Analyzing trace with hash 1921484756, now seen corresponding path program 3 times [2019-12-07 18:09:15,691 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:15,691 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [637218824] [2019-12-07 18:09:15,691 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:15,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:15,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:15,840 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [637218824] [2019-12-07 18:09:15,840 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:15,840 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:09:15,840 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [7280575] [2019-12-07 18:09:15,840 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:09:15,840 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:15,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:09:15,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:09:15,841 INFO L87 Difference]: Start difference. First operand 19461 states and 68246 transitions. Second operand 9 states. [2019-12-07 18:09:16,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:16,536 INFO L93 Difference]: Finished difference Result 51196 states and 181663 transitions. [2019-12-07 18:09:16,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 18:09:16,536 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 58 [2019-12-07 18:09:16,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:16,625 INFO L225 Difference]: With dead ends: 51196 [2019-12-07 18:09:16,625 INFO L226 Difference]: Without dead ends: 50390 [2019-12-07 18:09:16,625 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=142, Invalid=364, Unknown=0, NotChecked=0, Total=506 [2019-12-07 18:09:16,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50390 states. [2019-12-07 18:09:17,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50390 to 21185. [2019-12-07 18:09:17,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21185 states. [2019-12-07 18:09:17,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21185 states to 21185 states and 74550 transitions. [2019-12-07 18:09:17,179 INFO L78 Accepts]: Start accepts. Automaton has 21185 states and 74550 transitions. Word has length 58 [2019-12-07 18:09:17,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:17,180 INFO L462 AbstractCegarLoop]: Abstraction has 21185 states and 74550 transitions. [2019-12-07 18:09:17,180 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:09:17,180 INFO L276 IsEmpty]: Start isEmpty. Operand 21185 states and 74550 transitions. [2019-12-07 18:09:17,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:09:17,203 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:17,203 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:17,203 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:17,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:17,204 INFO L82 PathProgramCache]: Analyzing trace with hash -282665000, now seen corresponding path program 4 times [2019-12-07 18:09:17,204 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:17,204 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470753288] [2019-12-07 18:09:17,204 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:17,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:17,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:17,268 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470753288] [2019-12-07 18:09:17,268 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:17,268 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:09:17,268 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [351784280] [2019-12-07 18:09:17,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:09:17,268 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:17,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:09:17,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:09:17,269 INFO L87 Difference]: Start difference. First operand 21185 states and 74550 transitions. Second operand 5 states. [2019-12-07 18:09:17,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:17,414 INFO L93 Difference]: Finished difference Result 42807 states and 146965 transitions. [2019-12-07 18:09:17,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:09:17,415 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-12-07 18:09:17,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:17,434 INFO L225 Difference]: With dead ends: 42807 [2019-12-07 18:09:17,435 INFO L226 Difference]: Without dead ends: 16727 [2019-12-07 18:09:17,435 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:09:17,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16727 states. [2019-12-07 18:09:17,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16727 to 9567. [2019-12-07 18:09:17,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9567 states. [2019-12-07 18:09:17,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9567 states to 9567 states and 29200 transitions. [2019-12-07 18:09:17,612 INFO L78 Accepts]: Start accepts. Automaton has 9567 states and 29200 transitions. Word has length 58 [2019-12-07 18:09:17,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:17,612 INFO L462 AbstractCegarLoop]: Abstraction has 9567 states and 29200 transitions. [2019-12-07 18:09:17,612 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:09:17,613 INFO L276 IsEmpty]: Start isEmpty. Operand 9567 states and 29200 transitions. [2019-12-07 18:09:17,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:09:17,621 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:17,621 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:17,621 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:17,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:17,621 INFO L82 PathProgramCache]: Analyzing trace with hash 1491599706, now seen corresponding path program 1 times [2019-12-07 18:09:17,621 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:17,621 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1521799367] [2019-12-07 18:09:17,622 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:17,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:09:17,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:09:17,640 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1521799367] [2019-12-07 18:09:17,640 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:09:17,640 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:09:17,641 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102334429] [2019-12-07 18:09:17,641 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:09:17,641 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:09:17,641 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:09:17,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:09:17,641 INFO L87 Difference]: Start difference. First operand 9567 states and 29200 transitions. Second operand 3 states. [2019-12-07 18:09:17,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:09:17,685 INFO L93 Difference]: Finished difference Result 10995 states and 32653 transitions. [2019-12-07 18:09:17,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:09:17,685 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 18:09:17,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:09:17,696 INFO L225 Difference]: With dead ends: 10995 [2019-12-07 18:09:17,696 INFO L226 Difference]: Without dead ends: 10629 [2019-12-07 18:09:17,696 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:09:17,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10629 states. [2019-12-07 18:09:17,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10629 to 8297. [2019-12-07 18:09:17,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8297 states. [2019-12-07 18:09:17,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8297 states to 8297 states and 25054 transitions. [2019-12-07 18:09:17,815 INFO L78 Accepts]: Start accepts. Automaton has 8297 states and 25054 transitions. Word has length 58 [2019-12-07 18:09:17,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:09:17,815 INFO L462 AbstractCegarLoop]: Abstraction has 8297 states and 25054 transitions. [2019-12-07 18:09:17,815 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:09:17,815 INFO L276 IsEmpty]: Start isEmpty. Operand 8297 states and 25054 transitions. [2019-12-07 18:09:17,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:09:17,821 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:09:17,821 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:09:17,821 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:09:17,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:09:17,822 INFO L82 PathProgramCache]: Analyzing trace with hash 1370986964, now seen corresponding path program 5 times [2019-12-07 18:09:17,822 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:09:17,822 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853562894] [2019-12-07 18:09:17,822 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:09:17,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:09:17,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:09:17,883 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:09:17,883 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:09:17,886 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] ULTIMATE.startENTRY-->L843: Formula: (let ((.cse0 (store |v_#valid_85| 0 0))) (and (= v_~__unbuffered_cnt~0_191 0) (= 0 v_~y$r_buff0_thd2~0_398) (= 0 v_~y$read_delayed_var~0.base_4) (= v_~y$w_buff1_used~0_631 0) (= v_~y$r_buff1_thd0~0_221 0) (= 0 v_~y$read_delayed_var~0.offset_4) (= 0 v_~y$r_buff1_thd2~0_382) (= 0 v_~__unbuffered_p0_EAX~0_56) (< 0 |v_#StackHeapBarrier_22|) (= |v_#NULL.offset_6| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t701~0.base_32|) 0) (= v_~y$r_buff0_thd1~0_46 0) (= 0 v_~y$r_buff0_thd4~0_132) (= 0 v_~__unbuffered_p3_EAX~0_43) (= v_~main$tmp_guard0~0_27 0) (= 0 v_~y$r_buff1_thd4~0_217) (= v_~main$tmp_guard1~0_34 0) (= v_~y$read_delayed~0_6 0) (= |v_#valid_83| (store .cse0 |v_ULTIMATE.start_main_~#t701~0.base_32| 1)) (= 0 v_~__unbuffered_p1_EAX~0_52) (= 0 v_~y$w_buff0~0_506) (= v_~z~0_169 0) (= 0 v_~weak$$choice0~0_18) (= v_~y$w_buff0_used~0_913 0) (= v_~weak$$choice2~0_212 0) (= (store |v_#length_32| |v_ULTIMATE.start_main_~#t701~0.base_32| 4) |v_#length_31|) (= 0 v_~y$r_buff0_thd3~0_241) (= 0 |v_#NULL.base_6|) (= 0 v_~y$r_buff1_thd3~0_210) (= v_~y~0_184 0) (= 0 v_~y$flush_delayed~0_45) (= v_~y$mem_tmp~0_20 0) (= |v_ULTIMATE.start_main_~#t701~0.offset_23| 0) (= v_~y$w_buff1~0_341 0) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t701~0.base_32| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t701~0.base_32|) |v_ULTIMATE.start_main_~#t701~0.offset_23| 0)) |v_#memory_int_25|) (= v_~y$r_buff0_thd0~0_136 0) (= v_~x~0_40 0) (= v_~y$r_buff1_thd1~0_134 0) (= v_~a~0_41 0) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t701~0.base_32|) (= 0 v_~__unbuffered_p3_EBX~0_43))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_85|, #memory_int=|v_#memory_int_26|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_~#t702~0.base=|v_ULTIMATE.start_main_~#t702~0.base_34|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_77|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~a~0=v_~a~0_41, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_56, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_210, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_52, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_46, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_43, #length=|v_#length_31|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_27|, ULTIMATE.start_main_~#t701~0.base=|v_ULTIMATE.start_main_~#t701~0.base_32|, ULTIMATE.start_main_~#t701~0.offset=|v_ULTIMATE.start_main_~#t701~0.offset_23|, ~weak$$choice0~0=v_~weak$$choice0~0_18, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_217, ~y$w_buff1~0=v_~y$w_buff1~0_341, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_398, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_191, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_221, ~x~0=v_~x~0_40, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_913, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_45|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_77|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_134, ~y$w_buff0~0=v_~y$w_buff0~0_506, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_241, ULTIMATE.start_main_~#t704~0.base=|v_ULTIMATE.start_main_~#t704~0.base_19|, ~y~0=v_~y~0_184, ULTIMATE.start_main_~#t702~0.offset=|v_ULTIMATE.start_main_~#t702~0.offset_24|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_27, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_43, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t703~0.offset=|v_ULTIMATE.start_main_~#t703~0.offset_16|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_382, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_132, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_136, #valid=|v_#valid_83|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_~#t704~0.offset=|v_ULTIMATE.start_main_~#t704~0.offset_16|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_10|, ~z~0=v_~z~0_169, ~weak$$choice2~0=v_~weak$$choice2~0_212, ULTIMATE.start_main_~#t703~0.base=|v_ULTIMATE.start_main_~#t703~0.base_26|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_631} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t702~0.base, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t701~0.base, ULTIMATE.start_main_~#t701~0.offset, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t704~0.base, ~y~0, ULTIMATE.start_main_~#t702~0.offset, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ULTIMATE.start_main_~#t703~0.offset, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_~#t704~0.offset, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t703~0.base, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:09:17,886 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L843-1-->L845: Formula: (and (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t702~0.base_13| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t702~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t702~0.base_13|) |v_ULTIMATE.start_main_~#t702~0.offset_11| 1)) |v_#memory_int_17|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t702~0.base_13| 1)) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t702~0.base_13|)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t702~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t702~0.base_13|)) (= |v_ULTIMATE.start_main_~#t702~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t702~0.base=|v_ULTIMATE.start_main_~#t702~0.base_13|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t702~0.offset=|v_ULTIMATE.start_main_~#t702~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t702~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t702~0.offset] because there is no mapped edge [2019-12-07 18:09:17,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L845-1-->L847: Formula: (and (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t703~0.base_11|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t703~0.base_11|)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t703~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t703~0.offset_9|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t703~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t703~0.base_11|) |v_ULTIMATE.start_main_~#t703~0.offset_9| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t703~0.base_11|) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t703~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t703~0.base=|v_ULTIMATE.start_main_~#t703~0.base_11|, ULTIMATE.start_main_~#t703~0.offset=|v_ULTIMATE.start_main_~#t703~0.offset_9|} AuxVars[] AssignedVars[#valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t703~0.base, ULTIMATE.start_main_~#t703~0.offset] because there is no mapped edge [2019-12-07 18:09:17,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L4-->L797: Formula: (and (= v_~y$r_buff0_thd3~0_37 v_~y$r_buff1_thd3~0_33) (= v_~y$r_buff0_thd1~0_10 v_~y$r_buff1_thd1~0_10) (= v_~y$r_buff0_thd3~0_36 1) (= v_~y$r_buff0_thd4~0_29 v_~y$r_buff1_thd4~0_26) (= v_~y$r_buff0_thd2~0_91 v_~y$r_buff1_thd2~0_54) (= v_~y$r_buff0_thd0~0_35 v_~y$r_buff1_thd0~0_25) (= v_~z~0_14 1) (not (= v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40 0))) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_29, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_37, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_35, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_91, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_54, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_29, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_10, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_26, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_33, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_36, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_35, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_91, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40, ~z~0=v_~z~0_14, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_25} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 18:09:17,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L847-1-->L849: Formula: (and (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t704~0.base_9|)) (not (= 0 |v_ULTIMATE.start_main_~#t704~0.base_9|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t704~0.base_9| 4) |v_#length_17|) (= 0 |v_ULTIMATE.start_main_~#t704~0.offset_8|) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t704~0.base_9| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t704~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t704~0.base_9|) |v_ULTIMATE.start_main_~#t704~0.offset_8| 3)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t704~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_12|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ULTIMATE.start_main_~#t704~0.base=|v_ULTIMATE.start_main_~#t704~0.base_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t704~0.offset=|v_ULTIMATE.start_main_~#t704~0.offset_8|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t704~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t704~0.offset, #length] because there is no mapped edge [2019-12-07 18:09:17,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_27 v_~__unbuffered_p0_EAX~0_27) (= v_~a~0_26 1) (= v_~__unbuffered_cnt~0_118 (+ v_~__unbuffered_cnt~0_119 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_5|) (= v_P0Thread1of1ForFork1_~arg.offset_17 |v_P0Thread1of1ForFork1_#in~arg.offset_19|) (= 0 |v_P0Thread1of1ForFork1_#res.base_5|) (= |v_P0Thread1of1ForFork1_#in~arg.base_19| v_P0Thread1of1ForFork1_~arg.base_17)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_119, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|, ~x~0=v_~x~0_27} OutVars{~a~0=v_~a~0_26, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_27, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_5|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_5|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_118, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|, ~x~0=v_~x~0_27, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_17} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 18:09:17,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L762-->L762-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-683519416 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_In-683519416| |P1Thread1of1ForFork2_#t~ite11_Out-683519416|) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite12_Out-683519416| ~y$w_buff1~0_In-683519416)) (and .cse0 (= |P1Thread1of1ForFork2_#t~ite11_Out-683519416| |P1Thread1of1ForFork2_#t~ite12_Out-683519416|) (= |P1Thread1of1ForFork2_#t~ite11_Out-683519416| ~y$w_buff1~0_In-683519416) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-683519416 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-683519416 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-683519416 256)) (and .cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-683519416 256)))))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-683519416, ~y$w_buff1~0=~y$w_buff1~0_In-683519416, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-683519416, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-683519416, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_In-683519416|, ~weak$$choice2~0=~weak$$choice2~0_In-683519416, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-683519416} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-683519416, ~y$w_buff1~0=~y$w_buff1~0_In-683519416, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-683519416, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-683519416, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-683519416|, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-683519416|, ~weak$$choice2~0=~weak$$choice2~0_In-683519416, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-683519416} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12, P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:09:17,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L763-->L763-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1934270710 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-1934270710 256) 0))) (or (and .cse0 (= (mod ~y$r_buff1_thd2~0_In-1934270710 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-1934270710 256)) (and .cse0 (= (mod ~y$w_buff1_used~0_In-1934270710 256) 0)))) (= |P1Thread1of1ForFork2_#t~ite15_Out-1934270710| |P1Thread1of1ForFork2_#t~ite14_Out-1934270710|) (= ~y$w_buff0_used~0_In-1934270710 |P1Thread1of1ForFork2_#t~ite14_Out-1934270710|) .cse1) (and (= ~y$w_buff0_used~0_In-1934270710 |P1Thread1of1ForFork2_#t~ite15_Out-1934270710|) (= |P1Thread1of1ForFork2_#t~ite14_In-1934270710| |P1Thread1of1ForFork2_#t~ite14_Out-1934270710|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1934270710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1934270710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1934270710, ~weak$$choice2~0=~weak$$choice2~0_In-1934270710, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In-1934270710|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1934270710} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1934270710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1934270710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1934270710, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1934270710|, ~weak$$choice2~0=~weak$$choice2~0_In-1934270710, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out-1934270710|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1934270710} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 18:09:17,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L764-->L764-8: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In72198567 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In72198567 256) 0)) (.cse5 (= |P1Thread1of1ForFork2_#t~ite18_Out72198567| |P1Thread1of1ForFork2_#t~ite17_Out72198567|)) (.cse4 (= 0 (mod ~weak$$choice2~0_In72198567 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In72198567 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In72198567 256)))) (or (and (or (and (or (and .cse0 .cse1) (and .cse1 .cse2) .cse3) .cse4 .cse5 (= ~y$w_buff1_used~0_In72198567 |P1Thread1of1ForFork2_#t~ite17_Out72198567|)) (and (= |P1Thread1of1ForFork2_#t~ite17_Out72198567| |P1Thread1of1ForFork2_#t~ite17_In72198567|) (not .cse4) (= ~y$w_buff1_used~0_In72198567 |P1Thread1of1ForFork2_#t~ite18_Out72198567|))) (= |P1Thread1of1ForFork2_#t~ite16_In72198567| |P1Thread1of1ForFork2_#t~ite16_Out72198567|)) (let ((.cse6 (not .cse1))) (and (= |P1Thread1of1ForFork2_#t~ite17_Out72198567| |P1Thread1of1ForFork2_#t~ite16_Out72198567|) (= |P1Thread1of1ForFork2_#t~ite16_Out72198567| 0) (or (not .cse2) .cse6) (not .cse3) .cse5 .cse4 (or (not .cse0) .cse6))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In72198567, P1Thread1of1ForFork2_#t~ite17=|P1Thread1of1ForFork2_#t~ite17_In72198567|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In72198567, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In72198567, ~weak$$choice2~0=~weak$$choice2~0_In72198567, P1Thread1of1ForFork2_#t~ite16=|P1Thread1of1ForFork2_#t~ite16_In72198567|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In72198567} OutVars{P1Thread1of1ForFork2_#t~ite18=|P1Thread1of1ForFork2_#t~ite18_Out72198567|, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In72198567, P1Thread1of1ForFork2_#t~ite17=|P1Thread1of1ForFork2_#t~ite17_Out72198567|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In72198567, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In72198567, ~weak$$choice2~0=~weak$$choice2~0_In72198567, P1Thread1of1ForFork2_#t~ite16=|P1Thread1of1ForFork2_#t~ite16_Out72198567|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In72198567} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite18, P1Thread1of1ForFork2_#t~ite17, P1Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 18:09:17,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L764-8-->L766: Formula: (and (= v_~y$r_buff0_thd2~0_378 v_~y$r_buff0_thd2~0_377) (= v_~y$w_buff1_used~0_614 |v_P1Thread1of1ForFork2_#t~ite18_31|) (not (= 0 (mod v_~weak$$choice2~0_200 256)))) InVars {P1Thread1of1ForFork2_#t~ite18=|v_P1Thread1of1ForFork2_#t~ite18_31|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_378, ~weak$$choice2~0=v_~weak$$choice2~0_200} OutVars{P1Thread1of1ForFork2_#t~ite18=|v_P1Thread1of1ForFork2_#t~ite18_30|, P1Thread1of1ForFork2_#t~ite17=|v_P1Thread1of1ForFork2_#t~ite17_28|, P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_23|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_377, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_35|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_13|, ~weak$$choice2~0=v_~weak$$choice2~0_200, P1Thread1of1ForFork2_#t~ite16=|v_P1Thread1of1ForFork2_#t~ite16_28|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_614} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite18, P1Thread1of1ForFork2_#t~ite17, P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21, P1Thread1of1ForFork2_#t~ite16, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:09:17,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L766-->L766-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-819230923 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite23_In-819230923| |P1Thread1of1ForFork2_#t~ite23_Out-819230923|) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite24_Out-819230923| ~y$r_buff1_thd2~0_In-819230923)) (and (= |P1Thread1of1ForFork2_#t~ite23_Out-819230923| ~y$r_buff1_thd2~0_In-819230923) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-819230923 256)))) (or (and .cse1 (= (mod ~y$r_buff1_thd2~0_In-819230923 256) 0)) (and .cse1 (= (mod ~y$w_buff1_used~0_In-819230923 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-819230923 256)))) (= |P1Thread1of1ForFork2_#t~ite23_Out-819230923| |P1Thread1of1ForFork2_#t~ite24_Out-819230923|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-819230923, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-819230923, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-819230923, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In-819230923|, ~weak$$choice2~0=~weak$$choice2~0_In-819230923, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-819230923} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-819230923, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-819230923, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-819230923, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out-819230923|, ~weak$$choice2~0=~weak$$choice2~0_In-819230923, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out-819230923|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-819230923} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 18:09:17,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L768-->L776: Formula: (and (= v_~y~0_60 v_~y$mem_tmp~0_11) (= 0 v_~y$flush_delayed~0_15) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (not (= 0 (mod v_~y$flush_delayed~0_16 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_15, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, ~y~0=v_~y~0_60, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_9|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 18:09:17,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L820-2-->L820-5: Formula: (let ((.cse1 (= |P3Thread1of1ForFork0_#t~ite33_Out-669256761| |P3Thread1of1ForFork0_#t~ite32_Out-669256761|)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-669256761 256))) (.cse0 (= (mod ~y$r_buff1_thd4~0_In-669256761 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= ~y$w_buff1~0_In-669256761 |P3Thread1of1ForFork0_#t~ite32_Out-669256761|)) (and (= ~y~0_In-669256761 |P3Thread1of1ForFork0_#t~ite32_Out-669256761|) .cse1 (or .cse2 .cse0)))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-669256761, ~y$w_buff1~0=~y$w_buff1~0_In-669256761, ~y~0=~y~0_In-669256761, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-669256761} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-669256761, ~y$w_buff1~0=~y$w_buff1~0_In-669256761, ~y~0=~y~0_In-669256761, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out-669256761|, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-669256761|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-669256761} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 18:09:17,893 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L821-->L821-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd4~0_In1350173701 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In1350173701 256) 0))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~ite34_Out1350173701| ~y$w_buff0_used~0_In1350173701)) (and (not .cse1) (= |P3Thread1of1ForFork0_#t~ite34_Out1350173701| 0) (not .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1350173701, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1350173701} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1350173701, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1350173701, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out1350173701|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 18:09:17,893 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L822-->L822-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd4~0_In463703612 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In463703612 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In463703612 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd4~0_In463703612 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork0_#t~ite35_Out463703612| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P3Thread1of1ForFork0_#t~ite35_Out463703612| ~y$w_buff1_used~0_In463703612)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In463703612, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In463703612, ~y$w_buff0_used~0=~y$w_buff0_used~0_In463703612, ~y$w_buff1_used~0=~y$w_buff1_used~0_In463703612} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In463703612, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In463703612, ~y$w_buff0_used~0=~y$w_buff0_used~0_In463703612, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out463703612|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In463703612} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 18:09:17,893 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L823-->L823-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd4~0_In1235775589 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1235775589 256)))) (or (and (= ~y$r_buff0_thd4~0_In1235775589 |P3Thread1of1ForFork0_#t~ite36_Out1235775589|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P3Thread1of1ForFork0_#t~ite36_Out1235775589|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1235775589, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1235775589} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1235775589, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1235775589, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out1235775589|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 18:09:17,894 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-->L824-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd4~0_In-77218814 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-77218814 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd4~0_In-77218814 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-77218814 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd4~0_In-77218814 |P3Thread1of1ForFork0_#t~ite37_Out-77218814|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P3Thread1of1ForFork0_#t~ite37_Out-77218814|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-77218814, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-77218814, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-77218814, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-77218814} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-77218814, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-77218814, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-77218814, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out-77218814|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-77218814} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 18:09:17,894 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L824-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_130 (+ v_~__unbuffered_cnt~0_131 1)) (= |v_P3Thread1of1ForFork0_#t~ite37_52| v_~y$r_buff1_thd4~0_148) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|)) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_52|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_131} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_148, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_51|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_130} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:09:17,895 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L798-->L798-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-1752670934 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1752670934 256) 0))) (or (and (= ~y$w_buff0_used~0_In-1752670934 |P2Thread1of1ForFork3_#t~ite28_Out-1752670934|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork3_#t~ite28_Out-1752670934|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1752670934, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1752670934} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1752670934, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1752670934, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out-1752670934|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 18:09:17,895 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L799-->L799-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd3~0_In1900101451 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1900101451 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1900101451 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1900101451 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork3_#t~ite29_Out1900101451|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork3_#t~ite29_Out1900101451| ~y$w_buff1_used~0_In1900101451)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1900101451, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1900101451, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1900101451, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1900101451} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1900101451, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1900101451, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1900101451, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out1900101451|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1900101451} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 18:09:17,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L800-->L801: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In190628104 256))) (.cse2 (= ~y$r_buff0_thd3~0_In190628104 ~y$r_buff0_thd3~0_Out190628104)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In190628104 256) 0))) (or (and (not .cse0) (not .cse1) (= ~y$r_buff0_thd3~0_Out190628104 0)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In190628104, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In190628104} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out190628104|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In190628104, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out190628104} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 18:09:17,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L801-->L801-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In1240525673 256))) (.cse3 (= (mod ~y$r_buff1_thd3~0_In1240525673 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1240525673 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1240525673 256)))) (or (and (= |P2Thread1of1ForFork3_#t~ite31_Out1240525673| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork3_#t~ite31_Out1240525673| ~y$r_buff1_thd3~0_In1240525673) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1240525673, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1240525673, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1240525673, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1240525673} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1240525673, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1240525673, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1240525673, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out1240525673|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1240525673} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 18:09:17,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L801-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0) (= |v_P2Thread1of1ForFork3_#t~ite31_46| v_~y$r_buff1_thd3~0_83) (= v_~__unbuffered_cnt~0_104 (+ v_~__unbuffered_cnt~0_105 1))) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_105} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_83, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_45|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_104, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:09:17,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L849-1-->L855: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:09:17,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L855-2-->L855-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1156587585 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-1156587585 256)))) (or (and (= ~y~0_In-1156587585 |ULTIMATE.start_main_#t~ite42_Out-1156587585|) (or .cse0 .cse1)) (and (= ~y$w_buff1~0_In-1156587585 |ULTIMATE.start_main_#t~ite42_Out-1156587585|) (not .cse0) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1156587585, ~y~0=~y~0_In-1156587585, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1156587585, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1156587585} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1156587585, ~y~0=~y~0_In-1156587585, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1156587585|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1156587585, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1156587585} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:09:17,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L855-4-->L856: Formula: (= v_~y~0_21 |v_ULTIMATE.start_main_#t~ite42_12|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_12|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_17|, ~y~0=v_~y~0_21, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:09:17,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L856-->L856-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1806691996 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1806691996 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite44_Out-1806691996|) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite44_Out-1806691996| ~y$w_buff0_used~0_In-1806691996) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1806691996, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1806691996} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1806691996, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1806691996, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1806691996|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:09:17,897 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L857-->L857-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1039654427 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1039654427 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1039654427 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1039654427 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite45_Out-1039654427|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$w_buff1_used~0_In-1039654427 |ULTIMATE.start_main_#t~ite45_Out-1039654427|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1039654427, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1039654427, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1039654427, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1039654427} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1039654427, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1039654427, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1039654427, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1039654427|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1039654427} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:09:17,897 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L858-->L858-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1795447732 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1795447732 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite46_Out-1795447732| 0) (not .cse0) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-1795447732 |ULTIMATE.start_main_#t~ite46_Out-1795447732|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1795447732, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1795447732} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1795447732, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1795447732, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1795447732|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:09:17,898 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [787] [787] L859-->L859-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In115171284 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In115171284 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In115171284 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In115171284 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite47_Out115171284|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd0~0_In115171284 |ULTIMATE.start_main_#t~ite47_Out115171284|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In115171284, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In115171284, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In115171284, ~y$w_buff1_used~0=~y$w_buff1_used~0_In115171284} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In115171284, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In115171284, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out115171284|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In115171284, ~y$w_buff1_used~0=~y$w_buff1_used~0_In115171284} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:09:17,898 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L859-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (ite (= (ite (not (and (= v_~z~0_155 2) (= 0 v_~__unbuffered_p0_EAX~0_46) (= 2 v_~__unbuffered_p3_EAX~0_33) (= 0 v_~__unbuffered_p1_EAX~0_39) (= 0 v_~__unbuffered_p3_EBX~0_33))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_24) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_~y$r_buff1_thd0~0_207 |v_ULTIMATE.start_main_#t~ite47_57|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_24 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_39, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_33, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_57|, ~z~0=v_~z~0_155, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_33} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_39, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_33, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_56|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ~z~0=v_~z~0_155, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_33, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_207, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:09:17,945 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:09:17 BasicIcfg [2019-12-07 18:09:17,945 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:09:17,946 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:09:17,946 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:09:17,946 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:09:17,946 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:05:26" (3/4) ... [2019-12-07 18:09:17,948 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:09:17,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] ULTIMATE.startENTRY-->L843: Formula: (let ((.cse0 (store |v_#valid_85| 0 0))) (and (= v_~__unbuffered_cnt~0_191 0) (= 0 v_~y$r_buff0_thd2~0_398) (= 0 v_~y$read_delayed_var~0.base_4) (= v_~y$w_buff1_used~0_631 0) (= v_~y$r_buff1_thd0~0_221 0) (= 0 v_~y$read_delayed_var~0.offset_4) (= 0 v_~y$r_buff1_thd2~0_382) (= 0 v_~__unbuffered_p0_EAX~0_56) (< 0 |v_#StackHeapBarrier_22|) (= |v_#NULL.offset_6| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t701~0.base_32|) 0) (= v_~y$r_buff0_thd1~0_46 0) (= 0 v_~y$r_buff0_thd4~0_132) (= 0 v_~__unbuffered_p3_EAX~0_43) (= v_~main$tmp_guard0~0_27 0) (= 0 v_~y$r_buff1_thd4~0_217) (= v_~main$tmp_guard1~0_34 0) (= v_~y$read_delayed~0_6 0) (= |v_#valid_83| (store .cse0 |v_ULTIMATE.start_main_~#t701~0.base_32| 1)) (= 0 v_~__unbuffered_p1_EAX~0_52) (= 0 v_~y$w_buff0~0_506) (= v_~z~0_169 0) (= 0 v_~weak$$choice0~0_18) (= v_~y$w_buff0_used~0_913 0) (= v_~weak$$choice2~0_212 0) (= (store |v_#length_32| |v_ULTIMATE.start_main_~#t701~0.base_32| 4) |v_#length_31|) (= 0 v_~y$r_buff0_thd3~0_241) (= 0 |v_#NULL.base_6|) (= 0 v_~y$r_buff1_thd3~0_210) (= v_~y~0_184 0) (= 0 v_~y$flush_delayed~0_45) (= v_~y$mem_tmp~0_20 0) (= |v_ULTIMATE.start_main_~#t701~0.offset_23| 0) (= v_~y$w_buff1~0_341 0) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t701~0.base_32| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t701~0.base_32|) |v_ULTIMATE.start_main_~#t701~0.offset_23| 0)) |v_#memory_int_25|) (= v_~y$r_buff0_thd0~0_136 0) (= v_~x~0_40 0) (= v_~y$r_buff1_thd1~0_134 0) (= v_~a~0_41 0) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t701~0.base_32|) (= 0 v_~__unbuffered_p3_EBX~0_43))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_85|, #memory_int=|v_#memory_int_26|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_~#t702~0.base=|v_ULTIMATE.start_main_~#t702~0.base_34|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_77|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~a~0=v_~a~0_41, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_56, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_210, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_52, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_46, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_43, #length=|v_#length_31|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_27|, ULTIMATE.start_main_~#t701~0.base=|v_ULTIMATE.start_main_~#t701~0.base_32|, ULTIMATE.start_main_~#t701~0.offset=|v_ULTIMATE.start_main_~#t701~0.offset_23|, ~weak$$choice0~0=v_~weak$$choice0~0_18, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_217, ~y$w_buff1~0=v_~y$w_buff1~0_341, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_398, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_191, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_221, ~x~0=v_~x~0_40, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_913, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_45|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_77|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_134, ~y$w_buff0~0=v_~y$w_buff0~0_506, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_241, ULTIMATE.start_main_~#t704~0.base=|v_ULTIMATE.start_main_~#t704~0.base_19|, ~y~0=v_~y~0_184, ULTIMATE.start_main_~#t702~0.offset=|v_ULTIMATE.start_main_~#t702~0.offset_24|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_27, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_43, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t703~0.offset=|v_ULTIMATE.start_main_~#t703~0.offset_16|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_382, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_132, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_136, #valid=|v_#valid_83|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_~#t704~0.offset=|v_ULTIMATE.start_main_~#t704~0.offset_16|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_10|, ~z~0=v_~z~0_169, ~weak$$choice2~0=v_~weak$$choice2~0_212, ULTIMATE.start_main_~#t703~0.base=|v_ULTIMATE.start_main_~#t703~0.base_26|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_631} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t702~0.base, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t701~0.base, ULTIMATE.start_main_~#t701~0.offset, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t704~0.base, ~y~0, ULTIMATE.start_main_~#t702~0.offset, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ULTIMATE.start_main_~#t703~0.offset, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_~#t704~0.offset, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t703~0.base, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:09:17,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L843-1-->L845: Formula: (and (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t702~0.base_13| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t702~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t702~0.base_13|) |v_ULTIMATE.start_main_~#t702~0.offset_11| 1)) |v_#memory_int_17|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t702~0.base_13| 1)) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t702~0.base_13|)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t702~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t702~0.base_13|)) (= |v_ULTIMATE.start_main_~#t702~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t702~0.base=|v_ULTIMATE.start_main_~#t702~0.base_13|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t702~0.offset=|v_ULTIMATE.start_main_~#t702~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t702~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t702~0.offset] because there is no mapped edge [2019-12-07 18:09:17,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L845-1-->L847: Formula: (and (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t703~0.base_11|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t703~0.base_11|)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t703~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t703~0.offset_9|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t703~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t703~0.base_11|) |v_ULTIMATE.start_main_~#t703~0.offset_9| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t703~0.base_11|) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t703~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t703~0.base=|v_ULTIMATE.start_main_~#t703~0.base_11|, ULTIMATE.start_main_~#t703~0.offset=|v_ULTIMATE.start_main_~#t703~0.offset_9|} AuxVars[] AssignedVars[#valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t703~0.base, ULTIMATE.start_main_~#t703~0.offset] because there is no mapped edge [2019-12-07 18:09:17,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L4-->L797: Formula: (and (= v_~y$r_buff0_thd3~0_37 v_~y$r_buff1_thd3~0_33) (= v_~y$r_buff0_thd1~0_10 v_~y$r_buff1_thd1~0_10) (= v_~y$r_buff0_thd3~0_36 1) (= v_~y$r_buff0_thd4~0_29 v_~y$r_buff1_thd4~0_26) (= v_~y$r_buff0_thd2~0_91 v_~y$r_buff1_thd2~0_54) (= v_~y$r_buff0_thd0~0_35 v_~y$r_buff1_thd0~0_25) (= v_~z~0_14 1) (not (= v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40 0))) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_29, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_37, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_35, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_91, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_54, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_29, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_10, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_26, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_33, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_36, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_35, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_91, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40, ~z~0=v_~z~0_14, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_25} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 18:09:17,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L847-1-->L849: Formula: (and (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t704~0.base_9|)) (not (= 0 |v_ULTIMATE.start_main_~#t704~0.base_9|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t704~0.base_9| 4) |v_#length_17|) (= 0 |v_ULTIMATE.start_main_~#t704~0.offset_8|) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t704~0.base_9| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t704~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t704~0.base_9|) |v_ULTIMATE.start_main_~#t704~0.offset_8| 3)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t704~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_12|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ULTIMATE.start_main_~#t704~0.base=|v_ULTIMATE.start_main_~#t704~0.base_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t704~0.offset=|v_ULTIMATE.start_main_~#t704~0.offset_8|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t704~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t704~0.offset, #length] because there is no mapped edge [2019-12-07 18:09:17,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_27 v_~__unbuffered_p0_EAX~0_27) (= v_~a~0_26 1) (= v_~__unbuffered_cnt~0_118 (+ v_~__unbuffered_cnt~0_119 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_5|) (= v_P0Thread1of1ForFork1_~arg.offset_17 |v_P0Thread1of1ForFork1_#in~arg.offset_19|) (= 0 |v_P0Thread1of1ForFork1_#res.base_5|) (= |v_P0Thread1of1ForFork1_#in~arg.base_19| v_P0Thread1of1ForFork1_~arg.base_17)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_119, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|, ~x~0=v_~x~0_27} OutVars{~a~0=v_~a~0_26, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_27, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_5|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_5|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_118, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|, ~x~0=v_~x~0_27, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_17} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 18:09:17,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L762-->L762-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-683519416 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_In-683519416| |P1Thread1of1ForFork2_#t~ite11_Out-683519416|) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite12_Out-683519416| ~y$w_buff1~0_In-683519416)) (and .cse0 (= |P1Thread1of1ForFork2_#t~ite11_Out-683519416| |P1Thread1of1ForFork2_#t~ite12_Out-683519416|) (= |P1Thread1of1ForFork2_#t~ite11_Out-683519416| ~y$w_buff1~0_In-683519416) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-683519416 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-683519416 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-683519416 256)) (and .cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-683519416 256)))))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-683519416, ~y$w_buff1~0=~y$w_buff1~0_In-683519416, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-683519416, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-683519416, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_In-683519416|, ~weak$$choice2~0=~weak$$choice2~0_In-683519416, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-683519416} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-683519416, ~y$w_buff1~0=~y$w_buff1~0_In-683519416, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-683519416, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-683519416, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-683519416|, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-683519416|, ~weak$$choice2~0=~weak$$choice2~0_In-683519416, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-683519416} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12, P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:09:17,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L763-->L763-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1934270710 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-1934270710 256) 0))) (or (and .cse0 (= (mod ~y$r_buff1_thd2~0_In-1934270710 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-1934270710 256)) (and .cse0 (= (mod ~y$w_buff1_used~0_In-1934270710 256) 0)))) (= |P1Thread1of1ForFork2_#t~ite15_Out-1934270710| |P1Thread1of1ForFork2_#t~ite14_Out-1934270710|) (= ~y$w_buff0_used~0_In-1934270710 |P1Thread1of1ForFork2_#t~ite14_Out-1934270710|) .cse1) (and (= ~y$w_buff0_used~0_In-1934270710 |P1Thread1of1ForFork2_#t~ite15_Out-1934270710|) (= |P1Thread1of1ForFork2_#t~ite14_In-1934270710| |P1Thread1of1ForFork2_#t~ite14_Out-1934270710|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1934270710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1934270710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1934270710, ~weak$$choice2~0=~weak$$choice2~0_In-1934270710, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In-1934270710|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1934270710} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1934270710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1934270710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1934270710, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1934270710|, ~weak$$choice2~0=~weak$$choice2~0_In-1934270710, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out-1934270710|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1934270710} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 18:09:17,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L764-->L764-8: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In72198567 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In72198567 256) 0)) (.cse5 (= |P1Thread1of1ForFork2_#t~ite18_Out72198567| |P1Thread1of1ForFork2_#t~ite17_Out72198567|)) (.cse4 (= 0 (mod ~weak$$choice2~0_In72198567 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In72198567 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In72198567 256)))) (or (and (or (and (or (and .cse0 .cse1) (and .cse1 .cse2) .cse3) .cse4 .cse5 (= ~y$w_buff1_used~0_In72198567 |P1Thread1of1ForFork2_#t~ite17_Out72198567|)) (and (= |P1Thread1of1ForFork2_#t~ite17_Out72198567| |P1Thread1of1ForFork2_#t~ite17_In72198567|) (not .cse4) (= ~y$w_buff1_used~0_In72198567 |P1Thread1of1ForFork2_#t~ite18_Out72198567|))) (= |P1Thread1of1ForFork2_#t~ite16_In72198567| |P1Thread1of1ForFork2_#t~ite16_Out72198567|)) (let ((.cse6 (not .cse1))) (and (= |P1Thread1of1ForFork2_#t~ite17_Out72198567| |P1Thread1of1ForFork2_#t~ite16_Out72198567|) (= |P1Thread1of1ForFork2_#t~ite16_Out72198567| 0) (or (not .cse2) .cse6) (not .cse3) .cse5 .cse4 (or (not .cse0) .cse6))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In72198567, P1Thread1of1ForFork2_#t~ite17=|P1Thread1of1ForFork2_#t~ite17_In72198567|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In72198567, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In72198567, ~weak$$choice2~0=~weak$$choice2~0_In72198567, P1Thread1of1ForFork2_#t~ite16=|P1Thread1of1ForFork2_#t~ite16_In72198567|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In72198567} OutVars{P1Thread1of1ForFork2_#t~ite18=|P1Thread1of1ForFork2_#t~ite18_Out72198567|, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In72198567, P1Thread1of1ForFork2_#t~ite17=|P1Thread1of1ForFork2_#t~ite17_Out72198567|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In72198567, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In72198567, ~weak$$choice2~0=~weak$$choice2~0_In72198567, P1Thread1of1ForFork2_#t~ite16=|P1Thread1of1ForFork2_#t~ite16_Out72198567|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In72198567} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite18, P1Thread1of1ForFork2_#t~ite17, P1Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 18:09:17,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L764-8-->L766: Formula: (and (= v_~y$r_buff0_thd2~0_378 v_~y$r_buff0_thd2~0_377) (= v_~y$w_buff1_used~0_614 |v_P1Thread1of1ForFork2_#t~ite18_31|) (not (= 0 (mod v_~weak$$choice2~0_200 256)))) InVars {P1Thread1of1ForFork2_#t~ite18=|v_P1Thread1of1ForFork2_#t~ite18_31|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_378, ~weak$$choice2~0=v_~weak$$choice2~0_200} OutVars{P1Thread1of1ForFork2_#t~ite18=|v_P1Thread1of1ForFork2_#t~ite18_30|, P1Thread1of1ForFork2_#t~ite17=|v_P1Thread1of1ForFork2_#t~ite17_28|, P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_23|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_377, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_35|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_13|, ~weak$$choice2~0=v_~weak$$choice2~0_200, P1Thread1of1ForFork2_#t~ite16=|v_P1Thread1of1ForFork2_#t~ite16_28|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_614} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite18, P1Thread1of1ForFork2_#t~ite17, P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21, P1Thread1of1ForFork2_#t~ite16, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:09:17,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L766-->L766-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-819230923 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite23_In-819230923| |P1Thread1of1ForFork2_#t~ite23_Out-819230923|) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite24_Out-819230923| ~y$r_buff1_thd2~0_In-819230923)) (and (= |P1Thread1of1ForFork2_#t~ite23_Out-819230923| ~y$r_buff1_thd2~0_In-819230923) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-819230923 256)))) (or (and .cse1 (= (mod ~y$r_buff1_thd2~0_In-819230923 256) 0)) (and .cse1 (= (mod ~y$w_buff1_used~0_In-819230923 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-819230923 256)))) (= |P1Thread1of1ForFork2_#t~ite23_Out-819230923| |P1Thread1of1ForFork2_#t~ite24_Out-819230923|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-819230923, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-819230923, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-819230923, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In-819230923|, ~weak$$choice2~0=~weak$$choice2~0_In-819230923, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-819230923} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-819230923, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-819230923, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-819230923, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out-819230923|, ~weak$$choice2~0=~weak$$choice2~0_In-819230923, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out-819230923|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-819230923} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 18:09:17,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L768-->L776: Formula: (and (= v_~y~0_60 v_~y$mem_tmp~0_11) (= 0 v_~y$flush_delayed~0_15) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (not (= 0 (mod v_~y$flush_delayed~0_16 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_15, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, ~y~0=v_~y~0_60, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_9|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 18:09:17,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L820-2-->L820-5: Formula: (let ((.cse1 (= |P3Thread1of1ForFork0_#t~ite33_Out-669256761| |P3Thread1of1ForFork0_#t~ite32_Out-669256761|)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-669256761 256))) (.cse0 (= (mod ~y$r_buff1_thd4~0_In-669256761 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= ~y$w_buff1~0_In-669256761 |P3Thread1of1ForFork0_#t~ite32_Out-669256761|)) (and (= ~y~0_In-669256761 |P3Thread1of1ForFork0_#t~ite32_Out-669256761|) .cse1 (or .cse2 .cse0)))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-669256761, ~y$w_buff1~0=~y$w_buff1~0_In-669256761, ~y~0=~y~0_In-669256761, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-669256761} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-669256761, ~y$w_buff1~0=~y$w_buff1~0_In-669256761, ~y~0=~y~0_In-669256761, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out-669256761|, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-669256761|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-669256761} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 18:09:17,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L821-->L821-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd4~0_In1350173701 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In1350173701 256) 0))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~ite34_Out1350173701| ~y$w_buff0_used~0_In1350173701)) (and (not .cse1) (= |P3Thread1of1ForFork0_#t~ite34_Out1350173701| 0) (not .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1350173701, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1350173701} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1350173701, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1350173701, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out1350173701|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 18:09:17,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L822-->L822-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd4~0_In463703612 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In463703612 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In463703612 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd4~0_In463703612 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork0_#t~ite35_Out463703612| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P3Thread1of1ForFork0_#t~ite35_Out463703612| ~y$w_buff1_used~0_In463703612)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In463703612, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In463703612, ~y$w_buff0_used~0=~y$w_buff0_used~0_In463703612, ~y$w_buff1_used~0=~y$w_buff1_used~0_In463703612} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In463703612, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In463703612, ~y$w_buff0_used~0=~y$w_buff0_used~0_In463703612, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out463703612|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In463703612} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 18:09:17,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L823-->L823-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd4~0_In1235775589 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1235775589 256)))) (or (and (= ~y$r_buff0_thd4~0_In1235775589 |P3Thread1of1ForFork0_#t~ite36_Out1235775589|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P3Thread1of1ForFork0_#t~ite36_Out1235775589|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1235775589, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1235775589} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1235775589, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1235775589, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out1235775589|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 18:09:17,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-->L824-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd4~0_In-77218814 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-77218814 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd4~0_In-77218814 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-77218814 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd4~0_In-77218814 |P3Thread1of1ForFork0_#t~ite37_Out-77218814|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P3Thread1of1ForFork0_#t~ite37_Out-77218814|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-77218814, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-77218814, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-77218814, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-77218814} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-77218814, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-77218814, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-77218814, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out-77218814|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-77218814} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 18:09:17,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L824-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_130 (+ v_~__unbuffered_cnt~0_131 1)) (= |v_P3Thread1of1ForFork0_#t~ite37_52| v_~y$r_buff1_thd4~0_148) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|)) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_52|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_131} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_148, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_51|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_130} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:09:17,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L798-->L798-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-1752670934 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1752670934 256) 0))) (or (and (= ~y$w_buff0_used~0_In-1752670934 |P2Thread1of1ForFork3_#t~ite28_Out-1752670934|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork3_#t~ite28_Out-1752670934|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1752670934, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1752670934} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1752670934, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1752670934, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out-1752670934|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 18:09:17,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L799-->L799-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd3~0_In1900101451 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1900101451 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1900101451 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1900101451 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork3_#t~ite29_Out1900101451|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork3_#t~ite29_Out1900101451| ~y$w_buff1_used~0_In1900101451)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1900101451, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1900101451, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1900101451, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1900101451} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1900101451, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1900101451, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1900101451, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out1900101451|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1900101451} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 18:09:17,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L800-->L801: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In190628104 256))) (.cse2 (= ~y$r_buff0_thd3~0_In190628104 ~y$r_buff0_thd3~0_Out190628104)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In190628104 256) 0))) (or (and (not .cse0) (not .cse1) (= ~y$r_buff0_thd3~0_Out190628104 0)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In190628104, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In190628104} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out190628104|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In190628104, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out190628104} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 18:09:17,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L801-->L801-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In1240525673 256))) (.cse3 (= (mod ~y$r_buff1_thd3~0_In1240525673 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1240525673 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1240525673 256)))) (or (and (= |P2Thread1of1ForFork3_#t~ite31_Out1240525673| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork3_#t~ite31_Out1240525673| ~y$r_buff1_thd3~0_In1240525673) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1240525673, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1240525673, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1240525673, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1240525673} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1240525673, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1240525673, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1240525673, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out1240525673|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1240525673} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 18:09:17,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L801-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0) (= |v_P2Thread1of1ForFork3_#t~ite31_46| v_~y$r_buff1_thd3~0_83) (= v_~__unbuffered_cnt~0_104 (+ v_~__unbuffered_cnt~0_105 1))) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_105} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_83, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_45|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_104, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:09:17,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L849-1-->L855: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:09:17,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L855-2-->L855-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1156587585 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-1156587585 256)))) (or (and (= ~y~0_In-1156587585 |ULTIMATE.start_main_#t~ite42_Out-1156587585|) (or .cse0 .cse1)) (and (= ~y$w_buff1~0_In-1156587585 |ULTIMATE.start_main_#t~ite42_Out-1156587585|) (not .cse0) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1156587585, ~y~0=~y~0_In-1156587585, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1156587585, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1156587585} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1156587585, ~y~0=~y~0_In-1156587585, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1156587585|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1156587585, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1156587585} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:09:17,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L855-4-->L856: Formula: (= v_~y~0_21 |v_ULTIMATE.start_main_#t~ite42_12|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_12|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_17|, ~y~0=v_~y~0_21, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:09:17,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L856-->L856-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1806691996 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1806691996 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite44_Out-1806691996|) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite44_Out-1806691996| ~y$w_buff0_used~0_In-1806691996) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1806691996, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1806691996} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1806691996, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1806691996, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1806691996|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:09:17,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L857-->L857-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1039654427 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1039654427 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1039654427 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1039654427 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite45_Out-1039654427|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$w_buff1_used~0_In-1039654427 |ULTIMATE.start_main_#t~ite45_Out-1039654427|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1039654427, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1039654427, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1039654427, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1039654427} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1039654427, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1039654427, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1039654427, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1039654427|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1039654427} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:09:17,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L858-->L858-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1795447732 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1795447732 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite46_Out-1795447732| 0) (not .cse0) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-1795447732 |ULTIMATE.start_main_#t~ite46_Out-1795447732|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1795447732, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1795447732} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1795447732, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1795447732, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1795447732|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:09:17,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [787] [787] L859-->L859-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In115171284 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In115171284 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In115171284 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In115171284 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite47_Out115171284|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd0~0_In115171284 |ULTIMATE.start_main_#t~ite47_Out115171284|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In115171284, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In115171284, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In115171284, ~y$w_buff1_used~0=~y$w_buff1_used~0_In115171284} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In115171284, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In115171284, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out115171284|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In115171284, ~y$w_buff1_used~0=~y$w_buff1_used~0_In115171284} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:09:17,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L859-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (ite (= (ite (not (and (= v_~z~0_155 2) (= 0 v_~__unbuffered_p0_EAX~0_46) (= 2 v_~__unbuffered_p3_EAX~0_33) (= 0 v_~__unbuffered_p1_EAX~0_39) (= 0 v_~__unbuffered_p3_EBX~0_33))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_24) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_~y$r_buff1_thd0~0_207 |v_ULTIMATE.start_main_#t~ite47_57|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_24 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_39, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_33, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_57|, ~z~0=v_~z~0_155, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_33} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_39, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_33, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_56|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ~z~0=v_~z~0_155, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_33, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_207, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:09:18,009 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_b11a2ce5-6646-4e8b-8be8-76e427ee5cbc/bin/uautomizer/witness.graphml [2019-12-07 18:09:18,009 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:09:18,010 INFO L168 Benchmark]: Toolchain (without parser) took 232570.29 ms. Allocated memory was 1.0 GB in the beginning and 9.9 GB in the end (delta: 8.9 GB). Free memory was 937.2 MB in the beginning and 4.9 GB in the end (delta: -4.0 GB). Peak memory consumption was 4.9 GB. Max. memory is 11.5 GB. [2019-12-07 18:09:18,010 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:09:18,010 INFO L168 Benchmark]: CACSL2BoogieTranslator took 410.46 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -127.4 MB). Peak memory consumption was 23.9 MB. Max. memory is 11.5 GB. [2019-12-07 18:09:18,011 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:09:18,011 INFO L168 Benchmark]: Boogie Preprocessor took 25.93 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:09:18,011 INFO L168 Benchmark]: RCFGBuilder took 447.11 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:09:18,011 INFO L168 Benchmark]: TraceAbstraction took 231580.67 ms. Allocated memory was 1.1 GB in the beginning and 9.9 GB in the end (delta: 8.8 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 4.8 GB. Max. memory is 11.5 GB. [2019-12-07 18:09:18,011 INFO L168 Benchmark]: Witness Printer took 63.11 ms. Allocated memory is still 9.9 GB. Free memory was 5.0 GB in the beginning and 4.9 GB in the end (delta: 42.2 MB). Peak memory consumption was 42.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:09:18,013 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 410.46 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -127.4 MB). Peak memory consumption was 23.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.93 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 447.11 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 231580.67 ms. Allocated memory was 1.1 GB in the beginning and 9.9 GB in the end (delta: 8.8 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 4.8 GB. Max. memory is 11.5 GB. * Witness Printer took 63.11 ms. Allocated memory is still 9.9 GB. Free memory was 5.0 GB in the beginning and 4.9 GB in the end (delta: 42.2 MB). Peak memory consumption was 42.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.6s, 181 ProgramPointsBefore, 87 ProgramPointsAfterwards, 209 TransitionsBefore, 92 TransitionsAfterwards, 18126 CoEnabledTransitionPairs, 7 FixpointIterations, 37 TrivialSequentialCompositions, 52 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 28 ChoiceCompositions, 7916 VarBasedMoverChecksPositive, 275 VarBasedMoverChecksNegative, 100 SemBasedMoverChecksPositive, 248 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 66604 CheckedPairsTotal, 123 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L843] FCALL, FORK 0 pthread_create(&t701, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L845] FCALL, FORK 0 pthread_create(&t702, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L847] FCALL, FORK 0 pthread_create(&t703, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L781] 3 y$w_buff1 = y$w_buff0 [L782] 3 y$w_buff0 = 1 [L783] 3 y$w_buff1_used = y$w_buff0_used [L784] 3 y$w_buff0_used = (_Bool)1 [L849] FCALL, FORK 0 pthread_create(&t704, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] 4 z = 2 [L814] 4 __unbuffered_p3_EAX = z [L817] 4 __unbuffered_p3_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L820] EXPR 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L753] 2 x = 1 [L756] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L757] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L758] 2 y$flush_delayed = weak$$choice2 [L759] 2 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L760] EXPR 2 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L760] 2 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L761] EXPR 2 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L761] 2 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L762] 2 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L763] 2 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L766] 2 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L767] 2 __unbuffered_p1_EAX = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L820] 4 y = y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) [L821] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L822] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L823] 4 y$r_buff0_thd4 = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$r_buff0_thd4 [L797] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L797] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L798] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L799] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L855] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L856] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L857] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L858] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 231.4s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 52.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3844 SDtfs, 5516 SDslu, 7791 SDs, 0 SdLazy, 6092 SolverSat, 288 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 197 GetRequests, 37 SyntacticMatches, 13 SemanticMatches, 147 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 412 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=404822occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 147.3s AutomataMinimizationTime, 25 MinimizatonAttempts, 564593 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 893 NumberOfCodeBlocks, 893 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 810 ConstructedInterpolants, 0 QuantifiedInterpolants, 242798 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...