./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix028_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix028_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 18224c4dfa3fe55f214766516c064daa7752b2be ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:04:15,455 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:04:15,456 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:04:15,464 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:04:15,464 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:04:15,465 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:04:15,466 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:04:15,467 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:04:15,468 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:04:15,469 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:04:15,470 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:04:15,470 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:04:15,471 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:04:15,471 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:04:15,472 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:04:15,473 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:04:15,473 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:04:15,474 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:04:15,475 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:04:15,477 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:04:15,478 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:04:15,478 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:04:15,479 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:04:15,479 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:04:15,481 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:04:15,481 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:04:15,482 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:04:15,482 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:04:15,482 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:04:15,483 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:04:15,483 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:04:15,483 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:04:15,484 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:04:15,484 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:04:15,485 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:04:15,485 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:04:15,485 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:04:15,485 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:04:15,486 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:04:15,486 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:04:15,486 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:04:15,487 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:04:15,496 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:04:15,496 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:04:15,497 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:04:15,497 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:04:15,497 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:04:15,497 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:04:15,497 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:04:15,497 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:04:15,497 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:04:15,498 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:04:15,498 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:04:15,498 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:04:15,498 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:04:15,498 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:04:15,498 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:04:15,498 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:04:15,498 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:04:15,498 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:04:15,498 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:04:15,499 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:04:15,499 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:04:15,499 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:04:15,499 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:04:15,499 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:04:15,499 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:04:15,499 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:04:15,499 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:04:15,499 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:04:15,500 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:04:15,500 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 18224c4dfa3fe55f214766516c064daa7752b2be [2019-12-07 14:04:15,601 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:04:15,612 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:04:15,615 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:04:15,616 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:04:15,616 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:04:15,617 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix028_pso.opt.i [2019-12-07 14:04:15,665 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/data/0f15c92b2/9a7510a34b054ae9bbb26c3f549aa2cc/FLAG98d7564b0 [2019-12-07 14:04:16,138 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:04:16,139 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/sv-benchmarks/c/pthread-wmm/mix028_pso.opt.i [2019-12-07 14:04:16,149 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/data/0f15c92b2/9a7510a34b054ae9bbb26c3f549aa2cc/FLAG98d7564b0 [2019-12-07 14:04:16,443 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/data/0f15c92b2/9a7510a34b054ae9bbb26c3f549aa2cc [2019-12-07 14:04:16,447 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:04:16,449 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:04:16,451 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:04:16,451 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:04:16,457 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:04:16,458 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:04:16" (1/1) ... [2019-12-07 14:04:16,461 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@46581b5e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16, skipping insertion in model container [2019-12-07 14:04:16,462 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:04:16" (1/1) ... [2019-12-07 14:04:16,470 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:04:16,509 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:04:16,753 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:04:16,761 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:04:16,802 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:04:16,846 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:04:16,846 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16 WrapperNode [2019-12-07 14:04:16,846 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:04:16,846 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:04:16,847 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:04:16,847 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:04:16,852 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16" (1/1) ... [2019-12-07 14:04:16,865 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16" (1/1) ... [2019-12-07 14:04:16,885 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:04:16,886 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:04:16,886 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:04:16,886 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:04:16,892 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16" (1/1) ... [2019-12-07 14:04:16,892 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16" (1/1) ... [2019-12-07 14:04:16,896 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16" (1/1) ... [2019-12-07 14:04:16,896 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16" (1/1) ... [2019-12-07 14:04:16,903 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16" (1/1) ... [2019-12-07 14:04:16,906 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16" (1/1) ... [2019-12-07 14:04:16,909 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16" (1/1) ... [2019-12-07 14:04:16,912 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:04:16,912 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:04:16,912 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:04:16,912 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:04:16,913 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:04:16,952 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:04:16,952 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:04:16,952 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:04:16,952 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:04:16,953 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:04:16,953 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:04:16,953 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:04:16,953 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:04:16,953 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:04:16,953 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:04:16,953 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:04:16,953 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:04:16,953 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:04:16,954 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:04:17,312 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:04:17,313 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:04:17,313 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:04:17 BoogieIcfgContainer [2019-12-07 14:04:17,314 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:04:17,314 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:04:17,314 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:04:17,316 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:04:17,316 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:04:16" (1/3) ... [2019-12-07 14:04:17,317 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4b9ad623 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:04:17, skipping insertion in model container [2019-12-07 14:04:17,317 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:16" (2/3) ... [2019-12-07 14:04:17,317 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4b9ad623 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:04:17, skipping insertion in model container [2019-12-07 14:04:17,317 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:04:17" (3/3) ... [2019-12-07 14:04:17,318 INFO L109 eAbstractionObserver]: Analyzing ICFG mix028_pso.opt.i [2019-12-07 14:04:17,325 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:04:17,325 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:04:17,330 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:04:17,330 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:04:17,353 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,354 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,354 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,354 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,354 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,354 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,354 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,354 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,355 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,355 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,355 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,355 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,355 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,355 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,355 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,355 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,356 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,356 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,356 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,356 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,356 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,356 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,356 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,356 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,356 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,357 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,357 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,357 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,357 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,357 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,358 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,358 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,358 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,358 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,358 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,358 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,358 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,358 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,359 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,359 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,359 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,359 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,359 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,359 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,359 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,359 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,360 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,360 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,360 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,360 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,360 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,360 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,360 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,360 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,360 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,361 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,361 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,361 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,361 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,361 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,361 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,361 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,361 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,361 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,362 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,362 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,362 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,363 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,364 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,365 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:17,376 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:04:17,388 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:04:17,389 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:04:17,389 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:04:17,389 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:04:17,389 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:04:17,389 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:04:17,389 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:04:17,389 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:04:17,400 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 14:04:17,401 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 14:04:17,453 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 14:04:17,454 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:04:17,463 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 577 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:04:17,478 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 14:04:17,508 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 14:04:17,508 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:04:17,513 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 577 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:04:17,527 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 14:04:17,527 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:04:20,292 WARN L192 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 14:04:20,383 INFO L206 etLargeBlockEncoding]: Checked pairs total: 79058 [2019-12-07 14:04:20,383 INFO L214 etLargeBlockEncoding]: Total number of compositions: 111 [2019-12-07 14:04:20,386 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 14:04:34,500 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115078 states. [2019-12-07 14:04:34,502 INFO L276 IsEmpty]: Start isEmpty. Operand 115078 states. [2019-12-07 14:04:34,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 14:04:34,506 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:34,506 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 14:04:34,506 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:34,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:34,510 INFO L82 PathProgramCache]: Analyzing trace with hash 811621075, now seen corresponding path program 1 times [2019-12-07 14:04:34,515 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:34,516 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267233634] [2019-12-07 14:04:34,516 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:34,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:34,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:34,654 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [267233634] [2019-12-07 14:04:34,654 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:34,655 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:04:34,655 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [190649672] [2019-12-07 14:04:34,659 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:04:34,659 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:34,668 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:04:34,668 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:34,669 INFO L87 Difference]: Start difference. First operand 115078 states. Second operand 3 states. [2019-12-07 14:04:35,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:35,480 INFO L93 Difference]: Finished difference Result 114778 states and 493920 transitions. [2019-12-07 14:04:35,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:04:35,482 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 14:04:35,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:36,006 INFO L225 Difference]: With dead ends: 114778 [2019-12-07 14:04:36,007 INFO L226 Difference]: Without dead ends: 112412 [2019-12-07 14:04:36,008 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:39,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112412 states. [2019-12-07 14:04:41,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112412 to 112412. [2019-12-07 14:04:41,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112412 states. [2019-12-07 14:04:43,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112412 states to 112412 states and 484274 transitions. [2019-12-07 14:04:43,506 INFO L78 Accepts]: Start accepts. Automaton has 112412 states and 484274 transitions. Word has length 5 [2019-12-07 14:04:43,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:43,507 INFO L462 AbstractCegarLoop]: Abstraction has 112412 states and 484274 transitions. [2019-12-07 14:04:43,507 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:04:43,507 INFO L276 IsEmpty]: Start isEmpty. Operand 112412 states and 484274 transitions. [2019-12-07 14:04:43,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 14:04:43,509 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:43,509 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:43,509 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:43,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:43,509 INFO L82 PathProgramCache]: Analyzing trace with hash -287251583, now seen corresponding path program 1 times [2019-12-07 14:04:43,509 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:43,509 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [643517933] [2019-12-07 14:04:43,510 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:43,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:43,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:43,568 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [643517933] [2019-12-07 14:04:43,568 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:43,568 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:04:43,568 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [434800664] [2019-12-07 14:04:43,569 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:04:43,569 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:43,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:04:43,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:04:43,569 INFO L87 Difference]: Start difference. First operand 112412 states and 484274 transitions. Second operand 4 states. [2019-12-07 14:04:44,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:44,496 INFO L93 Difference]: Finished difference Result 180702 states and 747767 transitions. [2019-12-07 14:04:44,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:04:44,497 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 14:04:44,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:44,955 INFO L225 Difference]: With dead ends: 180702 [2019-12-07 14:04:44,956 INFO L226 Difference]: Without dead ends: 180653 [2019-12-07 14:04:44,956 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:04:50,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180653 states. [2019-12-07 14:04:52,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180653 to 165577. [2019-12-07 14:04:52,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165577 states. [2019-12-07 14:04:53,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165577 states to 165577 states and 693075 transitions. [2019-12-07 14:04:53,076 INFO L78 Accepts]: Start accepts. Automaton has 165577 states and 693075 transitions. Word has length 11 [2019-12-07 14:04:53,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:53,076 INFO L462 AbstractCegarLoop]: Abstraction has 165577 states and 693075 transitions. [2019-12-07 14:04:53,076 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:04:53,077 INFO L276 IsEmpty]: Start isEmpty. Operand 165577 states and 693075 transitions. [2019-12-07 14:04:53,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:04:53,081 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:53,081 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:53,081 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:53,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:53,081 INFO L82 PathProgramCache]: Analyzing trace with hash 228163746, now seen corresponding path program 1 times [2019-12-07 14:04:53,081 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:53,082 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811123889] [2019-12-07 14:04:53,082 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:53,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:53,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:53,133 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811123889] [2019-12-07 14:04:53,134 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:53,134 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:04:53,134 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1988272544] [2019-12-07 14:04:53,134 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:04:53,134 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:53,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:04:53,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:04:53,135 INFO L87 Difference]: Start difference. First operand 165577 states and 693075 transitions. Second operand 4 states. [2019-12-07 14:04:54,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:54,276 INFO L93 Difference]: Finished difference Result 235681 states and 964563 transitions. [2019-12-07 14:04:54,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:04:54,277 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:04:54,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:54,909 INFO L225 Difference]: With dead ends: 235681 [2019-12-07 14:04:54,909 INFO L226 Difference]: Without dead ends: 235618 [2019-12-07 14:04:54,909 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:03,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235618 states. [2019-12-07 14:05:05,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235618 to 199613. [2019-12-07 14:05:05,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199613 states. [2019-12-07 14:05:06,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199613 states to 199613 states and 830031 transitions. [2019-12-07 14:05:06,627 INFO L78 Accepts]: Start accepts. Automaton has 199613 states and 830031 transitions. Word has length 13 [2019-12-07 14:05:06,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:06,628 INFO L462 AbstractCegarLoop]: Abstraction has 199613 states and 830031 transitions. [2019-12-07 14:05:06,628 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:05:06,629 INFO L276 IsEmpty]: Start isEmpty. Operand 199613 states and 830031 transitions. [2019-12-07 14:05:06,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:05:06,631 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:06,631 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:06,631 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:06,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:06,632 INFO L82 PathProgramCache]: Analyzing trace with hash 986322522, now seen corresponding path program 1 times [2019-12-07 14:05:06,632 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:06,632 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054690449] [2019-12-07 14:05:06,632 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:06,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:06,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:06,672 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054690449] [2019-12-07 14:05:06,672 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:06,673 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:05:06,673 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2053317001] [2019-12-07 14:05:06,673 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:05:06,673 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:06,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:05:06,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:05:06,674 INFO L87 Difference]: Start difference. First operand 199613 states and 830031 transitions. Second operand 4 states. [2019-12-07 14:05:07,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:07,822 INFO L93 Difference]: Finished difference Result 248914 states and 1025031 transitions. [2019-12-07 14:05:07,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:05:07,823 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:05:07,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:08,445 INFO L225 Difference]: With dead ends: 248914 [2019-12-07 14:05:08,445 INFO L226 Difference]: Without dead ends: 248914 [2019-12-07 14:05:08,445 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:14,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248914 states. [2019-12-07 14:05:20,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248914 to 210888. [2019-12-07 14:05:20,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210888 states. [2019-12-07 14:05:20,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210888 states to 210888 states and 876967 transitions. [2019-12-07 14:05:20,880 INFO L78 Accepts]: Start accepts. Automaton has 210888 states and 876967 transitions. Word has length 13 [2019-12-07 14:05:20,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:20,880 INFO L462 AbstractCegarLoop]: Abstraction has 210888 states and 876967 transitions. [2019-12-07 14:05:20,880 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:05:20,880 INFO L276 IsEmpty]: Start isEmpty. Operand 210888 states and 876967 transitions. [2019-12-07 14:05:20,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:05:20,895 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:20,895 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:20,895 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:20,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:20,895 INFO L82 PathProgramCache]: Analyzing trace with hash -462367392, now seen corresponding path program 1 times [2019-12-07 14:05:20,895 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:20,895 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578823582] [2019-12-07 14:05:20,895 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:20,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:20,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:20,938 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1578823582] [2019-12-07 14:05:20,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:20,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:20,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1780475980] [2019-12-07 14:05:20,938 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:20,938 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:20,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:20,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:20,939 INFO L87 Difference]: Start difference. First operand 210888 states and 876967 transitions. Second operand 5 states. [2019-12-07 14:05:22,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:22,892 INFO L93 Difference]: Finished difference Result 307547 states and 1250410 transitions. [2019-12-07 14:05:22,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:05:22,893 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:05:22,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:23,696 INFO L225 Difference]: With dead ends: 307547 [2019-12-07 14:05:23,696 INFO L226 Difference]: Without dead ends: 307407 [2019-12-07 14:05:23,696 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:05:30,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307407 states. [2019-12-07 14:05:36,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307407 to 231468. [2019-12-07 14:05:36,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231468 states. [2019-12-07 14:05:37,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231468 states to 231468 states and 958023 transitions. [2019-12-07 14:05:37,509 INFO L78 Accepts]: Start accepts. Automaton has 231468 states and 958023 transitions. Word has length 19 [2019-12-07 14:05:37,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:37,509 INFO L462 AbstractCegarLoop]: Abstraction has 231468 states and 958023 transitions. [2019-12-07 14:05:37,509 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:37,509 INFO L276 IsEmpty]: Start isEmpty. Operand 231468 states and 958023 transitions. [2019-12-07 14:05:37,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:05:37,522 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:37,523 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:37,523 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:37,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:37,523 INFO L82 PathProgramCache]: Analyzing trace with hash 1565841874, now seen corresponding path program 1 times [2019-12-07 14:05:37,523 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:37,523 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [705838292] [2019-12-07 14:05:37,523 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:37,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:37,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:37,555 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [705838292] [2019-12-07 14:05:37,555 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:37,555 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:05:37,556 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [847844517] [2019-12-07 14:05:37,556 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:37,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:37,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:37,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:37,556 INFO L87 Difference]: Start difference. First operand 231468 states and 958023 transitions. Second operand 3 states. [2019-12-07 14:05:37,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:37,668 INFO L93 Difference]: Finished difference Result 39837 states and 129810 transitions. [2019-12-07 14:05:37,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:37,669 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 14:05:37,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:37,719 INFO L225 Difference]: With dead ends: 39837 [2019-12-07 14:05:37,719 INFO L226 Difference]: Without dead ends: 39837 [2019-12-07 14:05:37,720 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:37,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39837 states. [2019-12-07 14:05:38,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39837 to 39837. [2019-12-07 14:05:38,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39837 states. [2019-12-07 14:05:38,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39837 states to 39837 states and 129810 transitions. [2019-12-07 14:05:38,352 INFO L78 Accepts]: Start accepts. Automaton has 39837 states and 129810 transitions. Word has length 19 [2019-12-07 14:05:38,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:38,353 INFO L462 AbstractCegarLoop]: Abstraction has 39837 states and 129810 transitions. [2019-12-07 14:05:38,353 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:38,353 INFO L276 IsEmpty]: Start isEmpty. Operand 39837 states and 129810 transitions. [2019-12-07 14:05:38,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 14:05:38,358 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:38,358 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:38,358 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:38,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:38,359 INFO L82 PathProgramCache]: Analyzing trace with hash 781437825, now seen corresponding path program 1 times [2019-12-07 14:05:38,359 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:38,359 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1297370132] [2019-12-07 14:05:38,359 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:38,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:38,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:38,411 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1297370132] [2019-12-07 14:05:38,411 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:38,411 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:38,412 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324664147] [2019-12-07 14:05:38,412 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:38,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:38,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:38,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:38,412 INFO L87 Difference]: Start difference. First operand 39837 states and 129810 transitions. Second operand 5 states. [2019-12-07 14:05:39,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:39,158 INFO L93 Difference]: Finished difference Result 54652 states and 174469 transitions. [2019-12-07 14:05:39,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:05:39,158 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 14:05:39,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:39,230 INFO L225 Difference]: With dead ends: 54652 [2019-12-07 14:05:39,230 INFO L226 Difference]: Without dead ends: 54652 [2019-12-07 14:05:39,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:05:39,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54652 states. [2019-12-07 14:05:39,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54652 to 44014. [2019-12-07 14:05:39,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44014 states. [2019-12-07 14:05:39,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44014 states to 44014 states and 142491 transitions. [2019-12-07 14:05:39,971 INFO L78 Accepts]: Start accepts. Automaton has 44014 states and 142491 transitions. Word has length 25 [2019-12-07 14:05:39,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:39,971 INFO L462 AbstractCegarLoop]: Abstraction has 44014 states and 142491 transitions. [2019-12-07 14:05:39,972 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:39,972 INFO L276 IsEmpty]: Start isEmpty. Operand 44014 states and 142491 transitions. [2019-12-07 14:05:39,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 14:05:39,978 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:39,978 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:39,978 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:39,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:39,978 INFO L82 PathProgramCache]: Analyzing trace with hash -1450263493, now seen corresponding path program 1 times [2019-12-07 14:05:39,979 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:39,979 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035074382] [2019-12-07 14:05:39,979 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:39,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:40,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:40,023 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035074382] [2019-12-07 14:05:40,023 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:40,023 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:40,023 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [69582210] [2019-12-07 14:05:40,023 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:40,023 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:40,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:40,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:40,024 INFO L87 Difference]: Start difference. First operand 44014 states and 142491 transitions. Second operand 5 states. [2019-12-07 14:05:40,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:40,396 INFO L93 Difference]: Finished difference Result 58688 states and 186890 transitions. [2019-12-07 14:05:40,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:05:40,397 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 14:05:40,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:40,476 INFO L225 Difference]: With dead ends: 58688 [2019-12-07 14:05:40,476 INFO L226 Difference]: Without dead ends: 58688 [2019-12-07 14:05:40,476 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:05:40,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58688 states. [2019-12-07 14:05:41,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58688 to 46202. [2019-12-07 14:05:41,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46202 states. [2019-12-07 14:05:41,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46202 states to 46202 states and 149360 transitions. [2019-12-07 14:05:41,289 INFO L78 Accepts]: Start accepts. Automaton has 46202 states and 149360 transitions. Word has length 25 [2019-12-07 14:05:41,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:41,290 INFO L462 AbstractCegarLoop]: Abstraction has 46202 states and 149360 transitions. [2019-12-07 14:05:41,290 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:41,290 INFO L276 IsEmpty]: Start isEmpty. Operand 46202 states and 149360 transitions. [2019-12-07 14:05:41,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 14:05:41,303 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:41,303 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:41,303 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:41,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:41,303 INFO L82 PathProgramCache]: Analyzing trace with hash 2117362888, now seen corresponding path program 1 times [2019-12-07 14:05:41,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:41,303 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1428981196] [2019-12-07 14:05:41,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:41,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:41,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:41,412 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1428981196] [2019-12-07 14:05:41,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:41,412 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:05:41,412 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1733346243] [2019-12-07 14:05:41,412 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 14:05:41,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:41,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 14:05:41,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 14:05:41,413 INFO L87 Difference]: Start difference. First operand 46202 states and 149360 transitions. Second operand 8 states. [2019-12-07 14:05:42,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:42,302 INFO L93 Difference]: Finished difference Result 57470 states and 183406 transitions. [2019-12-07 14:05:42,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 14:05:42,302 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 31 [2019-12-07 14:05:42,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:42,385 INFO L225 Difference]: With dead ends: 57470 [2019-12-07 14:05:42,385 INFO L226 Difference]: Without dead ends: 57457 [2019-12-07 14:05:42,386 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=102, Invalid=318, Unknown=0, NotChecked=0, Total=420 [2019-12-07 14:05:43,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57457 states. [2019-12-07 14:05:43,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57457 to 42827. [2019-12-07 14:05:43,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42827 states. [2019-12-07 14:05:43,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42827 states to 42827 states and 139055 transitions. [2019-12-07 14:05:43,501 INFO L78 Accepts]: Start accepts. Automaton has 42827 states and 139055 transitions. Word has length 31 [2019-12-07 14:05:43,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:43,501 INFO L462 AbstractCegarLoop]: Abstraction has 42827 states and 139055 transitions. [2019-12-07 14:05:43,501 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 14:05:43,501 INFO L276 IsEmpty]: Start isEmpty. Operand 42827 states and 139055 transitions. [2019-12-07 14:05:43,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 14:05:43,524 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:43,525 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:43,525 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:43,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:43,525 INFO L82 PathProgramCache]: Analyzing trace with hash -955083091, now seen corresponding path program 1 times [2019-12-07 14:05:43,525 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:43,525 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1344501844] [2019-12-07 14:05:43,525 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:43,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:43,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:43,558 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1344501844] [2019-12-07 14:05:43,558 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:43,558 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:43,559 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879223596] [2019-12-07 14:05:43,559 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:43,559 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:43,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:43,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:43,559 INFO L87 Difference]: Start difference. First operand 42827 states and 139055 transitions. Second operand 3 states. [2019-12-07 14:05:43,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:43,720 INFO L93 Difference]: Finished difference Result 50309 states and 161585 transitions. [2019-12-07 14:05:43,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:43,721 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 14:05:43,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:43,795 INFO L225 Difference]: With dead ends: 50309 [2019-12-07 14:05:43,795 INFO L226 Difference]: Without dead ends: 50309 [2019-12-07 14:05:43,796 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:44,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50309 states. [2019-12-07 14:05:44,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50309 to 44700. [2019-12-07 14:05:44,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44700 states. [2019-12-07 14:05:44,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44700 states to 44700 states and 144997 transitions. [2019-12-07 14:05:44,542 INFO L78 Accepts]: Start accepts. Automaton has 44700 states and 144997 transitions. Word has length 39 [2019-12-07 14:05:44,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:44,542 INFO L462 AbstractCegarLoop]: Abstraction has 44700 states and 144997 transitions. [2019-12-07 14:05:44,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:44,542 INFO L276 IsEmpty]: Start isEmpty. Operand 44700 states and 144997 transitions. [2019-12-07 14:05:44,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 14:05:44,564 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:44,564 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:44,565 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:44,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:44,565 INFO L82 PathProgramCache]: Analyzing trace with hash -955256505, now seen corresponding path program 1 times [2019-12-07 14:05:44,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:44,565 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484923719] [2019-12-07 14:05:44,565 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:44,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:44,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:44,602 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484923719] [2019-12-07 14:05:44,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:44,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:44,602 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2008492056] [2019-12-07 14:05:44,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:05:44,603 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:44,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:05:44,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:05:44,603 INFO L87 Difference]: Start difference. First operand 44700 states and 144997 transitions. Second operand 4 states. [2019-12-07 14:05:44,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:44,630 INFO L93 Difference]: Finished difference Result 8211 states and 22128 transitions. [2019-12-07 14:05:44,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:05:44,630 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2019-12-07 14:05:44,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:44,637 INFO L225 Difference]: With dead ends: 8211 [2019-12-07 14:05:44,637 INFO L226 Difference]: Without dead ends: 8211 [2019-12-07 14:05:44,637 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:05:44,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8211 states. [2019-12-07 14:05:44,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8211 to 8071. [2019-12-07 14:05:44,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8071 states. [2019-12-07 14:05:44,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8071 states to 8071 states and 21728 transitions. [2019-12-07 14:05:44,728 INFO L78 Accepts]: Start accepts. Automaton has 8071 states and 21728 transitions. Word has length 39 [2019-12-07 14:05:44,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:44,728 INFO L462 AbstractCegarLoop]: Abstraction has 8071 states and 21728 transitions. [2019-12-07 14:05:44,729 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:05:44,729 INFO L276 IsEmpty]: Start isEmpty. Operand 8071 states and 21728 transitions. [2019-12-07 14:05:44,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 14:05:44,734 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:44,734 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:44,734 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:44,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:44,734 INFO L82 PathProgramCache]: Analyzing trace with hash 296426846, now seen corresponding path program 1 times [2019-12-07 14:05:44,734 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:44,734 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933765170] [2019-12-07 14:05:44,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:44,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:44,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:44,773 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933765170] [2019-12-07 14:05:44,773 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:44,773 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:05:44,773 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [331960897] [2019-12-07 14:05:44,773 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:44,773 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:44,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:44,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:44,774 INFO L87 Difference]: Start difference. First operand 8071 states and 21728 transitions. Second operand 5 states. [2019-12-07 14:05:44,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:44,797 INFO L93 Difference]: Finished difference Result 5424 states and 15553 transitions. [2019-12-07 14:05:44,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:05:44,797 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 14:05:44,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:44,802 INFO L225 Difference]: With dead ends: 5424 [2019-12-07 14:05:44,802 INFO L226 Difference]: Without dead ends: 5424 [2019-12-07 14:05:44,802 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:44,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5424 states. [2019-12-07 14:05:44,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5424 to 5011. [2019-12-07 14:05:44,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5011 states. [2019-12-07 14:05:44,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5011 states to 5011 states and 14436 transitions. [2019-12-07 14:05:44,873 INFO L78 Accepts]: Start accepts. Automaton has 5011 states and 14436 transitions. Word has length 51 [2019-12-07 14:05:44,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:44,873 INFO L462 AbstractCegarLoop]: Abstraction has 5011 states and 14436 transitions. [2019-12-07 14:05:44,873 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:44,873 INFO L276 IsEmpty]: Start isEmpty. Operand 5011 states and 14436 transitions. [2019-12-07 14:05:44,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 14:05:44,877 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:44,877 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:44,877 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:44,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:44,877 INFO L82 PathProgramCache]: Analyzing trace with hash -1256158932, now seen corresponding path program 1 times [2019-12-07 14:05:44,877 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:44,877 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1182456342] [2019-12-07 14:05:44,877 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:44,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:45,269 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:45,269 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1182456342] [2019-12-07 14:05:45,270 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:45,270 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:05:45,270 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [513700977] [2019-12-07 14:05:45,270 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:45,270 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:45,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:45,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:45,271 INFO L87 Difference]: Start difference. First operand 5011 states and 14436 transitions. Second operand 3 states. [2019-12-07 14:05:45,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:45,291 INFO L93 Difference]: Finished difference Result 5011 states and 14215 transitions. [2019-12-07 14:05:45,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:45,291 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 14:05:45,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:45,296 INFO L225 Difference]: With dead ends: 5011 [2019-12-07 14:05:45,296 INFO L226 Difference]: Without dead ends: 5011 [2019-12-07 14:05:45,296 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:45,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5011 states. [2019-12-07 14:05:45,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5011 to 5011. [2019-12-07 14:05:45,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5011 states. [2019-12-07 14:05:45,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5011 states to 5011 states and 14215 transitions. [2019-12-07 14:05:45,358 INFO L78 Accepts]: Start accepts. Automaton has 5011 states and 14215 transitions. Word has length 65 [2019-12-07 14:05:45,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:45,358 INFO L462 AbstractCegarLoop]: Abstraction has 5011 states and 14215 transitions. [2019-12-07 14:05:45,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:45,358 INFO L276 IsEmpty]: Start isEmpty. Operand 5011 states and 14215 transitions. [2019-12-07 14:05:45,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:05:45,361 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:45,362 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:45,362 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:45,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:45,362 INFO L82 PathProgramCache]: Analyzing trace with hash -1760720695, now seen corresponding path program 1 times [2019-12-07 14:05:45,362 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:45,362 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1333603162] [2019-12-07 14:05:45,362 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:45,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:45,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:45,419 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1333603162] [2019-12-07 14:05:45,419 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:45,420 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:05:45,420 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679786718] [2019-12-07 14:05:45,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:45,420 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:45,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:45,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:45,420 INFO L87 Difference]: Start difference. First operand 5011 states and 14215 transitions. Second operand 5 states. [2019-12-07 14:05:45,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:45,594 INFO L93 Difference]: Finished difference Result 7347 states and 20695 transitions. [2019-12-07 14:05:45,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:05:45,595 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 14:05:45,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:45,601 INFO L225 Difference]: With dead ends: 7347 [2019-12-07 14:05:45,601 INFO L226 Difference]: Without dead ends: 7347 [2019-12-07 14:05:45,601 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:05:45,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7347 states. [2019-12-07 14:05:45,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7347 to 6377. [2019-12-07 14:05:45,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6377 states. [2019-12-07 14:05:45,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6377 states to 6377 states and 18028 transitions. [2019-12-07 14:05:45,694 INFO L78 Accepts]: Start accepts. Automaton has 6377 states and 18028 transitions. Word has length 66 [2019-12-07 14:05:45,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:45,694 INFO L462 AbstractCegarLoop]: Abstraction has 6377 states and 18028 transitions. [2019-12-07 14:05:45,694 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:45,695 INFO L276 IsEmpty]: Start isEmpty. Operand 6377 states and 18028 transitions. [2019-12-07 14:05:45,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:05:45,699 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:45,700 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:45,700 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:45,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:45,700 INFO L82 PathProgramCache]: Analyzing trace with hash 1764113003, now seen corresponding path program 2 times [2019-12-07 14:05:45,700 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:45,700 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1412641626] [2019-12-07 14:05:45,700 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:45,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:45,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:45,752 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1412641626] [2019-12-07 14:05:45,752 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:45,752 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:05:45,752 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [524386552] [2019-12-07 14:05:45,753 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:45,753 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:45,753 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:45,753 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:45,753 INFO L87 Difference]: Start difference. First operand 6377 states and 18028 transitions. Second operand 5 states. [2019-12-07 14:05:45,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:45,952 INFO L93 Difference]: Finished difference Result 9089 states and 25480 transitions. [2019-12-07 14:05:45,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:05:45,953 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 14:05:45,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:45,960 INFO L225 Difference]: With dead ends: 9089 [2019-12-07 14:05:45,960 INFO L226 Difference]: Without dead ends: 9089 [2019-12-07 14:05:45,961 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:05:45,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9089 states. [2019-12-07 14:05:46,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9089 to 7049. [2019-12-07 14:05:46,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7049 states. [2019-12-07 14:05:46,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7049 states to 7049 states and 19977 transitions. [2019-12-07 14:05:46,060 INFO L78 Accepts]: Start accepts. Automaton has 7049 states and 19977 transitions. Word has length 66 [2019-12-07 14:05:46,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:46,061 INFO L462 AbstractCegarLoop]: Abstraction has 7049 states and 19977 transitions. [2019-12-07 14:05:46,061 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:46,061 INFO L276 IsEmpty]: Start isEmpty. Operand 7049 states and 19977 transitions. [2019-12-07 14:05:46,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:05:46,066 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:46,066 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:46,066 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:46,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:46,066 INFO L82 PathProgramCache]: Analyzing trace with hash 956425645, now seen corresponding path program 3 times [2019-12-07 14:05:46,066 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:46,066 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1259591282] [2019-12-07 14:05:46,066 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:46,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:46,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:46,139 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1259591282] [2019-12-07 14:05:46,139 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:46,139 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:05:46,139 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1987838082] [2019-12-07 14:05:46,139 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:05:46,139 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:46,139 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:05:46,140 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:05:46,140 INFO L87 Difference]: Start difference. First operand 7049 states and 19977 transitions. Second operand 7 states. [2019-12-07 14:05:46,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:46,387 INFO L93 Difference]: Finished difference Result 9440 states and 26391 transitions. [2019-12-07 14:05:46,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:05:46,387 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 14:05:46,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:46,395 INFO L225 Difference]: With dead ends: 9440 [2019-12-07 14:05:46,395 INFO L226 Difference]: Without dead ends: 9440 [2019-12-07 14:05:46,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:05:46,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9440 states. [2019-12-07 14:05:46,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9440 to 7420. [2019-12-07 14:05:46,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7420 states. [2019-12-07 14:05:46,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7420 states to 7420 states and 21016 transitions. [2019-12-07 14:05:46,497 INFO L78 Accepts]: Start accepts. Automaton has 7420 states and 21016 transitions. Word has length 66 [2019-12-07 14:05:46,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:46,497 INFO L462 AbstractCegarLoop]: Abstraction has 7420 states and 21016 transitions. [2019-12-07 14:05:46,497 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:05:46,497 INFO L276 IsEmpty]: Start isEmpty. Operand 7420 states and 21016 transitions. [2019-12-07 14:05:46,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:05:46,502 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:46,502 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:46,502 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:46,503 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:46,503 INFO L82 PathProgramCache]: Analyzing trace with hash 426723893, now seen corresponding path program 4 times [2019-12-07 14:05:46,503 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:46,503 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872823792] [2019-12-07 14:05:46,503 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:46,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:46,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:46,535 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1872823792] [2019-12-07 14:05:46,535 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:46,535 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:05:46,535 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1559269627] [2019-12-07 14:05:46,535 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:46,535 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:46,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:46,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:46,536 INFO L87 Difference]: Start difference. First operand 7420 states and 21016 transitions. Second operand 3 states. [2019-12-07 14:05:46,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:46,576 INFO L93 Difference]: Finished difference Result 7420 states and 21015 transitions. [2019-12-07 14:05:46,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:46,577 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 14:05:46,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:46,583 INFO L225 Difference]: With dead ends: 7420 [2019-12-07 14:05:46,583 INFO L226 Difference]: Without dead ends: 7420 [2019-12-07 14:05:46,584 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:46,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7420 states. [2019-12-07 14:05:46,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7420 to 5669. [2019-12-07 14:05:46,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5669 states. [2019-12-07 14:05:46,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5669 states to 5669 states and 16144 transitions. [2019-12-07 14:05:46,664 INFO L78 Accepts]: Start accepts. Automaton has 5669 states and 16144 transitions. Word has length 66 [2019-12-07 14:05:46,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:46,665 INFO L462 AbstractCegarLoop]: Abstraction has 5669 states and 16144 transitions. [2019-12-07 14:05:46,665 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:46,665 INFO L276 IsEmpty]: Start isEmpty. Operand 5669 states and 16144 transitions. [2019-12-07 14:05:46,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:05:46,670 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:46,670 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:46,670 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:46,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:46,670 INFO L82 PathProgramCache]: Analyzing trace with hash -1488093963, now seen corresponding path program 1 times [2019-12-07 14:05:46,670 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:46,670 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579658137] [2019-12-07 14:05:46,670 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:46,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:46,702 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:46,702 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [579658137] [2019-12-07 14:05:46,702 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:46,703 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:05:46,703 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1658467022] [2019-12-07 14:05:46,703 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:46,703 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:46,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:46,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:46,704 INFO L87 Difference]: Start difference. First operand 5669 states and 16144 transitions. Second operand 3 states. [2019-12-07 14:05:46,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:46,726 INFO L93 Difference]: Finished difference Result 5242 states and 14662 transitions. [2019-12-07 14:05:46,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:46,727 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 14:05:46,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:46,733 INFO L225 Difference]: With dead ends: 5242 [2019-12-07 14:05:46,733 INFO L226 Difference]: Without dead ends: 5242 [2019-12-07 14:05:46,733 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:46,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5242 states. [2019-12-07 14:05:46,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5242 to 4738. [2019-12-07 14:05:46,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4738 states. [2019-12-07 14:05:46,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4738 states to 4738 states and 13246 transitions. [2019-12-07 14:05:46,809 INFO L78 Accepts]: Start accepts. Automaton has 4738 states and 13246 transitions. Word has length 67 [2019-12-07 14:05:46,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:46,810 INFO L462 AbstractCegarLoop]: Abstraction has 4738 states and 13246 transitions. [2019-12-07 14:05:46,810 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:46,810 INFO L276 IsEmpty]: Start isEmpty. Operand 4738 states and 13246 transitions. [2019-12-07 14:05:46,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 14:05:46,813 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:46,813 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:46,813 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:46,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:46,814 INFO L82 PathProgramCache]: Analyzing trace with hash -2084050195, now seen corresponding path program 1 times [2019-12-07 14:05:46,814 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:46,814 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1780019823] [2019-12-07 14:05:46,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:46,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:47,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:47,037 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1780019823] [2019-12-07 14:05:47,037 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:47,038 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 14:05:47,038 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [731022318] [2019-12-07 14:05:47,038 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 14:05:47,038 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:47,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 14:05:47,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:05:47,038 INFO L87 Difference]: Start difference. First operand 4738 states and 13246 transitions. Second operand 13 states. [2019-12-07 14:05:48,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:48,108 INFO L93 Difference]: Finished difference Result 14646 states and 41832 transitions. [2019-12-07 14:05:48,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 14:05:48,109 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 68 [2019-12-07 14:05:48,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:48,116 INFO L225 Difference]: With dead ends: 14646 [2019-12-07 14:05:48,116 INFO L226 Difference]: Without dead ends: 8375 [2019-12-07 14:05:48,116 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 130 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=220, Invalid=650, Unknown=0, NotChecked=0, Total=870 [2019-12-07 14:05:48,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8375 states. [2019-12-07 14:05:48,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8375 to 4738. [2019-12-07 14:05:48,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4738 states. [2019-12-07 14:05:48,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4738 states to 4738 states and 13055 transitions. [2019-12-07 14:05:48,191 INFO L78 Accepts]: Start accepts. Automaton has 4738 states and 13055 transitions. Word has length 68 [2019-12-07 14:05:48,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:48,191 INFO L462 AbstractCegarLoop]: Abstraction has 4738 states and 13055 transitions. [2019-12-07 14:05:48,191 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 14:05:48,191 INFO L276 IsEmpty]: Start isEmpty. Operand 4738 states and 13055 transitions. [2019-12-07 14:05:48,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 14:05:48,194 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:48,194 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:48,194 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:48,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:48,194 INFO L82 PathProgramCache]: Analyzing trace with hash -565452509, now seen corresponding path program 2 times [2019-12-07 14:05:48,195 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:48,195 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235048800] [2019-12-07 14:05:48,195 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:48,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:48,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:48,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235048800] [2019-12-07 14:05:48,373 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:48,373 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 14:05:48,373 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [94767405] [2019-12-07 14:05:48,373 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 14:05:48,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:48,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 14:05:48,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:05:48,374 INFO L87 Difference]: Start difference. First operand 4738 states and 13055 transitions. Second operand 13 states. [2019-12-07 14:05:49,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:49,158 INFO L93 Difference]: Finished difference Result 13717 states and 37279 transitions. [2019-12-07 14:05:49,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 14:05:49,158 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 68 [2019-12-07 14:05:49,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:49,166 INFO L225 Difference]: With dead ends: 13717 [2019-12-07 14:05:49,166 INFO L226 Difference]: Without dead ends: 9888 [2019-12-07 14:05:49,167 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=206, Invalid=606, Unknown=0, NotChecked=0, Total=812 [2019-12-07 14:05:49,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9888 states. [2019-12-07 14:05:49,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9888 to 3898. [2019-12-07 14:05:49,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3898 states. [2019-12-07 14:05:49,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3898 states to 3898 states and 10810 transitions. [2019-12-07 14:05:49,244 INFO L78 Accepts]: Start accepts. Automaton has 3898 states and 10810 transitions. Word has length 68 [2019-12-07 14:05:49,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:49,244 INFO L462 AbstractCegarLoop]: Abstraction has 3898 states and 10810 transitions. [2019-12-07 14:05:49,244 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 14:05:49,244 INFO L276 IsEmpty]: Start isEmpty. Operand 3898 states and 10810 transitions. [2019-12-07 14:05:49,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 14:05:49,247 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:49,247 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:49,247 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:49,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:49,247 INFO L82 PathProgramCache]: Analyzing trace with hash -293308025, now seen corresponding path program 3 times [2019-12-07 14:05:49,247 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:49,247 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1614115380] [2019-12-07 14:05:49,247 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:49,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:49,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:49,330 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1614115380] [2019-12-07 14:05:49,330 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:49,330 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:05:49,331 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1088008994] [2019-12-07 14:05:49,331 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:49,331 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:49,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:49,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:49,331 INFO L87 Difference]: Start difference. First operand 3898 states and 10810 transitions. Second operand 5 states. [2019-12-07 14:05:49,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:49,385 INFO L93 Difference]: Finished difference Result 5814 states and 16183 transitions. [2019-12-07 14:05:49,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:05:49,385 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 68 [2019-12-07 14:05:49,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:49,388 INFO L225 Difference]: With dead ends: 5814 [2019-12-07 14:05:49,388 INFO L226 Difference]: Without dead ends: 1963 [2019-12-07 14:05:49,388 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:05:49,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1963 states. [2019-12-07 14:05:49,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1963 to 1963. [2019-12-07 14:05:49,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1963 states. [2019-12-07 14:05:49,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1963 states to 1963 states and 5460 transitions. [2019-12-07 14:05:49,428 INFO L78 Accepts]: Start accepts. Automaton has 1963 states and 5460 transitions. Word has length 68 [2019-12-07 14:05:49,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:49,428 INFO L462 AbstractCegarLoop]: Abstraction has 1963 states and 5460 transitions. [2019-12-07 14:05:49,428 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:49,428 INFO L276 IsEmpty]: Start isEmpty. Operand 1963 states and 5460 transitions. [2019-12-07 14:05:49,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 14:05:49,430 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:49,430 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:49,430 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:49,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:49,430 INFO L82 PathProgramCache]: Analyzing trace with hash -1266757317, now seen corresponding path program 4 times [2019-12-07 14:05:49,430 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:49,430 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1817611903] [2019-12-07 14:05:49,430 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:49,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:05:49,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:05:49,514 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:05:49,514 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:05:49,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_57| 0 0))) (and (= 0 v_~__unbuffered_p2_EAX~0_23) (= v_~z~0_18 0) (= 0 v_~weak$$choice0~0_14) (= v_~x$flush_delayed~0_41 0) (= |v_#valid_55| (store .cse0 |v_ULTIMATE.start_main_~#t754~0.base_20| 1)) (= 0 v_~x$r_buff0_thd3~0_99) (= 0 |v_ULTIMATE.start_main_~#t754~0.offset_17|) (= v_~x$r_buff1_thd1~0_192 0) (= 0 v_~x$w_buff0~0_203) (= v_~weak$$choice2~0_116 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$r_buff1_thd3~0_193) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$w_buff1~0_195) (= v_~x$mem_tmp~0_22 0) (= v_~__unbuffered_p2_EBX~0_23 0) (= 0 v_~x$r_buff0_thd2~0_205) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t754~0.base_20|)) (= v_~main$tmp_guard1~0_28 0) (= v_~x$r_buff0_thd0~0_335 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t754~0.base_20|) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff1_thd0~0_279 0) (= 0 v_~x$w_buff1_used~0_401) (= v_~__unbuffered_cnt~0_145 0) (= 0 v_~x$r_buff1_thd2~0_186) (= 0 v_~x$w_buff0_used~0_743) (= |v_#NULL.offset_5| 0) (= 0 v_~x~0_213) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t754~0.base_20| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t754~0.base_20|) |v_ULTIMATE.start_main_~#t754~0.offset_17| 0)) |v_#memory_int_23|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t754~0.base_20| 4)) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~x$r_buff0_thd1~0_88) (= 0 |v_#NULL.base_5|) (= v_~y~0_136 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_57|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_203, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_41, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_31|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_40|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_192, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_99, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_39|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_~#t754~0.offset=|v_ULTIMATE.start_main_~#t754~0.offset_17|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ULTIMATE.start_main_~#t754~0.base=|v_ULTIMATE.start_main_~#t754~0.base_20|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_335, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_23, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_43|, ~x$w_buff1~0=v_~x$w_buff1~0_195, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_46|, ULTIMATE.start_main_~#t756~0.offset=|v_ULTIMATE.start_main_~#t756~0.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_401, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_186, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_50|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_156|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, ~x~0=v_~x~0_213, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_88, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_~#t755~0.offset=|v_ULTIMATE.start_main_~#t755~0.offset_17|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_193, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_33|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_273|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_41|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_34|, ~y~0=v_~y~0_136, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_~#t756~0.base=|v_ULTIMATE.start_main_~#t756~0.base_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_27|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_279, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_205, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_42|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_743, ULTIMATE.start_main_~#t755~0.base=|v_ULTIMATE.start_main_~#t755~0.base_21|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_162|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_18, ~weak$$choice2~0=v_~weak$$choice2~0_116, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t754~0.offset, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t754~0.base, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t756~0.offset, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t755~0.offset, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t756~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t755~0.base, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 14:05:49,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L810-1-->L812: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t755~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t755~0.base_13|) |v_ULTIMATE.start_main_~#t755~0.offset_11| 1)) |v_#memory_int_15|) (not (= 0 |v_ULTIMATE.start_main_~#t755~0.base_13|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t755~0.base_13| 4) |v_#length_17|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t755~0.base_13|) (= |v_ULTIMATE.start_main_~#t755~0.offset_11| 0) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t755~0.base_13|)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t755~0.base_13| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t755~0.base=|v_ULTIMATE.start_main_~#t755~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t755~0.offset=|v_ULTIMATE.start_main_~#t755~0.offset_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t755~0.base, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t755~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 14:05:49,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L812-1-->L814: Formula: (and (= |v_ULTIMATE.start_main_~#t756~0.offset_11| 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t756~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t756~0.base_13|) |v_ULTIMATE.start_main_~#t756~0.offset_11| 2)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t756~0.base_13| 0)) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t756~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t756~0.base_13|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t756~0.base_13| 1) |v_#valid_34|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t756~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t756~0.base=|v_ULTIMATE.start_main_~#t756~0.base_13|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t756~0.offset=|v_ULTIMATE.start_main_~#t756~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t756~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t756~0.offset, #length] because there is no mapped edge [2019-12-07 14:05:49,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| (ite (not (and (not (= (mod v_~x$w_buff1_used~0_145 256) 0)) (not (= 0 (mod v_~x$w_buff0_used~0_300 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= v_~x$w_buff0~0_44 v_~x$w_buff1~0_51) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10)) (= 2 v_~x$w_buff0~0_43) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= 1 v_~x$w_buff0_used~0_300) (= v_~x$w_buff0_used~0_301 v_~x$w_buff1_used~0_145)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_44, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_301} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10, ~x$w_buff0~0=v_~x$w_buff0~0_43, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, ~x$w_buff1~0=v_~x$w_buff1~0_51, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_145, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_300} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 14:05:49,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L787-2-->L787-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1270986780 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1270986780 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1270986780 |P2Thread1of1ForFork2_#t~ite15_Out-1270986780|)) (and (or .cse0 .cse1) (= ~x~0_In-1270986780 |P2Thread1of1ForFork2_#t~ite15_Out-1270986780|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1270986780, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1270986780, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1270986780, ~x~0=~x~0_In-1270986780} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1270986780|, ~x$w_buff1~0=~x$w_buff1~0_In-1270986780, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1270986780, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1270986780, ~x~0=~x~0_In-1270986780} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 14:05:49,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L787-4-->L788: Formula: (= v_~x~0_30 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_7|, ~x~0=v_~x~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 14:05:49,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L735-2-->L735-5: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In115977584 256) 0)) (.cse0 (= |P0Thread1of1ForFork0_#t~ite3_Out115977584| |P0Thread1of1ForFork0_#t~ite4_Out115977584|)) (.cse1 (= (mod ~x$r_buff1_thd1~0_In115977584 256) 0))) (or (and .cse0 (= |P0Thread1of1ForFork0_#t~ite3_Out115977584| ~x~0_In115977584) (or .cse1 .cse2)) (and (not .cse2) .cse0 (= |P0Thread1of1ForFork0_#t~ite3_Out115977584| ~x$w_buff1~0_In115977584) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In115977584, ~x$w_buff1_used~0=~x$w_buff1_used~0_In115977584, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In115977584, ~x~0=~x~0_In115977584} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out115977584|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out115977584|, ~x$w_buff1~0=~x$w_buff1~0_In115977584, ~x$w_buff1_used~0=~x$w_buff1_used~0_In115977584, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In115977584, ~x~0=~x~0_In115977584} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 14:05:49,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L736-->L736-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1945376630 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1945376630 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1945376630 |P0Thread1of1ForFork0_#t~ite5_Out1945376630|)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out1945376630| 0) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1945376630, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1945376630} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1945376630|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1945376630, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1945376630} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:05:49,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L788-->L788-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1291462227 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1291462227 256) 0))) (or (and (= ~x$w_buff0_used~0_In1291462227 |P2Thread1of1ForFork2_#t~ite17_Out1291462227|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out1291462227|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1291462227, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1291462227} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1291462227, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1291462227|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1291462227} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:05:49,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In207516245 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In207516245 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd3~0_In207516245 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In207516245 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite18_Out207516245| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork2_#t~ite18_Out207516245| ~x$w_buff1_used~0_In207516245) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In207516245, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In207516245, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In207516245, ~x$w_buff0_used~0=~x$w_buff0_used~0_In207516245} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In207516245, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In207516245, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In207516245, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out207516245|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In207516245} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 14:05:49,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L737-->L737-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In-444418147 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-444418147 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-444418147 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-444418147 256)))) (or (and (= ~x$w_buff1_used~0_In-444418147 |P0Thread1of1ForFork0_#t~ite6_Out-444418147|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-444418147|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-444418147, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-444418147, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-444418147, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-444418147} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-444418147|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-444418147, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-444418147, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-444418147, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-444418147} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:05:49,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1795374250 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In-1795374250 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out-1795374250| 0)) (and (= ~x$r_buff0_thd3~0_In-1795374250 |P2Thread1of1ForFork2_#t~ite19_Out-1795374250|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1795374250, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1795374250} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1795374250, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1795374250|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1795374250} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 14:05:49,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L791-->L791-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In159571 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In159571 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In159571 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In159571 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite20_Out159571| 0)) (and (= |P2Thread1of1ForFork2_#t~ite20_Out159571| ~x$r_buff1_thd3~0_In159571) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In159571, ~x$w_buff1_used~0=~x$w_buff1_used~0_In159571, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In159571, ~x$w_buff0_used~0=~x$w_buff0_used~0_In159571} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out159571|, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In159571, ~x$w_buff1_used~0=~x$w_buff1_used~0_In159571, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In159571, ~x$w_buff0_used~0=~x$w_buff0_used~0_In159571} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 14:05:49,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L791-2-->P2EXIT: Formula: (and (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork2_#t~ite20_26|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 14:05:49,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In-202933783 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-202933783 256) 0))) (or (and (= ~x$w_buff0_used~0_In-202933783 |P1Thread1of1ForFork1_#t~ite11_Out-202933783|) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out-202933783| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-202933783, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-202933783} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-202933783|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-202933783, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-202933783} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 14:05:49,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L766-->L766-2: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-1063765423 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-1063765423 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-1063765423 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1063765423 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1063765423|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~x$w_buff1_used~0_In-1063765423 |P1Thread1of1ForFork1_#t~ite12_Out-1063765423|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1063765423, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1063765423, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1063765423, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1063765423} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1063765423, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1063765423, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1063765423|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1063765423, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1063765423} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 14:05:49,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L767-->L768: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1709604888 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1709604888 256) 0)) (.cse1 (= ~x$r_buff0_thd2~0_Out-1709604888 ~x$r_buff0_thd2~0_In-1709604888))) (or (and .cse0 .cse1) (and (not .cse0) (= ~x$r_buff0_thd2~0_Out-1709604888 0) (not .cse2)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1709604888, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1709604888} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1709604888|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1709604888, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1709604888} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 14:05:49,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-654080605 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-654080605 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-654080605 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In-654080605 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-654080605| ~x$r_buff1_thd2~0_In-654080605) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-654080605| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-654080605, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-654080605, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-654080605, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-654080605} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-654080605, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-654080605, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-654080605, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-654080605|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-654080605} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 14:05:49,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_68 |v_P1Thread1of1ForFork1_#t~ite14_40|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_68, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 14:05:49,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L738-->L738-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1526394517 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-1526394517 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In-1526394517 |P0Thread1of1ForFork0_#t~ite7_Out-1526394517|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-1526394517|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1526394517, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1526394517} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1526394517, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1526394517|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1526394517} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 14:05:49,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L739-->L739-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In-866420506 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-866420506 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-866420506 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-866420506 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-866420506| ~x$r_buff1_thd1~0_In-866420506)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork0_#t~ite8_Out-866420506| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-866420506, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-866420506, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-866420506, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-866420506} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-866420506, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-866420506|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-866420506, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-866420506, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-866420506} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:05:49,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L739-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_40 |v_P0Thread1of1ForFork0_#t~ite8_18|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_17|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 14:05:49,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:05:49,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L820-2-->L820-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out-1044708823| |ULTIMATE.start_main_#t~ite24_Out-1044708823|)) (.cse1 (= (mod ~x$w_buff1_used~0_In-1044708823 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In-1044708823 256) 0))) (or (and (= ~x$w_buff1~0_In-1044708823 |ULTIMATE.start_main_#t~ite24_Out-1044708823|) .cse0 (not .cse1) (not .cse2)) (and .cse0 (= ~x~0_In-1044708823 |ULTIMATE.start_main_#t~ite24_Out-1044708823|) (or .cse1 .cse2)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1044708823, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1044708823, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1044708823, ~x~0=~x~0_In-1044708823} OutVars{~x$w_buff1~0=~x$w_buff1~0_In-1044708823, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1044708823|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-1044708823|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1044708823, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1044708823, ~x~0=~x~0_In-1044708823} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 14:05:49,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L821-->L821-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1106559730 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1106559730 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1106559730 |ULTIMATE.start_main_#t~ite26_Out1106559730|)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite26_Out1106559730| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1106559730, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1106559730} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1106559730, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1106559730|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1106559730} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 14:05:49,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L822-->L822-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In-1702816528 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1702816528 256))) (.cse1 (= (mod ~x$r_buff1_thd0~0_In-1702816528 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1702816528 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-1702816528| 0)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite27_Out-1702816528| ~x$w_buff1_used~0_In-1702816528) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1702816528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1702816528, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1702816528, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1702816528} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1702816528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1702816528, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1702816528|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1702816528, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1702816528} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 14:05:49,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1535385938 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-1535385938 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite28_Out-1535385938|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd0~0_In-1535385938 |ULTIMATE.start_main_#t~ite28_Out-1535385938|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1535385938, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1535385938} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1535385938, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1535385938|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1535385938} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 14:05:49,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L824-->L824-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In954607691 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In954607691 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In954607691 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In954607691 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In954607691 |ULTIMATE.start_main_#t~ite29_Out954607691|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite29_Out954607691|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In954607691, ~x$w_buff1_used~0=~x$w_buff1_used~0_In954607691, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In954607691, ~x$w_buff0_used~0=~x$w_buff0_used~0_In954607691} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In954607691, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out954607691|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In954607691, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In954607691, ~x$w_buff0_used~0=~x$w_buff0_used~0_In954607691} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 14:05:49,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L836-->L837: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~x$r_buff0_thd0~0_87 v_~x$r_buff0_thd0~0_86)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_87, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_86, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_27} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:05:49,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L839-->L4: Formula: (and (= v_~x$flush_delayed~0_24 0) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_25 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_173)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ~x$flush_delayed~0=v_~x$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_173, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:05:49,530 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 14:05:49,599 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:05:49 BasicIcfg [2019-12-07 14:05:49,599 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:05:49,600 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:05:49,600 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:05:49,600 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:05:49,600 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:04:17" (3/4) ... [2019-12-07 14:05:49,602 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:05:49,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_57| 0 0))) (and (= 0 v_~__unbuffered_p2_EAX~0_23) (= v_~z~0_18 0) (= 0 v_~weak$$choice0~0_14) (= v_~x$flush_delayed~0_41 0) (= |v_#valid_55| (store .cse0 |v_ULTIMATE.start_main_~#t754~0.base_20| 1)) (= 0 v_~x$r_buff0_thd3~0_99) (= 0 |v_ULTIMATE.start_main_~#t754~0.offset_17|) (= v_~x$r_buff1_thd1~0_192 0) (= 0 v_~x$w_buff0~0_203) (= v_~weak$$choice2~0_116 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$r_buff1_thd3~0_193) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$w_buff1~0_195) (= v_~x$mem_tmp~0_22 0) (= v_~__unbuffered_p2_EBX~0_23 0) (= 0 v_~x$r_buff0_thd2~0_205) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t754~0.base_20|)) (= v_~main$tmp_guard1~0_28 0) (= v_~x$r_buff0_thd0~0_335 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t754~0.base_20|) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff1_thd0~0_279 0) (= 0 v_~x$w_buff1_used~0_401) (= v_~__unbuffered_cnt~0_145 0) (= 0 v_~x$r_buff1_thd2~0_186) (= 0 v_~x$w_buff0_used~0_743) (= |v_#NULL.offset_5| 0) (= 0 v_~x~0_213) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t754~0.base_20| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t754~0.base_20|) |v_ULTIMATE.start_main_~#t754~0.offset_17| 0)) |v_#memory_int_23|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t754~0.base_20| 4)) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~x$r_buff0_thd1~0_88) (= 0 |v_#NULL.base_5|) (= v_~y~0_136 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_57|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_203, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_41, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_31|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_40|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_192, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_99, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_39|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_~#t754~0.offset=|v_ULTIMATE.start_main_~#t754~0.offset_17|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ULTIMATE.start_main_~#t754~0.base=|v_ULTIMATE.start_main_~#t754~0.base_20|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_335, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_23, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_43|, ~x$w_buff1~0=v_~x$w_buff1~0_195, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_46|, ULTIMATE.start_main_~#t756~0.offset=|v_ULTIMATE.start_main_~#t756~0.offset_17|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_401, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_186, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_50|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_156|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, ~x~0=v_~x~0_213, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_88, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_~#t755~0.offset=|v_ULTIMATE.start_main_~#t755~0.offset_17|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_193, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_33|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_273|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_41|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_34|, ~y~0=v_~y~0_136, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_~#t756~0.base=|v_ULTIMATE.start_main_~#t756~0.base_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_27|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_279, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_205, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_42|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_743, ULTIMATE.start_main_~#t755~0.base=|v_ULTIMATE.start_main_~#t755~0.base_21|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_162|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_18, ~weak$$choice2~0=v_~weak$$choice2~0_116, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t754~0.offset, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t754~0.base, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t756~0.offset, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t755~0.offset, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t756~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t755~0.base, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 14:05:49,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L810-1-->L812: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t755~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t755~0.base_13|) |v_ULTIMATE.start_main_~#t755~0.offset_11| 1)) |v_#memory_int_15|) (not (= 0 |v_ULTIMATE.start_main_~#t755~0.base_13|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t755~0.base_13| 4) |v_#length_17|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t755~0.base_13|) (= |v_ULTIMATE.start_main_~#t755~0.offset_11| 0) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t755~0.base_13|)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t755~0.base_13| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t755~0.base=|v_ULTIMATE.start_main_~#t755~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t755~0.offset=|v_ULTIMATE.start_main_~#t755~0.offset_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t755~0.base, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t755~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 14:05:49,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L812-1-->L814: Formula: (and (= |v_ULTIMATE.start_main_~#t756~0.offset_11| 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t756~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t756~0.base_13|) |v_ULTIMATE.start_main_~#t756~0.offset_11| 2)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t756~0.base_13| 0)) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t756~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t756~0.base_13|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t756~0.base_13| 1) |v_#valid_34|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t756~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t756~0.base=|v_ULTIMATE.start_main_~#t756~0.base_13|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t756~0.offset=|v_ULTIMATE.start_main_~#t756~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t756~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t756~0.offset, #length] because there is no mapped edge [2019-12-07 14:05:49,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| (ite (not (and (not (= (mod v_~x$w_buff1_used~0_145 256) 0)) (not (= 0 (mod v_~x$w_buff0_used~0_300 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= v_~x$w_buff0~0_44 v_~x$w_buff1~0_51) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10)) (= 2 v_~x$w_buff0~0_43) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= 1 v_~x$w_buff0_used~0_300) (= v_~x$w_buff0_used~0_301 v_~x$w_buff1_used~0_145)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_44, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_301} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10, ~x$w_buff0~0=v_~x$w_buff0~0_43, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, ~x$w_buff1~0=v_~x$w_buff1~0_51, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_145, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_300} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 14:05:49,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L787-2-->L787-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1270986780 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1270986780 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1270986780 |P2Thread1of1ForFork2_#t~ite15_Out-1270986780|)) (and (or .cse0 .cse1) (= ~x~0_In-1270986780 |P2Thread1of1ForFork2_#t~ite15_Out-1270986780|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1270986780, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1270986780, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1270986780, ~x~0=~x~0_In-1270986780} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1270986780|, ~x$w_buff1~0=~x$w_buff1~0_In-1270986780, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1270986780, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1270986780, ~x~0=~x~0_In-1270986780} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 14:05:49,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L787-4-->L788: Formula: (= v_~x~0_30 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_7|, ~x~0=v_~x~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 14:05:49,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L735-2-->L735-5: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In115977584 256) 0)) (.cse0 (= |P0Thread1of1ForFork0_#t~ite3_Out115977584| |P0Thread1of1ForFork0_#t~ite4_Out115977584|)) (.cse1 (= (mod ~x$r_buff1_thd1~0_In115977584 256) 0))) (or (and .cse0 (= |P0Thread1of1ForFork0_#t~ite3_Out115977584| ~x~0_In115977584) (or .cse1 .cse2)) (and (not .cse2) .cse0 (= |P0Thread1of1ForFork0_#t~ite3_Out115977584| ~x$w_buff1~0_In115977584) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In115977584, ~x$w_buff1_used~0=~x$w_buff1_used~0_In115977584, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In115977584, ~x~0=~x~0_In115977584} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out115977584|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out115977584|, ~x$w_buff1~0=~x$w_buff1~0_In115977584, ~x$w_buff1_used~0=~x$w_buff1_used~0_In115977584, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In115977584, ~x~0=~x~0_In115977584} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 14:05:49,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L736-->L736-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1945376630 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1945376630 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1945376630 |P0Thread1of1ForFork0_#t~ite5_Out1945376630|)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out1945376630| 0) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1945376630, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1945376630} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1945376630|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1945376630, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1945376630} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:05:49,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L788-->L788-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1291462227 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1291462227 256) 0))) (or (and (= ~x$w_buff0_used~0_In1291462227 |P2Thread1of1ForFork2_#t~ite17_Out1291462227|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out1291462227|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1291462227, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1291462227} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1291462227, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1291462227|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1291462227} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:05:49,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In207516245 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In207516245 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd3~0_In207516245 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In207516245 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite18_Out207516245| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork2_#t~ite18_Out207516245| ~x$w_buff1_used~0_In207516245) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In207516245, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In207516245, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In207516245, ~x$w_buff0_used~0=~x$w_buff0_used~0_In207516245} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In207516245, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In207516245, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In207516245, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out207516245|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In207516245} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 14:05:49,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L737-->L737-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In-444418147 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-444418147 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-444418147 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-444418147 256)))) (or (and (= ~x$w_buff1_used~0_In-444418147 |P0Thread1of1ForFork0_#t~ite6_Out-444418147|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-444418147|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-444418147, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-444418147, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-444418147, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-444418147} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-444418147|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-444418147, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-444418147, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-444418147, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-444418147} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:05:49,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1795374250 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In-1795374250 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out-1795374250| 0)) (and (= ~x$r_buff0_thd3~0_In-1795374250 |P2Thread1of1ForFork2_#t~ite19_Out-1795374250|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1795374250, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1795374250} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1795374250, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1795374250|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1795374250} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 14:05:49,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L791-->L791-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In159571 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In159571 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In159571 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In159571 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite20_Out159571| 0)) (and (= |P2Thread1of1ForFork2_#t~ite20_Out159571| ~x$r_buff1_thd3~0_In159571) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In159571, ~x$w_buff1_used~0=~x$w_buff1_used~0_In159571, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In159571, ~x$w_buff0_used~0=~x$w_buff0_used~0_In159571} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out159571|, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In159571, ~x$w_buff1_used~0=~x$w_buff1_used~0_In159571, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In159571, ~x$w_buff0_used~0=~x$w_buff0_used~0_In159571} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 14:05:49,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L791-2-->P2EXIT: Formula: (and (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork2_#t~ite20_26|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 14:05:49,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In-202933783 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-202933783 256) 0))) (or (and (= ~x$w_buff0_used~0_In-202933783 |P1Thread1of1ForFork1_#t~ite11_Out-202933783|) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out-202933783| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-202933783, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-202933783} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-202933783|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-202933783, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-202933783} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 14:05:49,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L766-->L766-2: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-1063765423 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-1063765423 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-1063765423 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1063765423 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1063765423|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~x$w_buff1_used~0_In-1063765423 |P1Thread1of1ForFork1_#t~ite12_Out-1063765423|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1063765423, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1063765423, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1063765423, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1063765423} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1063765423, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1063765423, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1063765423|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1063765423, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1063765423} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 14:05:49,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L767-->L768: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1709604888 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1709604888 256) 0)) (.cse1 (= ~x$r_buff0_thd2~0_Out-1709604888 ~x$r_buff0_thd2~0_In-1709604888))) (or (and .cse0 .cse1) (and (not .cse0) (= ~x$r_buff0_thd2~0_Out-1709604888 0) (not .cse2)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1709604888, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1709604888} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1709604888|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1709604888, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1709604888} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 14:05:49,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-654080605 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-654080605 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-654080605 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In-654080605 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-654080605| ~x$r_buff1_thd2~0_In-654080605) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-654080605| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-654080605, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-654080605, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-654080605, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-654080605} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-654080605, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-654080605, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-654080605, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-654080605|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-654080605} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 14:05:49,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_68 |v_P1Thread1of1ForFork1_#t~ite14_40|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_68, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 14:05:49,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L738-->L738-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1526394517 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-1526394517 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In-1526394517 |P0Thread1of1ForFork0_#t~ite7_Out-1526394517|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-1526394517|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1526394517, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1526394517} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1526394517, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1526394517|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1526394517} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 14:05:49,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L739-->L739-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In-866420506 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-866420506 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-866420506 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-866420506 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-866420506| ~x$r_buff1_thd1~0_In-866420506)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork0_#t~ite8_Out-866420506| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-866420506, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-866420506, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-866420506, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-866420506} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-866420506, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-866420506|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-866420506, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-866420506, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-866420506} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:05:49,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L739-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_40 |v_P0Thread1of1ForFork0_#t~ite8_18|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_17|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 14:05:49,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:05:49,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L820-2-->L820-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out-1044708823| |ULTIMATE.start_main_#t~ite24_Out-1044708823|)) (.cse1 (= (mod ~x$w_buff1_used~0_In-1044708823 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In-1044708823 256) 0))) (or (and (= ~x$w_buff1~0_In-1044708823 |ULTIMATE.start_main_#t~ite24_Out-1044708823|) .cse0 (not .cse1) (not .cse2)) (and .cse0 (= ~x~0_In-1044708823 |ULTIMATE.start_main_#t~ite24_Out-1044708823|) (or .cse1 .cse2)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1044708823, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1044708823, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1044708823, ~x~0=~x~0_In-1044708823} OutVars{~x$w_buff1~0=~x$w_buff1~0_In-1044708823, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1044708823|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-1044708823|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1044708823, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1044708823, ~x~0=~x~0_In-1044708823} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 14:05:49,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L821-->L821-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1106559730 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1106559730 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1106559730 |ULTIMATE.start_main_#t~ite26_Out1106559730|)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite26_Out1106559730| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1106559730, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1106559730} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1106559730, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1106559730|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1106559730} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 14:05:49,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L822-->L822-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In-1702816528 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1702816528 256))) (.cse1 (= (mod ~x$r_buff1_thd0~0_In-1702816528 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1702816528 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-1702816528| 0)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite27_Out-1702816528| ~x$w_buff1_used~0_In-1702816528) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1702816528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1702816528, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1702816528, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1702816528} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1702816528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1702816528, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1702816528|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1702816528, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1702816528} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 14:05:49,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1535385938 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-1535385938 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite28_Out-1535385938|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd0~0_In-1535385938 |ULTIMATE.start_main_#t~ite28_Out-1535385938|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1535385938, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1535385938} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1535385938, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1535385938|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1535385938} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 14:05:49,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L824-->L824-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In954607691 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In954607691 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In954607691 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In954607691 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In954607691 |ULTIMATE.start_main_#t~ite29_Out954607691|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite29_Out954607691|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In954607691, ~x$w_buff1_used~0=~x$w_buff1_used~0_In954607691, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In954607691, ~x$w_buff0_used~0=~x$w_buff0_used~0_In954607691} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In954607691, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out954607691|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In954607691, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In954607691, ~x$w_buff0_used~0=~x$w_buff0_used~0_In954607691} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 14:05:49,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L836-->L837: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~x$r_buff0_thd0~0_87 v_~x$r_buff0_thd0~0_86)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_87, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_86, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_27} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:05:49,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L839-->L4: Formula: (and (= v_~x$flush_delayed~0_24 0) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_25 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_173)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ~x$flush_delayed~0=v_~x$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_173, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:05:49,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 14:05:49,681 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_bf9b67ec-a9b9-4f70-8048-359f30c2ed60/bin/uautomizer/witness.graphml [2019-12-07 14:05:49,681 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:05:49,682 INFO L168 Benchmark]: Toolchain (without parser) took 93234.12 ms. Allocated memory was 1.0 GB in the beginning and 7.7 GB in the end (delta: 6.7 GB). Free memory was 939.3 MB in the beginning and 4.6 GB in the end (delta: -3.7 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2019-12-07 14:05:49,683 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:05:49,683 INFO L168 Benchmark]: CACSL2BoogieTranslator took 395.22 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 128.5 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -160.8 MB). Peak memory consumption was 29.1 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:49,684 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:49,684 INFO L168 Benchmark]: Boogie Preprocessor took 26.22 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:05:49,684 INFO L168 Benchmark]: RCFGBuilder took 401.48 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:49,684 INFO L168 Benchmark]: TraceAbstraction took 92285.21 ms. Allocated memory was 1.2 GB in the beginning and 7.7 GB in the end (delta: 6.6 GB). Free memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2019-12-07 14:05:49,685 INFO L168 Benchmark]: Witness Printer took 81.59 ms. Allocated memory is still 7.7 GB. Free memory was 4.6 GB in the beginning and 4.6 GB in the end (delta: 37.7 MB). Peak memory consumption was 37.7 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:49,687 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 395.22 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 128.5 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -160.8 MB). Peak memory consumption was 29.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.05 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.22 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 401.48 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 92285.21 ms. Allocated memory was 1.2 GB in the beginning and 7.7 GB in the end (delta: 6.6 GB). Free memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. * Witness Printer took 81.59 ms. Allocated memory is still 7.7 GB. Free memory was 4.6 GB in the beginning and 4.6 GB in the end (delta: 37.7 MB). Peak memory consumption was 37.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.9s, 175 ProgramPointsBefore, 95 ProgramPointsAfterwards, 212 TransitionsBefore, 107 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 7 FixpointIterations, 32 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 29 ChoiceCompositions, 5405 VarBasedMoverChecksPositive, 232 VarBasedMoverChecksNegative, 72 SemBasedMoverChecksPositive, 228 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.7s, 0 MoverChecksTotal, 79058 CheckedPairsTotal, 111 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L810] FCALL, FORK 0 pthread_create(&t754, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L812] FCALL, FORK 0 pthread_create(&t755, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t756, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L754] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L755] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L756] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L757] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L758] 2 x$r_buff0_thd2 = (_Bool)1 [L761] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L778] 3 y = 2 [L781] 3 __unbuffered_p2_EAX = y [L784] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=0] [L729] 1 z = 1 [L732] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L787] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L735] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L735] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L788] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L736] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L737] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L789] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L790] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L764] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L764] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L765] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L766] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L738] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L820] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L820] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L821] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L822] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L823] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L824] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L827] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L828] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L829] 0 x$flush_delayed = weak$$choice2 [L830] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L831] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L831] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L832] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L832] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L833] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L833] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L834] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L834] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L835] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L835] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L837] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L837] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L838] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 2 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 92.1s, OverallIterations: 22, TraceHistogramMax: 1, AutomataDifference: 14.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3852 SDtfs, 3939 SDslu, 8424 SDs, 0 SdLazy, 5101 SolverSat, 188 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 180 GetRequests, 36 SyntacticMatches, 11 SemanticMatches, 133 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 327 ImplicationChecksByTransitivity, 1.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=231468occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 58.4s AutomataMinimizationTime, 21 MinimizatonAttempts, 225874 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 958 NumberOfCodeBlocks, 958 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 869 ConstructedInterpolants, 0 QuantifiedInterpolants, 157706 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 21 InterpolantComputations, 21 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...