./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix028_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix028_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6e71f442133117d3333b4881fc3c36191654d498 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:12:01,388 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:12:01,389 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:12:01,397 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:12:01,397 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:12:01,398 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:12:01,399 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:12:01,400 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:12:01,401 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:12:01,402 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:12:01,402 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:12:01,403 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:12:01,403 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:12:01,404 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:12:01,405 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:12:01,406 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:12:01,406 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:12:01,407 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:12:01,408 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:12:01,410 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:12:01,411 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:12:01,412 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:12:01,412 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:12:01,413 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:12:01,414 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:12:01,415 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:12:01,415 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:12:01,415 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:12:01,416 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:12:01,416 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:12:01,416 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:12:01,417 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:12:01,417 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:12:01,418 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:12:01,418 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:12:01,418 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:12:01,419 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:12:01,419 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:12:01,419 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:12:01,419 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:12:01,420 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:12:01,420 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:12:01,429 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:12:01,429 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:12:01,430 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:12:01,430 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:12:01,430 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:12:01,431 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:12:01,431 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:12:01,431 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:12:01,431 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:12:01,431 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:12:01,431 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:12:01,431 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:12:01,431 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:12:01,431 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:12:01,432 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:12:01,432 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:12:01,432 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:12:01,432 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:12:01,432 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:12:01,432 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:12:01,432 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:12:01,432 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:12:01,432 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:12:01,433 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:12:01,433 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:12:01,433 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:12:01,433 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:12:01,433 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:12:01,433 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:12:01,433 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6e71f442133117d3333b4881fc3c36191654d498 [2019-12-07 17:12:01,534 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:12:01,544 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:12:01,547 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:12:01,548 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:12:01,549 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:12:01,549 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix028_rmo.oepc.i [2019-12-07 17:12:01,589 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/data/f1624e75a/67e1bf52ab1b4504a057d818cb7fb4be/FLAG615a589c7 [2019-12-07 17:12:02,053 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:12:02,054 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/sv-benchmarks/c/pthread-wmm/mix028_rmo.oepc.i [2019-12-07 17:12:02,064 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/data/f1624e75a/67e1bf52ab1b4504a057d818cb7fb4be/FLAG615a589c7 [2019-12-07 17:12:02,073 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/data/f1624e75a/67e1bf52ab1b4504a057d818cb7fb4be [2019-12-07 17:12:02,075 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:12:02,076 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:12:02,077 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:12:02,077 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:12:02,079 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:12:02,080 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:12:02" (1/1) ... [2019-12-07 17:12:02,082 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@42296d0d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02, skipping insertion in model container [2019-12-07 17:12:02,082 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:12:02" (1/1) ... [2019-12-07 17:12:02,086 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:12:02,114 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:12:02,360 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:12:02,369 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:12:02,414 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:12:02,462 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:12:02,462 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02 WrapperNode [2019-12-07 17:12:02,462 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:12:02,463 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:12:02,463 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:12:02,463 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:12:02,468 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02" (1/1) ... [2019-12-07 17:12:02,482 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02" (1/1) ... [2019-12-07 17:12:02,500 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:12:02,500 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:12:02,500 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:12:02,500 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:12:02,507 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02" (1/1) ... [2019-12-07 17:12:02,507 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02" (1/1) ... [2019-12-07 17:12:02,510 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02" (1/1) ... [2019-12-07 17:12:02,510 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02" (1/1) ... [2019-12-07 17:12:02,517 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02" (1/1) ... [2019-12-07 17:12:02,520 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02" (1/1) ... [2019-12-07 17:12:02,523 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02" (1/1) ... [2019-12-07 17:12:02,525 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:12:02,526 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:12:02,526 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:12:02,526 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:12:02,527 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:12:02,572 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:12:02,572 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:12:02,572 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:12:02,572 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:12:02,573 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:12:02,573 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:12:02,573 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:12:02,573 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:12:02,573 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:12:02,573 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:12:02,573 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:12:02,573 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:12:02,573 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:12:02,574 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:12:02,945 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:12:02,945 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:12:02,946 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:12:02 BoogieIcfgContainer [2019-12-07 17:12:02,946 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:12:02,947 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:12:02,947 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:12:02,949 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:12:02,949 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:12:02" (1/3) ... [2019-12-07 17:12:02,949 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3faacea3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:12:02, skipping insertion in model container [2019-12-07 17:12:02,949 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:12:02" (2/3) ... [2019-12-07 17:12:02,950 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3faacea3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:12:02, skipping insertion in model container [2019-12-07 17:12:02,950 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:12:02" (3/3) ... [2019-12-07 17:12:02,951 INFO L109 eAbstractionObserver]: Analyzing ICFG mix028_rmo.oepc.i [2019-12-07 17:12:02,957 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:12:02,957 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:12:02,962 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:12:02,963 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:12:02,988 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,988 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,988 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,988 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,988 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,988 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,989 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,989 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,989 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,989 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,989 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,993 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,993 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,993 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,993 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,993 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,993 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,994 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,994 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,994 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,994 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,994 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,994 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,994 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,995 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,995 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,995 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,995 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,995 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,995 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,995 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,995 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,996 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,996 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,996 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,996 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,996 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,996 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,996 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,996 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,997 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,997 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,997 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,998 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,998 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,998 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,998 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,998 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,998 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,998 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,998 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,999 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,999 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,999 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,999 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,999 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,999 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,999 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:02,999 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,000 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,000 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,000 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,000 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,000 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,000 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,000 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,000 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,001 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,001 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,001 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,001 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,001 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,001 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,001 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,001 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,009 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,009 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,009 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,009 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,009 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,009 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,009 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,009 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,010 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,010 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,010 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,010 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,010 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,010 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,010 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,010 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,011 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,011 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,011 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,011 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,011 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,011 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,011 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,011 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,011 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,012 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:12:03,022 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:12:03,035 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:12:03,035 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:12:03,035 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:12:03,035 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:12:03,035 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:12:03,035 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:12:03,035 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:12:03,035 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:12:03,046 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 17:12:03,048 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 17:12:03,103 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 17:12:03,103 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:12:03,112 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 682 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:12:03,128 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 17:12:03,156 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 17:12:03,156 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:12:03,161 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 682 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:12:03,177 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 17:12:03,178 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:12:06,398 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 17:12:06,670 WARN L192 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 17:12:06,756 INFO L206 etLargeBlockEncoding]: Checked pairs total: 87070 [2019-12-07 17:12:06,756 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 17:12:06,759 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 17:12:21,248 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115112 states. [2019-12-07 17:12:21,249 INFO L276 IsEmpty]: Start isEmpty. Operand 115112 states. [2019-12-07 17:12:21,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 17:12:21,253 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:12:21,253 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 17:12:21,253 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:12:21,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:12:21,257 INFO L82 PathProgramCache]: Analyzing trace with hash 911890, now seen corresponding path program 1 times [2019-12-07 17:12:21,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:12:21,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1731208283] [2019-12-07 17:12:21,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:12:21,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:12:21,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:12:21,395 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1731208283] [2019-12-07 17:12:21,395 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:12:21,396 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:12:21,396 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2068424264] [2019-12-07 17:12:21,400 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:12:21,400 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:12:21,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:12:21,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:12:21,411 INFO L87 Difference]: Start difference. First operand 115112 states. Second operand 3 states. [2019-12-07 17:12:22,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:12:22,214 INFO L93 Difference]: Finished difference Result 114158 states and 484836 transitions. [2019-12-07 17:12:22,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:12:22,215 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 17:12:22,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:12:22,819 INFO L225 Difference]: With dead ends: 114158 [2019-12-07 17:12:22,819 INFO L226 Difference]: Without dead ends: 107060 [2019-12-07 17:12:22,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:12:26,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107060 states. [2019-12-07 17:12:29,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107060 to 107060. [2019-12-07 17:12:29,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107060 states. [2019-12-07 17:12:29,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107060 states to 107060 states and 454078 transitions. [2019-12-07 17:12:29,741 INFO L78 Accepts]: Start accepts. Automaton has 107060 states and 454078 transitions. Word has length 3 [2019-12-07 17:12:29,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:12:29,741 INFO L462 AbstractCegarLoop]: Abstraction has 107060 states and 454078 transitions. [2019-12-07 17:12:29,741 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:12:29,741 INFO L276 IsEmpty]: Start isEmpty. Operand 107060 states and 454078 transitions. [2019-12-07 17:12:29,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:12:29,745 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:12:29,745 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:12:29,745 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:12:29,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:12:29,745 INFO L82 PathProgramCache]: Analyzing trace with hash 1487504284, now seen corresponding path program 1 times [2019-12-07 17:12:29,746 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:12:29,746 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921597724] [2019-12-07 17:12:29,746 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:12:29,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:12:30,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:12:30,037 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1921597724] [2019-12-07 17:12:30,037 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:12:30,038 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:12:30,038 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1160228228] [2019-12-07 17:12:30,039 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:12:30,039 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:12:30,039 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:12:30,039 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:12:30,039 INFO L87 Difference]: Start difference. First operand 107060 states and 454078 transitions. Second operand 4 states. [2019-12-07 17:12:30,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:12:30,924 INFO L93 Difference]: Finished difference Result 166396 states and 678148 transitions. [2019-12-07 17:12:30,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:12:30,924 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:12:30,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:12:31,362 INFO L225 Difference]: With dead ends: 166396 [2019-12-07 17:12:31,362 INFO L226 Difference]: Without dead ends: 166347 [2019-12-07 17:12:31,363 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:12:36,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166347 states. [2019-12-07 17:12:39,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166347 to 151934. [2019-12-07 17:12:39,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151934 states. [2019-12-07 17:12:40,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151934 states to 151934 states and 627001 transitions. [2019-12-07 17:12:40,307 INFO L78 Accepts]: Start accepts. Automaton has 151934 states and 627001 transitions. Word has length 11 [2019-12-07 17:12:40,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:12:40,307 INFO L462 AbstractCegarLoop]: Abstraction has 151934 states and 627001 transitions. [2019-12-07 17:12:40,307 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:12:40,307 INFO L276 IsEmpty]: Start isEmpty. Operand 151934 states and 627001 transitions. [2019-12-07 17:12:40,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:12:40,311 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:12:40,311 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:12:40,312 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:12:40,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:12:40,312 INFO L82 PathProgramCache]: Analyzing trace with hash 881606285, now seen corresponding path program 1 times [2019-12-07 17:12:40,312 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:12:40,312 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359908981] [2019-12-07 17:12:40,312 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:12:40,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:12:40,367 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:12:40,367 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1359908981] [2019-12-07 17:12:40,368 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:12:40,368 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:12:40,368 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869015058] [2019-12-07 17:12:40,368 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:12:40,368 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:12:40,368 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:12:40,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:12:40,368 INFO L87 Difference]: Start difference. First operand 151934 states and 627001 transitions. Second operand 4 states. [2019-12-07 17:12:41,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:12:41,788 INFO L93 Difference]: Finished difference Result 219060 states and 883268 transitions. [2019-12-07 17:12:41,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:12:41,789 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:12:41,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:12:42,323 INFO L225 Difference]: With dead ends: 219060 [2019-12-07 17:12:42,323 INFO L226 Difference]: Without dead ends: 219004 [2019-12-07 17:12:42,324 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:12:47,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219004 states. [2019-12-07 17:12:50,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219004 to 183373. [2019-12-07 17:12:50,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183373 states. [2019-12-07 17:12:51,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183373 states to 183373 states and 752501 transitions. [2019-12-07 17:12:51,044 INFO L78 Accepts]: Start accepts. Automaton has 183373 states and 752501 transitions. Word has length 13 [2019-12-07 17:12:51,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:12:51,045 INFO L462 AbstractCegarLoop]: Abstraction has 183373 states and 752501 transitions. [2019-12-07 17:12:51,045 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:12:51,045 INFO L276 IsEmpty]: Start isEmpty. Operand 183373 states and 752501 transitions. [2019-12-07 17:12:51,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:12:51,052 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:12:51,052 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:12:51,052 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:12:51,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:12:51,053 INFO L82 PathProgramCache]: Analyzing trace with hash 1702625862, now seen corresponding path program 1 times [2019-12-07 17:12:51,053 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:12:51,053 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1741801587] [2019-12-07 17:12:51,053 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:12:51,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:12:51,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:12:51,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1741801587] [2019-12-07 17:12:51,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:12:51,105 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:12:51,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [378790204] [2019-12-07 17:12:51,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:12:51,106 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:12:51,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:12:51,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:12:51,106 INFO L87 Difference]: Start difference. First operand 183373 states and 752501 transitions. Second operand 4 states. [2019-12-07 17:12:52,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:12:52,192 INFO L93 Difference]: Finished difference Result 227077 states and 928818 transitions. [2019-12-07 17:12:52,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:12:52,192 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 17:12:52,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:12:52,771 INFO L225 Difference]: With dead ends: 227077 [2019-12-07 17:12:52,771 INFO L226 Difference]: Without dead ends: 227077 [2019-12-07 17:12:52,771 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:13:00,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227077 states. [2019-12-07 17:13:03,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227077 to 193528. [2019-12-07 17:13:03,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193528 states. [2019-12-07 17:13:03,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193528 states to 193528 states and 795357 transitions. [2019-12-07 17:13:03,924 INFO L78 Accepts]: Start accepts. Automaton has 193528 states and 795357 transitions. Word has length 16 [2019-12-07 17:13:03,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:03,924 INFO L462 AbstractCegarLoop]: Abstraction has 193528 states and 795357 transitions. [2019-12-07 17:13:03,924 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:13:03,924 INFO L276 IsEmpty]: Start isEmpty. Operand 193528 states and 795357 transitions. [2019-12-07 17:13:03,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:13:03,935 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:03,935 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:03,935 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:03,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:03,936 INFO L82 PathProgramCache]: Analyzing trace with hash 233849806, now seen corresponding path program 1 times [2019-12-07 17:13:03,936 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:03,936 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1301697125] [2019-12-07 17:13:03,936 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:03,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:04,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:04,346 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1301697125] [2019-12-07 17:13:04,347 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:04,347 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:13:04,347 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1591069057] [2019-12-07 17:13:04,347 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:13:04,347 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:04,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:13:04,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:04,347 INFO L87 Difference]: Start difference. First operand 193528 states and 795357 transitions. Second operand 3 states. [2019-12-07 17:13:05,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:05,100 INFO L93 Difference]: Finished difference Result 193528 states and 787109 transitions. [2019-12-07 17:13:05,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:13:05,101 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:13:05,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:05,559 INFO L225 Difference]: With dead ends: 193528 [2019-12-07 17:13:05,559 INFO L226 Difference]: Without dead ends: 193528 [2019-12-07 17:13:05,559 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:10,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193528 states. [2019-12-07 17:13:15,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193528 to 190336. [2019-12-07 17:13:15,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190336 states. [2019-12-07 17:13:16,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190336 states to 190336 states and 775269 transitions. [2019-12-07 17:13:16,033 INFO L78 Accepts]: Start accepts. Automaton has 190336 states and 775269 transitions. Word has length 18 [2019-12-07 17:13:16,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:16,034 INFO L462 AbstractCegarLoop]: Abstraction has 190336 states and 775269 transitions. [2019-12-07 17:13:16,034 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:13:16,034 INFO L276 IsEmpty]: Start isEmpty. Operand 190336 states and 775269 transitions. [2019-12-07 17:13:16,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:13:16,043 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:16,043 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:16,043 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:16,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:16,043 INFO L82 PathProgramCache]: Analyzing trace with hash 1545006780, now seen corresponding path program 1 times [2019-12-07 17:13:16,044 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:16,044 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532264663] [2019-12-07 17:13:16,044 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:16,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:16,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:16,097 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532264663] [2019-12-07 17:13:16,097 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:16,097 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:13:16,097 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1256642689] [2019-12-07 17:13:16,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:13:16,097 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:16,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:13:16,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:16,098 INFO L87 Difference]: Start difference. First operand 190336 states and 775269 transitions. Second operand 3 states. [2019-12-07 17:13:17,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:17,756 INFO L93 Difference]: Finished difference Result 360741 states and 1458049 transitions. [2019-12-07 17:13:17,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:13:17,757 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:13:17,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:18,513 INFO L225 Difference]: With dead ends: 360741 [2019-12-07 17:13:18,513 INFO L226 Difference]: Without dead ends: 316805 [2019-12-07 17:13:18,513 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:25,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 316805 states. [2019-12-07 17:13:29,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 316805 to 301489. [2019-12-07 17:13:29,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301489 states. [2019-12-07 17:13:34,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301489 states to 301489 states and 1222745 transitions. [2019-12-07 17:13:34,624 INFO L78 Accepts]: Start accepts. Automaton has 301489 states and 1222745 transitions. Word has length 18 [2019-12-07 17:13:34,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:34,624 INFO L462 AbstractCegarLoop]: Abstraction has 301489 states and 1222745 transitions. [2019-12-07 17:13:34,625 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:13:34,625 INFO L276 IsEmpty]: Start isEmpty. Operand 301489 states and 1222745 transitions. [2019-12-07 17:13:34,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:13:34,645 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:34,645 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:34,645 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:34,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:34,645 INFO L82 PathProgramCache]: Analyzing trace with hash -984816045, now seen corresponding path program 1 times [2019-12-07 17:13:34,645 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:34,645 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [128978030] [2019-12-07 17:13:34,645 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:34,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:34,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:34,676 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [128978030] [2019-12-07 17:13:34,677 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:34,677 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:13:34,677 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1279981770] [2019-12-07 17:13:34,677 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:13:34,677 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:34,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:13:34,678 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:34,678 INFO L87 Difference]: Start difference. First operand 301489 states and 1222745 transitions. Second operand 3 states. [2019-12-07 17:13:35,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:35,873 INFO L93 Difference]: Finished difference Result 301308 states and 1222018 transitions. [2019-12-07 17:13:35,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:13:35,874 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 17:13:35,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:36,900 INFO L225 Difference]: With dead ends: 301308 [2019-12-07 17:13:36,901 INFO L226 Difference]: Without dead ends: 301021 [2019-12-07 17:13:36,901 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:43,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301021 states. [2019-12-07 17:13:46,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301021 to 301021. [2019-12-07 17:13:46,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301021 states. [2019-12-07 17:13:47,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301021 states to 301021 states and 1221115 transitions. [2019-12-07 17:13:47,997 INFO L78 Accepts]: Start accepts. Automaton has 301021 states and 1221115 transitions. Word has length 19 [2019-12-07 17:13:47,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:47,997 INFO L462 AbstractCegarLoop]: Abstraction has 301021 states and 1221115 transitions. [2019-12-07 17:13:47,997 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:13:47,997 INFO L276 IsEmpty]: Start isEmpty. Operand 301021 states and 1221115 transitions. [2019-12-07 17:13:48,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:13:48,019 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:48,020 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:48,020 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:48,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:48,020 INFO L82 PathProgramCache]: Analyzing trace with hash -1445685088, now seen corresponding path program 1 times [2019-12-07 17:13:48,020 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:48,020 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [481340772] [2019-12-07 17:13:48,020 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:48,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:48,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:48,068 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [481340772] [2019-12-07 17:13:48,068 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:48,068 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:13:48,069 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201965657] [2019-12-07 17:13:48,069 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:13:48,069 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:48,069 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:13:48,069 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:13:48,069 INFO L87 Difference]: Start difference. First operand 301021 states and 1221115 transitions. Second operand 5 states. [2019-12-07 17:13:50,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:50,818 INFO L93 Difference]: Finished difference Result 416206 states and 1659209 transitions. [2019-12-07 17:13:50,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:13:50,819 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:13:50,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:51,838 INFO L225 Difference]: With dead ends: 416206 [2019-12-07 17:13:51,838 INFO L226 Difference]: Without dead ends: 415520 [2019-12-07 17:13:51,839 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:14:03,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 415520 states. [2019-12-07 17:14:07,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 415520 to 316187. [2019-12-07 17:14:07,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 316187 states. [2019-12-07 17:14:08,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316187 states to 316187 states and 1280987 transitions. [2019-12-07 17:14:08,921 INFO L78 Accepts]: Start accepts. Automaton has 316187 states and 1280987 transitions. Word has length 19 [2019-12-07 17:14:08,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:08,921 INFO L462 AbstractCegarLoop]: Abstraction has 316187 states and 1280987 transitions. [2019-12-07 17:14:08,921 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:14:08,921 INFO L276 IsEmpty]: Start isEmpty. Operand 316187 states and 1280987 transitions. [2019-12-07 17:14:08,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 17:14:08,949 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:08,949 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:08,949 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:08,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:08,949 INFO L82 PathProgramCache]: Analyzing trace with hash -1307378169, now seen corresponding path program 1 times [2019-12-07 17:14:08,949 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:08,949 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413398807] [2019-12-07 17:14:08,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:08,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:08,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:08,975 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1413398807] [2019-12-07 17:14:08,975 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:08,975 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:14:08,975 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1673489206] [2019-12-07 17:14:08,976 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:14:08,976 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:08,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:14:08,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:08,976 INFO L87 Difference]: Start difference. First operand 316187 states and 1280987 transitions. Second operand 3 states. [2019-12-07 17:14:09,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:09,163 INFO L93 Difference]: Finished difference Result 61002 states and 194623 transitions. [2019-12-07 17:14:09,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:14:09,164 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 17:14:09,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:09,253 INFO L225 Difference]: With dead ends: 61002 [2019-12-07 17:14:09,253 INFO L226 Difference]: Without dead ends: 61002 [2019-12-07 17:14:09,254 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:09,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61002 states. [2019-12-07 17:14:10,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61002 to 61002. [2019-12-07 17:14:10,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61002 states. [2019-12-07 17:14:10,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61002 states to 61002 states and 194623 transitions. [2019-12-07 17:14:10,180 INFO L78 Accepts]: Start accepts. Automaton has 61002 states and 194623 transitions. Word has length 20 [2019-12-07 17:14:10,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:10,180 INFO L462 AbstractCegarLoop]: Abstraction has 61002 states and 194623 transitions. [2019-12-07 17:14:10,180 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:14:10,180 INFO L276 IsEmpty]: Start isEmpty. Operand 61002 states and 194623 transitions. [2019-12-07 17:14:10,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:14:10,189 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:10,189 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:10,189 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:10,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:10,190 INFO L82 PathProgramCache]: Analyzing trace with hash -989401703, now seen corresponding path program 1 times [2019-12-07 17:14:10,190 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:10,190 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1988637642] [2019-12-07 17:14:10,190 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:10,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:10,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:10,244 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1988637642] [2019-12-07 17:14:10,244 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:10,244 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:14:10,244 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1568668178] [2019-12-07 17:14:10,245 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:14:10,245 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:10,245 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:14:10,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:14:10,245 INFO L87 Difference]: Start difference. First operand 61002 states and 194623 transitions. Second operand 5 states. [2019-12-07 17:14:11,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:11,151 INFO L93 Difference]: Finished difference Result 78492 states and 246776 transitions. [2019-12-07 17:14:11,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:14:11,151 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 17:14:11,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:11,257 INFO L225 Difference]: With dead ends: 78492 [2019-12-07 17:14:11,257 INFO L226 Difference]: Without dead ends: 78443 [2019-12-07 17:14:11,258 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:14:11,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78443 states. [2019-12-07 17:14:12,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78443 to 63988. [2019-12-07 17:14:12,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63988 states. [2019-12-07 17:14:12,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63988 states to 63988 states and 203538 transitions. [2019-12-07 17:14:12,347 INFO L78 Accepts]: Start accepts. Automaton has 63988 states and 203538 transitions. Word has length 22 [2019-12-07 17:14:12,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:12,347 INFO L462 AbstractCegarLoop]: Abstraction has 63988 states and 203538 transitions. [2019-12-07 17:14:12,347 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:14:12,347 INFO L276 IsEmpty]: Start isEmpty. Operand 63988 states and 203538 transitions. [2019-12-07 17:14:12,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:14:12,366 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:12,366 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:12,367 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:12,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:12,367 INFO L82 PathProgramCache]: Analyzing trace with hash 1906532401, now seen corresponding path program 1 times [2019-12-07 17:14:12,367 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:12,367 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2065047280] [2019-12-07 17:14:12,367 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:12,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:12,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:12,395 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2065047280] [2019-12-07 17:14:12,395 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:12,395 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:14:12,395 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1760470428] [2019-12-07 17:14:12,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:14:12,395 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:12,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:14:12,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:12,396 INFO L87 Difference]: Start difference. First operand 63988 states and 203538 transitions. Second operand 3 states. [2019-12-07 17:14:12,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:12,620 INFO L93 Difference]: Finished difference Result 83228 states and 260750 transitions. [2019-12-07 17:14:12,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:14:12,620 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 17:14:12,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:12,737 INFO L225 Difference]: With dead ends: 83228 [2019-12-07 17:14:12,737 INFO L226 Difference]: Without dead ends: 83228 [2019-12-07 17:14:12,737 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:13,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83228 states. [2019-12-07 17:14:13,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83228 to 68742. [2019-12-07 17:14:13,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68742 states. [2019-12-07 17:14:14,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68742 states to 68742 states and 217672 transitions. [2019-12-07 17:14:14,043 INFO L78 Accepts]: Start accepts. Automaton has 68742 states and 217672 transitions. Word has length 27 [2019-12-07 17:14:14,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:14,044 INFO L462 AbstractCegarLoop]: Abstraction has 68742 states and 217672 transitions. [2019-12-07 17:14:14,044 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:14:14,044 INFO L276 IsEmpty]: Start isEmpty. Operand 68742 states and 217672 transitions. [2019-12-07 17:14:14,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:14:14,058 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:14,058 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:14,058 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:14,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:14,059 INFO L82 PathProgramCache]: Analyzing trace with hash 1466938041, now seen corresponding path program 1 times [2019-12-07 17:14:14,059 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:14,059 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62169602] [2019-12-07 17:14:14,059 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:14,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:14,122 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:14,122 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [62169602] [2019-12-07 17:14:14,122 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:14,122 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:14:14,123 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1789556230] [2019-12-07 17:14:14,123 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:14:14,123 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:14,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:14:14,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:14:14,123 INFO L87 Difference]: Start difference. First operand 68742 states and 217672 transitions. Second operand 6 states. [2019-12-07 17:14:14,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:14,936 INFO L93 Difference]: Finished difference Result 161412 states and 504353 transitions. [2019-12-07 17:14:14,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 17:14:14,937 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 17:14:14,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:15,179 INFO L225 Difference]: With dead ends: 161412 [2019-12-07 17:14:15,179 INFO L226 Difference]: Without dead ends: 161283 [2019-12-07 17:14:15,179 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:14:15,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161283 states. [2019-12-07 17:14:17,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161283 to 88304. [2019-12-07 17:14:17,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88304 states. [2019-12-07 17:14:17,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88304 states to 88304 states and 283539 transitions. [2019-12-07 17:14:17,237 INFO L78 Accepts]: Start accepts. Automaton has 88304 states and 283539 transitions. Word has length 27 [2019-12-07 17:14:17,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:17,238 INFO L462 AbstractCegarLoop]: Abstraction has 88304 states and 283539 transitions. [2019-12-07 17:14:17,238 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:14:17,238 INFO L276 IsEmpty]: Start isEmpty. Operand 88304 states and 283539 transitions. [2019-12-07 17:14:17,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:14:17,260 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:17,261 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:17,261 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:17,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:17,261 INFO L82 PathProgramCache]: Analyzing trace with hash -1177717026, now seen corresponding path program 1 times [2019-12-07 17:14:17,261 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:17,261 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781723795] [2019-12-07 17:14:17,261 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:17,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:17,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:17,332 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781723795] [2019-12-07 17:14:17,332 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:17,332 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:14:17,332 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [284572473] [2019-12-07 17:14:17,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:14:17,333 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:17,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:14:17,333 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:14:17,333 INFO L87 Difference]: Start difference. First operand 88304 states and 283539 transitions. Second operand 6 states. [2019-12-07 17:14:18,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:18,234 INFO L93 Difference]: Finished difference Result 136756 states and 426775 transitions. [2019-12-07 17:14:18,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 17:14:18,235 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 17:14:18,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:18,422 INFO L225 Difference]: With dead ends: 136756 [2019-12-07 17:14:18,423 INFO L226 Difference]: Without dead ends: 136692 [2019-12-07 17:14:18,423 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:14:18,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136692 states. [2019-12-07 17:14:20,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136692 to 87996. [2019-12-07 17:14:20,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87996 states. [2019-12-07 17:14:20,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87996 states to 87996 states and 282916 transitions. [2019-12-07 17:14:20,190 INFO L78 Accepts]: Start accepts. Automaton has 87996 states and 282916 transitions. Word has length 28 [2019-12-07 17:14:20,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:20,191 INFO L462 AbstractCegarLoop]: Abstraction has 87996 states and 282916 transitions. [2019-12-07 17:14:20,191 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:14:20,191 INFO L276 IsEmpty]: Start isEmpty. Operand 87996 states and 282916 transitions. [2019-12-07 17:14:20,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:14:20,222 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:20,222 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:20,222 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:20,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:20,223 INFO L82 PathProgramCache]: Analyzing trace with hash 361978144, now seen corresponding path program 1 times [2019-12-07 17:14:20,223 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:20,223 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254200922] [2019-12-07 17:14:20,223 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:20,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:20,431 WARN L192 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 15 [2019-12-07 17:14:20,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:20,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254200922] [2019-12-07 17:14:20,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:20,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:14:20,434 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [234653136] [2019-12-07 17:14:20,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:14:20,435 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:20,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:14:20,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:14:20,435 INFO L87 Difference]: Start difference. First operand 87996 states and 282916 transitions. Second operand 4 states. [2019-12-07 17:14:20,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:20,815 INFO L93 Difference]: Finished difference Result 140038 states and 454361 transitions. [2019-12-07 17:14:20,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:14:20,816 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 17:14:20,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:20,908 INFO L225 Difference]: With dead ends: 140038 [2019-12-07 17:14:20,908 INFO L226 Difference]: Without dead ends: 67250 [2019-12-07 17:14:20,909 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:14:21,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67250 states. [2019-12-07 17:14:21,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67250 to 65271. [2019-12-07 17:14:21,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65271 states. [2019-12-07 17:14:21,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65271 states to 65271 states and 208417 transitions. [2019-12-07 17:14:21,939 INFO L78 Accepts]: Start accepts. Automaton has 65271 states and 208417 transitions. Word has length 30 [2019-12-07 17:14:21,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:21,939 INFO L462 AbstractCegarLoop]: Abstraction has 65271 states and 208417 transitions. [2019-12-07 17:14:21,939 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:14:21,939 INFO L276 IsEmpty]: Start isEmpty. Operand 65271 states and 208417 transitions. [2019-12-07 17:14:21,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:14:21,962 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:21,963 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:21,963 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:21,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:21,963 INFO L82 PathProgramCache]: Analyzing trace with hash 1788536026, now seen corresponding path program 1 times [2019-12-07 17:14:21,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:21,963 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242092198] [2019-12-07 17:14:21,963 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:21,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:21,987 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:21,987 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242092198] [2019-12-07 17:14:21,987 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:21,987 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:14:21,987 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1820020804] [2019-12-07 17:14:21,988 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:14:21,988 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:21,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:14:21,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:14:21,988 INFO L87 Difference]: Start difference. First operand 65271 states and 208417 transitions. Second operand 4 states. [2019-12-07 17:14:22,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:22,063 INFO L93 Difference]: Finished difference Result 25689 states and 78605 transitions. [2019-12-07 17:14:22,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:14:22,064 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 17:14:22,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:22,097 INFO L225 Difference]: With dead ends: 25689 [2019-12-07 17:14:22,097 INFO L226 Difference]: Without dead ends: 25689 [2019-12-07 17:14:22,098 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:14:22,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25689 states. [2019-12-07 17:14:22,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25689 to 23461. [2019-12-07 17:14:22,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23461 states. [2019-12-07 17:14:22,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23461 states to 23461 states and 73105 transitions. [2019-12-07 17:14:22,502 INFO L78 Accepts]: Start accepts. Automaton has 23461 states and 73105 transitions. Word has length 31 [2019-12-07 17:14:22,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:22,503 INFO L462 AbstractCegarLoop]: Abstraction has 23461 states and 73105 transitions. [2019-12-07 17:14:22,503 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:14:22,503 INFO L276 IsEmpty]: Start isEmpty. Operand 23461 states and 73105 transitions. [2019-12-07 17:14:22,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:14:22,520 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:22,520 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:22,520 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:22,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:22,521 INFO L82 PathProgramCache]: Analyzing trace with hash 1088633804, now seen corresponding path program 1 times [2019-12-07 17:14:22,521 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:22,521 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357052584] [2019-12-07 17:14:22,521 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:22,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:22,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:22,579 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [357052584] [2019-12-07 17:14:22,579 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:22,579 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:14:22,580 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [243040986] [2019-12-07 17:14:22,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:14:22,580 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:22,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:14:22,580 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:14:22,580 INFO L87 Difference]: Start difference. First operand 23461 states and 73105 transitions. Second operand 7 states. [2019-12-07 17:14:23,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:23,420 INFO L93 Difference]: Finished difference Result 46299 states and 137696 transitions. [2019-12-07 17:14:23,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 17:14:23,420 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 17:14:23,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:23,474 INFO L225 Difference]: With dead ends: 46299 [2019-12-07 17:14:23,474 INFO L226 Difference]: Without dead ends: 46299 [2019-12-07 17:14:23,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=117, Invalid=303, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:14:23,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46299 states. [2019-12-07 17:14:23,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46299 to 23277. [2019-12-07 17:14:23,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23277 states. [2019-12-07 17:14:23,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23277 states to 23277 states and 72459 transitions. [2019-12-07 17:14:23,967 INFO L78 Accepts]: Start accepts. Automaton has 23277 states and 72459 transitions. Word has length 33 [2019-12-07 17:14:23,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:23,967 INFO L462 AbstractCegarLoop]: Abstraction has 23277 states and 72459 transitions. [2019-12-07 17:14:23,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:14:23,967 INFO L276 IsEmpty]: Start isEmpty. Operand 23277 states and 72459 transitions. [2019-12-07 17:14:23,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:14:23,984 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:23,984 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:23,984 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:23,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:23,985 INFO L82 PathProgramCache]: Analyzing trace with hash 1082826604, now seen corresponding path program 1 times [2019-12-07 17:14:23,985 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:23,985 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127694143] [2019-12-07 17:14:23,985 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:23,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:24,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:24,007 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127694143] [2019-12-07 17:14:24,007 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:24,007 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:14:24,007 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [223126195] [2019-12-07 17:14:24,007 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:14:24,007 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:24,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:14:24,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:24,008 INFO L87 Difference]: Start difference. First operand 23277 states and 72459 transitions. Second operand 3 states. [2019-12-07 17:14:24,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:24,094 INFO L93 Difference]: Finished difference Result 28556 states and 85609 transitions. [2019-12-07 17:14:24,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:14:24,094 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-12-07 17:14:24,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:24,129 INFO L225 Difference]: With dead ends: 28556 [2019-12-07 17:14:24,129 INFO L226 Difference]: Without dead ends: 28556 [2019-12-07 17:14:24,129 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:24,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28556 states. [2019-12-07 17:14:24,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28556 to 20083. [2019-12-07 17:14:24,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20083 states. [2019-12-07 17:14:24,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20083 states to 20083 states and 60491 transitions. [2019-12-07 17:14:24,448 INFO L78 Accepts]: Start accepts. Automaton has 20083 states and 60491 transitions. Word has length 33 [2019-12-07 17:14:24,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:24,448 INFO L462 AbstractCegarLoop]: Abstraction has 20083 states and 60491 transitions. [2019-12-07 17:14:24,448 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:14:24,448 INFO L276 IsEmpty]: Start isEmpty. Operand 20083 states and 60491 transitions. [2019-12-07 17:14:24,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:14:24,462 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:24,462 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:24,462 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:24,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:24,462 INFO L82 PathProgramCache]: Analyzing trace with hash 1090977820, now seen corresponding path program 2 times [2019-12-07 17:14:24,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:24,462 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1389386493] [2019-12-07 17:14:24,462 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:24,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:24,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:24,543 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1389386493] [2019-12-07 17:14:24,543 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:24,544 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:14:24,544 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2039785617] [2019-12-07 17:14:24,544 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:14:24,544 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:24,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:14:24,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:14:24,545 INFO L87 Difference]: Start difference. First operand 20083 states and 60491 transitions. Second operand 8 states. [2019-12-07 17:14:25,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:25,506 INFO L93 Difference]: Finished difference Result 43718 states and 127185 transitions. [2019-12-07 17:14:25,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 17:14:25,506 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 17:14:25,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:25,553 INFO L225 Difference]: With dead ends: 43718 [2019-12-07 17:14:25,553 INFO L226 Difference]: Without dead ends: 43718 [2019-12-07 17:14:25,553 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:14:25,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43718 states. [2019-12-07 17:14:25,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43718 to 20012. [2019-12-07 17:14:25,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20012 states. [2019-12-07 17:14:25,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20012 states to 20012 states and 60280 transitions. [2019-12-07 17:14:25,978 INFO L78 Accepts]: Start accepts. Automaton has 20012 states and 60280 transitions. Word has length 33 [2019-12-07 17:14:25,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:25,978 INFO L462 AbstractCegarLoop]: Abstraction has 20012 states and 60280 transitions. [2019-12-07 17:14:25,978 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:14:25,978 INFO L276 IsEmpty]: Start isEmpty. Operand 20012 states and 60280 transitions. [2019-12-07 17:14:25,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:14:25,992 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:25,992 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:25,992 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:25,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:25,992 INFO L82 PathProgramCache]: Analyzing trace with hash 791261483, now seen corresponding path program 1 times [2019-12-07 17:14:25,992 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:25,993 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1651582477] [2019-12-07 17:14:25,993 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:26,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:26,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:26,084 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1651582477] [2019-12-07 17:14:26,084 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:26,084 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:14:26,084 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [70471558] [2019-12-07 17:14:26,084 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:14:26,084 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:26,084 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:14:26,084 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:14:26,084 INFO L87 Difference]: Start difference. First operand 20012 states and 60280 transitions. Second operand 7 states. [2019-12-07 17:14:26,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:26,722 INFO L93 Difference]: Finished difference Result 31547 states and 92567 transitions. [2019-12-07 17:14:26,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:14:26,722 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 17:14:26,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:26,756 INFO L225 Difference]: With dead ends: 31547 [2019-12-07 17:14:26,756 INFO L226 Difference]: Without dead ends: 31547 [2019-12-07 17:14:26,757 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:14:26,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31547 states. [2019-12-07 17:14:27,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31547 to 19642. [2019-12-07 17:14:27,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19642 states. [2019-12-07 17:14:27,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19642 states to 19642 states and 59394 transitions. [2019-12-07 17:14:27,098 INFO L78 Accepts]: Start accepts. Automaton has 19642 states and 59394 transitions. Word has length 34 [2019-12-07 17:14:27,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:27,098 INFO L462 AbstractCegarLoop]: Abstraction has 19642 states and 59394 transitions. [2019-12-07 17:14:27,098 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:14:27,099 INFO L276 IsEmpty]: Start isEmpty. Operand 19642 states and 59394 transitions. [2019-12-07 17:14:27,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:14:27,113 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:27,113 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:27,113 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:27,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:27,113 INFO L82 PathProgramCache]: Analyzing trace with hash -1244987983, now seen corresponding path program 2 times [2019-12-07 17:14:27,113 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:27,114 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1366353785] [2019-12-07 17:14:27,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:27,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:27,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:27,191 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1366353785] [2019-12-07 17:14:27,191 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:27,191 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:14:27,191 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [996709259] [2019-12-07 17:14:27,192 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:14:27,192 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:27,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:14:27,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:14:27,192 INFO L87 Difference]: Start difference. First operand 19642 states and 59394 transitions. Second operand 7 states. [2019-12-07 17:14:27,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:27,947 INFO L93 Difference]: Finished difference Result 37369 states and 107541 transitions. [2019-12-07 17:14:27,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:14:27,947 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 17:14:27,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:27,986 INFO L225 Difference]: With dead ends: 37369 [2019-12-07 17:14:27,987 INFO L226 Difference]: Without dead ends: 37369 [2019-12-07 17:14:27,987 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:14:28,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37369 states. [2019-12-07 17:14:28,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37369 to 19572. [2019-12-07 17:14:28,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19572 states. [2019-12-07 17:14:28,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19572 states to 19572 states and 59180 transitions. [2019-12-07 17:14:28,362 INFO L78 Accepts]: Start accepts. Automaton has 19572 states and 59180 transitions. Word has length 34 [2019-12-07 17:14:28,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:28,363 INFO L462 AbstractCegarLoop]: Abstraction has 19572 states and 59180 transitions. [2019-12-07 17:14:28,363 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:14:28,363 INFO L276 IsEmpty]: Start isEmpty. Operand 19572 states and 59180 transitions. [2019-12-07 17:14:28,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:14:28,378 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:28,378 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:28,378 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:28,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:28,378 INFO L82 PathProgramCache]: Analyzing trace with hash -851207469, now seen corresponding path program 3 times [2019-12-07 17:14:28,378 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:28,378 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331800034] [2019-12-07 17:14:28,379 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:28,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:28,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:28,476 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [331800034] [2019-12-07 17:14:28,477 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:28,477 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:14:28,477 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2012449634] [2019-12-07 17:14:28,477 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:14:28,477 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:28,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:14:28,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:14:28,477 INFO L87 Difference]: Start difference. First operand 19572 states and 59180 transitions. Second operand 9 states. [2019-12-07 17:14:29,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:29,661 INFO L93 Difference]: Finished difference Result 32440 states and 94956 transitions. [2019-12-07 17:14:29,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 17:14:29,662 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2019-12-07 17:14:29,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:29,694 INFO L225 Difference]: With dead ends: 32440 [2019-12-07 17:14:29,694 INFO L226 Difference]: Without dead ends: 32440 [2019-12-07 17:14:29,695 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=129, Invalid=377, Unknown=0, NotChecked=0, Total=506 [2019-12-07 17:14:29,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32440 states. [2019-12-07 17:14:30,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32440 to 19330. [2019-12-07 17:14:30,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19330 states. [2019-12-07 17:14:30,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19330 states to 19330 states and 58490 transitions. [2019-12-07 17:14:30,045 INFO L78 Accepts]: Start accepts. Automaton has 19330 states and 58490 transitions. Word has length 34 [2019-12-07 17:14:30,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:30,046 INFO L462 AbstractCegarLoop]: Abstraction has 19330 states and 58490 transitions. [2019-12-07 17:14:30,046 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:14:30,046 INFO L276 IsEmpty]: Start isEmpty. Operand 19330 states and 58490 transitions. [2019-12-07 17:14:30,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:14:30,063 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:30,063 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:30,063 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:30,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:30,063 INFO L82 PathProgramCache]: Analyzing trace with hash 217064285, now seen corresponding path program 1 times [2019-12-07 17:14:30,063 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:30,064 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1225800543] [2019-12-07 17:14:30,064 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:30,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:30,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:30,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1225800543] [2019-12-07 17:14:30,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:30,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:14:30,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [975397310] [2019-12-07 17:14:30,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:14:30,106 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:30,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:14:30,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:14:30,106 INFO L87 Difference]: Start difference. First operand 19330 states and 58490 transitions. Second operand 5 states. [2019-12-07 17:14:30,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:30,490 INFO L93 Difference]: Finished difference Result 30678 states and 91368 transitions. [2019-12-07 17:14:30,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:14:30,490 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 17:14:30,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:30,524 INFO L225 Difference]: With dead ends: 30678 [2019-12-07 17:14:30,524 INFO L226 Difference]: Without dead ends: 30678 [2019-12-07 17:14:30,524 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:14:30,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30678 states. [2019-12-07 17:14:30,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30678 to 26831. [2019-12-07 17:14:30,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26831 states. [2019-12-07 17:14:30,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26831 states to 26831 states and 80628 transitions. [2019-12-07 17:14:30,931 INFO L78 Accepts]: Start accepts. Automaton has 26831 states and 80628 transitions. Word has length 41 [2019-12-07 17:14:30,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:30,932 INFO L462 AbstractCegarLoop]: Abstraction has 26831 states and 80628 transitions. [2019-12-07 17:14:30,932 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:14:30,932 INFO L276 IsEmpty]: Start isEmpty. Operand 26831 states and 80628 transitions. [2019-12-07 17:14:30,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:14:30,957 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:30,958 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:30,958 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:30,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:30,958 INFO L82 PathProgramCache]: Analyzing trace with hash 1862086557, now seen corresponding path program 2 times [2019-12-07 17:14:30,958 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:30,958 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1521003716] [2019-12-07 17:14:30,958 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:30,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:31,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:31,010 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1521003716] [2019-12-07 17:14:31,010 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:31,010 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:14:31,010 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [812969974] [2019-12-07 17:14:31,011 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:14:31,011 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:31,011 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:14:31,011 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:31,011 INFO L87 Difference]: Start difference. First operand 26831 states and 80628 transitions. Second operand 3 states. [2019-12-07 17:14:31,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:31,075 INFO L93 Difference]: Finished difference Result 25049 states and 73844 transitions. [2019-12-07 17:14:31,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:14:31,076 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 17:14:31,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:31,105 INFO L225 Difference]: With dead ends: 25049 [2019-12-07 17:14:31,105 INFO L226 Difference]: Without dead ends: 25049 [2019-12-07 17:14:31,106 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:31,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25049 states. [2019-12-07 17:14:31,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25049 to 24753. [2019-12-07 17:14:31,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24753 states. [2019-12-07 17:14:31,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24753 states to 24753 states and 73018 transitions. [2019-12-07 17:14:31,433 INFO L78 Accepts]: Start accepts. Automaton has 24753 states and 73018 transitions. Word has length 41 [2019-12-07 17:14:31,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:31,433 INFO L462 AbstractCegarLoop]: Abstraction has 24753 states and 73018 transitions. [2019-12-07 17:14:31,433 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:14:31,434 INFO L276 IsEmpty]: Start isEmpty. Operand 24753 states and 73018 transitions. [2019-12-07 17:14:31,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 17:14:31,454 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:31,454 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:31,454 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:31,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:31,454 INFO L82 PathProgramCache]: Analyzing trace with hash 884175412, now seen corresponding path program 1 times [2019-12-07 17:14:31,454 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:31,454 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223545254] [2019-12-07 17:14:31,454 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:31,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:31,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:31,493 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1223545254] [2019-12-07 17:14:31,493 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:31,493 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:14:31,493 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1607937006] [2019-12-07 17:14:31,493 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:14:31,493 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:31,493 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:14:31,493 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:14:31,493 INFO L87 Difference]: Start difference. First operand 24753 states and 73018 transitions. Second operand 5 states. [2019-12-07 17:14:31,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:31,557 INFO L93 Difference]: Finished difference Result 23114 states and 69456 transitions. [2019-12-07 17:14:31,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:14:31,557 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 17:14:31,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:31,579 INFO L225 Difference]: With dead ends: 23114 [2019-12-07 17:14:31,579 INFO L226 Difference]: Without dead ends: 21389 [2019-12-07 17:14:31,580 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:14:31,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21389 states. [2019-12-07 17:14:31,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21389 to 13708. [2019-12-07 17:14:31,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13708 states. [2019-12-07 17:14:31,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13708 states to 13708 states and 41709 transitions. [2019-12-07 17:14:31,813 INFO L78 Accepts]: Start accepts. Automaton has 13708 states and 41709 transitions. Word has length 42 [2019-12-07 17:14:31,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:31,813 INFO L462 AbstractCegarLoop]: Abstraction has 13708 states and 41709 transitions. [2019-12-07 17:14:31,813 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:14:31,813 INFO L276 IsEmpty]: Start isEmpty. Operand 13708 states and 41709 transitions. [2019-12-07 17:14:31,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:14:31,825 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:31,825 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:31,825 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:31,825 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:31,825 INFO L82 PathProgramCache]: Analyzing trace with hash 168578630, now seen corresponding path program 1 times [2019-12-07 17:14:31,825 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:31,826 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240581221] [2019-12-07 17:14:31,826 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:31,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:31,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:31,897 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240581221] [2019-12-07 17:14:31,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:31,898 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:14:31,898 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [334269086] [2019-12-07 17:14:31,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:14:31,898 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:31,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:14:31,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:14:31,898 INFO L87 Difference]: Start difference. First operand 13708 states and 41709 transitions. Second operand 7 states. [2019-12-07 17:14:32,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:32,736 INFO L93 Difference]: Finished difference Result 28240 states and 84911 transitions. [2019-12-07 17:14:32,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:14:32,736 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 17:14:32,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:32,766 INFO L225 Difference]: With dead ends: 28240 [2019-12-07 17:14:32,767 INFO L226 Difference]: Without dead ends: 28240 [2019-12-07 17:14:32,767 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:14:32,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28240 states. [2019-12-07 17:14:33,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28240 to 14234. [2019-12-07 17:14:33,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14234 states. [2019-12-07 17:14:33,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14234 states to 14234 states and 43387 transitions. [2019-12-07 17:14:33,068 INFO L78 Accepts]: Start accepts. Automaton has 14234 states and 43387 transitions. Word has length 66 [2019-12-07 17:14:33,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:33,068 INFO L462 AbstractCegarLoop]: Abstraction has 14234 states and 43387 transitions. [2019-12-07 17:14:33,068 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:14:33,069 INFO L276 IsEmpty]: Start isEmpty. Operand 14234 states and 43387 transitions. [2019-12-07 17:14:33,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:14:33,081 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:33,081 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:33,081 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:33,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:33,081 INFO L82 PathProgramCache]: Analyzing trace with hash 712249250, now seen corresponding path program 2 times [2019-12-07 17:14:33,081 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:33,081 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406800817] [2019-12-07 17:14:33,081 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:33,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:33,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:33,290 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1406800817] [2019-12-07 17:14:33,290 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:33,290 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:14:33,290 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1024318272] [2019-12-07 17:14:33,291 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:14:33,291 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:33,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:14:33,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:14:33,291 INFO L87 Difference]: Start difference. First operand 14234 states and 43387 transitions. Second operand 11 states. [2019-12-07 17:14:35,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:35,406 INFO L93 Difference]: Finished difference Result 30779 states and 91870 transitions. [2019-12-07 17:14:35,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 17:14:35,406 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 17:14:35,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:35,440 INFO L225 Difference]: With dead ends: 30779 [2019-12-07 17:14:35,440 INFO L226 Difference]: Without dead ends: 30779 [2019-12-07 17:14:35,440 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 255 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=234, Invalid=888, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 17:14:35,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30779 states. [2019-12-07 17:14:35,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30779 to 14899. [2019-12-07 17:14:35,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14899 states. [2019-12-07 17:14:35,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14899 states to 14899 states and 45256 transitions. [2019-12-07 17:14:35,763 INFO L78 Accepts]: Start accepts. Automaton has 14899 states and 45256 transitions. Word has length 66 [2019-12-07 17:14:35,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:35,763 INFO L462 AbstractCegarLoop]: Abstraction has 14899 states and 45256 transitions. [2019-12-07 17:14:35,763 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:14:35,763 INFO L276 IsEmpty]: Start isEmpty. Operand 14899 states and 45256 transitions. [2019-12-07 17:14:35,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:14:35,776 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:35,776 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:35,776 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:35,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:35,777 INFO L82 PathProgramCache]: Analyzing trace with hash 257156348, now seen corresponding path program 3 times [2019-12-07 17:14:35,777 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:35,777 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [43150444] [2019-12-07 17:14:35,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:35,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:35,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:35,852 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [43150444] [2019-12-07 17:14:35,852 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:35,852 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:14:35,852 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1890022172] [2019-12-07 17:14:35,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:14:35,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:35,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:14:35,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:14:35,853 INFO L87 Difference]: Start difference. First operand 14899 states and 45256 transitions. Second operand 9 states. [2019-12-07 17:14:37,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:37,685 INFO L93 Difference]: Finished difference Result 35127 states and 104383 transitions. [2019-12-07 17:14:37,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-12-07 17:14:37,685 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 17:14:37,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:37,725 INFO L225 Difference]: With dead ends: 35127 [2019-12-07 17:14:37,726 INFO L226 Difference]: Without dead ends: 35127 [2019-12-07 17:14:37,726 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 450 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=283, Invalid=1277, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 17:14:37,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35127 states. [2019-12-07 17:14:38,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35127 to 14017. [2019-12-07 17:14:38,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14017 states. [2019-12-07 17:14:38,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14017 states to 14017 states and 42703 transitions. [2019-12-07 17:14:38,080 INFO L78 Accepts]: Start accepts. Automaton has 14017 states and 42703 transitions. Word has length 66 [2019-12-07 17:14:38,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:38,080 INFO L462 AbstractCegarLoop]: Abstraction has 14017 states and 42703 transitions. [2019-12-07 17:14:38,080 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:14:38,080 INFO L276 IsEmpty]: Start isEmpty. Operand 14017 states and 42703 transitions. [2019-12-07 17:14:38,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:14:38,092 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:38,092 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:38,092 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:38,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:38,093 INFO L82 PathProgramCache]: Analyzing trace with hash 1254491896, now seen corresponding path program 4 times [2019-12-07 17:14:38,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:38,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [934912538] [2019-12-07 17:14:38,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:38,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:38,166 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:38,167 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [934912538] [2019-12-07 17:14:38,167 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:38,167 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:14:38,167 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [207486825] [2019-12-07 17:14:38,167 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:14:38,167 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:38,167 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:14:38,168 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:14:38,168 INFO L87 Difference]: Start difference. First operand 14017 states and 42703 transitions. Second operand 7 states. [2019-12-07 17:14:38,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:38,556 INFO L93 Difference]: Finished difference Result 56720 states and 170913 transitions. [2019-12-07 17:14:38,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:14:38,557 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 17:14:38,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:38,603 INFO L225 Difference]: With dead ends: 56720 [2019-12-07 17:14:38,603 INFO L226 Difference]: Without dead ends: 40054 [2019-12-07 17:14:38,604 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:14:38,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40054 states. [2019-12-07 17:14:38,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40054 to 16603. [2019-12-07 17:14:38,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16603 states. [2019-12-07 17:14:38,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16603 states to 16603 states and 50090 transitions. [2019-12-07 17:14:38,977 INFO L78 Accepts]: Start accepts. Automaton has 16603 states and 50090 transitions. Word has length 66 [2019-12-07 17:14:38,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:38,977 INFO L462 AbstractCegarLoop]: Abstraction has 16603 states and 50090 transitions. [2019-12-07 17:14:38,977 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:14:38,977 INFO L276 IsEmpty]: Start isEmpty. Operand 16603 states and 50090 transitions. [2019-12-07 17:14:38,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:14:38,992 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:38,992 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:38,992 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:38,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:38,992 INFO L82 PathProgramCache]: Analyzing trace with hash 508796180, now seen corresponding path program 5 times [2019-12-07 17:14:38,993 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:38,993 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695455365] [2019-12-07 17:14:38,993 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:39,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:39,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:39,595 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1695455365] [2019-12-07 17:14:39,595 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:39,595 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 17:14:39,596 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1340001266] [2019-12-07 17:14:39,596 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 17:14:39,596 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:39,596 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 17:14:39,596 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=405, Unknown=0, NotChecked=0, Total=462 [2019-12-07 17:14:39,597 INFO L87 Difference]: Start difference. First operand 16603 states and 50090 transitions. Second operand 22 states. [2019-12-07 17:14:40,103 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 43 [2019-12-07 17:14:40,870 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 48 [2019-12-07 17:14:41,047 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 48 [2019-12-07 17:14:41,944 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 50 [2019-12-07 17:14:49,455 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 48 [2019-12-07 17:14:56,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:56,004 INFO L93 Difference]: Finished difference Result 55232 states and 165823 transitions. [2019-12-07 17:14:56,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 186 states. [2019-12-07 17:14:56,004 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 66 [2019-12-07 17:14:56,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:56,066 INFO L225 Difference]: With dead ends: 55232 [2019-12-07 17:14:56,066 INFO L226 Difference]: Without dead ends: 50020 [2019-12-07 17:14:56,076 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 187 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14264 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=3627, Invalid=31905, Unknown=0, NotChecked=0, Total=35532 [2019-12-07 17:14:56,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50020 states. [2019-12-07 17:14:56,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50020 to 18050. [2019-12-07 17:14:56,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18050 states. [2019-12-07 17:14:56,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18050 states to 18050 states and 54376 transitions. [2019-12-07 17:14:56,514 INFO L78 Accepts]: Start accepts. Automaton has 18050 states and 54376 transitions. Word has length 66 [2019-12-07 17:14:56,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:56,514 INFO L462 AbstractCegarLoop]: Abstraction has 18050 states and 54376 transitions. [2019-12-07 17:14:56,514 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 17:14:56,514 INFO L276 IsEmpty]: Start isEmpty. Operand 18050 states and 54376 transitions. [2019-12-07 17:14:56,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:14:56,530 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:56,531 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:56,531 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:56,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:56,531 INFO L82 PathProgramCache]: Analyzing trace with hash -42787360, now seen corresponding path program 6 times [2019-12-07 17:14:56,531 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:56,531 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1289519795] [2019-12-07 17:14:56,531 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:56,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:56,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:56,582 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1289519795] [2019-12-07 17:14:56,582 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:56,582 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:14:56,582 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1925186752] [2019-12-07 17:14:56,582 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:14:56,582 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:56,583 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:14:56,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:56,583 INFO L87 Difference]: Start difference. First operand 18050 states and 54376 transitions. Second operand 3 states. [2019-12-07 17:14:56,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:56,656 INFO L93 Difference]: Finished difference Result 20174 states and 60826 transitions. [2019-12-07 17:14:56,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:14:56,657 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:14:56,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:56,677 INFO L225 Difference]: With dead ends: 20174 [2019-12-07 17:14:56,677 INFO L226 Difference]: Without dead ends: 20174 [2019-12-07 17:14:56,677 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:14:56,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20174 states. [2019-12-07 17:14:56,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20174 to 16678. [2019-12-07 17:14:56,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16678 states. [2019-12-07 17:14:56,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16678 states to 16678 states and 50553 transitions. [2019-12-07 17:14:56,932 INFO L78 Accepts]: Start accepts. Automaton has 16678 states and 50553 transitions. Word has length 66 [2019-12-07 17:14:56,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:56,932 INFO L462 AbstractCegarLoop]: Abstraction has 16678 states and 50553 transitions. [2019-12-07 17:14:56,932 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:14:56,932 INFO L276 IsEmpty]: Start isEmpty. Operand 16678 states and 50553 transitions. [2019-12-07 17:14:56,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:14:56,948 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:56,948 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:56,948 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:56,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:56,949 INFO L82 PathProgramCache]: Analyzing trace with hash -2089790483, now seen corresponding path program 1 times [2019-12-07 17:14:56,949 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:56,949 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476080304] [2019-12-07 17:14:56,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:56,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:57,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:57,016 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [476080304] [2019-12-07 17:14:57,016 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:57,016 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:14:57,016 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1073013834] [2019-12-07 17:14:57,016 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:14:57,016 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:57,017 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:14:57,017 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:14:57,017 INFO L87 Difference]: Start difference. First operand 16678 states and 50553 transitions. Second operand 4 states. [2019-12-07 17:14:57,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:57,092 INFO L93 Difference]: Finished difference Result 30329 states and 92046 transitions. [2019-12-07 17:14:57,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:14:57,092 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 17:14:57,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:57,107 INFO L225 Difference]: With dead ends: 30329 [2019-12-07 17:14:57,107 INFO L226 Difference]: Without dead ends: 13769 [2019-12-07 17:14:57,107 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:14:57,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13769 states. [2019-12-07 17:14:57,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13769 to 13769. [2019-12-07 17:14:57,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13769 states. [2019-12-07 17:14:57,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13769 states to 13769 states and 41560 transitions. [2019-12-07 17:14:57,291 INFO L78 Accepts]: Start accepts. Automaton has 13769 states and 41560 transitions. Word has length 67 [2019-12-07 17:14:57,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:57,291 INFO L462 AbstractCegarLoop]: Abstraction has 13769 states and 41560 transitions. [2019-12-07 17:14:57,291 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:14:57,291 INFO L276 IsEmpty]: Start isEmpty. Operand 13769 states and 41560 transitions. [2019-12-07 17:14:57,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:14:57,303 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:57,303 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:57,303 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:57,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:57,303 INFO L82 PathProgramCache]: Analyzing trace with hash -2050480149, now seen corresponding path program 2 times [2019-12-07 17:14:57,304 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:57,304 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1640463476] [2019-12-07 17:14:57,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:57,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:57,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:57,739 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1640463476] [2019-12-07 17:14:57,739 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:57,739 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:14:57,739 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1865721669] [2019-12-07 17:14:57,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:14:57,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:57,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:14:57,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:14:57,740 INFO L87 Difference]: Start difference. First operand 13769 states and 41560 transitions. Second operand 15 states. [2019-12-07 17:15:00,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:15:00,051 INFO L93 Difference]: Finished difference Result 24331 states and 72594 transitions. [2019-12-07 17:15:00,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 17:15:00,051 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 17:15:00,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:15:00,075 INFO L225 Difference]: With dead ends: 24331 [2019-12-07 17:15:00,075 INFO L226 Difference]: Without dead ends: 23009 [2019-12-07 17:15:00,076 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 768 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=426, Invalid=2436, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 17:15:00,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23009 states. [2019-12-07 17:15:00,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23009 to 18623. [2019-12-07 17:15:00,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18623 states. [2019-12-07 17:15:00,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18623 states to 18623 states and 55831 transitions. [2019-12-07 17:15:00,360 INFO L78 Accepts]: Start accepts. Automaton has 18623 states and 55831 transitions. Word has length 67 [2019-12-07 17:15:00,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:15:00,360 INFO L462 AbstractCegarLoop]: Abstraction has 18623 states and 55831 transitions. [2019-12-07 17:15:00,360 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:15:00,360 INFO L276 IsEmpty]: Start isEmpty. Operand 18623 states and 55831 transitions. [2019-12-07 17:15:00,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:15:00,376 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:15:00,376 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:15:00,376 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:15:00,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:15:00,377 INFO L82 PathProgramCache]: Analyzing trace with hash 13478945, now seen corresponding path program 3 times [2019-12-07 17:15:00,377 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:15:00,377 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335549396] [2019-12-07 17:15:00,377 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:15:00,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:15:00,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:15:00,558 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1335549396] [2019-12-07 17:15:00,558 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:15:00,558 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 17:15:00,559 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [128835258] [2019-12-07 17:15:00,559 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:15:00,559 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:15:00,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:15:00,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:15:00,559 INFO L87 Difference]: Start difference. First operand 18623 states and 55831 transitions. Second operand 13 states. [2019-12-07 17:15:03,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:15:03,085 INFO L93 Difference]: Finished difference Result 30214 states and 88557 transitions. [2019-12-07 17:15:03,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 17:15:03,086 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 17:15:03,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:15:03,114 INFO L225 Difference]: With dead ends: 30214 [2019-12-07 17:15:03,115 INFO L226 Difference]: Without dead ends: 19198 [2019-12-07 17:15:03,115 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=146, Invalid=556, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:15:03,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19198 states. [2019-12-07 17:15:03,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19198 to 15486. [2019-12-07 17:15:03,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15486 states. [2019-12-07 17:15:03,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15486 states to 15486 states and 45647 transitions. [2019-12-07 17:15:03,351 INFO L78 Accepts]: Start accepts. Automaton has 15486 states and 45647 transitions. Word has length 67 [2019-12-07 17:15:03,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:15:03,351 INFO L462 AbstractCegarLoop]: Abstraction has 15486 states and 45647 transitions. [2019-12-07 17:15:03,352 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:15:03,352 INFO L276 IsEmpty]: Start isEmpty. Operand 15486 states and 45647 transitions. [2019-12-07 17:15:03,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:15:03,365 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:15:03,365 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:15:03,365 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:15:03,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:15:03,366 INFO L82 PathProgramCache]: Analyzing trace with hash 1111193301, now seen corresponding path program 4 times [2019-12-07 17:15:03,366 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:15:03,366 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217669604] [2019-12-07 17:15:03,366 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:15:03,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:15:03,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:15:03,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1217669604] [2019-12-07 17:15:03,852 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:15:03,852 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:15:03,852 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [978060762] [2019-12-07 17:15:03,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:15:03,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:15:03,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:15:03,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:15:03,852 INFO L87 Difference]: Start difference. First operand 15486 states and 45647 transitions. Second operand 15 states. [2019-12-07 17:15:05,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:15:05,498 INFO L93 Difference]: Finished difference Result 20386 states and 59344 transitions. [2019-12-07 17:15:05,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 17:15:05,498 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 17:15:05,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:15:05,514 INFO L225 Difference]: With dead ends: 20386 [2019-12-07 17:15:05,515 INFO L226 Difference]: Without dead ends: 19439 [2019-12-07 17:15:05,515 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 558 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=351, Invalid=1905, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 17:15:05,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19439 states. [2019-12-07 17:15:05,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19439 to 16230. [2019-12-07 17:15:05,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16230 states. [2019-12-07 17:15:05,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16230 states to 16230 states and 47845 transitions. [2019-12-07 17:15:05,742 INFO L78 Accepts]: Start accepts. Automaton has 16230 states and 47845 transitions. Word has length 67 [2019-12-07 17:15:05,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:15:05,742 INFO L462 AbstractCegarLoop]: Abstraction has 16230 states and 47845 transitions. [2019-12-07 17:15:05,742 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:15:05,742 INFO L276 IsEmpty]: Start isEmpty. Operand 16230 states and 47845 transitions. [2019-12-07 17:15:05,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:15:05,756 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:15:05,756 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:15:05,756 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:15:05,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:15:05,756 INFO L82 PathProgramCache]: Analyzing trace with hash -1179614883, now seen corresponding path program 5 times [2019-12-07 17:15:05,757 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:15:05,757 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [818810767] [2019-12-07 17:15:05,757 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:15:05,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:15:06,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:15:06,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [818810767] [2019-12-07 17:15:06,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:15:06,105 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:15:06,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [938764254] [2019-12-07 17:15:06,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:15:06,105 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:15:06,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:15:06,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:15:06,106 INFO L87 Difference]: Start difference. First operand 16230 states and 47845 transitions. Second operand 15 states. [2019-12-07 17:15:08,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:15:08,345 INFO L93 Difference]: Finished difference Result 19492 states and 56343 transitions. [2019-12-07 17:15:08,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2019-12-07 17:15:08,346 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 17:15:08,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:15:08,363 INFO L225 Difference]: With dead ends: 19492 [2019-12-07 17:15:08,363 INFO L226 Difference]: Without dead ends: 17655 [2019-12-07 17:15:08,364 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1223 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=648, Invalid=3384, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 17:15:08,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17655 states. [2019-12-07 17:15:08,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17655 to 15590. [2019-12-07 17:15:08,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15590 states. [2019-12-07 17:15:08,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15590 states to 15590 states and 45882 transitions. [2019-12-07 17:15:08,586 INFO L78 Accepts]: Start accepts. Automaton has 15590 states and 45882 transitions. Word has length 67 [2019-12-07 17:15:08,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:15:08,586 INFO L462 AbstractCegarLoop]: Abstraction has 15590 states and 45882 transitions. [2019-12-07 17:15:08,586 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:15:08,586 INFO L276 IsEmpty]: Start isEmpty. Operand 15590 states and 45882 transitions. [2019-12-07 17:15:08,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:15:08,599 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:15:08,599 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:15:08,599 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:15:08,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:15:08,600 INFO L82 PathProgramCache]: Analyzing trace with hash -2057057855, now seen corresponding path program 6 times [2019-12-07 17:15:08,600 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:15:08,600 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695739761] [2019-12-07 17:15:08,600 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:15:08,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:15:09,001 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:15:09,001 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [695739761] [2019-12-07 17:15:09,001 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:15:09,001 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 17:15:09,001 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762328352] [2019-12-07 17:15:09,001 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:15:09,002 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:15:09,002 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:15:09,002 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:15:09,002 INFO L87 Difference]: Start difference. First operand 15590 states and 45882 transitions. Second operand 16 states. [2019-12-07 17:15:11,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:15:11,923 INFO L93 Difference]: Finished difference Result 20138 states and 58528 transitions. [2019-12-07 17:15:11,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2019-12-07 17:15:11,923 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 17:15:11,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:15:11,939 INFO L225 Difference]: With dead ends: 20138 [2019-12-07 17:15:11,939 INFO L226 Difference]: Without dead ends: 17415 [2019-12-07 17:15:11,940 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1540 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=745, Invalid=4225, Unknown=0, NotChecked=0, Total=4970 [2019-12-07 17:15:11,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17415 states. [2019-12-07 17:15:12,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17415 to 15494. [2019-12-07 17:15:12,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15494 states. [2019-12-07 17:15:12,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15494 states to 15494 states and 45610 transitions. [2019-12-07 17:15:12,156 INFO L78 Accepts]: Start accepts. Automaton has 15494 states and 45610 transitions. Word has length 67 [2019-12-07 17:15:12,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:15:12,156 INFO L462 AbstractCegarLoop]: Abstraction has 15494 states and 45610 transitions. [2019-12-07 17:15:12,156 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:15:12,156 INFO L276 IsEmpty]: Start isEmpty. Operand 15494 states and 45610 transitions. [2019-12-07 17:15:12,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:15:12,169 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:15:12,169 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:15:12,170 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:15:12,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:15:12,170 INFO L82 PathProgramCache]: Analyzing trace with hash -697251353, now seen corresponding path program 7 times [2019-12-07 17:15:12,170 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:15:12,170 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1857347074] [2019-12-07 17:15:12,170 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:15:12,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:15:12,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:15:12,627 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1857347074] [2019-12-07 17:15:12,628 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:15:12,628 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 17:15:12,628 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [508325517] [2019-12-07 17:15:12,628 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 17:15:12,628 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:15:12,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 17:15:12,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=259, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:15:12,629 INFO L87 Difference]: Start difference. First operand 15494 states and 45610 transitions. Second operand 18 states. [2019-12-07 17:15:17,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:15:17,530 INFO L93 Difference]: Finished difference Result 21679 states and 63141 transitions. [2019-12-07 17:15:17,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 17:15:17,531 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 67 [2019-12-07 17:15:17,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:15:17,549 INFO L225 Difference]: With dead ends: 21679 [2019-12-07 17:15:17,549 INFO L226 Difference]: Without dead ends: 19184 [2019-12-07 17:15:17,550 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 313 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=283, Invalid=1523, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 17:15:17,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19184 states. [2019-12-07 17:15:17,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19184 to 15638. [2019-12-07 17:15:17,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15638 states. [2019-12-07 17:15:17,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15638 states to 15638 states and 45964 transitions. [2019-12-07 17:15:17,783 INFO L78 Accepts]: Start accepts. Automaton has 15638 states and 45964 transitions. Word has length 67 [2019-12-07 17:15:17,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:15:17,784 INFO L462 AbstractCegarLoop]: Abstraction has 15638 states and 45964 transitions. [2019-12-07 17:15:17,784 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 17:15:17,784 INFO L276 IsEmpty]: Start isEmpty. Operand 15638 states and 45964 transitions. [2019-12-07 17:15:17,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:15:17,797 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:15:17,797 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:15:17,797 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:15:17,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:15:17,798 INFO L82 PathProgramCache]: Analyzing trace with hash -1676819099, now seen corresponding path program 8 times [2019-12-07 17:15:17,798 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:15:17,798 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124416167] [2019-12-07 17:15:17,798 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:15:17,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:15:18,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:15:18,228 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124416167] [2019-12-07 17:15:18,228 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:15:18,228 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:15:18,229 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [361576877] [2019-12-07 17:15:18,229 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:15:18,229 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:15:18,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:15:18,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:15:18,229 INFO L87 Difference]: Start difference. First operand 15638 states and 45964 transitions. Second operand 15 states. [2019-12-07 17:15:20,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:15:20,227 INFO L93 Difference]: Finished difference Result 21443 states and 62623 transitions. [2019-12-07 17:15:20,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 17:15:20,227 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 17:15:20,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:15:20,244 INFO L225 Difference]: With dead ends: 21443 [2019-12-07 17:15:20,244 INFO L226 Difference]: Without dead ends: 20502 [2019-12-07 17:15:20,245 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 766 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=445, Invalid=2417, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 17:15:20,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20502 states. [2019-12-07 17:15:20,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20502 to 16212. [2019-12-07 17:15:20,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16212 states. [2019-12-07 17:15:20,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16212 states to 16212 states and 47637 transitions. [2019-12-07 17:15:20,479 INFO L78 Accepts]: Start accepts. Automaton has 16212 states and 47637 transitions. Word has length 67 [2019-12-07 17:15:20,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:15:20,479 INFO L462 AbstractCegarLoop]: Abstraction has 16212 states and 47637 transitions. [2019-12-07 17:15:20,479 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:15:20,479 INFO L276 IsEmpty]: Start isEmpty. Operand 16212 states and 47637 transitions. [2019-12-07 17:15:20,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:15:20,493 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:15:20,493 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:15:20,493 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:15:20,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:15:20,494 INFO L82 PathProgramCache]: Analyzing trace with hash 387139995, now seen corresponding path program 9 times [2019-12-07 17:15:20,494 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:15:20,494 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201588473] [2019-12-07 17:15:20,494 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:15:20,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:15:20,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:15:20,954 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1201588473] [2019-12-07 17:15:20,954 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:15:20,954 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 17:15:20,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2093921255] [2019-12-07 17:15:20,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 17:15:20,955 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:15:20,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 17:15:20,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=253, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:15:20,955 INFO L87 Difference]: Start difference. First operand 16212 states and 47637 transitions. Second operand 18 states. [2019-12-07 17:15:23,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:15:23,283 INFO L93 Difference]: Finished difference Result 20495 states and 59656 transitions. [2019-12-07 17:15:23,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 17:15:23,284 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 67 [2019-12-07 17:15:23,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:15:23,302 INFO L225 Difference]: With dead ends: 20495 [2019-12-07 17:15:23,302 INFO L226 Difference]: Without dead ends: 19602 [2019-12-07 17:15:23,303 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 863 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=543, Invalid=2879, Unknown=0, NotChecked=0, Total=3422 [2019-12-07 17:15:23,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19602 states. [2019-12-07 17:15:23,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19602 to 16110. [2019-12-07 17:15:23,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16110 states. [2019-12-07 17:15:23,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16110 states to 16110 states and 47343 transitions. [2019-12-07 17:15:23,542 INFO L78 Accepts]: Start accepts. Automaton has 16110 states and 47343 transitions. Word has length 67 [2019-12-07 17:15:23,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:15:23,542 INFO L462 AbstractCegarLoop]: Abstraction has 16110 states and 47343 transitions. [2019-12-07 17:15:23,543 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 17:15:23,543 INFO L276 IsEmpty]: Start isEmpty. Operand 16110 states and 47343 transitions. [2019-12-07 17:15:23,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:15:23,556 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:15:23,556 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:15:23,556 INFO L410 AbstractCegarLoop]: === Iteration 40 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:15:23,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:15:23,556 INFO L82 PathProgramCache]: Analyzing trace with hash 716117493, now seen corresponding path program 10 times [2019-12-07 17:15:23,557 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:15:23,557 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [272584805] [2019-12-07 17:15:23,557 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:15:23,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:15:23,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:15:23,881 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [272584805] [2019-12-07 17:15:23,881 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:15:23,881 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:15:23,881 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [93908163] [2019-12-07 17:15:23,881 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:15:23,881 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:15:23,881 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:15:23,882 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:15:23,882 INFO L87 Difference]: Start difference. First operand 16110 states and 47343 transitions. Second operand 14 states. [2019-12-07 17:15:26,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:15:26,400 INFO L93 Difference]: Finished difference Result 35055 states and 102035 transitions. [2019-12-07 17:15:26,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 17:15:26,401 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 17:15:26,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:15:26,434 INFO L225 Difference]: With dead ends: 35055 [2019-12-07 17:15:26,435 INFO L226 Difference]: Without dead ends: 23708 [2019-12-07 17:15:26,435 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 654 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=401, Invalid=2049, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 17:15:26,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23708 states. [2019-12-07 17:15:26,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23708 to 15043. [2019-12-07 17:15:26,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15043 states. [2019-12-07 17:15:26,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15043 states to 15043 states and 44410 transitions. [2019-12-07 17:15:26,726 INFO L78 Accepts]: Start accepts. Automaton has 15043 states and 44410 transitions. Word has length 67 [2019-12-07 17:15:26,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:15:26,726 INFO L462 AbstractCegarLoop]: Abstraction has 15043 states and 44410 transitions. [2019-12-07 17:15:26,726 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:15:26,726 INFO L276 IsEmpty]: Start isEmpty. Operand 15043 states and 44410 transitions. [2019-12-07 17:15:26,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:15:26,739 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:15:26,739 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:15:26,739 INFO L410 AbstractCegarLoop]: === Iteration 41 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:15:26,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:15:26,739 INFO L82 PathProgramCache]: Analyzing trace with hash 758510863, now seen corresponding path program 11 times [2019-12-07 17:15:26,739 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:15:26,739 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1424691559] [2019-12-07 17:15:26,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:15:26,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:15:27,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:15:27,034 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1424691559] [2019-12-07 17:15:27,034 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:15:27,034 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 17:15:27,034 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1900725629] [2019-12-07 17:15:27,034 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:15:27,035 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:15:27,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:15:27,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:15:27,035 INFO L87 Difference]: Start difference. First operand 15043 states and 44410 transitions. Second operand 16 states. [2019-12-07 17:15:29,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:15:29,607 INFO L93 Difference]: Finished difference Result 25092 states and 72640 transitions. [2019-12-07 17:15:29,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 17:15:29,608 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 17:15:29,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:15:29,626 INFO L225 Difference]: With dead ends: 25092 [2019-12-07 17:15:29,626 INFO L226 Difference]: Without dead ends: 18755 [2019-12-07 17:15:29,627 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 812 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=428, Invalid=2434, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 17:15:29,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18755 states. [2019-12-07 17:15:29,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18755 to 15043. [2019-12-07 17:15:29,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15043 states. [2019-12-07 17:15:29,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15043 states to 15043 states and 44410 transitions. [2019-12-07 17:15:29,861 INFO L78 Accepts]: Start accepts. Automaton has 15043 states and 44410 transitions. Word has length 67 [2019-12-07 17:15:29,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:15:29,861 INFO L462 AbstractCegarLoop]: Abstraction has 15043 states and 44410 transitions. [2019-12-07 17:15:29,861 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:15:29,861 INFO L276 IsEmpty]: Start isEmpty. Operand 15043 states and 44410 transitions. [2019-12-07 17:15:29,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:15:29,874 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:15:29,874 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:15:29,874 INFO L410 AbstractCegarLoop]: === Iteration 42 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:15:29,874 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:15:29,874 INFO L82 PathProgramCache]: Analyzing trace with hash 1556535713, now seen corresponding path program 12 times [2019-12-07 17:15:29,874 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:15:29,874 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411061088] [2019-12-07 17:15:29,875 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:15:29,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:15:30,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:15:30,256 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1411061088] [2019-12-07 17:15:30,256 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:15:30,256 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 17:15:30,256 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2124131660] [2019-12-07 17:15:30,257 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:15:30,257 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:15:30,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:15:30,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:15:30,257 INFO L87 Difference]: Start difference. First operand 15043 states and 44410 transitions. Second operand 16 states. [2019-12-07 17:15:32,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:15:32,913 INFO L93 Difference]: Finished difference Result 23472 states and 68332 transitions. [2019-12-07 17:15:32,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2019-12-07 17:15:32,914 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 17:15:32,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:15:32,941 INFO L225 Difference]: With dead ends: 23472 [2019-12-07 17:15:32,941 INFO L226 Difference]: Without dead ends: 16653 [2019-12-07 17:15:32,942 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1082 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=566, Invalid=3216, Unknown=0, NotChecked=0, Total=3782 [2019-12-07 17:15:33,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16653 states. [2019-12-07 17:15:33,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16653 to 13889. [2019-12-07 17:15:33,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13889 states. [2019-12-07 17:15:33,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13889 states to 13889 states and 41075 transitions. [2019-12-07 17:15:33,152 INFO L78 Accepts]: Start accepts. Automaton has 13889 states and 41075 transitions. Word has length 67 [2019-12-07 17:15:33,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:15:33,152 INFO L462 AbstractCegarLoop]: Abstraction has 13889 states and 41075 transitions. [2019-12-07 17:15:33,153 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:15:33,153 INFO L276 IsEmpty]: Start isEmpty. Operand 13889 states and 41075 transitions. [2019-12-07 17:15:33,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:15:33,165 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:15:33,165 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:15:33,165 INFO L410 AbstractCegarLoop]: === Iteration 43 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:15:33,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:15:33,165 INFO L82 PathProgramCache]: Analyzing trace with hash -1127178005, now seen corresponding path program 13 times [2019-12-07 17:15:33,165 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:15:33,166 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [317024441] [2019-12-07 17:15:33,166 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:15:33,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:15:33,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:15:33,239 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:15:33,239 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:15:33,242 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [893] [893] ULTIMATE.startENTRY-->L823: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= 0 v_~z$r_buff1_thd3~0_333) (= 0 v_~__unbuffered_cnt~0_79) (= v_~z~0_222 0) (= 0 v_~x~0_150) (= 0 v_~z$flush_delayed~0_66) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t757~0.base_43| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t757~0.base_43|) |v_ULTIMATE.start_main_~#t757~0.offset_29| 0))) (= |v_ULTIMATE.start_main_~#t757~0.offset_29| 0) (= v_~__unbuffered_p2_EBX~0_70 0) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t757~0.base_43| 1)) (= v_~y~0_71 0) (= v_~z$read_delayed_var~0.base_8 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$r_buff0_thd1~0_186 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t757~0.base_43|) 0) (= v_~z$w_buff1_used~0_670 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t757~0.base_43|) (= v_~z$r_buff0_thd2~0_110 0) (= 0 v_~weak$$choice0~0_29) (= v_~z$w_buff0~0_701 0) (= v_~z$r_buff1_thd0~0_201 0) (= (store |v_#length_28| |v_ULTIMATE.start_main_~#t757~0.base_43| 4) |v_#length_27|) (= v_~z$read_delayed~0_7 0) (= 0 v_~z$r_buff0_thd3~0_363) (= 0 v_~__unbuffered_p2_EAX~0_62) (= |v_#NULL.offset_5| 0) (= v_~z$mem_tmp~0_43 0) (= v_~z$r_buff0_thd0~0_137 0) (= v_~weak$$choice2~0_160 0) (= v_~z$r_buff1_thd1~0_144 0) (= v_~z$r_buff1_thd2~0_165 0) (= v_~z$w_buff0_used~0_1072 0) (= v_~z$w_buff1~0_410 0) (= v_~main$tmp_guard0~0_24 0) (= v_~main$tmp_guard1~0_54 0) (= 0 |v_#NULL.base_5|) (= v_~z$read_delayed_var~0.offset_8 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_18|, #length=|v_#length_28|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_165, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_46|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_202|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_120|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_137, ULTIMATE.start_main_~#t759~0.offset=|v_ULTIMATE.start_main_~#t759~0.offset_21|, #length=|v_#length_27|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_62, ULTIMATE.start_main_~#t757~0.base=|v_ULTIMATE.start_main_~#t757~0.base_43|, ~z$mem_tmp~0=v_~z$mem_tmp~0_43, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_70, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_670, ~z$flush_delayed~0=v_~z$flush_delayed~0_66, ULTIMATE.start_main_~#t759~0.base=|v_ULTIMATE.start_main_~#t759~0.base_29|, ULTIMATE.start_main_~#t758~0.base=|v_ULTIMATE.start_main_~#t758~0.base_37|, ~weak$$choice0~0=v_~weak$$choice0~0_29, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t757~0.offset=|v_ULTIMATE.start_main_~#t757~0.offset_29|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_144, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_8, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_363, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ~x~0=v_~x~0_150, ULTIMATE.start_main_~#t758~0.offset=|v_ULTIMATE.start_main_~#t758~0.offset_22|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_410, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_54, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_74|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_34|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_201, ~y~0=v_~y~0_71, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_110, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_26|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_1072, ~z$w_buff0~0=v_~z$w_buff0~0_701, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_333, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_80|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_222, ~weak$$choice2~0=v_~weak$$choice2~0_160, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_186} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_~#t758~0.offset, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t759~0.offset, #length, ~__unbuffered_p2_EAX~0, ~y~0, ULTIMATE.start_main_~#t757~0.base, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t759~0.base, #NULL.base, ULTIMATE.start_main_~#t758~0.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t757~0.offset, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:15:33,243 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L823-1-->L825: Formula: (and (= |v_ULTIMATE.start_main_~#t758~0.offset_10| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t758~0.base_11| 4)) (= (store |v_#valid_34| |v_ULTIMATE.start_main_~#t758~0.base_11| 1) |v_#valid_33|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t758~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t758~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t758~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t758~0.base_11|) |v_ULTIMATE.start_main_~#t758~0.offset_10| 1)) |v_#memory_int_13|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t758~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t758~0.base=|v_ULTIMATE.start_main_~#t758~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, ULTIMATE.start_main_~#t758~0.offset=|v_ULTIMATE.start_main_~#t758~0.offset_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t758~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t758~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:15:33,243 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19|) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19| (ite (not (and (not (= (mod v_~z$w_buff0_used~0_174 256) 0)) (not (= (mod v_~z$w_buff1_used~0_104 256) 0)))) 1 0)) (= v_~z$w_buff0_used~0_174 1) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21 0)) (= v_~z$w_buff0~0_53 v_~z$w_buff1~0_38) (= v_~z$w_buff0_used~0_175 v_~z$w_buff1_used~0_104) (= v_P0Thread1of1ForFork0_~arg.offset_19 |v_P0Thread1of1ForFork0_#in~arg.offset_21|) (= v_P0Thread1of1ForFork0_~arg.base_19 |v_P0Thread1of1ForFork0_#in~arg.base_21|) (= 1 v_~z$w_buff0~0_52)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_175, ~z$w_buff0~0=v_~z$w_buff0~0_53, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_174, ~z$w_buff0~0=v_~z$w_buff0~0_52, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_104, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, ~z$w_buff1~0=v_~z$w_buff1~0_38, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_19, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_19} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:15:33,244 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L825-1-->L827: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t759~0.offset_9|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t759~0.base_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t759~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t759~0.base_10|) |v_ULTIMATE.start_main_~#t759~0.offset_9| 2)) |v_#memory_int_11|) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t759~0.base_10| 1) |v_#valid_29|) (not (= |v_ULTIMATE.start_main_~#t759~0.base_10| 0)) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t759~0.base_10|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t759~0.base_10| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t759~0.offset=|v_ULTIMATE.start_main_~#t759~0.offset_9|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t759~0.base=|v_ULTIMATE.start_main_~#t759~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t759~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t759~0.base] because there is no mapped edge [2019-12-07 17:15:33,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L764-2-->L764-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In79140943 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In79140943 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out79140943| ~z$w_buff1~0_In79140943) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out79140943| ~z~0_In79140943)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In79140943, ~z$w_buff1_used~0=~z$w_buff1_used~0_In79140943, ~z$w_buff1~0=~z$w_buff1~0_In79140943, ~z~0=~z~0_In79140943} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out79140943|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In79140943, ~z$w_buff1_used~0=~z$w_buff1_used~0_In79140943, ~z$w_buff1~0=~z$w_buff1~0_In79140943, ~z~0=~z~0_In79140943} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 17:15:33,247 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2037761810 256) 0))) (or (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-2037761810 256)))) (or (and (= (mod ~z$r_buff1_thd3~0_In-2037761810 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-2037761810 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-2037761810 256))))) (= |P2Thread1of1ForFork2_#t~ite20_Out-2037761810| ~z$w_buff0~0_In-2037761810) (= |P2Thread1of1ForFork2_#t~ite21_Out-2037761810| |P2Thread1of1ForFork2_#t~ite20_Out-2037761810|)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite20_In-2037761810| |P2Thread1of1ForFork2_#t~ite20_Out-2037761810|) (= |P2Thread1of1ForFork2_#t~ite21_Out-2037761810| ~z$w_buff0~0_In-2037761810)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-2037761810, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2037761810, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In-2037761810|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2037761810, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2037761810, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2037761810, ~weak$$choice2~0=~weak$$choice2~0_In-2037761810} OutVars{~z$w_buff0~0=~z$w_buff0~0_In-2037761810, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-2037761810|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2037761810, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out-2037761810|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2037761810, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2037761810, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2037761810, ~weak$$choice2~0=~weak$$choice2~0_In-2037761810} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:15:33,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-844671522 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-844671522 256)))) (or (and (= ~z$w_buff0_used~0_In-844671522 |P0Thread1of1ForFork0_#t~ite5_Out-844671522|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-844671522|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-844671522, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-844671522} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-844671522|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-844671522, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-844671522} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:15:33,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L746-->L746-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1975678067 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1975678067 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In1975678067 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1975678067 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1975678067 |P0Thread1of1ForFork0_#t~ite6_Out1975678067|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1975678067|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1975678067, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1975678067, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1975678067, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1975678067} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1975678067|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1975678067, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1975678067, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1975678067, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1975678067} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:15:33,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L748: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1316997125 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1316997125 256))) (.cse1 (= ~z$r_buff0_thd1~0_In-1316997125 ~z$r_buff0_thd1~0_Out-1316997125))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= ~z$r_buff0_thd1~0_Out-1316997125 0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1316997125, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1316997125} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1316997125, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1316997125|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1316997125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:15:33,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L748-->L748-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In1509926528 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1509926528 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1509926528 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1509926528 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out1509926528| ~z$r_buff1_thd1~0_In1509926528)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out1509926528| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1509926528, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1509926528, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1509926528, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1509926528} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1509926528, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1509926528|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1509926528, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1509926528, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1509926528} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:15:33,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L748-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_62 |v_P0Thread1of1ForFork0_#t~ite8_22|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_21|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_62, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:15:33,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2080229506 256)))) (or (and (not .cse0) (= ~z$w_buff1~0_In-2080229506 |P2Thread1of1ForFork2_#t~ite24_Out-2080229506|) (= |P2Thread1of1ForFork2_#t~ite23_In-2080229506| |P2Thread1of1ForFork2_#t~ite23_Out-2080229506|)) (and (= |P2Thread1of1ForFork2_#t~ite24_Out-2080229506| |P2Thread1of1ForFork2_#t~ite23_Out-2080229506|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-2080229506 256)))) (or (and (= (mod ~z$w_buff1_used~0_In-2080229506 256) 0) .cse1) (and (= 0 (mod ~z$r_buff1_thd3~0_In-2080229506 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-2080229506 256)))) (= ~z$w_buff1~0_In-2080229506 |P2Thread1of1ForFork2_#t~ite23_Out-2080229506|)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In-2080229506|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2080229506, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2080229506, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2080229506, ~z$w_buff1~0=~z$w_buff1~0_In-2080229506, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2080229506, ~weak$$choice2~0=~weak$$choice2~0_In-2080229506} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out-2080229506|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out-2080229506|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2080229506, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2080229506, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2080229506, ~z$w_buff1~0=~z$w_buff1~0_In-2080229506, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2080229506, ~weak$$choice2~0=~weak$$choice2~0_In-2080229506} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 17:15:33,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L791-->L791-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1941380017 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite26_Out1941380017| |P2Thread1of1ForFork2_#t~ite27_Out1941380017|) (= |P2Thread1of1ForFork2_#t~ite26_Out1941380017| ~z$w_buff0_used~0_In1941380017) (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1941380017 256)))) (or (and .cse0 (= (mod ~z$w_buff1_used~0_In1941380017 256) 0)) (and .cse0 (= (mod ~z$r_buff1_thd3~0_In1941380017 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In1941380017 256)))) .cse1) (and (= |P2Thread1of1ForFork2_#t~ite26_In1941380017| |P2Thread1of1ForFork2_#t~ite26_Out1941380017|) (= |P2Thread1of1ForFork2_#t~ite27_Out1941380017| ~z$w_buff0_used~0_In1941380017) (not .cse1)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In1941380017|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1941380017, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1941380017, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1941380017, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1941380017, ~weak$$choice2~0=~weak$$choice2~0_In1941380017} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out1941380017|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1941380017, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1941380017, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1941380017, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1941380017, ~weak$$choice2~0=~weak$$choice2~0_In1941380017, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out1941380017|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 17:15:33,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L793-->L794: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_119 v_~z$r_buff0_thd3~0_118)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_119, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_6|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_118, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:15:33,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L764-4-->L765: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~z~0_16) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 17:15:33,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In479377230 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In479377230 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out479377230|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In479377230 |P1Thread1of1ForFork1_#t~ite11_Out479377230|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In479377230, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In479377230} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In479377230, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out479377230|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In479377230} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:15:33,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd2~0_In-1510230751 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1510230751 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1510230751 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1510230751 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-1510230751| 0)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out-1510230751| ~z$w_buff1_used~0_In-1510230751)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1510230751, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1510230751, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1510230751, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1510230751} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1510230751, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1510230751, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1510230751, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1510230751|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1510230751} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:15:33,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In952124720 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In952124720 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out952124720| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out952124720| ~z$r_buff0_thd2~0_In952124720)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In952124720, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In952124720} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In952124720, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out952124720|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In952124720} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 17:15:33,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L796-->L800: Formula: (and (= v_~z~0_64 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_64} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:15:33,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L800-2-->L800-5: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In1394175929 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1394175929 256))) (.cse1 (= |P2Thread1of1ForFork2_#t~ite38_Out1394175929| |P2Thread1of1ForFork2_#t~ite39_Out1394175929|))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite38_Out1394175929| ~z$w_buff1~0_In1394175929) .cse1 (not .cse2)) (and (= |P2Thread1of1ForFork2_#t~ite38_Out1394175929| ~z~0_In1394175929) (or .cse0 .cse2) .cse1))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1394175929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1394175929, ~z$w_buff1~0=~z$w_buff1~0_In1394175929, ~z~0=~z~0_In1394175929} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1394175929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1394175929, ~z$w_buff1~0=~z$w_buff1~0_In1394175929, ~z~0=~z~0_In1394175929, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1394175929|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1394175929|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 17:15:33,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L801-->L801-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In53699057 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In53699057 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite40_Out53699057| 0) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In53699057 |P2Thread1of1ForFork2_#t~ite40_Out53699057|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In53699057, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In53699057} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In53699057, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In53699057, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out53699057|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 17:15:33,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L802-->L802-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In378774015 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In378774015 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In378774015 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In378774015 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite41_Out378774015|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In378774015 |P2Thread1of1ForFork2_#t~ite41_Out378774015|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In378774015, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In378774015, ~z$w_buff1_used~0=~z$w_buff1_used~0_In378774015, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In378774015} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out378774015|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In378774015, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In378774015, ~z$w_buff1_used~0=~z$w_buff1_used~0_In378774015, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In378774015} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 17:15:33,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd2~0_In1186085852 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In1186085852 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1186085852 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1186085852 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out1186085852|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd2~0_In1186085852 |P1Thread1of1ForFork1_#t~ite14_Out1186085852|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1186085852, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1186085852, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1186085852, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1186085852} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1186085852, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1186085852, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1186085852, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1186085852|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1186085852} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:15:33,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_70) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_70, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:15:33,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L803-->L803-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-1101092065 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1101092065 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite42_Out-1101092065|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In-1101092065 |P2Thread1of1ForFork2_#t~ite42_Out-1101092065|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101092065, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101092065} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-1101092065|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101092065, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101092065} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 17:15:33,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1648379615 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1648379615 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1648379615 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-1648379615 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-1648379615|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$r_buff1_thd3~0_In-1648379615 |P2Thread1of1ForFork2_#t~ite43_Out-1648379615|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1648379615, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1648379615, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1648379615, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1648379615} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1648379615, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1648379615, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-1648379615|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1648379615, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1648379615} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 17:15:33,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L804-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_119 |v_P2Thread1of1ForFork2_#t~ite43_26|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_119, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_25|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:15:33,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L827-1-->L833: Formula: (and (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_34) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_9 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:15:33,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L833-2-->L833-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-2059041712 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-2059041712 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out-2059041712| |ULTIMATE.start_main_#t~ite47_Out-2059041712|))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-2059041712| ~z~0_In-2059041712) (or .cse0 .cse1) .cse2) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out-2059041712| ~z$w_buff1~0_In-2059041712) (not .cse1) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2059041712, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2059041712, ~z$w_buff1~0=~z$w_buff1~0_In-2059041712, ~z~0=~z~0_In-2059041712} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2059041712, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-2059041712|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2059041712, ~z$w_buff1~0=~z$w_buff1~0_In-2059041712, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-2059041712|, ~z~0=~z~0_In-2059041712} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:15:33,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2050815803 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2050815803 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out2050815803| 0)) (and (= |ULTIMATE.start_main_#t~ite49_Out2050815803| ~z$w_buff0_used~0_In2050815803) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2050815803, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2050815803} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2050815803, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2050815803, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2050815803|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:15:33,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L835-->L835-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-927322133 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In-927322133 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-927322133 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-927322133 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-927322133|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-927322133 |ULTIMATE.start_main_#t~ite50_Out-927322133|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-927322133, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-927322133, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-927322133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-927322133} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-927322133|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-927322133, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-927322133, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-927322133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-927322133} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:15:33,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L836-->L836-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1832128733 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1832128733 256)))) (or (and (= ~z$r_buff0_thd0~0_In-1832128733 |ULTIMATE.start_main_#t~ite51_Out-1832128733|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out-1832128733|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1832128733, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1832128733} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1832128733, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1832128733|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1832128733} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:15:33,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L837-->L837-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-228981477 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-228981477 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-228981477 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-228981477 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-228981477|)) (and (= ~z$r_buff1_thd0~0_In-228981477 |ULTIMATE.start_main_#t~ite52_Out-228981477|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-228981477, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-228981477, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-228981477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-228981477} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-228981477|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-228981477, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-228981477, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-228981477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-228981477} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:15:33,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L837-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_27 (ite (= 0 (ite (not (and (= v_~y~0_37 2) (= 2 v_~__unbuffered_p2_EAX~0_30) (= v_~__unbuffered_p2_EBX~0_37 0) (= 2 v_~x~0_117))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= (mod v_~main$tmp_guard1~0_27 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~z$r_buff1_thd0~0_162 |v_ULTIMATE.start_main_#t~ite52_69|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_69|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_37, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_30, ~y~0=v_~y~0_37, ~x~0=v_~x~0_117} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_37, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_162, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_30, ~y~0=v_~y~0_37, ~x~0=v_~x~0_117, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:15:33,312 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:15:33 BasicIcfg [2019-12-07 17:15:33,312 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:15:33,312 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:15:33,312 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:15:33,313 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:15:33,313 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:12:02" (3/4) ... [2019-12-07 17:15:33,315 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:15:33,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [893] [893] ULTIMATE.startENTRY-->L823: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= 0 v_~z$r_buff1_thd3~0_333) (= 0 v_~__unbuffered_cnt~0_79) (= v_~z~0_222 0) (= 0 v_~x~0_150) (= 0 v_~z$flush_delayed~0_66) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t757~0.base_43| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t757~0.base_43|) |v_ULTIMATE.start_main_~#t757~0.offset_29| 0))) (= |v_ULTIMATE.start_main_~#t757~0.offset_29| 0) (= v_~__unbuffered_p2_EBX~0_70 0) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t757~0.base_43| 1)) (= v_~y~0_71 0) (= v_~z$read_delayed_var~0.base_8 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$r_buff0_thd1~0_186 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t757~0.base_43|) 0) (= v_~z$w_buff1_used~0_670 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t757~0.base_43|) (= v_~z$r_buff0_thd2~0_110 0) (= 0 v_~weak$$choice0~0_29) (= v_~z$w_buff0~0_701 0) (= v_~z$r_buff1_thd0~0_201 0) (= (store |v_#length_28| |v_ULTIMATE.start_main_~#t757~0.base_43| 4) |v_#length_27|) (= v_~z$read_delayed~0_7 0) (= 0 v_~z$r_buff0_thd3~0_363) (= 0 v_~__unbuffered_p2_EAX~0_62) (= |v_#NULL.offset_5| 0) (= v_~z$mem_tmp~0_43 0) (= v_~z$r_buff0_thd0~0_137 0) (= v_~weak$$choice2~0_160 0) (= v_~z$r_buff1_thd1~0_144 0) (= v_~z$r_buff1_thd2~0_165 0) (= v_~z$w_buff0_used~0_1072 0) (= v_~z$w_buff1~0_410 0) (= v_~main$tmp_guard0~0_24 0) (= v_~main$tmp_guard1~0_54 0) (= 0 |v_#NULL.base_5|) (= v_~z$read_delayed_var~0.offset_8 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_18|, #length=|v_#length_28|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_165, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_46|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_202|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_120|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_137, ULTIMATE.start_main_~#t759~0.offset=|v_ULTIMATE.start_main_~#t759~0.offset_21|, #length=|v_#length_27|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_62, ULTIMATE.start_main_~#t757~0.base=|v_ULTIMATE.start_main_~#t757~0.base_43|, ~z$mem_tmp~0=v_~z$mem_tmp~0_43, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_70, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_670, ~z$flush_delayed~0=v_~z$flush_delayed~0_66, ULTIMATE.start_main_~#t759~0.base=|v_ULTIMATE.start_main_~#t759~0.base_29|, ULTIMATE.start_main_~#t758~0.base=|v_ULTIMATE.start_main_~#t758~0.base_37|, ~weak$$choice0~0=v_~weak$$choice0~0_29, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t757~0.offset=|v_ULTIMATE.start_main_~#t757~0.offset_29|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_144, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_8, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_363, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ~x~0=v_~x~0_150, ULTIMATE.start_main_~#t758~0.offset=|v_ULTIMATE.start_main_~#t758~0.offset_22|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_410, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_54, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_74|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_34|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_201, ~y~0=v_~y~0_71, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_110, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_26|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_1072, ~z$w_buff0~0=v_~z$w_buff0~0_701, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_333, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_80|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_222, ~weak$$choice2~0=v_~weak$$choice2~0_160, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_186} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_~#t758~0.offset, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t759~0.offset, #length, ~__unbuffered_p2_EAX~0, ~y~0, ULTIMATE.start_main_~#t757~0.base, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t759~0.base, #NULL.base, ULTIMATE.start_main_~#t758~0.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t757~0.offset, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:15:33,316 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L823-1-->L825: Formula: (and (= |v_ULTIMATE.start_main_~#t758~0.offset_10| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t758~0.base_11| 4)) (= (store |v_#valid_34| |v_ULTIMATE.start_main_~#t758~0.base_11| 1) |v_#valid_33|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t758~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t758~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t758~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t758~0.base_11|) |v_ULTIMATE.start_main_~#t758~0.offset_10| 1)) |v_#memory_int_13|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t758~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t758~0.base=|v_ULTIMATE.start_main_~#t758~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, ULTIMATE.start_main_~#t758~0.offset=|v_ULTIMATE.start_main_~#t758~0.offset_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t758~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t758~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:15:33,316 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19|) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19| (ite (not (and (not (= (mod v_~z$w_buff0_used~0_174 256) 0)) (not (= (mod v_~z$w_buff1_used~0_104 256) 0)))) 1 0)) (= v_~z$w_buff0_used~0_174 1) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21 0)) (= v_~z$w_buff0~0_53 v_~z$w_buff1~0_38) (= v_~z$w_buff0_used~0_175 v_~z$w_buff1_used~0_104) (= v_P0Thread1of1ForFork0_~arg.offset_19 |v_P0Thread1of1ForFork0_#in~arg.offset_21|) (= v_P0Thread1of1ForFork0_~arg.base_19 |v_P0Thread1of1ForFork0_#in~arg.base_21|) (= 1 v_~z$w_buff0~0_52)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_175, ~z$w_buff0~0=v_~z$w_buff0~0_53, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_174, ~z$w_buff0~0=v_~z$w_buff0~0_52, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_104, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, ~z$w_buff1~0=v_~z$w_buff1~0_38, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_19, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_19} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:15:33,317 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L825-1-->L827: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t759~0.offset_9|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t759~0.base_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t759~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t759~0.base_10|) |v_ULTIMATE.start_main_~#t759~0.offset_9| 2)) |v_#memory_int_11|) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t759~0.base_10| 1) |v_#valid_29|) (not (= |v_ULTIMATE.start_main_~#t759~0.base_10| 0)) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t759~0.base_10|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t759~0.base_10| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t759~0.offset=|v_ULTIMATE.start_main_~#t759~0.offset_9|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t759~0.base=|v_ULTIMATE.start_main_~#t759~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t759~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t759~0.base] because there is no mapped edge [2019-12-07 17:15:33,319 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L764-2-->L764-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In79140943 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In79140943 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out79140943| ~z$w_buff1~0_In79140943) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out79140943| ~z~0_In79140943)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In79140943, ~z$w_buff1_used~0=~z$w_buff1_used~0_In79140943, ~z$w_buff1~0=~z$w_buff1~0_In79140943, ~z~0=~z~0_In79140943} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out79140943|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In79140943, ~z$w_buff1_used~0=~z$w_buff1_used~0_In79140943, ~z$w_buff1~0=~z$w_buff1~0_In79140943, ~z~0=~z~0_In79140943} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 17:15:33,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2037761810 256) 0))) (or (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-2037761810 256)))) (or (and (= (mod ~z$r_buff1_thd3~0_In-2037761810 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-2037761810 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-2037761810 256))))) (= |P2Thread1of1ForFork2_#t~ite20_Out-2037761810| ~z$w_buff0~0_In-2037761810) (= |P2Thread1of1ForFork2_#t~ite21_Out-2037761810| |P2Thread1of1ForFork2_#t~ite20_Out-2037761810|)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite20_In-2037761810| |P2Thread1of1ForFork2_#t~ite20_Out-2037761810|) (= |P2Thread1of1ForFork2_#t~ite21_Out-2037761810| ~z$w_buff0~0_In-2037761810)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-2037761810, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2037761810, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In-2037761810|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2037761810, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2037761810, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2037761810, ~weak$$choice2~0=~weak$$choice2~0_In-2037761810} OutVars{~z$w_buff0~0=~z$w_buff0~0_In-2037761810, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-2037761810|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2037761810, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out-2037761810|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2037761810, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2037761810, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2037761810, ~weak$$choice2~0=~weak$$choice2~0_In-2037761810} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:15:33,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-844671522 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-844671522 256)))) (or (and (= ~z$w_buff0_used~0_In-844671522 |P0Thread1of1ForFork0_#t~ite5_Out-844671522|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-844671522|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-844671522, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-844671522} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-844671522|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-844671522, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-844671522} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:15:33,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L746-->L746-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1975678067 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1975678067 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In1975678067 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1975678067 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1975678067 |P0Thread1of1ForFork0_#t~ite6_Out1975678067|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1975678067|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1975678067, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1975678067, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1975678067, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1975678067} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1975678067|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1975678067, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1975678067, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1975678067, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1975678067} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:15:33,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L748: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1316997125 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1316997125 256))) (.cse1 (= ~z$r_buff0_thd1~0_In-1316997125 ~z$r_buff0_thd1~0_Out-1316997125))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= ~z$r_buff0_thd1~0_Out-1316997125 0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1316997125, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1316997125} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1316997125, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1316997125|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1316997125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:15:33,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L748-->L748-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In1509926528 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1509926528 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1509926528 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1509926528 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out1509926528| ~z$r_buff1_thd1~0_In1509926528)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out1509926528| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1509926528, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1509926528, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1509926528, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1509926528} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1509926528, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1509926528|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1509926528, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1509926528, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1509926528} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:15:33,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L748-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_62 |v_P0Thread1of1ForFork0_#t~ite8_22|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_21|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_62, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:15:33,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2080229506 256)))) (or (and (not .cse0) (= ~z$w_buff1~0_In-2080229506 |P2Thread1of1ForFork2_#t~ite24_Out-2080229506|) (= |P2Thread1of1ForFork2_#t~ite23_In-2080229506| |P2Thread1of1ForFork2_#t~ite23_Out-2080229506|)) (and (= |P2Thread1of1ForFork2_#t~ite24_Out-2080229506| |P2Thread1of1ForFork2_#t~ite23_Out-2080229506|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-2080229506 256)))) (or (and (= (mod ~z$w_buff1_used~0_In-2080229506 256) 0) .cse1) (and (= 0 (mod ~z$r_buff1_thd3~0_In-2080229506 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-2080229506 256)))) (= ~z$w_buff1~0_In-2080229506 |P2Thread1of1ForFork2_#t~ite23_Out-2080229506|)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In-2080229506|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2080229506, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2080229506, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2080229506, ~z$w_buff1~0=~z$w_buff1~0_In-2080229506, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2080229506, ~weak$$choice2~0=~weak$$choice2~0_In-2080229506} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out-2080229506|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out-2080229506|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2080229506, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2080229506, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2080229506, ~z$w_buff1~0=~z$w_buff1~0_In-2080229506, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2080229506, ~weak$$choice2~0=~weak$$choice2~0_In-2080229506} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 17:15:33,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L791-->L791-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1941380017 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite26_Out1941380017| |P2Thread1of1ForFork2_#t~ite27_Out1941380017|) (= |P2Thread1of1ForFork2_#t~ite26_Out1941380017| ~z$w_buff0_used~0_In1941380017) (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1941380017 256)))) (or (and .cse0 (= (mod ~z$w_buff1_used~0_In1941380017 256) 0)) (and .cse0 (= (mod ~z$r_buff1_thd3~0_In1941380017 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In1941380017 256)))) .cse1) (and (= |P2Thread1of1ForFork2_#t~ite26_In1941380017| |P2Thread1of1ForFork2_#t~ite26_Out1941380017|) (= |P2Thread1of1ForFork2_#t~ite27_Out1941380017| ~z$w_buff0_used~0_In1941380017) (not .cse1)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In1941380017|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1941380017, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1941380017, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1941380017, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1941380017, ~weak$$choice2~0=~weak$$choice2~0_In1941380017} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out1941380017|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1941380017, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1941380017, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1941380017, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1941380017, ~weak$$choice2~0=~weak$$choice2~0_In1941380017, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out1941380017|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 17:15:33,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L793-->L794: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_119 v_~z$r_buff0_thd3~0_118)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_119, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_6|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_118, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:15:33,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L764-4-->L765: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~z~0_16) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 17:15:33,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In479377230 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In479377230 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out479377230|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In479377230 |P1Thread1of1ForFork1_#t~ite11_Out479377230|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In479377230, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In479377230} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In479377230, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out479377230|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In479377230} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:15:33,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd2~0_In-1510230751 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1510230751 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1510230751 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1510230751 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-1510230751| 0)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out-1510230751| ~z$w_buff1_used~0_In-1510230751)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1510230751, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1510230751, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1510230751, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1510230751} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1510230751, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1510230751, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1510230751, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1510230751|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1510230751} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:15:33,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In952124720 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In952124720 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out952124720| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out952124720| ~z$r_buff0_thd2~0_In952124720)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In952124720, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In952124720} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In952124720, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out952124720|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In952124720} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 17:15:33,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L796-->L800: Formula: (and (= v_~z~0_64 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_64} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:15:33,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L800-2-->L800-5: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In1394175929 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1394175929 256))) (.cse1 (= |P2Thread1of1ForFork2_#t~ite38_Out1394175929| |P2Thread1of1ForFork2_#t~ite39_Out1394175929|))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite38_Out1394175929| ~z$w_buff1~0_In1394175929) .cse1 (not .cse2)) (and (= |P2Thread1of1ForFork2_#t~ite38_Out1394175929| ~z~0_In1394175929) (or .cse0 .cse2) .cse1))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1394175929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1394175929, ~z$w_buff1~0=~z$w_buff1~0_In1394175929, ~z~0=~z~0_In1394175929} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1394175929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1394175929, ~z$w_buff1~0=~z$w_buff1~0_In1394175929, ~z~0=~z~0_In1394175929, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1394175929|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1394175929|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 17:15:33,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L801-->L801-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In53699057 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In53699057 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite40_Out53699057| 0) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In53699057 |P2Thread1of1ForFork2_#t~ite40_Out53699057|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In53699057, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In53699057} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In53699057, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In53699057, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out53699057|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 17:15:33,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L802-->L802-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In378774015 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In378774015 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In378774015 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In378774015 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite41_Out378774015|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In378774015 |P2Thread1of1ForFork2_#t~ite41_Out378774015|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In378774015, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In378774015, ~z$w_buff1_used~0=~z$w_buff1_used~0_In378774015, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In378774015} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out378774015|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In378774015, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In378774015, ~z$w_buff1_used~0=~z$w_buff1_used~0_In378774015, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In378774015} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 17:15:33,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd2~0_In1186085852 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In1186085852 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1186085852 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1186085852 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out1186085852|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd2~0_In1186085852 |P1Thread1of1ForFork1_#t~ite14_Out1186085852|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1186085852, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1186085852, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1186085852, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1186085852} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1186085852, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1186085852, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1186085852, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1186085852|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1186085852} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:15:33,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_70) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_70, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:15:33,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L803-->L803-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-1101092065 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1101092065 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite42_Out-1101092065|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In-1101092065 |P2Thread1of1ForFork2_#t~ite42_Out-1101092065|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101092065, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101092065} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-1101092065|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101092065, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101092065} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 17:15:33,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1648379615 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1648379615 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1648379615 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-1648379615 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-1648379615|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$r_buff1_thd3~0_In-1648379615 |P2Thread1of1ForFork2_#t~ite43_Out-1648379615|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1648379615, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1648379615, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1648379615, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1648379615} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1648379615, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1648379615, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-1648379615|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1648379615, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1648379615} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 17:15:33,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L804-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_119 |v_P2Thread1of1ForFork2_#t~ite43_26|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_119, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_25|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:15:33,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L827-1-->L833: Formula: (and (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_34) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_9 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:15:33,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L833-2-->L833-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-2059041712 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-2059041712 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out-2059041712| |ULTIMATE.start_main_#t~ite47_Out-2059041712|))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-2059041712| ~z~0_In-2059041712) (or .cse0 .cse1) .cse2) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out-2059041712| ~z$w_buff1~0_In-2059041712) (not .cse1) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2059041712, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2059041712, ~z$w_buff1~0=~z$w_buff1~0_In-2059041712, ~z~0=~z~0_In-2059041712} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2059041712, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-2059041712|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2059041712, ~z$w_buff1~0=~z$w_buff1~0_In-2059041712, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-2059041712|, ~z~0=~z~0_In-2059041712} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:15:33,330 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2050815803 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2050815803 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out2050815803| 0)) (and (= |ULTIMATE.start_main_#t~ite49_Out2050815803| ~z$w_buff0_used~0_In2050815803) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2050815803, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2050815803} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2050815803, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2050815803, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2050815803|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:15:33,330 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L835-->L835-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-927322133 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In-927322133 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-927322133 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-927322133 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-927322133|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-927322133 |ULTIMATE.start_main_#t~ite50_Out-927322133|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-927322133, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-927322133, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-927322133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-927322133} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-927322133|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-927322133, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-927322133, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-927322133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-927322133} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:15:33,331 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L836-->L836-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1832128733 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1832128733 256)))) (or (and (= ~z$r_buff0_thd0~0_In-1832128733 |ULTIMATE.start_main_#t~ite51_Out-1832128733|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out-1832128733|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1832128733, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1832128733} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1832128733, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1832128733|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1832128733} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:15:33,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L837-->L837-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-228981477 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-228981477 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-228981477 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-228981477 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-228981477|)) (and (= ~z$r_buff1_thd0~0_In-228981477 |ULTIMATE.start_main_#t~ite52_Out-228981477|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-228981477, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-228981477, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-228981477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-228981477} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-228981477|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-228981477, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-228981477, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-228981477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-228981477} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:15:33,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L837-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_27 (ite (= 0 (ite (not (and (= v_~y~0_37 2) (= 2 v_~__unbuffered_p2_EAX~0_30) (= v_~__unbuffered_p2_EBX~0_37 0) (= 2 v_~x~0_117))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= (mod v_~main$tmp_guard1~0_27 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~z$r_buff1_thd0~0_162 |v_ULTIMATE.start_main_#t~ite52_69|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_69|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_37, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_30, ~y~0=v_~y~0_37, ~x~0=v_~x~0_117} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_37, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_162, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_30, ~y~0=v_~y~0_37, ~x~0=v_~x~0_117, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:15:33,386 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_0c1921a4-23ff-42e4-8a7e-609e135a9d5b/bin/uautomizer/witness.graphml [2019-12-07 17:15:33,386 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:15:33,387 INFO L168 Benchmark]: Toolchain (without parser) took 211310.71 ms. Allocated memory was 1.0 GB in the beginning and 8.6 GB in the end (delta: 7.6 GB). Free memory was 935.2 MB in the beginning and 2.7 GB in the end (delta: -1.8 GB). Peak memory consumption was 5.8 GB. Max. memory is 11.5 GB. [2019-12-07 17:15:33,387 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 954.1 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:15:33,387 INFO L168 Benchmark]: CACSL2BoogieTranslator took 385.78 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 935.2 MB in the beginning and 1.1 GB in the end (delta: -129.9 MB). Peak memory consumption was 22.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:15:33,388 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 17:15:33,388 INFO L168 Benchmark]: Boogie Preprocessor took 25.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 17:15:33,388 INFO L168 Benchmark]: RCFGBuilder took 420.29 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 57.6 MB). Peak memory consumption was 57.6 MB. Max. memory is 11.5 GB. [2019-12-07 17:15:33,388 INFO L168 Benchmark]: TraceAbstraction took 210365.52 ms. Allocated memory was 1.1 GB in the beginning and 8.6 GB in the end (delta: 7.5 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.7 GB). Peak memory consumption was 5.8 GB. Max. memory is 11.5 GB. [2019-12-07 17:15:33,388 INFO L168 Benchmark]: Witness Printer took 73.42 ms. Allocated memory is still 8.6 GB. Free memory was 2.7 GB in the beginning and 2.7 GB in the end (delta: 46.0 MB). Peak memory consumption was 46.0 MB. Max. memory is 11.5 GB. [2019-12-07 17:15:33,390 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 954.1 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 385.78 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 935.2 MB in the beginning and 1.1 GB in the end (delta: -129.9 MB). Peak memory consumption was 22.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 420.29 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 57.6 MB). Peak memory consumption was 57.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 210365.52 ms. Allocated memory was 1.1 GB in the beginning and 8.6 GB in the end (delta: 7.5 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.7 GB). Peak memory consumption was 5.8 GB. Max. memory is 11.5 GB. * Witness Printer took 73.42 ms. Allocated memory is still 8.6 GB. Free memory was 2.7 GB in the beginning and 2.7 GB in the end (delta: 46.0 MB). Peak memory consumption was 46.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.7s, 175 ProgramPointsBefore, 93 ProgramPointsAfterwards, 212 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 32 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 32 ChoiceCompositions, 6798 VarBasedMoverChecksPositive, 289 VarBasedMoverChecksNegative, 75 SemBasedMoverChecksPositive, 285 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 87070 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L823] FCALL, FORK 0 pthread_create(&t757, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L734] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L735] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L736] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L737] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L738] 1 z$r_buff0_thd1 = (_Bool)1 [L741] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L825] FCALL, FORK 0 pthread_create(&t758, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t759, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L758] 2 x = 2 [L761] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L778] 3 y = 2 [L781] 3 __unbuffered_p2_EAX = y [L784] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L785] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L786] 3 z$flush_delayed = weak$$choice2 [L787] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L788] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=0] [L788] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L744] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L745] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L746] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L789] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L790] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L791] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L792] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=1, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=0] [L792] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=1, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=0] [L765] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L794] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L795] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L800] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L800] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L801] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L767] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L802] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L803] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L833] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L834] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L835] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L836] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 210.2s, OverallIterations: 43, TraceHistogramMax: 1, AutomataDifference: 76.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9863 SDtfs, 19241 SDslu, 39245 SDs, 0 SdLazy, 44309 SolverSat, 1682 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 29.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1126 GetRequests, 60 SyntacticMatches, 53 SemanticMatches, 1013 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24231 ImplicationChecksByTransitivity, 25.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=316187occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 107.1s AutomataMinimizationTime, 42 MinimizatonAttempts, 617769 StatesRemovedByMinimization, 38 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 6.4s InterpolantComputationTime, 1894 NumberOfCodeBlocks, 1894 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 1785 ConstructedInterpolants, 0 QuantifiedInterpolants, 921556 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 42 InterpolantComputations, 42 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...