./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix028_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix028_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 65d5cac0d2b984b8c73f78706c05124f2c583a64 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:24:04,110 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:24:04,111 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:24:04,119 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:24:04,119 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:24:04,119 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:24:04,120 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:24:04,122 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:24:04,123 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:24:04,124 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:24:04,124 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:24:04,125 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:24:04,125 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:24:04,126 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:24:04,126 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:24:04,127 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:24:04,128 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:24:04,128 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:24:04,130 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:24:04,131 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:24:04,133 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:24:04,133 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:24:04,134 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:24:04,135 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:24:04,137 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:24:04,137 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:24:04,137 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:24:04,138 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:24:04,138 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:24:04,139 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:24:04,139 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:24:04,139 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:24:04,140 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:24:04,141 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:24:04,141 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:24:04,142 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:24:04,142 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:24:04,142 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:24:04,143 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:24:04,143 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:24:04,144 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:24:04,145 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:24:04,157 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:24:04,157 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:24:04,158 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:24:04,158 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:24:04,159 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:24:04,159 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:24:04,159 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:24:04,159 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:24:04,160 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:24:04,160 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:24:04,160 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:24:04,160 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:24:04,160 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:24:04,160 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:24:04,161 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:24:04,161 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:24:04,161 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:24:04,161 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:24:04,161 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:24:04,162 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:24:04,162 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:24:04,162 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:24:04,162 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:24:04,162 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:24:04,163 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:24:04,163 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:24:04,163 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:24:04,163 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:24:04,163 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:24:04,163 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 65d5cac0d2b984b8c73f78706c05124f2c583a64 [2019-12-07 17:24:04,262 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:24:04,270 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:24:04,273 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:24:04,274 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:24:04,274 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:24:04,274 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix028_rmo.opt.i [2019-12-07 17:24:04,313 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/data/6add98443/0fa6ac729dc24caf924a5fd5a5dfaea4/FLAGad7274cb9 [2019-12-07 17:24:04,789 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:24:04,789 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/sv-benchmarks/c/pthread-wmm/mix028_rmo.opt.i [2019-12-07 17:24:04,800 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/data/6add98443/0fa6ac729dc24caf924a5fd5a5dfaea4/FLAGad7274cb9 [2019-12-07 17:24:04,809 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/data/6add98443/0fa6ac729dc24caf924a5fd5a5dfaea4 [2019-12-07 17:24:04,811 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:24:04,812 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:24:04,813 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:24:04,813 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:24:04,815 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:24:04,816 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:24:04" (1/1) ... [2019-12-07 17:24:04,818 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c8002ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:04, skipping insertion in model container [2019-12-07 17:24:04,818 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:24:04" (1/1) ... [2019-12-07 17:24:04,823 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:24:04,852 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:24:05,111 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:24:05,121 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:24:05,164 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:24:05,210 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:24:05,211 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05 WrapperNode [2019-12-07 17:24:05,211 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:24:05,211 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:24:05,212 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:24:05,212 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:24:05,217 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05" (1/1) ... [2019-12-07 17:24:05,231 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05" (1/1) ... [2019-12-07 17:24:05,252 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:24:05,252 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:24:05,252 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:24:05,252 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:24:05,258 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05" (1/1) ... [2019-12-07 17:24:05,259 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05" (1/1) ... [2019-12-07 17:24:05,262 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05" (1/1) ... [2019-12-07 17:24:05,262 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05" (1/1) ... [2019-12-07 17:24:05,269 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05" (1/1) ... [2019-12-07 17:24:05,272 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05" (1/1) ... [2019-12-07 17:24:05,275 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05" (1/1) ... [2019-12-07 17:24:05,278 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:24:05,278 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:24:05,278 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:24:05,279 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:24:05,279 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:24:05,320 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:24:05,320 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:24:05,320 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:24:05,320 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:24:05,320 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:24:05,320 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:24:05,320 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:24:05,320 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:24:05,321 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:24:05,321 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:24:05,321 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:24:05,321 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:24:05,321 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:24:05,322 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:24:05,686 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:24:05,686 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:24:05,687 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:24:05 BoogieIcfgContainer [2019-12-07 17:24:05,687 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:24:05,688 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:24:05,688 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:24:05,690 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:24:05,690 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:24:04" (1/3) ... [2019-12-07 17:24:05,690 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2fd57715 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:24:05, skipping insertion in model container [2019-12-07 17:24:05,690 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:24:05" (2/3) ... [2019-12-07 17:24:05,691 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2fd57715 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:24:05, skipping insertion in model container [2019-12-07 17:24:05,691 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:24:05" (3/3) ... [2019-12-07 17:24:05,692 INFO L109 eAbstractionObserver]: Analyzing ICFG mix028_rmo.opt.i [2019-12-07 17:24:05,698 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:24:05,698 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:24:05,703 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:24:05,704 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:24:05,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,727 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,727 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,731 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,731 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,731 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,731 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,731 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,732 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,732 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,732 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,732 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,732 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,732 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,732 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,732 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,733 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,733 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,733 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,733 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,733 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,733 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,733 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,733 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,733 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,734 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,734 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,734 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,734 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,734 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,734 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,734 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,734 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,734 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,735 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,735 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,738 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,738 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,738 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,738 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:24:05,752 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:24:05,768 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:24:05,768 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:24:05,768 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:24:05,768 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:24:05,768 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:24:05,769 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:24:05,769 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:24:05,769 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:24:05,783 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 17:24:05,785 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 17:24:05,855 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 17:24:05,856 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:24:05,868 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 577 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:24:05,881 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 17:24:05,916 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 17:24:05,917 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:24:05,924 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 577 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:24:05,942 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 17:24:05,943 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:24:08,734 WARN L192 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 17:24:08,823 INFO L206 etLargeBlockEncoding]: Checked pairs total: 79058 [2019-12-07 17:24:08,823 INFO L214 etLargeBlockEncoding]: Total number of compositions: 111 [2019-12-07 17:24:08,825 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 17:24:23,625 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115078 states. [2019-12-07 17:24:23,627 INFO L276 IsEmpty]: Start isEmpty. Operand 115078 states. [2019-12-07 17:24:23,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 17:24:23,631 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:24:23,631 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 17:24:23,631 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:24:23,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:24:23,635 INFO L82 PathProgramCache]: Analyzing trace with hash 811621075, now seen corresponding path program 1 times [2019-12-07 17:24:23,640 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:24:23,641 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532247255] [2019-12-07 17:24:23,641 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:24:23,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:24:23,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:24:23,779 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532247255] [2019-12-07 17:24:23,779 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:24:23,779 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:24:23,780 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [516739241] [2019-12-07 17:24:23,782 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:24:23,783 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:24:23,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:24:23,792 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:24:23,793 INFO L87 Difference]: Start difference. First operand 115078 states. Second operand 3 states. [2019-12-07 17:24:24,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:24:24,538 INFO L93 Difference]: Finished difference Result 114778 states and 493920 transitions. [2019-12-07 17:24:24,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:24:24,540 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 17:24:24,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:24:25,157 INFO L225 Difference]: With dead ends: 114778 [2019-12-07 17:24:25,158 INFO L226 Difference]: Without dead ends: 112412 [2019-12-07 17:24:25,159 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:24:30,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112412 states. [2019-12-07 17:24:32,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112412 to 112412. [2019-12-07 17:24:32,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112412 states. [2019-12-07 17:24:32,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112412 states to 112412 states and 484274 transitions. [2019-12-07 17:24:32,545 INFO L78 Accepts]: Start accepts. Automaton has 112412 states and 484274 transitions. Word has length 5 [2019-12-07 17:24:32,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:24:32,546 INFO L462 AbstractCegarLoop]: Abstraction has 112412 states and 484274 transitions. [2019-12-07 17:24:32,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:24:32,546 INFO L276 IsEmpty]: Start isEmpty. Operand 112412 states and 484274 transitions. [2019-12-07 17:24:32,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:24:32,549 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:24:32,549 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:24:32,549 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:24:32,549 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:24:32,549 INFO L82 PathProgramCache]: Analyzing trace with hash -287251583, now seen corresponding path program 1 times [2019-12-07 17:24:32,549 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:24:32,549 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1122579755] [2019-12-07 17:24:32,550 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:24:32,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:24:32,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:24:32,607 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1122579755] [2019-12-07 17:24:32,607 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:24:32,607 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:24:32,608 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [571414659] [2019-12-07 17:24:32,608 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:24:32,609 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:24:32,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:24:32,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:24:32,609 INFO L87 Difference]: Start difference. First operand 112412 states and 484274 transitions. Second operand 4 states. [2019-12-07 17:24:34,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:24:34,035 INFO L93 Difference]: Finished difference Result 180702 states and 747767 transitions. [2019-12-07 17:24:34,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:24:34,035 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:24:34,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:24:34,468 INFO L225 Difference]: With dead ends: 180702 [2019-12-07 17:24:34,468 INFO L226 Difference]: Without dead ends: 180653 [2019-12-07 17:24:34,469 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:24:41,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180653 states. [2019-12-07 17:24:43,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180653 to 165577. [2019-12-07 17:24:43,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165577 states. [2019-12-07 17:24:43,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165577 states to 165577 states and 693075 transitions. [2019-12-07 17:24:43,742 INFO L78 Accepts]: Start accepts. Automaton has 165577 states and 693075 transitions. Word has length 11 [2019-12-07 17:24:43,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:24:43,742 INFO L462 AbstractCegarLoop]: Abstraction has 165577 states and 693075 transitions. [2019-12-07 17:24:43,742 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:24:43,742 INFO L276 IsEmpty]: Start isEmpty. Operand 165577 states and 693075 transitions. [2019-12-07 17:24:43,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:24:43,748 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:24:43,749 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:24:43,749 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:24:43,749 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:24:43,749 INFO L82 PathProgramCache]: Analyzing trace with hash 228163746, now seen corresponding path program 1 times [2019-12-07 17:24:43,749 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:24:43,750 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748571383] [2019-12-07 17:24:43,750 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:24:43,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:24:43,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:24:43,796 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748571383] [2019-12-07 17:24:43,797 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:24:43,797 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:24:43,797 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1314924301] [2019-12-07 17:24:43,797 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:24:43,797 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:24:43,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:24:43,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:24:43,798 INFO L87 Difference]: Start difference. First operand 165577 states and 693075 transitions. Second operand 4 states. [2019-12-07 17:24:45,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:24:45,523 INFO L93 Difference]: Finished difference Result 235681 states and 964563 transitions. [2019-12-07 17:24:45,524 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:24:45,524 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:24:45,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:24:46,144 INFO L225 Difference]: With dead ends: 235681 [2019-12-07 17:24:46,144 INFO L226 Difference]: Without dead ends: 235618 [2019-12-07 17:24:46,145 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:24:51,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235618 states. [2019-12-07 17:24:57,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235618 to 199613. [2019-12-07 17:24:57,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199613 states. [2019-12-07 17:24:57,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199613 states to 199613 states and 830031 transitions. [2019-12-07 17:24:57,765 INFO L78 Accepts]: Start accepts. Automaton has 199613 states and 830031 transitions. Word has length 13 [2019-12-07 17:24:57,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:24:57,766 INFO L462 AbstractCegarLoop]: Abstraction has 199613 states and 830031 transitions. [2019-12-07 17:24:57,766 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:24:57,766 INFO L276 IsEmpty]: Start isEmpty. Operand 199613 states and 830031 transitions. [2019-12-07 17:24:57,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:24:57,769 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:24:57,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:24:57,769 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:24:57,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:24:57,770 INFO L82 PathProgramCache]: Analyzing trace with hash 986322522, now seen corresponding path program 1 times [2019-12-07 17:24:57,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:24:57,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665685434] [2019-12-07 17:24:57,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:24:57,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:24:57,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:24:57,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665685434] [2019-12-07 17:24:57,819 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:24:57,819 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:24:57,819 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1393045231] [2019-12-07 17:24:57,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:24:57,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:24:57,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:24:57,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:24:57,820 INFO L87 Difference]: Start difference. First operand 199613 states and 830031 transitions. Second operand 4 states. [2019-12-07 17:24:59,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:24:59,463 INFO L93 Difference]: Finished difference Result 248914 states and 1025031 transitions. [2019-12-07 17:24:59,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:24:59,464 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:24:59,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:25:00,093 INFO L225 Difference]: With dead ends: 248914 [2019-12-07 17:25:00,093 INFO L226 Difference]: Without dead ends: 248914 [2019-12-07 17:25:00,093 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:25:06,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248914 states. [2019-12-07 17:25:09,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248914 to 210888. [2019-12-07 17:25:09,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210888 states. [2019-12-07 17:25:10,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210888 states to 210888 states and 876967 transitions. [2019-12-07 17:25:10,166 INFO L78 Accepts]: Start accepts. Automaton has 210888 states and 876967 transitions. Word has length 13 [2019-12-07 17:25:10,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:25:10,167 INFO L462 AbstractCegarLoop]: Abstraction has 210888 states and 876967 transitions. [2019-12-07 17:25:10,167 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:25:10,167 INFO L276 IsEmpty]: Start isEmpty. Operand 210888 states and 876967 transitions. [2019-12-07 17:25:10,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:25:10,187 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:25:10,187 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:25:10,187 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:25:10,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:25:10,188 INFO L82 PathProgramCache]: Analyzing trace with hash -462367392, now seen corresponding path program 1 times [2019-12-07 17:25:10,188 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:25:10,188 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1404134076] [2019-12-07 17:25:10,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:25:10,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:25:10,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:25:10,258 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1404134076] [2019-12-07 17:25:10,258 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:25:10,259 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:25:10,259 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [539537826] [2019-12-07 17:25:10,259 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:25:10,259 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:25:10,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:25:10,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:25:10,259 INFO L87 Difference]: Start difference. First operand 210888 states and 876967 transitions. Second operand 5 states. [2019-12-07 17:25:15,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:25:15,296 INFO L93 Difference]: Finished difference Result 307547 states and 1250410 transitions. [2019-12-07 17:25:15,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:25:15,296 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:25:15,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:25:16,044 INFO L225 Difference]: With dead ends: 307547 [2019-12-07 17:25:16,044 INFO L226 Difference]: Without dead ends: 307407 [2019-12-07 17:25:16,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:25:22,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307407 states. [2019-12-07 17:25:26,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307407 to 231468. [2019-12-07 17:25:26,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231468 states. [2019-12-07 17:25:26,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231468 states to 231468 states and 958023 transitions. [2019-12-07 17:25:26,940 INFO L78 Accepts]: Start accepts. Automaton has 231468 states and 958023 transitions. Word has length 19 [2019-12-07 17:25:26,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:25:26,940 INFO L462 AbstractCegarLoop]: Abstraction has 231468 states and 958023 transitions. [2019-12-07 17:25:26,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:25:26,940 INFO L276 IsEmpty]: Start isEmpty. Operand 231468 states and 958023 transitions. [2019-12-07 17:25:26,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:25:26,951 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:25:26,951 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:25:26,952 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:25:26,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:25:26,952 INFO L82 PathProgramCache]: Analyzing trace with hash 1565841874, now seen corresponding path program 1 times [2019-12-07 17:25:26,952 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:25:26,952 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [515509660] [2019-12-07 17:25:26,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:25:26,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:25:26,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:25:26,991 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [515509660] [2019-12-07 17:25:26,991 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:25:26,991 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:25:26,991 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [879050356] [2019-12-07 17:25:26,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:25:26,992 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:25:26,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:25:26,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:25:26,992 INFO L87 Difference]: Start difference. First operand 231468 states and 958023 transitions. Second operand 5 states. [2019-12-07 17:25:29,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:25:29,188 INFO L93 Difference]: Finished difference Result 336881 states and 1367511 transitions. [2019-12-07 17:25:29,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:25:29,189 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:25:29,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:25:30,629 INFO L225 Difference]: With dead ends: 336881 [2019-12-07 17:25:30,629 INFO L226 Difference]: Without dead ends: 336818 [2019-12-07 17:25:30,629 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:25:40,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336818 states. [2019-12-07 17:25:44,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336818 to 236903. [2019-12-07 17:25:44,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236903 states. [2019-12-07 17:25:45,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236903 states to 236903 states and 979540 transitions. [2019-12-07 17:25:45,031 INFO L78 Accepts]: Start accepts. Automaton has 236903 states and 979540 transitions. Word has length 19 [2019-12-07 17:25:45,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:25:45,031 INFO L462 AbstractCegarLoop]: Abstraction has 236903 states and 979540 transitions. [2019-12-07 17:25:45,031 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:25:45,031 INFO L276 IsEmpty]: Start isEmpty. Operand 236903 states and 979540 transitions. [2019-12-07 17:25:45,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:25:45,045 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:25:45,045 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:25:45,045 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:25:45,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:25:45,045 INFO L82 PathProgramCache]: Analyzing trace with hash 1619434579, now seen corresponding path program 1 times [2019-12-07 17:25:45,045 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:25:45,045 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79709647] [2019-12-07 17:25:45,045 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:25:45,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:25:45,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:25:45,112 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [79709647] [2019-12-07 17:25:45,113 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:25:45,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:25:45,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [972982966] [2019-12-07 17:25:45,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:25:45,113 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:25:45,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:25:45,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:25:45,114 INFO L87 Difference]: Start difference. First operand 236903 states and 979540 transitions. Second operand 5 states. [2019-12-07 17:25:47,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:25:47,373 INFO L93 Difference]: Finished difference Result 346916 states and 1409827 transitions. [2019-12-07 17:25:47,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:25:47,374 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:25:47,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:25:48,241 INFO L225 Difference]: With dead ends: 346916 [2019-12-07 17:25:48,241 INFO L226 Difference]: Without dead ends: 346853 [2019-12-07 17:25:48,242 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:25:55,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346853 states. [2019-12-07 17:26:00,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346853 to 254808. [2019-12-07 17:26:00,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254808 states. [2019-12-07 17:26:00,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254808 states to 254808 states and 1052340 transitions. [2019-12-07 17:26:00,794 INFO L78 Accepts]: Start accepts. Automaton has 254808 states and 1052340 transitions. Word has length 19 [2019-12-07 17:26:00,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:00,795 INFO L462 AbstractCegarLoop]: Abstraction has 254808 states and 1052340 transitions. [2019-12-07 17:26:00,795 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:26:00,795 INFO L276 IsEmpty]: Start isEmpty. Operand 254808 states and 1052340 transitions. [2019-12-07 17:26:00,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:26:00,852 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:00,852 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:00,852 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:00,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:00,853 INFO L82 PathProgramCache]: Analyzing trace with hash -1274808359, now seen corresponding path program 1 times [2019-12-07 17:26:00,853 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:00,853 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1687850932] [2019-12-07 17:26:00,853 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:00,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:00,900 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:00,901 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1687850932] [2019-12-07 17:26:00,901 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:00,901 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:26:00,901 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371733533] [2019-12-07 17:26:00,901 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:26:00,901 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:00,901 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:26:00,901 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:26:00,902 INFO L87 Difference]: Start difference. First operand 254808 states and 1052340 transitions. Second operand 6 states. [2019-12-07 17:26:03,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:03,386 INFO L93 Difference]: Finished difference Result 304347 states and 1241932 transitions. [2019-12-07 17:26:03,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:26:03,387 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 17:26:03,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:07,662 INFO L225 Difference]: With dead ends: 304347 [2019-12-07 17:26:07,662 INFO L226 Difference]: Without dead ends: 304207 [2019-12-07 17:26:07,662 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2019-12-07 17:26:14,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304207 states. [2019-12-07 17:26:17,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304207 to 209314. [2019-12-07 17:26:17,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209314 states. [2019-12-07 17:26:18,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209314 states to 209314 states and 868471 transitions. [2019-12-07 17:26:18,235 INFO L78 Accepts]: Start accepts. Automaton has 209314 states and 868471 transitions. Word has length 25 [2019-12-07 17:26:18,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:18,235 INFO L462 AbstractCegarLoop]: Abstraction has 209314 states and 868471 transitions. [2019-12-07 17:26:18,236 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:26:18,236 INFO L276 IsEmpty]: Start isEmpty. Operand 209314 states and 868471 transitions. [2019-12-07 17:26:18,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:26:18,308 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:18,308 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:18,308 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:18,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:18,308 INFO L82 PathProgramCache]: Analyzing trace with hash -730041914, now seen corresponding path program 1 times [2019-12-07 17:26:18,308 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:18,308 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1332178486] [2019-12-07 17:26:18,309 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:18,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:18,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:18,341 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1332178486] [2019-12-07 17:26:18,341 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:18,341 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:26:18,342 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584222615] [2019-12-07 17:26:18,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:26:18,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:18,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:26:18,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:18,342 INFO L87 Difference]: Start difference. First operand 209314 states and 868471 transitions. Second operand 3 states. [2019-12-07 17:26:19,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:19,962 INFO L93 Difference]: Finished difference Result 252030 states and 1035145 transitions. [2019-12-07 17:26:19,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:26:19,963 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 17:26:19,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:20,591 INFO L225 Difference]: With dead ends: 252030 [2019-12-07 17:26:20,592 INFO L226 Difference]: Without dead ends: 252030 [2019-12-07 17:26:20,592 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:26,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252030 states. [2019-12-07 17:26:29,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252030 to 220743. [2019-12-07 17:26:29,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220743 states. [2019-12-07 17:26:30,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220743 states to 220743 states and 915334 transitions. [2019-12-07 17:26:30,605 INFO L78 Accepts]: Start accepts. Automaton has 220743 states and 915334 transitions. Word has length 27 [2019-12-07 17:26:30,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:30,606 INFO L462 AbstractCegarLoop]: Abstraction has 220743 states and 915334 transitions. [2019-12-07 17:26:30,606 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:26:30,606 INFO L276 IsEmpty]: Start isEmpty. Operand 220743 states and 915334 transitions. [2019-12-07 17:26:30,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:26:30,674 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:30,674 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:30,674 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:30,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:30,674 INFO L82 PathProgramCache]: Analyzing trace with hash -730215328, now seen corresponding path program 1 times [2019-12-07 17:26:30,674 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:30,674 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701681712] [2019-12-07 17:26:30,674 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:30,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:30,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:30,706 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1701681712] [2019-12-07 17:26:30,706 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:30,706 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:26:30,706 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [420939585] [2019-12-07 17:26:30,706 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:26:30,706 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:30,707 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:26:30,707 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:30,707 INFO L87 Difference]: Start difference. First operand 220743 states and 915334 transitions. Second operand 3 states. [2019-12-07 17:26:30,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:30,834 INFO L93 Difference]: Finished difference Result 44700 states and 144997 transitions. [2019-12-07 17:26:30,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:26:30,834 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 17:26:30,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:30,896 INFO L225 Difference]: With dead ends: 44700 [2019-12-07 17:26:30,896 INFO L226 Difference]: Without dead ends: 44700 [2019-12-07 17:26:30,896 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:31,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44700 states. [2019-12-07 17:26:31,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44700 to 44700. [2019-12-07 17:26:31,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44700 states. [2019-12-07 17:26:32,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44700 states to 44700 states and 144997 transitions. [2019-12-07 17:26:32,013 INFO L78 Accepts]: Start accepts. Automaton has 44700 states and 144997 transitions. Word has length 27 [2019-12-07 17:26:32,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:32,014 INFO L462 AbstractCegarLoop]: Abstraction has 44700 states and 144997 transitions. [2019-12-07 17:26:32,014 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:26:32,014 INFO L276 IsEmpty]: Start isEmpty. Operand 44700 states and 144997 transitions. [2019-12-07 17:26:32,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 17:26:32,029 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:32,029 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:32,029 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:32,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:32,030 INFO L82 PathProgramCache]: Analyzing trace with hash -955256505, now seen corresponding path program 1 times [2019-12-07 17:26:32,030 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:32,030 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449737055] [2019-12-07 17:26:32,030 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:32,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:32,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:32,066 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449737055] [2019-12-07 17:26:32,066 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:32,066 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:26:32,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [908505259] [2019-12-07 17:26:32,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:26:32,067 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:32,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:26:32,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:26:32,067 INFO L87 Difference]: Start difference. First operand 44700 states and 144997 transitions. Second operand 4 states. [2019-12-07 17:26:32,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:32,094 INFO L93 Difference]: Finished difference Result 8211 states and 22128 transitions. [2019-12-07 17:26:32,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:26:32,095 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2019-12-07 17:26:32,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:32,102 INFO L225 Difference]: With dead ends: 8211 [2019-12-07 17:26:32,102 INFO L226 Difference]: Without dead ends: 8211 [2019-12-07 17:26:32,102 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:26:32,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8211 states. [2019-12-07 17:26:32,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8211 to 8071. [2019-12-07 17:26:32,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8071 states. [2019-12-07 17:26:32,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8071 states to 8071 states and 21728 transitions. [2019-12-07 17:26:32,198 INFO L78 Accepts]: Start accepts. Automaton has 8071 states and 21728 transitions. Word has length 39 [2019-12-07 17:26:32,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:32,199 INFO L462 AbstractCegarLoop]: Abstraction has 8071 states and 21728 transitions. [2019-12-07 17:26:32,199 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:26:32,199 INFO L276 IsEmpty]: Start isEmpty. Operand 8071 states and 21728 transitions. [2019-12-07 17:26:32,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 17:26:32,204 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:32,204 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:32,204 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:32,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:32,205 INFO L82 PathProgramCache]: Analyzing trace with hash 296426846, now seen corresponding path program 1 times [2019-12-07 17:26:32,205 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:32,205 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390868394] [2019-12-07 17:26:32,205 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:32,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:32,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:32,253 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1390868394] [2019-12-07 17:26:32,253 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:32,253 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:26:32,253 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593487103] [2019-12-07 17:26:32,254 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:26:32,254 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:32,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:26:32,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:26:32,254 INFO L87 Difference]: Start difference. First operand 8071 states and 21728 transitions. Second operand 5 states. [2019-12-07 17:26:32,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:32,285 INFO L93 Difference]: Finished difference Result 5424 states and 15553 transitions. [2019-12-07 17:26:32,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:26:32,286 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 17:26:32,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:32,290 INFO L225 Difference]: With dead ends: 5424 [2019-12-07 17:26:32,291 INFO L226 Difference]: Without dead ends: 5424 [2019-12-07 17:26:32,291 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:26:32,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5424 states. [2019-12-07 17:26:32,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5424 to 5011. [2019-12-07 17:26:32,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5011 states. [2019-12-07 17:26:32,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5011 states to 5011 states and 14436 transitions. [2019-12-07 17:26:32,360 INFO L78 Accepts]: Start accepts. Automaton has 5011 states and 14436 transitions. Word has length 51 [2019-12-07 17:26:32,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:32,360 INFO L462 AbstractCegarLoop]: Abstraction has 5011 states and 14436 transitions. [2019-12-07 17:26:32,360 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:26:32,360 INFO L276 IsEmpty]: Start isEmpty. Operand 5011 states and 14436 transitions. [2019-12-07 17:26:32,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:26:32,364 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:32,364 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:32,364 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:32,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:32,364 INFO L82 PathProgramCache]: Analyzing trace with hash -1256158932, now seen corresponding path program 1 times [2019-12-07 17:26:32,365 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:32,365 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [412257759] [2019-12-07 17:26:32,365 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:32,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:32,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:32,441 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [412257759] [2019-12-07 17:26:32,442 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:32,442 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:26:32,442 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1241247985] [2019-12-07 17:26:32,442 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:26:32,442 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:32,443 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:26:32,443 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:32,443 INFO L87 Difference]: Start difference. First operand 5011 states and 14436 transitions. Second operand 3 states. [2019-12-07 17:26:32,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:32,465 INFO L93 Difference]: Finished difference Result 5011 states and 14215 transitions. [2019-12-07 17:26:32,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:26:32,465 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 17:26:32,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:32,471 INFO L225 Difference]: With dead ends: 5011 [2019-12-07 17:26:32,471 INFO L226 Difference]: Without dead ends: 5011 [2019-12-07 17:26:32,472 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:32,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5011 states. [2019-12-07 17:26:32,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5011 to 5011. [2019-12-07 17:26:32,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5011 states. [2019-12-07 17:26:32,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5011 states to 5011 states and 14215 transitions. [2019-12-07 17:26:32,535 INFO L78 Accepts]: Start accepts. Automaton has 5011 states and 14215 transitions. Word has length 65 [2019-12-07 17:26:32,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:32,535 INFO L462 AbstractCegarLoop]: Abstraction has 5011 states and 14215 transitions. [2019-12-07 17:26:32,535 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:26:32,535 INFO L276 IsEmpty]: Start isEmpty. Operand 5011 states and 14215 transitions. [2019-12-07 17:26:32,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:26:32,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:32,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:32,539 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:32,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:32,539 INFO L82 PathProgramCache]: Analyzing trace with hash -1760720695, now seen corresponding path program 1 times [2019-12-07 17:26:32,539 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:32,539 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2072403107] [2019-12-07 17:26:32,539 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:32,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:32,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:32,603 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2072403107] [2019-12-07 17:26:32,604 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:32,604 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:26:32,604 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [532927861] [2019-12-07 17:26:32,604 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:26:32,604 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:32,604 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:26:32,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:26:32,604 INFO L87 Difference]: Start difference. First operand 5011 states and 14215 transitions. Second operand 5 states. [2019-12-07 17:26:32,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:32,788 INFO L93 Difference]: Finished difference Result 7347 states and 20695 transitions. [2019-12-07 17:26:32,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:26:32,788 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 17:26:32,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:32,795 INFO L225 Difference]: With dead ends: 7347 [2019-12-07 17:26:32,795 INFO L226 Difference]: Without dead ends: 7347 [2019-12-07 17:26:32,795 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:26:32,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7347 states. [2019-12-07 17:26:32,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7347 to 6377. [2019-12-07 17:26:32,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6377 states. [2019-12-07 17:26:32,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6377 states to 6377 states and 18028 transitions. [2019-12-07 17:26:32,880 INFO L78 Accepts]: Start accepts. Automaton has 6377 states and 18028 transitions. Word has length 66 [2019-12-07 17:26:32,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:32,881 INFO L462 AbstractCegarLoop]: Abstraction has 6377 states and 18028 transitions. [2019-12-07 17:26:32,881 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:26:32,881 INFO L276 IsEmpty]: Start isEmpty. Operand 6377 states and 18028 transitions. [2019-12-07 17:26:32,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:26:32,885 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:32,885 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:32,886 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:32,886 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:32,886 INFO L82 PathProgramCache]: Analyzing trace with hash 1764113003, now seen corresponding path program 2 times [2019-12-07 17:26:32,886 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:32,886 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303509126] [2019-12-07 17:26:32,886 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:32,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:32,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:32,937 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [303509126] [2019-12-07 17:26:32,937 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:32,937 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:26:32,937 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [34538301] [2019-12-07 17:26:32,937 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:26:32,937 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:32,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:26:32,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:26:32,938 INFO L87 Difference]: Start difference. First operand 6377 states and 18028 transitions. Second operand 5 states. [2019-12-07 17:26:33,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:33,150 INFO L93 Difference]: Finished difference Result 9089 states and 25480 transitions. [2019-12-07 17:26:33,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:26:33,150 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 17:26:33,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:33,158 INFO L225 Difference]: With dead ends: 9089 [2019-12-07 17:26:33,158 INFO L226 Difference]: Without dead ends: 9089 [2019-12-07 17:26:33,158 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:26:33,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9089 states. [2019-12-07 17:26:33,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9089 to 7049. [2019-12-07 17:26:33,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7049 states. [2019-12-07 17:26:33,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7049 states to 7049 states and 19977 transitions. [2019-12-07 17:26:33,262 INFO L78 Accepts]: Start accepts. Automaton has 7049 states and 19977 transitions. Word has length 66 [2019-12-07 17:26:33,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:33,262 INFO L462 AbstractCegarLoop]: Abstraction has 7049 states and 19977 transitions. [2019-12-07 17:26:33,262 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:26:33,262 INFO L276 IsEmpty]: Start isEmpty. Operand 7049 states and 19977 transitions. [2019-12-07 17:26:33,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:26:33,267 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:33,267 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:33,268 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:33,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:33,268 INFO L82 PathProgramCache]: Analyzing trace with hash 956425645, now seen corresponding path program 3 times [2019-12-07 17:26:33,268 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:33,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158066723] [2019-12-07 17:26:33,268 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:33,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:33,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:33,337 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158066723] [2019-12-07 17:26:33,337 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:33,337 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:26:33,337 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [937871283] [2019-12-07 17:26:33,338 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:26:33,338 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:33,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:26:33,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:26:33,338 INFO L87 Difference]: Start difference. First operand 7049 states and 19977 transitions. Second operand 6 states. [2019-12-07 17:26:33,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:33,580 INFO L93 Difference]: Finished difference Result 9440 states and 26391 transitions. [2019-12-07 17:26:33,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:26:33,581 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 17:26:33,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:33,588 INFO L225 Difference]: With dead ends: 9440 [2019-12-07 17:26:33,588 INFO L226 Difference]: Without dead ends: 9440 [2019-12-07 17:26:33,589 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:26:33,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9440 states. [2019-12-07 17:26:33,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9440 to 7420. [2019-12-07 17:26:33,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7420 states. [2019-12-07 17:26:33,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7420 states to 7420 states and 21016 transitions. [2019-12-07 17:26:33,693 INFO L78 Accepts]: Start accepts. Automaton has 7420 states and 21016 transitions. Word has length 66 [2019-12-07 17:26:33,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:33,693 INFO L462 AbstractCegarLoop]: Abstraction has 7420 states and 21016 transitions. [2019-12-07 17:26:33,693 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:26:33,693 INFO L276 IsEmpty]: Start isEmpty. Operand 7420 states and 21016 transitions. [2019-12-07 17:26:33,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:26:33,698 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:33,699 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:33,699 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:33,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:33,699 INFO L82 PathProgramCache]: Analyzing trace with hash 426723893, now seen corresponding path program 4 times [2019-12-07 17:26:33,699 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:33,699 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330125173] [2019-12-07 17:26:33,699 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:33,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:33,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:33,737 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1330125173] [2019-12-07 17:26:33,737 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:33,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:26:33,737 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1899939623] [2019-12-07 17:26:33,738 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:26:33,738 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:33,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:26:33,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:33,738 INFO L87 Difference]: Start difference. First operand 7420 states and 21016 transitions. Second operand 3 states. [2019-12-07 17:26:33,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:33,758 INFO L93 Difference]: Finished difference Result 6363 states and 17742 transitions. [2019-12-07 17:26:33,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:26:33,758 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:26:33,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:33,764 INFO L225 Difference]: With dead ends: 6363 [2019-12-07 17:26:33,764 INFO L226 Difference]: Without dead ends: 6363 [2019-12-07 17:26:33,764 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:33,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6363 states. [2019-12-07 17:26:33,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6363 to 6027. [2019-12-07 17:26:33,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6027 states. [2019-12-07 17:26:33,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6027 states to 6027 states and 16814 transitions. [2019-12-07 17:26:33,838 INFO L78 Accepts]: Start accepts. Automaton has 6027 states and 16814 transitions. Word has length 66 [2019-12-07 17:26:33,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:33,838 INFO L462 AbstractCegarLoop]: Abstraction has 6027 states and 16814 transitions. [2019-12-07 17:26:33,838 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:26:33,838 INFO L276 IsEmpty]: Start isEmpty. Operand 6027 states and 16814 transitions. [2019-12-07 17:26:33,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:26:33,842 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:33,842 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:33,842 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:33,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:33,843 INFO L82 PathProgramCache]: Analyzing trace with hash 220867955, now seen corresponding path program 1 times [2019-12-07 17:26:33,843 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:33,843 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489748747] [2019-12-07 17:26:33,843 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:33,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:33,894 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:33,894 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [489748747] [2019-12-07 17:26:33,894 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:33,894 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:26:33,895 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [540853093] [2019-12-07 17:26:33,895 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:26:33,895 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:33,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:26:33,895 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:33,895 INFO L87 Difference]: Start difference. First operand 6027 states and 16814 transitions. Second operand 3 states. [2019-12-07 17:26:33,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:33,933 INFO L93 Difference]: Finished difference Result 6027 states and 16813 transitions. [2019-12-07 17:26:33,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:26:33,933 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 17:26:33,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:33,940 INFO L225 Difference]: With dead ends: 6027 [2019-12-07 17:26:33,940 INFO L226 Difference]: Without dead ends: 6027 [2019-12-07 17:26:33,940 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:33,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6027 states. [2019-12-07 17:26:34,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6027 to 4738. [2019-12-07 17:26:34,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4738 states. [2019-12-07 17:26:34,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4738 states to 4738 states and 13246 transitions. [2019-12-07 17:26:34,035 INFO L78 Accepts]: Start accepts. Automaton has 4738 states and 13246 transitions. Word has length 67 [2019-12-07 17:26:34,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:34,036 INFO L462 AbstractCegarLoop]: Abstraction has 4738 states and 13246 transitions. [2019-12-07 17:26:34,036 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:26:34,036 INFO L276 IsEmpty]: Start isEmpty. Operand 4738 states and 13246 transitions. [2019-12-07 17:26:34,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:26:34,039 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:34,039 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:34,040 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:34,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:34,040 INFO L82 PathProgramCache]: Analyzing trace with hash -2084050195, now seen corresponding path program 1 times [2019-12-07 17:26:34,040 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:34,040 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [771973932] [2019-12-07 17:26:34,040 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:34,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:34,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:34,128 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [771973932] [2019-12-07 17:26:34,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:34,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:26:34,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1325267278] [2019-12-07 17:26:34,129 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:26:34,129 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:34,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:26:34,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:26:34,129 INFO L87 Difference]: Start difference. First operand 4738 states and 13246 transitions. Second operand 6 states. [2019-12-07 17:26:34,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:34,209 INFO L93 Difference]: Finished difference Result 8114 states and 22667 transitions. [2019-12-07 17:26:34,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:26:34,210 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-12-07 17:26:34,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:34,213 INFO L225 Difference]: With dead ends: 8114 [2019-12-07 17:26:34,213 INFO L226 Difference]: Without dead ends: 4167 [2019-12-07 17:26:34,214 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:26:34,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4167 states. [2019-12-07 17:26:34,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4167 to 3735. [2019-12-07 17:26:34,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3735 states. [2019-12-07 17:26:34,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3735 states to 3735 states and 10373 transitions. [2019-12-07 17:26:34,263 INFO L78 Accepts]: Start accepts. Automaton has 3735 states and 10373 transitions. Word has length 68 [2019-12-07 17:26:34,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:34,263 INFO L462 AbstractCegarLoop]: Abstraction has 3735 states and 10373 transitions. [2019-12-07 17:26:34,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:26:34,264 INFO L276 IsEmpty]: Start isEmpty. Operand 3735 states and 10373 transitions. [2019-12-07 17:26:34,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:26:34,266 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:34,266 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:34,266 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:34,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:34,267 INFO L82 PathProgramCache]: Analyzing trace with hash -256019789, now seen corresponding path program 2 times [2019-12-07 17:26:34,267 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:34,267 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869119850] [2019-12-07 17:26:34,267 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:34,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:34,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:34,448 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869119850] [2019-12-07 17:26:34,448 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:34,448 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:26:34,448 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2126353065] [2019-12-07 17:26:34,448 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:26:34,448 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:34,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:26:34,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:26:34,449 INFO L87 Difference]: Start difference. First operand 3735 states and 10373 transitions. Second operand 13 states. [2019-12-07 17:26:35,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:35,064 INFO L93 Difference]: Finished difference Result 10026 states and 27869 transitions. [2019-12-07 17:26:35,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:26:35,064 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 68 [2019-12-07 17:26:35,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:35,066 INFO L225 Difference]: With dead ends: 10026 [2019-12-07 17:26:35,066 INFO L226 Difference]: Without dead ends: 2359 [2019-12-07 17:26:35,066 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=200, Invalid=502, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:26:35,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2359 states. [2019-12-07 17:26:35,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2359 to 1963. [2019-12-07 17:26:35,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1963 states. [2019-12-07 17:26:35,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1963 states to 1963 states and 5460 transitions. [2019-12-07 17:26:35,096 INFO L78 Accepts]: Start accepts. Automaton has 1963 states and 5460 transitions. Word has length 68 [2019-12-07 17:26:35,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:35,096 INFO L462 AbstractCegarLoop]: Abstraction has 1963 states and 5460 transitions. [2019-12-07 17:26:35,096 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:26:35,096 INFO L276 IsEmpty]: Start isEmpty. Operand 1963 states and 5460 transitions. [2019-12-07 17:26:35,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:26:35,097 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:35,097 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:35,097 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:35,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:35,097 INFO L82 PathProgramCache]: Analyzing trace with hash -1266757317, now seen corresponding path program 3 times [2019-12-07 17:26:35,098 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:35,098 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [298404195] [2019-12-07 17:26:35,098 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:35,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:26:35,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:26:35,194 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:26:35,194 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:26:35,197 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_57| 0 0))) (and (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t760~0.base_20| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t760~0.base_20|) |v_ULTIMATE.start_main_~#t760~0.offset_17| 0))) (= 0 v_~__unbuffered_p2_EAX~0_23) (= (store .cse0 |v_ULTIMATE.start_main_~#t760~0.base_20| 1) |v_#valid_55|) (= v_~z~0_18 0) (= 0 v_~weak$$choice0~0_14) (= v_~x$flush_delayed~0_41 0) (= 0 v_~x$r_buff0_thd3~0_99) (= v_~x$r_buff1_thd1~0_192 0) (= 0 v_~x$w_buff0~0_203) (= v_~weak$$choice2~0_116 0) (= 0 |v_ULTIMATE.start_main_~#t760~0.offset_17|) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$r_buff1_thd3~0_193) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$w_buff1~0_195) (= v_~x$mem_tmp~0_22 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t760~0.base_20|) (= v_~__unbuffered_p2_EBX~0_23 0) (= 0 v_~x$r_buff0_thd2~0_205) (= v_~main$tmp_guard1~0_28 0) (= v_~x$r_buff0_thd0~0_335 0) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff1_thd0~0_279 0) (= 0 v_~x$w_buff1_used~0_401) (= v_~__unbuffered_cnt~0_145 0) (= 0 v_~x$r_buff1_thd2~0_186) (= 0 v_~x$w_buff0_used~0_743) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t760~0.base_20| 4) |v_#length_25|) (= |v_#NULL.offset_5| 0) (= 0 v_~x~0_213) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~main$tmp_guard0~0_22 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t760~0.base_20|) 0) (= 0 v_~x$r_buff0_thd1~0_88) (= 0 |v_#NULL.base_5|) (= v_~y~0_136 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_57|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t760~0.base=|v_ULTIMATE.start_main_~#t760~0.base_20|, ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_203, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_~#t761~0.offset=|v_ULTIMATE.start_main_~#t761~0.offset_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_41, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_31|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_40|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_192, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_99, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_39|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_335, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_23, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_43|, ~x$w_buff1~0=v_~x$w_buff1~0_195, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_46|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_401, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_186, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_50|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_156|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, ~x~0=v_~x~0_213, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_88, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_193, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_33|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_273|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_41|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_34|, ULTIMATE.start_main_~#t760~0.offset=|v_ULTIMATE.start_main_~#t760~0.offset_17|, ~y~0=v_~y~0_136, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_27|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_279, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_205, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, ULTIMATE.start_main_~#t761~0.base=|v_ULTIMATE.start_main_~#t761~0.base_21|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_42|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_743, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_162|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t762~0.base=|v_ULTIMATE.start_main_~#t762~0.base_21|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_55|, ULTIMATE.start_main_~#t762~0.offset=|v_ULTIMATE.start_main_~#t762~0.offset_17|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_18, ~weak$$choice2~0=v_~weak$$choice2~0_116, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t760~0.base, ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t761~0.offset, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t760~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t761~0.base, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t762~0.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t762~0.offset, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 17:26:35,198 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L810-1-->L812: Formula: (and (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t761~0.base_13| 4) |v_#length_17|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t761~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t761~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t761~0.offset_11|) (= |v_#memory_int_15| (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t761~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t761~0.base_13|) |v_ULTIMATE.start_main_~#t761~0.offset_11| 1))) (not (= 0 |v_ULTIMATE.start_main_~#t761~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t761~0.base_13| 1) |v_#valid_36|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t761~0.offset=|v_ULTIMATE.start_main_~#t761~0.offset_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t761~0.base=|v_ULTIMATE.start_main_~#t761~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t761~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_~#t761~0.base] because there is no mapped edge [2019-12-07 17:26:35,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L812-1-->L814: Formula: (and (not (= |v_ULTIMATE.start_main_~#t762~0.base_13| 0)) (= 0 |v_ULTIMATE.start_main_~#t762~0.offset_11|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t762~0.base_13| 4) |v_#length_15|) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t762~0.base_13|) 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t762~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t762~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t762~0.base_13|) |v_ULTIMATE.start_main_~#t762~0.offset_11| 2)) |v_#memory_int_13|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t762~0.base_13| 1) |v_#valid_34|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t762~0.base=|v_ULTIMATE.start_main_~#t762~0.base_13|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t762~0.offset=|v_ULTIMATE.start_main_~#t762~0.offset_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t762~0.base, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t762~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:26:35,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| (ite (not (and (not (= (mod v_~x$w_buff1_used~0_145 256) 0)) (not (= 0 (mod v_~x$w_buff0_used~0_300 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= v_~x$w_buff0~0_44 v_~x$w_buff1~0_51) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10)) (= 2 v_~x$w_buff0~0_43) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= 1 v_~x$w_buff0_used~0_300) (= v_~x$w_buff0_used~0_301 v_~x$w_buff1_used~0_145)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_44, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_301} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10, ~x$w_buff0~0=v_~x$w_buff0~0_43, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, ~x$w_buff1~0=v_~x$w_buff1~0_51, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_145, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_300} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 17:26:35,201 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L787-2-->L787-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In2061364984 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In2061364984 256)))) (or (and (= ~x~0_In2061364984 |P2Thread1of1ForFork2_#t~ite15_Out2061364984|) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out2061364984| ~x$w_buff1~0_In2061364984) (not .cse0) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In2061364984, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2061364984, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2061364984, ~x~0=~x~0_In2061364984} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out2061364984|, ~x$w_buff1~0=~x$w_buff1~0_In2061364984, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2061364984, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2061364984, ~x~0=~x~0_In2061364984} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 17:26:35,201 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L787-4-->L788: Formula: (= v_~x~0_30 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_7|, ~x~0=v_~x~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 17:26:35,201 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L735-2-->L735-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out-1967375316| |P0Thread1of1ForFork0_#t~ite3_Out-1967375316|)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1967375316 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In-1967375316 256)))) (or (and (not .cse0) .cse1 (not .cse2) (= ~x$w_buff1~0_In-1967375316 |P0Thread1of1ForFork0_#t~ite3_Out-1967375316|)) (and .cse1 (or .cse0 .cse2) (= |P0Thread1of1ForFork0_#t~ite3_Out-1967375316| ~x~0_In-1967375316)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1967375316, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1967375316, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1967375316, ~x~0=~x~0_In-1967375316} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1967375316|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-1967375316|, ~x$w_buff1~0=~x$w_buff1~0_In-1967375316, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1967375316, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1967375316, ~x~0=~x~0_In-1967375316} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 17:26:35,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L736-->L736-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In659308660 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In659308660 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out659308660| ~x$w_buff0_used~0_In659308660) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out659308660| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In659308660, ~x$w_buff0_used~0=~x$w_buff0_used~0_In659308660} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out659308660|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In659308660, ~x$w_buff0_used~0=~x$w_buff0_used~0_In659308660} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:26:35,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In290323789 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In290323789 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out290323789|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In290323789 |P2Thread1of1ForFork2_#t~ite17_Out290323789|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In290323789, ~x$w_buff0_used~0=~x$w_buff0_used~0_In290323789} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In290323789, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out290323789|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In290323789} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 17:26:35,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In1295562826 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1295562826 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1295562826 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1295562826 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In1295562826 |P2Thread1of1ForFork2_#t~ite18_Out1295562826|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite18_Out1295562826|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1295562826, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1295562826, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1295562826, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1295562826} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1295562826, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1295562826, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1295562826, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out1295562826|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1295562826} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 17:26:35,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L737-->L737-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd1~0_In-1507998462 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1507998462 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-1507998462 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1507998462 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite6_Out-1507998462| ~x$w_buff1_used~0_In-1507998462)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1507998462|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1507998462, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1507998462, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1507998462, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1507998462} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1507998462|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1507998462, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1507998462, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1507998462, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1507998462} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:26:35,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In-1735080223 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1735080223 256)))) (or (and (= ~x$r_buff0_thd3~0_In-1735080223 |P2Thread1of1ForFork2_#t~ite19_Out-1735080223|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-1735080223|) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1735080223, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1735080223} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1735080223, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1735080223|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1735080223} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 17:26:35,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L791-->L791-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In1864816449 256))) (.cse3 (= (mod ~x$r_buff0_thd3~0_In1864816449 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In1864816449 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1864816449 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite20_Out1864816449| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite20_Out1864816449| ~x$r_buff1_thd3~0_In1864816449)))) InVars {~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1864816449, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1864816449, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1864816449, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1864816449} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1864816449|, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1864816449, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1864816449, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1864816449, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1864816449} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 17:26:35,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L791-2-->P2EXIT: Formula: (and (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork2_#t~ite20_26|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:26:35,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L765-->L765-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-776804869 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-776804869 256) 0))) (or (and (= ~x$w_buff0_used~0_In-776804869 |P1Thread1of1ForFork1_#t~ite11_Out-776804869|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-776804869|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-776804869, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-776804869} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-776804869|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-776804869, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-776804869} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:26:35,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L766-->L766-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In1208392937 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In1208392937 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In1208392937 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd2~0_In1208392937 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1208392937|)) (and (= ~x$w_buff1_used~0_In1208392937 |P1Thread1of1ForFork1_#t~ite12_Out1208392937|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1208392937, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1208392937, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1208392937, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1208392937} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1208392937, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1208392937, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1208392937|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1208392937, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1208392937} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:26:35,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L767-->L768: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In1142970149 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1142970149 256))) (.cse0 (= ~x$r_buff0_thd2~0_In1142970149 ~x$r_buff0_thd2~0_Out1142970149))) (or (and .cse0 .cse1) (and (= 0 ~x$r_buff0_thd2~0_Out1142970149) (not .cse2) (not .cse1)) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1142970149, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1142970149} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1142970149|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1142970149, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1142970149} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 17:26:35,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1112386997 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In1112386997 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In1112386997 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1112386997 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out1112386997| ~x$r_buff1_thd2~0_In1112386997) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out1112386997| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1112386997, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1112386997, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1112386997, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1112386997} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1112386997, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1112386997, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1112386997, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1112386997|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1112386997} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:26:35,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_68 |v_P1Thread1of1ForFork1_#t~ite14_40|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_68, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:26:35,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L738-->L738-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1506082038 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In1506082038 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out1506082038| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite7_Out1506082038| ~x$r_buff0_thd1~0_In1506082038) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1506082038, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1506082038} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1506082038, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1506082038|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1506082038} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 17:26:35,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L739-->L739-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In369745545 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In369745545 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In369745545 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In369745545 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out369745545|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~x$r_buff1_thd1~0_In369745545 |P0Thread1of1ForFork0_#t~ite8_Out369745545|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In369745545, ~x$w_buff1_used~0=~x$w_buff1_used~0_In369745545, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In369745545, ~x$w_buff0_used~0=~x$w_buff0_used~0_In369745545} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In369745545, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out369745545|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In369745545, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In369745545, ~x$w_buff0_used~0=~x$w_buff0_used~0_In369745545} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:26:35,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L739-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_40 |v_P0Thread1of1ForFork0_#t~ite8_18|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_17|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 17:26:35,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:26:35,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L820-2-->L820-5: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In888396356 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite25_Out888396356| |ULTIMATE.start_main_#t~ite24_Out888396356|)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In888396356 256)))) (or (and .cse0 (= ~x~0_In888396356 |ULTIMATE.start_main_#t~ite24_Out888396356|) (or .cse1 .cse2)) (and (not .cse1) .cse0 (not .cse2) (= ~x$w_buff1~0_In888396356 |ULTIMATE.start_main_#t~ite24_Out888396356|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In888396356, ~x$w_buff1_used~0=~x$w_buff1_used~0_In888396356, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In888396356, ~x~0=~x~0_In888396356} OutVars{~x$w_buff1~0=~x$w_buff1~0_In888396356, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out888396356|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out888396356|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In888396356, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In888396356, ~x~0=~x~0_In888396356} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 17:26:35,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L821-->L821-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1426986990 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In1426986990 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite26_Out1426986990|) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1426986990 |ULTIMATE.start_main_#t~ite26_Out1426986990|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1426986990, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1426986990} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1426986990, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1426986990|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1426986990} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 17:26:35,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L822-->L822-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-264387447 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-264387447 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-264387447 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-264387447 256)))) (or (and (= ~x$w_buff1_used~0_In-264387447 |ULTIMATE.start_main_#t~ite27_Out-264387447|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite27_Out-264387447| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-264387447, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-264387447, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-264387447, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-264387447} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-264387447, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-264387447, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-264387447|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-264387447, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-264387447} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 17:26:35,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1602225985 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1602225985 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite28_Out-1602225985|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd0~0_In-1602225985 |ULTIMATE.start_main_#t~ite28_Out-1602225985|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1602225985, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1602225985} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1602225985, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1602225985|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1602225985} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 17:26:35,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L824-->L824-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1993621345 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1993621345 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1993621345 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-1993621345 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite29_Out-1993621345| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite29_Out-1993621345| ~x$r_buff1_thd0~0_In-1993621345)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1993621345, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1993621345, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1993621345, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1993621345} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1993621345, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1993621345|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1993621345, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1993621345, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1993621345} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:26:35,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L836-->L837: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~x$r_buff0_thd0~0_87 v_~x$r_buff0_thd0~0_86)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_87, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_86, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_27} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:26:35,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L839-->L4: Formula: (and (= v_~x$flush_delayed~0_24 0) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_25 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_173)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ~x$flush_delayed~0=v_~x$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_173, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:26:35,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:26:35,266 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:26:35 BasicIcfg [2019-12-07 17:26:35,266 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:26:35,267 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:26:35,267 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:26:35,267 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:26:35,267 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:24:05" (3/4) ... [2019-12-07 17:26:35,269 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:26:35,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_57| 0 0))) (and (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t760~0.base_20| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t760~0.base_20|) |v_ULTIMATE.start_main_~#t760~0.offset_17| 0))) (= 0 v_~__unbuffered_p2_EAX~0_23) (= (store .cse0 |v_ULTIMATE.start_main_~#t760~0.base_20| 1) |v_#valid_55|) (= v_~z~0_18 0) (= 0 v_~weak$$choice0~0_14) (= v_~x$flush_delayed~0_41 0) (= 0 v_~x$r_buff0_thd3~0_99) (= v_~x$r_buff1_thd1~0_192 0) (= 0 v_~x$w_buff0~0_203) (= v_~weak$$choice2~0_116 0) (= 0 |v_ULTIMATE.start_main_~#t760~0.offset_17|) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$r_buff1_thd3~0_193) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$w_buff1~0_195) (= v_~x$mem_tmp~0_22 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t760~0.base_20|) (= v_~__unbuffered_p2_EBX~0_23 0) (= 0 v_~x$r_buff0_thd2~0_205) (= v_~main$tmp_guard1~0_28 0) (= v_~x$r_buff0_thd0~0_335 0) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff1_thd0~0_279 0) (= 0 v_~x$w_buff1_used~0_401) (= v_~__unbuffered_cnt~0_145 0) (= 0 v_~x$r_buff1_thd2~0_186) (= 0 v_~x$w_buff0_used~0_743) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t760~0.base_20| 4) |v_#length_25|) (= |v_#NULL.offset_5| 0) (= 0 v_~x~0_213) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~main$tmp_guard0~0_22 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t760~0.base_20|) 0) (= 0 v_~x$r_buff0_thd1~0_88) (= 0 |v_#NULL.base_5|) (= v_~y~0_136 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_57|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t760~0.base=|v_ULTIMATE.start_main_~#t760~0.base_20|, ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_203, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_~#t761~0.offset=|v_ULTIMATE.start_main_~#t761~0.offset_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_41, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_31|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_40|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_192, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_99, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_39|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_335, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_23, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_43|, ~x$w_buff1~0=v_~x$w_buff1~0_195, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_46|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_401, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_186, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_50|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_156|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, ~x~0=v_~x~0_213, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_88, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_193, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_33|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_273|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_41|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_34|, ULTIMATE.start_main_~#t760~0.offset=|v_ULTIMATE.start_main_~#t760~0.offset_17|, ~y~0=v_~y~0_136, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_27|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_279, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_205, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, ULTIMATE.start_main_~#t761~0.base=|v_ULTIMATE.start_main_~#t761~0.base_21|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_42|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_743, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_162|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t762~0.base=|v_ULTIMATE.start_main_~#t762~0.base_21|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_55|, ULTIMATE.start_main_~#t762~0.offset=|v_ULTIMATE.start_main_~#t762~0.offset_17|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_18, ~weak$$choice2~0=v_~weak$$choice2~0_116, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t760~0.base, ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t761~0.offset, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t760~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t761~0.base, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t762~0.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t762~0.offset, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 17:26:35,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L810-1-->L812: Formula: (and (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t761~0.base_13| 4) |v_#length_17|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t761~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t761~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t761~0.offset_11|) (= |v_#memory_int_15| (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t761~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t761~0.base_13|) |v_ULTIMATE.start_main_~#t761~0.offset_11| 1))) (not (= 0 |v_ULTIMATE.start_main_~#t761~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t761~0.base_13| 1) |v_#valid_36|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t761~0.offset=|v_ULTIMATE.start_main_~#t761~0.offset_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t761~0.base=|v_ULTIMATE.start_main_~#t761~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t761~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_~#t761~0.base] because there is no mapped edge [2019-12-07 17:26:35,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L812-1-->L814: Formula: (and (not (= |v_ULTIMATE.start_main_~#t762~0.base_13| 0)) (= 0 |v_ULTIMATE.start_main_~#t762~0.offset_11|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t762~0.base_13| 4) |v_#length_15|) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t762~0.base_13|) 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t762~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t762~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t762~0.base_13|) |v_ULTIMATE.start_main_~#t762~0.offset_11| 2)) |v_#memory_int_13|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t762~0.base_13| 1) |v_#valid_34|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t762~0.base=|v_ULTIMATE.start_main_~#t762~0.base_13|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t762~0.offset=|v_ULTIMATE.start_main_~#t762~0.offset_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t762~0.base, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t762~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:26:35,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| (ite (not (and (not (= (mod v_~x$w_buff1_used~0_145 256) 0)) (not (= 0 (mod v_~x$w_buff0_used~0_300 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= v_~x$w_buff0~0_44 v_~x$w_buff1~0_51) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10)) (= 2 v_~x$w_buff0~0_43) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= 1 v_~x$w_buff0_used~0_300) (= v_~x$w_buff0_used~0_301 v_~x$w_buff1_used~0_145)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_44, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_301} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10, ~x$w_buff0~0=v_~x$w_buff0~0_43, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, ~x$w_buff1~0=v_~x$w_buff1~0_51, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_145, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_300} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 17:26:35,270 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L787-2-->L787-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In2061364984 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In2061364984 256)))) (or (and (= ~x~0_In2061364984 |P2Thread1of1ForFork2_#t~ite15_Out2061364984|) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out2061364984| ~x$w_buff1~0_In2061364984) (not .cse0) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In2061364984, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2061364984, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2061364984, ~x~0=~x~0_In2061364984} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out2061364984|, ~x$w_buff1~0=~x$w_buff1~0_In2061364984, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2061364984, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2061364984, ~x~0=~x~0_In2061364984} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 17:26:35,271 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L787-4-->L788: Formula: (= v_~x~0_30 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_7|, ~x~0=v_~x~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 17:26:35,271 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L735-2-->L735-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out-1967375316| |P0Thread1of1ForFork0_#t~ite3_Out-1967375316|)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1967375316 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In-1967375316 256)))) (or (and (not .cse0) .cse1 (not .cse2) (= ~x$w_buff1~0_In-1967375316 |P0Thread1of1ForFork0_#t~ite3_Out-1967375316|)) (and .cse1 (or .cse0 .cse2) (= |P0Thread1of1ForFork0_#t~ite3_Out-1967375316| ~x~0_In-1967375316)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1967375316, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1967375316, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1967375316, ~x~0=~x~0_In-1967375316} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1967375316|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-1967375316|, ~x$w_buff1~0=~x$w_buff1~0_In-1967375316, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1967375316, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1967375316, ~x~0=~x~0_In-1967375316} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 17:26:35,271 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L736-->L736-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In659308660 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In659308660 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out659308660| ~x$w_buff0_used~0_In659308660) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out659308660| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In659308660, ~x$w_buff0_used~0=~x$w_buff0_used~0_In659308660} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out659308660|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In659308660, ~x$w_buff0_used~0=~x$w_buff0_used~0_In659308660} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:26:35,271 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In290323789 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In290323789 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out290323789|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In290323789 |P2Thread1of1ForFork2_#t~ite17_Out290323789|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In290323789, ~x$w_buff0_used~0=~x$w_buff0_used~0_In290323789} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In290323789, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out290323789|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In290323789} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 17:26:35,272 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In1295562826 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1295562826 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1295562826 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1295562826 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In1295562826 |P2Thread1of1ForFork2_#t~ite18_Out1295562826|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite18_Out1295562826|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1295562826, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1295562826, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1295562826, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1295562826} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1295562826, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1295562826, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1295562826, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out1295562826|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1295562826} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 17:26:35,272 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L737-->L737-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd1~0_In-1507998462 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1507998462 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-1507998462 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1507998462 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite6_Out-1507998462| ~x$w_buff1_used~0_In-1507998462)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1507998462|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1507998462, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1507998462, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1507998462, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1507998462} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1507998462|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1507998462, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1507998462, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1507998462, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1507998462} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:26:35,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In-1735080223 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1735080223 256)))) (or (and (= ~x$r_buff0_thd3~0_In-1735080223 |P2Thread1of1ForFork2_#t~ite19_Out-1735080223|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-1735080223|) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1735080223, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1735080223} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1735080223, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1735080223|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1735080223} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 17:26:35,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L791-->L791-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In1864816449 256))) (.cse3 (= (mod ~x$r_buff0_thd3~0_In1864816449 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In1864816449 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1864816449 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite20_Out1864816449| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite20_Out1864816449| ~x$r_buff1_thd3~0_In1864816449)))) InVars {~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1864816449, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1864816449, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1864816449, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1864816449} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1864816449|, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1864816449, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1864816449, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1864816449, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1864816449} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 17:26:35,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L791-2-->P2EXIT: Formula: (and (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork2_#t~ite20_26|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:26:35,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L765-->L765-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-776804869 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-776804869 256) 0))) (or (and (= ~x$w_buff0_used~0_In-776804869 |P1Thread1of1ForFork1_#t~ite11_Out-776804869|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-776804869|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-776804869, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-776804869} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-776804869|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-776804869, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-776804869} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:26:35,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L766-->L766-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In1208392937 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In1208392937 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In1208392937 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd2~0_In1208392937 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1208392937|)) (and (= ~x$w_buff1_used~0_In1208392937 |P1Thread1of1ForFork1_#t~ite12_Out1208392937|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1208392937, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1208392937, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1208392937, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1208392937} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1208392937, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1208392937, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1208392937|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1208392937, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1208392937} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:26:35,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L767-->L768: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In1142970149 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1142970149 256))) (.cse0 (= ~x$r_buff0_thd2~0_In1142970149 ~x$r_buff0_thd2~0_Out1142970149))) (or (and .cse0 .cse1) (and (= 0 ~x$r_buff0_thd2~0_Out1142970149) (not .cse2) (not .cse1)) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1142970149, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1142970149} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1142970149|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1142970149, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1142970149} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 17:26:35,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1112386997 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In1112386997 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In1112386997 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1112386997 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out1112386997| ~x$r_buff1_thd2~0_In1112386997) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out1112386997| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1112386997, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1112386997, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1112386997, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1112386997} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1112386997, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1112386997, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1112386997, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1112386997|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1112386997} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:26:35,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_68 |v_P1Thread1of1ForFork1_#t~ite14_40|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_68, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:26:35,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L738-->L738-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1506082038 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In1506082038 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out1506082038| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite7_Out1506082038| ~x$r_buff0_thd1~0_In1506082038) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1506082038, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1506082038} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1506082038, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1506082038|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1506082038} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 17:26:35,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L739-->L739-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In369745545 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In369745545 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In369745545 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In369745545 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out369745545|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~x$r_buff1_thd1~0_In369745545 |P0Thread1of1ForFork0_#t~ite8_Out369745545|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In369745545, ~x$w_buff1_used~0=~x$w_buff1_used~0_In369745545, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In369745545, ~x$w_buff0_used~0=~x$w_buff0_used~0_In369745545} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In369745545, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out369745545|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In369745545, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In369745545, ~x$w_buff0_used~0=~x$w_buff0_used~0_In369745545} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:26:35,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L739-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_40 |v_P0Thread1of1ForFork0_#t~ite8_18|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_17|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 17:26:35,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:26:35,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L820-2-->L820-5: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In888396356 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite25_Out888396356| |ULTIMATE.start_main_#t~ite24_Out888396356|)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In888396356 256)))) (or (and .cse0 (= ~x~0_In888396356 |ULTIMATE.start_main_#t~ite24_Out888396356|) (or .cse1 .cse2)) (and (not .cse1) .cse0 (not .cse2) (= ~x$w_buff1~0_In888396356 |ULTIMATE.start_main_#t~ite24_Out888396356|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In888396356, ~x$w_buff1_used~0=~x$w_buff1_used~0_In888396356, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In888396356, ~x~0=~x~0_In888396356} OutVars{~x$w_buff1~0=~x$w_buff1~0_In888396356, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out888396356|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out888396356|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In888396356, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In888396356, ~x~0=~x~0_In888396356} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 17:26:35,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L821-->L821-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1426986990 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In1426986990 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite26_Out1426986990|) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1426986990 |ULTIMATE.start_main_#t~ite26_Out1426986990|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1426986990, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1426986990} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1426986990, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1426986990|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1426986990} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 17:26:35,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L822-->L822-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-264387447 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-264387447 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-264387447 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-264387447 256)))) (or (and (= ~x$w_buff1_used~0_In-264387447 |ULTIMATE.start_main_#t~ite27_Out-264387447|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite27_Out-264387447| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-264387447, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-264387447, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-264387447, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-264387447} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-264387447, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-264387447, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-264387447|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-264387447, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-264387447} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 17:26:35,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1602225985 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1602225985 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite28_Out-1602225985|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd0~0_In-1602225985 |ULTIMATE.start_main_#t~ite28_Out-1602225985|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1602225985, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1602225985} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1602225985, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1602225985|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1602225985} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 17:26:35,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L824-->L824-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1993621345 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1993621345 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1993621345 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-1993621345 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite29_Out-1993621345| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite29_Out-1993621345| ~x$r_buff1_thd0~0_In-1993621345)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1993621345, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1993621345, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1993621345, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1993621345} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1993621345, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1993621345|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1993621345, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1993621345, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1993621345} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:26:35,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L836-->L837: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~x$r_buff0_thd0~0_87 v_~x$r_buff0_thd0~0_86)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_87, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_86, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_27} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:26:35,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L839-->L4: Formula: (and (= v_~x$flush_delayed~0_24 0) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_25 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_173)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ~x$flush_delayed~0=v_~x$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_173, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:26:35,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:26:35,555 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ef3229bf-8135-4874-89dc-7b622ffdb87e/bin/uautomizer/witness.graphml [2019-12-07 17:26:35,555 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:26:35,556 INFO L168 Benchmark]: Toolchain (without parser) took 150744.36 ms. Allocated memory was 1.0 GB in the beginning and 8.7 GB in the end (delta: 7.6 GB). Free memory was 938.2 MB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 6.7 GB. Max. memory is 11.5 GB. [2019-12-07 17:26:35,556 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:26:35,557 INFO L168 Benchmark]: CACSL2BoogieTranslator took 398.44 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 131.1 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -160.6 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:26:35,557 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.42 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:26:35,557 INFO L168 Benchmark]: Boogie Preprocessor took 26.16 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:26:35,557 INFO L168 Benchmark]: RCFGBuilder took 408.81 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.9 MB). Peak memory consumption was 50.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:26:35,558 INFO L168 Benchmark]: TraceAbstraction took 149578.67 ms. Allocated memory was 1.2 GB in the beginning and 8.7 GB in the end (delta: 7.5 GB). Free memory was 1.0 GB in the beginning and 2.4 GB in the end (delta: -1.4 GB). Peak memory consumption was 6.1 GB. Max. memory is 11.5 GB. [2019-12-07 17:26:35,558 INFO L168 Benchmark]: Witness Printer took 288.63 ms. Allocated memory is still 8.7 GB. Free memory was 2.4 GB in the beginning and 4.0 GB in the end (delta: -1.6 GB). Peak memory consumption was 544.6 MB. Max. memory is 11.5 GB. [2019-12-07 17:26:35,559 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 398.44 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 131.1 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -160.6 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.42 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.16 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 408.81 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.9 MB). Peak memory consumption was 50.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 149578.67 ms. Allocated memory was 1.2 GB in the beginning and 8.7 GB in the end (delta: 7.5 GB). Free memory was 1.0 GB in the beginning and 2.4 GB in the end (delta: -1.4 GB). Peak memory consumption was 6.1 GB. Max. memory is 11.5 GB. * Witness Printer took 288.63 ms. Allocated memory is still 8.7 GB. Free memory was 2.4 GB in the beginning and 4.0 GB in the end (delta: -1.6 GB). Peak memory consumption was 544.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 175 ProgramPointsBefore, 95 ProgramPointsAfterwards, 212 TransitionsBefore, 107 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 7 FixpointIterations, 32 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 29 ChoiceCompositions, 5405 VarBasedMoverChecksPositive, 232 VarBasedMoverChecksNegative, 72 SemBasedMoverChecksPositive, 228 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.7s, 0 MoverChecksTotal, 79058 CheckedPairsTotal, 111 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L810] FCALL, FORK 0 pthread_create(&t760, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L812] FCALL, FORK 0 pthread_create(&t761, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t762, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L754] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L755] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L756] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L757] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L758] 2 x$r_buff0_thd2 = (_Bool)1 [L761] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L778] 3 y = 2 [L781] 3 __unbuffered_p2_EAX = y [L784] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=0] [L729] 1 z = 1 [L732] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L787] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L735] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L735] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L788] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L736] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L737] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L789] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L790] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L764] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L764] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L765] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L766] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L738] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L820] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L820] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L821] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L822] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L823] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L824] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L827] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L828] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L829] 0 x$flush_delayed = weak$$choice2 [L830] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L831] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L831] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L832] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L832] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L833] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L833] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L834] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L834] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L835] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L835] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L837] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L837] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L838] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 2 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 149.4s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 31.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3707 SDtfs, 3089 SDslu, 6801 SDs, 0 SdLazy, 3932 SolverSat, 151 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 153 GetRequests, 33 SyntacticMatches, 17 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=254808occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 98.6s AutomataMinimizationTime, 20 MinimizatonAttempts, 491222 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 868 NumberOfCodeBlocks, 868 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 780 ConstructedInterpolants, 0 QuantifiedInterpolants, 123194 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...