./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix028_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix028_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8987382aee4e7755b7660cf19e6b2ef2b2f51911 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:10:31,568 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:10:31,569 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:10:31,577 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:10:31,577 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:10:31,578 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:10:31,579 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:10:31,581 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:10:31,582 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:10:31,583 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:10:31,583 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:10:31,584 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:10:31,584 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:10:31,585 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:10:31,586 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:10:31,587 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:10:31,587 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:10:31,588 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:10:31,589 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:10:31,590 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:10:31,591 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:10:31,592 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:10:31,593 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:10:31,593 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:10:31,595 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:10:31,595 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:10:31,595 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:10:31,596 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:10:31,596 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:10:31,597 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:10:31,597 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:10:31,597 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:10:31,598 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:10:31,598 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:10:31,599 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:10:31,599 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:10:31,599 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:10:31,599 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:10:31,600 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:10:31,600 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:10:31,600 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:10:31,601 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:10:31,610 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:10:31,610 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:10:31,611 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:10:31,611 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:10:31,611 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:10:31,612 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:10:31,612 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:10:31,612 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:10:31,612 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:10:31,612 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:10:31,612 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:10:31,612 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:10:31,612 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:10:31,613 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:10:31,613 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:10:31,613 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:10:31,613 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:10:31,613 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:10:31,613 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:10:31,613 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:10:31,613 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:10:31,614 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:10:31,614 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:10:31,614 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:10:31,614 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:10:31,614 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:10:31,614 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:10:31,614 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:10:31,614 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:10:31,615 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8987382aee4e7755b7660cf19e6b2ef2b2f51911 [2019-12-07 14:10:31,714 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:10:31,722 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:10:31,724 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:10:31,725 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:10:31,726 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:10:31,726 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix028_tso.oepc.i [2019-12-07 14:10:31,774 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/data/a90d800b2/9263d1291bdf4ec1955e33ae57dd67d5/FLAGdfa937319 [2019-12-07 14:10:32,204 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:10:32,205 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/sv-benchmarks/c/pthread-wmm/mix028_tso.oepc.i [2019-12-07 14:10:32,214 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/data/a90d800b2/9263d1291bdf4ec1955e33ae57dd67d5/FLAGdfa937319 [2019-12-07 14:10:32,546 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/data/a90d800b2/9263d1291bdf4ec1955e33ae57dd67d5 [2019-12-07 14:10:32,550 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:10:32,551 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:10:32,552 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:10:32,553 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:10:32,557 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:10:32,558 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:10:32" (1/1) ... [2019-12-07 14:10:32,561 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7c19867b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32, skipping insertion in model container [2019-12-07 14:10:32,561 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:10:32" (1/1) ... [2019-12-07 14:10:32,571 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:10:32,607 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:10:32,846 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:10:32,853 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:10:32,898 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:10:32,943 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:10:32,944 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32 WrapperNode [2019-12-07 14:10:32,944 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:10:32,944 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:10:32,944 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:10:32,944 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:10:32,950 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32" (1/1) ... [2019-12-07 14:10:32,963 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32" (1/1) ... [2019-12-07 14:10:32,985 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:10:32,986 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:10:32,986 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:10:32,986 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:10:32,992 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32" (1/1) ... [2019-12-07 14:10:32,992 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32" (1/1) ... [2019-12-07 14:10:32,996 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32" (1/1) ... [2019-12-07 14:10:32,996 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32" (1/1) ... [2019-12-07 14:10:33,004 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32" (1/1) ... [2019-12-07 14:10:33,007 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32" (1/1) ... [2019-12-07 14:10:33,010 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32" (1/1) ... [2019-12-07 14:10:33,013 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:10:33,013 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:10:33,013 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:10:33,013 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:10:33,014 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:10:33,055 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:10:33,055 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:10:33,055 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:10:33,055 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:10:33,055 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:10:33,055 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:10:33,055 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:10:33,055 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:10:33,056 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:10:33,056 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:10:33,056 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:10:33,056 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:10:33,056 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:10:33,057 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:10:33,484 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:10:33,485 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:10:33,485 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:10:33 BoogieIcfgContainer [2019-12-07 14:10:33,485 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:10:33,486 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:10:33,486 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:10:33,488 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:10:33,488 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:10:32" (1/3) ... [2019-12-07 14:10:33,489 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4fa9354c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:10:33, skipping insertion in model container [2019-12-07 14:10:33,489 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:10:32" (2/3) ... [2019-12-07 14:10:33,489 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4fa9354c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:10:33, skipping insertion in model container [2019-12-07 14:10:33,489 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:10:33" (3/3) ... [2019-12-07 14:10:33,490 INFO L109 eAbstractionObserver]: Analyzing ICFG mix028_tso.oepc.i [2019-12-07 14:10:33,496 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:10:33,496 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:10:33,501 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:10:33,502 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:10:33,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,527 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,527 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,527 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,527 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,527 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,527 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,527 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,528 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,531 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,531 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,532 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,532 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,532 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,532 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,532 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,546 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,546 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,546 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,546 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,546 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:10:33,560 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:10:33,575 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:10:33,575 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:10:33,575 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:10:33,575 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:10:33,575 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:10:33,575 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:10:33,575 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:10:33,575 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:10:33,586 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 205 places, 257 transitions [2019-12-07 14:10:33,587 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 205 places, 257 transitions [2019-12-07 14:10:33,662 INFO L134 PetriNetUnfolder]: 62/254 cut-off events. [2019-12-07 14:10:33,662 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:10:33,673 INFO L76 FinitePrefix]: Finished finitePrefix Result has 264 conditions, 254 events. 62/254 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 877 event pairs. 9/199 useless extension candidates. Maximal degree in co-relation 224. Up to 2 conditions per place. [2019-12-07 14:10:33,699 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 205 places, 257 transitions [2019-12-07 14:10:33,735 INFO L134 PetriNetUnfolder]: 62/254 cut-off events. [2019-12-07 14:10:33,735 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:10:33,744 INFO L76 FinitePrefix]: Finished finitePrefix Result has 264 conditions, 254 events. 62/254 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 877 event pairs. 9/199 useless extension candidates. Maximal degree in co-relation 224. Up to 2 conditions per place. [2019-12-07 14:10:33,770 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 26988 [2019-12-07 14:10:33,771 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:10:36,987 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 14:10:37,142 INFO L206 etLargeBlockEncoding]: Checked pairs total: 165402 [2019-12-07 14:10:37,143 INFO L214 etLargeBlockEncoding]: Total number of compositions: 127 [2019-12-07 14:10:37,145 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 120 places, 143 transitions [2019-12-07 14:10:40,683 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 57466 states. [2019-12-07 14:10:40,685 INFO L276 IsEmpty]: Start isEmpty. Operand 57466 states. [2019-12-07 14:10:40,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 14:10:40,689 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:40,689 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:40,690 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:40,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:40,693 INFO L82 PathProgramCache]: Analyzing trace with hash -953839885, now seen corresponding path program 1 times [2019-12-07 14:10:40,699 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:40,699 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526741283] [2019-12-07 14:10:40,699 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:40,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:40,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:40,845 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1526741283] [2019-12-07 14:10:40,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:40,846 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:10:40,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [944825449] [2019-12-07 14:10:40,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:10:40,850 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:40,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:10:40,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:10:40,860 INFO L87 Difference]: Start difference. First operand 57466 states. Second operand 3 states. [2019-12-07 14:10:41,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:41,445 INFO L93 Difference]: Finished difference Result 57370 states and 231250 transitions. [2019-12-07 14:10:41,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:10:41,446 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 14:10:41,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:41,776 INFO L225 Difference]: With dead ends: 57370 [2019-12-07 14:10:41,776 INFO L226 Difference]: Without dead ends: 56226 [2019-12-07 14:10:41,777 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:10:42,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56226 states. [2019-12-07 14:10:43,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56226 to 56226. [2019-12-07 14:10:43,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56226 states. [2019-12-07 14:10:43,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56226 states to 56226 states and 226882 transitions. [2019-12-07 14:10:43,749 INFO L78 Accepts]: Start accepts. Automaton has 56226 states and 226882 transitions. Word has length 7 [2019-12-07 14:10:43,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:43,750 INFO L462 AbstractCegarLoop]: Abstraction has 56226 states and 226882 transitions. [2019-12-07 14:10:43,750 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:10:43,750 INFO L276 IsEmpty]: Start isEmpty. Operand 56226 states and 226882 transitions. [2019-12-07 14:10:43,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:10:43,755 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:43,755 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:43,755 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:43,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:43,756 INFO L82 PathProgramCache]: Analyzing trace with hash 749632042, now seen corresponding path program 1 times [2019-12-07 14:10:43,756 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:43,756 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1174621811] [2019-12-07 14:10:43,756 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:43,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:43,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:43,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1174621811] [2019-12-07 14:10:43,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:43,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:10:43,837 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1280848304] [2019-12-07 14:10:43,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:10:43,838 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:43,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:10:43,838 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:10:43,838 INFO L87 Difference]: Start difference. First operand 56226 states and 226882 transitions. Second operand 4 states. [2019-12-07 14:10:44,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:44,605 INFO L93 Difference]: Finished difference Result 90514 states and 350820 transitions. [2019-12-07 14:10:44,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:10:44,606 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:10:44,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:44,839 INFO L225 Difference]: With dead ends: 90514 [2019-12-07 14:10:44,839 INFO L226 Difference]: Without dead ends: 90500 [2019-12-07 14:10:44,840 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:10:45,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90500 states. [2019-12-07 14:10:47,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90500 to 87886. [2019-12-07 14:10:47,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87886 states. [2019-12-07 14:10:47,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87886 states to 87886 states and 342542 transitions. [2019-12-07 14:10:47,367 INFO L78 Accepts]: Start accepts. Automaton has 87886 states and 342542 transitions. Word has length 13 [2019-12-07 14:10:47,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:47,367 INFO L462 AbstractCegarLoop]: Abstraction has 87886 states and 342542 transitions. [2019-12-07 14:10:47,368 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:10:47,368 INFO L276 IsEmpty]: Start isEmpty. Operand 87886 states and 342542 transitions. [2019-12-07 14:10:47,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:10:47,369 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:47,369 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:47,370 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:47,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:47,370 INFO L82 PathProgramCache]: Analyzing trace with hash -1969493490, now seen corresponding path program 1 times [2019-12-07 14:10:47,370 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:47,370 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [45423405] [2019-12-07 14:10:47,370 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:47,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:47,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:47,405 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [45423405] [2019-12-07 14:10:47,405 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:47,405 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:10:47,405 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1953852212] [2019-12-07 14:10:47,405 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:10:47,406 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:47,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:10:47,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:10:47,406 INFO L87 Difference]: Start difference. First operand 87886 states and 342542 transitions. Second operand 3 states. [2019-12-07 14:10:47,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:47,699 INFO L93 Difference]: Finished difference Result 48011 states and 163167 transitions. [2019-12-07 14:10:47,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:10:47,699 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 14:10:47,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:47,789 INFO L225 Difference]: With dead ends: 48011 [2019-12-07 14:10:47,789 INFO L226 Difference]: Without dead ends: 48011 [2019-12-07 14:10:47,789 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:10:48,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48011 states. [2019-12-07 14:10:48,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48011 to 48011. [2019-12-07 14:10:48,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48011 states. [2019-12-07 14:10:48,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48011 states to 48011 states and 163167 transitions. [2019-12-07 14:10:48,864 INFO L78 Accepts]: Start accepts. Automaton has 48011 states and 163167 transitions. Word has length 13 [2019-12-07 14:10:48,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:48,864 INFO L462 AbstractCegarLoop]: Abstraction has 48011 states and 163167 transitions. [2019-12-07 14:10:48,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:10:48,864 INFO L276 IsEmpty]: Start isEmpty. Operand 48011 states and 163167 transitions. [2019-12-07 14:10:48,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:10:48,865 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:48,865 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:48,866 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:48,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:48,866 INFO L82 PathProgramCache]: Analyzing trace with hash 802741009, now seen corresponding path program 1 times [2019-12-07 14:10:48,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:48,866 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335402885] [2019-12-07 14:10:48,866 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:48,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:48,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:48,897 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1335402885] [2019-12-07 14:10:48,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:48,898 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:10:48,898 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [262829822] [2019-12-07 14:10:48,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:10:48,898 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:48,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:10:48,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:10:48,898 INFO L87 Difference]: Start difference. First operand 48011 states and 163167 transitions. Second operand 4 states. [2019-12-07 14:10:48,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:48,919 INFO L93 Difference]: Finished difference Result 5081 states and 12972 transitions. [2019-12-07 14:10:48,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:10:48,919 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 14:10:48,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:48,924 INFO L225 Difference]: With dead ends: 5081 [2019-12-07 14:10:48,924 INFO L226 Difference]: Without dead ends: 5081 [2019-12-07 14:10:48,925 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:10:48,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5081 states. [2019-12-07 14:10:48,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5081 to 5081. [2019-12-07 14:10:48,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5081 states. [2019-12-07 14:10:48,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5081 states to 5081 states and 12972 transitions. [2019-12-07 14:10:48,979 INFO L78 Accepts]: Start accepts. Automaton has 5081 states and 12972 transitions. Word has length 14 [2019-12-07 14:10:48,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:48,979 INFO L462 AbstractCegarLoop]: Abstraction has 5081 states and 12972 transitions. [2019-12-07 14:10:48,979 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:10:48,979 INFO L276 IsEmpty]: Start isEmpty. Operand 5081 states and 12972 transitions. [2019-12-07 14:10:48,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 14:10:48,982 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:48,982 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:48,982 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:48,982 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:48,982 INFO L82 PathProgramCache]: Analyzing trace with hash 1593078696, now seen corresponding path program 1 times [2019-12-07 14:10:48,982 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:48,982 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469220952] [2019-12-07 14:10:48,982 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:48,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:49,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:49,057 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [469220952] [2019-12-07 14:10:49,057 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:49,057 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:10:49,057 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286474684] [2019-12-07 14:10:49,058 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:10:49,058 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:49,058 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:10:49,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:10:49,058 INFO L87 Difference]: Start difference. First operand 5081 states and 12972 transitions. Second operand 5 states. [2019-12-07 14:10:49,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:49,356 INFO L93 Difference]: Finished difference Result 6152 states and 15339 transitions. [2019-12-07 14:10:49,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:10:49,357 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 14:10:49,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:49,362 INFO L225 Difference]: With dead ends: 6152 [2019-12-07 14:10:49,363 INFO L226 Difference]: Without dead ends: 6152 [2019-12-07 14:10:49,363 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:10:49,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6152 states. [2019-12-07 14:10:49,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6152 to 5933. [2019-12-07 14:10:49,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5933 states. [2019-12-07 14:10:49,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5933 states to 5933 states and 14914 transitions. [2019-12-07 14:10:49,452 INFO L78 Accepts]: Start accepts. Automaton has 5933 states and 14914 transitions. Word has length 26 [2019-12-07 14:10:49,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:49,453 INFO L462 AbstractCegarLoop]: Abstraction has 5933 states and 14914 transitions. [2019-12-07 14:10:49,453 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:10:49,453 INFO L276 IsEmpty]: Start isEmpty. Operand 5933 states and 14914 transitions. [2019-12-07 14:10:49,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 14:10:49,458 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:49,458 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:49,458 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:49,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:49,458 INFO L82 PathProgramCache]: Analyzing trace with hash -794955037, now seen corresponding path program 1 times [2019-12-07 14:10:49,459 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:49,459 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147097664] [2019-12-07 14:10:49,459 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:49,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:49,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:49,512 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [147097664] [2019-12-07 14:10:49,512 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:49,512 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:10:49,512 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1783998477] [2019-12-07 14:10:49,512 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:10:49,513 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:49,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:10:49,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:10:49,513 INFO L87 Difference]: Start difference. First operand 5933 states and 14914 transitions. Second operand 5 states. [2019-12-07 14:10:49,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:49,532 INFO L93 Difference]: Finished difference Result 1999 states and 5247 transitions. [2019-12-07 14:10:49,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:10:49,532 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 14:10:49,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:49,534 INFO L225 Difference]: With dead ends: 1999 [2019-12-07 14:10:49,534 INFO L226 Difference]: Without dead ends: 1999 [2019-12-07 14:10:49,534 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:10:49,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1999 states. [2019-12-07 14:10:49,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1999 to 1901. [2019-12-07 14:10:49,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1901 states. [2019-12-07 14:10:49,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1901 states to 1901 states and 5016 transitions. [2019-12-07 14:10:49,553 INFO L78 Accepts]: Start accepts. Automaton has 1901 states and 5016 transitions. Word has length 40 [2019-12-07 14:10:49,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:49,553 INFO L462 AbstractCegarLoop]: Abstraction has 1901 states and 5016 transitions. [2019-12-07 14:10:49,553 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:10:49,553 INFO L276 IsEmpty]: Start isEmpty. Operand 1901 states and 5016 transitions. [2019-12-07 14:10:49,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-07 14:10:49,557 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:49,557 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:49,557 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:49,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:49,557 INFO L82 PathProgramCache]: Analyzing trace with hash 76160980, now seen corresponding path program 1 times [2019-12-07 14:10:49,557 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:49,557 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1353560731] [2019-12-07 14:10:49,557 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:49,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:49,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:49,630 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1353560731] [2019-12-07 14:10:49,630 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:49,630 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:10:49,630 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [135657064] [2019-12-07 14:10:49,631 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:10:49,631 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:49,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:10:49,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:10:49,631 INFO L87 Difference]: Start difference. First operand 1901 states and 5016 transitions. Second operand 5 states. [2019-12-07 14:10:49,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:49,934 INFO L93 Difference]: Finished difference Result 2838 states and 7424 transitions. [2019-12-07 14:10:49,934 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:10:49,934 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 71 [2019-12-07 14:10:49,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:49,937 INFO L225 Difference]: With dead ends: 2838 [2019-12-07 14:10:49,937 INFO L226 Difference]: Without dead ends: 2838 [2019-12-07 14:10:49,937 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:10:49,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2838 states. [2019-12-07 14:10:49,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2838 to 2250. [2019-12-07 14:10:49,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2250 states. [2019-12-07 14:10:49,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2250 states to 2250 states and 5940 transitions. [2019-12-07 14:10:49,966 INFO L78 Accepts]: Start accepts. Automaton has 2250 states and 5940 transitions. Word has length 71 [2019-12-07 14:10:49,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:49,967 INFO L462 AbstractCegarLoop]: Abstraction has 2250 states and 5940 transitions. [2019-12-07 14:10:49,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:10:49,967 INFO L276 IsEmpty]: Start isEmpty. Operand 2250 states and 5940 transitions. [2019-12-07 14:10:49,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-07 14:10:49,971 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:49,971 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:49,971 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:49,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:49,971 INFO L82 PathProgramCache]: Analyzing trace with hash -789175518, now seen corresponding path program 2 times [2019-12-07 14:10:49,971 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:49,972 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [247827763] [2019-12-07 14:10:49,972 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:49,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:50,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:50,066 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [247827763] [2019-12-07 14:10:50,066 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:50,066 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:10:50,066 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1321082781] [2019-12-07 14:10:50,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:10:50,067 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:50,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:10:50,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:10:50,067 INFO L87 Difference]: Start difference. First operand 2250 states and 5940 transitions. Second operand 7 states. [2019-12-07 14:10:50,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:50,487 INFO L93 Difference]: Finished difference Result 2503 states and 6536 transitions. [2019-12-07 14:10:50,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 14:10:50,488 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 71 [2019-12-07 14:10:50,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:50,490 INFO L225 Difference]: With dead ends: 2503 [2019-12-07 14:10:50,490 INFO L226 Difference]: Without dead ends: 2503 [2019-12-07 14:10:50,490 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:10:50,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2503 states. [2019-12-07 14:10:50,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2503 to 2320. [2019-12-07 14:10:50,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2320 states. [2019-12-07 14:10:50,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2320 states to 2320 states and 6105 transitions. [2019-12-07 14:10:50,513 INFO L78 Accepts]: Start accepts. Automaton has 2320 states and 6105 transitions. Word has length 71 [2019-12-07 14:10:50,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:50,513 INFO L462 AbstractCegarLoop]: Abstraction has 2320 states and 6105 transitions. [2019-12-07 14:10:50,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:10:50,513 INFO L276 IsEmpty]: Start isEmpty. Operand 2320 states and 6105 transitions. [2019-12-07 14:10:50,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-07 14:10:50,516 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:50,517 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:50,517 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:50,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:50,517 INFO L82 PathProgramCache]: Analyzing trace with hash 920625250, now seen corresponding path program 3 times [2019-12-07 14:10:50,517 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:50,517 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508512521] [2019-12-07 14:10:50,517 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:50,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:50,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:50,597 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1508512521] [2019-12-07 14:10:50,597 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:50,597 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:10:50,598 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [55309153] [2019-12-07 14:10:50,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:10:50,598 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:50,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:10:50,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:10:50,598 INFO L87 Difference]: Start difference. First operand 2320 states and 6105 transitions. Second operand 6 states. [2019-12-07 14:10:50,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:50,887 INFO L93 Difference]: Finished difference Result 3518 states and 9150 transitions. [2019-12-07 14:10:50,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:10:50,888 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 71 [2019-12-07 14:10:50,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:50,891 INFO L225 Difference]: With dead ends: 3518 [2019-12-07 14:10:50,891 INFO L226 Difference]: Without dead ends: 3518 [2019-12-07 14:10:50,891 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:10:50,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3518 states. [2019-12-07 14:10:50,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3518 to 2608. [2019-12-07 14:10:50,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2608 states. [2019-12-07 14:10:50,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2608 states to 2608 states and 6755 transitions. [2019-12-07 14:10:50,918 INFO L78 Accepts]: Start accepts. Automaton has 2608 states and 6755 transitions. Word has length 71 [2019-12-07 14:10:50,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:50,918 INFO L462 AbstractCegarLoop]: Abstraction has 2608 states and 6755 transitions. [2019-12-07 14:10:50,918 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:10:50,918 INFO L276 IsEmpty]: Start isEmpty. Operand 2608 states and 6755 transitions. [2019-12-07 14:10:50,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 14:10:50,921 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:50,921 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:50,921 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:50,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:50,921 INFO L82 PathProgramCache]: Analyzing trace with hash -1439498402, now seen corresponding path program 1 times [2019-12-07 14:10:50,922 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:50,922 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2069201710] [2019-12-07 14:10:50,922 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:50,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:50,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:50,997 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2069201710] [2019-12-07 14:10:50,998 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:50,998 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:10:50,998 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1449565431] [2019-12-07 14:10:50,998 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:10:50,998 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:50,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:10:50,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:10:50,998 INFO L87 Difference]: Start difference. First operand 2608 states and 6755 transitions. Second operand 7 states. [2019-12-07 14:10:51,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:51,477 INFO L93 Difference]: Finished difference Result 4161 states and 10735 transitions. [2019-12-07 14:10:51,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:10:51,477 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 72 [2019-12-07 14:10:51,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:51,481 INFO L225 Difference]: With dead ends: 4161 [2019-12-07 14:10:51,481 INFO L226 Difference]: Without dead ends: 4161 [2019-12-07 14:10:51,481 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:10:51,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4161 states. [2019-12-07 14:10:51,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4161 to 2620. [2019-12-07 14:10:51,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2620 states. [2019-12-07 14:10:51,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2620 states to 2620 states and 6783 transitions. [2019-12-07 14:10:51,511 INFO L78 Accepts]: Start accepts. Automaton has 2620 states and 6783 transitions. Word has length 72 [2019-12-07 14:10:51,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:51,511 INFO L462 AbstractCegarLoop]: Abstraction has 2620 states and 6783 transitions. [2019-12-07 14:10:51,511 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:10:51,511 INFO L276 IsEmpty]: Start isEmpty. Operand 2620 states and 6783 transitions. [2019-12-07 14:10:51,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 14:10:51,514 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:51,514 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:51,514 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:51,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:51,514 INFO L82 PathProgramCache]: Analyzing trace with hash 362991256, now seen corresponding path program 2 times [2019-12-07 14:10:51,514 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:51,514 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280037038] [2019-12-07 14:10:51,515 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:51,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:51,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:51,589 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1280037038] [2019-12-07 14:10:51,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:51,589 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:10:51,589 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [199139486] [2019-12-07 14:10:51,589 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:10:51,589 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:51,589 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:10:51,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:10:51,590 INFO L87 Difference]: Start difference. First operand 2620 states and 6783 transitions. Second operand 7 states. [2019-12-07 14:10:51,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:51,957 INFO L93 Difference]: Finished difference Result 4634 states and 11905 transitions. [2019-12-07 14:10:51,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 14:10:51,958 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 72 [2019-12-07 14:10:51,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:51,962 INFO L225 Difference]: With dead ends: 4634 [2019-12-07 14:10:51,962 INFO L226 Difference]: Without dead ends: 4634 [2019-12-07 14:10:51,962 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=110, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:10:51,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4634 states. [2019-12-07 14:10:51,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4634 to 2710. [2019-12-07 14:10:51,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2710 states. [2019-12-07 14:10:51,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2710 states to 2710 states and 7050 transitions. [2019-12-07 14:10:51,997 INFO L78 Accepts]: Start accepts. Automaton has 2710 states and 7050 transitions. Word has length 72 [2019-12-07 14:10:51,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:51,997 INFO L462 AbstractCegarLoop]: Abstraction has 2710 states and 7050 transitions. [2019-12-07 14:10:51,997 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:10:51,997 INFO L276 IsEmpty]: Start isEmpty. Operand 2710 states and 7050 transitions. [2019-12-07 14:10:52,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 14:10:52,002 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:52,002 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:52,002 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:52,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:52,002 INFO L82 PathProgramCache]: Analyzing trace with hash -697994534, now seen corresponding path program 3 times [2019-12-07 14:10:52,002 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:52,003 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030267993] [2019-12-07 14:10:52,003 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:52,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:52,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:52,070 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1030267993] [2019-12-07 14:10:52,070 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:52,070 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:10:52,070 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962858534] [2019-12-07 14:10:52,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:10:52,071 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:52,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:10:52,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:10:52,071 INFO L87 Difference]: Start difference. First operand 2710 states and 7050 transitions. Second operand 7 states. [2019-12-07 14:10:52,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:52,470 INFO L93 Difference]: Finished difference Result 4462 states and 11507 transitions. [2019-12-07 14:10:52,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 14:10:52,470 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 72 [2019-12-07 14:10:52,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:52,474 INFO L225 Difference]: With dead ends: 4462 [2019-12-07 14:10:52,474 INFO L226 Difference]: Without dead ends: 4462 [2019-12-07 14:10:52,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:10:52,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4462 states. [2019-12-07 14:10:52,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4462 to 2692. [2019-12-07 14:10:52,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2692 states. [2019-12-07 14:10:52,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2692 states to 2692 states and 7005 transitions. [2019-12-07 14:10:52,507 INFO L78 Accepts]: Start accepts. Automaton has 2692 states and 7005 transitions. Word has length 72 [2019-12-07 14:10:52,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:52,507 INFO L462 AbstractCegarLoop]: Abstraction has 2692 states and 7005 transitions. [2019-12-07 14:10:52,507 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:10:52,507 INFO L276 IsEmpty]: Start isEmpty. Operand 2692 states and 7005 transitions. [2019-12-07 14:10:52,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 14:10:52,510 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:52,510 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:52,510 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:52,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:52,510 INFO L82 PathProgramCache]: Analyzing trace with hash -2080066259, now seen corresponding path program 1 times [2019-12-07 14:10:52,510 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:52,511 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1942281671] [2019-12-07 14:10:52,511 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:52,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:52,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:52,556 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1942281671] [2019-12-07 14:10:52,556 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:52,556 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:10:52,556 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [427163822] [2019-12-07 14:10:52,557 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:10:52,557 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:52,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:10:52,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:10:52,557 INFO L87 Difference]: Start difference. First operand 2692 states and 7005 transitions. Second operand 6 states. [2019-12-07 14:10:52,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:52,866 INFO L93 Difference]: Finished difference Result 3471 states and 8956 transitions. [2019-12-07 14:10:52,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 14:10:52,866 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2019-12-07 14:10:52,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:52,869 INFO L225 Difference]: With dead ends: 3471 [2019-12-07 14:10:52,869 INFO L226 Difference]: Without dead ends: 3471 [2019-12-07 14:10:52,869 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:10:52,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3471 states. [2019-12-07 14:10:52,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3471 to 2888. [2019-12-07 14:10:52,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2888 states. [2019-12-07 14:10:52,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2888 states to 2888 states and 7509 transitions. [2019-12-07 14:10:52,899 INFO L78 Accepts]: Start accepts. Automaton has 2888 states and 7509 transitions. Word has length 72 [2019-12-07 14:10:52,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:52,899 INFO L462 AbstractCegarLoop]: Abstraction has 2888 states and 7509 transitions. [2019-12-07 14:10:52,899 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:10:52,899 INFO L276 IsEmpty]: Start isEmpty. Operand 2888 states and 7509 transitions. [2019-12-07 14:10:52,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 14:10:52,902 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:52,902 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:52,902 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:52,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:52,902 INFO L82 PathProgramCache]: Analyzing trace with hash -1499063086, now seen corresponding path program 1 times [2019-12-07 14:10:52,902 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:52,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1880822605] [2019-12-07 14:10:52,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:52,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:52,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:52,960 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1880822605] [2019-12-07 14:10:52,960 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:52,960 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:10:52,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [998104675] [2019-12-07 14:10:52,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:10:52,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:52,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:10:52,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:10:52,961 INFO L87 Difference]: Start difference. First operand 2888 states and 7509 transitions. Second operand 7 states. [2019-12-07 14:10:53,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:53,307 INFO L93 Difference]: Finished difference Result 3584 states and 9208 transitions. [2019-12-07 14:10:53,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:10:53,307 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 72 [2019-12-07 14:10:53,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:53,310 INFO L225 Difference]: With dead ends: 3584 [2019-12-07 14:10:53,310 INFO L226 Difference]: Without dead ends: 3584 [2019-12-07 14:10:53,310 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:10:53,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3584 states. [2019-12-07 14:10:53,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3584 to 2720. [2019-12-07 14:10:53,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2720 states. [2019-12-07 14:10:53,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2720 states to 2720 states and 7071 transitions. [2019-12-07 14:10:53,337 INFO L78 Accepts]: Start accepts. Automaton has 2720 states and 7071 transitions. Word has length 72 [2019-12-07 14:10:53,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:53,337 INFO L462 AbstractCegarLoop]: Abstraction has 2720 states and 7071 transitions. [2019-12-07 14:10:53,337 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:10:53,337 INFO L276 IsEmpty]: Start isEmpty. Operand 2720 states and 7071 transitions. [2019-12-07 14:10:53,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-12-07 14:10:53,340 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:53,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:53,341 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:53,341 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:53,341 INFO L82 PathProgramCache]: Analyzing trace with hash -298102113, now seen corresponding path program 1 times [2019-12-07 14:10:53,341 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:53,341 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371642669] [2019-12-07 14:10:53,341 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:53,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:53,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:53,392 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1371642669] [2019-12-07 14:10:53,392 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:53,393 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:10:53,393 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [394656428] [2019-12-07 14:10:53,393 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:10:53,393 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:53,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:10:53,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:10:53,393 INFO L87 Difference]: Start difference. First operand 2720 states and 7071 transitions. Second operand 3 states. [2019-12-07 14:10:53,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:53,406 INFO L93 Difference]: Finished difference Result 2408 states and 6097 transitions. [2019-12-07 14:10:53,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:10:53,407 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 73 [2019-12-07 14:10:53,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:53,409 INFO L225 Difference]: With dead ends: 2408 [2019-12-07 14:10:53,409 INFO L226 Difference]: Without dead ends: 2408 [2019-12-07 14:10:53,409 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:10:53,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2408 states. [2019-12-07 14:10:53,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2408 to 2408. [2019-12-07 14:10:53,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2408 states. [2019-12-07 14:10:53,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2408 states to 2408 states and 6097 transitions. [2019-12-07 14:10:53,432 INFO L78 Accepts]: Start accepts. Automaton has 2408 states and 6097 transitions. Word has length 73 [2019-12-07 14:10:53,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:53,432 INFO L462 AbstractCegarLoop]: Abstraction has 2408 states and 6097 transitions. [2019-12-07 14:10:53,432 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:10:53,432 INFO L276 IsEmpty]: Start isEmpty. Operand 2408 states and 6097 transitions. [2019-12-07 14:10:53,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-12-07 14:10:53,435 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:53,435 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:53,436 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:53,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:53,436 INFO L82 PathProgramCache]: Analyzing trace with hash -393402248, now seen corresponding path program 1 times [2019-12-07 14:10:53,436 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:53,436 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184078863] [2019-12-07 14:10:53,436 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:53,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:53,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:53,470 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184078863] [2019-12-07 14:10:53,470 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:53,470 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:10:53,470 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [3878332] [2019-12-07 14:10:53,471 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:10:53,471 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:53,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:10:53,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:10:53,471 INFO L87 Difference]: Start difference. First operand 2408 states and 6097 transitions. Second operand 3 states. [2019-12-07 14:10:53,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:53,499 INFO L93 Difference]: Finished difference Result 2407 states and 6095 transitions. [2019-12-07 14:10:53,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:10:53,499 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 73 [2019-12-07 14:10:53,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:53,501 INFO L225 Difference]: With dead ends: 2407 [2019-12-07 14:10:53,501 INFO L226 Difference]: Without dead ends: 2407 [2019-12-07 14:10:53,501 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:10:53,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2407 states. [2019-12-07 14:10:53,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2407 to 2152. [2019-12-07 14:10:53,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2152 states. [2019-12-07 14:10:53,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2152 states to 2152 states and 5506 transitions. [2019-12-07 14:10:53,522 INFO L78 Accepts]: Start accepts. Automaton has 2152 states and 5506 transitions. Word has length 73 [2019-12-07 14:10:53,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:53,522 INFO L462 AbstractCegarLoop]: Abstraction has 2152 states and 5506 transitions. [2019-12-07 14:10:53,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:10:53,522 INFO L276 IsEmpty]: Start isEmpty. Operand 2152 states and 5506 transitions. [2019-12-07 14:10:53,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-12-07 14:10:53,525 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:53,525 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:53,525 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:53,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:53,525 INFO L82 PathProgramCache]: Analyzing trace with hash -1480966909, now seen corresponding path program 1 times [2019-12-07 14:10:53,525 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:53,525 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [620182738] [2019-12-07 14:10:53,526 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:53,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:53,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:53,729 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [620182738] [2019-12-07 14:10:53,729 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:53,730 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:10:53,730 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1608712984] [2019-12-07 14:10:53,730 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:10:53,730 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:53,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:10:53,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:10:53,731 INFO L87 Difference]: Start difference. First operand 2152 states and 5506 transitions. Second operand 10 states. [2019-12-07 14:10:54,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:54,248 INFO L93 Difference]: Finished difference Result 4072 states and 10542 transitions. [2019-12-07 14:10:54,248 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 14:10:54,248 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 73 [2019-12-07 14:10:54,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:54,251 INFO L225 Difference]: With dead ends: 4072 [2019-12-07 14:10:54,252 INFO L226 Difference]: Without dead ends: 4072 [2019-12-07 14:10:54,252 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 8 SyntacticMatches, 3 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:10:54,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4072 states. [2019-12-07 14:10:54,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4072 to 2880. [2019-12-07 14:10:54,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2880 states. [2019-12-07 14:10:54,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2880 states to 2880 states and 7534 transitions. [2019-12-07 14:10:54,288 INFO L78 Accepts]: Start accepts. Automaton has 2880 states and 7534 transitions. Word has length 73 [2019-12-07 14:10:54,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:54,288 INFO L462 AbstractCegarLoop]: Abstraction has 2880 states and 7534 transitions. [2019-12-07 14:10:54,288 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:10:54,288 INFO L276 IsEmpty]: Start isEmpty. Operand 2880 states and 7534 transitions. [2019-12-07 14:10:54,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-12-07 14:10:54,292 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:54,292 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:54,292 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:54,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:54,292 INFO L82 PathProgramCache]: Analyzing trace with hash 1787574207, now seen corresponding path program 2 times [2019-12-07 14:10:54,292 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:54,292 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [943028679] [2019-12-07 14:10:54,292 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:54,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:54,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:54,478 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [943028679] [2019-12-07 14:10:54,478 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:54,478 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:10:54,478 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1619319420] [2019-12-07 14:10:54,479 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:10:54,479 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:54,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:10:54,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:10:54,479 INFO L87 Difference]: Start difference. First operand 2880 states and 7534 transitions. Second operand 10 states. [2019-12-07 14:10:55,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:55,212 INFO L93 Difference]: Finished difference Result 4964 states and 12960 transitions. [2019-12-07 14:10:55,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 14:10:55,212 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 73 [2019-12-07 14:10:55,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:55,216 INFO L225 Difference]: With dead ends: 4964 [2019-12-07 14:10:55,216 INFO L226 Difference]: Without dead ends: 4964 [2019-12-07 14:10:55,216 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 10 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=77, Invalid=229, Unknown=0, NotChecked=0, Total=306 [2019-12-07 14:10:55,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4964 states. [2019-12-07 14:10:55,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4964 to 2828. [2019-12-07 14:10:55,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2828 states. [2019-12-07 14:10:55,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2828 states to 2828 states and 7392 transitions. [2019-12-07 14:10:55,251 INFO L78 Accepts]: Start accepts. Automaton has 2828 states and 7392 transitions. Word has length 73 [2019-12-07 14:10:55,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:55,251 INFO L462 AbstractCegarLoop]: Abstraction has 2828 states and 7392 transitions. [2019-12-07 14:10:55,251 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:10:55,251 INFO L276 IsEmpty]: Start isEmpty. Operand 2828 states and 7392 transitions. [2019-12-07 14:10:55,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-12-07 14:10:55,254 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:55,254 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:55,254 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:55,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:55,254 INFO L82 PathProgramCache]: Analyzing trace with hash -1349965733, now seen corresponding path program 3 times [2019-12-07 14:10:55,255 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:55,255 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209035892] [2019-12-07 14:10:55,255 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:55,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:55,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:55,407 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209035892] [2019-12-07 14:10:55,407 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:55,407 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:10:55,407 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [851045177] [2019-12-07 14:10:55,407 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:10:55,407 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:55,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:10:55,408 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:10:55,408 INFO L87 Difference]: Start difference. First operand 2828 states and 7392 transitions. Second operand 10 states. [2019-12-07 14:10:56,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:56,143 INFO L93 Difference]: Finished difference Result 4901 states and 12696 transitions. [2019-12-07 14:10:56,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 14:10:56,143 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 73 [2019-12-07 14:10:56,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:56,150 INFO L225 Difference]: With dead ends: 4901 [2019-12-07 14:10:56,150 INFO L226 Difference]: Without dead ends: 4901 [2019-12-07 14:10:56,151 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 12 SyntacticMatches, 3 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=98, Invalid=282, Unknown=0, NotChecked=0, Total=380 [2019-12-07 14:10:56,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4901 states. [2019-12-07 14:10:56,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4901 to 2604. [2019-12-07 14:10:56,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2604 states. [2019-12-07 14:10:56,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2604 states to 2604 states and 6766 transitions. [2019-12-07 14:10:56,194 INFO L78 Accepts]: Start accepts. Automaton has 2604 states and 6766 transitions. Word has length 73 [2019-12-07 14:10:56,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:56,195 INFO L462 AbstractCegarLoop]: Abstraction has 2604 states and 6766 transitions. [2019-12-07 14:10:56,195 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:10:56,195 INFO L276 IsEmpty]: Start isEmpty. Operand 2604 states and 6766 transitions. [2019-12-07 14:10:56,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 14:10:56,197 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:56,197 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:56,198 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:56,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:56,198 INFO L82 PathProgramCache]: Analyzing trace with hash 95378273, now seen corresponding path program 1 times [2019-12-07 14:10:56,198 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:56,198 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202552701] [2019-12-07 14:10:56,198 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:56,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:56,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:56,285 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [202552701] [2019-12-07 14:10:56,285 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:56,285 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:10:56,285 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1707713140] [2019-12-07 14:10:56,285 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:10:56,285 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:56,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:10:56,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:10:56,285 INFO L87 Difference]: Start difference. First operand 2604 states and 6766 transitions. Second operand 6 states. [2019-12-07 14:10:56,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:56,371 INFO L93 Difference]: Finished difference Result 4264 states and 10371 transitions. [2019-12-07 14:10:56,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:10:56,372 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-12-07 14:10:56,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:56,373 INFO L225 Difference]: With dead ends: 4264 [2019-12-07 14:10:56,374 INFO L226 Difference]: Without dead ends: 1924 [2019-12-07 14:10:56,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:10:56,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1924 states. [2019-12-07 14:10:56,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1924 to 1567. [2019-12-07 14:10:56,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1567 states. [2019-12-07 14:10:56,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1567 states to 1567 states and 3457 transitions. [2019-12-07 14:10:56,388 INFO L78 Accepts]: Start accepts. Automaton has 1567 states and 3457 transitions. Word has length 74 [2019-12-07 14:10:56,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:56,388 INFO L462 AbstractCegarLoop]: Abstraction has 1567 states and 3457 transitions. [2019-12-07 14:10:56,388 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:10:56,388 INFO L276 IsEmpty]: Start isEmpty. Operand 1567 states and 3457 transitions. [2019-12-07 14:10:56,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 14:10:56,390 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:56,390 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:56,390 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:56,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:56,390 INFO L82 PathProgramCache]: Analyzing trace with hash 1817677093, now seen corresponding path program 2 times [2019-12-07 14:10:56,391 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:56,391 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [766688606] [2019-12-07 14:10:56,391 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:56,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:56,442 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:56,442 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [766688606] [2019-12-07 14:10:56,442 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:56,442 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:10:56,442 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1833903434] [2019-12-07 14:10:56,443 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:10:56,443 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:56,443 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:10:56,443 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:10:56,443 INFO L87 Difference]: Start difference. First operand 1567 states and 3457 transitions. Second operand 4 states. [2019-12-07 14:10:56,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:56,462 INFO L93 Difference]: Finished difference Result 1760 states and 3799 transitions. [2019-12-07 14:10:56,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:10:56,462 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 74 [2019-12-07 14:10:56,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:56,463 INFO L225 Difference]: With dead ends: 1760 [2019-12-07 14:10:56,463 INFO L226 Difference]: Without dead ends: 271 [2019-12-07 14:10:56,463 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:10:56,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 271 states. [2019-12-07 14:10:56,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 271 to 271. [2019-12-07 14:10:56,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 271 states. [2019-12-07 14:10:56,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 458 transitions. [2019-12-07 14:10:56,465 INFO L78 Accepts]: Start accepts. Automaton has 271 states and 458 transitions. Word has length 74 [2019-12-07 14:10:56,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:56,466 INFO L462 AbstractCegarLoop]: Abstraction has 271 states and 458 transitions. [2019-12-07 14:10:56,466 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:10:56,466 INFO L276 IsEmpty]: Start isEmpty. Operand 271 states and 458 transitions. [2019-12-07 14:10:56,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 14:10:56,466 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:56,466 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:56,466 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:56,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:56,466 INFO L82 PathProgramCache]: Analyzing trace with hash -398575509, now seen corresponding path program 3 times [2019-12-07 14:10:56,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:56,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1686057854] [2019-12-07 14:10:56,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:56,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:56,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:56,688 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1686057854] [2019-12-07 14:10:56,688 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:56,689 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 14:10:56,689 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [295628294] [2019-12-07 14:10:56,689 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 14:10:56,689 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:56,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 14:10:56,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=152, Unknown=0, NotChecked=0, Total=182 [2019-12-07 14:10:56,690 INFO L87 Difference]: Start difference. First operand 271 states and 458 transitions. Second operand 14 states. [2019-12-07 14:10:57,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:57,577 INFO L93 Difference]: Finished difference Result 562 states and 983 transitions. [2019-12-07 14:10:57,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 14:10:57,578 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 74 [2019-12-07 14:10:57,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:57,578 INFO L225 Difference]: With dead ends: 562 [2019-12-07 14:10:57,578 INFO L226 Difference]: Without dead ends: 532 [2019-12-07 14:10:57,579 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=96, Invalid=456, Unknown=0, NotChecked=0, Total=552 [2019-12-07 14:10:57,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 532 states. [2019-12-07 14:10:57,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 532 to 420. [2019-12-07 14:10:57,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 420 states. [2019-12-07 14:10:57,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 722 transitions. [2019-12-07 14:10:57,583 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 722 transitions. Word has length 74 [2019-12-07 14:10:57,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:57,584 INFO L462 AbstractCegarLoop]: Abstraction has 420 states and 722 transitions. [2019-12-07 14:10:57,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 14:10:57,584 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 722 transitions. [2019-12-07 14:10:57,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 14:10:57,585 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:57,585 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:57,585 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:57,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:57,585 INFO L82 PathProgramCache]: Analyzing trace with hash 346406315, now seen corresponding path program 4 times [2019-12-07 14:10:57,585 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:57,585 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [620275079] [2019-12-07 14:10:57,585 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:57,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:57,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:57,981 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [620275079] [2019-12-07 14:10:57,982 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:57,982 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 14:10:57,982 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1216538649] [2019-12-07 14:10:57,982 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 14:10:57,982 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:57,982 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 14:10:57,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=313, Unknown=0, NotChecked=0, Total=380 [2019-12-07 14:10:57,983 INFO L87 Difference]: Start difference. First operand 420 states and 722 transitions. Second operand 20 states. [2019-12-07 14:10:59,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:59,326 INFO L93 Difference]: Finished difference Result 1420 states and 2572 transitions. [2019-12-07 14:10:59,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 14:10:59,326 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 74 [2019-12-07 14:10:59,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:59,327 INFO L225 Difference]: With dead ends: 1420 [2019-12-07 14:10:59,327 INFO L226 Difference]: Without dead ends: 1390 [2019-12-07 14:10:59,328 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 317 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=283, Invalid=1439, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 14:10:59,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1390 states. [2019-12-07 14:10:59,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1390 to 500. [2019-12-07 14:10:59,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 500 states. [2019-12-07 14:10:59,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 500 states to 500 states and 865 transitions. [2019-12-07 14:10:59,335 INFO L78 Accepts]: Start accepts. Automaton has 500 states and 865 transitions. Word has length 74 [2019-12-07 14:10:59,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:59,335 INFO L462 AbstractCegarLoop]: Abstraction has 500 states and 865 transitions. [2019-12-07 14:10:59,335 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 14:10:59,335 INFO L276 IsEmpty]: Start isEmpty. Operand 500 states and 865 transitions. [2019-12-07 14:10:59,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 14:10:59,336 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:59,336 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:59,336 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:59,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:59,336 INFO L82 PathProgramCache]: Analyzing trace with hash 1958264683, now seen corresponding path program 5 times [2019-12-07 14:10:59,336 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:59,336 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699810875] [2019-12-07 14:10:59,336 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:59,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:10:59,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:10:59,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1699810875] [2019-12-07 14:10:59,531 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:10:59,531 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 14:10:59,531 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [35609466] [2019-12-07 14:10:59,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 14:10:59,532 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:10:59,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 14:10:59,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-12-07 14:10:59,532 INFO L87 Difference]: Start difference. First operand 500 states and 865 transitions. Second operand 14 states. [2019-12-07 14:10:59,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:10:59,907 INFO L93 Difference]: Finished difference Result 1070 states and 1873 transitions. [2019-12-07 14:10:59,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 14:10:59,908 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 74 [2019-12-07 14:10:59,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:10:59,908 INFO L225 Difference]: With dead ends: 1070 [2019-12-07 14:10:59,908 INFO L226 Difference]: Without dead ends: 1040 [2019-12-07 14:10:59,909 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=132, Invalid=518, Unknown=0, NotChecked=0, Total=650 [2019-12-07 14:10:59,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1040 states. [2019-12-07 14:10:59,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1040 to 509. [2019-12-07 14:10:59,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 509 states. [2019-12-07 14:10:59,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 509 states to 509 states and 872 transitions. [2019-12-07 14:10:59,914 INFO L78 Accepts]: Start accepts. Automaton has 509 states and 872 transitions. Word has length 74 [2019-12-07 14:10:59,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:10:59,914 INFO L462 AbstractCegarLoop]: Abstraction has 509 states and 872 transitions. [2019-12-07 14:10:59,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 14:10:59,914 INFO L276 IsEmpty]: Start isEmpty. Operand 509 states and 872 transitions. [2019-12-07 14:10:59,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 14:10:59,915 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:10:59,915 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:10:59,915 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:10:59,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:10:59,915 INFO L82 PathProgramCache]: Analyzing trace with hash 2034928915, now seen corresponding path program 6 times [2019-12-07 14:10:59,915 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:10:59,915 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [389959460] [2019-12-07 14:10:59,915 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:10:59,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:10:59,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:10:59,999 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:10:59,999 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:11:00,002 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1037] [1037] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_63| 0 0))) (and (= v_~y$r_buff1_thd1~0_137 0) (= v_~y$flush_delayed~0_201 0) (= v_~y$r_buff1_thd0~0_323 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= 0 v_~y$r_buff0_thd2~0_124) (= v_~y$w_buff1_used~0_443 0) (= 0 v_~y$r_buff1_thd3~0_282) (= 0 v_~y$r_buff0_thd3~0_461) (= v_~y$read_delayed~0_7 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t763~0.base_27|) (= 0 v_~y$w_buff0~0_180) (= v_~main$tmp_guard1~0_34 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~y$r_buff1_thd2~0_202) (= v_~y$r_buff0_thd0~0_357 0) (= v_~y$r_buff0_thd1~0_62 0) (= v_~__unbuffered_p2_EBX~0_22 0) (= |v_#valid_61| (store .cse0 |v_ULTIMATE.start_main_~#t763~0.base_27| 1)) (= v_~y~0_276 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t763~0.base_27| 4)) (= (select .cse0 |v_ULTIMATE.start_main_~#t763~0.base_27|) 0) (= v_~z~0_23 0) (= v_~weak$$choice2~0_236 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t763~0.base_27| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t763~0.base_27|) |v_ULTIMATE.start_main_~#t763~0.offset_21| 0)) |v_#memory_int_23|) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= |v_#NULL.offset_5| 0) (= v_~y$mem_tmp~0_174 0) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~__unbuffered_cnt~0_86) (= 0 v_~__unbuffered_p2_EAX~0_30) (= v_~x~0_36 0) (= v_~y$w_buff0_used~0_864 0) (= |v_ULTIMATE.start_main_~#t763~0.offset_21| 0) (= 0 |v_#NULL.base_5|) (= 0 v_~weak$$choice0~0_159))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t763~0.base=|v_ULTIMATE.start_main_~#t763~0.base_27|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_27|, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_46|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_65|, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_45|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_31|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_30|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_25|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_52|, ~y$mem_tmp~0=v_~y$mem_tmp~0_174, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_282, ULTIMATE.start_main_~#t764~0.offset=|v_ULTIMATE.start_main_~#t764~0.offset_16|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_62, ~y$flush_delayed~0=v_~y$flush_delayed~0_201, #length=|v_#length_25|, ULTIMATE.start_main_#t~nondet48=|v_ULTIMATE.start_main_#t~nondet48_53|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~nondet47=|v_ULTIMATE.start_main_#t~nondet47_53|, ULTIMATE.start_main_#t~ite58=|v_ULTIMATE.start_main_#t~ite58_45|, ULTIMATE.start_main_~#t764~0.base=|v_ULTIMATE.start_main_~#t764~0.base_19|, ULTIMATE.start_main_#t~ite54=|v_ULTIMATE.start_main_#t~ite54_76|, ULTIMATE.start_main_~#t765~0.base=|v_ULTIMATE.start_main_~#t765~0.base_18|, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_122|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_29|, ~weak$$choice0~0=v_~weak$$choice0~0_159, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_44|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_124, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_323, ~x~0=v_~x~0_36, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_864, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_65|, ULTIMATE.start_main_~#t765~0.offset=|v_ULTIMATE.start_main_~#t765~0.offset_15|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_53|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_29|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_55|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_75|, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_38|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_137, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_46|, ~y$w_buff0~0=v_~y$w_buff0~0_180, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_461, ~y~0=v_~y~0_276, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_25|, ULTIMATE.start_main_~#t763~0.offset=|v_ULTIMATE.start_main_~#t763~0.offset_21|, ULTIMATE.start_main_#t~ite57=|v_ULTIMATE.start_main_#t~ite57_36|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_39|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_58|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_84|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_27|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_202, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_35|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_43|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_357, #valid=|v_#valid_61|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_9|, ~z~0=v_~z~0_23, ~weak$$choice2~0=v_~weak$$choice2~0_236, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_443} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t763~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite64, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t764~0.offset, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~nondet48, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet47, ULTIMATE.start_main_#t~ite58, ULTIMATE.start_main_~#t764~0.base, ULTIMATE.start_main_#t~ite54, ULTIMATE.start_main_~#t765~0.base, ULTIMATE.start_main_#t~ite56, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite61, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_~#t765~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite69, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite67, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite65, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t763~0.offset, ULTIMATE.start_main_#t~ite57, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite55, ULTIMATE.start_main_#t~ite62, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:11:00,002 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1006] [1006] L818-1-->L820: Formula: (and (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t764~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t764~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t764~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t764~0.base_11|) |v_ULTIMATE.start_main_~#t764~0.offset_11| 1)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t764~0.base_11|) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t764~0.base_11| 1)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t764~0.base_11|)) (= |v_ULTIMATE.start_main_~#t764~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t764~0.offset=|v_ULTIMATE.start_main_~#t764~0.offset_11|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_6|, ULTIMATE.start_main_~#t764~0.base=|v_ULTIMATE.start_main_~#t764~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t764~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t764~0.base, #length] because there is no mapped edge [2019-12-07 14:11:00,003 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1004] [1004] L820-1-->L822: Formula: (and (= |v_ULTIMATE.start_main_~#t765~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t765~0.base_12|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t765~0.base_12| 4) |v_#length_15|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t765~0.base_12|) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t765~0.base_12|) 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t765~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t765~0.base_12|) |v_ULTIMATE.start_main_~#t765~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t765~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t765~0.offset=|v_ULTIMATE.start_main_~#t765~0.offset_10|, #length=|v_#length_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t765~0.base=|v_ULTIMATE.start_main_~#t765~0.base_12|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t765~0.offset, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t765~0.base] because there is no mapped edge [2019-12-07 14:11:00,003 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [948] [948] L4-->L780: Formula: (and (= 1 v_~y$r_buff0_thd3~0_204) (= v_~weak$$choice2~0_87 v_~y$flush_delayed~0_53) (= v_~y$r_buff0_thd2~0_62 v_~y$r_buff1_thd2~0_57) (= |v_P2Thread1of1ForFork1_#t~nondet9_44| v_~weak$$choice0~0_41) (not (= v_P2Thread1of1ForFork1___VERIFIER_assert_~expression_6 0)) (= v_~y$r_buff0_thd3~0_205 v_~y$r_buff1_thd3~0_107) (= |v_P2Thread1of1ForFork1_#t~nondet10_44| v_~weak$$choice2~0_87) (= v_~y~0_105 v_~y$mem_tmp~0_43) (= v_~y$r_buff0_thd0~0_153 v_~y$r_buff1_thd0~0_106) (= v_~y$r_buff0_thd1~0_24 v_~y$r_buff1_thd1~0_24)) InVars {P2Thread1of1ForFork1_#t~nondet10=|v_P2Thread1of1ForFork1_#t~nondet10_44|, P2Thread1of1ForFork1_#t~nondet9=|v_P2Thread1of1ForFork1_#t~nondet9_44|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_205, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_153, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_62, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24, ~y~0=v_~y~0_105, P2Thread1of1ForFork1___VERIFIER_assert_~expression=v_P2Thread1of1ForFork1___VERIFIER_assert_~expression_6} OutVars{P2Thread1of1ForFork1_#t~nondet10=|v_P2Thread1of1ForFork1_#t~nondet10_43|, P2Thread1of1ForFork1_#t~nondet9=|v_P2Thread1of1ForFork1_#t~nondet9_43|, P2Thread1of1ForFork1___VERIFIER_assert_~expression=v_P2Thread1of1ForFork1___VERIFIER_assert_~expression_6, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_57, ~weak$$choice0~0=v_~weak$$choice0~0_41, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_24, ~y$mem_tmp~0=v_~y$mem_tmp~0_43, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_107, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_204, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_153, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_62, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~y~0=v_~y~0_105, ~weak$$choice2~0=v_~weak$$choice2~0_87, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_106} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~weak$$choice0~0, ~y$r_buff1_thd1~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#t~nondet10, P2Thread1of1ForFork1_#t~nondet9, ~y$r_buff0_thd3~0, ~y$flush_delayed~0, ~weak$$choice2~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 14:11:00,004 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [955] [955] L780-2-->L780-5: Formula: (let ((.cse1 (= |P2Thread1of1ForFork1_#t~ite11_Out1549151741| |P2Thread1of1ForFork1_#t~ite12_Out1549151741|)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1549151741 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In1549151741 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= |P2Thread1of1ForFork1_#t~ite11_Out1549151741| ~y$w_buff0~0_In1549151741)) (and .cse1 (or .cse0 .cse2) (= |P2Thread1of1ForFork1_#t~ite11_Out1549151741| ~y$w_buff1~0_In1549151741)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1549151741, ~y$w_buff1~0=~y$w_buff1~0_In1549151741, ~y$w_buff0~0=~y$w_buff0~0_In1549151741, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1549151741} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1549151741, ~y$w_buff1~0=~y$w_buff1~0_In1549151741, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out1549151741|, ~y$w_buff0~0=~y$w_buff0~0_In1549151741, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1549151741, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out1549151741|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11, P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 14:11:00,006 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [942] [942] L785-->L786: Formula: (and (not (= (mod v_~weak$$choice2~0_81 256) 0)) (= v_~y$r_buff0_thd3~0_181 v_~y$r_buff0_thd3~0_180)) InVars {~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_181, ~weak$$choice2~0=v_~weak$$choice2~0_81} OutVars{P2Thread1of1ForFork1_#t~ite25=|v_P2Thread1of1ForFork1_#t~ite25_11|, P2Thread1of1ForFork1_#t~ite26=|v_P2Thread1of1ForFork1_#t~ite26_10|, P2Thread1of1ForFork1_#t~ite27=|v_P2Thread1of1ForFork1_#t~ite27_8|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_180, ~weak$$choice2~0=v_~weak$$choice2~0_81} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite25, P2Thread1of1ForFork1_#t~ite26, P2Thread1of1ForFork1_#t~ite27, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 14:11:00,007 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [956] [956] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$flush_delayed~0_In88053777 256)))) (or (and .cse0 (= ~y~0_In88053777 |P2Thread1of1ForFork1_#t~ite31_Out88053777|)) (and (= ~y$mem_tmp~0_In88053777 |P2Thread1of1ForFork1_#t~ite31_Out88053777|) (not .cse0)))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In88053777, ~y$flush_delayed~0=~y$flush_delayed~0_In88053777, ~y~0=~y~0_In88053777} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In88053777, P2Thread1of1ForFork1_#t~ite31=|P2Thread1of1ForFork1_#t~ite31_Out88053777|, ~y$flush_delayed~0=~y$flush_delayed~0_In88053777, ~y~0=~y~0_In88053777} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 14:11:00,007 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [997] [997] P0ENTRY-->P0EXIT: Formula: (and (= v_~z~0_19 1) (= v_P0Thread1of1ForFork2_~arg.base_11 |v_P0Thread1of1ForFork2_#in~arg.base_13|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= |v_P0Thread1of1ForFork2_#res.offset_9| 0) (= |v_P0Thread1of1ForFork2_#in~arg.offset_13| v_P0Thread1of1ForFork2_~arg.offset_11) (= v_~x~0_21 1) (= 0 |v_P0Thread1of1ForFork2_#res.base_9|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_13|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_13|} OutVars{P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_13|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_11, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_13|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_9|, ~z~0=v_~z~0_19, ~x~0=v_~x~0_21, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_11} AuxVars[] AssignedVars[P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, ~z~0, ~x~0, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 14:11:00,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [965] [965] L796-->L796-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1258652225 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1258652225 256)))) (or (and (= ~y$w_buff0_used~0_In-1258652225 |P2Thread1of1ForFork1_#t~ite34_Out-1258652225|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork1_#t~ite34_Out-1258652225|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1258652225, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1258652225} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1258652225, P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-1258652225|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1258652225} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 14:11:00,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [967] [967] L750-2-->L750-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork0_#t~ite4_Out-21163691| |P1Thread1of1ForFork0_#t~ite3_Out-21163691|)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-21163691 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-21163691 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= |P1Thread1of1ForFork0_#t~ite3_Out-21163691| ~y~0_In-21163691)) (and .cse0 (not .cse2) (not .cse1) (= ~y$w_buff1~0_In-21163691 |P1Thread1of1ForFork0_#t~ite3_Out-21163691|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-21163691, ~y$w_buff1~0=~y$w_buff1~0_In-21163691, ~y~0=~y~0_In-21163691, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-21163691} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-21163691, ~y$w_buff1~0=~y$w_buff1~0_In-21163691, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out-21163691|, ~y~0=~y~0_In-21163691, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out-21163691|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-21163691} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 14:11:00,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [982] [982] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-717560187 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-717560187 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork0_#t~ite5_Out-717560187| 0)) (and (= |P1Thread1of1ForFork0_#t~ite5_Out-717560187| ~y$w_buff0_used~0_In-717560187) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-717560187, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-717560187} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-717560187, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-717560187, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out-717560187|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:11:00,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [983] [983] L752-->L752-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-1362598977 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1362598977 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1362598977 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1362598977 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-1362598977 |P1Thread1of1ForFork0_#t~ite6_Out-1362598977|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork0_#t~ite6_Out-1362598977|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1362598977, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1362598977, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1362598977, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1362598977} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1362598977, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1362598977, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1362598977, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out-1362598977|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1362598977} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:11:00,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [966] [966] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-137988186 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-137988186 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite7_Out-137988186| ~y$r_buff0_thd2~0_In-137988186) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite7_Out-137988186| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-137988186, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-137988186} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-137988186, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-137988186, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out-137988186|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 14:11:00,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [984] [984] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd2~0_In-1345414454 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-1345414454 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-1345414454 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1345414454 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite8_Out-1345414454| ~y$r_buff1_thd2~0_In-1345414454) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork0_#t~ite8_Out-1345414454| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1345414454, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1345414454, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1345414454, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1345414454} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1345414454, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1345414454, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1345414454, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out-1345414454|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1345414454} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:11:00,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [992] [992] L754-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~y$r_buff1_thd2~0_75 |v_P1Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_42 1) v_~__unbuffered_cnt~0_41)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_26|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_75, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_25|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 14:11:00,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [958] [958] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In240006545 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd3~0_In240006545 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In240006545 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In240006545 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite35_Out240006545| ~y$w_buff1_used~0_In240006545)) (and (= |P2Thread1of1ForFork1_#t~ite35_Out240006545| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In240006545, ~y$w_buff0_used~0=~y$w_buff0_used~0_In240006545, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In240006545, ~y$w_buff1_used~0=~y$w_buff1_used~0_In240006545} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out240006545|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In240006545, ~y$w_buff0_used~0=~y$w_buff0_used~0_In240006545, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In240006545, ~y$w_buff1_used~0=~y$w_buff1_used~0_In240006545} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 14:11:00,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [962] [962] L798-->L799: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In500695448 ~y$r_buff0_thd3~0_Out500695448)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In500695448 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In500695448 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= 0 ~y$r_buff0_thd3~0_Out500695448) (not .cse0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In500695448, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In500695448} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out500695448|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In500695448, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out500695448} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 14:11:00,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [963] [963] L799-->L799-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1362338999 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1362338999 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In1362338999 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In1362338999 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite37_Out1362338999| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out1362338999| ~y$r_buff1_thd3~0_In1362338999)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1362338999, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1362338999, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1362338999, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1362338999} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1362338999, P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1362338999|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1362338999, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1362338999, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1362338999} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:11:00,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [994] [994] L799-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork1_#t~ite37_32| v_~y$r_buff1_thd3~0_143) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_143, P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_31|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 14:11:00,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [930] [930] L822-1-->L828: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_20) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:11:00,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [971] [971] L828-2-->L828-4: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-181303756 256))) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-181303756 256) 0))) (or (and (= ~y~0_In-181303756 |ULTIMATE.start_main_#t~ite41_Out-181303756|) (or .cse0 .cse1)) (and (not .cse1) (= ~y$w_buff1~0_In-181303756 |ULTIMATE.start_main_#t~ite41_Out-181303756|) (not .cse0)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-181303756, ~y~0=~y~0_In-181303756, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-181303756, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-181303756} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-181303756|, ~y$w_buff1~0=~y$w_buff1~0_In-181303756, ~y~0=~y~0_In-181303756, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-181303756, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-181303756} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 14:11:00,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [922] [922] L828-4-->L829: Formula: (= v_~y~0_57 |v_ULTIMATE.start_main_#t~ite41_9|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ~y~0=v_~y~0_57, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:11:00,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [977] [977] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-637124621 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-637124621 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite43_Out-637124621| ~y$w_buff0_used~0_In-637124621)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite43_Out-637124621|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-637124621, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-637124621} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-637124621, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-637124621, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-637124621|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 14:11:00,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [979] [979] L830-->L830-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-1300036617 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1300036617 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1300036617 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1300036617 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite44_Out-1300036617|)) (and (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-1300036617 |ULTIMATE.start_main_#t~ite44_Out-1300036617|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1300036617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1300036617, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1300036617, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1300036617} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1300036617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1300036617, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1300036617, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1300036617|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1300036617} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 14:11:00,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [981] [981] L831-->L831-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1954392875 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1954392875 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd0~0_In1954392875 |ULTIMATE.start_main_#t~ite45_Out1954392875|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite45_Out1954392875|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1954392875, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1954392875} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1954392875, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1954392875, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1954392875|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 14:11:00,013 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [964] [964] L832-->L832-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In1729964105 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In1729964105 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1729964105 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1729964105 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite46_Out1729964105| ~y$r_buff1_thd0~0_In1729964105) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite46_Out1729964105| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1729964105, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1729964105, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1729964105, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1729964105} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1729964105, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1729964105, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1729964105|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1729964105, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1729964105} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 14:11:00,017 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [975] [975] L847-->L847-2: Formula: (let ((.cse0 (= (mod ~y$flush_delayed~0_In-1486866840 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite69_Out-1486866840| ~y$mem_tmp~0_In-1486866840)) (and .cse0 (= ~y~0_In-1486866840 |ULTIMATE.start_main_#t~ite69_Out-1486866840|)))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In-1486866840, ~y$flush_delayed~0=~y$flush_delayed~0_In-1486866840, ~y~0=~y~0_In-1486866840} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In-1486866840, ~y$flush_delayed~0=~y$flush_delayed~0_In-1486866840, ULTIMATE.start_main_#t~ite69=|ULTIMATE.start_main_#t~ite69_Out-1486866840|, ~y~0=~y~0_In-1486866840} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite69] because there is no mapped edge [2019-12-07 14:11:00,017 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1032] [1032] L847-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~y~0_265 |v_ULTIMATE.start_main_#t~ite69_41|) (= v_~y$flush_delayed~0_194 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= (mod v_~main$tmp_guard1~0_27 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_41|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~y$flush_delayed~0=v_~y$flush_delayed~0_194, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_40|, ~y~0=v_~y~0_265, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite69, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:11:00,078 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:11:00 BasicIcfg [2019-12-07 14:11:00,078 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:11:00,078 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:11:00,078 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:11:00,078 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:11:00,078 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:10:33" (3/4) ... [2019-12-07 14:11:00,080 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:11:00,080 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1037] [1037] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_63| 0 0))) (and (= v_~y$r_buff1_thd1~0_137 0) (= v_~y$flush_delayed~0_201 0) (= v_~y$r_buff1_thd0~0_323 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= 0 v_~y$r_buff0_thd2~0_124) (= v_~y$w_buff1_used~0_443 0) (= 0 v_~y$r_buff1_thd3~0_282) (= 0 v_~y$r_buff0_thd3~0_461) (= v_~y$read_delayed~0_7 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t763~0.base_27|) (= 0 v_~y$w_buff0~0_180) (= v_~main$tmp_guard1~0_34 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~y$r_buff1_thd2~0_202) (= v_~y$r_buff0_thd0~0_357 0) (= v_~y$r_buff0_thd1~0_62 0) (= v_~__unbuffered_p2_EBX~0_22 0) (= |v_#valid_61| (store .cse0 |v_ULTIMATE.start_main_~#t763~0.base_27| 1)) (= v_~y~0_276 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t763~0.base_27| 4)) (= (select .cse0 |v_ULTIMATE.start_main_~#t763~0.base_27|) 0) (= v_~z~0_23 0) (= v_~weak$$choice2~0_236 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t763~0.base_27| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t763~0.base_27|) |v_ULTIMATE.start_main_~#t763~0.offset_21| 0)) |v_#memory_int_23|) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= |v_#NULL.offset_5| 0) (= v_~y$mem_tmp~0_174 0) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~__unbuffered_cnt~0_86) (= 0 v_~__unbuffered_p2_EAX~0_30) (= v_~x~0_36 0) (= v_~y$w_buff0_used~0_864 0) (= |v_ULTIMATE.start_main_~#t763~0.offset_21| 0) (= 0 |v_#NULL.base_5|) (= 0 v_~weak$$choice0~0_159))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t763~0.base=|v_ULTIMATE.start_main_~#t763~0.base_27|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_27|, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_46|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_65|, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_45|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_31|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_30|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_25|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_52|, ~y$mem_tmp~0=v_~y$mem_tmp~0_174, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_282, ULTIMATE.start_main_~#t764~0.offset=|v_ULTIMATE.start_main_~#t764~0.offset_16|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_62, ~y$flush_delayed~0=v_~y$flush_delayed~0_201, #length=|v_#length_25|, ULTIMATE.start_main_#t~nondet48=|v_ULTIMATE.start_main_#t~nondet48_53|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~nondet47=|v_ULTIMATE.start_main_#t~nondet47_53|, ULTIMATE.start_main_#t~ite58=|v_ULTIMATE.start_main_#t~ite58_45|, ULTIMATE.start_main_~#t764~0.base=|v_ULTIMATE.start_main_~#t764~0.base_19|, ULTIMATE.start_main_#t~ite54=|v_ULTIMATE.start_main_#t~ite54_76|, ULTIMATE.start_main_~#t765~0.base=|v_ULTIMATE.start_main_~#t765~0.base_18|, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_122|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_29|, ~weak$$choice0~0=v_~weak$$choice0~0_159, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_44|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_124, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_323, ~x~0=v_~x~0_36, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_864, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_65|, ULTIMATE.start_main_~#t765~0.offset=|v_ULTIMATE.start_main_~#t765~0.offset_15|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_53|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_29|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_55|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_75|, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_38|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_137, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_46|, ~y$w_buff0~0=v_~y$w_buff0~0_180, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_461, ~y~0=v_~y~0_276, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_25|, ULTIMATE.start_main_~#t763~0.offset=|v_ULTIMATE.start_main_~#t763~0.offset_21|, ULTIMATE.start_main_#t~ite57=|v_ULTIMATE.start_main_#t~ite57_36|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_39|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_58|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_84|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_27|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_202, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_35|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_43|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_357, #valid=|v_#valid_61|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_9|, ~z~0=v_~z~0_23, ~weak$$choice2~0=v_~weak$$choice2~0_236, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_443} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t763~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite64, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t764~0.offset, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~nondet48, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet47, ULTIMATE.start_main_#t~ite58, ULTIMATE.start_main_~#t764~0.base, ULTIMATE.start_main_#t~ite54, ULTIMATE.start_main_~#t765~0.base, ULTIMATE.start_main_#t~ite56, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite61, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_~#t765~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite69, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite67, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite65, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t763~0.offset, ULTIMATE.start_main_#t~ite57, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite55, ULTIMATE.start_main_#t~ite62, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:11:00,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1006] [1006] L818-1-->L820: Formula: (and (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t764~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t764~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t764~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t764~0.base_11|) |v_ULTIMATE.start_main_~#t764~0.offset_11| 1)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t764~0.base_11|) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t764~0.base_11| 1)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t764~0.base_11|)) (= |v_ULTIMATE.start_main_~#t764~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t764~0.offset=|v_ULTIMATE.start_main_~#t764~0.offset_11|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_6|, ULTIMATE.start_main_~#t764~0.base=|v_ULTIMATE.start_main_~#t764~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t764~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t764~0.base, #length] because there is no mapped edge [2019-12-07 14:11:00,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1004] [1004] L820-1-->L822: Formula: (and (= |v_ULTIMATE.start_main_~#t765~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t765~0.base_12|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t765~0.base_12| 4) |v_#length_15|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t765~0.base_12|) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t765~0.base_12|) 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t765~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t765~0.base_12|) |v_ULTIMATE.start_main_~#t765~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t765~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t765~0.offset=|v_ULTIMATE.start_main_~#t765~0.offset_10|, #length=|v_#length_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t765~0.base=|v_ULTIMATE.start_main_~#t765~0.base_12|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t765~0.offset, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t765~0.base] because there is no mapped edge [2019-12-07 14:11:00,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [948] [948] L4-->L780: Formula: (and (= 1 v_~y$r_buff0_thd3~0_204) (= v_~weak$$choice2~0_87 v_~y$flush_delayed~0_53) (= v_~y$r_buff0_thd2~0_62 v_~y$r_buff1_thd2~0_57) (= |v_P2Thread1of1ForFork1_#t~nondet9_44| v_~weak$$choice0~0_41) (not (= v_P2Thread1of1ForFork1___VERIFIER_assert_~expression_6 0)) (= v_~y$r_buff0_thd3~0_205 v_~y$r_buff1_thd3~0_107) (= |v_P2Thread1of1ForFork1_#t~nondet10_44| v_~weak$$choice2~0_87) (= v_~y~0_105 v_~y$mem_tmp~0_43) (= v_~y$r_buff0_thd0~0_153 v_~y$r_buff1_thd0~0_106) (= v_~y$r_buff0_thd1~0_24 v_~y$r_buff1_thd1~0_24)) InVars {P2Thread1of1ForFork1_#t~nondet10=|v_P2Thread1of1ForFork1_#t~nondet10_44|, P2Thread1of1ForFork1_#t~nondet9=|v_P2Thread1of1ForFork1_#t~nondet9_44|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_205, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_153, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_62, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24, ~y~0=v_~y~0_105, P2Thread1of1ForFork1___VERIFIER_assert_~expression=v_P2Thread1of1ForFork1___VERIFIER_assert_~expression_6} OutVars{P2Thread1of1ForFork1_#t~nondet10=|v_P2Thread1of1ForFork1_#t~nondet10_43|, P2Thread1of1ForFork1_#t~nondet9=|v_P2Thread1of1ForFork1_#t~nondet9_43|, P2Thread1of1ForFork1___VERIFIER_assert_~expression=v_P2Thread1of1ForFork1___VERIFIER_assert_~expression_6, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_57, ~weak$$choice0~0=v_~weak$$choice0~0_41, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_24, ~y$mem_tmp~0=v_~y$mem_tmp~0_43, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_107, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_204, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_153, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_62, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~y~0=v_~y~0_105, ~weak$$choice2~0=v_~weak$$choice2~0_87, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_106} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~weak$$choice0~0, ~y$r_buff1_thd1~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#t~nondet10, P2Thread1of1ForFork1_#t~nondet9, ~y$r_buff0_thd3~0, ~y$flush_delayed~0, ~weak$$choice2~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 14:11:00,082 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [955] [955] L780-2-->L780-5: Formula: (let ((.cse1 (= |P2Thread1of1ForFork1_#t~ite11_Out1549151741| |P2Thread1of1ForFork1_#t~ite12_Out1549151741|)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1549151741 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In1549151741 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= |P2Thread1of1ForFork1_#t~ite11_Out1549151741| ~y$w_buff0~0_In1549151741)) (and .cse1 (or .cse0 .cse2) (= |P2Thread1of1ForFork1_#t~ite11_Out1549151741| ~y$w_buff1~0_In1549151741)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1549151741, ~y$w_buff1~0=~y$w_buff1~0_In1549151741, ~y$w_buff0~0=~y$w_buff0~0_In1549151741, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1549151741} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1549151741, ~y$w_buff1~0=~y$w_buff1~0_In1549151741, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out1549151741|, ~y$w_buff0~0=~y$w_buff0~0_In1549151741, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1549151741, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out1549151741|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11, P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 14:11:00,084 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [942] [942] L785-->L786: Formula: (and (not (= (mod v_~weak$$choice2~0_81 256) 0)) (= v_~y$r_buff0_thd3~0_181 v_~y$r_buff0_thd3~0_180)) InVars {~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_181, ~weak$$choice2~0=v_~weak$$choice2~0_81} OutVars{P2Thread1of1ForFork1_#t~ite25=|v_P2Thread1of1ForFork1_#t~ite25_11|, P2Thread1of1ForFork1_#t~ite26=|v_P2Thread1of1ForFork1_#t~ite26_10|, P2Thread1of1ForFork1_#t~ite27=|v_P2Thread1of1ForFork1_#t~ite27_8|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_180, ~weak$$choice2~0=v_~weak$$choice2~0_81} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite25, P2Thread1of1ForFork1_#t~ite26, P2Thread1of1ForFork1_#t~ite27, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 14:11:00,085 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [956] [956] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$flush_delayed~0_In88053777 256)))) (or (and .cse0 (= ~y~0_In88053777 |P2Thread1of1ForFork1_#t~ite31_Out88053777|)) (and (= ~y$mem_tmp~0_In88053777 |P2Thread1of1ForFork1_#t~ite31_Out88053777|) (not .cse0)))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In88053777, ~y$flush_delayed~0=~y$flush_delayed~0_In88053777, ~y~0=~y~0_In88053777} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In88053777, P2Thread1of1ForFork1_#t~ite31=|P2Thread1of1ForFork1_#t~ite31_Out88053777|, ~y$flush_delayed~0=~y$flush_delayed~0_In88053777, ~y~0=~y~0_In88053777} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 14:11:00,085 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [997] [997] P0ENTRY-->P0EXIT: Formula: (and (= v_~z~0_19 1) (= v_P0Thread1of1ForFork2_~arg.base_11 |v_P0Thread1of1ForFork2_#in~arg.base_13|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= |v_P0Thread1of1ForFork2_#res.offset_9| 0) (= |v_P0Thread1of1ForFork2_#in~arg.offset_13| v_P0Thread1of1ForFork2_~arg.offset_11) (= v_~x~0_21 1) (= 0 |v_P0Thread1of1ForFork2_#res.base_9|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_13|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_13|} OutVars{P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_13|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_11, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_13|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_9|, ~z~0=v_~z~0_19, ~x~0=v_~x~0_21, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_11} AuxVars[] AssignedVars[P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, ~z~0, ~x~0, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 14:11:00,086 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [965] [965] L796-->L796-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1258652225 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1258652225 256)))) (or (and (= ~y$w_buff0_used~0_In-1258652225 |P2Thread1of1ForFork1_#t~ite34_Out-1258652225|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork1_#t~ite34_Out-1258652225|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1258652225, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1258652225} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1258652225, P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-1258652225|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1258652225} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 14:11:00,086 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [967] [967] L750-2-->L750-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork0_#t~ite4_Out-21163691| |P1Thread1of1ForFork0_#t~ite3_Out-21163691|)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-21163691 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-21163691 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= |P1Thread1of1ForFork0_#t~ite3_Out-21163691| ~y~0_In-21163691)) (and .cse0 (not .cse2) (not .cse1) (= ~y$w_buff1~0_In-21163691 |P1Thread1of1ForFork0_#t~ite3_Out-21163691|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-21163691, ~y$w_buff1~0=~y$w_buff1~0_In-21163691, ~y~0=~y~0_In-21163691, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-21163691} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-21163691, ~y$w_buff1~0=~y$w_buff1~0_In-21163691, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out-21163691|, ~y~0=~y~0_In-21163691, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out-21163691|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-21163691} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 14:11:00,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [982] [982] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-717560187 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-717560187 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork0_#t~ite5_Out-717560187| 0)) (and (= |P1Thread1of1ForFork0_#t~ite5_Out-717560187| ~y$w_buff0_used~0_In-717560187) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-717560187, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-717560187} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-717560187, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-717560187, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out-717560187|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:11:00,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [983] [983] L752-->L752-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-1362598977 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1362598977 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1362598977 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1362598977 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-1362598977 |P1Thread1of1ForFork0_#t~ite6_Out-1362598977|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork0_#t~ite6_Out-1362598977|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1362598977, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1362598977, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1362598977, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1362598977} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1362598977, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1362598977, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1362598977, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out-1362598977|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1362598977} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:11:00,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [966] [966] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-137988186 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-137988186 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite7_Out-137988186| ~y$r_buff0_thd2~0_In-137988186) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite7_Out-137988186| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-137988186, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-137988186} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-137988186, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-137988186, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out-137988186|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 14:11:00,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [984] [984] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd2~0_In-1345414454 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-1345414454 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-1345414454 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1345414454 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite8_Out-1345414454| ~y$r_buff1_thd2~0_In-1345414454) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork0_#t~ite8_Out-1345414454| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1345414454, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1345414454, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1345414454, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1345414454} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1345414454, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1345414454, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1345414454, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out-1345414454|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1345414454} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:11:00,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [992] [992] L754-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~y$r_buff1_thd2~0_75 |v_P1Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_42 1) v_~__unbuffered_cnt~0_41)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_26|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_75, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_25|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 14:11:00,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [958] [958] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In240006545 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd3~0_In240006545 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In240006545 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In240006545 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite35_Out240006545| ~y$w_buff1_used~0_In240006545)) (and (= |P2Thread1of1ForFork1_#t~ite35_Out240006545| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In240006545, ~y$w_buff0_used~0=~y$w_buff0_used~0_In240006545, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In240006545, ~y$w_buff1_used~0=~y$w_buff1_used~0_In240006545} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out240006545|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In240006545, ~y$w_buff0_used~0=~y$w_buff0_used~0_In240006545, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In240006545, ~y$w_buff1_used~0=~y$w_buff1_used~0_In240006545} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 14:11:00,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [962] [962] L798-->L799: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In500695448 ~y$r_buff0_thd3~0_Out500695448)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In500695448 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In500695448 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= 0 ~y$r_buff0_thd3~0_Out500695448) (not .cse0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In500695448, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In500695448} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out500695448|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In500695448, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out500695448} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 14:11:00,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [963] [963] L799-->L799-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1362338999 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1362338999 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In1362338999 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In1362338999 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite37_Out1362338999| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out1362338999| ~y$r_buff1_thd3~0_In1362338999)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1362338999, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1362338999, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1362338999, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1362338999} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1362338999, P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1362338999|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1362338999, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1362338999, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1362338999} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:11:00,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [994] [994] L799-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork1_#t~ite37_32| v_~y$r_buff1_thd3~0_143) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_143, P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_31|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 14:11:00,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [930] [930] L822-1-->L828: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_20) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:11:00,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [971] [971] L828-2-->L828-4: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-181303756 256))) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-181303756 256) 0))) (or (and (= ~y~0_In-181303756 |ULTIMATE.start_main_#t~ite41_Out-181303756|) (or .cse0 .cse1)) (and (not .cse1) (= ~y$w_buff1~0_In-181303756 |ULTIMATE.start_main_#t~ite41_Out-181303756|) (not .cse0)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-181303756, ~y~0=~y~0_In-181303756, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-181303756, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-181303756} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-181303756|, ~y$w_buff1~0=~y$w_buff1~0_In-181303756, ~y~0=~y~0_In-181303756, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-181303756, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-181303756} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 14:11:00,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [922] [922] L828-4-->L829: Formula: (= v_~y~0_57 |v_ULTIMATE.start_main_#t~ite41_9|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ~y~0=v_~y~0_57, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:11:00,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [977] [977] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-637124621 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-637124621 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite43_Out-637124621| ~y$w_buff0_used~0_In-637124621)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite43_Out-637124621|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-637124621, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-637124621} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-637124621, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-637124621, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-637124621|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 14:11:00,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [979] [979] L830-->L830-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-1300036617 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1300036617 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1300036617 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1300036617 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite44_Out-1300036617|)) (and (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-1300036617 |ULTIMATE.start_main_#t~ite44_Out-1300036617|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1300036617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1300036617, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1300036617, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1300036617} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1300036617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1300036617, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1300036617, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1300036617|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1300036617} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 14:11:00,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [981] [981] L831-->L831-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1954392875 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1954392875 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd0~0_In1954392875 |ULTIMATE.start_main_#t~ite45_Out1954392875|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite45_Out1954392875|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1954392875, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1954392875} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1954392875, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1954392875, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1954392875|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 14:11:00,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [964] [964] L832-->L832-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In1729964105 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In1729964105 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1729964105 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1729964105 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite46_Out1729964105| ~y$r_buff1_thd0~0_In1729964105) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite46_Out1729964105| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1729964105, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1729964105, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1729964105, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1729964105} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1729964105, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1729964105, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1729964105|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1729964105, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1729964105} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 14:11:00,095 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [975] [975] L847-->L847-2: Formula: (let ((.cse0 (= (mod ~y$flush_delayed~0_In-1486866840 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite69_Out-1486866840| ~y$mem_tmp~0_In-1486866840)) (and .cse0 (= ~y~0_In-1486866840 |ULTIMATE.start_main_#t~ite69_Out-1486866840|)))) InVars {~y$mem_tmp~0=~y$mem_tmp~0_In-1486866840, ~y$flush_delayed~0=~y$flush_delayed~0_In-1486866840, ~y~0=~y~0_In-1486866840} OutVars{~y$mem_tmp~0=~y$mem_tmp~0_In-1486866840, ~y$flush_delayed~0=~y$flush_delayed~0_In-1486866840, ULTIMATE.start_main_#t~ite69=|ULTIMATE.start_main_#t~ite69_Out-1486866840|, ~y~0=~y~0_In-1486866840} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite69] because there is no mapped edge [2019-12-07 14:11:00,095 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1032] [1032] L847-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~y~0_265 |v_ULTIMATE.start_main_#t~ite69_41|) (= v_~y$flush_delayed~0_194 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= (mod v_~main$tmp_guard1~0_27 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_41|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~y$flush_delayed~0=v_~y$flush_delayed~0_194, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_40|, ~y~0=v_~y~0_265, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite69, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:11:00,154 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_74d94450-71d3-45cf-a457-8b6a62455e88/bin/uautomizer/witness.graphml [2019-12-07 14:11:00,154 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:11:00,156 INFO L168 Benchmark]: Toolchain (without parser) took 27604.88 ms. Allocated memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: 1.6 GB). Free memory was 941.4 MB in the beginning and 701.8 MB in the end (delta: 239.5 MB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. [2019-12-07 14:11:00,156 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 963.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:11:00,156 INFO L168 Benchmark]: CACSL2BoogieTranslator took 391.39 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.4 MB). Free memory was 941.4 MB in the beginning and 1.1 GB in the end (delta: -127.9 MB). Peak memory consumption was 23.8 MB. Max. memory is 11.5 GB. [2019-12-07 14:11:00,156 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.49 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:11:00,156 INFO L168 Benchmark]: Boogie Preprocessor took 27.41 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:11:00,157 INFO L168 Benchmark]: RCFGBuilder took 472.24 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 59.5 MB). Peak memory consumption was 59.5 MB. Max. memory is 11.5 GB. [2019-12-07 14:11:00,157 INFO L168 Benchmark]: TraceAbstraction took 26591.66 ms. Allocated memory was 1.1 GB in the beginning and 2.7 GB in the end (delta: 1.5 GB). Free memory was 1.0 GB in the beginning and 740.2 MB in the end (delta: 264.2 MB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2019-12-07 14:11:00,157 INFO L168 Benchmark]: Witness Printer took 76.61 ms. Allocated memory is still 2.7 GB. Free memory was 740.2 MB in the beginning and 701.8 MB in the end (delta: 38.4 MB). Peak memory consumption was 38.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:11:00,159 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 963.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 391.39 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.4 MB). Free memory was 941.4 MB in the beginning and 1.1 GB in the end (delta: -127.9 MB). Peak memory consumption was 23.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.49 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.41 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 472.24 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 59.5 MB). Peak memory consumption was 59.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 26591.66 ms. Allocated memory was 1.1 GB in the beginning and 2.7 GB in the end (delta: 1.5 GB). Free memory was 1.0 GB in the beginning and 740.2 MB in the end (delta: 264.2 MB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. * Witness Printer took 76.61 ms. Allocated memory is still 2.7 GB. Free memory was 740.2 MB in the beginning and 701.8 MB in the end (delta: 38.4 MB). Peak memory consumption was 38.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 205 ProgramPointsBefore, 120 ProgramPointsAfterwards, 257 TransitionsBefore, 143 TransitionsAfterwards, 26988 CoEnabledTransitionPairs, 8 FixpointIterations, 32 TrivialSequentialCompositions, 39 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 56 ConcurrentYvCompositions, 33 ChoiceCompositions, 9380 VarBasedMoverChecksPositive, 296 VarBasedMoverChecksNegative, 65 SemBasedMoverChecksPositive, 320 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 165402 CheckedPairsTotal, 127 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t763, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L820] FCALL, FORK 0 pthread_create(&t764, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L822] FCALL, FORK 0 pthread_create(&t765, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L764] 3 y$w_buff1 = y$w_buff0 [L765] 3 y$w_buff0 = 2 [L766] 3 y$w_buff1_used = y$w_buff0_used [L767] 3 y$w_buff0_used = (_Bool)1 [L780] EXPR 3 !y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] 3 y = !y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff1) [L781] EXPR 3 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L781] 3 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)) [L782] EXPR 3 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L782] 3 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)) [L783] EXPR 3 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L783] 3 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used)) [L784] EXPR 3 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 3 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L786] EXPR 3 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L786] 3 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L787] 3 __unbuffered_p2_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=2, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L788] 3 y = y$flush_delayed ? y$mem_tmp : y [L789] 3 y$flush_delayed = (_Bool)0 [L792] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L795] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L744] 2 x = 2 [L747] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L795] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L750] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L750] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L751] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L752] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L753] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L796] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L797] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L828] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L829] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L830] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L831] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L832] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L835] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L836] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L837] 0 y$flush_delayed = weak$$choice2 [L838] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L839] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L839] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L840] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L840] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L841] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L841] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L842] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L842] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L843] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L843] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L844] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L844] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L845] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L845] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L846] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 2 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 196 locations, 2 error locations. Result: UNSAFE, OverallTime: 26.4s, OverallIterations: 25, TraceHistogramMax: 1, AutomataDifference: 10.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4957 SDtfs, 5772 SDslu, 15523 SDs, 0 SdLazy, 9908 SolverSat, 474 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 359 GetRequests, 96 SyntacticMatches, 36 SemanticMatches, 227 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 651 ImplicationChecksByTransitivity, 2.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=87886occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.1s AutomataMinimizationTime, 24 MinimizatonAttempts, 19064 StatesRemovedByMinimization, 19 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 1495 NumberOfCodeBlocks, 1495 NumberOfCodeBlocksAsserted, 25 NumberOfCheckSat, 1397 ConstructedInterpolants, 0 QuantifiedInterpolants, 401588 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 24 InterpolantComputations, 24 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...