./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix030_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix030_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 086dc9d5f963a24f9cd21a187a0fd44dadab7e7d .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:54:43,312 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:54:43,313 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:54:43,320 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:54:43,321 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:54:43,321 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:54:43,322 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:54:43,323 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:54:43,325 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:54:43,325 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:54:43,326 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:54:43,327 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:54:43,327 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:54:43,328 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:54:43,328 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:54:43,329 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:54:43,329 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:54:43,330 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:54:43,332 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:54:43,333 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:54:43,334 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:54:43,335 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:54:43,336 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:54:43,336 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:54:43,338 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:54:43,338 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:54:43,338 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:54:43,339 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:54:43,339 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:54:43,340 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:54:43,340 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:54:43,340 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:54:43,340 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:54:43,341 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:54:43,342 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:54:43,342 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:54:43,342 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:54:43,342 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:54:43,342 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:54:43,343 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:54:43,343 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:54:43,344 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:54:43,353 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:54:43,353 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:54:43,354 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:54:43,354 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:54:43,354 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:54:43,354 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:54:43,354 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:54:43,354 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:54:43,354 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:54:43,354 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:54:43,354 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:54:43,355 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:54:43,355 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:54:43,355 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:54:43,355 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:54:43,355 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:54:43,355 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:54:43,355 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:54:43,355 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:54:43,355 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:54:43,356 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:54:43,356 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:54:43,356 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:54:43,356 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:54:43,356 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:54:43,356 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:54:43,356 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:54:43,356 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:54:43,356 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:54:43,357 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 086dc9d5f963a24f9cd21a187a0fd44dadab7e7d [2019-12-07 18:54:43,456 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:54:43,466 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:54:43,469 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:54:43,470 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:54:43,470 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:54:43,471 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix030_tso.oepc.i [2019-12-07 18:54:43,517 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/data/ed41afff3/1e0ec3e50114406b8296deb7daf4650d/FLAG46e1bc965 [2019-12-07 18:54:43,880 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:54:43,881 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/sv-benchmarks/c/pthread-wmm/mix030_tso.oepc.i [2019-12-07 18:54:43,891 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/data/ed41afff3/1e0ec3e50114406b8296deb7daf4650d/FLAG46e1bc965 [2019-12-07 18:54:43,899 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/data/ed41afff3/1e0ec3e50114406b8296deb7daf4650d [2019-12-07 18:54:43,901 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:54:43,902 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:54:43,903 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:54:43,903 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:54:43,906 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:54:43,907 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:54:43" (1/1) ... [2019-12-07 18:54:43,909 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:43, skipping insertion in model container [2019-12-07 18:54:43,909 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:54:43" (1/1) ... [2019-12-07 18:54:43,915 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:54:43,953 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:54:44,207 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:54:44,214 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:54:44,260 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:54:44,305 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:54:44,305 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44 WrapperNode [2019-12-07 18:54:44,305 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:54:44,305 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:54:44,306 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:54:44,306 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:54:44,311 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44" (1/1) ... [2019-12-07 18:54:44,325 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44" (1/1) ... [2019-12-07 18:54:44,347 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:54:44,347 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:54:44,347 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:54:44,348 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:54:44,354 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44" (1/1) ... [2019-12-07 18:54:44,354 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44" (1/1) ... [2019-12-07 18:54:44,358 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44" (1/1) ... [2019-12-07 18:54:44,358 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44" (1/1) ... [2019-12-07 18:54:44,366 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44" (1/1) ... [2019-12-07 18:54:44,370 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44" (1/1) ... [2019-12-07 18:54:44,372 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44" (1/1) ... [2019-12-07 18:54:44,376 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:54:44,376 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:54:44,376 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:54:44,377 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:54:44,377 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:54:44,421 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:54:44,421 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:54:44,421 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:54:44,421 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:54:44,421 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:54:44,422 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:54:44,422 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:54:44,422 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:54:44,422 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:54:44,422 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:54:44,422 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 18:54:44,422 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 18:54:44,422 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:54:44,422 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:54:44,422 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:54:44,423 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:54:44,848 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:54:44,848 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:54:44,849 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:54:44 BoogieIcfgContainer [2019-12-07 18:54:44,849 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:54:44,850 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:54:44,850 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:54:44,852 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:54:44,852 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:54:43" (1/3) ... [2019-12-07 18:54:44,853 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a9c492f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:54:44, skipping insertion in model container [2019-12-07 18:54:44,853 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:44" (2/3) ... [2019-12-07 18:54:44,853 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a9c492f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:54:44, skipping insertion in model container [2019-12-07 18:54:44,853 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:54:44" (3/3) ... [2019-12-07 18:54:44,854 INFO L109 eAbstractionObserver]: Analyzing ICFG mix030_tso.oepc.i [2019-12-07 18:54:44,860 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:54:44,860 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:54:44,866 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:54:44,866 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:54:44,897 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,897 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,897 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,898 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,898 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,898 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,899 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,899 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,899 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,900 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,904 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,904 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,904 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,904 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,904 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,904 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,904 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,905 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,905 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,905 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,905 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,905 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,905 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,905 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,906 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,906 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,906 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,906 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,906 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,906 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,906 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,906 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,906 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,907 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,907 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,907 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,907 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,907 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,907 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,907 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,907 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,908 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,908 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,908 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,908 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,908 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,908 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,908 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,908 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,908 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,909 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,909 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,909 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,909 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,909 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,909 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,909 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,909 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,910 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,910 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,910 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,910 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,910 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,910 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,910 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,910 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,915 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,915 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,915 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,915 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,915 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,915 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,915 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,915 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,915 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,916 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,916 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,916 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,916 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,916 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,916 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,916 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,916 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,916 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,917 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,917 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,917 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,917 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,917 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,917 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,917 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,917 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,917 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,918 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,918 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,918 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,918 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:44,930 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 18:54:44,942 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:54:44,942 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:54:44,943 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:54:44,943 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:54:44,943 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:54:44,943 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:54:44,943 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:54:44,943 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:54:44,954 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 221 places, 270 transitions [2019-12-07 18:54:44,956 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 221 places, 270 transitions [2019-12-07 18:54:45,027 INFO L134 PetriNetUnfolder]: 62/266 cut-off events. [2019-12-07 18:54:45,027 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:54:45,042 INFO L76 FinitePrefix]: Finished finitePrefix Result has 279 conditions, 266 events. 62/266 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 890 event pairs. 12/214 useless extension candidates. Maximal degree in co-relation 235. Up to 2 conditions per place. [2019-12-07 18:54:45,066 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 221 places, 270 transitions [2019-12-07 18:54:45,109 INFO L134 PetriNetUnfolder]: 62/266 cut-off events. [2019-12-07 18:54:45,109 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:54:45,118 INFO L76 FinitePrefix]: Finished finitePrefix Result has 279 conditions, 266 events. 62/266 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 890 event pairs. 12/214 useless extension candidates. Maximal degree in co-relation 235. Up to 2 conditions per place. [2019-12-07 18:54:45,146 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 28796 [2019-12-07 18:54:45,147 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:54:48,797 WARN L192 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 18:54:48,937 INFO L206 etLargeBlockEncoding]: Checked pairs total: 145015 [2019-12-07 18:54:48,938 INFO L214 etLargeBlockEncoding]: Total number of compositions: 133 [2019-12-07 18:54:48,940 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 122 places, 142 transitions [2019-12-07 18:54:57,992 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 105210 states. [2019-12-07 18:54:57,994 INFO L276 IsEmpty]: Start isEmpty. Operand 105210 states. [2019-12-07 18:54:57,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 18:54:57,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:54:57,999 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:54:57,999 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:54:58,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:54:58,003 INFO L82 PathProgramCache]: Analyzing trace with hash 487193979, now seen corresponding path program 1 times [2019-12-07 18:54:58,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:54:58,008 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2049659003] [2019-12-07 18:54:58,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:54:58,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:54:58,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:54:58,161 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2049659003] [2019-12-07 18:54:58,161 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:54:58,162 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:54:58,162 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1893746848] [2019-12-07 18:54:58,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:54:58,165 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:54:58,174 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:54:58,174 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:54:58,175 INFO L87 Difference]: Start difference. First operand 105210 states. Second operand 3 states. [2019-12-07 18:54:59,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:54:59,066 INFO L93 Difference]: Finished difference Result 105018 states and 475984 transitions. [2019-12-07 18:54:59,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:54:59,067 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 18:54:59,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:54:59,656 INFO L225 Difference]: With dead ends: 105018 [2019-12-07 18:54:59,656 INFO L226 Difference]: Without dead ends: 102886 [2019-12-07 18:54:59,657 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:01,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102886 states. [2019-12-07 18:55:02,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102886 to 102886. [2019-12-07 18:55:02,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102886 states. [2019-12-07 18:55:02,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102886 states to 102886 states and 466780 transitions. [2019-12-07 18:55:02,981 INFO L78 Accepts]: Start accepts. Automaton has 102886 states and 466780 transitions. Word has length 9 [2019-12-07 18:55:02,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:02,982 INFO L462 AbstractCegarLoop]: Abstraction has 102886 states and 466780 transitions. [2019-12-07 18:55:02,982 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:02,982 INFO L276 IsEmpty]: Start isEmpty. Operand 102886 states and 466780 transitions. [2019-12-07 18:55:02,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:55:02,987 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:02,987 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:02,987 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:02,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:02,987 INFO L82 PathProgramCache]: Analyzing trace with hash 1814849602, now seen corresponding path program 1 times [2019-12-07 18:55:02,988 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:02,988 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1499357959] [2019-12-07 18:55:02,988 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:03,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:03,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:03,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1499357959] [2019-12-07 18:55:03,047 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:03,047 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:03,047 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [723512094] [2019-12-07 18:55:03,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:55:03,048 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:03,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:55:03,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:55:03,049 INFO L87 Difference]: Start difference. First operand 102886 states and 466780 transitions. Second operand 4 states. [2019-12-07 18:55:05,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:05,827 INFO L93 Difference]: Finished difference Result 165574 states and 725216 transitions. [2019-12-07 18:55:05,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:55:05,828 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:55:05,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:06,284 INFO L225 Difference]: With dead ends: 165574 [2019-12-07 18:55:06,284 INFO L226 Difference]: Without dead ends: 165546 [2019-12-07 18:55:06,285 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:08,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165546 states. [2019-12-07 18:55:10,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165546 to 160294. [2019-12-07 18:55:10,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160294 states. [2019-12-07 18:55:10,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160294 states to 160294 states and 705940 transitions. [2019-12-07 18:55:10,969 INFO L78 Accepts]: Start accepts. Automaton has 160294 states and 705940 transitions. Word has length 15 [2019-12-07 18:55:10,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:10,970 INFO L462 AbstractCegarLoop]: Abstraction has 160294 states and 705940 transitions. [2019-12-07 18:55:10,970 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:55:10,970 INFO L276 IsEmpty]: Start isEmpty. Operand 160294 states and 705940 transitions. [2019-12-07 18:55:10,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:55:10,972 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:10,972 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:10,972 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:10,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:10,972 INFO L82 PathProgramCache]: Analyzing trace with hash -1261715161, now seen corresponding path program 1 times [2019-12-07 18:55:10,972 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:10,972 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1902163452] [2019-12-07 18:55:10,973 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:10,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:11,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:11,018 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1902163452] [2019-12-07 18:55:11,018 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:11,018 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:11,018 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [171540352] [2019-12-07 18:55:11,019 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:55:11,019 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:11,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:55:11,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:55:11,019 INFO L87 Difference]: Start difference. First operand 160294 states and 705940 transitions. Second operand 4 states. [2019-12-07 18:55:14,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:14,264 INFO L93 Difference]: Finished difference Result 201342 states and 879852 transitions. [2019-12-07 18:55:14,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:55:14,265 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:55:14,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:14,821 INFO L225 Difference]: With dead ends: 201342 [2019-12-07 18:55:14,821 INFO L226 Difference]: Without dead ends: 201342 [2019-12-07 18:55:14,821 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:16,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201342 states. [2019-12-07 18:55:19,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201342 to 181090. [2019-12-07 18:55:19,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181090 states. [2019-12-07 18:55:20,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181090 states to 181090 states and 795812 transitions. [2019-12-07 18:55:20,185 INFO L78 Accepts]: Start accepts. Automaton has 181090 states and 795812 transitions. Word has length 15 [2019-12-07 18:55:20,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:20,185 INFO L462 AbstractCegarLoop]: Abstraction has 181090 states and 795812 transitions. [2019-12-07 18:55:20,186 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:55:20,186 INFO L276 IsEmpty]: Start isEmpty. Operand 181090 states and 795812 transitions. [2019-12-07 18:55:20,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 18:55:20,196 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:20,196 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:20,196 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:20,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:20,196 INFO L82 PathProgramCache]: Analyzing trace with hash 367966894, now seen corresponding path program 1 times [2019-12-07 18:55:20,197 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:20,197 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1292704136] [2019-12-07 18:55:20,197 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:20,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:20,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:20,268 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1292704136] [2019-12-07 18:55:20,268 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:20,268 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:55:20,268 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [408545138] [2019-12-07 18:55:20,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:20,268 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:20,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:20,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:20,269 INFO L87 Difference]: Start difference. First operand 181090 states and 795812 transitions. Second operand 5 states. [2019-12-07 18:55:21,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:21,775 INFO L93 Difference]: Finished difference Result 240062 states and 1039968 transitions. [2019-12-07 18:55:21,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:55:21,776 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 18:55:21,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:22,962 INFO L225 Difference]: With dead ends: 240062 [2019-12-07 18:55:22,963 INFO L226 Difference]: Without dead ends: 240034 [2019-12-07 18:55:22,963 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:55:25,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240034 states. [2019-12-07 18:55:30,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240034 to 181318. [2019-12-07 18:55:30,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181318 states. [2019-12-07 18:55:30,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181318 states to 181318 states and 796176 transitions. [2019-12-07 18:55:30,918 INFO L78 Accepts]: Start accepts. Automaton has 181318 states and 796176 transitions. Word has length 21 [2019-12-07 18:55:30,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:30,918 INFO L462 AbstractCegarLoop]: Abstraction has 181318 states and 796176 transitions. [2019-12-07 18:55:30,918 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:55:30,918 INFO L276 IsEmpty]: Start isEmpty. Operand 181318 states and 796176 transitions. [2019-12-07 18:55:30,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:55:30,972 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:30,972 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:30,972 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:30,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:30,973 INFO L82 PathProgramCache]: Analyzing trace with hash -728218178, now seen corresponding path program 1 times [2019-12-07 18:55:30,973 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:30,973 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215032400] [2019-12-07 18:55:30,973 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:30,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:31,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:31,016 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215032400] [2019-12-07 18:55:31,016 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:31,016 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:31,016 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [654704094] [2019-12-07 18:55:31,017 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:55:31,017 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:31,017 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:55:31,017 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:31,017 INFO L87 Difference]: Start difference. First operand 181318 states and 796176 transitions. Second operand 3 states. [2019-12-07 18:55:31,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:31,968 INFO L93 Difference]: Finished difference Result 140527 states and 571727 transitions. [2019-12-07 18:55:31,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:55:31,969 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 18:55:31,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:32,288 INFO L225 Difference]: With dead ends: 140527 [2019-12-07 18:55:32,289 INFO L226 Difference]: Without dead ends: 140527 [2019-12-07 18:55:32,289 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:33,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140527 states. [2019-12-07 18:55:35,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140527 to 140527. [2019-12-07 18:55:35,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140527 states. [2019-12-07 18:55:36,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140527 states to 140527 states and 571727 transitions. [2019-12-07 18:55:36,232 INFO L78 Accepts]: Start accepts. Automaton has 140527 states and 571727 transitions. Word has length 29 [2019-12-07 18:55:36,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:36,232 INFO L462 AbstractCegarLoop]: Abstraction has 140527 states and 571727 transitions. [2019-12-07 18:55:36,232 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:36,232 INFO L276 IsEmpty]: Start isEmpty. Operand 140527 states and 571727 transitions. [2019-12-07 18:55:36,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:55:36,268 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:36,268 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:36,268 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:36,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:36,268 INFO L82 PathProgramCache]: Analyzing trace with hash -1366585259, now seen corresponding path program 1 times [2019-12-07 18:55:36,268 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:36,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723974372] [2019-12-07 18:55:36,268 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:36,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:36,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:36,315 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723974372] [2019-12-07 18:55:36,315 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:36,315 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:55:36,315 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2040868044] [2019-12-07 18:55:36,316 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:55:36,316 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:36,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:55:36,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:55:36,316 INFO L87 Difference]: Start difference. First operand 140527 states and 571727 transitions. Second operand 4 states. [2019-12-07 18:55:36,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:36,490 INFO L93 Difference]: Finished difference Result 55376 states and 188470 transitions. [2019-12-07 18:55:36,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:55:36,490 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 18:55:36,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:36,586 INFO L225 Difference]: With dead ends: 55376 [2019-12-07 18:55:36,586 INFO L226 Difference]: Without dead ends: 55376 [2019-12-07 18:55:36,586 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:55:37,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55376 states. [2019-12-07 18:55:37,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55376 to 55376. [2019-12-07 18:55:37,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55376 states. [2019-12-07 18:55:37,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55376 states to 55376 states and 188470 transitions. [2019-12-07 18:55:37,718 INFO L78 Accepts]: Start accepts. Automaton has 55376 states and 188470 transitions. Word has length 30 [2019-12-07 18:55:37,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:37,719 INFO L462 AbstractCegarLoop]: Abstraction has 55376 states and 188470 transitions. [2019-12-07 18:55:37,719 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:55:37,719 INFO L276 IsEmpty]: Start isEmpty. Operand 55376 states and 188470 transitions. [2019-12-07 18:55:37,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 18:55:37,733 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:37,733 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:37,733 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:37,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:37,733 INFO L82 PathProgramCache]: Analyzing trace with hash -262160477, now seen corresponding path program 1 times [2019-12-07 18:55:37,734 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:37,734 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131267692] [2019-12-07 18:55:37,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:37,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:37,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:37,784 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131267692] [2019-12-07 18:55:37,784 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:37,784 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:55:37,785 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019348279] [2019-12-07 18:55:37,785 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:37,785 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:37,785 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:37,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:37,785 INFO L87 Difference]: Start difference. First operand 55376 states and 188470 transitions. Second operand 5 states. [2019-12-07 18:55:37,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:37,819 INFO L93 Difference]: Finished difference Result 7381 states and 20644 transitions. [2019-12-07 18:55:37,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:55:37,820 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 18:55:37,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:37,827 INFO L225 Difference]: With dead ends: 7381 [2019-12-07 18:55:37,827 INFO L226 Difference]: Without dead ends: 7381 [2019-12-07 18:55:37,827 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:37,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7381 states. [2019-12-07 18:55:37,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7381 to 7381. [2019-12-07 18:55:37,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7381 states. [2019-12-07 18:55:37,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7381 states to 7381 states and 20644 transitions. [2019-12-07 18:55:37,908 INFO L78 Accepts]: Start accepts. Automaton has 7381 states and 20644 transitions. Word has length 31 [2019-12-07 18:55:37,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:37,908 INFO L462 AbstractCegarLoop]: Abstraction has 7381 states and 20644 transitions. [2019-12-07 18:55:37,908 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:55:37,908 INFO L276 IsEmpty]: Start isEmpty. Operand 7381 states and 20644 transitions. [2019-12-07 18:55:37,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 18:55:37,913 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:37,913 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:37,914 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:37,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:37,914 INFO L82 PathProgramCache]: Analyzing trace with hash -340519042, now seen corresponding path program 1 times [2019-12-07 18:55:37,914 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:37,914 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2028803909] [2019-12-07 18:55:37,914 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:37,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:37,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:37,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2028803909] [2019-12-07 18:55:37,963 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:37,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:55:37,963 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1310256868] [2019-12-07 18:55:37,963 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:55:37,963 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:37,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:55:37,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:37,964 INFO L87 Difference]: Start difference. First operand 7381 states and 20644 transitions. Second operand 6 states. [2019-12-07 18:55:38,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:38,004 INFO L93 Difference]: Finished difference Result 3680 states and 11543 transitions. [2019-12-07 18:55:38,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:55:38,004 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 18:55:38,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:38,009 INFO L225 Difference]: With dead ends: 3680 [2019-12-07 18:55:38,009 INFO L226 Difference]: Without dead ends: 3680 [2019-12-07 18:55:38,009 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:38,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3680 states. [2019-12-07 18:55:38,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3680 to 3484. [2019-12-07 18:55:38,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3484 states. [2019-12-07 18:55:38,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3484 states to 3484 states and 10983 transitions. [2019-12-07 18:55:38,052 INFO L78 Accepts]: Start accepts. Automaton has 3484 states and 10983 transitions. Word has length 43 [2019-12-07 18:55:38,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:38,052 INFO L462 AbstractCegarLoop]: Abstraction has 3484 states and 10983 transitions. [2019-12-07 18:55:38,052 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:55:38,052 INFO L276 IsEmpty]: Start isEmpty. Operand 3484 states and 10983 transitions. [2019-12-07 18:55:38,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:55:38,056 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:38,056 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:38,056 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:38,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:38,056 INFO L82 PathProgramCache]: Analyzing trace with hash 1142900950, now seen corresponding path program 1 times [2019-12-07 18:55:38,057 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:38,057 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920498745] [2019-12-07 18:55:38,057 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:38,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:38,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:38,138 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920498745] [2019-12-07 18:55:38,138 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:38,138 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:55:38,138 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1096247082] [2019-12-07 18:55:38,139 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:55:38,139 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:38,139 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:55:38,139 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:38,139 INFO L87 Difference]: Start difference. First operand 3484 states and 10983 transitions. Second operand 6 states. [2019-12-07 18:55:38,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:38,491 INFO L93 Difference]: Finished difference Result 5253 states and 16417 transitions. [2019-12-07 18:55:38,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:55:38,492 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-12-07 18:55:38,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:38,497 INFO L225 Difference]: With dead ends: 5253 [2019-12-07 18:55:38,498 INFO L226 Difference]: Without dead ends: 5253 [2019-12-07 18:55:38,498 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:55:38,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5253 states. [2019-12-07 18:55:38,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5253 to 4173. [2019-12-07 18:55:38,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4173 states. [2019-12-07 18:55:38,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4173 states to 4173 states and 13137 transitions. [2019-12-07 18:55:38,551 INFO L78 Accepts]: Start accepts. Automaton has 4173 states and 13137 transitions. Word has length 74 [2019-12-07 18:55:38,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:38,551 INFO L462 AbstractCegarLoop]: Abstraction has 4173 states and 13137 transitions. [2019-12-07 18:55:38,551 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:55:38,551 INFO L276 IsEmpty]: Start isEmpty. Operand 4173 states and 13137 transitions. [2019-12-07 18:55:38,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:55:38,555 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:38,555 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:38,555 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:38,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:38,555 INFO L82 PathProgramCache]: Analyzing trace with hash -617148552, now seen corresponding path program 2 times [2019-12-07 18:55:38,556 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:38,556 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699960531] [2019-12-07 18:55:38,556 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:38,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:38,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:38,618 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1699960531] [2019-12-07 18:55:38,619 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:38,619 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:55:38,619 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [245508006] [2019-12-07 18:55:38,619 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:38,619 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:38,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:38,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:38,620 INFO L87 Difference]: Start difference. First operand 4173 states and 13137 transitions. Second operand 5 states. [2019-12-07 18:55:38,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:38,782 INFO L93 Difference]: Finished difference Result 4770 states and 14831 transitions. [2019-12-07 18:55:38,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:55:38,782 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 74 [2019-12-07 18:55:38,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:38,787 INFO L225 Difference]: With dead ends: 4770 [2019-12-07 18:55:38,787 INFO L226 Difference]: Without dead ends: 4770 [2019-12-07 18:55:38,787 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:38,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4770 states. [2019-12-07 18:55:38,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4770 to 4425. [2019-12-07 18:55:38,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4425 states. [2019-12-07 18:55:38,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4425 states to 4425 states and 13885 transitions. [2019-12-07 18:55:38,836 INFO L78 Accepts]: Start accepts. Automaton has 4425 states and 13885 transitions. Word has length 74 [2019-12-07 18:55:38,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:38,836 INFO L462 AbstractCegarLoop]: Abstraction has 4425 states and 13885 transitions. [2019-12-07 18:55:38,836 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:55:38,836 INFO L276 IsEmpty]: Start isEmpty. Operand 4425 states and 13885 transitions. [2019-12-07 18:55:38,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:55:38,839 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:38,840 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:38,840 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:38,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:38,840 INFO L82 PathProgramCache]: Analyzing trace with hash -115763946, now seen corresponding path program 3 times [2019-12-07 18:55:38,840 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:38,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1124027273] [2019-12-07 18:55:38,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:38,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:38,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:38,890 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1124027273] [2019-12-07 18:55:38,890 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:38,890 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:55:38,890 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [495153912] [2019-12-07 18:55:38,891 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:55:38,891 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:38,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:55:38,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:55:38,891 INFO L87 Difference]: Start difference. First operand 4425 states and 13885 transitions. Second operand 4 states. [2019-12-07 18:55:39,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:39,009 INFO L93 Difference]: Finished difference Result 8069 states and 25213 transitions. [2019-12-07 18:55:39,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:55:39,009 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 74 [2019-12-07 18:55:39,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:39,018 INFO L225 Difference]: With dead ends: 8069 [2019-12-07 18:55:39,018 INFO L226 Difference]: Without dead ends: 8069 [2019-12-07 18:55:39,018 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:55:39,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8069 states. [2019-12-07 18:55:39,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8069 to 5513. [2019-12-07 18:55:39,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5513 states. [2019-12-07 18:55:39,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5513 states to 5513 states and 17445 transitions. [2019-12-07 18:55:39,167 INFO L78 Accepts]: Start accepts. Automaton has 5513 states and 17445 transitions. Word has length 74 [2019-12-07 18:55:39,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:39,167 INFO L462 AbstractCegarLoop]: Abstraction has 5513 states and 17445 transitions. [2019-12-07 18:55:39,167 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:55:39,167 INFO L276 IsEmpty]: Start isEmpty. Operand 5513 states and 17445 transitions. [2019-12-07 18:55:39,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:55:39,172 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:39,172 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:39,172 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:39,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:39,172 INFO L82 PathProgramCache]: Analyzing trace with hash 95708500, now seen corresponding path program 4 times [2019-12-07 18:55:39,172 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:39,173 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1373395319] [2019-12-07 18:55:39,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:39,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:39,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:39,237 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1373395319] [2019-12-07 18:55:39,238 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:39,238 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:55:39,238 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [997653605] [2019-12-07 18:55:39,238 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:55:39,238 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:39,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:55:39,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:39,238 INFO L87 Difference]: Start difference. First operand 5513 states and 17445 transitions. Second operand 6 states. [2019-12-07 18:55:39,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:39,593 INFO L93 Difference]: Finished difference Result 6619 states and 20673 transitions. [2019-12-07 18:55:39,593 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:55:39,593 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-12-07 18:55:39,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:39,601 INFO L225 Difference]: With dead ends: 6619 [2019-12-07 18:55:39,601 INFO L226 Difference]: Without dead ends: 6619 [2019-12-07 18:55:39,602 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:55:39,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6619 states. [2019-12-07 18:55:39,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6619 to 5877. [2019-12-07 18:55:39,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5877 states. [2019-12-07 18:55:39,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5877 states to 5877 states and 18569 transitions. [2019-12-07 18:55:39,679 INFO L78 Accepts]: Start accepts. Automaton has 5877 states and 18569 transitions. Word has length 74 [2019-12-07 18:55:39,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:39,679 INFO L462 AbstractCegarLoop]: Abstraction has 5877 states and 18569 transitions. [2019-12-07 18:55:39,680 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:55:39,680 INFO L276 IsEmpty]: Start isEmpty. Operand 5877 states and 18569 transitions. [2019-12-07 18:55:39,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:55:39,685 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:39,685 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:39,685 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:39,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:39,685 INFO L82 PathProgramCache]: Analyzing trace with hash 1106475858, now seen corresponding path program 5 times [2019-12-07 18:55:39,686 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:39,686 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257898726] [2019-12-07 18:55:39,686 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:39,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:39,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:39,765 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [257898726] [2019-12-07 18:55:39,765 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:39,766 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:55:39,766 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2109678580] [2019-12-07 18:55:39,766 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:39,766 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:39,766 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:39,767 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:39,767 INFO L87 Difference]: Start difference. First operand 5877 states and 18569 transitions. Second operand 5 states. [2019-12-07 18:55:39,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:39,863 INFO L93 Difference]: Finished difference Result 11918 states and 35336 transitions. [2019-12-07 18:55:39,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:55:39,863 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 74 [2019-12-07 18:55:39,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:39,868 INFO L225 Difference]: With dead ends: 11918 [2019-12-07 18:55:39,868 INFO L226 Difference]: Without dead ends: 4815 [2019-12-07 18:55:39,868 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:39,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4815 states. [2019-12-07 18:55:39,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4815 to 3149. [2019-12-07 18:55:39,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3149 states. [2019-12-07 18:55:39,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3149 states to 3149 states and 8351 transitions. [2019-12-07 18:55:39,910 INFO L78 Accepts]: Start accepts. Automaton has 3149 states and 8351 transitions. Word has length 74 [2019-12-07 18:55:39,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:39,910 INFO L462 AbstractCegarLoop]: Abstraction has 3149 states and 8351 transitions. [2019-12-07 18:55:39,910 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:55:39,910 INFO L276 IsEmpty]: Start isEmpty. Operand 3149 states and 8351 transitions. [2019-12-07 18:55:39,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:55:39,912 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:39,913 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:39,913 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:39,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:39,913 INFO L82 PathProgramCache]: Analyzing trace with hash 2102579998, now seen corresponding path program 6 times [2019-12-07 18:55:39,913 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:39,913 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541194058] [2019-12-07 18:55:39,913 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:39,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:39,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:39,968 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1541194058] [2019-12-07 18:55:39,968 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:39,968 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:55:39,969 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1075576971] [2019-12-07 18:55:39,969 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:39,969 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:39,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:39,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:39,969 INFO L87 Difference]: Start difference. First operand 3149 states and 8351 transitions. Second operand 5 states. [2019-12-07 18:55:40,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:40,004 INFO L93 Difference]: Finished difference Result 3616 states and 9209 transitions. [2019-12-07 18:55:40,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:55:40,004 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 74 [2019-12-07 18:55:40,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:40,006 INFO L225 Difference]: With dead ends: 3616 [2019-12-07 18:55:40,006 INFO L226 Difference]: Without dead ends: 2010 [2019-12-07 18:55:40,007 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:55:40,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2010 states. [2019-12-07 18:55:40,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2010 to 2010. [2019-12-07 18:55:40,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2010 states. [2019-12-07 18:55:40,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2010 states to 2010 states and 4624 transitions. [2019-12-07 18:55:40,025 INFO L78 Accepts]: Start accepts. Automaton has 2010 states and 4624 transitions. Word has length 74 [2019-12-07 18:55:40,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:40,025 INFO L462 AbstractCegarLoop]: Abstraction has 2010 states and 4624 transitions. [2019-12-07 18:55:40,025 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:55:40,025 INFO L276 IsEmpty]: Start isEmpty. Operand 2010 states and 4624 transitions. [2019-12-07 18:55:40,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:55:40,027 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:40,027 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:40,027 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:40,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:40,027 INFO L82 PathProgramCache]: Analyzing trace with hash -2073578738, now seen corresponding path program 7 times [2019-12-07 18:55:40,027 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:40,028 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [290793548] [2019-12-07 18:55:40,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:40,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:40,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:40,101 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [290793548] [2019-12-07 18:55:40,101 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:40,101 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:55:40,101 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641527673] [2019-12-07 18:55:40,101 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:40,101 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:40,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:40,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:40,101 INFO L87 Difference]: Start difference. First operand 2010 states and 4624 transitions. Second operand 5 states. [2019-12-07 18:55:40,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:40,168 INFO L93 Difference]: Finished difference Result 2752 states and 6290 transitions. [2019-12-07 18:55:40,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:55:40,168 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 74 [2019-12-07 18:55:40,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:40,169 INFO L225 Difference]: With dead ends: 2752 [2019-12-07 18:55:40,169 INFO L226 Difference]: Without dead ends: 537 [2019-12-07 18:55:40,169 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:40,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2019-12-07 18:55:40,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 469. [2019-12-07 18:55:40,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 469 states. [2019-12-07 18:55:40,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 469 states to 469 states and 847 transitions. [2019-12-07 18:55:40,173 INFO L78 Accepts]: Start accepts. Automaton has 469 states and 847 transitions. Word has length 74 [2019-12-07 18:55:40,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:40,173 INFO L462 AbstractCegarLoop]: Abstraction has 469 states and 847 transitions. [2019-12-07 18:55:40,173 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:55:40,173 INFO L276 IsEmpty]: Start isEmpty. Operand 469 states and 847 transitions. [2019-12-07 18:55:40,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:55:40,173 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:40,174 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:40,174 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:40,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:40,174 INFO L82 PathProgramCache]: Analyzing trace with hash -433976880, now seen corresponding path program 8 times [2019-12-07 18:55:40,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:40,174 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470387237] [2019-12-07 18:55:40,174 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:40,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:40,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:40,240 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470387237] [2019-12-07 18:55:40,240 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:40,240 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:55:40,240 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1403713964] [2019-12-07 18:55:40,240 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:55:40,241 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:40,241 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:55:40,241 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:40,241 INFO L87 Difference]: Start difference. First operand 469 states and 847 transitions. Second operand 6 states. [2019-12-07 18:55:40,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:40,423 INFO L93 Difference]: Finished difference Result 623 states and 1115 transitions. [2019-12-07 18:55:40,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:55:40,423 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-12-07 18:55:40,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:40,424 INFO L225 Difference]: With dead ends: 623 [2019-12-07 18:55:40,424 INFO L226 Difference]: Without dead ends: 623 [2019-12-07 18:55:40,424 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:55:40,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 623 states. [2019-12-07 18:55:40,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 623 to 475. [2019-12-07 18:55:40,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 475 states. [2019-12-07 18:55:40,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 475 states to 475 states and 858 transitions. [2019-12-07 18:55:40,431 INFO L78 Accepts]: Start accepts. Automaton has 475 states and 858 transitions. Word has length 74 [2019-12-07 18:55:40,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:40,431 INFO L462 AbstractCegarLoop]: Abstraction has 475 states and 858 transitions. [2019-12-07 18:55:40,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:55:40,431 INFO L276 IsEmpty]: Start isEmpty. Operand 475 states and 858 transitions. [2019-12-07 18:55:40,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-12-07 18:55:40,432 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:40,432 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:40,432 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:40,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:40,432 INFO L82 PathProgramCache]: Analyzing trace with hash -1429844161, now seen corresponding path program 1 times [2019-12-07 18:55:40,432 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:40,433 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1854650147] [2019-12-07 18:55:40,433 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:40,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:40,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:40,504 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1854650147] [2019-12-07 18:55:40,504 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:40,504 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:55:40,504 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [836165210] [2019-12-07 18:55:40,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:55:40,505 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:40,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:55:40,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:40,505 INFO L87 Difference]: Start difference. First operand 475 states and 858 transitions. Second operand 6 states. [2019-12-07 18:55:40,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:40,571 INFO L93 Difference]: Finished difference Result 922 states and 1680 transitions. [2019-12-07 18:55:40,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:55:40,572 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 75 [2019-12-07 18:55:40,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:40,572 INFO L225 Difference]: With dead ends: 922 [2019-12-07 18:55:40,572 INFO L226 Difference]: Without dead ends: 472 [2019-12-07 18:55:40,572 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:55:40,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 472 states. [2019-12-07 18:55:40,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 472 to 472. [2019-12-07 18:55:40,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 472 states. [2019-12-07 18:55:40,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 472 states to 472 states and 853 transitions. [2019-12-07 18:55:40,576 INFO L78 Accepts]: Start accepts. Automaton has 472 states and 853 transitions. Word has length 75 [2019-12-07 18:55:40,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:40,576 INFO L462 AbstractCegarLoop]: Abstraction has 472 states and 853 transitions. [2019-12-07 18:55:40,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:55:40,576 INFO L276 IsEmpty]: Start isEmpty. Operand 472 states and 853 transitions. [2019-12-07 18:55:40,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-12-07 18:55:40,577 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:40,577 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:40,577 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:40,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:40,577 INFO L82 PathProgramCache]: Analyzing trace with hash -1721238743, now seen corresponding path program 1 times [2019-12-07 18:55:40,577 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:40,577 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486419179] [2019-12-07 18:55:40,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:40,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:40,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:40,612 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486419179] [2019-12-07 18:55:40,612 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:40,612 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:40,612 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [16366524] [2019-12-07 18:55:40,613 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:55:40,613 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:40,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:55:40,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:40,613 INFO L87 Difference]: Start difference. First operand 472 states and 853 transitions. Second operand 3 states. [2019-12-07 18:55:40,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:40,622 INFO L93 Difference]: Finished difference Result 434 states and 761 transitions. [2019-12-07 18:55:40,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:55:40,622 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 76 [2019-12-07 18:55:40,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:40,623 INFO L225 Difference]: With dead ends: 434 [2019-12-07 18:55:40,623 INFO L226 Difference]: Without dead ends: 434 [2019-12-07 18:55:40,623 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:40,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states. [2019-12-07 18:55:40,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 408. [2019-12-07 18:55:40,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 408 states. [2019-12-07 18:55:40,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 408 states to 408 states and 710 transitions. [2019-12-07 18:55:40,626 INFO L78 Accepts]: Start accepts. Automaton has 408 states and 710 transitions. Word has length 76 [2019-12-07 18:55:40,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:40,626 INFO L462 AbstractCegarLoop]: Abstraction has 408 states and 710 transitions. [2019-12-07 18:55:40,627 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:40,627 INFO L276 IsEmpty]: Start isEmpty. Operand 408 states and 710 transitions. [2019-12-07 18:55:40,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-12-07 18:55:40,627 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:40,627 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:40,627 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:40,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:40,627 INFO L82 PathProgramCache]: Analyzing trace with hash -1450567251, now seen corresponding path program 1 times [2019-12-07 18:55:40,628 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:40,628 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701429356] [2019-12-07 18:55:40,628 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:40,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:40,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:40,664 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [701429356] [2019-12-07 18:55:40,664 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:40,664 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:40,664 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1925038646] [2019-12-07 18:55:40,664 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:55:40,664 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:40,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:55:40,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:40,665 INFO L87 Difference]: Start difference. First operand 408 states and 710 transitions. Second operand 3 states. [2019-12-07 18:55:40,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:40,692 INFO L93 Difference]: Finished difference Result 407 states and 708 transitions. [2019-12-07 18:55:40,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:55:40,693 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 76 [2019-12-07 18:55:40,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:40,693 INFO L225 Difference]: With dead ends: 407 [2019-12-07 18:55:40,693 INFO L226 Difference]: Without dead ends: 407 [2019-12-07 18:55:40,693 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:40,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 407 states. [2019-12-07 18:55:40,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 407 to 271. [2019-12-07 18:55:40,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 271 states. [2019-12-07 18:55:40,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 460 transitions. [2019-12-07 18:55:40,696 INFO L78 Accepts]: Start accepts. Automaton has 271 states and 460 transitions. Word has length 76 [2019-12-07 18:55:40,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:40,696 INFO L462 AbstractCegarLoop]: Abstraction has 271 states and 460 transitions. [2019-12-07 18:55:40,696 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:40,696 INFO L276 IsEmpty]: Start isEmpty. Operand 271 states and 460 transitions. [2019-12-07 18:55:40,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-07 18:55:40,697 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:40,697 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:40,697 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:40,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:40,697 INFO L82 PathProgramCache]: Analyzing trace with hash 1125574762, now seen corresponding path program 1 times [2019-12-07 18:55:40,697 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:40,697 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1659319953] [2019-12-07 18:55:40,697 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:40,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:40,848 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:40,848 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1659319953] [2019-12-07 18:55:40,848 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:40,848 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:55:40,848 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [661984381] [2019-12-07 18:55:40,849 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:55:40,849 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:40,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:55:40,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:55:40,849 INFO L87 Difference]: Start difference. First operand 271 states and 460 transitions. Second operand 12 states. [2019-12-07 18:55:41,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:41,079 INFO L93 Difference]: Finished difference Result 436 states and 733 transitions. [2019-12-07 18:55:41,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:55:41,080 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 77 [2019-12-07 18:55:41,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:41,080 INFO L225 Difference]: With dead ends: 436 [2019-12-07 18:55:41,080 INFO L226 Difference]: Without dead ends: 405 [2019-12-07 18:55:41,080 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=329, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:55:41,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 405 states. [2019-12-07 18:55:41,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 405 to 379. [2019-12-07 18:55:41,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 379 states. [2019-12-07 18:55:41,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 379 states to 379 states and 645 transitions. [2019-12-07 18:55:41,083 INFO L78 Accepts]: Start accepts. Automaton has 379 states and 645 transitions. Word has length 77 [2019-12-07 18:55:41,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:41,084 INFO L462 AbstractCegarLoop]: Abstraction has 379 states and 645 transitions. [2019-12-07 18:55:41,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:55:41,084 INFO L276 IsEmpty]: Start isEmpty. Operand 379 states and 645 transitions. [2019-12-07 18:55:41,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-07 18:55:41,084 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:41,084 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:41,084 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:41,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:41,085 INFO L82 PathProgramCache]: Analyzing trace with hash -1455854044, now seen corresponding path program 2 times [2019-12-07 18:55:41,085 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:41,085 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1138381271] [2019-12-07 18:55:41,085 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:41,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:55:41,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:55:41,165 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:55:41,165 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:55:41,168 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1075] [1075] ULTIMATE.startENTRY-->L839: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= (select .cse0 |v_ULTIMATE.start_main_~#t825~0.base_24|) 0) (= 0 v_~z$flush_delayed~0_273) (= v_~z$r_buff0_thd1~0_51 0) (= 0 v_~z$r_buff1_thd3~0_297) (= |v_#NULL.offset_6| 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t825~0.base_24|) (= v_~z$r_buff1_thd1~0_205 0) (= 0 v_~z$r_buff1_thd4~0_383) (= v_~z$r_buff0_thd0~0_482 0) (= v_~main$tmp_guard0~0_25 0) (= v_~z$w_buff1~0_315 0) (= 0 v_~__unbuffered_p3_EBX~0_63) (= v_~z$read_delayed~0_6 0) (= v_~z$read_delayed_var~0.offset_7 0) (= 0 v_~z$r_buff0_thd4~0_518) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t825~0.base_24| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t825~0.base_24|) |v_ULTIMATE.start_main_~#t825~0.offset_19| 0)) |v_#memory_int_27|) (= 0 v_~__unbuffered_p3_EAX~0_73) (= v_~y~0_126 0) (= 0 |v_#NULL.base_6|) (= v_~z$w_buff0~0_383 0) (= 0 v_~x~0_106) (= 0 v_~z$mem_tmp~0_243) (= v_~z$r_buff0_thd2~0_50 0) (= v_~z~0_295 0) (= v_~z$read_delayed_var~0.base_7 0) (= 0 v_~z$r_buff0_thd3~0_133) (< 0 |v_#StackHeapBarrier_20|) (= v_~weak$$choice2~0_323 0) (= v_~main$tmp_guard1~0_64 0) (= v_~__unbuffered_cnt~0_220 0) (= v_~z$w_buff1_used~0_723 0) (= 0 v_~weak$$choice0~0_232) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t825~0.base_24| 4)) (= v_~z$w_buff0_used~0_1076 0) (= v_~a~0_53 0) (= v_~z$r_buff1_thd2~0_205 0) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t825~0.base_24| 1)) (= v_~z$r_buff1_thd0~0_494 0) (= |v_ULTIMATE.start_main_~#t825~0.offset_19| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_28|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_~#t825~0.offset=|v_ULTIMATE.start_main_~#t825~0.offset_19|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_205, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_76|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_94|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_52|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_44|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_41|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_42|, ~a~0=v_~a~0_53, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_95|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_482, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_518, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_73, ULTIMATE.start_main_~#t828~0.base=|v_ULTIMATE.start_main_~#t828~0.base_16|, #length=|v_#length_29|, ULTIMATE.start_main_#t~nondet48=|v_ULTIMATE.start_main_#t~nondet48_60|, ~z$mem_tmp~0=v_~z$mem_tmp~0_243, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_24|, ULTIMATE.start_main_~#t827~0.offset=|v_ULTIMATE.start_main_~#t827~0.offset_18|, ULTIMATE.start_main_~#t825~0.base=|v_ULTIMATE.start_main_~#t825~0.base_24|, ULTIMATE.start_main_#t~ite58=|v_ULTIMATE.start_main_#t~ite58_34|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_723, ~z$flush_delayed~0=v_~z$flush_delayed~0_273, ULTIMATE.start_main_#t~ite54=|v_ULTIMATE.start_main_#t~ite54_139|, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_60|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_226|, ~weak$$choice0~0=v_~weak$$choice0~0_232, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_154|, ULTIMATE.start_main_~#t828~0.offset=|v_ULTIMATE.start_main_~#t828~0.offset_14|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_205, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_133, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_220, ~x~0=v_~x~0_106, ULTIMATE.start_main_~#t826~0.base=|v_ULTIMATE.start_main_~#t826~0.base_23|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_383, ~z$read_delayed~0=v_~z$read_delayed~0_6, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_34|, ~z$w_buff1~0=v_~z$w_buff1~0_315, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_64, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_83|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_38|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_79|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_224|, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_50|, ULTIMATE.start_main_~#t826~0.offset=|v_ULTIMATE.start_main_~#t826~0.offset_18|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_494, ULTIMATE.start_main_#t~nondet49=|v_ULTIMATE.start_main_#t~nondet49_60|, ~y~0=v_~y~0_126, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_50, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_1076, ~z$w_buff0~0=v_~z$w_buff0~0_383, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_297, ULTIMATE.start_main_#t~ite57=|v_ULTIMATE.start_main_#t~ite57_70|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_41|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_63, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_133|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_53|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_147|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_55|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_295, ~weak$$choice2~0=v_~weak$$choice2~0_323, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_51, ULTIMATE.start_main_~#t827~0.base=|v_ULTIMATE.start_main_~#t827~0.base_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t825~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite64, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, ULTIMATE.start_main_~#t828~0.base, #length, ULTIMATE.start_main_#t~nondet48, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t827~0.offset, ULTIMATE.start_main_~#t825~0.base, ULTIMATE.start_main_#t~ite58, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite54, ULTIMATE.start_main_#t~ite56, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite61, ULTIMATE.start_main_~#t828~0.offset, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet38, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t826~0.base, ~z$r_buff1_thd4~0, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite69, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite67, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite65, ULTIMATE.start_main_~#t826~0.offset, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_#t~ite70, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet49, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet40, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite57, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite55, ULTIMATE.start_main_#t~ite62, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ULTIMATE.start_main_~#t827~0.base] because there is no mapped edge [2019-12-07 18:55:41,168 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1035] [1035] L839-1-->L841: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t826~0.base_10|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t826~0.base_10| 4) |v_#length_17|) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t826~0.base_10| 1)) (not (= |v_ULTIMATE.start_main_~#t826~0.base_10| 0)) (= (select |v_#valid_42| |v_ULTIMATE.start_main_~#t826~0.base_10|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t826~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t826~0.base_10|) |v_ULTIMATE.start_main_~#t826~0.offset_9| 1)) |v_#memory_int_15|) (= 0 |v_ULTIMATE.start_main_~#t826~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t826~0.offset=|v_ULTIMATE.start_main_~#t826~0.offset_9|, ULTIMATE.start_main_~#t826~0.base=|v_ULTIMATE.start_main_~#t826~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t826~0.offset, ULTIMATE.start_main_~#t826~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 18:55:41,169 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1041] [1041] L841-1-->L843: Formula: (and (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t827~0.base_12| 1) |v_#valid_46|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t827~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t827~0.base_12|) |v_ULTIMATE.start_main_~#t827~0.offset_10| 2)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t827~0.base_12|) (= |v_ULTIMATE.start_main_~#t827~0.offset_10| 0) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t827~0.base_12|)) (not (= 0 |v_ULTIMATE.start_main_~#t827~0.base_12|)) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t827~0.base_12| 4) |v_#length_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t827~0.offset=|v_ULTIMATE.start_main_~#t827~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t827~0.base=|v_ULTIMATE.start_main_~#t827~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t827~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t827~0.base] because there is no mapped edge [2019-12-07 18:55:41,169 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1055] [1055] L843-1-->L845: Formula: (and (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t828~0.base_13| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t828~0.base_13|) |v_ULTIMATE.start_main_~#t828~0.offset_11| 3)) |v_#memory_int_21|) (= |v_#valid_52| (store |v_#valid_53| |v_ULTIMATE.start_main_~#t828~0.base_13| 1)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t828~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t828~0.base_13| 0)) (= 0 (select |v_#valid_53| |v_ULTIMATE.start_main_~#t828~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t828~0.offset_11|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t828~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ULTIMATE.start_main_~#t828~0.offset=|v_ULTIMATE.start_main_~#t828~0.offset_11|, #valid=|v_#valid_52|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t828~0.base=|v_ULTIMATE.start_main_~#t828~0.base_13|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t828~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t828~0.base, #length] because there is no mapped edge [2019-12-07 18:55:41,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [959] [959] P3ENTRY-->L4-3: Formula: (and (= v_P3Thread1of1ForFork3_~arg.offset_4 |v_P3Thread1of1ForFork3_#in~arg.offset_6|) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6)) (= |v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4| v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6) (= v_~z$w_buff0~0_62 v_~z$w_buff1~0_45) (= v_~z$w_buff0_used~0_302 v_~z$w_buff1_used~0_154) (= 2 v_~z$w_buff0~0_61) (= |v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= (mod v_~z$w_buff0_used~0_301 256) 0)) (not (= (mod v_~z$w_buff1_used~0_154 256) 0)))) 1 0)) (= v_P3Thread1of1ForFork3_~arg.base_4 |v_P3Thread1of1ForFork3_#in~arg.base_6|) (= v_~z$w_buff0_used~0_301 1)) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_302, ~z$w_buff0~0=v_~z$w_buff0~0_62, P3Thread1of1ForFork3_#in~arg.offset=|v_P3Thread1of1ForFork3_#in~arg.offset_6|, P3Thread1of1ForFork3_#in~arg.base=|v_P3Thread1of1ForFork3_#in~arg.base_6|} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_301, ~z$w_buff0~0=v_~z$w_buff0~0_61, P3Thread1of1ForFork3_~arg.offset=v_P3Thread1of1ForFork3_~arg.offset_4, P3Thread1of1ForFork3_#in~arg.offset=|v_P3Thread1of1ForFork3_#in~arg.offset_6|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_154, ~z$w_buff1~0=v_~z$w_buff1~0_45, P3Thread1of1ForFork3___VERIFIER_assert_#in~expression=|v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4|, P3Thread1of1ForFork3_~arg.base=v_P3Thread1of1ForFork3_~arg.base_4, P3Thread1of1ForFork3_#in~arg.base=|v_P3Thread1of1ForFork3_#in~arg.base_6|} AuxVars[] AssignedVars[P3Thread1of1ForFork3___VERIFIER_assert_~expression, ~z$w_buff0_used~0, ~z$w_buff0~0, P3Thread1of1ForFork3_~arg.offset, ~z$w_buff1_used~0, ~z$w_buff1~0, P3Thread1of1ForFork3___VERIFIER_assert_#in~expression, P3Thread1of1ForFork3_~arg.base] because there is no mapped edge [2019-12-07 18:55:41,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1013] [1013] L801-2-->L801-5: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In742780532 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In742780532 256))) (.cse0 (= |P3Thread1of1ForFork3_#t~ite12_Out742780532| |P3Thread1of1ForFork3_#t~ite11_Out742780532|))) (or (and (= ~z$w_buff1~0_In742780532 |P3Thread1of1ForFork3_#t~ite11_Out742780532|) .cse0 (or .cse1 .cse2)) (and (not .cse2) (= |P3Thread1of1ForFork3_#t~ite11_Out742780532| ~z$w_buff0~0_In742780532) (not .cse1) .cse0))) InVars {~z$w_buff0~0=~z$w_buff0~0_In742780532, ~z$w_buff0_used~0=~z$w_buff0_used~0_In742780532, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In742780532, ~z$w_buff1~0=~z$w_buff1~0_In742780532} OutVars{~z$w_buff0~0=~z$w_buff0~0_In742780532, ~z$w_buff0_used~0=~z$w_buff0_used~0_In742780532, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out742780532|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In742780532, ~z$w_buff1~0=~z$w_buff1~0_In742780532, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out742780532|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12, P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 18:55:41,173 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [943] [943] L806-->L807: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_42 256))) (= v_~z$r_buff0_thd4~0_99 v_~z$r_buff0_thd4~0_100)) InVars {~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_42} OutVars{P3Thread1of1ForFork3_#t~ite27=|v_P3Thread1of1ForFork3_#t~ite27_7|, P3Thread1of1ForFork3_#t~ite26=|v_P3Thread1of1ForFork3_#t~ite26_5|, P3Thread1of1ForFork3_#t~ite25=|v_P3Thread1of1ForFork3_#t~ite25_9|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_42} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite27, P3Thread1of1ForFork3_#t~ite26, P3Thread1of1ForFork3_#t~ite25, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:55:41,174 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [993] [993] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~z$flush_delayed~0_In415775609 256)))) (or (and (not .cse0) (= ~z$mem_tmp~0_In415775609 |P3Thread1of1ForFork3_#t~ite31_Out415775609|)) (and .cse0 (= |P3Thread1of1ForFork3_#t~ite31_Out415775609| ~z~0_In415775609)))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In415775609, ~z$flush_delayed~0=~z$flush_delayed~0_In415775609, ~z~0=~z~0_In415775609} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In415775609, ~z$flush_delayed~0=~z$flush_delayed~0_In415775609, ~z~0=~z~0_In415775609, P3Thread1of1ForFork3_#t~ite31=|P3Thread1of1ForFork3_#t~ite31_Out415775609|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 18:55:41,175 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1043] [1043] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork0_~arg.base_16 |v_P0Thread1of1ForFork0_#in~arg.base_18|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_P0Thread1of1ForFork0_~arg.offset_16 |v_P0Thread1of1ForFork0_#in~arg.offset_18|) (= v_~a~0_21 1) (= v_~x~0_33 1) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_18|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} OutVars{~a~0=v_~a~0_21, P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_18|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_18|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_16, ~x~0=v_~x~0_33, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_16} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:55:41,175 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1054] [1054] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_12 |v_P1Thread1of1ForFork1_#in~arg.base_14|) (= v_~x~0_54 2) (= v_~y~0_83 1) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_140 (+ v_~__unbuffered_cnt~0_141 1)) (= |v_P1Thread1of1ForFork1_#in~arg.offset_14| v_P1Thread1of1ForFork1_~arg.offset_12) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_141} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_12, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_12, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_140, ~y~0=v_~y~0_83, ~x~0=v_~x~0_54, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:55:41,176 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1000] [1000] L770-2-->L770-5: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1107694233 256))) (.cse0 (= |P2Thread1of1ForFork2_#t~ite3_Out1107694233| |P2Thread1of1ForFork2_#t~ite4_Out1107694233|)) (.cse2 (= (mod ~z$w_buff1_used~0_In1107694233 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= ~z~0_In1107694233 |P2Thread1of1ForFork2_#t~ite3_Out1107694233|)) (and (not .cse1) (= ~z$w_buff1~0_In1107694233 |P2Thread1of1ForFork2_#t~ite3_Out1107694233|) .cse0 (not .cse2)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1107694233, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1107694233, ~z$w_buff1~0=~z$w_buff1~0_In1107694233, ~z~0=~z~0_In1107694233} OutVars{P2Thread1of1ForFork2_#t~ite4=|P2Thread1of1ForFork2_#t~ite4_Out1107694233|, P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out1107694233|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1107694233, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1107694233, ~z$w_buff1~0=~z$w_buff1~0_In1107694233, ~z~0=~z~0_In1107694233} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 18:55:41,176 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [989] [989] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1681847985 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1681847985 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite5_Out-1681847985| ~z$w_buff0_used~0_In-1681847985)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite5_Out-1681847985| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1681847985, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1681847985} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1681847985|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1681847985, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1681847985} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:55:41,177 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1002] [1002] L772-->L772-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In461515320 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In461515320 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In461515320 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In461515320 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite6_Out461515320| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In461515320 |P2Thread1of1ForFork2_#t~ite6_Out461515320|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In461515320, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In461515320, ~z$w_buff1_used~0=~z$w_buff1_used~0_In461515320, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In461515320} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out461515320|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In461515320, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In461515320, ~z$w_buff1_used~0=~z$w_buff1_used~0_In461515320, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In461515320} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:55:41,177 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1008] [1008] L773-->L773-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1156721521 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1156721521 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite7_Out-1156721521|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd3~0_In-1156721521 |P2Thread1of1ForFork2_#t~ite7_Out-1156721521|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156721521, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1156721521} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156721521, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1156721521, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-1156721521|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:55:41,178 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1001] [1001] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1290283106 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1290283106 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In1290283106 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1290283106 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite8_Out1290283106| ~z$r_buff1_thd3~0_In1290283106) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite8_Out1290283106| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1290283106, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1290283106, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1290283106, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1290283106} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1290283106, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1290283106, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1290283106, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1290283106, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1290283106|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:55:41,178 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1050] [1050] L774-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_111 1) v_~__unbuffered_cnt~0_110) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_52| v_~z$r_buff1_thd3~0_177)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_52|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_177, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_110, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_51|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:55:41,178 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1005] [1005] L817-->L817-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In659885974 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In659885974 256) 0))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite34_Out659885974| ~z$w_buff0_used~0_In659885974)) (and (= |P3Thread1of1ForFork3_#t~ite34_Out659885974| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In659885974, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In659885974} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In659885974, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In659885974, P3Thread1of1ForFork3_#t~ite34=|P3Thread1of1ForFork3_#t~ite34_Out659885974|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite34] because there is no mapped edge [2019-12-07 18:55:41,178 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [999] [999] L818-->L818-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd4~0_In-1276625637 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1276625637 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1276625637 256))) (.cse0 (= (mod ~z$r_buff1_thd4~0_In-1276625637 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork3_#t~ite35_Out-1276625637| ~z$w_buff1_used~0_In-1276625637)) (and (= |P3Thread1of1ForFork3_#t~ite35_Out-1276625637| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1276625637, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1276625637, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1276625637, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1276625637} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1276625637, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1276625637, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1276625637, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1276625637, P3Thread1of1ForFork3_#t~ite35=|P3Thread1of1ForFork3_#t~ite35_Out-1276625637|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite35] because there is no mapped edge [2019-12-07 18:55:41,179 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1004] [1004] L819-->L820: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In446489448 256) 0)) (.cse0 (= ~z$r_buff0_thd4~0_Out446489448 ~z$r_buff0_thd4~0_In446489448)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In446489448 256) 0))) (or (and .cse0 .cse1) (and (not .cse2) (= ~z$r_buff0_thd4~0_Out446489448 0) (not .cse1)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In446489448, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In446489448} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In446489448, P3Thread1of1ForFork3_#t~ite36=|P3Thread1of1ForFork3_#t~ite36_Out446489448|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out446489448} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite36, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:55:41,179 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [997] [997] L820-->L820-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-610158195 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In-610158195 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd4~0_In-610158195 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-610158195 256)))) (or (and (= 0 |P3Thread1of1ForFork3_#t~ite37_Out-610158195|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite37_Out-610158195| ~z$r_buff1_thd4~0_In-610158195) (or .cse2 .cse3)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-610158195, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-610158195, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-610158195, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-610158195} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-610158195, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-610158195, P3Thread1of1ForFork3_#t~ite37=|P3Thread1of1ForFork3_#t~ite37_Out-610158195|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-610158195, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-610158195} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite37] because there is no mapped edge [2019-12-07 18:55:41,179 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1052] [1052] L820-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_134 (+ v_~__unbuffered_cnt~0_135 1)) (= |v_P3Thread1of1ForFork3_#t~ite37_50| v_~z$r_buff1_thd4~0_255) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite37=|v_P3Thread1of1ForFork3_#t~ite37_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_135} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_255, P3Thread1of1ForFork3_#t~ite37=|v_P3Thread1of1ForFork3_#t~ite37_49|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_134, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite37, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:55:41,179 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [916] [916] L845-1-->L851: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:55:41,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [991] [991] L851-2-->L851-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1119882443 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1119882443 256) 0))) (or (and (= ~z$w_buff1~0_In-1119882443 |ULTIMATE.start_main_#t~ite42_Out-1119882443|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z~0_In-1119882443 |ULTIMATE.start_main_#t~ite42_Out-1119882443|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1119882443, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1119882443, ~z$w_buff1~0=~z$w_buff1~0_In-1119882443, ~z~0=~z~0_In-1119882443} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1119882443, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1119882443, ~z$w_buff1~0=~z$w_buff1~0_In-1119882443, ~z~0=~z~0_In-1119882443, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1119882443|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:55:41,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [971] [971] L851-4-->L852: Formula: (= v_~z~0_85 |v_ULTIMATE.start_main_#t~ite42_10|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_10|} OutVars{~z~0=v_~z~0_85, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_13|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[~z~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:55:41,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1003] [1003] L852-->L852-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-168896436 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-168896436 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out-168896436| ~z$w_buff0_used~0_In-168896436) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite44_Out-168896436| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-168896436, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-168896436} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-168896436, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-168896436, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-168896436|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:55:41,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1006] [1006] L853-->L853-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In-750563314 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-750563314 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-750563314 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-750563314 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-750563314 |ULTIMATE.start_main_#t~ite45_Out-750563314|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite45_Out-750563314| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-750563314, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-750563314, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-750563314, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-750563314} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-750563314, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-750563314, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-750563314, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-750563314, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-750563314|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:55:41,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [994] [994] L854-->L854-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1914160819 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1914160819 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite46_Out-1914160819| ~z$r_buff0_thd0~0_In-1914160819) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite46_Out-1914160819| 0) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1914160819, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1914160819} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1914160819, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1914160819, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1914160819|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:55:41,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1014] [1014] L855-->L855-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1156838030 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-1156838030 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-1156838030 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1156838030 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite47_Out-1156838030| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite47_Out-1156838030| ~z$r_buff1_thd0~0_In-1156838030)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156838030, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156838030, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1156838030, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1156838030} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156838030, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156838030, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1156838030, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1156838030|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1156838030} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:55:41,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1009] [1009] L870-->L870-2: Formula: (let ((.cse0 (= (mod ~z$flush_delayed~0_In-1906227889 256) 0))) (or (and .cse0 (= ~z~0_In-1906227889 |ULTIMATE.start_main_#t~ite70_Out-1906227889|)) (and (= |ULTIMATE.start_main_#t~ite70_Out-1906227889| ~z$mem_tmp~0_In-1906227889) (not .cse0)))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In-1906227889, ~z$flush_delayed~0=~z$flush_delayed~0_In-1906227889, ~z~0=~z~0_In-1906227889} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In-1906227889, ULTIMATE.start_main_#t~ite70=|ULTIMATE.start_main_#t~ite70_Out-1906227889|, ~z$flush_delayed~0=~z$flush_delayed~0_In-1906227889, ~z~0=~z~0_In-1906227889} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite70] because there is no mapped edge [2019-12-07 18:55:41,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1070] [1070] L870-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= 0 v_~z$flush_delayed~0_270) (= v_~z~0_292 |v_ULTIMATE.start_main_#t~ite70_48|) (= (mod v_~main$tmp_guard1~0_61 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_48|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_61} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_61, ~z$flush_delayed~0=v_~z$flush_delayed~0_270, ~z~0=v_~z~0_292, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite70, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:55:41,245 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:55:41 BasicIcfg [2019-12-07 18:55:41,245 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:55:41,246 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:55:41,246 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:55:41,246 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:55:41,246 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:54:44" (3/4) ... [2019-12-07 18:55:41,247 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:55:41,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1075] [1075] ULTIMATE.startENTRY-->L839: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= (select .cse0 |v_ULTIMATE.start_main_~#t825~0.base_24|) 0) (= 0 v_~z$flush_delayed~0_273) (= v_~z$r_buff0_thd1~0_51 0) (= 0 v_~z$r_buff1_thd3~0_297) (= |v_#NULL.offset_6| 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t825~0.base_24|) (= v_~z$r_buff1_thd1~0_205 0) (= 0 v_~z$r_buff1_thd4~0_383) (= v_~z$r_buff0_thd0~0_482 0) (= v_~main$tmp_guard0~0_25 0) (= v_~z$w_buff1~0_315 0) (= 0 v_~__unbuffered_p3_EBX~0_63) (= v_~z$read_delayed~0_6 0) (= v_~z$read_delayed_var~0.offset_7 0) (= 0 v_~z$r_buff0_thd4~0_518) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t825~0.base_24| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t825~0.base_24|) |v_ULTIMATE.start_main_~#t825~0.offset_19| 0)) |v_#memory_int_27|) (= 0 v_~__unbuffered_p3_EAX~0_73) (= v_~y~0_126 0) (= 0 |v_#NULL.base_6|) (= v_~z$w_buff0~0_383 0) (= 0 v_~x~0_106) (= 0 v_~z$mem_tmp~0_243) (= v_~z$r_buff0_thd2~0_50 0) (= v_~z~0_295 0) (= v_~z$read_delayed_var~0.base_7 0) (= 0 v_~z$r_buff0_thd3~0_133) (< 0 |v_#StackHeapBarrier_20|) (= v_~weak$$choice2~0_323 0) (= v_~main$tmp_guard1~0_64 0) (= v_~__unbuffered_cnt~0_220 0) (= v_~z$w_buff1_used~0_723 0) (= 0 v_~weak$$choice0~0_232) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t825~0.base_24| 4)) (= v_~z$w_buff0_used~0_1076 0) (= v_~a~0_53 0) (= v_~z$r_buff1_thd2~0_205 0) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t825~0.base_24| 1)) (= v_~z$r_buff1_thd0~0_494 0) (= |v_ULTIMATE.start_main_~#t825~0.offset_19| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_28|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_~#t825~0.offset=|v_ULTIMATE.start_main_~#t825~0.offset_19|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_205, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_76|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_94|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_52|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_44|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_41|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_42|, ~a~0=v_~a~0_53, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_95|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_482, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_518, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_73, ULTIMATE.start_main_~#t828~0.base=|v_ULTIMATE.start_main_~#t828~0.base_16|, #length=|v_#length_29|, ULTIMATE.start_main_#t~nondet48=|v_ULTIMATE.start_main_#t~nondet48_60|, ~z$mem_tmp~0=v_~z$mem_tmp~0_243, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_24|, ULTIMATE.start_main_~#t827~0.offset=|v_ULTIMATE.start_main_~#t827~0.offset_18|, ULTIMATE.start_main_~#t825~0.base=|v_ULTIMATE.start_main_~#t825~0.base_24|, ULTIMATE.start_main_#t~ite58=|v_ULTIMATE.start_main_#t~ite58_34|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_723, ~z$flush_delayed~0=v_~z$flush_delayed~0_273, ULTIMATE.start_main_#t~ite54=|v_ULTIMATE.start_main_#t~ite54_139|, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_60|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_226|, ~weak$$choice0~0=v_~weak$$choice0~0_232, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_154|, ULTIMATE.start_main_~#t828~0.offset=|v_ULTIMATE.start_main_~#t828~0.offset_14|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_205, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_133, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_220, ~x~0=v_~x~0_106, ULTIMATE.start_main_~#t826~0.base=|v_ULTIMATE.start_main_~#t826~0.base_23|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_383, ~z$read_delayed~0=v_~z$read_delayed~0_6, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_34|, ~z$w_buff1~0=v_~z$w_buff1~0_315, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_64, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_83|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_38|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_79|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_224|, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_50|, ULTIMATE.start_main_~#t826~0.offset=|v_ULTIMATE.start_main_~#t826~0.offset_18|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_494, ULTIMATE.start_main_#t~nondet49=|v_ULTIMATE.start_main_#t~nondet49_60|, ~y~0=v_~y~0_126, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_50, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_1076, ~z$w_buff0~0=v_~z$w_buff0~0_383, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_297, ULTIMATE.start_main_#t~ite57=|v_ULTIMATE.start_main_#t~ite57_70|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_41|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_63, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_133|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_53|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_147|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_55|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_295, ~weak$$choice2~0=v_~weak$$choice2~0_323, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_51, ULTIMATE.start_main_~#t827~0.base=|v_ULTIMATE.start_main_~#t827~0.base_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t825~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite64, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, ULTIMATE.start_main_~#t828~0.base, #length, ULTIMATE.start_main_#t~nondet48, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t827~0.offset, ULTIMATE.start_main_~#t825~0.base, ULTIMATE.start_main_#t~ite58, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite54, ULTIMATE.start_main_#t~ite56, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite61, ULTIMATE.start_main_~#t828~0.offset, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet38, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t826~0.base, ~z$r_buff1_thd4~0, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite69, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite67, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite65, ULTIMATE.start_main_~#t826~0.offset, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_#t~ite70, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet49, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet40, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite57, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite55, ULTIMATE.start_main_#t~ite62, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ULTIMATE.start_main_~#t827~0.base] because there is no mapped edge [2019-12-07 18:55:41,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1035] [1035] L839-1-->L841: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t826~0.base_10|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t826~0.base_10| 4) |v_#length_17|) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t826~0.base_10| 1)) (not (= |v_ULTIMATE.start_main_~#t826~0.base_10| 0)) (= (select |v_#valid_42| |v_ULTIMATE.start_main_~#t826~0.base_10|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t826~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t826~0.base_10|) |v_ULTIMATE.start_main_~#t826~0.offset_9| 1)) |v_#memory_int_15|) (= 0 |v_ULTIMATE.start_main_~#t826~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t826~0.offset=|v_ULTIMATE.start_main_~#t826~0.offset_9|, ULTIMATE.start_main_~#t826~0.base=|v_ULTIMATE.start_main_~#t826~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t826~0.offset, ULTIMATE.start_main_~#t826~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 18:55:41,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1041] [1041] L841-1-->L843: Formula: (and (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t827~0.base_12| 1) |v_#valid_46|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t827~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t827~0.base_12|) |v_ULTIMATE.start_main_~#t827~0.offset_10| 2)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t827~0.base_12|) (= |v_ULTIMATE.start_main_~#t827~0.offset_10| 0) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t827~0.base_12|)) (not (= 0 |v_ULTIMATE.start_main_~#t827~0.base_12|)) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t827~0.base_12| 4) |v_#length_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t827~0.offset=|v_ULTIMATE.start_main_~#t827~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t827~0.base=|v_ULTIMATE.start_main_~#t827~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t827~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t827~0.base] because there is no mapped edge [2019-12-07 18:55:41,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1055] [1055] L843-1-->L845: Formula: (and (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t828~0.base_13| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t828~0.base_13|) |v_ULTIMATE.start_main_~#t828~0.offset_11| 3)) |v_#memory_int_21|) (= |v_#valid_52| (store |v_#valid_53| |v_ULTIMATE.start_main_~#t828~0.base_13| 1)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t828~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t828~0.base_13| 0)) (= 0 (select |v_#valid_53| |v_ULTIMATE.start_main_~#t828~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t828~0.offset_11|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t828~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ULTIMATE.start_main_~#t828~0.offset=|v_ULTIMATE.start_main_~#t828~0.offset_11|, #valid=|v_#valid_52|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t828~0.base=|v_ULTIMATE.start_main_~#t828~0.base_13|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t828~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t828~0.base, #length] because there is no mapped edge [2019-12-07 18:55:41,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [959] [959] P3ENTRY-->L4-3: Formula: (and (= v_P3Thread1of1ForFork3_~arg.offset_4 |v_P3Thread1of1ForFork3_#in~arg.offset_6|) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6)) (= |v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4| v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6) (= v_~z$w_buff0~0_62 v_~z$w_buff1~0_45) (= v_~z$w_buff0_used~0_302 v_~z$w_buff1_used~0_154) (= 2 v_~z$w_buff0~0_61) (= |v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= (mod v_~z$w_buff0_used~0_301 256) 0)) (not (= (mod v_~z$w_buff1_used~0_154 256) 0)))) 1 0)) (= v_P3Thread1of1ForFork3_~arg.base_4 |v_P3Thread1of1ForFork3_#in~arg.base_6|) (= v_~z$w_buff0_used~0_301 1)) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_302, ~z$w_buff0~0=v_~z$w_buff0~0_62, P3Thread1of1ForFork3_#in~arg.offset=|v_P3Thread1of1ForFork3_#in~arg.offset_6|, P3Thread1of1ForFork3_#in~arg.base=|v_P3Thread1of1ForFork3_#in~arg.base_6|} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_301, ~z$w_buff0~0=v_~z$w_buff0~0_61, P3Thread1of1ForFork3_~arg.offset=v_P3Thread1of1ForFork3_~arg.offset_4, P3Thread1of1ForFork3_#in~arg.offset=|v_P3Thread1of1ForFork3_#in~arg.offset_6|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_154, ~z$w_buff1~0=v_~z$w_buff1~0_45, P3Thread1of1ForFork3___VERIFIER_assert_#in~expression=|v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4|, P3Thread1of1ForFork3_~arg.base=v_P3Thread1of1ForFork3_~arg.base_4, P3Thread1of1ForFork3_#in~arg.base=|v_P3Thread1of1ForFork3_#in~arg.base_6|} AuxVars[] AssignedVars[P3Thread1of1ForFork3___VERIFIER_assert_~expression, ~z$w_buff0_used~0, ~z$w_buff0~0, P3Thread1of1ForFork3_~arg.offset, ~z$w_buff1_used~0, ~z$w_buff1~0, P3Thread1of1ForFork3___VERIFIER_assert_#in~expression, P3Thread1of1ForFork3_~arg.base] because there is no mapped edge [2019-12-07 18:55:41,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1013] [1013] L801-2-->L801-5: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In742780532 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In742780532 256))) (.cse0 (= |P3Thread1of1ForFork3_#t~ite12_Out742780532| |P3Thread1of1ForFork3_#t~ite11_Out742780532|))) (or (and (= ~z$w_buff1~0_In742780532 |P3Thread1of1ForFork3_#t~ite11_Out742780532|) .cse0 (or .cse1 .cse2)) (and (not .cse2) (= |P3Thread1of1ForFork3_#t~ite11_Out742780532| ~z$w_buff0~0_In742780532) (not .cse1) .cse0))) InVars {~z$w_buff0~0=~z$w_buff0~0_In742780532, ~z$w_buff0_used~0=~z$w_buff0_used~0_In742780532, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In742780532, ~z$w_buff1~0=~z$w_buff1~0_In742780532} OutVars{~z$w_buff0~0=~z$w_buff0~0_In742780532, ~z$w_buff0_used~0=~z$w_buff0_used~0_In742780532, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out742780532|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In742780532, ~z$w_buff1~0=~z$w_buff1~0_In742780532, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out742780532|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12, P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 18:55:41,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [943] [943] L806-->L807: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_42 256))) (= v_~z$r_buff0_thd4~0_99 v_~z$r_buff0_thd4~0_100)) InVars {~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_42} OutVars{P3Thread1of1ForFork3_#t~ite27=|v_P3Thread1of1ForFork3_#t~ite27_7|, P3Thread1of1ForFork3_#t~ite26=|v_P3Thread1of1ForFork3_#t~ite26_5|, P3Thread1of1ForFork3_#t~ite25=|v_P3Thread1of1ForFork3_#t~ite25_9|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_42} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite27, P3Thread1of1ForFork3_#t~ite26, P3Thread1of1ForFork3_#t~ite25, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:55:41,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [993] [993] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~z$flush_delayed~0_In415775609 256)))) (or (and (not .cse0) (= ~z$mem_tmp~0_In415775609 |P3Thread1of1ForFork3_#t~ite31_Out415775609|)) (and .cse0 (= |P3Thread1of1ForFork3_#t~ite31_Out415775609| ~z~0_In415775609)))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In415775609, ~z$flush_delayed~0=~z$flush_delayed~0_In415775609, ~z~0=~z~0_In415775609} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In415775609, ~z$flush_delayed~0=~z$flush_delayed~0_In415775609, ~z~0=~z~0_In415775609, P3Thread1of1ForFork3_#t~ite31=|P3Thread1of1ForFork3_#t~ite31_Out415775609|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 18:55:41,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1043] [1043] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork0_~arg.base_16 |v_P0Thread1of1ForFork0_#in~arg.base_18|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_P0Thread1of1ForFork0_~arg.offset_16 |v_P0Thread1of1ForFork0_#in~arg.offset_18|) (= v_~a~0_21 1) (= v_~x~0_33 1) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_18|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} OutVars{~a~0=v_~a~0_21, P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_18|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_18|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_16, ~x~0=v_~x~0_33, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_16} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:55:41,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1054] [1054] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_12 |v_P1Thread1of1ForFork1_#in~arg.base_14|) (= v_~x~0_54 2) (= v_~y~0_83 1) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_140 (+ v_~__unbuffered_cnt~0_141 1)) (= |v_P1Thread1of1ForFork1_#in~arg.offset_14| v_P1Thread1of1ForFork1_~arg.offset_12) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_141} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_12, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_12, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_140, ~y~0=v_~y~0_83, ~x~0=v_~x~0_54, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:55:41,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1000] [1000] L770-2-->L770-5: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1107694233 256))) (.cse0 (= |P2Thread1of1ForFork2_#t~ite3_Out1107694233| |P2Thread1of1ForFork2_#t~ite4_Out1107694233|)) (.cse2 (= (mod ~z$w_buff1_used~0_In1107694233 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= ~z~0_In1107694233 |P2Thread1of1ForFork2_#t~ite3_Out1107694233|)) (and (not .cse1) (= ~z$w_buff1~0_In1107694233 |P2Thread1of1ForFork2_#t~ite3_Out1107694233|) .cse0 (not .cse2)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1107694233, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1107694233, ~z$w_buff1~0=~z$w_buff1~0_In1107694233, ~z~0=~z~0_In1107694233} OutVars{P2Thread1of1ForFork2_#t~ite4=|P2Thread1of1ForFork2_#t~ite4_Out1107694233|, P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out1107694233|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1107694233, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1107694233, ~z$w_buff1~0=~z$w_buff1~0_In1107694233, ~z~0=~z~0_In1107694233} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 18:55:41,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [989] [989] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1681847985 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1681847985 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite5_Out-1681847985| ~z$w_buff0_used~0_In-1681847985)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite5_Out-1681847985| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1681847985, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1681847985} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1681847985|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1681847985, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1681847985} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:55:41,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1002] [1002] L772-->L772-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In461515320 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In461515320 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In461515320 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In461515320 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite6_Out461515320| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In461515320 |P2Thread1of1ForFork2_#t~ite6_Out461515320|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In461515320, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In461515320, ~z$w_buff1_used~0=~z$w_buff1_used~0_In461515320, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In461515320} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out461515320|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In461515320, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In461515320, ~z$w_buff1_used~0=~z$w_buff1_used~0_In461515320, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In461515320} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:55:41,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1008] [1008] L773-->L773-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1156721521 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1156721521 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite7_Out-1156721521|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd3~0_In-1156721521 |P2Thread1of1ForFork2_#t~ite7_Out-1156721521|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156721521, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1156721521} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156721521, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1156721521, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-1156721521|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:55:41,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1001] [1001] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1290283106 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1290283106 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In1290283106 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1290283106 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite8_Out1290283106| ~z$r_buff1_thd3~0_In1290283106) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite8_Out1290283106| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1290283106, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1290283106, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1290283106, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1290283106} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1290283106, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1290283106, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1290283106, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1290283106, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1290283106|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:55:41,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1050] [1050] L774-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_111 1) v_~__unbuffered_cnt~0_110) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_52| v_~z$r_buff1_thd3~0_177)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_52|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_177, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_110, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_51|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:55:41,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1005] [1005] L817-->L817-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In659885974 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In659885974 256) 0))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite34_Out659885974| ~z$w_buff0_used~0_In659885974)) (and (= |P3Thread1of1ForFork3_#t~ite34_Out659885974| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In659885974, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In659885974} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In659885974, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In659885974, P3Thread1of1ForFork3_#t~ite34=|P3Thread1of1ForFork3_#t~ite34_Out659885974|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite34] because there is no mapped edge [2019-12-07 18:55:41,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [999] [999] L818-->L818-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd4~0_In-1276625637 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1276625637 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1276625637 256))) (.cse0 (= (mod ~z$r_buff1_thd4~0_In-1276625637 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork3_#t~ite35_Out-1276625637| ~z$w_buff1_used~0_In-1276625637)) (and (= |P3Thread1of1ForFork3_#t~ite35_Out-1276625637| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1276625637, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1276625637, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1276625637, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1276625637} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1276625637, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1276625637, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1276625637, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1276625637, P3Thread1of1ForFork3_#t~ite35=|P3Thread1of1ForFork3_#t~ite35_Out-1276625637|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite35] because there is no mapped edge [2019-12-07 18:55:41,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1004] [1004] L819-->L820: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In446489448 256) 0)) (.cse0 (= ~z$r_buff0_thd4~0_Out446489448 ~z$r_buff0_thd4~0_In446489448)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In446489448 256) 0))) (or (and .cse0 .cse1) (and (not .cse2) (= ~z$r_buff0_thd4~0_Out446489448 0) (not .cse1)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In446489448, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In446489448} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In446489448, P3Thread1of1ForFork3_#t~ite36=|P3Thread1of1ForFork3_#t~ite36_Out446489448|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out446489448} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite36, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:55:41,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [997] [997] L820-->L820-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-610158195 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In-610158195 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd4~0_In-610158195 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-610158195 256)))) (or (and (= 0 |P3Thread1of1ForFork3_#t~ite37_Out-610158195|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite37_Out-610158195| ~z$r_buff1_thd4~0_In-610158195) (or .cse2 .cse3)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-610158195, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-610158195, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-610158195, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-610158195} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-610158195, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-610158195, P3Thread1of1ForFork3_#t~ite37=|P3Thread1of1ForFork3_#t~ite37_Out-610158195|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-610158195, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-610158195} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite37] because there is no mapped edge [2019-12-07 18:55:41,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1052] [1052] L820-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_134 (+ v_~__unbuffered_cnt~0_135 1)) (= |v_P3Thread1of1ForFork3_#t~ite37_50| v_~z$r_buff1_thd4~0_255) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite37=|v_P3Thread1of1ForFork3_#t~ite37_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_135} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_255, P3Thread1of1ForFork3_#t~ite37=|v_P3Thread1of1ForFork3_#t~ite37_49|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_134, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite37, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:55:41,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [916] [916] L845-1-->L851: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:55:41,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [991] [991] L851-2-->L851-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1119882443 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1119882443 256) 0))) (or (and (= ~z$w_buff1~0_In-1119882443 |ULTIMATE.start_main_#t~ite42_Out-1119882443|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z~0_In-1119882443 |ULTIMATE.start_main_#t~ite42_Out-1119882443|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1119882443, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1119882443, ~z$w_buff1~0=~z$w_buff1~0_In-1119882443, ~z~0=~z~0_In-1119882443} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1119882443, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1119882443, ~z$w_buff1~0=~z$w_buff1~0_In-1119882443, ~z~0=~z~0_In-1119882443, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1119882443|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:55:41,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [971] [971] L851-4-->L852: Formula: (= v_~z~0_85 |v_ULTIMATE.start_main_#t~ite42_10|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_10|} OutVars{~z~0=v_~z~0_85, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_13|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[~z~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:55:41,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1003] [1003] L852-->L852-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-168896436 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-168896436 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out-168896436| ~z$w_buff0_used~0_In-168896436) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite44_Out-168896436| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-168896436, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-168896436} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-168896436, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-168896436, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-168896436|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:55:41,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1006] [1006] L853-->L853-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In-750563314 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-750563314 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-750563314 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-750563314 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-750563314 |ULTIMATE.start_main_#t~ite45_Out-750563314|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite45_Out-750563314| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-750563314, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-750563314, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-750563314, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-750563314} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-750563314, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-750563314, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-750563314, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-750563314, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-750563314|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:55:41,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [994] [994] L854-->L854-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1914160819 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1914160819 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite46_Out-1914160819| ~z$r_buff0_thd0~0_In-1914160819) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite46_Out-1914160819| 0) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1914160819, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1914160819} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1914160819, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1914160819, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1914160819|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:55:41,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1014] [1014] L855-->L855-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1156838030 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-1156838030 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-1156838030 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1156838030 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite47_Out-1156838030| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite47_Out-1156838030| ~z$r_buff1_thd0~0_In-1156838030)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156838030, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156838030, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1156838030, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1156838030} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1156838030, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1156838030, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1156838030, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1156838030|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1156838030} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:55:41,266 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1009] [1009] L870-->L870-2: Formula: (let ((.cse0 (= (mod ~z$flush_delayed~0_In-1906227889 256) 0))) (or (and .cse0 (= ~z~0_In-1906227889 |ULTIMATE.start_main_#t~ite70_Out-1906227889|)) (and (= |ULTIMATE.start_main_#t~ite70_Out-1906227889| ~z$mem_tmp~0_In-1906227889) (not .cse0)))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In-1906227889, ~z$flush_delayed~0=~z$flush_delayed~0_In-1906227889, ~z~0=~z~0_In-1906227889} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In-1906227889, ULTIMATE.start_main_#t~ite70=|ULTIMATE.start_main_#t~ite70_Out-1906227889|, ~z$flush_delayed~0=~z$flush_delayed~0_In-1906227889, ~z~0=~z~0_In-1906227889} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite70] because there is no mapped edge [2019-12-07 18:55:41,266 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1070] [1070] L870-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= 0 v_~z$flush_delayed~0_270) (= v_~z~0_292 |v_ULTIMATE.start_main_#t~ite70_48|) (= (mod v_~main$tmp_guard1~0_61 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_48|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_61} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_61, ~z$flush_delayed~0=v_~z$flush_delayed~0_270, ~z~0=v_~z~0_292, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite70, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:55:41,329 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_f9bb5f45-baa0-4e47-ae7e-4c860c9481a4/bin/uautomizer/witness.graphml [2019-12-07 18:55:41,329 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:55:41,330 INFO L168 Benchmark]: Toolchain (without parser) took 57428.25 ms. Allocated memory was 1.0 GB in the beginning and 7.1 GB in the end (delta: 6.0 GB). Free memory was 942.4 MB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 3.7 GB. Max. memory is 11.5 GB. [2019-12-07 18:55:41,331 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 964.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:55:41,331 INFO L168 Benchmark]: CACSL2BoogieTranslator took 402.09 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.6 MB). Free memory was 942.4 MB in the beginning and 1.1 GB in the end (delta: -129.4 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:55:41,331 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.73 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:55:41,331 INFO L168 Benchmark]: Boogie Preprocessor took 28.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:55:41,332 INFO L168 Benchmark]: RCFGBuilder took 472.64 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 65.9 MB). Peak memory consumption was 65.9 MB. Max. memory is 11.5 GB. [2019-12-07 18:55:41,332 INFO L168 Benchmark]: TraceAbstraction took 56395.50 ms. Allocated memory was 1.1 GB in the beginning and 7.1 GB in the end (delta: 5.9 GB). Free memory was 1.0 GB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2019-12-07 18:55:41,332 INFO L168 Benchmark]: Witness Printer took 83.78 ms. Allocated memory is still 7.1 GB. Free memory was 3.3 GB in the beginning and 3.3 GB in the end (delta: 49.0 MB). Peak memory consumption was 49.0 MB. Max. memory is 11.5 GB. [2019-12-07 18:55:41,334 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 964.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 402.09 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.6 MB). Free memory was 942.4 MB in the beginning and 1.1 GB in the end (delta: -129.4 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.73 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 472.64 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 65.9 MB). Peak memory consumption was 65.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 56395.50 ms. Allocated memory was 1.1 GB in the beginning and 7.1 GB in the end (delta: 5.9 GB). Free memory was 1.0 GB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. * Witness Printer took 83.78 ms. Allocated memory is still 7.1 GB. Free memory was 3.3 GB in the beginning and 3.3 GB in the end (delta: 49.0 MB). Peak memory consumption was 49.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.9s, 221 ProgramPointsBefore, 122 ProgramPointsAfterwards, 270 TransitionsBefore, 142 TransitionsAfterwards, 28796 CoEnabledTransitionPairs, 7 FixpointIterations, 35 TrivialSequentialCompositions, 46 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 52 ConcurrentYvCompositions, 34 ChoiceCompositions, 10428 VarBasedMoverChecksPositive, 374 VarBasedMoverChecksNegative, 122 SemBasedMoverChecksPositive, 390 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.3s, 0 MoverChecksTotal, 145015 CheckedPairsTotal, 133 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L839] FCALL, FORK 0 pthread_create(&t825, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] FCALL, FORK 0 pthread_create(&t826, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L843] FCALL, FORK 0 pthread_create(&t827, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L845] FCALL, FORK 0 pthread_create(&t828, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 4 z$r_buff1_thd0 = z$r_buff0_thd0 [L790] 4 z$r_buff1_thd1 = z$r_buff0_thd1 [L791] 4 z$r_buff1_thd2 = z$r_buff0_thd2 [L792] 4 z$r_buff1_thd3 = z$r_buff0_thd3 [L793] 4 z$r_buff1_thd4 = z$r_buff0_thd4 [L794] 4 z$r_buff0_thd4 = (_Bool)1 [L797] 4 weak$$choice0 = __VERIFIER_nondet_bool() [L798] 4 weak$$choice2 = __VERIFIER_nondet_bool() [L799] 4 z$flush_delayed = weak$$choice2 [L800] 4 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L801] EXPR 4 !z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L801] 4 z = !z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff1) [L802] EXPR 4 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] 4 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff0)) [L803] EXPR 4 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L803] 4 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff1 : z$w_buff1)) [L804] EXPR 4 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L804] 4 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used)) [L805] EXPR 4 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L805] 4 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) [L807] EXPR 4 weak$$choice2 ? z$r_buff1_thd4 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$r_buff1_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L807] 4 z$r_buff1_thd4 = weak$$choice2 ? z$r_buff1_thd4 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$r_buff1_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) [L808] 4 __unbuffered_p3_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L809] 4 z = z$flush_delayed ? z$mem_tmp : z [L810] 4 z$flush_delayed = (_Bool)0 [L813] 4 __unbuffered_p3_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L816] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 3 y = 2 [L767] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L816] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L770] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L770] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L771] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L772] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L773] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L817] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L818] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L851] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L852] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L853] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L854] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L855] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L858] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L859] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L860] 0 z$flush_delayed = weak$$choice2 [L861] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L862] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L862] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L863] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L863] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L864] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L864] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L865] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L865] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L866] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L866] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L867] EXPR 0 weak$$choice2 ? z$r_buff0_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff0_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L867] 0 z$r_buff0_thd0 = weak$$choice2 ? z$r_buff0_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff0_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0)) [L868] EXPR 0 weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L868] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L869] 0 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2 && __unbuffered_p3_EAX == 2 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 209 locations, 2 error locations. Result: UNSAFE, OverallTime: 56.2s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 14.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3729 SDtfs, 3239 SDslu, 7491 SDs, 0 SdLazy, 2831 SolverSat, 150 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 139 GetRequests, 34 SyntacticMatches, 14 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=181318occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 26.9s AutomataMinimizationTime, 20 MinimizatonAttempts, 91209 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 1166 NumberOfCodeBlocks, 1166 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 1069 ConstructedInterpolants, 0 QuantifiedInterpolants, 235105 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...