./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix030_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix030_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 599bb8233b6b7c042b74faac908a64b876aa0f68 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:45:25,441 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:45:25,442 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:45:25,449 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:45:25,450 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:45:25,450 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:45:25,451 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:45:25,452 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:45:25,454 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:45:25,454 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:45:25,455 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:45:25,456 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:45:25,456 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:45:25,457 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:45:25,457 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:45:25,458 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:45:25,459 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:45:25,459 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:45:25,461 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:45:25,462 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:45:25,463 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:45:25,464 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:45:25,465 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:45:25,465 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:45:25,467 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:45:25,467 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:45:25,467 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:45:25,468 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:45:25,468 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:45:25,469 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:45:25,469 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:45:25,469 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:45:25,470 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:45:25,470 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:45:25,471 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:45:25,471 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:45:25,471 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:45:25,471 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:45:25,471 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:45:25,472 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:45:25,472 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:45:25,473 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:45:25,482 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:45:25,482 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:45:25,483 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:45:25,483 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:45:25,483 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:45:25,484 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:45:25,484 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:45:25,484 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:45:25,484 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:45:25,484 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:45:25,484 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:45:25,484 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:45:25,484 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:45:25,485 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:45:25,485 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:45:25,485 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:45:25,485 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:45:25,485 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:45:25,485 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:45:25,485 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:45:25,486 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:45:25,486 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:45:25,486 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:45:25,486 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:45:25,486 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:45:25,486 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:45:25,486 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:45:25,486 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:45:25,486 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:45:25,487 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 599bb8233b6b7c042b74faac908a64b876aa0f68 [2019-12-07 18:45:25,584 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:45:25,591 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:45:25,593 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:45:25,594 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:45:25,594 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:45:25,595 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix030_tso.opt.i [2019-12-07 18:45:25,630 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/data/8c0c66953/b93b2c00c50740a094105a1d3407f902/FLAGadddefa65 [2019-12-07 18:45:25,994 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:45:25,994 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/sv-benchmarks/c/pthread-wmm/mix030_tso.opt.i [2019-12-07 18:45:26,006 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/data/8c0c66953/b93b2c00c50740a094105a1d3407f902/FLAGadddefa65 [2019-12-07 18:45:26,016 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/data/8c0c66953/b93b2c00c50740a094105a1d3407f902 [2019-12-07 18:45:26,018 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:45:26,019 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:45:26,019 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:45:26,020 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:45:26,022 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:45:26,022 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:45:26" (1/1) ... [2019-12-07 18:45:26,024 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26, skipping insertion in model container [2019-12-07 18:45:26,024 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:45:26" (1/1) ... [2019-12-07 18:45:26,029 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:45:26,059 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:45:26,325 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:45:26,333 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:45:26,378 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:45:26,425 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:45:26,425 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26 WrapperNode [2019-12-07 18:45:26,425 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:45:26,426 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:45:26,426 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:45:26,426 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:45:26,432 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26" (1/1) ... [2019-12-07 18:45:26,447 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26" (1/1) ... [2019-12-07 18:45:26,471 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:45:26,471 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:45:26,472 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:45:26,472 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:45:26,479 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26" (1/1) ... [2019-12-07 18:45:26,479 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26" (1/1) ... [2019-12-07 18:45:26,483 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26" (1/1) ... [2019-12-07 18:45:26,483 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26" (1/1) ... [2019-12-07 18:45:26,491 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26" (1/1) ... [2019-12-07 18:45:26,495 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26" (1/1) ... [2019-12-07 18:45:26,498 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26" (1/1) ... [2019-12-07 18:45:26,502 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:45:26,502 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:45:26,502 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:45:26,502 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:45:26,503 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:45:26,547 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:45:26,547 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:45:26,547 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:45:26,547 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:45:26,547 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:45:26,547 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:45:26,547 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:45:26,547 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:45:26,548 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:45:26,548 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:45:26,548 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 18:45:26,548 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 18:45:26,548 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:45:26,548 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:45:26,548 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:45:26,550 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:45:26,991 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:45:26,991 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:45:26,992 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:45:26 BoogieIcfgContainer [2019-12-07 18:45:26,992 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:45:26,992 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:45:26,992 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:45:26,994 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:45:26,994 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:45:26" (1/3) ... [2019-12-07 18:45:26,995 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@350c63c8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:45:26, skipping insertion in model container [2019-12-07 18:45:26,995 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:45:26" (2/3) ... [2019-12-07 18:45:26,995 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@350c63c8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:45:26, skipping insertion in model container [2019-12-07 18:45:26,995 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:45:26" (3/3) ... [2019-12-07 18:45:26,996 INFO L109 eAbstractionObserver]: Analyzing ICFG mix030_tso.opt.i [2019-12-07 18:45:27,003 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:45:27,003 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:45:27,007 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:45:27,008 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:45:27,033 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,034 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,034 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,034 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,035 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,035 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,035 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,035 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,035 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,035 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,035 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,036 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,036 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,040 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,040 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,040 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,040 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,040 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,040 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,040 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,040 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,040 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,040 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,041 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,041 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,041 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,041 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,041 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,041 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,041 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,041 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,041 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,042 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,042 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,042 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,042 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,042 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,042 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,042 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,042 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,042 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,043 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,043 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,043 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,043 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,043 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,043 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,043 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,043 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,043 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,043 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,044 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,044 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,044 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,044 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,044 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,044 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,044 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,044 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,044 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,044 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,045 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,045 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,045 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,045 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,045 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,045 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,045 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,045 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,045 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,046 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,046 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,046 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,046 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,046 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,046 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,046 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,046 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,046 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,046 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,047 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,047 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,047 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,047 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,047 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,047 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,047 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,047 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,047 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,047 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,047 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,048 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,048 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,048 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,048 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,048 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,048 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,048 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,048 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,048 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,048 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,049 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,049 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,049 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,049 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,049 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,049 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,049 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,049 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,049 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,049 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,050 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,050 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,050 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,050 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,050 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,050 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,050 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,050 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,050 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,050 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,051 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,051 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,051 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,051 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,051 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,051 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,051 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,051 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,051 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,051 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,051 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,052 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,052 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,052 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:45:27,067 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 18:45:27,083 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:45:27,083 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:45:27,084 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:45:27,084 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:45:27,084 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:45:27,084 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:45:27,084 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:45:27,084 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:45:27,095 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 221 places, 270 transitions [2019-12-07 18:45:27,097 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 221 places, 270 transitions [2019-12-07 18:45:27,167 INFO L134 PetriNetUnfolder]: 62/266 cut-off events. [2019-12-07 18:45:27,167 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:45:27,179 INFO L76 FinitePrefix]: Finished finitePrefix Result has 279 conditions, 266 events. 62/266 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 890 event pairs. 12/214 useless extension candidates. Maximal degree in co-relation 235. Up to 2 conditions per place. [2019-12-07 18:45:27,205 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 221 places, 270 transitions [2019-12-07 18:45:27,250 INFO L134 PetriNetUnfolder]: 62/266 cut-off events. [2019-12-07 18:45:27,250 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:45:27,260 INFO L76 FinitePrefix]: Finished finitePrefix Result has 279 conditions, 266 events. 62/266 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 890 event pairs. 12/214 useless extension candidates. Maximal degree in co-relation 235. Up to 2 conditions per place. [2019-12-07 18:45:27,288 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 28796 [2019-12-07 18:45:27,289 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:45:31,035 WARN L192 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 18:45:31,176 INFO L206 etLargeBlockEncoding]: Checked pairs total: 145015 [2019-12-07 18:45:31,176 INFO L214 etLargeBlockEncoding]: Total number of compositions: 133 [2019-12-07 18:45:31,178 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 122 places, 142 transitions [2019-12-07 18:45:40,528 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 105210 states. [2019-12-07 18:45:40,529 INFO L276 IsEmpty]: Start isEmpty. Operand 105210 states. [2019-12-07 18:45:40,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 18:45:40,534 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:40,534 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:40,534 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:40,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:40,538 INFO L82 PathProgramCache]: Analyzing trace with hash 487193979, now seen corresponding path program 1 times [2019-12-07 18:45:40,544 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:40,544 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359761268] [2019-12-07 18:45:40,544 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:40,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:40,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:40,700 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359761268] [2019-12-07 18:45:40,701 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:40,701 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:45:40,701 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1415439245] [2019-12-07 18:45:40,704 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:45:40,704 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:40,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:45:40,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:40,715 INFO L87 Difference]: Start difference. First operand 105210 states. Second operand 3 states. [2019-12-07 18:45:41,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:41,516 INFO L93 Difference]: Finished difference Result 105018 states and 475984 transitions. [2019-12-07 18:45:41,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:45:41,517 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 18:45:41,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:42,145 INFO L225 Difference]: With dead ends: 105018 [2019-12-07 18:45:42,145 INFO L226 Difference]: Without dead ends: 102886 [2019-12-07 18:45:42,146 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:45:43,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102886 states. [2019-12-07 18:45:45,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102886 to 102886. [2019-12-07 18:45:45,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102886 states. [2019-12-07 18:45:45,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102886 states to 102886 states and 466780 transitions. [2019-12-07 18:45:45,576 INFO L78 Accepts]: Start accepts. Automaton has 102886 states and 466780 transitions. Word has length 9 [2019-12-07 18:45:45,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:45,578 INFO L462 AbstractCegarLoop]: Abstraction has 102886 states and 466780 transitions. [2019-12-07 18:45:45,578 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:45:45,578 INFO L276 IsEmpty]: Start isEmpty. Operand 102886 states and 466780 transitions. [2019-12-07 18:45:45,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:45:45,583 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:45,583 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:45,584 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:45,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:45,584 INFO L82 PathProgramCache]: Analyzing trace with hash 1814849602, now seen corresponding path program 1 times [2019-12-07 18:45:45,584 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:45,584 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706368382] [2019-12-07 18:45:45,584 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:45,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:45,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:45,644 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [706368382] [2019-12-07 18:45:45,645 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:45,645 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:45:45,645 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1926202977] [2019-12-07 18:45:45,646 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:45:45,646 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:45,646 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:45:45,646 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:45:45,646 INFO L87 Difference]: Start difference. First operand 102886 states and 466780 transitions. Second operand 4 states. [2019-12-07 18:45:48,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:48,250 INFO L93 Difference]: Finished difference Result 165574 states and 725216 transitions. [2019-12-07 18:45:48,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:45:48,251 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:45:48,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:48,698 INFO L225 Difference]: With dead ends: 165574 [2019-12-07 18:45:48,698 INFO L226 Difference]: Without dead ends: 165546 [2019-12-07 18:45:48,699 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:45:50,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165546 states. [2019-12-07 18:45:53,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165546 to 160294. [2019-12-07 18:45:53,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160294 states. [2019-12-07 18:45:53,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160294 states to 160294 states and 705940 transitions. [2019-12-07 18:45:53,551 INFO L78 Accepts]: Start accepts. Automaton has 160294 states and 705940 transitions. Word has length 15 [2019-12-07 18:45:53,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:45:53,551 INFO L462 AbstractCegarLoop]: Abstraction has 160294 states and 705940 transitions. [2019-12-07 18:45:53,551 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:45:53,551 INFO L276 IsEmpty]: Start isEmpty. Operand 160294 states and 705940 transitions. [2019-12-07 18:45:53,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:45:53,553 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:45:53,553 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:45:53,554 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:45:53,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:45:53,554 INFO L82 PathProgramCache]: Analyzing trace with hash -1261715161, now seen corresponding path program 1 times [2019-12-07 18:45:53,554 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:45:53,554 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [510720109] [2019-12-07 18:45:53,554 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:45:53,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:45:53,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:45:53,621 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [510720109] [2019-12-07 18:45:53,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:45:53,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:45:53,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656090185] [2019-12-07 18:45:53,621 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:45:53,621 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:45:53,621 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:45:53,621 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:45:53,622 INFO L87 Difference]: Start difference. First operand 160294 states and 705940 transitions. Second operand 4 states. [2019-12-07 18:45:55,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:45:55,140 INFO L93 Difference]: Finished difference Result 201342 states and 879852 transitions. [2019-12-07 18:45:55,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:45:55,141 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:45:55,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:45:55,716 INFO L225 Difference]: With dead ends: 201342 [2019-12-07 18:45:55,716 INFO L226 Difference]: Without dead ends: 201342 [2019-12-07 18:45:55,716 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:45:57,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201342 states. [2019-12-07 18:46:02,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201342 to 181090. [2019-12-07 18:46:02,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181090 states. [2019-12-07 18:46:03,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181090 states to 181090 states and 795812 transitions. [2019-12-07 18:46:03,193 INFO L78 Accepts]: Start accepts. Automaton has 181090 states and 795812 transitions. Word has length 15 [2019-12-07 18:46:03,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:03,193 INFO L462 AbstractCegarLoop]: Abstraction has 181090 states and 795812 transitions. [2019-12-07 18:46:03,193 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:03,193 INFO L276 IsEmpty]: Start isEmpty. Operand 181090 states and 795812 transitions. [2019-12-07 18:46:03,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 18:46:03,205 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:03,205 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:03,205 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:03,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:03,205 INFO L82 PathProgramCache]: Analyzing trace with hash 367966894, now seen corresponding path program 1 times [2019-12-07 18:46:03,205 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:03,206 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1069202824] [2019-12-07 18:46:03,206 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:03,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:03,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:03,254 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1069202824] [2019-12-07 18:46:03,254 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:03,254 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:46:03,254 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [394505771] [2019-12-07 18:46:03,254 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:46:03,254 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:03,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:46:03,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:03,255 INFO L87 Difference]: Start difference. First operand 181090 states and 795812 transitions. Second operand 5 states. [2019-12-07 18:46:05,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:05,295 INFO L93 Difference]: Finished difference Result 240062 states and 1039968 transitions. [2019-12-07 18:46:05,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:46:05,296 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 18:46:05,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:05,975 INFO L225 Difference]: With dead ends: 240062 [2019-12-07 18:46:05,976 INFO L226 Difference]: Without dead ends: 240034 [2019-12-07 18:46:05,976 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:46:08,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240034 states. [2019-12-07 18:46:13,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240034 to 181318. [2019-12-07 18:46:13,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181318 states. [2019-12-07 18:46:14,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181318 states to 181318 states and 796176 transitions. [2019-12-07 18:46:14,290 INFO L78 Accepts]: Start accepts. Automaton has 181318 states and 796176 transitions. Word has length 21 [2019-12-07 18:46:14,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:14,290 INFO L462 AbstractCegarLoop]: Abstraction has 181318 states and 796176 transitions. [2019-12-07 18:46:14,290 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:46:14,291 INFO L276 IsEmpty]: Start isEmpty. Operand 181318 states and 796176 transitions. [2019-12-07 18:46:14,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:46:14,349 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:14,349 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:14,349 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:14,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:14,349 INFO L82 PathProgramCache]: Analyzing trace with hash -728218178, now seen corresponding path program 1 times [2019-12-07 18:46:14,349 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:14,350 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405452516] [2019-12-07 18:46:14,350 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:14,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:14,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:14,388 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1405452516] [2019-12-07 18:46:14,388 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:14,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:14,389 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1496307000] [2019-12-07 18:46:14,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:14,389 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:14,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:14,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:14,390 INFO L87 Difference]: Start difference. First operand 181318 states and 796176 transitions. Second operand 3 states. [2019-12-07 18:46:15,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:15,412 INFO L93 Difference]: Finished difference Result 140527 states and 571727 transitions. [2019-12-07 18:46:15,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:15,413 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 18:46:15,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:15,738 INFO L225 Difference]: With dead ends: 140527 [2019-12-07 18:46:15,738 INFO L226 Difference]: Without dead ends: 140527 [2019-12-07 18:46:15,738 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:17,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140527 states. [2019-12-07 18:46:18,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140527 to 140527. [2019-12-07 18:46:18,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140527 states. [2019-12-07 18:46:19,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140527 states to 140527 states and 571727 transitions. [2019-12-07 18:46:19,884 INFO L78 Accepts]: Start accepts. Automaton has 140527 states and 571727 transitions. Word has length 29 [2019-12-07 18:46:19,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:19,884 INFO L462 AbstractCegarLoop]: Abstraction has 140527 states and 571727 transitions. [2019-12-07 18:46:19,884 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:19,884 INFO L276 IsEmpty]: Start isEmpty. Operand 140527 states and 571727 transitions. [2019-12-07 18:46:19,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:46:19,923 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:19,923 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:19,923 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:19,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:19,924 INFO L82 PathProgramCache]: Analyzing trace with hash -1366585259, now seen corresponding path program 1 times [2019-12-07 18:46:19,924 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:19,924 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1332286681] [2019-12-07 18:46:19,924 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:19,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:19,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:19,961 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1332286681] [2019-12-07 18:46:19,961 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:19,961 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:46:19,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1341681988] [2019-12-07 18:46:19,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:46:19,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:19,962 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:46:19,962 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:19,962 INFO L87 Difference]: Start difference. First operand 140527 states and 571727 transitions. Second operand 4 states. [2019-12-07 18:46:20,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:20,145 INFO L93 Difference]: Finished difference Result 55376 states and 188470 transitions. [2019-12-07 18:46:20,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:46:20,146 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 18:46:20,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:20,241 INFO L225 Difference]: With dead ends: 55376 [2019-12-07 18:46:20,241 INFO L226 Difference]: Without dead ends: 55376 [2019-12-07 18:46:20,241 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:46:20,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55376 states. [2019-12-07 18:46:21,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55376 to 55376. [2019-12-07 18:46:21,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55376 states. [2019-12-07 18:46:21,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55376 states to 55376 states and 188470 transitions. [2019-12-07 18:46:21,425 INFO L78 Accepts]: Start accepts. Automaton has 55376 states and 188470 transitions. Word has length 30 [2019-12-07 18:46:21,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:21,425 INFO L462 AbstractCegarLoop]: Abstraction has 55376 states and 188470 transitions. [2019-12-07 18:46:21,425 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:46:21,425 INFO L276 IsEmpty]: Start isEmpty. Operand 55376 states and 188470 transitions. [2019-12-07 18:46:21,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 18:46:21,441 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:21,441 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:21,441 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:21,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:21,441 INFO L82 PathProgramCache]: Analyzing trace with hash -262160477, now seen corresponding path program 1 times [2019-12-07 18:46:21,441 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:21,441 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [678146943] [2019-12-07 18:46:21,442 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:21,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:21,479 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:21,479 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [678146943] [2019-12-07 18:46:21,479 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:21,480 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:46:21,480 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [223193743] [2019-12-07 18:46:21,480 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:46:21,480 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:21,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:46:21,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:21,481 INFO L87 Difference]: Start difference. First operand 55376 states and 188470 transitions. Second operand 5 states. [2019-12-07 18:46:21,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:21,515 INFO L93 Difference]: Finished difference Result 7381 states and 20644 transitions. [2019-12-07 18:46:21,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:46:21,516 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 18:46:21,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:21,523 INFO L225 Difference]: With dead ends: 7381 [2019-12-07 18:46:21,524 INFO L226 Difference]: Without dead ends: 7381 [2019-12-07 18:46:21,524 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:21,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7381 states. [2019-12-07 18:46:21,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7381 to 7381. [2019-12-07 18:46:21,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7381 states. [2019-12-07 18:46:21,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7381 states to 7381 states and 20644 transitions. [2019-12-07 18:46:21,606 INFO L78 Accepts]: Start accepts. Automaton has 7381 states and 20644 transitions. Word has length 31 [2019-12-07 18:46:21,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:21,607 INFO L462 AbstractCegarLoop]: Abstraction has 7381 states and 20644 transitions. [2019-12-07 18:46:21,607 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:46:21,607 INFO L276 IsEmpty]: Start isEmpty. Operand 7381 states and 20644 transitions. [2019-12-07 18:46:21,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 18:46:21,612 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:21,612 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:21,612 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:21,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:21,612 INFO L82 PathProgramCache]: Analyzing trace with hash -340519042, now seen corresponding path program 1 times [2019-12-07 18:46:21,613 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:21,613 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1309455983] [2019-12-07 18:46:21,613 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:21,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:21,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:21,666 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1309455983] [2019-12-07 18:46:21,666 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:21,666 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:46:21,666 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1924510212] [2019-12-07 18:46:21,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:46:21,666 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:21,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:46:21,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:21,667 INFO L87 Difference]: Start difference. First operand 7381 states and 20644 transitions. Second operand 6 states. [2019-12-07 18:46:21,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:21,698 INFO L93 Difference]: Finished difference Result 3680 states and 11543 transitions. [2019-12-07 18:46:21,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:46:21,698 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 18:46:21,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:21,702 INFO L225 Difference]: With dead ends: 3680 [2019-12-07 18:46:21,703 INFO L226 Difference]: Without dead ends: 3680 [2019-12-07 18:46:21,703 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:21,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3680 states. [2019-12-07 18:46:21,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3680 to 3484. [2019-12-07 18:46:21,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3484 states. [2019-12-07 18:46:21,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3484 states to 3484 states and 10983 transitions. [2019-12-07 18:46:21,745 INFO L78 Accepts]: Start accepts. Automaton has 3484 states and 10983 transitions. Word has length 43 [2019-12-07 18:46:21,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:21,745 INFO L462 AbstractCegarLoop]: Abstraction has 3484 states and 10983 transitions. [2019-12-07 18:46:21,745 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:46:21,745 INFO L276 IsEmpty]: Start isEmpty. Operand 3484 states and 10983 transitions. [2019-12-07 18:46:21,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:46:21,748 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:21,748 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:21,749 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:21,749 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:21,749 INFO L82 PathProgramCache]: Analyzing trace with hash 1142900950, now seen corresponding path program 1 times [2019-12-07 18:46:21,749 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:21,749 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748501943] [2019-12-07 18:46:21,749 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:21,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:21,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:21,815 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748501943] [2019-12-07 18:46:21,816 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:21,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:46:21,816 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1092793006] [2019-12-07 18:46:21,816 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:46:21,817 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:21,817 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:46:21,817 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:21,817 INFO L87 Difference]: Start difference. First operand 3484 states and 10983 transitions. Second operand 6 states. [2019-12-07 18:46:22,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:22,189 INFO L93 Difference]: Finished difference Result 5253 states and 16417 transitions. [2019-12-07 18:46:22,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:46:22,189 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-12-07 18:46:22,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:22,195 INFO L225 Difference]: With dead ends: 5253 [2019-12-07 18:46:22,195 INFO L226 Difference]: Without dead ends: 5253 [2019-12-07 18:46:22,196 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:46:22,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5253 states. [2019-12-07 18:46:22,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5253 to 4173. [2019-12-07 18:46:22,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4173 states. [2019-12-07 18:46:22,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4173 states to 4173 states and 13137 transitions. [2019-12-07 18:46:22,248 INFO L78 Accepts]: Start accepts. Automaton has 4173 states and 13137 transitions. Word has length 74 [2019-12-07 18:46:22,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:22,248 INFO L462 AbstractCegarLoop]: Abstraction has 4173 states and 13137 transitions. [2019-12-07 18:46:22,248 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:46:22,248 INFO L276 IsEmpty]: Start isEmpty. Operand 4173 states and 13137 transitions. [2019-12-07 18:46:22,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:46:22,251 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:22,251 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:22,252 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:22,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:22,252 INFO L82 PathProgramCache]: Analyzing trace with hash -617148552, now seen corresponding path program 2 times [2019-12-07 18:46:22,252 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:22,252 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306430073] [2019-12-07 18:46:22,252 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:22,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:22,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:22,322 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306430073] [2019-12-07 18:46:22,322 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:22,323 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:46:22,323 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2123907027] [2019-12-07 18:46:22,323 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:46:22,323 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:22,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:46:22,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:22,323 INFO L87 Difference]: Start difference. First operand 4173 states and 13137 transitions. Second operand 5 states. [2019-12-07 18:46:22,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:22,488 INFO L93 Difference]: Finished difference Result 4770 states and 14831 transitions. [2019-12-07 18:46:22,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:46:22,488 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 74 [2019-12-07 18:46:22,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:22,493 INFO L225 Difference]: With dead ends: 4770 [2019-12-07 18:46:22,494 INFO L226 Difference]: Without dead ends: 4770 [2019-12-07 18:46:22,494 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:22,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4770 states. [2019-12-07 18:46:22,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4770 to 4425. [2019-12-07 18:46:22,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4425 states. [2019-12-07 18:46:22,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4425 states to 4425 states and 13885 transitions. [2019-12-07 18:46:22,541 INFO L78 Accepts]: Start accepts. Automaton has 4425 states and 13885 transitions. Word has length 74 [2019-12-07 18:46:22,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:22,542 INFO L462 AbstractCegarLoop]: Abstraction has 4425 states and 13885 transitions. [2019-12-07 18:46:22,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:46:22,542 INFO L276 IsEmpty]: Start isEmpty. Operand 4425 states and 13885 transitions. [2019-12-07 18:46:22,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:46:22,545 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:22,545 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:22,545 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:22,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:22,546 INFO L82 PathProgramCache]: Analyzing trace with hash -115763946, now seen corresponding path program 3 times [2019-12-07 18:46:22,546 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:22,546 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212800194] [2019-12-07 18:46:22,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:22,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:22,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:22,637 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212800194] [2019-12-07 18:46:22,637 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:22,637 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:46:22,637 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [59520896] [2019-12-07 18:46:22,638 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:46:22,638 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:22,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:46:22,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:22,638 INFO L87 Difference]: Start difference. First operand 4425 states and 13885 transitions. Second operand 6 states. [2019-12-07 18:46:22,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:22,962 INFO L93 Difference]: Finished difference Result 5463 states and 16905 transitions. [2019-12-07 18:46:22,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:46:22,962 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-12-07 18:46:22,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:22,968 INFO L225 Difference]: With dead ends: 5463 [2019-12-07 18:46:22,969 INFO L226 Difference]: Without dead ends: 5463 [2019-12-07 18:46:22,969 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:46:22,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5463 states. [2019-12-07 18:46:23,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5463 to 4789. [2019-12-07 18:46:23,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4789 states. [2019-12-07 18:46:23,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4789 states to 4789 states and 15009 transitions. [2019-12-07 18:46:23,031 INFO L78 Accepts]: Start accepts. Automaton has 4789 states and 15009 transitions. Word has length 74 [2019-12-07 18:46:23,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:23,031 INFO L462 AbstractCegarLoop]: Abstraction has 4789 states and 15009 transitions. [2019-12-07 18:46:23,031 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:46:23,031 INFO L276 IsEmpty]: Start isEmpty. Operand 4789 states and 15009 transitions. [2019-12-07 18:46:23,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:46:23,035 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:23,035 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:23,035 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:23,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:23,036 INFO L82 PathProgramCache]: Analyzing trace with hash 1912498904, now seen corresponding path program 4 times [2019-12-07 18:46:23,036 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:23,036 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742602341] [2019-12-07 18:46:23,036 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:23,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:23,134 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:23,134 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742602341] [2019-12-07 18:46:23,134 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:23,134 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:46:23,134 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [674058638] [2019-12-07 18:46:23,135 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:46:23,135 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:23,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:46:23,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:46:23,135 INFO L87 Difference]: Start difference. First operand 4789 states and 15009 transitions. Second operand 8 states. [2019-12-07 18:46:23,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:23,687 INFO L93 Difference]: Finished difference Result 8775 states and 27189 transitions. [2019-12-07 18:46:23,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:46:23,688 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 74 [2019-12-07 18:46:23,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:23,697 INFO L225 Difference]: With dead ends: 8775 [2019-12-07 18:46:23,697 INFO L226 Difference]: Without dead ends: 8775 [2019-12-07 18:46:23,697 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 9 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:46:23,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8775 states. [2019-12-07 18:46:23,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8775 to 4957. [2019-12-07 18:46:23,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4957 states. [2019-12-07 18:46:23,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4957 states to 4957 states and 15585 transitions. [2019-12-07 18:46:23,769 INFO L78 Accepts]: Start accepts. Automaton has 4957 states and 15585 transitions. Word has length 74 [2019-12-07 18:46:23,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:23,770 INFO L462 AbstractCegarLoop]: Abstraction has 4957 states and 15585 transitions. [2019-12-07 18:46:23,770 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:46:23,770 INFO L276 IsEmpty]: Start isEmpty. Operand 4957 states and 15585 transitions. [2019-12-07 18:46:23,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:46:23,774 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:23,774 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:23,774 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:23,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:23,774 INFO L82 PathProgramCache]: Analyzing trace with hash -1183239582, now seen corresponding path program 5 times [2019-12-07 18:46:23,774 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:23,775 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1616673207] [2019-12-07 18:46:23,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:23,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:23,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:23,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1616673207] [2019-12-07 18:46:23,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:23,838 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:46:23,838 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1069096923] [2019-12-07 18:46:23,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:46:23,838 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:23,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:46:23,838 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:46:23,838 INFO L87 Difference]: Start difference. First operand 4957 states and 15585 transitions. Second operand 7 states. [2019-12-07 18:46:24,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:24,485 INFO L93 Difference]: Finished difference Result 8479 states and 26329 transitions. [2019-12-07 18:46:24,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:46:24,486 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 74 [2019-12-07 18:46:24,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:24,495 INFO L225 Difference]: With dead ends: 8479 [2019-12-07 18:46:24,495 INFO L226 Difference]: Without dead ends: 8479 [2019-12-07 18:46:24,495 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:46:24,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8479 states. [2019-12-07 18:46:24,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8479 to 4933. [2019-12-07 18:46:24,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4933 states. [2019-12-07 18:46:24,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4933 states to 4933 states and 15513 transitions. [2019-12-07 18:46:24,568 INFO L78 Accepts]: Start accepts. Automaton has 4933 states and 15513 transitions. Word has length 74 [2019-12-07 18:46:24,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:24,568 INFO L462 AbstractCegarLoop]: Abstraction has 4933 states and 15513 transitions. [2019-12-07 18:46:24,568 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:46:24,568 INFO L276 IsEmpty]: Start isEmpty. Operand 4933 states and 15513 transitions. [2019-12-07 18:46:24,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-12-07 18:46:24,572 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:24,572 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:24,572 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:24,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:24,573 INFO L82 PathProgramCache]: Analyzing trace with hash -1371701034, now seen corresponding path program 6 times [2019-12-07 18:46:24,573 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:24,573 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508797046] [2019-12-07 18:46:24,573 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:24,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:24,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:24,641 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [508797046] [2019-12-07 18:46:24,641 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:24,641 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:46:24,641 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [847242001] [2019-12-07 18:46:24,641 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:46:24,641 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:24,641 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:46:24,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:24,641 INFO L87 Difference]: Start difference. First operand 4933 states and 15513 transitions. Second operand 6 states. [2019-12-07 18:46:24,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:24,932 INFO L93 Difference]: Finished difference Result 6591 states and 20349 transitions. [2019-12-07 18:46:24,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:46:24,933 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-12-07 18:46:24,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:24,942 INFO L225 Difference]: With dead ends: 6591 [2019-12-07 18:46:24,942 INFO L226 Difference]: Without dead ends: 6591 [2019-12-07 18:46:24,943 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 8 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:46:24,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6591 states. [2019-12-07 18:46:25,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6591 to 4957. [2019-12-07 18:46:25,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4957 states. [2019-12-07 18:46:25,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4957 states to 4957 states and 15581 transitions. [2019-12-07 18:46:25,013 INFO L78 Accepts]: Start accepts. Automaton has 4957 states and 15581 transitions. Word has length 74 [2019-12-07 18:46:25,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:25,014 INFO L462 AbstractCegarLoop]: Abstraction has 4957 states and 15581 transitions. [2019-12-07 18:46:25,014 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:46:25,014 INFO L276 IsEmpty]: Start isEmpty. Operand 4957 states and 15581 transitions. [2019-12-07 18:46:25,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-12-07 18:46:25,017 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:25,018 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:25,018 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:25,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:25,018 INFO L82 PathProgramCache]: Analyzing trace with hash -1954937219, now seen corresponding path program 1 times [2019-12-07 18:46:25,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:25,018 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347528207] [2019-12-07 18:46:25,018 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:25,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:25,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:25,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347528207] [2019-12-07 18:46:25,127 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:25,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:46:25,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1569025483] [2019-12-07 18:46:25,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:46:25,128 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:25,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:46:25,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:46:25,128 INFO L87 Difference]: Start difference. First operand 4957 states and 15581 transitions. Second operand 8 states. [2019-12-07 18:46:25,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:25,551 INFO L93 Difference]: Finished difference Result 10303 states and 31757 transitions. [2019-12-07 18:46:25,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 18:46:25,552 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 75 [2019-12-07 18:46:25,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:25,562 INFO L225 Difference]: With dead ends: 10303 [2019-12-07 18:46:25,563 INFO L226 Difference]: Without dead ends: 10303 [2019-12-07 18:46:25,563 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 9 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:46:25,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10303 states. [2019-12-07 18:46:25,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10303 to 6573. [2019-12-07 18:46:25,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6573 states. [2019-12-07 18:46:25,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6573 states to 6573 states and 20617 transitions. [2019-12-07 18:46:25,665 INFO L78 Accepts]: Start accepts. Automaton has 6573 states and 20617 transitions. Word has length 75 [2019-12-07 18:46:25,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:25,665 INFO L462 AbstractCegarLoop]: Abstraction has 6573 states and 20617 transitions. [2019-12-07 18:46:25,665 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:46:25,665 INFO L276 IsEmpty]: Start isEmpty. Operand 6573 states and 20617 transitions. [2019-12-07 18:46:25,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-12-07 18:46:25,672 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:25,672 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:25,672 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:25,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:25,672 INFO L82 PathProgramCache]: Analyzing trace with hash -1039323653, now seen corresponding path program 1 times [2019-12-07 18:46:25,672 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:25,673 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505937925] [2019-12-07 18:46:25,673 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:25,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:25,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:25,801 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505937925] [2019-12-07 18:46:25,801 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:25,802 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:46:25,802 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831239094] [2019-12-07 18:46:25,802 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:46:25,802 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:25,802 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:46:25,802 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:46:25,802 INFO L87 Difference]: Start difference. First operand 6573 states and 20617 transitions. Second operand 9 states. [2019-12-07 18:46:26,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:26,291 INFO L93 Difference]: Finished difference Result 10750 states and 33171 transitions. [2019-12-07 18:46:26,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:46:26,291 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 75 [2019-12-07 18:46:26,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:26,303 INFO L225 Difference]: With dead ends: 10750 [2019-12-07 18:46:26,303 INFO L226 Difference]: Without dead ends: 10750 [2019-12-07 18:46:26,304 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 10 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:46:26,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10750 states. [2019-12-07 18:46:26,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10750 to 7305. [2019-12-07 18:46:26,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7305 states. [2019-12-07 18:46:26,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7305 states to 7305 states and 22957 transitions. [2019-12-07 18:46:26,415 INFO L78 Accepts]: Start accepts. Automaton has 7305 states and 22957 transitions. Word has length 75 [2019-12-07 18:46:26,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:26,415 INFO L462 AbstractCegarLoop]: Abstraction has 7305 states and 22957 transitions. [2019-12-07 18:46:26,415 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:46:26,415 INFO L276 IsEmpty]: Start isEmpty. Operand 7305 states and 22957 transitions. [2019-12-07 18:46:26,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-12-07 18:46:26,422 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:26,422 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:26,422 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:26,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:26,422 INFO L82 PathProgramCache]: Analyzing trace with hash 1931618857, now seen corresponding path program 2 times [2019-12-07 18:46:26,422 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:26,422 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900608511] [2019-12-07 18:46:26,422 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:26,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:26,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:26,536 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1900608511] [2019-12-07 18:46:26,536 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:26,537 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:46:26,537 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1970331620] [2019-12-07 18:46:26,537 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:46:26,537 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:26,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:46:26,537 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:46:26,537 INFO L87 Difference]: Start difference. First operand 7305 states and 22957 transitions. Second operand 9 states. [2019-12-07 18:46:26,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:26,968 INFO L93 Difference]: Finished difference Result 9591 states and 29789 transitions. [2019-12-07 18:46:26,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:46:26,969 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 75 [2019-12-07 18:46:26,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:26,980 INFO L225 Difference]: With dead ends: 9591 [2019-12-07 18:46:26,980 INFO L226 Difference]: Without dead ends: 9591 [2019-12-07 18:46:26,980 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 7 SyntacticMatches, 4 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:46:26,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9591 states. [2019-12-07 18:46:27,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9591 to 7209. [2019-12-07 18:46:27,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7209 states. [2019-12-07 18:46:27,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7209 states to 7209 states and 22645 transitions. [2019-12-07 18:46:27,079 INFO L78 Accepts]: Start accepts. Automaton has 7209 states and 22645 transitions. Word has length 75 [2019-12-07 18:46:27,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:27,079 INFO L462 AbstractCegarLoop]: Abstraction has 7209 states and 22645 transitions. [2019-12-07 18:46:27,079 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:46:27,079 INFO L276 IsEmpty]: Start isEmpty. Operand 7209 states and 22645 transitions. [2019-12-07 18:46:27,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-12-07 18:46:27,086 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:27,086 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:27,086 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:27,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:27,086 INFO L82 PathProgramCache]: Analyzing trace with hash 536019887, now seen corresponding path program 3 times [2019-12-07 18:46:27,086 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:27,086 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1145155203] [2019-12-07 18:46:27,086 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:27,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:27,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:27,197 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1145155203] [2019-12-07 18:46:27,197 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:27,197 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:46:27,197 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1644599301] [2019-12-07 18:46:27,198 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:46:27,198 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:27,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:46:27,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:46:27,198 INFO L87 Difference]: Start difference. First operand 7209 states and 22645 transitions. Second operand 8 states. [2019-12-07 18:46:27,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:27,629 INFO L93 Difference]: Finished difference Result 9331 states and 28961 transitions. [2019-12-07 18:46:27,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:46:27,629 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 75 [2019-12-07 18:46:27,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:27,640 INFO L225 Difference]: With dead ends: 9331 [2019-12-07 18:46:27,640 INFO L226 Difference]: Without dead ends: 9331 [2019-12-07 18:46:27,640 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 8 SyntacticMatches, 5 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:46:27,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9331 states. [2019-12-07 18:46:27,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9331 to 7209. [2019-12-07 18:46:27,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7209 states. [2019-12-07 18:46:27,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7209 states to 7209 states and 22645 transitions. [2019-12-07 18:46:27,742 INFO L78 Accepts]: Start accepts. Automaton has 7209 states and 22645 transitions. Word has length 75 [2019-12-07 18:46:27,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:27,743 INFO L462 AbstractCegarLoop]: Abstraction has 7209 states and 22645 transitions. [2019-12-07 18:46:27,743 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:46:27,743 INFO L276 IsEmpty]: Start isEmpty. Operand 7209 states and 22645 transitions. [2019-12-07 18:46:27,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-12-07 18:46:27,749 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:27,749 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:27,750 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:27,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:27,750 INFO L82 PathProgramCache]: Analyzing trace with hash 1780542509, now seen corresponding path program 4 times [2019-12-07 18:46:27,750 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:27,750 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84999074] [2019-12-07 18:46:27,750 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:27,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:27,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:27,863 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84999074] [2019-12-07 18:46:27,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:27,864 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:46:27,864 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [283226025] [2019-12-07 18:46:27,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:46:27,864 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:27,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:46:27,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:46:27,864 INFO L87 Difference]: Start difference. First operand 7209 states and 22645 transitions. Second operand 9 states. [2019-12-07 18:46:28,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:28,472 INFO L93 Difference]: Finished difference Result 10133 states and 31245 transitions. [2019-12-07 18:46:28,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:46:28,472 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 75 [2019-12-07 18:46:28,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:28,483 INFO L225 Difference]: With dead ends: 10133 [2019-12-07 18:46:28,483 INFO L226 Difference]: Without dead ends: 10133 [2019-12-07 18:46:28,483 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 9 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=141, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:46:28,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10133 states. [2019-12-07 18:46:28,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10133 to 6461. [2019-12-07 18:46:28,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6461 states. [2019-12-07 18:46:28,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6461 states to 6461 states and 20321 transitions. [2019-12-07 18:46:28,575 INFO L78 Accepts]: Start accepts. Automaton has 6461 states and 20321 transitions. Word has length 75 [2019-12-07 18:46:28,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:28,575 INFO L462 AbstractCegarLoop]: Abstraction has 6461 states and 20321 transitions. [2019-12-07 18:46:28,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:46:28,576 INFO L276 IsEmpty]: Start isEmpty. Operand 6461 states and 20321 transitions. [2019-12-07 18:46:28,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-12-07 18:46:28,581 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:28,581 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:28,581 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:28,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:28,581 INFO L82 PathProgramCache]: Analyzing trace with hash -188626449, now seen corresponding path program 1 times [2019-12-07 18:46:28,581 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:28,582 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1124725792] [2019-12-07 18:46:28,582 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:28,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:28,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:28,617 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1124725792] [2019-12-07 18:46:28,617 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:28,617 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:28,617 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1907937239] [2019-12-07 18:46:28,617 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:28,617 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:28,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:28,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:28,618 INFO L87 Difference]: Start difference. First operand 6461 states and 20321 transitions. Second operand 3 states. [2019-12-07 18:46:28,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:28,654 INFO L93 Difference]: Finished difference Result 6460 states and 20319 transitions. [2019-12-07 18:46:28,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:28,655 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 76 [2019-12-07 18:46:28,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:28,662 INFO L225 Difference]: With dead ends: 6460 [2019-12-07 18:46:28,663 INFO L226 Difference]: Without dead ends: 6460 [2019-12-07 18:46:28,663 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:28,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6460 states. [2019-12-07 18:46:28,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6460 to 5543. [2019-12-07 18:46:28,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5543 states. [2019-12-07 18:46:28,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5543 states to 5543 states and 17573 transitions. [2019-12-07 18:46:28,732 INFO L78 Accepts]: Start accepts. Automaton has 5543 states and 17573 transitions. Word has length 76 [2019-12-07 18:46:28,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:28,732 INFO L462 AbstractCegarLoop]: Abstraction has 5543 states and 17573 transitions. [2019-12-07 18:46:28,732 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:28,732 INFO L276 IsEmpty]: Start isEmpty. Operand 5543 states and 17573 transitions. [2019-12-07 18:46:28,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-12-07 18:46:28,736 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:28,737 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:28,737 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:28,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:28,737 INFO L82 PathProgramCache]: Analyzing trace with hash -1308485714, now seen corresponding path program 1 times [2019-12-07 18:46:28,737 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:28,737 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [126718178] [2019-12-07 18:46:28,737 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:28,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:28,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:28,931 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [126718178] [2019-12-07 18:46:28,931 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:28,931 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 18:46:28,932 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1191554697] [2019-12-07 18:46:28,932 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:46:28,932 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:28,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:46:28,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:46:28,932 INFO L87 Difference]: Start difference. First operand 5543 states and 17573 transitions. Second operand 12 states. [2019-12-07 18:46:29,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:29,792 INFO L93 Difference]: Finished difference Result 14266 states and 41365 transitions. [2019-12-07 18:46:29,792 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 18:46:29,792 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 76 [2019-12-07 18:46:29,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:29,798 INFO L225 Difference]: With dead ends: 14266 [2019-12-07 18:46:29,798 INFO L226 Difference]: Without dead ends: 5202 [2019-12-07 18:46:29,798 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=152, Invalid=354, Unknown=0, NotChecked=0, Total=506 [2019-12-07 18:46:29,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5202 states. [2019-12-07 18:46:29,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5202 to 3277. [2019-12-07 18:46:29,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3277 states. [2019-12-07 18:46:29,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3277 states to 3277 states and 9095 transitions. [2019-12-07 18:46:29,840 INFO L78 Accepts]: Start accepts. Automaton has 3277 states and 9095 transitions. Word has length 76 [2019-12-07 18:46:29,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:29,840 INFO L462 AbstractCegarLoop]: Abstraction has 3277 states and 9095 transitions. [2019-12-07 18:46:29,840 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:46:29,840 INFO L276 IsEmpty]: Start isEmpty. Operand 3277 states and 9095 transitions. [2019-12-07 18:46:29,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-12-07 18:46:29,842 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:29,842 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:29,842 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:29,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:29,842 INFO L82 PathProgramCache]: Analyzing trace with hash -1912724826, now seen corresponding path program 2 times [2019-12-07 18:46:29,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:29,842 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [926632437] [2019-12-07 18:46:29,843 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:29,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:29,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:29,906 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [926632437] [2019-12-07 18:46:29,906 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:29,906 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:46:29,906 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1496331069] [2019-12-07 18:46:29,906 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:46:29,907 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:29,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:46:29,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:29,907 INFO L87 Difference]: Start difference. First operand 3277 states and 9095 transitions. Second operand 5 states. [2019-12-07 18:46:29,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:29,974 INFO L93 Difference]: Finished difference Result 5294 states and 13850 transitions. [2019-12-07 18:46:29,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:46:29,975 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 76 [2019-12-07 18:46:29,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:29,977 INFO L225 Difference]: With dead ends: 5294 [2019-12-07 18:46:29,977 INFO L226 Difference]: Without dead ends: 2292 [2019-12-07 18:46:29,977 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:29,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2292 states. [2019-12-07 18:46:29,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2292 to 1909. [2019-12-07 18:46:29,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1909 states. [2019-12-07 18:46:29,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1909 states to 1909 states and 4488 transitions. [2019-12-07 18:46:29,997 INFO L78 Accepts]: Start accepts. Automaton has 1909 states and 4488 transitions. Word has length 76 [2019-12-07 18:46:29,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:29,997 INFO L462 AbstractCegarLoop]: Abstraction has 1909 states and 4488 transitions. [2019-12-07 18:46:29,997 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:46:29,997 INFO L276 IsEmpty]: Start isEmpty. Operand 1909 states and 4488 transitions. [2019-12-07 18:46:29,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-12-07 18:46:29,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:29,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:29,998 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:29,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:29,999 INFO L82 PathProgramCache]: Analyzing trace with hash 1919819408, now seen corresponding path program 3 times [2019-12-07 18:46:29,999 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:29,999 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75902711] [2019-12-07 18:46:29,999 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:30,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:30,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:30,063 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [75902711] [2019-12-07 18:46:30,064 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:30,064 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:46:30,064 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2020174427] [2019-12-07 18:46:30,064 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:46:30,064 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:30,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:46:30,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:46:30,064 INFO L87 Difference]: Start difference. First operand 1909 states and 4488 transitions. Second operand 5 states. [2019-12-07 18:46:30,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:30,120 INFO L93 Difference]: Finished difference Result 2516 states and 6002 transitions. [2019-12-07 18:46:30,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:46:30,121 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 76 [2019-12-07 18:46:30,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:30,121 INFO L225 Difference]: With dead ends: 2516 [2019-12-07 18:46:30,121 INFO L226 Difference]: Without dead ends: 355 [2019-12-07 18:46:30,122 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:46:30,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2019-12-07 18:46:30,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 307. [2019-12-07 18:46:30,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307 states. [2019-12-07 18:46:30,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307 states to 307 states and 552 transitions. [2019-12-07 18:46:30,124 INFO L78 Accepts]: Start accepts. Automaton has 307 states and 552 transitions. Word has length 76 [2019-12-07 18:46:30,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:30,124 INFO L462 AbstractCegarLoop]: Abstraction has 307 states and 552 transitions. [2019-12-07 18:46:30,125 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:46:30,125 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 552 transitions. [2019-12-07 18:46:30,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-12-07 18:46:30,125 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:30,125 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:30,125 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:30,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:30,125 INFO L82 PathProgramCache]: Analyzing trace with hash -1721238743, now seen corresponding path program 1 times [2019-12-07 18:46:30,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:30,126 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351688581] [2019-12-07 18:46:30,126 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:30,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:30,158 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:30,158 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [351688581] [2019-12-07 18:46:30,158 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:30,158 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:46:30,158 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [586633442] [2019-12-07 18:46:30,159 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:46:30,159 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:30,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:46:30,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:30,159 INFO L87 Difference]: Start difference. First operand 307 states and 552 transitions. Second operand 3 states. [2019-12-07 18:46:30,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:30,167 INFO L93 Difference]: Finished difference Result 294 states and 509 transitions. [2019-12-07 18:46:30,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:46:30,167 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 76 [2019-12-07 18:46:30,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:30,168 INFO L225 Difference]: With dead ends: 294 [2019-12-07 18:46:30,168 INFO L226 Difference]: Without dead ends: 294 [2019-12-07 18:46:30,168 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:46:30,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2019-12-07 18:46:30,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 248. [2019-12-07 18:46:30,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2019-12-07 18:46:30,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 422 transitions. [2019-12-07 18:46:30,171 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 422 transitions. Word has length 76 [2019-12-07 18:46:30,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:30,172 INFO L462 AbstractCegarLoop]: Abstraction has 248 states and 422 transitions. [2019-12-07 18:46:30,172 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:46:30,172 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 422 transitions. [2019-12-07 18:46:30,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-07 18:46:30,172 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:30,172 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:30,173 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:30,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:30,173 INFO L82 PathProgramCache]: Analyzing trace with hash 1125574762, now seen corresponding path program 1 times [2019-12-07 18:46:30,173 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:30,173 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [391805583] [2019-12-07 18:46:30,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:30,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:46:30,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:46:30,309 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [391805583] [2019-12-07 18:46:30,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:46:30,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:46:30,310 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593127918] [2019-12-07 18:46:30,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:46:30,310 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:46:30,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:46:30,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:46:30,310 INFO L87 Difference]: Start difference. First operand 248 states and 422 transitions. Second operand 11 states. [2019-12-07 18:46:30,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:46:30,512 INFO L93 Difference]: Finished difference Result 397 states and 665 transitions. [2019-12-07 18:46:30,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 18:46:30,512 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 77 [2019-12-07 18:46:30,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:46:30,512 INFO L225 Difference]: With dead ends: 397 [2019-12-07 18:46:30,512 INFO L226 Difference]: Without dead ends: 366 [2019-12-07 18:46:30,513 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=270, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:46:30,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2019-12-07 18:46:30,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 356. [2019-12-07 18:46:30,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 356 states. [2019-12-07 18:46:30,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 356 states and 607 transitions. [2019-12-07 18:46:30,515 INFO L78 Accepts]: Start accepts. Automaton has 356 states and 607 transitions. Word has length 77 [2019-12-07 18:46:30,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:46:30,516 INFO L462 AbstractCegarLoop]: Abstraction has 356 states and 607 transitions. [2019-12-07 18:46:30,516 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:46:30,516 INFO L276 IsEmpty]: Start isEmpty. Operand 356 states and 607 transitions. [2019-12-07 18:46:30,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-07 18:46:30,516 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:46:30,516 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:46:30,516 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:46:30,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:46:30,516 INFO L82 PathProgramCache]: Analyzing trace with hash -1455854044, now seen corresponding path program 2 times [2019-12-07 18:46:30,516 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:46:30,517 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695508003] [2019-12-07 18:46:30,517 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:46:30,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:46:30,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:46:30,590 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:46:30,590 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:46:30,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1075] [1075] ULTIMATE.startENTRY-->L839: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t829~0.base_24| 4) |v_#length_29|) (= 0 v_~z$flush_delayed~0_273) (= v_~z$r_buff0_thd1~0_51 0) (= 0 v_~z$r_buff1_thd3~0_297) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t829~0.base_24| 1)) (= |v_#NULL.offset_6| 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t829~0.base_24|) (= v_~z$r_buff1_thd1~0_205 0) (= 0 |v_ULTIMATE.start_main_~#t829~0.offset_19|) (= 0 v_~z$r_buff1_thd4~0_383) (= v_~z$r_buff0_thd0~0_482 0) (= v_~main$tmp_guard0~0_25 0) (= v_~z$w_buff1~0_315 0) (= 0 v_~__unbuffered_p3_EBX~0_63) (= v_~z$read_delayed~0_6 0) (= v_~z$read_delayed_var~0.offset_7 0) (= 0 v_~z$r_buff0_thd4~0_518) (= 0 v_~__unbuffered_p3_EAX~0_73) (= v_~y~0_126 0) (= 0 |v_#NULL.base_6|) (= v_~z$w_buff0~0_383 0) (= 0 v_~x~0_106) (= 0 v_~z$mem_tmp~0_243) (= v_~z$r_buff0_thd2~0_50 0) (= v_~z~0_295 0) (= v_~z$read_delayed_var~0.base_7 0) (= 0 v_~z$r_buff0_thd3~0_133) (< 0 |v_#StackHeapBarrier_20|) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t829~0.base_24| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t829~0.base_24|) |v_ULTIMATE.start_main_~#t829~0.offset_19| 0)) |v_#memory_int_27|) (= v_~weak$$choice2~0_323 0) (= v_~main$tmp_guard1~0_64 0) (= v_~__unbuffered_cnt~0_220 0) (= v_~z$w_buff1_used~0_723 0) (= 0 v_~weak$$choice0~0_232) (= v_~z$w_buff0_used~0_1076 0) (= v_~a~0_53 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t829~0.base_24|)) (= v_~z$r_buff1_thd2~0_205 0) (= v_~z$r_buff1_thd0~0_494 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_28|, #length=|v_#length_30|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_205, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_76|, ULTIMATE.start_main_~#t832~0.offset=|v_ULTIMATE.start_main_~#t832~0.offset_14|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_94|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_52|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_44|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_41|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_42|, ~a~0=v_~a~0_53, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_95|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_482, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_518, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_73, #length=|v_#length_29|, ULTIMATE.start_main_#t~nondet48=|v_ULTIMATE.start_main_#t~nondet48_60|, ~z$mem_tmp~0=v_~z$mem_tmp~0_243, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_24|, ULTIMATE.start_main_~#t830~0.offset=|v_ULTIMATE.start_main_~#t830~0.offset_18|, ULTIMATE.start_main_~#t830~0.base=|v_ULTIMATE.start_main_~#t830~0.base_23|, ULTIMATE.start_main_#t~ite58=|v_ULTIMATE.start_main_#t~ite58_34|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_723, ~z$flush_delayed~0=v_~z$flush_delayed~0_273, ULTIMATE.start_main_#t~ite54=|v_ULTIMATE.start_main_#t~ite54_139|, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_60|, ULTIMATE.start_main_~#t831~0.base=|v_ULTIMATE.start_main_~#t831~0.base_23|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_226|, ~weak$$choice0~0=v_~weak$$choice0~0_232, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_154|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_205, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_133, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_220, ~x~0=v_~x~0_106, ULTIMATE.start_main_~#t829~0.base=|v_ULTIMATE.start_main_~#t829~0.base_24|, ULTIMATE.start_main_~#t832~0.base=|v_ULTIMATE.start_main_~#t832~0.base_16|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_383, ~z$read_delayed~0=v_~z$read_delayed~0_6, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_34|, ~z$w_buff1~0=v_~z$w_buff1~0_315, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_64, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_83|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_38|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_79|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_224|, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_50|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_494, ULTIMATE.start_main_~#t831~0.offset=|v_ULTIMATE.start_main_~#t831~0.offset_18|, ULTIMATE.start_main_~#t829~0.offset=|v_ULTIMATE.start_main_~#t829~0.offset_19|, ULTIMATE.start_main_#t~nondet49=|v_ULTIMATE.start_main_#t~nondet49_60|, ~y~0=v_~y~0_126, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_50, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_1076, ~z$w_buff0~0=v_~z$w_buff0~0_383, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_297, ULTIMATE.start_main_#t~ite57=|v_ULTIMATE.start_main_#t~ite57_70|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_41|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_63, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_133|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_53|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_147|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_55|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_295, ~weak$$choice2~0=v_~weak$$choice2~0_323, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_51} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t832~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite64, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_#t~nondet48, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t830~0.offset, ULTIMATE.start_main_~#t830~0.base, ULTIMATE.start_main_#t~ite58, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite54, ULTIMATE.start_main_#t~ite56, ULTIMATE.start_main_~#t831~0.base, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite61, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet38, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t829~0.base, ULTIMATE.start_main_~#t832~0.base, ~z$r_buff1_thd4~0, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite69, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite67, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite65, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_#t~ite70, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t831~0.offset, ULTIMATE.start_main_~#t829~0.offset, ULTIMATE.start_main_#t~nondet49, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet40, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite57, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite55, ULTIMATE.start_main_#t~ite62, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:46:30,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1035] [1035] L839-1-->L841: Formula: (and (= |v_ULTIMATE.start_main_~#t830~0.offset_9| 0) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t830~0.base_10| 1)) (= (select |v_#valid_42| |v_ULTIMATE.start_main_~#t830~0.base_10|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t830~0.base_10|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t830~0.base_10|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t830~0.base_10| 4) |v_#length_17|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t830~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t830~0.base_10|) |v_ULTIMATE.start_main_~#t830~0.offset_9| 1)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t830~0.offset=|v_ULTIMATE.start_main_~#t830~0.offset_9|, ULTIMATE.start_main_~#t830~0.base=|v_ULTIMATE.start_main_~#t830~0.base_10|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t830~0.offset, ULTIMATE.start_main_~#t830~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 18:46:30,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1041] [1041] L841-1-->L843: Formula: (and (= |v_ULTIMATE.start_main_~#t831~0.offset_10| 0) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t831~0.base_12| 4) |v_#length_19|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t831~0.base_12|)) (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t831~0.base_12| 1) |v_#valid_46|) (not (= |v_ULTIMATE.start_main_~#t831~0.base_12| 0)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t831~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t831~0.base_12|) |v_ULTIMATE.start_main_~#t831~0.offset_10| 2)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t831~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t831~0.offset=|v_ULTIMATE.start_main_~#t831~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t831~0.base=|v_ULTIMATE.start_main_~#t831~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t831~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t831~0.base] because there is no mapped edge [2019-12-07 18:46:30,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1055] [1055] L843-1-->L845: Formula: (and (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t832~0.base_13|) (= (store |v_#valid_53| |v_ULTIMATE.start_main_~#t832~0.base_13| 1) |v_#valid_52|) (= |v_ULTIMATE.start_main_~#t832~0.offset_11| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t832~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t832~0.base_13| 0)) (= 0 (select |v_#valid_53| |v_ULTIMATE.start_main_~#t832~0.base_13|)) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t832~0.base_13| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t832~0.base_13|) |v_ULTIMATE.start_main_~#t832~0.offset_11| 3)) |v_#memory_int_21|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ULTIMATE.start_main_~#t832~0.base=|v_ULTIMATE.start_main_~#t832~0.base_13|, #valid=|v_#valid_52|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t832~0.offset=|v_ULTIMATE.start_main_~#t832~0.offset_11|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t832~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t832~0.offset, #length] because there is no mapped edge [2019-12-07 18:46:30,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [959] [959] P3ENTRY-->L4-3: Formula: (and (= v_P3Thread1of1ForFork3_~arg.offset_4 |v_P3Thread1of1ForFork3_#in~arg.offset_6|) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6)) (= |v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4| v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6) (= v_~z$w_buff0~0_62 v_~z$w_buff1~0_45) (= v_~z$w_buff0_used~0_302 v_~z$w_buff1_used~0_154) (= 2 v_~z$w_buff0~0_61) (= |v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= (mod v_~z$w_buff0_used~0_301 256) 0)) (not (= (mod v_~z$w_buff1_used~0_154 256) 0)))) 1 0)) (= v_P3Thread1of1ForFork3_~arg.base_4 |v_P3Thread1of1ForFork3_#in~arg.base_6|) (= v_~z$w_buff0_used~0_301 1)) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_302, ~z$w_buff0~0=v_~z$w_buff0~0_62, P3Thread1of1ForFork3_#in~arg.offset=|v_P3Thread1of1ForFork3_#in~arg.offset_6|, P3Thread1of1ForFork3_#in~arg.base=|v_P3Thread1of1ForFork3_#in~arg.base_6|} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_301, ~z$w_buff0~0=v_~z$w_buff0~0_61, P3Thread1of1ForFork3_~arg.offset=v_P3Thread1of1ForFork3_~arg.offset_4, P3Thread1of1ForFork3_#in~arg.offset=|v_P3Thread1of1ForFork3_#in~arg.offset_6|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_154, ~z$w_buff1~0=v_~z$w_buff1~0_45, P3Thread1of1ForFork3___VERIFIER_assert_#in~expression=|v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4|, P3Thread1of1ForFork3_~arg.base=v_P3Thread1of1ForFork3_~arg.base_4, P3Thread1of1ForFork3_#in~arg.base=|v_P3Thread1of1ForFork3_#in~arg.base_6|} AuxVars[] AssignedVars[P3Thread1of1ForFork3___VERIFIER_assert_~expression, ~z$w_buff0_used~0, ~z$w_buff0~0, P3Thread1of1ForFork3_~arg.offset, ~z$w_buff1_used~0, ~z$w_buff1~0, P3Thread1of1ForFork3___VERIFIER_assert_#in~expression, P3Thread1of1ForFork3_~arg.base] because there is no mapped edge [2019-12-07 18:46:30,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1013] [1013] L801-2-->L801-5: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1635514998 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-1635514998 256))) (.cse2 (= |P3Thread1of1ForFork3_#t~ite12_Out-1635514998| |P3Thread1of1ForFork3_#t~ite11_Out-1635514998|))) (or (and (= |P3Thread1of1ForFork3_#t~ite11_Out-1635514998| ~z$w_buff0~0_In-1635514998) (not .cse0) (not .cse1) .cse2) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out-1635514998| ~z$w_buff1~0_In-1635514998) .cse2))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-1635514998, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1635514998, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1635514998, ~z$w_buff1~0=~z$w_buff1~0_In-1635514998} OutVars{~z$w_buff0~0=~z$w_buff0~0_In-1635514998, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1635514998, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-1635514998|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1635514998, ~z$w_buff1~0=~z$w_buff1~0_In-1635514998, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-1635514998|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12, P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 18:46:30,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [943] [943] L806-->L807: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_42 256))) (= v_~z$r_buff0_thd4~0_99 v_~z$r_buff0_thd4~0_100)) InVars {~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_42} OutVars{P3Thread1of1ForFork3_#t~ite27=|v_P3Thread1of1ForFork3_#t~ite27_7|, P3Thread1of1ForFork3_#t~ite26=|v_P3Thread1of1ForFork3_#t~ite26_5|, P3Thread1of1ForFork3_#t~ite25=|v_P3Thread1of1ForFork3_#t~ite25_9|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_42} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite27, P3Thread1of1ForFork3_#t~ite26, P3Thread1of1ForFork3_#t~ite25, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:46:30,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [993] [993] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~z$flush_delayed~0_In1514750140 256)))) (or (and (not .cse0) (= ~z$mem_tmp~0_In1514750140 |P3Thread1of1ForFork3_#t~ite31_Out1514750140|)) (and (= ~z~0_In1514750140 |P3Thread1of1ForFork3_#t~ite31_Out1514750140|) .cse0))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In1514750140, ~z$flush_delayed~0=~z$flush_delayed~0_In1514750140, ~z~0=~z~0_In1514750140} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In1514750140, ~z$flush_delayed~0=~z$flush_delayed~0_In1514750140, ~z~0=~z~0_In1514750140, P3Thread1of1ForFork3_#t~ite31=|P3Thread1of1ForFork3_#t~ite31_Out1514750140|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 18:46:30,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1043] [1043] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork0_~arg.base_16 |v_P0Thread1of1ForFork0_#in~arg.base_18|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_P0Thread1of1ForFork0_~arg.offset_16 |v_P0Thread1of1ForFork0_#in~arg.offset_18|) (= v_~a~0_21 1) (= v_~x~0_33 1) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_18|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} OutVars{~a~0=v_~a~0_21, P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_18|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_18|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_16, ~x~0=v_~x~0_33, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_16} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:46:30,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1054] [1054] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_12 |v_P1Thread1of1ForFork1_#in~arg.base_14|) (= v_~x~0_54 2) (= v_~y~0_83 1) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_140 (+ v_~__unbuffered_cnt~0_141 1)) (= |v_P1Thread1of1ForFork1_#in~arg.offset_14| v_P1Thread1of1ForFork1_~arg.offset_12) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_141} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_12, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_12, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_140, ~y~0=v_~y~0_83, ~x~0=v_~x~0_54, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:46:30,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1000] [1000] L770-2-->L770-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-537680033 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-537680033 256) 0)) (.cse2 (= |P2Thread1of1ForFork2_#t~ite3_Out-537680033| |P2Thread1of1ForFork2_#t~ite4_Out-537680033|))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite3_Out-537680033| ~z$w_buff1~0_In-537680033) .cse2) (and (or .cse1 .cse0) .cse2 (= ~z~0_In-537680033 |P2Thread1of1ForFork2_#t~ite3_Out-537680033|)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-537680033, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-537680033, ~z$w_buff1~0=~z$w_buff1~0_In-537680033, ~z~0=~z~0_In-537680033} OutVars{P2Thread1of1ForFork2_#t~ite4=|P2Thread1of1ForFork2_#t~ite4_Out-537680033|, P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-537680033|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-537680033, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-537680033, ~z$w_buff1~0=~z$w_buff1~0_In-537680033, ~z~0=~z~0_In-537680033} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 18:46:30,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [989] [989] L771-->L771-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1969519825 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1969519825 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out-1969519825|)) (and (= ~z$w_buff0_used~0_In-1969519825 |P2Thread1of1ForFork2_#t~ite5_Out-1969519825|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1969519825, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1969519825} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1969519825|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1969519825, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1969519825} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:46:30,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1002] [1002] L772-->L772-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In792472507 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In792472507 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In792472507 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In792472507 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite6_Out792472507|)) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In792472507 |P2Thread1of1ForFork2_#t~ite6_Out792472507|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In792472507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In792472507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In792472507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In792472507} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out792472507|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In792472507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In792472507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In792472507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In792472507} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:46:30,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1008] [1008] L773-->L773-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1755511818 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1755511818 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite7_Out-1755511818| ~z$r_buff0_thd3~0_In-1755511818) (or .cse0 .cse1)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite7_Out-1755511818| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1755511818, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1755511818} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1755511818, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1755511818, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-1755511818|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:46:30,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1001] [1001] L774-->L774-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1841572984 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1841572984 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In1841572984 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In1841572984 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In1841572984 |P2Thread1of1ForFork2_#t~ite8_Out1841572984|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite8_Out1841572984|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1841572984, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1841572984, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1841572984, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1841572984} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1841572984, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1841572984, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1841572984, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1841572984, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1841572984|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:46:30,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1050] [1050] L774-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_111 1) v_~__unbuffered_cnt~0_110) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_52| v_~z$r_buff1_thd3~0_177)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_52|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_177, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_110, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_51|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:46:30,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1005] [1005] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd4~0_In1982365995 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1982365995 256) 0))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite34_Out1982365995| ~z$w_buff0_used~0_In1982365995)) (and (not .cse1) (not .cse0) (= |P3Thread1of1ForFork3_#t~ite34_Out1982365995| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1982365995, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1982365995} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1982365995, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1982365995, P3Thread1of1ForFork3_#t~ite34=|P3Thread1of1ForFork3_#t~ite34_Out1982365995|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite34] because there is no mapped edge [2019-12-07 18:46:30,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [999] [999] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd4~0_In985971616 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In985971616 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In985971616 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In985971616 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork3_#t~ite35_Out985971616| 0)) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork3_#t~ite35_Out985971616| ~z$w_buff1_used~0_In985971616) (or .cse2 .cse3)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In985971616, ~z$w_buff0_used~0=~z$w_buff0_used~0_In985971616, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In985971616, ~z$w_buff1_used~0=~z$w_buff1_used~0_In985971616} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In985971616, ~z$w_buff0_used~0=~z$w_buff0_used~0_In985971616, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In985971616, ~z$w_buff1_used~0=~z$w_buff1_used~0_In985971616, P3Thread1of1ForFork3_#t~ite35=|P3Thread1of1ForFork3_#t~ite35_Out985971616|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite35] because there is no mapped edge [2019-12-07 18:46:30,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1004] [1004] L819-->L820: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd4~0_In-87118524 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-87118524 256) 0)) (.cse1 (= ~z$r_buff0_thd4~0_In-87118524 ~z$r_buff0_thd4~0_Out-87118524))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= 0 ~z$r_buff0_thd4~0_Out-87118524)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-87118524, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-87118524} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-87118524, P3Thread1of1ForFork3_#t~ite36=|P3Thread1of1ForFork3_#t~ite36_Out-87118524|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-87118524} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite36, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:46:30,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [997] [997] L820-->L820-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1542357470 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd4~0_In-1542357470 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1542357470 256))) (.cse0 (= (mod ~z$r_buff0_thd4~0_In-1542357470 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork3_#t~ite37_Out-1542357470|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd4~0_In-1542357470 |P3Thread1of1ForFork3_#t~ite37_Out-1542357470|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1542357470, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1542357470, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1542357470, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1542357470} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1542357470, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1542357470, P3Thread1of1ForFork3_#t~ite37=|P3Thread1of1ForFork3_#t~ite37_Out-1542357470|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1542357470, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1542357470} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite37] because there is no mapped edge [2019-12-07 18:46:30,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1052] [1052] L820-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_134 (+ v_~__unbuffered_cnt~0_135 1)) (= |v_P3Thread1of1ForFork3_#t~ite37_50| v_~z$r_buff1_thd4~0_255) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite37=|v_P3Thread1of1ForFork3_#t~ite37_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_135} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_255, P3Thread1of1ForFork3_#t~ite37=|v_P3Thread1of1ForFork3_#t~ite37_49|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_134, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite37, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:46:30,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [916] [916] L845-1-->L851: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:46:30,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [991] [991] L851-2-->L851-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1697030895 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1697030895 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite42_Out-1697030895| ~z$w_buff1~0_In-1697030895)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite42_Out-1697030895| ~z~0_In-1697030895)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1697030895, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1697030895, ~z$w_buff1~0=~z$w_buff1~0_In-1697030895, ~z~0=~z~0_In-1697030895} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1697030895, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1697030895, ~z$w_buff1~0=~z$w_buff1~0_In-1697030895, ~z~0=~z~0_In-1697030895, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1697030895|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:46:30,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [971] [971] L851-4-->L852: Formula: (= v_~z~0_85 |v_ULTIMATE.start_main_#t~ite42_10|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_10|} OutVars{~z~0=v_~z~0_85, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_13|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[~z~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:46:30,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1003] [1003] L852-->L852-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-2039829604 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-2039829604 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite44_Out-2039829604|)) (and (= |ULTIMATE.start_main_#t~ite44_Out-2039829604| ~z$w_buff0_used~0_In-2039829604) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2039829604, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2039829604} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2039829604, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2039829604, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-2039829604|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:46:30,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1006] [1006] L853-->L853-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In-1495856521 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1495856521 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-1495856521 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1495856521 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite45_Out-1495856521|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-1495856521 |ULTIMATE.start_main_#t~ite45_Out-1495856521|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1495856521, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1495856521, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1495856521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1495856521} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1495856521, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1495856521, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1495856521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1495856521, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1495856521|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:46:30,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [994] [994] L854-->L854-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In748123984 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In748123984 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In748123984 |ULTIMATE.start_main_#t~ite46_Out748123984|)) (and (= |ULTIMATE.start_main_#t~ite46_Out748123984| 0) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In748123984, ~z$w_buff0_used~0=~z$w_buff0_used~0_In748123984} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In748123984, ~z$w_buff0_used~0=~z$w_buff0_used~0_In748123984, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out748123984|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:46:30,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1014] [1014] L855-->L855-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1946497253 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1946497253 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In1946497253 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd0~0_In1946497253 256) 0))) (or (and (= ~z$r_buff1_thd0~0_In1946497253 |ULTIMATE.start_main_#t~ite47_Out1946497253|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite47_Out1946497253|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1946497253, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1946497253, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1946497253, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1946497253} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1946497253, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1946497253, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1946497253, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1946497253|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1946497253} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:46:30,611 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1009] [1009] L870-->L870-2: Formula: (let ((.cse0 (= 0 (mod ~z$flush_delayed~0_In1098488835 256)))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite70_Out1098488835| ~z~0_In1098488835)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite70_Out1098488835| ~z$mem_tmp~0_In1098488835)))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In1098488835, ~z$flush_delayed~0=~z$flush_delayed~0_In1098488835, ~z~0=~z~0_In1098488835} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In1098488835, ULTIMATE.start_main_#t~ite70=|ULTIMATE.start_main_#t~ite70_Out1098488835|, ~z$flush_delayed~0=~z$flush_delayed~0_In1098488835, ~z~0=~z~0_In1098488835} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite70] because there is no mapped edge [2019-12-07 18:46:30,611 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1070] [1070] L870-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= 0 v_~z$flush_delayed~0_270) (= v_~z~0_292 |v_ULTIMATE.start_main_#t~ite70_48|) (= (mod v_~main$tmp_guard1~0_61 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_48|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_61} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_61, ~z$flush_delayed~0=v_~z$flush_delayed~0_270, ~z~0=v_~z~0_292, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite70, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:46:30,681 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:46:30 BasicIcfg [2019-12-07 18:46:30,681 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:46:30,681 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:46:30,681 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:46:30,682 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:46:30,682 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:45:26" (3/4) ... [2019-12-07 18:46:30,683 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:46:30,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1075] [1075] ULTIMATE.startENTRY-->L839: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t829~0.base_24| 4) |v_#length_29|) (= 0 v_~z$flush_delayed~0_273) (= v_~z$r_buff0_thd1~0_51 0) (= 0 v_~z$r_buff1_thd3~0_297) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t829~0.base_24| 1)) (= |v_#NULL.offset_6| 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t829~0.base_24|) (= v_~z$r_buff1_thd1~0_205 0) (= 0 |v_ULTIMATE.start_main_~#t829~0.offset_19|) (= 0 v_~z$r_buff1_thd4~0_383) (= v_~z$r_buff0_thd0~0_482 0) (= v_~main$tmp_guard0~0_25 0) (= v_~z$w_buff1~0_315 0) (= 0 v_~__unbuffered_p3_EBX~0_63) (= v_~z$read_delayed~0_6 0) (= v_~z$read_delayed_var~0.offset_7 0) (= 0 v_~z$r_buff0_thd4~0_518) (= 0 v_~__unbuffered_p3_EAX~0_73) (= v_~y~0_126 0) (= 0 |v_#NULL.base_6|) (= v_~z$w_buff0~0_383 0) (= 0 v_~x~0_106) (= 0 v_~z$mem_tmp~0_243) (= v_~z$r_buff0_thd2~0_50 0) (= v_~z~0_295 0) (= v_~z$read_delayed_var~0.base_7 0) (= 0 v_~z$r_buff0_thd3~0_133) (< 0 |v_#StackHeapBarrier_20|) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t829~0.base_24| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t829~0.base_24|) |v_ULTIMATE.start_main_~#t829~0.offset_19| 0)) |v_#memory_int_27|) (= v_~weak$$choice2~0_323 0) (= v_~main$tmp_guard1~0_64 0) (= v_~__unbuffered_cnt~0_220 0) (= v_~z$w_buff1_used~0_723 0) (= 0 v_~weak$$choice0~0_232) (= v_~z$w_buff0_used~0_1076 0) (= v_~a~0_53 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t829~0.base_24|)) (= v_~z$r_buff1_thd2~0_205 0) (= v_~z$r_buff1_thd0~0_494 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_28|, #length=|v_#length_30|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_205, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_76|, ULTIMATE.start_main_~#t832~0.offset=|v_ULTIMATE.start_main_~#t832~0.offset_14|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite68=|v_ULTIMATE.start_main_#t~ite68_94|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite66=|v_ULTIMATE.start_main_#t~ite66_52|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_44|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_41|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_42|, ~a~0=v_~a~0_53, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_95|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_482, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_518, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_73, #length=|v_#length_29|, ULTIMATE.start_main_#t~nondet48=|v_ULTIMATE.start_main_#t~nondet48_60|, ~z$mem_tmp~0=v_~z$mem_tmp~0_243, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_24|, ULTIMATE.start_main_~#t830~0.offset=|v_ULTIMATE.start_main_~#t830~0.offset_18|, ULTIMATE.start_main_~#t830~0.base=|v_ULTIMATE.start_main_~#t830~0.base_23|, ULTIMATE.start_main_#t~ite58=|v_ULTIMATE.start_main_#t~ite58_34|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_723, ~z$flush_delayed~0=v_~z$flush_delayed~0_273, ULTIMATE.start_main_#t~ite54=|v_ULTIMATE.start_main_#t~ite54_139|, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_60|, ULTIMATE.start_main_~#t831~0.base=|v_ULTIMATE.start_main_~#t831~0.base_23|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_226|, ~weak$$choice0~0=v_~weak$$choice0~0_232, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_154|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_205, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_133, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_220, ~x~0=v_~x~0_106, ULTIMATE.start_main_~#t829~0.base=|v_ULTIMATE.start_main_~#t829~0.base_24|, ULTIMATE.start_main_~#t832~0.base=|v_ULTIMATE.start_main_~#t832~0.base_16|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_383, ~z$read_delayed~0=v_~z$read_delayed~0_6, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_34|, ~z$w_buff1~0=v_~z$w_buff1~0_315, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_64, ULTIMATE.start_main_#t~ite69=|v_ULTIMATE.start_main_#t~ite69_83|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_38|, ULTIMATE.start_main_#t~ite67=|v_ULTIMATE.start_main_#t~ite67_79|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_224|, ULTIMATE.start_main_#t~ite65=|v_ULTIMATE.start_main_#t~ite65_50|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_494, ULTIMATE.start_main_~#t831~0.offset=|v_ULTIMATE.start_main_~#t831~0.offset_18|, ULTIMATE.start_main_~#t829~0.offset=|v_ULTIMATE.start_main_~#t829~0.offset_19|, ULTIMATE.start_main_#t~nondet49=|v_ULTIMATE.start_main_#t~nondet49_60|, ~y~0=v_~y~0_126, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_50, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_1076, ~z$w_buff0~0=v_~z$w_buff0~0_383, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_297, ULTIMATE.start_main_#t~ite57=|v_ULTIMATE.start_main_#t~ite57_70|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_41|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_63, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_133|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_53|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_147|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_55|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_295, ~weak$$choice2~0=v_~weak$$choice2~0_323, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_51} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t832~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite68, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite66, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite64, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_#t~nondet48, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t830~0.offset, ULTIMATE.start_main_~#t830~0.base, ULTIMATE.start_main_#t~ite58, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite54, ULTIMATE.start_main_#t~ite56, ULTIMATE.start_main_~#t831~0.base, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite61, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet38, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t829~0.base, ULTIMATE.start_main_~#t832~0.base, ~z$r_buff1_thd4~0, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite69, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite67, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite65, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_#t~ite70, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t831~0.offset, ULTIMATE.start_main_~#t829~0.offset, ULTIMATE.start_main_#t~nondet49, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet40, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite57, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite55, ULTIMATE.start_main_#t~ite62, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:46:30,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1035] [1035] L839-1-->L841: Formula: (and (= |v_ULTIMATE.start_main_~#t830~0.offset_9| 0) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t830~0.base_10| 1)) (= (select |v_#valid_42| |v_ULTIMATE.start_main_~#t830~0.base_10|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t830~0.base_10|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t830~0.base_10|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t830~0.base_10| 4) |v_#length_17|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t830~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t830~0.base_10|) |v_ULTIMATE.start_main_~#t830~0.offset_9| 1)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t830~0.offset=|v_ULTIMATE.start_main_~#t830~0.offset_9|, ULTIMATE.start_main_~#t830~0.base=|v_ULTIMATE.start_main_~#t830~0.base_10|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t830~0.offset, ULTIMATE.start_main_~#t830~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 18:46:30,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1041] [1041] L841-1-->L843: Formula: (and (= |v_ULTIMATE.start_main_~#t831~0.offset_10| 0) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t831~0.base_12| 4) |v_#length_19|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t831~0.base_12|)) (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t831~0.base_12| 1) |v_#valid_46|) (not (= |v_ULTIMATE.start_main_~#t831~0.base_12| 0)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t831~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t831~0.base_12|) |v_ULTIMATE.start_main_~#t831~0.offset_10| 2)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t831~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t831~0.offset=|v_ULTIMATE.start_main_~#t831~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t831~0.base=|v_ULTIMATE.start_main_~#t831~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t831~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t831~0.base] because there is no mapped edge [2019-12-07 18:46:30,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1055] [1055] L843-1-->L845: Formula: (and (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t832~0.base_13|) (= (store |v_#valid_53| |v_ULTIMATE.start_main_~#t832~0.base_13| 1) |v_#valid_52|) (= |v_ULTIMATE.start_main_~#t832~0.offset_11| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t832~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t832~0.base_13| 0)) (= 0 (select |v_#valid_53| |v_ULTIMATE.start_main_~#t832~0.base_13|)) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t832~0.base_13| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t832~0.base_13|) |v_ULTIMATE.start_main_~#t832~0.offset_11| 3)) |v_#memory_int_21|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ULTIMATE.start_main_~#t832~0.base=|v_ULTIMATE.start_main_~#t832~0.base_13|, #valid=|v_#valid_52|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t832~0.offset=|v_ULTIMATE.start_main_~#t832~0.offset_11|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t832~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t832~0.offset, #length] because there is no mapped edge [2019-12-07 18:46:30,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [959] [959] P3ENTRY-->L4-3: Formula: (and (= v_P3Thread1of1ForFork3_~arg.offset_4 |v_P3Thread1of1ForFork3_#in~arg.offset_6|) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6)) (= |v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4| v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6) (= v_~z$w_buff0~0_62 v_~z$w_buff1~0_45) (= v_~z$w_buff0_used~0_302 v_~z$w_buff1_used~0_154) (= 2 v_~z$w_buff0~0_61) (= |v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= (mod v_~z$w_buff0_used~0_301 256) 0)) (not (= (mod v_~z$w_buff1_used~0_154 256) 0)))) 1 0)) (= v_P3Thread1of1ForFork3_~arg.base_4 |v_P3Thread1of1ForFork3_#in~arg.base_6|) (= v_~z$w_buff0_used~0_301 1)) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_302, ~z$w_buff0~0=v_~z$w_buff0~0_62, P3Thread1of1ForFork3_#in~arg.offset=|v_P3Thread1of1ForFork3_#in~arg.offset_6|, P3Thread1of1ForFork3_#in~arg.base=|v_P3Thread1of1ForFork3_#in~arg.base_6|} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_301, ~z$w_buff0~0=v_~z$w_buff0~0_61, P3Thread1of1ForFork3_~arg.offset=v_P3Thread1of1ForFork3_~arg.offset_4, P3Thread1of1ForFork3_#in~arg.offset=|v_P3Thread1of1ForFork3_#in~arg.offset_6|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_154, ~z$w_buff1~0=v_~z$w_buff1~0_45, P3Thread1of1ForFork3___VERIFIER_assert_#in~expression=|v_P3Thread1of1ForFork3___VERIFIER_assert_#in~expression_4|, P3Thread1of1ForFork3_~arg.base=v_P3Thread1of1ForFork3_~arg.base_4, P3Thread1of1ForFork3_#in~arg.base=|v_P3Thread1of1ForFork3_#in~arg.base_6|} AuxVars[] AssignedVars[P3Thread1of1ForFork3___VERIFIER_assert_~expression, ~z$w_buff0_used~0, ~z$w_buff0~0, P3Thread1of1ForFork3_~arg.offset, ~z$w_buff1_used~0, ~z$w_buff1~0, P3Thread1of1ForFork3___VERIFIER_assert_#in~expression, P3Thread1of1ForFork3_~arg.base] because there is no mapped edge [2019-12-07 18:46:30,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1013] [1013] L801-2-->L801-5: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1635514998 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-1635514998 256))) (.cse2 (= |P3Thread1of1ForFork3_#t~ite12_Out-1635514998| |P3Thread1of1ForFork3_#t~ite11_Out-1635514998|))) (or (and (= |P3Thread1of1ForFork3_#t~ite11_Out-1635514998| ~z$w_buff0~0_In-1635514998) (not .cse0) (not .cse1) .cse2) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out-1635514998| ~z$w_buff1~0_In-1635514998) .cse2))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-1635514998, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1635514998, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1635514998, ~z$w_buff1~0=~z$w_buff1~0_In-1635514998} OutVars{~z$w_buff0~0=~z$w_buff0~0_In-1635514998, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1635514998, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-1635514998|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1635514998, ~z$w_buff1~0=~z$w_buff1~0_In-1635514998, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-1635514998|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12, P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 18:46:30,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [943] [943] L806-->L807: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_42 256))) (= v_~z$r_buff0_thd4~0_99 v_~z$r_buff0_thd4~0_100)) InVars {~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_42} OutVars{P3Thread1of1ForFork3_#t~ite27=|v_P3Thread1of1ForFork3_#t~ite27_7|, P3Thread1of1ForFork3_#t~ite26=|v_P3Thread1of1ForFork3_#t~ite26_5|, P3Thread1of1ForFork3_#t~ite25=|v_P3Thread1of1ForFork3_#t~ite25_9|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_42} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite27, P3Thread1of1ForFork3_#t~ite26, P3Thread1of1ForFork3_#t~ite25, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:46:30,689 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [993] [993] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~z$flush_delayed~0_In1514750140 256)))) (or (and (not .cse0) (= ~z$mem_tmp~0_In1514750140 |P3Thread1of1ForFork3_#t~ite31_Out1514750140|)) (and (= ~z~0_In1514750140 |P3Thread1of1ForFork3_#t~ite31_Out1514750140|) .cse0))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In1514750140, ~z$flush_delayed~0=~z$flush_delayed~0_In1514750140, ~z~0=~z~0_In1514750140} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In1514750140, ~z$flush_delayed~0=~z$flush_delayed~0_In1514750140, ~z~0=~z~0_In1514750140, P3Thread1of1ForFork3_#t~ite31=|P3Thread1of1ForFork3_#t~ite31_Out1514750140|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 18:46:30,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1043] [1043] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork0_~arg.base_16 |v_P0Thread1of1ForFork0_#in~arg.base_18|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_P0Thread1of1ForFork0_~arg.offset_16 |v_P0Thread1of1ForFork0_#in~arg.offset_18|) (= v_~a~0_21 1) (= v_~x~0_33 1) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_18|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} OutVars{~a~0=v_~a~0_21, P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_18|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_18|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_16, ~x~0=v_~x~0_33, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_16} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:46:30,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1054] [1054] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_12 |v_P1Thread1of1ForFork1_#in~arg.base_14|) (= v_~x~0_54 2) (= v_~y~0_83 1) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_140 (+ v_~__unbuffered_cnt~0_141 1)) (= |v_P1Thread1of1ForFork1_#in~arg.offset_14| v_P1Thread1of1ForFork1_~arg.offset_12) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_141} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_12, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_12, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_14|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_140, ~y~0=v_~y~0_83, ~x~0=v_~x~0_54, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:46:30,691 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1000] [1000] L770-2-->L770-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-537680033 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-537680033 256) 0)) (.cse2 (= |P2Thread1of1ForFork2_#t~ite3_Out-537680033| |P2Thread1of1ForFork2_#t~ite4_Out-537680033|))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite3_Out-537680033| ~z$w_buff1~0_In-537680033) .cse2) (and (or .cse1 .cse0) .cse2 (= ~z~0_In-537680033 |P2Thread1of1ForFork2_#t~ite3_Out-537680033|)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-537680033, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-537680033, ~z$w_buff1~0=~z$w_buff1~0_In-537680033, ~z~0=~z~0_In-537680033} OutVars{P2Thread1of1ForFork2_#t~ite4=|P2Thread1of1ForFork2_#t~ite4_Out-537680033|, P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-537680033|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-537680033, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-537680033, ~z$w_buff1~0=~z$w_buff1~0_In-537680033, ~z~0=~z~0_In-537680033} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 18:46:30,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [989] [989] L771-->L771-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1969519825 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1969519825 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out-1969519825|)) (and (= ~z$w_buff0_used~0_In-1969519825 |P2Thread1of1ForFork2_#t~ite5_Out-1969519825|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1969519825, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1969519825} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1969519825|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1969519825, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1969519825} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:46:30,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1002] [1002] L772-->L772-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In792472507 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In792472507 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In792472507 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In792472507 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite6_Out792472507|)) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In792472507 |P2Thread1of1ForFork2_#t~ite6_Out792472507|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In792472507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In792472507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In792472507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In792472507} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out792472507|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In792472507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In792472507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In792472507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In792472507} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:46:30,692 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1008] [1008] L773-->L773-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1755511818 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1755511818 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite7_Out-1755511818| ~z$r_buff0_thd3~0_In-1755511818) (or .cse0 .cse1)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite7_Out-1755511818| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1755511818, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1755511818} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1755511818, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1755511818, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-1755511818|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:46:30,693 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1001] [1001] L774-->L774-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1841572984 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1841572984 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In1841572984 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In1841572984 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In1841572984 |P2Thread1of1ForFork2_#t~ite8_Out1841572984|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite8_Out1841572984|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1841572984, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1841572984, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1841572984, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1841572984} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1841572984, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1841572984, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1841572984, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1841572984, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1841572984|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:46:30,693 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1050] [1050] L774-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_111 1) v_~__unbuffered_cnt~0_110) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_52| v_~z$r_buff1_thd3~0_177)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_52|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_177, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_110, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_51|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:46:30,693 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1005] [1005] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd4~0_In1982365995 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1982365995 256) 0))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite34_Out1982365995| ~z$w_buff0_used~0_In1982365995)) (and (not .cse1) (not .cse0) (= |P3Thread1of1ForFork3_#t~ite34_Out1982365995| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1982365995, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1982365995} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1982365995, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1982365995, P3Thread1of1ForFork3_#t~ite34=|P3Thread1of1ForFork3_#t~ite34_Out1982365995|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite34] because there is no mapped edge [2019-12-07 18:46:30,693 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [999] [999] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd4~0_In985971616 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In985971616 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In985971616 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In985971616 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork3_#t~ite35_Out985971616| 0)) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork3_#t~ite35_Out985971616| ~z$w_buff1_used~0_In985971616) (or .cse2 .cse3)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In985971616, ~z$w_buff0_used~0=~z$w_buff0_used~0_In985971616, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In985971616, ~z$w_buff1_used~0=~z$w_buff1_used~0_In985971616} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In985971616, ~z$w_buff0_used~0=~z$w_buff0_used~0_In985971616, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In985971616, ~z$w_buff1_used~0=~z$w_buff1_used~0_In985971616, P3Thread1of1ForFork3_#t~ite35=|P3Thread1of1ForFork3_#t~ite35_Out985971616|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite35] because there is no mapped edge [2019-12-07 18:46:30,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1004] [1004] L819-->L820: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd4~0_In-87118524 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-87118524 256) 0)) (.cse1 (= ~z$r_buff0_thd4~0_In-87118524 ~z$r_buff0_thd4~0_Out-87118524))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= 0 ~z$r_buff0_thd4~0_Out-87118524)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-87118524, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-87118524} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-87118524, P3Thread1of1ForFork3_#t~ite36=|P3Thread1of1ForFork3_#t~ite36_Out-87118524|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-87118524} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite36, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 18:46:30,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [997] [997] L820-->L820-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1542357470 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd4~0_In-1542357470 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1542357470 256))) (.cse0 (= (mod ~z$r_buff0_thd4~0_In-1542357470 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork3_#t~ite37_Out-1542357470|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd4~0_In-1542357470 |P3Thread1of1ForFork3_#t~ite37_Out-1542357470|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1542357470, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1542357470, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1542357470, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1542357470} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1542357470, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1542357470, P3Thread1of1ForFork3_#t~ite37=|P3Thread1of1ForFork3_#t~ite37_Out-1542357470|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1542357470, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1542357470} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite37] because there is no mapped edge [2019-12-07 18:46:30,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1052] [1052] L820-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_134 (+ v_~__unbuffered_cnt~0_135 1)) (= |v_P3Thread1of1ForFork3_#t~ite37_50| v_~z$r_buff1_thd4~0_255) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite37=|v_P3Thread1of1ForFork3_#t~ite37_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_135} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_255, P3Thread1of1ForFork3_#t~ite37=|v_P3Thread1of1ForFork3_#t~ite37_49|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_134, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite37, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:46:30,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [916] [916] L845-1-->L851: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:46:30,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [991] [991] L851-2-->L851-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1697030895 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1697030895 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite42_Out-1697030895| ~z$w_buff1~0_In-1697030895)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite42_Out-1697030895| ~z~0_In-1697030895)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1697030895, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1697030895, ~z$w_buff1~0=~z$w_buff1~0_In-1697030895, ~z~0=~z~0_In-1697030895} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1697030895, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1697030895, ~z$w_buff1~0=~z$w_buff1~0_In-1697030895, ~z~0=~z~0_In-1697030895, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1697030895|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:46:30,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [971] [971] L851-4-->L852: Formula: (= v_~z~0_85 |v_ULTIMATE.start_main_#t~ite42_10|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_10|} OutVars{~z~0=v_~z~0_85, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_13|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[~z~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:46:30,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1003] [1003] L852-->L852-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-2039829604 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-2039829604 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite44_Out-2039829604|)) (and (= |ULTIMATE.start_main_#t~ite44_Out-2039829604| ~z$w_buff0_used~0_In-2039829604) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2039829604, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2039829604} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2039829604, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2039829604, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-2039829604|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:46:30,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1006] [1006] L853-->L853-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In-1495856521 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1495856521 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-1495856521 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1495856521 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite45_Out-1495856521|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-1495856521 |ULTIMATE.start_main_#t~ite45_Out-1495856521|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1495856521, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1495856521, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1495856521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1495856521} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1495856521, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1495856521, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1495856521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1495856521, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1495856521|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:46:30,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [994] [994] L854-->L854-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In748123984 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In748123984 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In748123984 |ULTIMATE.start_main_#t~ite46_Out748123984|)) (and (= |ULTIMATE.start_main_#t~ite46_Out748123984| 0) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In748123984, ~z$w_buff0_used~0=~z$w_buff0_used~0_In748123984} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In748123984, ~z$w_buff0_used~0=~z$w_buff0_used~0_In748123984, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out748123984|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:46:30,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1014] [1014] L855-->L855-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In1946497253 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1946497253 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In1946497253 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd0~0_In1946497253 256) 0))) (or (and (= ~z$r_buff1_thd0~0_In1946497253 |ULTIMATE.start_main_#t~ite47_Out1946497253|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite47_Out1946497253|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1946497253, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1946497253, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1946497253, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1946497253} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1946497253, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1946497253, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1946497253, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1946497253|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1946497253} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:46:30,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1009] [1009] L870-->L870-2: Formula: (let ((.cse0 (= 0 (mod ~z$flush_delayed~0_In1098488835 256)))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite70_Out1098488835| ~z~0_In1098488835)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite70_Out1098488835| ~z$mem_tmp~0_In1098488835)))) InVars {~z$mem_tmp~0=~z$mem_tmp~0_In1098488835, ~z$flush_delayed~0=~z$flush_delayed~0_In1098488835, ~z~0=~z~0_In1098488835} OutVars{~z$mem_tmp~0=~z$mem_tmp~0_In1098488835, ULTIMATE.start_main_#t~ite70=|ULTIMATE.start_main_#t~ite70_Out1098488835|, ~z$flush_delayed~0=~z$flush_delayed~0_In1098488835, ~z~0=~z~0_In1098488835} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite70] because there is no mapped edge [2019-12-07 18:46:30,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1070] [1070] L870-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= 0 v_~z$flush_delayed~0_270) (= v_~z~0_292 |v_ULTIMATE.start_main_#t~ite70_48|) (= (mod v_~main$tmp_guard1~0_61 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_48|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_61} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ULTIMATE.start_main_#t~ite70=|v_ULTIMATE.start_main_#t~ite70_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_61, ~z$flush_delayed~0=v_~z$flush_delayed~0_270, ~z~0=v_~z~0_292, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite70, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:46:30,766 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_48837228-c340-483b-8893-b51e455632c6/bin/uautomizer/witness.graphml [2019-12-07 18:46:30,767 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:46:30,768 INFO L168 Benchmark]: Toolchain (without parser) took 64748.92 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 6.0 GB). Free memory was 934.0 MB in the beginning and 3.4 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. [2019-12-07 18:46:30,768 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:46:30,768 INFO L168 Benchmark]: CACSL2BoogieTranslator took 406.00 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 104.3 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -131.2 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:30,768 INFO L168 Benchmark]: Boogie Procedure Inliner took 45.62 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:46:30,769 INFO L168 Benchmark]: Boogie Preprocessor took 30.49 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:30,769 INFO L168 Benchmark]: RCFGBuilder took 489.70 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 988.3 MB in the end (delta: 71.6 MB). Peak memory consumption was 71.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:30,769 INFO L168 Benchmark]: TraceAbstraction took 63688.83 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 988.3 MB in the beginning and 3.5 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2019-12-07 18:46:30,769 INFO L168 Benchmark]: Witness Printer took 85.24 ms. Allocated memory is still 7.0 GB. Free memory was 3.5 GB in the beginning and 3.4 GB in the end (delta: 50.6 MB). Peak memory consumption was 50.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:46:30,771 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 406.00 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 104.3 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -131.2 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 45.62 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 30.49 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 489.70 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 988.3 MB in the end (delta: 71.6 MB). Peak memory consumption was 71.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 63688.83 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 988.3 MB in the beginning and 3.5 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. * Witness Printer took 85.24 ms. Allocated memory is still 7.0 GB. Free memory was 3.5 GB in the beginning and 3.4 GB in the end (delta: 50.6 MB). Peak memory consumption was 50.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.0s, 221 ProgramPointsBefore, 122 ProgramPointsAfterwards, 270 TransitionsBefore, 142 TransitionsAfterwards, 28796 CoEnabledTransitionPairs, 7 FixpointIterations, 35 TrivialSequentialCompositions, 46 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 52 ConcurrentYvCompositions, 34 ChoiceCompositions, 10428 VarBasedMoverChecksPositive, 374 VarBasedMoverChecksNegative, 122 SemBasedMoverChecksPositive, 390 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.3s, 0 MoverChecksTotal, 145015 CheckedPairsTotal, 133 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L839] FCALL, FORK 0 pthread_create(&t829, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] FCALL, FORK 0 pthread_create(&t830, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L843] FCALL, FORK 0 pthread_create(&t831, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L845] FCALL, FORK 0 pthread_create(&t832, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 4 z$r_buff1_thd0 = z$r_buff0_thd0 [L790] 4 z$r_buff1_thd1 = z$r_buff0_thd1 [L791] 4 z$r_buff1_thd2 = z$r_buff0_thd2 [L792] 4 z$r_buff1_thd3 = z$r_buff0_thd3 [L793] 4 z$r_buff1_thd4 = z$r_buff0_thd4 [L794] 4 z$r_buff0_thd4 = (_Bool)1 [L797] 4 weak$$choice0 = __VERIFIER_nondet_bool() [L798] 4 weak$$choice2 = __VERIFIER_nondet_bool() [L799] 4 z$flush_delayed = weak$$choice2 [L800] 4 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L801] EXPR 4 !z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L801] 4 z = !z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff1) [L802] EXPR 4 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] 4 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff0)) [L803] EXPR 4 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L803] 4 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff1 : z$w_buff1)) [L804] EXPR 4 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L804] 4 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used)) [L805] EXPR 4 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L805] 4 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) [L807] EXPR 4 weak$$choice2 ? z$r_buff1_thd4 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$r_buff1_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L807] 4 z$r_buff1_thd4 = weak$$choice2 ? z$r_buff1_thd4 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$r_buff1_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) [L808] 4 __unbuffered_p3_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=2, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L809] 4 z = z$flush_delayed ? z$mem_tmp : z [L810] 4 z$flush_delayed = (_Bool)0 [L813] 4 __unbuffered_p3_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L816] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 3 y = 2 [L767] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L816] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L770] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L770] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L771] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L772] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L773] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L817] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L818] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L851] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L852] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L853] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L854] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L855] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L858] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L859] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L860] 0 z$flush_delayed = weak$$choice2 [L861] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L862] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L862] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L863] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L863] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L864] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L864] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L865] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L865] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L866] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L866] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L867] EXPR 0 weak$$choice2 ? z$r_buff0_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff0_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L867] 0 z$r_buff0_thd0 = weak$$choice2 ? z$r_buff0_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff0_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0)) [L868] EXPR 0 weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L868] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L869] 0 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2 && __unbuffered_p3_EAX == 2 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 209 locations, 2 error locations. Result: UNSAFE, OverallTime: 63.5s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 17.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5665 SDtfs, 5591 SDslu, 15863 SDs, 0 SdLazy, 8354 SolverSat, 293 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 318 GetRequests, 99 SyntacticMatches, 39 SemanticMatches, 180 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 262 ImplicationChecksByTransitivity, 1.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=181318occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 30.5s AutomataMinimizationTime, 25 MinimizatonAttempts, 114193 StatesRemovedByMinimization, 21 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 1546 NumberOfCodeBlocks, 1546 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 1444 ConstructedInterpolants, 0 QuantifiedInterpolants, 375721 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...