./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix031_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix031_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b1c13a629685f920d5ce9018248d0b9f939b2481 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:42:01,276 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:42:01,277 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:42:01,284 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:42:01,285 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:42:01,285 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:42:01,286 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:42:01,287 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:42:01,289 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:42:01,289 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:42:01,290 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:42:01,291 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:42:01,291 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:42:01,292 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:42:01,292 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:42:01,293 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:42:01,293 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:42:01,294 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:42:01,295 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:42:01,297 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:42:01,298 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:42:01,298 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:42:01,299 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:42:01,299 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:42:01,301 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:42:01,301 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:42:01,301 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:42:01,302 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:42:01,302 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:42:01,303 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:42:01,303 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:42:01,303 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:42:01,304 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:42:01,304 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:42:01,305 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:42:01,305 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:42:01,305 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:42:01,305 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:42:01,306 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:42:01,306 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:42:01,307 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:42:01,307 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:42:01,316 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:42:01,316 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:42:01,317 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:42:01,317 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:42:01,317 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:42:01,318 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:42:01,318 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:42:01,318 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:42:01,318 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:42:01,318 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:42:01,318 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:42:01,318 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:42:01,319 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:42:01,319 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:42:01,319 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:42:01,319 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:42:01,319 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:42:01,319 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:42:01,319 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:42:01,319 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:42:01,320 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:42:01,320 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:42:01,320 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:42:01,320 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:42:01,320 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:42:01,320 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:42:01,320 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:42:01,320 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:42:01,320 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:42:01,320 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b1c13a629685f920d5ce9018248d0b9f939b2481 [2019-12-07 18:42:01,417 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:42:01,425 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:42:01,427 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:42:01,428 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:42:01,429 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:42:01,429 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix031_rmo.oepc.i [2019-12-07 18:42:01,465 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/data/ccfdd7b71/9eac4208f56548b191b6d71159075d83/FLAG9dcb90c42 [2019-12-07 18:42:01,861 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:42:01,861 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/sv-benchmarks/c/pthread-wmm/mix031_rmo.oepc.i [2019-12-07 18:42:01,871 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/data/ccfdd7b71/9eac4208f56548b191b6d71159075d83/FLAG9dcb90c42 [2019-12-07 18:42:01,880 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/data/ccfdd7b71/9eac4208f56548b191b6d71159075d83 [2019-12-07 18:42:01,882 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:42:01,883 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:42:01,883 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:42:01,884 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:42:01,886 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:42:01,886 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:42:01" (1/1) ... [2019-12-07 18:42:01,888 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:01, skipping insertion in model container [2019-12-07 18:42:01,888 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:42:01" (1/1) ... [2019-12-07 18:42:01,893 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:42:01,920 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:42:02,163 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:42:02,170 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:42:02,214 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:42:02,258 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:42:02,258 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02 WrapperNode [2019-12-07 18:42:02,258 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:42:02,259 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:42:02,259 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:42:02,259 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:42:02,264 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02" (1/1) ... [2019-12-07 18:42:02,277 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02" (1/1) ... [2019-12-07 18:42:02,295 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:42:02,295 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:42:02,296 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:42:02,296 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:42:02,302 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02" (1/1) ... [2019-12-07 18:42:02,302 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02" (1/1) ... [2019-12-07 18:42:02,305 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02" (1/1) ... [2019-12-07 18:42:02,305 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02" (1/1) ... [2019-12-07 18:42:02,312 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02" (1/1) ... [2019-12-07 18:42:02,314 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02" (1/1) ... [2019-12-07 18:42:02,316 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02" (1/1) ... [2019-12-07 18:42:02,320 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:42:02,320 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:42:02,320 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:42:02,320 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:42:02,321 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:42:02,362 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:42:02,362 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:42:02,362 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:42:02,362 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:42:02,363 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:42:02,363 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:42:02,363 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:42:02,363 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:42:02,363 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:42:02,363 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:42:02,363 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:42:02,364 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:42:02,701 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:42:02,701 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:42:02,702 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:42:02 BoogieIcfgContainer [2019-12-07 18:42:02,702 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:42:02,703 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:42:02,703 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:42:02,704 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:42:02,705 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:42:01" (1/3) ... [2019-12-07 18:42:02,705 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72eaeebd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:42:02, skipping insertion in model container [2019-12-07 18:42:02,705 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:42:02" (2/3) ... [2019-12-07 18:42:02,705 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72eaeebd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:42:02, skipping insertion in model container [2019-12-07 18:42:02,706 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:42:02" (3/3) ... [2019-12-07 18:42:02,706 INFO L109 eAbstractionObserver]: Analyzing ICFG mix031_rmo.oepc.i [2019-12-07 18:42:02,712 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:42:02,713 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:42:02,717 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:42:02,718 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:42:02,741 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,741 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,741 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,742 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,742 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,742 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,742 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,742 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,742 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,746 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,746 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,746 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,746 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,747 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,747 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,747 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,747 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,747 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,748 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,748 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,748 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,748 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,748 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,753 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,753 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,753 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,753 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,753 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,753 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,754 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,754 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,754 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,754 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,754 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,754 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,755 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,755 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,755 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,755 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,755 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,755 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,756 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,757 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,761 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,761 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,761 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,761 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,761 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,761 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:42:02,774 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 18:42:02,786 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:42:02,786 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:42:02,787 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:42:02,787 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:42:02,787 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:42:02,787 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:42:02,787 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:42:02,787 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:42:02,797 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 151 places, 185 transitions [2019-12-07 18:42:02,798 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 151 places, 185 transitions [2019-12-07 18:42:02,847 INFO L134 PetriNetUnfolder]: 41/183 cut-off events. [2019-12-07 18:42:02,847 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:42:02,855 INFO L76 FinitePrefix]: Finished finitePrefix Result has 190 conditions, 183 events. 41/183 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 575 event pairs. 6/146 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 18:42:02,866 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 151 places, 185 transitions [2019-12-07 18:42:02,892 INFO L134 PetriNetUnfolder]: 41/183 cut-off events. [2019-12-07 18:42:02,892 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:42:02,895 INFO L76 FinitePrefix]: Finished finitePrefix Result has 190 conditions, 183 events. 41/183 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 575 event pairs. 6/146 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 18:42:02,905 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12056 [2019-12-07 18:42:02,906 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:42:05,795 WARN L192 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 18:42:05,888 INFO L206 etLargeBlockEncoding]: Checked pairs total: 55357 [2019-12-07 18:42:05,888 INFO L214 etLargeBlockEncoding]: Total number of compositions: 107 [2019-12-07 18:42:05,891 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 77 places, 89 transitions [2019-12-07 18:42:06,189 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8640 states. [2019-12-07 18:42:06,190 INFO L276 IsEmpty]: Start isEmpty. Operand 8640 states. [2019-12-07 18:42:06,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:42:06,194 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:06,194 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:42:06,195 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:06,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:06,198 INFO L82 PathProgramCache]: Analyzing trace with hash 801135, now seen corresponding path program 1 times [2019-12-07 18:42:06,204 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:06,204 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185668609] [2019-12-07 18:42:06,204 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:06,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:06,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:06,330 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185668609] [2019-12-07 18:42:06,331 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:06,331 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:42:06,332 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [525656830] [2019-12-07 18:42:06,334 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:42:06,335 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:06,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:42:06,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:06,345 INFO L87 Difference]: Start difference. First operand 8640 states. Second operand 3 states. [2019-12-07 18:42:06,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:06,540 INFO L93 Difference]: Finished difference Result 8472 states and 28002 transitions. [2019-12-07 18:42:06,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:42:06,541 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:42:06,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:06,604 INFO L225 Difference]: With dead ends: 8472 [2019-12-07 18:42:06,604 INFO L226 Difference]: Without dead ends: 7980 [2019-12-07 18:42:06,605 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:06,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7980 states. [2019-12-07 18:42:06,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7980 to 7980. [2019-12-07 18:42:06,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7980 states. [2019-12-07 18:42:06,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7980 states to 7980 states and 26329 transitions. [2019-12-07 18:42:06,886 INFO L78 Accepts]: Start accepts. Automaton has 7980 states and 26329 transitions. Word has length 3 [2019-12-07 18:42:06,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:06,887 INFO L462 AbstractCegarLoop]: Abstraction has 7980 states and 26329 transitions. [2019-12-07 18:42:06,887 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:42:06,887 INFO L276 IsEmpty]: Start isEmpty. Operand 7980 states and 26329 transitions. [2019-12-07 18:42:06,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:42:06,890 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:06,890 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:06,890 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:06,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:06,890 INFO L82 PathProgramCache]: Analyzing trace with hash -337363797, now seen corresponding path program 1 times [2019-12-07 18:42:06,891 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:06,891 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1012406238] [2019-12-07 18:42:06,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:06,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:06,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:06,954 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1012406238] [2019-12-07 18:42:06,954 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:06,954 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:42:06,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [612212685] [2019-12-07 18:42:06,955 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:42:06,955 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:06,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:42:06,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:06,956 INFO L87 Difference]: Start difference. First operand 7980 states and 26329 transitions. Second operand 3 states. [2019-12-07 18:42:06,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:06,981 INFO L93 Difference]: Finished difference Result 1284 states and 2972 transitions. [2019-12-07 18:42:06,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:42:06,982 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2019-12-07 18:42:06,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:06,990 INFO L225 Difference]: With dead ends: 1284 [2019-12-07 18:42:06,990 INFO L226 Difference]: Without dead ends: 1284 [2019-12-07 18:42:06,991 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:06,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1284 states. [2019-12-07 18:42:07,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1284 to 1284. [2019-12-07 18:42:07,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1284 states. [2019-12-07 18:42:07,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1284 states to 1284 states and 2972 transitions. [2019-12-07 18:42:07,021 INFO L78 Accepts]: Start accepts. Automaton has 1284 states and 2972 transitions. Word has length 11 [2019-12-07 18:42:07,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:07,021 INFO L462 AbstractCegarLoop]: Abstraction has 1284 states and 2972 transitions. [2019-12-07 18:42:07,021 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:42:07,021 INFO L276 IsEmpty]: Start isEmpty. Operand 1284 states and 2972 transitions. [2019-12-07 18:42:07,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:42:07,023 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:07,023 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:07,023 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:07,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:07,023 INFO L82 PathProgramCache]: Analyzing trace with hash 254708639, now seen corresponding path program 1 times [2019-12-07 18:42:07,023 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:07,024 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406266045] [2019-12-07 18:42:07,024 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:07,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:07,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:07,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406266045] [2019-12-07 18:42:07,069 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:07,069 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:07,069 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1753277942] [2019-12-07 18:42:07,070 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:42:07,070 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:07,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:42:07,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:07,070 INFO L87 Difference]: Start difference. First operand 1284 states and 2972 transitions. Second operand 3 states. [2019-12-07 18:42:07,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:07,128 INFO L93 Difference]: Finished difference Result 1993 states and 4593 transitions. [2019-12-07 18:42:07,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:42:07,128 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 18:42:07,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:07,137 INFO L225 Difference]: With dead ends: 1993 [2019-12-07 18:42:07,137 INFO L226 Difference]: Without dead ends: 1993 [2019-12-07 18:42:07,138 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:07,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1993 states. [2019-12-07 18:42:07,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1993 to 1444. [2019-12-07 18:42:07,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1444 states. [2019-12-07 18:42:07,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1444 states to 1444 states and 3429 transitions. [2019-12-07 18:42:07,195 INFO L78 Accepts]: Start accepts. Automaton has 1444 states and 3429 transitions. Word has length 14 [2019-12-07 18:42:07,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:07,196 INFO L462 AbstractCegarLoop]: Abstraction has 1444 states and 3429 transitions. [2019-12-07 18:42:07,196 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:42:07,196 INFO L276 IsEmpty]: Start isEmpty. Operand 1444 states and 3429 transitions. [2019-12-07 18:42:07,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:42:07,196 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:07,196 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:07,197 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:07,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:07,197 INFO L82 PathProgramCache]: Analyzing trace with hash 254810970, now seen corresponding path program 1 times [2019-12-07 18:42:07,197 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:07,197 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563869834] [2019-12-07 18:42:07,197 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:07,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:07,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:07,234 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563869834] [2019-12-07 18:42:07,234 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:07,234 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:42:07,234 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [711017875] [2019-12-07 18:42:07,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:42:07,234 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:07,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:42:07,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:07,235 INFO L87 Difference]: Start difference. First operand 1444 states and 3429 transitions. Second operand 4 states. [2019-12-07 18:42:07,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:07,359 INFO L93 Difference]: Finished difference Result 1803 states and 4159 transitions. [2019-12-07 18:42:07,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:42:07,359 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 18:42:07,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:07,368 INFO L225 Difference]: With dead ends: 1803 [2019-12-07 18:42:07,368 INFO L226 Difference]: Without dead ends: 1803 [2019-12-07 18:42:07,368 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:07,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1803 states. [2019-12-07 18:42:07,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1803 to 1739. [2019-12-07 18:42:07,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1739 states. [2019-12-07 18:42:07,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1739 states to 1739 states and 4035 transitions. [2019-12-07 18:42:07,395 INFO L78 Accepts]: Start accepts. Automaton has 1739 states and 4035 transitions. Word has length 14 [2019-12-07 18:42:07,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:07,395 INFO L462 AbstractCegarLoop]: Abstraction has 1739 states and 4035 transitions. [2019-12-07 18:42:07,395 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:07,395 INFO L276 IsEmpty]: Start isEmpty. Operand 1739 states and 4035 transitions. [2019-12-07 18:42:07,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:42:07,396 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:07,396 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:07,396 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:07,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:07,396 INFO L82 PathProgramCache]: Analyzing trace with hash 32652836, now seen corresponding path program 1 times [2019-12-07 18:42:07,397 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:07,397 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998097406] [2019-12-07 18:42:07,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:07,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:07,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:07,425 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [998097406] [2019-12-07 18:42:07,425 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:07,425 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:42:07,426 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [14020243] [2019-12-07 18:42:07,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:42:07,426 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:07,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:42:07,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:07,426 INFO L87 Difference]: Start difference. First operand 1739 states and 4035 transitions. Second operand 4 states. [2019-12-07 18:42:07,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:07,528 INFO L93 Difference]: Finished difference Result 2116 states and 4835 transitions. [2019-12-07 18:42:07,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:42:07,528 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 18:42:07,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:07,539 INFO L225 Difference]: With dead ends: 2116 [2019-12-07 18:42:07,539 INFO L226 Difference]: Without dead ends: 2116 [2019-12-07 18:42:07,539 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:07,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2116 states. [2019-12-07 18:42:07,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2116 to 1856. [2019-12-07 18:42:07,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1856 states. [2019-12-07 18:42:07,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1856 states to 1856 states and 4299 transitions. [2019-12-07 18:42:07,566 INFO L78 Accepts]: Start accepts. Automaton has 1856 states and 4299 transitions. Word has length 14 [2019-12-07 18:42:07,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:07,566 INFO L462 AbstractCegarLoop]: Abstraction has 1856 states and 4299 transitions. [2019-12-07 18:42:07,566 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:07,566 INFO L276 IsEmpty]: Start isEmpty. Operand 1856 states and 4299 transitions. [2019-12-07 18:42:07,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:42:07,568 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:07,568 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:07,568 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:07,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:07,568 INFO L82 PathProgramCache]: Analyzing trace with hash 1595600556, now seen corresponding path program 1 times [2019-12-07 18:42:07,568 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:07,568 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [463117128] [2019-12-07 18:42:07,568 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:07,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:07,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:07,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [463117128] [2019-12-07 18:42:07,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:07,610 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:07,610 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [366477140] [2019-12-07 18:42:07,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:42:07,610 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:07,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:42:07,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:07,610 INFO L87 Difference]: Start difference. First operand 1856 states and 4299 transitions. Second operand 5 states. [2019-12-07 18:42:07,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:07,753 INFO L93 Difference]: Finished difference Result 2383 states and 5349 transitions. [2019-12-07 18:42:07,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:42:07,754 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:42:07,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:07,764 INFO L225 Difference]: With dead ends: 2383 [2019-12-07 18:42:07,764 INFO L226 Difference]: Without dead ends: 2383 [2019-12-07 18:42:07,764 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:42:07,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2383 states. [2019-12-07 18:42:07,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2383 to 2127. [2019-12-07 18:42:07,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2127 states. [2019-12-07 18:42:07,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2127 states to 2127 states and 4855 transitions. [2019-12-07 18:42:07,794 INFO L78 Accepts]: Start accepts. Automaton has 2127 states and 4855 transitions. Word has length 25 [2019-12-07 18:42:07,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:07,794 INFO L462 AbstractCegarLoop]: Abstraction has 2127 states and 4855 transitions. [2019-12-07 18:42:07,794 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:42:07,794 INFO L276 IsEmpty]: Start isEmpty. Operand 2127 states and 4855 transitions. [2019-12-07 18:42:07,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 18:42:07,796 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:07,796 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:07,796 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:07,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:07,796 INFO L82 PathProgramCache]: Analyzing trace with hash 1878239565, now seen corresponding path program 1 times [2019-12-07 18:42:07,797 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:07,797 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [116342326] [2019-12-07 18:42:07,797 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:07,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:07,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:07,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [116342326] [2019-12-07 18:42:07,852 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:07,852 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:42:07,852 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [538124829] [2019-12-07 18:42:07,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:42:07,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:07,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:42:07,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:07,853 INFO L87 Difference]: Start difference. First operand 2127 states and 4855 transitions. Second operand 5 states. [2019-12-07 18:42:08,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:08,138 INFO L93 Difference]: Finished difference Result 3026 states and 6768 transitions. [2019-12-07 18:42:08,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:42:08,138 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 18:42:08,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:08,142 INFO L225 Difference]: With dead ends: 3026 [2019-12-07 18:42:08,142 INFO L226 Difference]: Without dead ends: 3026 [2019-12-07 18:42:08,143 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:42:08,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3026 states. [2019-12-07 18:42:08,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3026 to 2608. [2019-12-07 18:42:08,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2608 states. [2019-12-07 18:42:08,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2608 states to 2608 states and 5926 transitions. [2019-12-07 18:42:08,177 INFO L78 Accepts]: Start accepts. Automaton has 2608 states and 5926 transitions. Word has length 26 [2019-12-07 18:42:08,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:08,177 INFO L462 AbstractCegarLoop]: Abstraction has 2608 states and 5926 transitions. [2019-12-07 18:42:08,177 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:42:08,177 INFO L276 IsEmpty]: Start isEmpty. Operand 2608 states and 5926 transitions. [2019-12-07 18:42:08,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 18:42:08,179 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:08,179 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:08,180 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:08,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:08,180 INFO L82 PathProgramCache]: Analyzing trace with hash 532711466, now seen corresponding path program 1 times [2019-12-07 18:42:08,180 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:08,180 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1218402171] [2019-12-07 18:42:08,180 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:08,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:08,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:08,225 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1218402171] [2019-12-07 18:42:08,225 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:08,225 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:08,226 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [598619240] [2019-12-07 18:42:08,226 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:42:08,226 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:08,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:42:08,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:08,227 INFO L87 Difference]: Start difference. First operand 2608 states and 5926 transitions. Second operand 5 states. [2019-12-07 18:42:08,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:08,368 INFO L93 Difference]: Finished difference Result 3110 states and 6917 transitions. [2019-12-07 18:42:08,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:42:08,368 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 18:42:08,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:08,374 INFO L225 Difference]: With dead ends: 3110 [2019-12-07 18:42:08,374 INFO L226 Difference]: Without dead ends: 3110 [2019-12-07 18:42:08,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:42:08,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3110 states. [2019-12-07 18:42:08,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3110 to 2543. [2019-12-07 18:42:08,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2543 states. [2019-12-07 18:42:08,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2543 states to 2543 states and 5786 transitions. [2019-12-07 18:42:08,413 INFO L78 Accepts]: Start accepts. Automaton has 2543 states and 5786 transitions. Word has length 26 [2019-12-07 18:42:08,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:08,413 INFO L462 AbstractCegarLoop]: Abstraction has 2543 states and 5786 transitions. [2019-12-07 18:42:08,413 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:42:08,414 INFO L276 IsEmpty]: Start isEmpty. Operand 2543 states and 5786 transitions. [2019-12-07 18:42:08,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:42:08,416 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:08,416 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:08,417 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:08,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:08,417 INFO L82 PathProgramCache]: Analyzing trace with hash 898927989, now seen corresponding path program 1 times [2019-12-07 18:42:08,417 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:08,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [623665411] [2019-12-07 18:42:08,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:08,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:08,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:08,466 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [623665411] [2019-12-07 18:42:08,466 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:08,466 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:08,466 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1815485547] [2019-12-07 18:42:08,467 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:42:08,467 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:08,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:42:08,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:08,467 INFO L87 Difference]: Start difference. First operand 2543 states and 5786 transitions. Second operand 4 states. [2019-12-07 18:42:08,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:08,484 INFO L93 Difference]: Finished difference Result 1421 states and 3096 transitions. [2019-12-07 18:42:08,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:42:08,484 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2019-12-07 18:42:08,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:08,489 INFO L225 Difference]: With dead ends: 1421 [2019-12-07 18:42:08,489 INFO L226 Difference]: Without dead ends: 1421 [2019-12-07 18:42:08,489 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:08,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1421 states. [2019-12-07 18:42:08,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1421 to 1326. [2019-12-07 18:42:08,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1326 states. [2019-12-07 18:42:08,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1326 states to 1326 states and 2921 transitions. [2019-12-07 18:42:08,517 INFO L78 Accepts]: Start accepts. Automaton has 1326 states and 2921 transitions. Word has length 27 [2019-12-07 18:42:08,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:08,517 INFO L462 AbstractCegarLoop]: Abstraction has 1326 states and 2921 transitions. [2019-12-07 18:42:08,517 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:08,517 INFO L276 IsEmpty]: Start isEmpty. Operand 1326 states and 2921 transitions. [2019-12-07 18:42:08,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 18:42:08,521 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:08,521 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:08,521 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:08,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:08,522 INFO L82 PathProgramCache]: Analyzing trace with hash -1928456464, now seen corresponding path program 1 times [2019-12-07 18:42:08,522 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:08,522 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1088725094] [2019-12-07 18:42:08,522 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:08,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:08,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:08,610 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1088725094] [2019-12-07 18:42:08,610 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:08,610 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:42:08,611 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [474308918] [2019-12-07 18:42:08,611 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:42:08,611 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:08,611 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:42:08,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:42:08,612 INFO L87 Difference]: Start difference. First operand 1326 states and 2921 transitions. Second operand 6 states. [2019-12-07 18:42:08,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:08,956 INFO L93 Difference]: Finished difference Result 1733 states and 3717 transitions. [2019-12-07 18:42:08,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:42:08,956 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-12-07 18:42:08,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:08,959 INFO L225 Difference]: With dead ends: 1733 [2019-12-07 18:42:08,959 INFO L226 Difference]: Without dead ends: 1733 [2019-12-07 18:42:08,959 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:42:08,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1733 states. [2019-12-07 18:42:08,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1733 to 1380. [2019-12-07 18:42:08,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1380 states. [2019-12-07 18:42:08,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1380 states to 1380 states and 3033 transitions. [2019-12-07 18:42:08,978 INFO L78 Accepts]: Start accepts. Automaton has 1380 states and 3033 transitions. Word has length 51 [2019-12-07 18:42:08,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:08,979 INFO L462 AbstractCegarLoop]: Abstraction has 1380 states and 3033 transitions. [2019-12-07 18:42:08,980 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:42:08,980 INFO L276 IsEmpty]: Start isEmpty. Operand 1380 states and 3033 transitions. [2019-12-07 18:42:08,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 18:42:08,983 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:08,983 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:08,983 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:08,983 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:08,984 INFO L82 PathProgramCache]: Analyzing trace with hash -429236970, now seen corresponding path program 2 times [2019-12-07 18:42:08,984 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:08,984 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1664996051] [2019-12-07 18:42:08,984 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:09,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:09,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:09,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1664996051] [2019-12-07 18:42:09,052 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:09,052 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:42:09,052 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1050793898] [2019-12-07 18:42:09,052 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:42:09,052 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:09,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:42:09,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:09,053 INFO L87 Difference]: Start difference. First operand 1380 states and 3033 transitions. Second operand 5 states. [2019-12-07 18:42:09,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:09,200 INFO L93 Difference]: Finished difference Result 1527 states and 3302 transitions. [2019-12-07 18:42:09,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:42:09,201 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 18:42:09,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:09,203 INFO L225 Difference]: With dead ends: 1527 [2019-12-07 18:42:09,203 INFO L226 Difference]: Without dead ends: 1527 [2019-12-07 18:42:09,203 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:42:09,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1527 states. [2019-12-07 18:42:09,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1527 to 1384. [2019-12-07 18:42:09,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1384 states. [2019-12-07 18:42:09,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1384 states to 1384 states and 3043 transitions. [2019-12-07 18:42:09,226 INFO L78 Accepts]: Start accepts. Automaton has 1384 states and 3043 transitions. Word has length 51 [2019-12-07 18:42:09,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:09,227 INFO L462 AbstractCegarLoop]: Abstraction has 1384 states and 3043 transitions. [2019-12-07 18:42:09,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:42:09,227 INFO L276 IsEmpty]: Start isEmpty. Operand 1384 states and 3043 transitions. [2019-12-07 18:42:09,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 18:42:09,229 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:09,230 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:09,230 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:09,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:09,230 INFO L82 PathProgramCache]: Analyzing trace with hash 1980585546, now seen corresponding path program 3 times [2019-12-07 18:42:09,230 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:09,230 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1326800379] [2019-12-07 18:42:09,231 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:09,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:09,300 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:09,300 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1326800379] [2019-12-07 18:42:09,301 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:09,301 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:42:09,301 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585267635] [2019-12-07 18:42:09,301 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:42:09,301 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:09,301 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:42:09,302 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:09,302 INFO L87 Difference]: Start difference. First operand 1384 states and 3043 transitions. Second operand 3 states. [2019-12-07 18:42:09,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:09,315 INFO L93 Difference]: Finished difference Result 1383 states and 3041 transitions. [2019-12-07 18:42:09,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:42:09,315 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 51 [2019-12-07 18:42:09,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:09,317 INFO L225 Difference]: With dead ends: 1383 [2019-12-07 18:42:09,318 INFO L226 Difference]: Without dead ends: 1383 [2019-12-07 18:42:09,318 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:09,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1383 states. [2019-12-07 18:42:09,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1383 to 1153. [2019-12-07 18:42:09,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1153 states. [2019-12-07 18:42:09,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1153 states to 1153 states and 2598 transitions. [2019-12-07 18:42:09,338 INFO L78 Accepts]: Start accepts. Automaton has 1153 states and 2598 transitions. Word has length 51 [2019-12-07 18:42:09,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:09,339 INFO L462 AbstractCegarLoop]: Abstraction has 1153 states and 2598 transitions. [2019-12-07 18:42:09,339 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:42:09,339 INFO L276 IsEmpty]: Start isEmpty. Operand 1153 states and 2598 transitions. [2019-12-07 18:42:09,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:42:09,340 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:09,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:09,340 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:09,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:09,341 INFO L82 PathProgramCache]: Analyzing trace with hash -1913367860, now seen corresponding path program 1 times [2019-12-07 18:42:09,341 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:09,341 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [149354711] [2019-12-07 18:42:09,341 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:09,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:09,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:09,433 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [149354711] [2019-12-07 18:42:09,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:09,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:42:09,434 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [839611606] [2019-12-07 18:42:09,434 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:42:09,434 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:09,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:42:09,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:42:09,435 INFO L87 Difference]: Start difference. First operand 1153 states and 2598 transitions. Second operand 7 states. [2019-12-07 18:42:09,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:09,662 INFO L93 Difference]: Finished difference Result 3204 states and 7070 transitions. [2019-12-07 18:42:09,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 18:42:09,663 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-12-07 18:42:09,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:09,666 INFO L225 Difference]: With dead ends: 3204 [2019-12-07 18:42:09,666 INFO L226 Difference]: Without dead ends: 2206 [2019-12-07 18:42:09,667 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:42:09,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2206 states. [2019-12-07 18:42:09,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2206 to 1248. [2019-12-07 18:42:09,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1248 states. [2019-12-07 18:42:09,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1248 states to 1248 states and 2806 transitions. [2019-12-07 18:42:09,687 INFO L78 Accepts]: Start accepts. Automaton has 1248 states and 2806 transitions. Word has length 52 [2019-12-07 18:42:09,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:09,687 INFO L462 AbstractCegarLoop]: Abstraction has 1248 states and 2806 transitions. [2019-12-07 18:42:09,687 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:42:09,687 INFO L276 IsEmpty]: Start isEmpty. Operand 1248 states and 2806 transitions. [2019-12-07 18:42:09,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:42:09,689 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:09,689 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:09,689 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:09,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:09,690 INFO L82 PathProgramCache]: Analyzing trace with hash -896850810, now seen corresponding path program 2 times [2019-12-07 18:42:09,690 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:09,690 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [584814066] [2019-12-07 18:42:09,690 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:09,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:09,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:09,803 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [584814066] [2019-12-07 18:42:09,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:09,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:42:09,803 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853418941] [2019-12-07 18:42:09,803 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:42:09,803 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:09,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:42:09,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:42:09,804 INFO L87 Difference]: Start difference. First operand 1248 states and 2806 transitions. Second operand 8 states. [2019-12-07 18:42:10,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:10,257 INFO L93 Difference]: Finished difference Result 1734 states and 3769 transitions. [2019-12-07 18:42:10,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:42:10,258 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2019-12-07 18:42:10,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:10,260 INFO L225 Difference]: With dead ends: 1734 [2019-12-07 18:42:10,260 INFO L226 Difference]: Without dead ends: 1734 [2019-12-07 18:42:10,260 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:42:10,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1734 states. [2019-12-07 18:42:10,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1734 to 1116. [2019-12-07 18:42:10,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1116 states. [2019-12-07 18:42:10,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1116 states to 1116 states and 2459 transitions. [2019-12-07 18:42:10,272 INFO L78 Accepts]: Start accepts. Automaton has 1116 states and 2459 transitions. Word has length 52 [2019-12-07 18:42:10,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:10,273 INFO L462 AbstractCegarLoop]: Abstraction has 1116 states and 2459 transitions. [2019-12-07 18:42:10,273 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:42:10,273 INFO L276 IsEmpty]: Start isEmpty. Operand 1116 states and 2459 transitions. [2019-12-07 18:42:10,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:42:10,274 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:10,274 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:10,274 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:10,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:10,274 INFO L82 PathProgramCache]: Analyzing trace with hash 241436152, now seen corresponding path program 3 times [2019-12-07 18:42:10,275 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:10,275 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1567602840] [2019-12-07 18:42:10,275 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:10,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:10,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:10,519 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1567602840] [2019-12-07 18:42:10,519 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:10,519 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:42:10,519 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1200555616] [2019-12-07 18:42:10,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:42:10,520 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:10,520 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:42:10,520 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:42:10,520 INFO L87 Difference]: Start difference. First operand 1116 states and 2459 transitions. Second operand 11 states. [2019-12-07 18:42:10,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:10,926 INFO L93 Difference]: Finished difference Result 2486 states and 5312 transitions. [2019-12-07 18:42:10,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:42:10,927 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 52 [2019-12-07 18:42:10,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:10,928 INFO L225 Difference]: With dead ends: 2486 [2019-12-07 18:42:10,928 INFO L226 Difference]: Without dead ends: 1528 [2019-12-07 18:42:10,928 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=200, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:42:10,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1528 states. [2019-12-07 18:42:10,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1528 to 1325. [2019-12-07 18:42:10,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1325 states. [2019-12-07 18:42:10,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1325 states to 1325 states and 2887 transitions. [2019-12-07 18:42:10,941 INFO L78 Accepts]: Start accepts. Automaton has 1325 states and 2887 transitions. Word has length 52 [2019-12-07 18:42:10,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:10,941 INFO L462 AbstractCegarLoop]: Abstraction has 1325 states and 2887 transitions. [2019-12-07 18:42:10,941 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:42:10,941 INFO L276 IsEmpty]: Start isEmpty. Operand 1325 states and 2887 transitions. [2019-12-07 18:42:10,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:42:10,942 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:10,942 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:10,942 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:10,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:10,943 INFO L82 PathProgramCache]: Analyzing trace with hash -655894360, now seen corresponding path program 4 times [2019-12-07 18:42:10,943 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:10,943 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1537176295] [2019-12-07 18:42:10,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:10,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:11,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:11,048 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1537176295] [2019-12-07 18:42:11,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:11,048 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:42:11,049 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [341795307] [2019-12-07 18:42:11,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:42:11,049 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:11,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:42:11,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:42:11,049 INFO L87 Difference]: Start difference. First operand 1325 states and 2887 transitions. Second operand 8 states. [2019-12-07 18:42:11,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:11,420 INFO L93 Difference]: Finished difference Result 2062 states and 4422 transitions. [2019-12-07 18:42:11,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:42:11,420 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2019-12-07 18:42:11,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:11,423 INFO L225 Difference]: With dead ends: 2062 [2019-12-07 18:42:11,423 INFO L226 Difference]: Without dead ends: 1918 [2019-12-07 18:42:11,423 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:42:11,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1918 states. [2019-12-07 18:42:11,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1918 to 1359. [2019-12-07 18:42:11,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1359 states. [2019-12-07 18:42:11,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1359 states to 1359 states and 2975 transitions. [2019-12-07 18:42:11,446 INFO L78 Accepts]: Start accepts. Automaton has 1359 states and 2975 transitions. Word has length 52 [2019-12-07 18:42:11,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:11,446 INFO L462 AbstractCegarLoop]: Abstraction has 1359 states and 2975 transitions. [2019-12-07 18:42:11,446 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:42:11,446 INFO L276 IsEmpty]: Start isEmpty. Operand 1359 states and 2975 transitions. [2019-12-07 18:42:11,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:42:11,448 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:11,448 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:11,448 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:11,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:11,449 INFO L82 PathProgramCache]: Analyzing trace with hash 1643675972, now seen corresponding path program 5 times [2019-12-07 18:42:11,449 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:11,449 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091147873] [2019-12-07 18:42:11,449 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:11,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:11,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:11,518 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091147873] [2019-12-07 18:42:11,518 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:11,519 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:11,519 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324182557] [2019-12-07 18:42:11,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:42:11,519 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:11,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:42:11,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:11,520 INFO L87 Difference]: Start difference. First operand 1359 states and 2975 transitions. Second operand 4 states. [2019-12-07 18:42:11,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:11,562 INFO L93 Difference]: Finished difference Result 1562 states and 3344 transitions. [2019-12-07 18:42:11,562 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:42:11,562 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 52 [2019-12-07 18:42:11,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:11,564 INFO L225 Difference]: With dead ends: 1562 [2019-12-07 18:42:11,564 INFO L226 Difference]: Without dead ends: 1562 [2019-12-07 18:42:11,564 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:11,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1562 states. [2019-12-07 18:42:11,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1562 to 1371. [2019-12-07 18:42:11,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1371 states. [2019-12-07 18:42:11,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1371 states to 1371 states and 3006 transitions. [2019-12-07 18:42:11,581 INFO L78 Accepts]: Start accepts. Automaton has 1371 states and 3006 transitions. Word has length 52 [2019-12-07 18:42:11,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:11,582 INFO L462 AbstractCegarLoop]: Abstraction has 1371 states and 3006 transitions. [2019-12-07 18:42:11,582 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:11,582 INFO L276 IsEmpty]: Start isEmpty. Operand 1371 states and 3006 transitions. [2019-12-07 18:42:11,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:42:11,583 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:11,583 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:11,583 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:11,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:11,584 INFO L82 PathProgramCache]: Analyzing trace with hash -348357958, now seen corresponding path program 1 times [2019-12-07 18:42:11,584 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:11,584 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1675688901] [2019-12-07 18:42:11,584 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:11,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:11,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:11,626 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1675688901] [2019-12-07 18:42:11,626 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:11,626 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:42:11,626 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1939459751] [2019-12-07 18:42:11,626 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:42:11,627 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:11,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:42:11,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:11,627 INFO L87 Difference]: Start difference. First operand 1371 states and 3006 transitions. Second operand 4 states. [2019-12-07 18:42:11,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:11,735 INFO L93 Difference]: Finished difference Result 1959 states and 4242 transitions. [2019-12-07 18:42:11,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:42:11,736 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2019-12-07 18:42:11,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:11,737 INFO L225 Difference]: With dead ends: 1959 [2019-12-07 18:42:11,738 INFO L226 Difference]: Without dead ends: 1959 [2019-12-07 18:42:11,738 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:11,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1959 states. [2019-12-07 18:42:11,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1959 to 1491. [2019-12-07 18:42:11,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1491 states. [2019-12-07 18:42:11,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1491 states to 1491 states and 3302 transitions. [2019-12-07 18:42:11,759 INFO L78 Accepts]: Start accepts. Automaton has 1491 states and 3302 transitions. Word has length 53 [2019-12-07 18:42:11,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:11,759 INFO L462 AbstractCegarLoop]: Abstraction has 1491 states and 3302 transitions. [2019-12-07 18:42:11,759 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:11,759 INFO L276 IsEmpty]: Start isEmpty. Operand 1491 states and 3302 transitions. [2019-12-07 18:42:11,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:42:11,761 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:11,761 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:11,761 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:11,761 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:11,761 INFO L82 PathProgramCache]: Analyzing trace with hash 468793286, now seen corresponding path program 1 times [2019-12-07 18:42:11,762 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:11,762 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [495225438] [2019-12-07 18:42:11,762 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:11,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:11,886 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:11,887 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [495225438] [2019-12-07 18:42:11,887 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:11,887 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:42:11,887 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [828589974] [2019-12-07 18:42:11,887 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:42:11,887 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:11,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:42:11,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:42:11,888 INFO L87 Difference]: Start difference. First operand 1491 states and 3302 transitions. Second operand 6 states. [2019-12-07 18:42:12,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:12,107 INFO L93 Difference]: Finished difference Result 1858 states and 3962 transitions. [2019-12-07 18:42:12,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:42:12,107 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-12-07 18:42:12,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:12,108 INFO L225 Difference]: With dead ends: 1858 [2019-12-07 18:42:12,109 INFO L226 Difference]: Without dead ends: 1858 [2019-12-07 18:42:12,109 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:42:12,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1858 states. [2019-12-07 18:42:12,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1858 to 1214. [2019-12-07 18:42:12,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1214 states. [2019-12-07 18:42:12,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1214 states to 1214 states and 2627 transitions. [2019-12-07 18:42:12,121 INFO L78 Accepts]: Start accepts. Automaton has 1214 states and 2627 transitions. Word has length 53 [2019-12-07 18:42:12,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:12,122 INFO L462 AbstractCegarLoop]: Abstraction has 1214 states and 2627 transitions. [2019-12-07 18:42:12,122 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:42:12,122 INFO L276 IsEmpty]: Start isEmpty. Operand 1214 states and 2627 transitions. [2019-12-07 18:42:12,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:42:12,123 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:12,123 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:12,123 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:12,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:12,123 INFO L82 PathProgramCache]: Analyzing trace with hash 300048924, now seen corresponding path program 1 times [2019-12-07 18:42:12,123 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:12,124 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113218329] [2019-12-07 18:42:12,124 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:12,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:12,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:12,174 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [113218329] [2019-12-07 18:42:12,174 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:12,174 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:12,174 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [211328051] [2019-12-07 18:42:12,174 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:42:12,174 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:12,174 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:42:12,174 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:12,175 INFO L87 Difference]: Start difference. First operand 1214 states and 2627 transitions. Second operand 4 states. [2019-12-07 18:42:12,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:12,186 INFO L93 Difference]: Finished difference Result 1396 states and 2968 transitions. [2019-12-07 18:42:12,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:42:12,186 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2019-12-07 18:42:12,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:12,187 INFO L225 Difference]: With dead ends: 1396 [2019-12-07 18:42:12,187 INFO L226 Difference]: Without dead ends: 715 [2019-12-07 18:42:12,187 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:12,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2019-12-07 18:42:12,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 715. [2019-12-07 18:42:12,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 715 states. [2019-12-07 18:42:12,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 715 states to 715 states and 1531 transitions. [2019-12-07 18:42:12,193 INFO L78 Accepts]: Start accepts. Automaton has 715 states and 1531 transitions. Word has length 53 [2019-12-07 18:42:12,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:12,193 INFO L462 AbstractCegarLoop]: Abstraction has 715 states and 1531 transitions. [2019-12-07 18:42:12,193 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:12,193 INFO L276 IsEmpty]: Start isEmpty. Operand 715 states and 1531 transitions. [2019-12-07 18:42:12,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:42:12,194 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:12,194 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:12,194 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:12,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:12,195 INFO L82 PathProgramCache]: Analyzing trace with hash 821991690, now seen corresponding path program 2 times [2019-12-07 18:42:12,195 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:12,195 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139188713] [2019-12-07 18:42:12,195 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:12,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:12,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:12,465 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2139188713] [2019-12-07 18:42:12,465 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:12,466 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:42:12,466 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [179030513] [2019-12-07 18:42:12,466 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:42:12,466 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:12,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:42:12,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:42:12,466 INFO L87 Difference]: Start difference. First operand 715 states and 1531 transitions. Second operand 13 states. [2019-12-07 18:42:13,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:13,284 INFO L93 Difference]: Finished difference Result 1487 states and 3037 transitions. [2019-12-07 18:42:13,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 18:42:13,284 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 53 [2019-12-07 18:42:13,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:13,285 INFO L225 Difference]: With dead ends: 1487 [2019-12-07 18:42:13,285 INFO L226 Difference]: Without dead ends: 1228 [2019-12-07 18:42:13,286 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=139, Invalid=563, Unknown=0, NotChecked=0, Total=702 [2019-12-07 18:42:13,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1228 states. [2019-12-07 18:42:13,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1228 to 737. [2019-12-07 18:42:13,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 737 states. [2019-12-07 18:42:13,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 737 states to 737 states and 1574 transitions. [2019-12-07 18:42:13,293 INFO L78 Accepts]: Start accepts. Automaton has 737 states and 1574 transitions. Word has length 53 [2019-12-07 18:42:13,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:13,293 INFO L462 AbstractCegarLoop]: Abstraction has 737 states and 1574 transitions. [2019-12-07 18:42:13,293 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:42:13,294 INFO L276 IsEmpty]: Start isEmpty. Operand 737 states and 1574 transitions. [2019-12-07 18:42:13,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:42:13,294 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:13,295 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:13,295 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:13,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:13,295 INFO L82 PathProgramCache]: Analyzing trace with hash 813658986, now seen corresponding path program 3 times [2019-12-07 18:42:13,295 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:13,295 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1807256530] [2019-12-07 18:42:13,295 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:13,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:13,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:13,356 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1807256530] [2019-12-07 18:42:13,356 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:13,356 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:42:13,357 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [543847626] [2019-12-07 18:42:13,357 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:42:13,357 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:13,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:42:13,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:13,357 INFO L87 Difference]: Start difference. First operand 737 states and 1574 transitions. Second operand 5 states. [2019-12-07 18:42:13,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:13,391 INFO L93 Difference]: Finished difference Result 724 states and 1531 transitions. [2019-12-07 18:42:13,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:42:13,392 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-12-07 18:42:13,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:13,392 INFO L225 Difference]: With dead ends: 724 [2019-12-07 18:42:13,392 INFO L226 Difference]: Without dead ends: 724 [2019-12-07 18:42:13,392 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:42:13,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 724 states. [2019-12-07 18:42:13,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 724 to 618. [2019-12-07 18:42:13,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 618 states. [2019-12-07 18:42:13,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 618 states to 618 states and 1294 transitions. [2019-12-07 18:42:13,398 INFO L78 Accepts]: Start accepts. Automaton has 618 states and 1294 transitions. Word has length 53 [2019-12-07 18:42:13,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:13,398 INFO L462 AbstractCegarLoop]: Abstraction has 618 states and 1294 transitions. [2019-12-07 18:42:13,398 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:42:13,398 INFO L276 IsEmpty]: Start isEmpty. Operand 618 states and 1294 transitions. [2019-12-07 18:42:13,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:42:13,399 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:13,399 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:13,399 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:13,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:13,399 INFO L82 PathProgramCache]: Analyzing trace with hash -1691396374, now seen corresponding path program 1 times [2019-12-07 18:42:13,399 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:13,399 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046310007] [2019-12-07 18:42:13,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:13,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:42:13,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:42:13,465 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:42:13,465 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:42:13,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] ULTIMATE.startENTRY-->L814: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_316) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_cnt~0_62) (= v_~z~0_11 0) (= 0 v_~a$read_delayed~0_7) (= (store .cse0 |v_ULTIMATE.start_main_~#t841~0.base_35| 1) |v_#valid_63|) (= v_~y~0_90 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t841~0.base_35| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t841~0.base_35|) |v_ULTIMATE.start_main_~#t841~0.offset_23| 0)) |v_#memory_int_13|) (= 0 v_~a$r_buff1_thd2~0_271) (= v_~__unbuffered_p1_EBX~0_60 0) (= v_~a$flush_delayed~0_23 0) (= v_~main$tmp_guard1~0_43 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~a$w_buff0_used~0_830) (= 0 v_~a$w_buff1_used~0_501) (= 0 |v_#NULL.base_4|) (= (select .cse0 |v_ULTIMATE.start_main_~#t841~0.base_35|) 0) (= v_~x~0_85 0) (= 0 v_~a$r_buff1_thd1~0_132) (= 0 v_~weak$$choice0~0_11) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t841~0.base_35| 4) |v_#length_15|) (= 0 v_~a$r_buff0_thd1~0_236) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t841~0.base_35|) (= v_~main$tmp_guard0~0_21 0) (= 0 v_~a$r_buff0_thd2~0_373) (= |v_#NULL.offset_4| 0) (= v_~__unbuffered_p0_EBX~0_115 0) (= v_~a$mem_tmp~0_14 0) (= v_~weak$$choice2~0_107 0) (= |v_ULTIMATE.start_main_~#t841~0.offset_23| 0) (= v_~a~0_150 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~a$r_buff1_thd0~0_178 0) (= v_~a$r_buff0_thd0~0_163 0) (= v_~a$w_buff0~0_518 0) (= 0 v_~__unbuffered_p1_EAX~0_46) (= 0 v_~__unbuffered_p0_EAX~0_117))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~a$read_delayed~0=v_~a$read_delayed~0_7, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_271, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_373, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_~#t842~0.offset=|v_ULTIMATE.start_main_~#t842~0.offset_16|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_43, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_163, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_75|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_63|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_87|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ~a~0=v_~a~0_150, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_117, ~a$w_buff1~0=v_~a$w_buff1~0_316, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_46, ULTIMATE.start_main_~#t841~0.base=|v_ULTIMATE.start_main_~#t841~0.base_35|, #length=|v_#length_15|, ULTIMATE.start_main_~#t841~0.offset=|v_ULTIMATE.start_main_~#t841~0.offset_23|, ~y~0=v_~y~0_90, ULTIMATE.start_main_~#t842~0.base=|v_ULTIMATE.start_main_~#t842~0.base_27|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_60, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_115, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_132, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_830, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_236, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_4|, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_95|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_87|, ~a$w_buff0~0=v_~a$w_buff0~0_518, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_178, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_19|, ~z~0=v_~z~0_11, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_501, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~x~0=v_~x~0_85, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$read_delayed~0, ~a$r_buff1_thd2~0, ~a$r_buff0_thd2~0, #NULL.offset, ULTIMATE.start_main_~#t842~0.offset, ~main$tmp_guard1~0, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~a$mem_tmp~0, ~a~0, ~__unbuffered_p0_EAX~0, ~a$w_buff1~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t841~0.base, #length, ULTIMATE.start_main_~#t841~0.offset, ~y~0, ULTIMATE.start_main_~#t842~0.base, ~__unbuffered_p1_EBX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite40, ~a$w_buff0~0, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~x~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:42:13,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] P0ENTRY-->L4-3: Formula: (and (= ~a$w_buff0~0_In1799479695 ~a$w_buff1~0_Out1799479695) (= 1 ~a$w_buff0~0_Out1799479695) (= (ite (not (and (not (= 0 (mod ~a$w_buff1_used~0_Out1799479695 256))) (not (= (mod ~a$w_buff0_used~0_Out1799479695 256) 0)))) 1 0) |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1799479695|) (= ~a$w_buff1_used~0_Out1799479695 ~a$w_buff0_used~0_In1799479695) (= 1 ~a$w_buff0_used~0_Out1799479695) (= P0Thread1of1ForFork0_~arg.offset_Out1799479695 |P0Thread1of1ForFork0_#in~arg.offset_In1799479695|) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1799479695)) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1799479695| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1799479695) (= |P0Thread1of1ForFork0_#in~arg.base_In1799479695| P0Thread1of1ForFork0_~arg.base_Out1799479695)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1799479695|, ~a$w_buff0~0=~a$w_buff0~0_In1799479695, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1799479695|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1799479695} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1799479695|, ~a$w_buff1~0=~a$w_buff1~0_Out1799479695, ~a$w_buff0~0=~a$w_buff0~0_Out1799479695, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1799479695, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1799479695|, ~a$w_buff0_used~0=~a$w_buff0_used~0_Out1799479695, ~a$w_buff1_used~0=~a$w_buff1_used~0_Out1799479695, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out1799479695, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1799479695|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out1799479695} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~a$w_buff0_used~0, ~a$w_buff1_used~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:42:13,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L814-1-->L816: Formula: (and (not (= |v_ULTIMATE.start_main_~#t842~0.base_10| 0)) (= (select |v_#valid_20| |v_ULTIMATE.start_main_~#t842~0.base_10|) 0) (= (store |v_#valid_20| |v_ULTIMATE.start_main_~#t842~0.base_10| 1) |v_#valid_19|) (= |v_ULTIMATE.start_main_~#t842~0.offset_9| 0) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t842~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t842~0.base_10|) |v_ULTIMATE.start_main_~#t842~0.offset_9| 1))) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t842~0.base_10| 4) |v_#length_9|) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t842~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_20|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t842~0.base=|v_ULTIMATE.start_main_~#t842~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_19|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, ULTIMATE.start_main_~#t842~0.offset=|v_ULTIMATE.start_main_~#t842~0.offset_9|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t842~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t842~0.offset, #length] because there is no mapped edge [2019-12-07 18:42:13,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L783-->L783-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1365042778 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite23_Out-1365042778| ~a$w_buff1_used~0_In-1365042778) .cse0 (= |P1Thread1of1ForFork1_#t~ite24_Out-1365042778| |P1Thread1of1ForFork1_#t~ite23_Out-1365042778|) (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-1365042778 256) 0))) (or (and (= (mod ~a$w_buff1_used~0_In-1365042778 256) 0) .cse1) (and (= (mod ~a$r_buff1_thd2~0_In-1365042778 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-1365042778 256))))) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite23_In-1365042778| |P1Thread1of1ForFork1_#t~ite23_Out-1365042778|) (= |P1Thread1of1ForFork1_#t~ite24_Out-1365042778| ~a$w_buff1_used~0_In-1365042778)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1365042778, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1365042778, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_In-1365042778|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1365042778, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1365042778, ~weak$$choice2~0=~weak$$choice2~0_In-1365042778} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1365042778, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_Out-1365042778|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1365042778, P1Thread1of1ForFork1_#t~ite24=|P1Thread1of1ForFork1_#t~ite24_Out-1365042778|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1365042778, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1365042778, ~weak$$choice2~0=~weak$$choice2~0_In-1365042778} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite23, P1Thread1of1ForFork1_#t~ite24] because there is no mapped edge [2019-12-07 18:42:13,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L784-->L785: Formula: (and (not (= (mod v_~weak$$choice2~0_38 256) 0)) (= v_~a$r_buff0_thd2~0_146 v_~a$r_buff0_thd2~0_147)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_147, ~weak$$choice2~0=v_~weak$$choice2~0_38} OutVars{~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, P1Thread1of1ForFork1_#t~ite27=|v_P1Thread1of1ForFork1_#t~ite27_6|, ~weak$$choice2~0=v_~weak$$choice2~0_38, P1Thread1of1ForFork1_#t~ite25=|v_P1Thread1of1ForFork1_#t~ite25_13|, P1Thread1of1ForFork1_#t~ite26=|v_P1Thread1of1ForFork1_#t~ite26_10|} AuxVars[] AssignedVars[~a$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite27, P1Thread1of1ForFork1_#t~ite25, P1Thread1of1ForFork1_#t~ite26] because there is no mapped edge [2019-12-07 18:42:13,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In361572305 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In361572305 256) 0))) (or (and (= ~a$w_buff0_used~0_In361572305 |P0Thread1of1ForFork0_#t~ite5_Out361572305|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out361572305| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In361572305, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In361572305} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out361572305|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In361572305, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In361572305} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:42:13,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In-1288915243 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1288915243 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1288915243 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1288915243 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1288915243| ~a$w_buff1_used~0_In-1288915243) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-1288915243| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1288915243, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1288915243, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1288915243, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1288915243} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1288915243|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1288915243, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1288915243, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1288915243, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1288915243} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:42:13,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L755-->L756: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-367182374 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out-367182374 ~a$r_buff0_thd1~0_In-367182374)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-367182374 256)))) (or (and (= ~a$r_buff0_thd1~0_Out-367182374 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-367182374, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-367182374} OutVars{P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-367182374|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-367182374, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-367182374} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:42:13,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In705523308 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In705523308 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In705523308 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In705523308 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out705523308|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out705523308| ~a$r_buff1_thd1~0_In705523308)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In705523308, ~a$w_buff0_used~0=~a$w_buff0_used~0_In705523308, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In705523308, ~a$w_buff1_used~0=~a$w_buff1_used~0_In705523308} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In705523308, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out705523308|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In705523308, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In705523308, ~a$w_buff1_used~0=~a$w_buff1_used~0_In705523308} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:42:13,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L756-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:42:13,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L787-->L791: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_14 256))) (= v_~a~0_48 v_~a$mem_tmp~0_7) (= v_~a$flush_delayed~0_13 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_14} OutVars{~a~0=v_~a~0_48, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_13, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_11|} AuxVars[] AssignedVars[~a~0, ~a$flush_delayed~0, P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 18:42:13,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L791-2-->L791-5: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1351227930 256))) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1351227930 256) 0)) (.cse1 (= |P1Thread1of1ForFork1_#t~ite33_Out-1351227930| |P1Thread1of1ForFork1_#t~ite32_Out-1351227930|))) (or (and (not .cse0) .cse1 (not .cse2) (= ~a$w_buff1~0_In-1351227930 |P1Thread1of1ForFork1_#t~ite32_Out-1351227930|)) (and (or .cse2 .cse0) .cse1 (= ~a~0_In-1351227930 |P1Thread1of1ForFork1_#t~ite32_Out-1351227930|)))) InVars {~a~0=~a~0_In-1351227930, ~a$w_buff1~0=~a$w_buff1~0_In-1351227930, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1351227930, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1351227930} OutVars{~a~0=~a~0_In-1351227930, ~a$w_buff1~0=~a$w_buff1~0_In-1351227930, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1351227930, P1Thread1of1ForFork1_#t~ite32=|P1Thread1of1ForFork1_#t~ite32_Out-1351227930|, P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out-1351227930|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1351227930} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 18:42:13,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L792-->L792-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1601122066 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1601122066 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite34_Out1601122066| ~a$w_buff0_used~0_In1601122066) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite34_Out1601122066| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1601122066, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1601122066} OutVars{P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out1601122066|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1601122066, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1601122066} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 18:42:13,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L793-->L793-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In677684351 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In677684351 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In677684351 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In677684351 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite35_Out677684351|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In677684351 |P1Thread1of1ForFork1_#t~ite35_Out677684351|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In677684351, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In677684351, ~a$w_buff0_used~0=~a$w_buff0_used~0_In677684351, ~a$w_buff1_used~0=~a$w_buff1_used~0_In677684351} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In677684351, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In677684351, ~a$w_buff0_used~0=~a$w_buff0_used~0_In677684351, P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out677684351|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In677684351} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 18:42:13,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L794-->L794-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1782624063 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1782624063 256)))) (or (and (= ~a$r_buff0_thd2~0_In-1782624063 |P1Thread1of1ForFork1_#t~ite36_Out-1782624063|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite36_Out-1782624063|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1782624063, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1782624063} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1782624063, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1782624063, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out-1782624063|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 18:42:13,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L795-->L795-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In1465068762 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In1465068762 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In1465068762 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In1465068762 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite37_Out1465068762| ~a$r_buff1_thd2~0_In1465068762) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite37_Out1465068762| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1465068762, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1465068762, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1465068762, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1465068762} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1465068762, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1465068762, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1465068762, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1465068762, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out1465068762|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 18:42:13,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L795-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite37_22| v_~a$r_buff1_thd2~0_110) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_110, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 18:42:13,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L816-1-->L822: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_7|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 18:42:13,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L822-2-->L822-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In-1359538924 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1359538924 256)))) (or (and (= ~a~0_In-1359538924 |ULTIMATE.start_main_#t~ite40_Out-1359538924|) (or .cse0 .cse1)) (and (not .cse0) (= ~a$w_buff1~0_In-1359538924 |ULTIMATE.start_main_#t~ite40_Out-1359538924|) (not .cse1)))) InVars {~a~0=~a~0_In-1359538924, ~a$w_buff1~0=~a$w_buff1~0_In-1359538924, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1359538924, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1359538924} OutVars{~a~0=~a~0_In-1359538924, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-1359538924|, ~a$w_buff1~0=~a$w_buff1~0_In-1359538924, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1359538924, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1359538924} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-12-07 18:42:13,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L822-4-->L823: Formula: (= v_~a~0_26 |v_ULTIMATE.start_main_#t~ite40_17|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_17|} OutVars{~a~0=v_~a~0_26, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-12-07 18:42:13,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1317601513 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-1317601513 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite42_Out-1317601513|)) (and (= ~a$w_buff0_used~0_In-1317601513 |ULTIMATE.start_main_#t~ite42_Out-1317601513|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1317601513, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1317601513} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1317601513, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1317601513, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1317601513|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:42:13,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L824-->L824-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-608882128 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-608882128 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-608882128 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-608882128 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite43_Out-608882128|)) (and (or .cse3 .cse2) (= ~a$w_buff1_used~0_In-608882128 |ULTIMATE.start_main_#t~ite43_Out-608882128|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-608882128, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-608882128, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-608882128, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-608882128} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-608882128, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-608882128, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-608882128, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-608882128, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-608882128|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 18:42:13,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In1032081635 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1032081635 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out1032081635| ~a$r_buff0_thd0~0_In1032081635)) (and (= |ULTIMATE.start_main_#t~ite44_Out1032081635| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1032081635, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1032081635} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1032081635, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1032081635, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1032081635|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:42:13,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L826-->L826-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In54551120 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In54551120 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In54551120 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In54551120 256) 0))) (or (and (= ~a$r_buff1_thd0~0_In54551120 |ULTIMATE.start_main_#t~ite45_Out54551120|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite45_Out54551120|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In54551120, ~a$w_buff0_used~0=~a$w_buff0_used~0_In54551120, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In54551120, ~a$w_buff1_used~0=~a$w_buff1_used~0_In54551120} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In54551120, ~a$w_buff0_used~0=~a$w_buff0_used~0_In54551120, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In54551120, ~a$w_buff1_used~0=~a$w_buff1_used~0_In54551120, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out54551120|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:42:13,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L826-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~a$r_buff1_thd0~0_147 |v_ULTIMATE.start_main_#t~ite45_39|) (= v_~main$tmp_guard1~0_18 (ite (= (ite (not (and (= v_~__unbuffered_p1_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_86 0) (= 1 v_~__unbuffered_p1_EAX~0_18) (= 1 v_~__unbuffered_p0_EAX~0_88))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_18 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_39|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_147, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_38|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:42:13,519 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:42:13 BasicIcfg [2019-12-07 18:42:13,519 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:42:13,520 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:42:13,520 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:42:13,520 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:42:13,520 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:42:02" (3/4) ... [2019-12-07 18:42:13,522 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:42:13,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] ULTIMATE.startENTRY-->L814: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_316) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_cnt~0_62) (= v_~z~0_11 0) (= 0 v_~a$read_delayed~0_7) (= (store .cse0 |v_ULTIMATE.start_main_~#t841~0.base_35| 1) |v_#valid_63|) (= v_~y~0_90 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t841~0.base_35| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t841~0.base_35|) |v_ULTIMATE.start_main_~#t841~0.offset_23| 0)) |v_#memory_int_13|) (= 0 v_~a$r_buff1_thd2~0_271) (= v_~__unbuffered_p1_EBX~0_60 0) (= v_~a$flush_delayed~0_23 0) (= v_~main$tmp_guard1~0_43 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~a$w_buff0_used~0_830) (= 0 v_~a$w_buff1_used~0_501) (= 0 |v_#NULL.base_4|) (= (select .cse0 |v_ULTIMATE.start_main_~#t841~0.base_35|) 0) (= v_~x~0_85 0) (= 0 v_~a$r_buff1_thd1~0_132) (= 0 v_~weak$$choice0~0_11) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t841~0.base_35| 4) |v_#length_15|) (= 0 v_~a$r_buff0_thd1~0_236) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t841~0.base_35|) (= v_~main$tmp_guard0~0_21 0) (= 0 v_~a$r_buff0_thd2~0_373) (= |v_#NULL.offset_4| 0) (= v_~__unbuffered_p0_EBX~0_115 0) (= v_~a$mem_tmp~0_14 0) (= v_~weak$$choice2~0_107 0) (= |v_ULTIMATE.start_main_~#t841~0.offset_23| 0) (= v_~a~0_150 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~a$r_buff1_thd0~0_178 0) (= v_~a$r_buff0_thd0~0_163 0) (= v_~a$w_buff0~0_518 0) (= 0 v_~__unbuffered_p1_EAX~0_46) (= 0 v_~__unbuffered_p0_EAX~0_117))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{~a$read_delayed~0=v_~a$read_delayed~0_7, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_271, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_373, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_~#t842~0.offset=|v_ULTIMATE.start_main_~#t842~0.offset_16|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_43, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_163, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_75|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_63|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_87|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ~a~0=v_~a~0_150, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_117, ~a$w_buff1~0=v_~a$w_buff1~0_316, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_46, ULTIMATE.start_main_~#t841~0.base=|v_ULTIMATE.start_main_~#t841~0.base_35|, #length=|v_#length_15|, ULTIMATE.start_main_~#t841~0.offset=|v_ULTIMATE.start_main_~#t841~0.offset_23|, ~y~0=v_~y~0_90, ULTIMATE.start_main_~#t842~0.base=|v_ULTIMATE.start_main_~#t842~0.base_27|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_60, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_115, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_132, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_830, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_236, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_4|, ~weak$$choice0~0=v_~weak$$choice0~0_11, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_95|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_87|, ~a$w_buff0~0=v_~a$w_buff0~0_518, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_178, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_19|, ~z~0=v_~z~0_11, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_501, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~x~0=v_~x~0_85, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$read_delayed~0, ~a$r_buff1_thd2~0, ~a$r_buff0_thd2~0, #NULL.offset, ULTIMATE.start_main_~#t842~0.offset, ~main$tmp_guard1~0, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~a$mem_tmp~0, ~a~0, ~__unbuffered_p0_EAX~0, ~a$w_buff1~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t841~0.base, #length, ULTIMATE.start_main_~#t841~0.offset, ~y~0, ULTIMATE.start_main_~#t842~0.base, ~__unbuffered_p1_EBX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite40, ~a$w_buff0~0, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~x~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:42:13,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] P0ENTRY-->L4-3: Formula: (and (= ~a$w_buff0~0_In1799479695 ~a$w_buff1~0_Out1799479695) (= 1 ~a$w_buff0~0_Out1799479695) (= (ite (not (and (not (= 0 (mod ~a$w_buff1_used~0_Out1799479695 256))) (not (= (mod ~a$w_buff0_used~0_Out1799479695 256) 0)))) 1 0) |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1799479695|) (= ~a$w_buff1_used~0_Out1799479695 ~a$w_buff0_used~0_In1799479695) (= 1 ~a$w_buff0_used~0_Out1799479695) (= P0Thread1of1ForFork0_~arg.offset_Out1799479695 |P0Thread1of1ForFork0_#in~arg.offset_In1799479695|) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1799479695)) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1799479695| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1799479695) (= |P0Thread1of1ForFork0_#in~arg.base_In1799479695| P0Thread1of1ForFork0_~arg.base_Out1799479695)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1799479695|, ~a$w_buff0~0=~a$w_buff0~0_In1799479695, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1799479695|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1799479695} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1799479695|, ~a$w_buff1~0=~a$w_buff1~0_Out1799479695, ~a$w_buff0~0=~a$w_buff0~0_Out1799479695, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1799479695, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1799479695|, ~a$w_buff0_used~0=~a$w_buff0_used~0_Out1799479695, ~a$w_buff1_used~0=~a$w_buff1_used~0_Out1799479695, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out1799479695, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1799479695|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out1799479695} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~a$w_buff0_used~0, ~a$w_buff1_used~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:42:13,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L814-1-->L816: Formula: (and (not (= |v_ULTIMATE.start_main_~#t842~0.base_10| 0)) (= (select |v_#valid_20| |v_ULTIMATE.start_main_~#t842~0.base_10|) 0) (= (store |v_#valid_20| |v_ULTIMATE.start_main_~#t842~0.base_10| 1) |v_#valid_19|) (= |v_ULTIMATE.start_main_~#t842~0.offset_9| 0) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t842~0.base_10| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t842~0.base_10|) |v_ULTIMATE.start_main_~#t842~0.offset_9| 1))) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t842~0.base_10| 4) |v_#length_9|) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t842~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_20|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t842~0.base=|v_ULTIMATE.start_main_~#t842~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_19|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, ULTIMATE.start_main_~#t842~0.offset=|v_ULTIMATE.start_main_~#t842~0.offset_9|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t842~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t842~0.offset, #length] because there is no mapped edge [2019-12-07 18:42:13,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L783-->L783-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1365042778 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite23_Out-1365042778| ~a$w_buff1_used~0_In-1365042778) .cse0 (= |P1Thread1of1ForFork1_#t~ite24_Out-1365042778| |P1Thread1of1ForFork1_#t~ite23_Out-1365042778|) (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-1365042778 256) 0))) (or (and (= (mod ~a$w_buff1_used~0_In-1365042778 256) 0) .cse1) (and (= (mod ~a$r_buff1_thd2~0_In-1365042778 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-1365042778 256))))) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite23_In-1365042778| |P1Thread1of1ForFork1_#t~ite23_Out-1365042778|) (= |P1Thread1of1ForFork1_#t~ite24_Out-1365042778| ~a$w_buff1_used~0_In-1365042778)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1365042778, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1365042778, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_In-1365042778|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1365042778, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1365042778, ~weak$$choice2~0=~weak$$choice2~0_In-1365042778} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1365042778, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_Out-1365042778|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1365042778, P1Thread1of1ForFork1_#t~ite24=|P1Thread1of1ForFork1_#t~ite24_Out-1365042778|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1365042778, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1365042778, ~weak$$choice2~0=~weak$$choice2~0_In-1365042778} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite23, P1Thread1of1ForFork1_#t~ite24] because there is no mapped edge [2019-12-07 18:42:13,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L784-->L785: Formula: (and (not (= (mod v_~weak$$choice2~0_38 256) 0)) (= v_~a$r_buff0_thd2~0_146 v_~a$r_buff0_thd2~0_147)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_147, ~weak$$choice2~0=v_~weak$$choice2~0_38} OutVars{~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, P1Thread1of1ForFork1_#t~ite27=|v_P1Thread1of1ForFork1_#t~ite27_6|, ~weak$$choice2~0=v_~weak$$choice2~0_38, P1Thread1of1ForFork1_#t~ite25=|v_P1Thread1of1ForFork1_#t~ite25_13|, P1Thread1of1ForFork1_#t~ite26=|v_P1Thread1of1ForFork1_#t~ite26_10|} AuxVars[] AssignedVars[~a$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite27, P1Thread1of1ForFork1_#t~ite25, P1Thread1of1ForFork1_#t~ite26] because there is no mapped edge [2019-12-07 18:42:13,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In361572305 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In361572305 256) 0))) (or (and (= ~a$w_buff0_used~0_In361572305 |P0Thread1of1ForFork0_#t~ite5_Out361572305|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out361572305| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In361572305, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In361572305} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out361572305|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In361572305, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In361572305} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:42:13,527 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In-1288915243 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1288915243 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1288915243 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1288915243 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1288915243| ~a$w_buff1_used~0_In-1288915243) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-1288915243| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1288915243, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1288915243, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1288915243, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1288915243} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1288915243|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1288915243, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1288915243, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1288915243, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1288915243} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:42:13,527 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L755-->L756: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-367182374 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out-367182374 ~a$r_buff0_thd1~0_In-367182374)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-367182374 256)))) (or (and (= ~a$r_buff0_thd1~0_Out-367182374 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-367182374, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-367182374} OutVars{P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-367182374|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-367182374, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-367182374} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:42:13,527 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In705523308 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In705523308 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In705523308 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In705523308 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out705523308|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out705523308| ~a$r_buff1_thd1~0_In705523308)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In705523308, ~a$w_buff0_used~0=~a$w_buff0_used~0_In705523308, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In705523308, ~a$w_buff1_used~0=~a$w_buff1_used~0_In705523308} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In705523308, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out705523308|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In705523308, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In705523308, ~a$w_buff1_used~0=~a$w_buff1_used~0_In705523308} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:42:13,527 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L756-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:42:13,527 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L787-->L791: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_14 256))) (= v_~a~0_48 v_~a$mem_tmp~0_7) (= v_~a$flush_delayed~0_13 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_14} OutVars{~a~0=v_~a~0_48, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_13, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_11|} AuxVars[] AssignedVars[~a~0, ~a$flush_delayed~0, P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 18:42:13,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L791-2-->L791-5: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1351227930 256))) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1351227930 256) 0)) (.cse1 (= |P1Thread1of1ForFork1_#t~ite33_Out-1351227930| |P1Thread1of1ForFork1_#t~ite32_Out-1351227930|))) (or (and (not .cse0) .cse1 (not .cse2) (= ~a$w_buff1~0_In-1351227930 |P1Thread1of1ForFork1_#t~ite32_Out-1351227930|)) (and (or .cse2 .cse0) .cse1 (= ~a~0_In-1351227930 |P1Thread1of1ForFork1_#t~ite32_Out-1351227930|)))) InVars {~a~0=~a~0_In-1351227930, ~a$w_buff1~0=~a$w_buff1~0_In-1351227930, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1351227930, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1351227930} OutVars{~a~0=~a~0_In-1351227930, ~a$w_buff1~0=~a$w_buff1~0_In-1351227930, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1351227930, P1Thread1of1ForFork1_#t~ite32=|P1Thread1of1ForFork1_#t~ite32_Out-1351227930|, P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out-1351227930|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1351227930} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 18:42:13,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L792-->L792-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1601122066 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1601122066 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite34_Out1601122066| ~a$w_buff0_used~0_In1601122066) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite34_Out1601122066| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1601122066, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1601122066} OutVars{P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out1601122066|, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1601122066, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1601122066} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 18:42:13,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L793-->L793-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In677684351 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In677684351 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In677684351 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In677684351 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite35_Out677684351|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In677684351 |P1Thread1of1ForFork1_#t~ite35_Out677684351|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In677684351, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In677684351, ~a$w_buff0_used~0=~a$w_buff0_used~0_In677684351, ~a$w_buff1_used~0=~a$w_buff1_used~0_In677684351} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In677684351, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In677684351, ~a$w_buff0_used~0=~a$w_buff0_used~0_In677684351, P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out677684351|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In677684351} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 18:42:13,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L794-->L794-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1782624063 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1782624063 256)))) (or (and (= ~a$r_buff0_thd2~0_In-1782624063 |P1Thread1of1ForFork1_#t~ite36_Out-1782624063|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite36_Out-1782624063|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1782624063, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1782624063} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1782624063, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1782624063, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out-1782624063|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 18:42:13,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L795-->L795-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In1465068762 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In1465068762 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In1465068762 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In1465068762 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite37_Out1465068762| ~a$r_buff1_thd2~0_In1465068762) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite37_Out1465068762| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1465068762, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1465068762, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1465068762, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1465068762} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1465068762, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1465068762, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1465068762, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1465068762, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out1465068762|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 18:42:13,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L795-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite37_22| v_~a$r_buff1_thd2~0_110) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_110, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_21|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 18:42:13,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L816-1-->L822: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= (ite (= 2 v_~__unbuffered_cnt~0_15) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_7|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 18:42:13,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L822-2-->L822-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In-1359538924 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1359538924 256)))) (or (and (= ~a~0_In-1359538924 |ULTIMATE.start_main_#t~ite40_Out-1359538924|) (or .cse0 .cse1)) (and (not .cse0) (= ~a$w_buff1~0_In-1359538924 |ULTIMATE.start_main_#t~ite40_Out-1359538924|) (not .cse1)))) InVars {~a~0=~a~0_In-1359538924, ~a$w_buff1~0=~a$w_buff1~0_In-1359538924, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1359538924, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1359538924} OutVars{~a~0=~a~0_In-1359538924, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-1359538924|, ~a$w_buff1~0=~a$w_buff1~0_In-1359538924, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1359538924, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1359538924} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-12-07 18:42:13,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L822-4-->L823: Formula: (= v_~a~0_26 |v_ULTIMATE.start_main_#t~ite40_17|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_17|} OutVars{~a~0=v_~a~0_26, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-12-07 18:42:13,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1317601513 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-1317601513 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite42_Out-1317601513|)) (and (= ~a$w_buff0_used~0_In-1317601513 |ULTIMATE.start_main_#t~ite42_Out-1317601513|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1317601513, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1317601513} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1317601513, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1317601513, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1317601513|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:42:13,530 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L824-->L824-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-608882128 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-608882128 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-608882128 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-608882128 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite43_Out-608882128|)) (and (or .cse3 .cse2) (= ~a$w_buff1_used~0_In-608882128 |ULTIMATE.start_main_#t~ite43_Out-608882128|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-608882128, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-608882128, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-608882128, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-608882128} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-608882128, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-608882128, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-608882128, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-608882128, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-608882128|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 18:42:13,530 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In1032081635 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1032081635 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out1032081635| ~a$r_buff0_thd0~0_In1032081635)) (and (= |ULTIMATE.start_main_#t~ite44_Out1032081635| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1032081635, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1032081635} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1032081635, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1032081635, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1032081635|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:42:13,530 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L826-->L826-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In54551120 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In54551120 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In54551120 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In54551120 256) 0))) (or (and (= ~a$r_buff1_thd0~0_In54551120 |ULTIMATE.start_main_#t~ite45_Out54551120|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite45_Out54551120|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In54551120, ~a$w_buff0_used~0=~a$w_buff0_used~0_In54551120, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In54551120, ~a$w_buff1_used~0=~a$w_buff1_used~0_In54551120} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In54551120, ~a$w_buff0_used~0=~a$w_buff0_used~0_In54551120, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In54551120, ~a$w_buff1_used~0=~a$w_buff1_used~0_In54551120, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out54551120|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:42:13,530 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L826-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~a$r_buff1_thd0~0_147 |v_ULTIMATE.start_main_#t~ite45_39|) (= v_~main$tmp_guard1~0_18 (ite (= (ite (not (and (= v_~__unbuffered_p1_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_86 0) (= 1 v_~__unbuffered_p1_EAX~0_18) (= 1 v_~__unbuffered_p0_EAX~0_88))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_18 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_39|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_88, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_86, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_18, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_147, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_38|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:42:13,578 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_525a5b2f-660d-4f07-aa43-913ab4ef14c1/bin/uautomizer/witness.graphml [2019-12-07 18:42:13,578 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:42:13,579 INFO L168 Benchmark]: Toolchain (without parser) took 11696.50 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 310.9 MB). Free memory was 935.3 MB in the beginning and 831.4 MB in the end (delta: 104.0 MB). Peak memory consumption was 414.9 MB. Max. memory is 11.5 GB. [2019-12-07 18:42:13,579 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:42:13,580 INFO L168 Benchmark]: CACSL2BoogieTranslator took 375.04 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 935.3 MB in the beginning and 1.1 GB in the end (delta: -129.9 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:42:13,580 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:42:13,580 INFO L168 Benchmark]: Boogie Preprocessor took 24.43 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:42:13,580 INFO L168 Benchmark]: RCFGBuilder took 382.13 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.2 MB). Peak memory consumption was 50.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:42:13,581 INFO L168 Benchmark]: TraceAbstraction took 10816.66 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 213.4 MB). Free memory was 1.0 GB in the beginning and 854.0 MB in the end (delta: 155.7 MB). Peak memory consumption was 369.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:42:13,581 INFO L168 Benchmark]: Witness Printer took 58.58 ms. Allocated memory is still 1.3 GB. Free memory was 854.0 MB in the beginning and 831.4 MB in the end (delta: 22.6 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:42:13,582 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 375.04 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 935.3 MB in the beginning and 1.1 GB in the end (delta: -129.9 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.43 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 382.13 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.2 MB). Peak memory consumption was 50.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 10816.66 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 213.4 MB). Free memory was 1.0 GB in the beginning and 854.0 MB in the end (delta: 155.7 MB). Peak memory consumption was 369.1 MB. Max. memory is 11.5 GB. * Witness Printer took 58.58 ms. Allocated memory is still 1.3 GB. Free memory was 854.0 MB in the beginning and 831.4 MB in the end (delta: 22.6 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 151 ProgramPointsBefore, 77 ProgramPointsAfterwards, 185 TransitionsBefore, 89 TransitionsAfterwards, 12056 CoEnabledTransitionPairs, 8 FixpointIterations, 33 TrivialSequentialCompositions, 40 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 25 ChoiceCompositions, 5174 VarBasedMoverChecksPositive, 220 VarBasedMoverChecksNegative, 43 SemBasedMoverChecksPositive, 239 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 55357 CheckedPairsTotal, 107 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L814] FCALL, FORK 0 pthread_create(&t841, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L816] FCALL, FORK 0 pthread_create(&t842, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L737] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L738] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L739] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L740] 1 a$r_buff0_thd1 = (_Bool)1 [L743] 1 x = 1 [L746] 1 __unbuffered_p0_EAX = x [L749] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L766] 2 y = 1 [L769] 2 z = 1 [L772] 2 __unbuffered_p1_EAX = z [L775] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L776] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L777] 2 a$flush_delayed = weak$$choice2 [L778] 2 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L779] EXPR 2 !a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L779] 2 a = !a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff1) [L780] EXPR 2 weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff0))=1, x=1, y=1, z=1] [L780] 2 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : a$w_buff0)) [L752] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L781] EXPR 2 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=1] [L781] 2 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff1 : a$w_buff1)) [L782] EXPR 2 weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used))=1, x=1, y=1, z=1] [L782] 2 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used)) [L783] 2 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L785] EXPR 2 weak$$choice2 ? a$r_buff1_thd2 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$r_buff1_thd2 : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd2 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$r_buff1_thd2 : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L785] 2 a$r_buff1_thd2 = weak$$choice2 ? a$r_buff1_thd2 : (!a$w_buff0_used || !a$r_buff0_thd2 && !a$w_buff1_used || !a$r_buff0_thd2 && !a$r_buff1_thd2 ? a$r_buff1_thd2 : (a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L786] 2 __unbuffered_p1_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L752] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L753] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L754] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L791] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L791] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L792] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L793] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L794] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L822] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, z=1] [L823] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L824] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L825] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 145 locations, 2 error locations. Result: UNSAFE, OverallTime: 10.6s, OverallIterations: 23, TraceHistogramMax: 1, AutomataDifference: 4.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2911 SDtfs, 3414 SDslu, 6303 SDs, 0 SdLazy, 4879 SolverSat, 199 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 190 GetRequests, 43 SyntacticMatches, 18 SemanticMatches, 129 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 182 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8640occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.7s AutomataMinimizationTime, 22 MinimizatonAttempts, 7173 StatesRemovedByMinimization, 19 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 891 NumberOfCodeBlocks, 891 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 816 ConstructedInterpolants, 0 QuantifiedInterpolants, 247945 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 22 InterpolantComputations, 22 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...