./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix032_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix032_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1dd2b5e41eac6fc0e594add75003c08eb0cf80e6 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:51:34,999 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:51:35,000 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:51:35,008 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:51:35,008 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:51:35,009 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:51:35,010 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:51:35,011 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:51:35,012 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:51:35,013 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:51:35,014 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:51:35,014 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:51:35,015 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:51:35,015 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:51:35,016 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:51:35,017 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:51:35,017 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:51:35,018 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:51:35,019 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:51:35,021 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:51:35,022 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:51:35,022 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:51:35,023 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:51:35,023 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:51:35,025 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:51:35,025 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:51:35,025 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:51:35,026 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:51:35,026 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:51:35,027 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:51:35,027 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:51:35,027 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:51:35,028 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:51:35,028 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:51:35,029 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:51:35,029 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:51:35,029 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:51:35,029 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:51:35,029 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:51:35,030 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:51:35,030 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:51:35,031 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:51:35,040 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:51:35,040 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:51:35,041 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:51:35,041 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:51:35,041 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:51:35,041 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:51:35,041 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:51:35,041 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:51:35,041 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:51:35,041 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:51:35,041 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:51:35,042 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:51:35,042 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:51:35,042 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:51:35,042 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:51:35,042 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:51:35,042 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:51:35,042 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:51:35,042 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:51:35,042 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:51:35,043 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:51:35,043 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:51:35,043 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:51:35,043 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:51:35,043 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:51:35,043 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:51:35,043 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:51:35,043 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:51:35,043 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:51:35,044 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1dd2b5e41eac6fc0e594add75003c08eb0cf80e6 [2019-12-07 18:51:35,145 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:51:35,155 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:51:35,158 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:51:35,159 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:51:35,159 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:51:35,160 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix032_pso.oepc.i [2019-12-07 18:51:35,206 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/data/32e264020/783563e4b26e4ef49e1f9f9ec6e915b5/FLAG41cbac50c [2019-12-07 18:51:35,632 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:51:35,632 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/sv-benchmarks/c/pthread-wmm/mix032_pso.oepc.i [2019-12-07 18:51:35,645 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/data/32e264020/783563e4b26e4ef49e1f9f9ec6e915b5/FLAG41cbac50c [2019-12-07 18:51:35,984 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/data/32e264020/783563e4b26e4ef49e1f9f9ec6e915b5 [2019-12-07 18:51:35,986 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:51:35,987 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:51:35,988 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:51:35,988 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:51:35,991 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:51:35,992 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:51:35" (1/1) ... [2019-12-07 18:51:35,995 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@82a85e9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:35, skipping insertion in model container [2019-12-07 18:51:35,995 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:51:35" (1/1) ... [2019-12-07 18:51:36,003 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:51:36,042 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:51:36,294 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:51:36,301 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:51:36,343 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:51:36,390 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:51:36,390 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36 WrapperNode [2019-12-07 18:51:36,391 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:51:36,391 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:51:36,391 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:51:36,391 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:51:36,397 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36" (1/1) ... [2019-12-07 18:51:36,410 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36" (1/1) ... [2019-12-07 18:51:36,428 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:51:36,428 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:51:36,429 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:51:36,429 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:51:36,435 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36" (1/1) ... [2019-12-07 18:51:36,435 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36" (1/1) ... [2019-12-07 18:51:36,438 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36" (1/1) ... [2019-12-07 18:51:36,438 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36" (1/1) ... [2019-12-07 18:51:36,445 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36" (1/1) ... [2019-12-07 18:51:36,448 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36" (1/1) ... [2019-12-07 18:51:36,450 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36" (1/1) ... [2019-12-07 18:51:36,453 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:51:36,453 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:51:36,454 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:51:36,454 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:51:36,454 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:51:36,507 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:51:36,507 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:51:36,507 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:51:36,507 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:51:36,508 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:51:36,508 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:51:36,508 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:51:36,508 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:51:36,508 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:51:36,508 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:51:36,508 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:51:36,509 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:51:36,509 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:51:36,510 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:51:36,883 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:51:36,883 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:51:36,884 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:51:36 BoogieIcfgContainer [2019-12-07 18:51:36,884 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:51:36,884 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:51:36,884 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:51:36,887 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:51:36,887 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:51:35" (1/3) ... [2019-12-07 18:51:36,888 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4949843b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:51:36, skipping insertion in model container [2019-12-07 18:51:36,888 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:51:36" (2/3) ... [2019-12-07 18:51:36,888 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4949843b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:51:36, skipping insertion in model container [2019-12-07 18:51:36,888 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:51:36" (3/3) ... [2019-12-07 18:51:36,890 INFO L109 eAbstractionObserver]: Analyzing ICFG mix032_pso.oepc.i [2019-12-07 18:51:36,896 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:51:36,896 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:51:36,901 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:51:36,902 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:51:36,927 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,927 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,927 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,927 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,927 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,927 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,928 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,928 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,928 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,928 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,929 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,929 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,929 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,929 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,929 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,929 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,933 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,934 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,934 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,937 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,938 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,940 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,940 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,952 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,953 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,954 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,955 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,956 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,957 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,958 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,958 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,958 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:51:36,973 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:51:36,986 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:51:36,986 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:51:36,986 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:51:36,986 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:51:36,986 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:51:36,987 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:51:36,987 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:51:36,987 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:51:36,997 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 180 places, 217 transitions [2019-12-07 18:51:36,998 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 217 transitions [2019-12-07 18:51:37,063 INFO L134 PetriNetUnfolder]: 47/214 cut-off events. [2019-12-07 18:51:37,063 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:51:37,074 INFO L76 FinitePrefix]: Finished finitePrefix Result has 224 conditions, 214 events. 47/214 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 702 event pairs. 9/174 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:51:37,090 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 217 transitions [2019-12-07 18:51:37,129 INFO L134 PetriNetUnfolder]: 47/214 cut-off events. [2019-12-07 18:51:37,129 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:51:37,136 INFO L76 FinitePrefix]: Finished finitePrefix Result has 224 conditions, 214 events. 47/214 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 702 event pairs. 9/174 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:51:37,156 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:51:37,156 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:51:40,121 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2019-12-07 18:51:40,301 WARN L192 SmtUtils]: Spent 179.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 18:51:40,412 INFO L206 etLargeBlockEncoding]: Checked pairs total: 83556 [2019-12-07 18:51:40,412 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2019-12-07 18:51:40,414 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 96 places, 105 transitions [2019-12-07 18:51:58,781 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 129602 states. [2019-12-07 18:51:58,782 INFO L276 IsEmpty]: Start isEmpty. Operand 129602 states. [2019-12-07 18:51:58,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:51:58,786 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:51:58,786 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:51:58,786 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:51:58,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:51:58,790 INFO L82 PathProgramCache]: Analyzing trace with hash 923865, now seen corresponding path program 1 times [2019-12-07 18:51:58,796 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:51:58,796 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1880097177] [2019-12-07 18:51:58,796 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:51:58,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:51:58,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:51:58,924 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1880097177] [2019-12-07 18:51:58,925 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:51:58,925 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:51:58,926 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324469817] [2019-12-07 18:51:58,928 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:51:58,929 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:51:58,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:51:58,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:51:58,939 INFO L87 Difference]: Start difference. First operand 129602 states. Second operand 3 states. [2019-12-07 18:51:59,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:51:59,734 INFO L93 Difference]: Finished difference Result 128376 states and 546782 transitions. [2019-12-07 18:51:59,735 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:51:59,735 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:51:59,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:00,408 INFO L225 Difference]: With dead ends: 128376 [2019-12-07 18:52:00,408 INFO L226 Difference]: Without dead ends: 120914 [2019-12-07 18:52:00,409 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:06,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120914 states. [2019-12-07 18:52:08,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120914 to 120914. [2019-12-07 18:52:08,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120914 states. [2019-12-07 18:52:08,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120914 states to 120914 states and 514358 transitions. [2019-12-07 18:52:08,622 INFO L78 Accepts]: Start accepts. Automaton has 120914 states and 514358 transitions. Word has length 3 [2019-12-07 18:52:08,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:08,622 INFO L462 AbstractCegarLoop]: Abstraction has 120914 states and 514358 transitions. [2019-12-07 18:52:08,622 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:08,622 INFO L276 IsEmpty]: Start isEmpty. Operand 120914 states and 514358 transitions. [2019-12-07 18:52:08,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:52:08,625 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:08,625 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:08,626 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:08,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:08,626 INFO L82 PathProgramCache]: Analyzing trace with hash 2102120012, now seen corresponding path program 1 times [2019-12-07 18:52:08,626 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:08,626 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509312660] [2019-12-07 18:52:08,626 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:08,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:08,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:08,688 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509312660] [2019-12-07 18:52:08,688 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:08,688 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:52:08,688 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1214680405] [2019-12-07 18:52:08,689 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:52:08,689 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:08,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:52:08,689 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:52:08,689 INFO L87 Difference]: Start difference. First operand 120914 states and 514358 transitions. Second operand 4 states. [2019-12-07 18:52:10,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:10,078 INFO L93 Difference]: Finished difference Result 187704 states and 768206 transitions. [2019-12-07 18:52:10,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:52:10,079 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:52:10,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:10,597 INFO L225 Difference]: With dead ends: 187704 [2019-12-07 18:52:10,598 INFO L226 Difference]: Without dead ends: 187655 [2019-12-07 18:52:10,598 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:16,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187655 states. [2019-12-07 18:52:21,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187655 to 171775. [2019-12-07 18:52:21,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171775 states. [2019-12-07 18:52:21,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171775 states to 171775 states and 711726 transitions. [2019-12-07 18:52:21,847 INFO L78 Accepts]: Start accepts. Automaton has 171775 states and 711726 transitions. Word has length 11 [2019-12-07 18:52:21,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:21,847 INFO L462 AbstractCegarLoop]: Abstraction has 171775 states and 711726 transitions. [2019-12-07 18:52:21,847 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:52:21,847 INFO L276 IsEmpty]: Start isEmpty. Operand 171775 states and 711726 transitions. [2019-12-07 18:52:21,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:52:21,851 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:21,851 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:21,852 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:21,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:21,852 INFO L82 PathProgramCache]: Analyzing trace with hash -1617299066, now seen corresponding path program 1 times [2019-12-07 18:52:21,852 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:21,852 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776844078] [2019-12-07 18:52:21,852 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:21,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:21,892 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:21,892 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [776844078] [2019-12-07 18:52:21,892 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:21,893 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:52:21,893 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1867730590] [2019-12-07 18:52:21,893 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:21,893 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:21,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:21,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:21,893 INFO L87 Difference]: Start difference. First operand 171775 states and 711726 transitions. Second operand 3 states. [2019-12-07 18:52:22,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:22,009 INFO L93 Difference]: Finished difference Result 36261 states and 117727 transitions. [2019-12-07 18:52:22,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:22,010 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 18:52:22,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:22,063 INFO L225 Difference]: With dead ends: 36261 [2019-12-07 18:52:22,063 INFO L226 Difference]: Without dead ends: 36261 [2019-12-07 18:52:22,063 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:22,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36261 states. [2019-12-07 18:52:22,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36261 to 36261. [2019-12-07 18:52:22,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36261 states. [2019-12-07 18:52:23,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36261 states to 36261 states and 117727 transitions. [2019-12-07 18:52:23,017 INFO L78 Accepts]: Start accepts. Automaton has 36261 states and 117727 transitions. Word has length 13 [2019-12-07 18:52:23,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:23,018 INFO L462 AbstractCegarLoop]: Abstraction has 36261 states and 117727 transitions. [2019-12-07 18:52:23,018 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:23,018 INFO L276 IsEmpty]: Start isEmpty. Operand 36261 states and 117727 transitions. [2019-12-07 18:52:23,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:52:23,020 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:23,020 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:23,020 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:23,021 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:23,021 INFO L82 PathProgramCache]: Analyzing trace with hash 947448332, now seen corresponding path program 1 times [2019-12-07 18:52:23,021 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:23,021 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1230535596] [2019-12-07 18:52:23,021 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:23,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:23,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:23,079 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1230535596] [2019-12-07 18:52:23,080 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:23,080 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:23,080 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [425845368] [2019-12-07 18:52:23,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:52:23,080 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:23,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:52:23,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:23,081 INFO L87 Difference]: Start difference. First operand 36261 states and 117727 transitions. Second operand 5 states. [2019-12-07 18:52:23,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:23,435 INFO L93 Difference]: Finished difference Result 50300 states and 161544 transitions. [2019-12-07 18:52:23,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:52:23,436 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:52:23,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:23,513 INFO L225 Difference]: With dead ends: 50300 [2019-12-07 18:52:23,513 INFO L226 Difference]: Without dead ends: 50300 [2019-12-07 18:52:23,514 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:52:23,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50300 states. [2019-12-07 18:52:24,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50300 to 43029. [2019-12-07 18:52:24,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43029 states. [2019-12-07 18:52:24,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43029 states to 43029 states and 139308 transitions. [2019-12-07 18:52:24,301 INFO L78 Accepts]: Start accepts. Automaton has 43029 states and 139308 transitions. Word has length 16 [2019-12-07 18:52:24,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:24,302 INFO L462 AbstractCegarLoop]: Abstraction has 43029 states and 139308 transitions. [2019-12-07 18:52:24,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:52:24,302 INFO L276 IsEmpty]: Start isEmpty. Operand 43029 states and 139308 transitions. [2019-12-07 18:52:24,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:52:24,309 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:24,309 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:24,309 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:24,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:24,310 INFO L82 PathProgramCache]: Analyzing trace with hash -282717849, now seen corresponding path program 1 times [2019-12-07 18:52:24,310 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:24,310 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [17884104] [2019-12-07 18:52:24,310 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:24,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:24,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:24,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [17884104] [2019-12-07 18:52:24,373 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:24,373 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:52:24,373 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [25852539] [2019-12-07 18:52:24,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:52:24,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:24,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:52:24,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:52:24,374 INFO L87 Difference]: Start difference. First operand 43029 states and 139308 transitions. Second operand 6 states. [2019-12-07 18:52:24,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:24,961 INFO L93 Difference]: Finished difference Result 64122 states and 202692 transitions. [2019-12-07 18:52:24,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:52:24,961 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 18:52:24,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:25,056 INFO L225 Difference]: With dead ends: 64122 [2019-12-07 18:52:25,056 INFO L226 Difference]: Without dead ends: 64115 [2019-12-07 18:52:25,057 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:52:25,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64115 states. [2019-12-07 18:52:25,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64115 to 42953. [2019-12-07 18:52:25,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42953 states. [2019-12-07 18:52:25,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42953 states to 42953 states and 138310 transitions. [2019-12-07 18:52:25,949 INFO L78 Accepts]: Start accepts. Automaton has 42953 states and 138310 transitions. Word has length 22 [2019-12-07 18:52:25,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:25,949 INFO L462 AbstractCegarLoop]: Abstraction has 42953 states and 138310 transitions. [2019-12-07 18:52:25,949 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:52:25,949 INFO L276 IsEmpty]: Start isEmpty. Operand 42953 states and 138310 transitions. [2019-12-07 18:52:25,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:52:25,960 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:25,960 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:25,960 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:25,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:25,960 INFO L82 PathProgramCache]: Analyzing trace with hash -71664384, now seen corresponding path program 1 times [2019-12-07 18:52:25,961 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:25,961 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788871681] [2019-12-07 18:52:25,961 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:25,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:26,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:26,013 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1788871681] [2019-12-07 18:52:26,013 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:26,013 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:26,013 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [555397248] [2019-12-07 18:52:26,014 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:52:26,014 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:26,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:52:26,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:26,014 INFO L87 Difference]: Start difference. First operand 42953 states and 138310 transitions. Second operand 5 states. [2019-12-07 18:52:26,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:26,743 INFO L93 Difference]: Finished difference Result 59467 states and 187866 transitions. [2019-12-07 18:52:26,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:52:26,743 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:52:26,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:26,820 INFO L225 Difference]: With dead ends: 59467 [2019-12-07 18:52:26,820 INFO L226 Difference]: Without dead ends: 59454 [2019-12-07 18:52:26,821 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:52:27,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59454 states. [2019-12-07 18:52:27,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59454 to 50886. [2019-12-07 18:52:27,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50886 states. [2019-12-07 18:52:27,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50886 states to 50886 states and 163152 transitions. [2019-12-07 18:52:27,749 INFO L78 Accepts]: Start accepts. Automaton has 50886 states and 163152 transitions. Word has length 25 [2019-12-07 18:52:27,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:27,749 INFO L462 AbstractCegarLoop]: Abstraction has 50886 states and 163152 transitions. [2019-12-07 18:52:27,749 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:52:27,749 INFO L276 IsEmpty]: Start isEmpty. Operand 50886 states and 163152 transitions. [2019-12-07 18:52:27,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:52:27,764 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:27,764 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:27,764 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:27,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:27,764 INFO L82 PathProgramCache]: Analyzing trace with hash -1418175430, now seen corresponding path program 1 times [2019-12-07 18:52:27,764 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:27,764 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090398971] [2019-12-07 18:52:27,765 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:27,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:27,800 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:27,800 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1090398971] [2019-12-07 18:52:27,800 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:27,800 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:27,800 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [179385883] [2019-12-07 18:52:27,801 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:27,801 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:27,801 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:27,801 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:27,801 INFO L87 Difference]: Start difference. First operand 50886 states and 163152 transitions. Second operand 3 states. [2019-12-07 18:52:28,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:28,038 INFO L93 Difference]: Finished difference Result 74013 states and 234091 transitions. [2019-12-07 18:52:28,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:28,039 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 18:52:28,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:28,156 INFO L225 Difference]: With dead ends: 74013 [2019-12-07 18:52:28,156 INFO L226 Difference]: Without dead ends: 74013 [2019-12-07 18:52:28,157 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:28,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74013 states. [2019-12-07 18:52:29,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74013 to 56506. [2019-12-07 18:52:29,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56506 states. [2019-12-07 18:52:29,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56506 states to 56506 states and 179474 transitions. [2019-12-07 18:52:29,259 INFO L78 Accepts]: Start accepts. Automaton has 56506 states and 179474 transitions. Word has length 27 [2019-12-07 18:52:29,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:29,259 INFO L462 AbstractCegarLoop]: Abstraction has 56506 states and 179474 transitions. [2019-12-07 18:52:29,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:29,259 INFO L276 IsEmpty]: Start isEmpty. Operand 56506 states and 179474 transitions. [2019-12-07 18:52:29,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:52:29,274 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:29,274 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:29,274 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:29,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:29,275 INFO L82 PathProgramCache]: Analyzing trace with hash 1834697800, now seen corresponding path program 1 times [2019-12-07 18:52:29,275 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:29,275 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1227447377] [2019-12-07 18:52:29,275 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:29,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:29,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:29,329 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1227447377] [2019-12-07 18:52:29,329 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:29,329 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:52:29,329 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367723822] [2019-12-07 18:52:29,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:52:29,329 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:29,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:52:29,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:52:29,330 INFO L87 Difference]: Start difference. First operand 56506 states and 179474 transitions. Second operand 6 states. [2019-12-07 18:52:29,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:29,834 INFO L93 Difference]: Finished difference Result 78952 states and 245809 transitions. [2019-12-07 18:52:29,835 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:52:29,835 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:52:29,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:29,950 INFO L225 Difference]: With dead ends: 78952 [2019-12-07 18:52:29,950 INFO L226 Difference]: Without dead ends: 78910 [2019-12-07 18:52:29,950 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:52:30,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78910 states. [2019-12-07 18:52:31,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78910 to 61263. [2019-12-07 18:52:31,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61263 states. [2019-12-07 18:52:31,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61263 states to 61263 states and 194050 transitions. [2019-12-07 18:52:31,152 INFO L78 Accepts]: Start accepts. Automaton has 61263 states and 194050 transitions. Word has length 27 [2019-12-07 18:52:31,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:31,152 INFO L462 AbstractCegarLoop]: Abstraction has 61263 states and 194050 transitions. [2019-12-07 18:52:31,152 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:52:31,152 INFO L276 IsEmpty]: Start isEmpty. Operand 61263 states and 194050 transitions. [2019-12-07 18:52:31,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:52:31,172 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:31,172 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:31,172 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:31,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:31,172 INFO L82 PathProgramCache]: Analyzing trace with hash -451110081, now seen corresponding path program 1 times [2019-12-07 18:52:31,172 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:31,172 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197981003] [2019-12-07 18:52:31,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:31,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:31,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:31,225 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197981003] [2019-12-07 18:52:31,225 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:31,225 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:52:31,225 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889077092] [2019-12-07 18:52:31,225 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:52:31,226 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:31,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:52:31,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:31,226 INFO L87 Difference]: Start difference. First operand 61263 states and 194050 transitions. Second operand 5 states. [2019-12-07 18:52:31,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:31,775 INFO L93 Difference]: Finished difference Result 81964 states and 257627 transitions. [2019-12-07 18:52:31,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:52:31,775 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 18:52:31,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:31,895 INFO L225 Difference]: With dead ends: 81964 [2019-12-07 18:52:31,895 INFO L226 Difference]: Without dead ends: 81964 [2019-12-07 18:52:31,895 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:52:32,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81964 states. [2019-12-07 18:52:33,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81964 to 72748. [2019-12-07 18:52:33,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72748 states. [2019-12-07 18:52:33,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72748 states to 72748 states and 230494 transitions. [2019-12-07 18:52:33,183 INFO L78 Accepts]: Start accepts. Automaton has 72748 states and 230494 transitions. Word has length 28 [2019-12-07 18:52:33,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:33,184 INFO L462 AbstractCegarLoop]: Abstraction has 72748 states and 230494 transitions. [2019-12-07 18:52:33,184 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:52:33,184 INFO L276 IsEmpty]: Start isEmpty. Operand 72748 states and 230494 transitions. [2019-12-07 18:52:33,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:52:33,212 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:33,212 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:33,212 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:33,212 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:33,212 INFO L82 PathProgramCache]: Analyzing trace with hash 1998937694, now seen corresponding path program 1 times [2019-12-07 18:52:33,212 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:33,212 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [17395305] [2019-12-07 18:52:33,213 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:33,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:33,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:33,256 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [17395305] [2019-12-07 18:52:33,257 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:33,257 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:52:33,257 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1430143298] [2019-12-07 18:52:33,257 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:52:33,257 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:33,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:52:33,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:33,258 INFO L87 Difference]: Start difference. First operand 72748 states and 230494 transitions. Second operand 5 states. [2019-12-07 18:52:33,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:33,901 INFO L93 Difference]: Finished difference Result 96973 states and 304376 transitions. [2019-12-07 18:52:33,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:52:33,901 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 18:52:33,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:34,044 INFO L225 Difference]: With dead ends: 96973 [2019-12-07 18:52:34,044 INFO L226 Difference]: Without dead ends: 96966 [2019-12-07 18:52:34,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:52:34,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96966 states. [2019-12-07 18:52:35,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96966 to 78600. [2019-12-07 18:52:35,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78600 states. [2019-12-07 18:52:35,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78600 states to 78600 states and 249474 transitions. [2019-12-07 18:52:35,558 INFO L78 Accepts]: Start accepts. Automaton has 78600 states and 249474 transitions. Word has length 29 [2019-12-07 18:52:35,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:35,559 INFO L462 AbstractCegarLoop]: Abstraction has 78600 states and 249474 transitions. [2019-12-07 18:52:35,559 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:52:35,559 INFO L276 IsEmpty]: Start isEmpty. Operand 78600 states and 249474 transitions. [2019-12-07 18:52:35,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:52:35,586 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:35,586 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:35,586 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:35,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:35,586 INFO L82 PathProgramCache]: Analyzing trace with hash -197713206, now seen corresponding path program 1 times [2019-12-07 18:52:35,587 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:35,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474109682] [2019-12-07 18:52:35,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:35,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:35,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:35,621 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [474109682] [2019-12-07 18:52:35,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:35,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:35,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1464515376] [2019-12-07 18:52:35,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:52:35,622 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:35,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:52:35,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:52:35,622 INFO L87 Difference]: Start difference. First operand 78600 states and 249474 transitions. Second operand 4 states. [2019-12-07 18:52:35,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:35,721 INFO L93 Difference]: Finished difference Result 34947 states and 104906 transitions. [2019-12-07 18:52:35,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:52:35,722 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 18:52:35,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:35,765 INFO L225 Difference]: With dead ends: 34947 [2019-12-07 18:52:35,765 INFO L226 Difference]: Without dead ends: 34947 [2019-12-07 18:52:35,765 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:52:35,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34947 states. [2019-12-07 18:52:36,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34947 to 31996. [2019-12-07 18:52:36,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31996 states. [2019-12-07 18:52:36,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31996 states to 31996 states and 96256 transitions. [2019-12-07 18:52:36,253 INFO L78 Accepts]: Start accepts. Automaton has 31996 states and 96256 transitions. Word has length 29 [2019-12-07 18:52:36,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:36,253 INFO L462 AbstractCegarLoop]: Abstraction has 31996 states and 96256 transitions. [2019-12-07 18:52:36,253 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:52:36,253 INFO L276 IsEmpty]: Start isEmpty. Operand 31996 states and 96256 transitions. [2019-12-07 18:52:36,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:52:36,276 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:36,276 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:36,276 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:36,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:36,276 INFO L82 PathProgramCache]: Analyzing trace with hash -2065332723, now seen corresponding path program 1 times [2019-12-07 18:52:36,276 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:36,277 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [275848478] [2019-12-07 18:52:36,277 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:36,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:36,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:36,324 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [275848478] [2019-12-07 18:52:36,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:36,325 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:52:36,325 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [433331060] [2019-12-07 18:52:36,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:52:36,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:36,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:52:36,325 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:52:36,325 INFO L87 Difference]: Start difference. First operand 31996 states and 96256 transitions. Second operand 7 states. [2019-12-07 18:52:36,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:36,980 INFO L93 Difference]: Finished difference Result 44448 states and 130829 transitions. [2019-12-07 18:52:36,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:52:36,980 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:52:36,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:37,030 INFO L225 Difference]: With dead ends: 44448 [2019-12-07 18:52:37,031 INFO L226 Difference]: Without dead ends: 44448 [2019-12-07 18:52:37,031 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:52:37,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44448 states. [2019-12-07 18:52:37,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44448 to 32040. [2019-12-07 18:52:37,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32040 states. [2019-12-07 18:52:37,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32040 states to 32040 states and 96502 transitions. [2019-12-07 18:52:37,573 INFO L78 Accepts]: Start accepts. Automaton has 32040 states and 96502 transitions. Word has length 33 [2019-12-07 18:52:37,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:37,573 INFO L462 AbstractCegarLoop]: Abstraction has 32040 states and 96502 transitions. [2019-12-07 18:52:37,573 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:52:37,573 INFO L276 IsEmpty]: Start isEmpty. Operand 32040 states and 96502 transitions. [2019-12-07 18:52:37,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:52:37,602 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:37,602 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:37,603 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:37,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:37,603 INFO L82 PathProgramCache]: Analyzing trace with hash 603828080, now seen corresponding path program 1 times [2019-12-07 18:52:37,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:37,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662073333] [2019-12-07 18:52:37,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:37,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:37,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:37,635 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662073333] [2019-12-07 18:52:37,635 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:37,635 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:52:37,635 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [376254018] [2019-12-07 18:52:37,636 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:37,636 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:37,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:37,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:37,636 INFO L87 Difference]: Start difference. First operand 32040 states and 96502 transitions. Second operand 3 states. [2019-12-07 18:52:37,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:37,705 INFO L93 Difference]: Finished difference Result 26471 states and 78350 transitions. [2019-12-07 18:52:37,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:37,706 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 18:52:37,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:37,738 INFO L225 Difference]: With dead ends: 26471 [2019-12-07 18:52:37,738 INFO L226 Difference]: Without dead ends: 26471 [2019-12-07 18:52:37,739 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:37,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26471 states. [2019-12-07 18:52:38,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26471 to 26307. [2019-12-07 18:52:38,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26307 states. [2019-12-07 18:52:38,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26307 states to 26307 states and 77892 transitions. [2019-12-07 18:52:38,114 INFO L78 Accepts]: Start accepts. Automaton has 26307 states and 77892 transitions. Word has length 39 [2019-12-07 18:52:38,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:38,115 INFO L462 AbstractCegarLoop]: Abstraction has 26307 states and 77892 transitions. [2019-12-07 18:52:38,115 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:38,115 INFO L276 IsEmpty]: Start isEmpty. Operand 26307 states and 77892 transitions. [2019-12-07 18:52:38,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:52:38,135 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:38,135 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:38,136 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:38,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:38,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1759080769, now seen corresponding path program 1 times [2019-12-07 18:52:38,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:38,136 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738649353] [2019-12-07 18:52:38,136 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:38,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:38,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:38,178 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1738649353] [2019-12-07 18:52:38,178 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:38,178 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:52:38,179 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242466338] [2019-12-07 18:52:38,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:38,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:38,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:38,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:38,179 INFO L87 Difference]: Start difference. First operand 26307 states and 77892 transitions. Second operand 3 states. [2019-12-07 18:52:38,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:38,272 INFO L93 Difference]: Finished difference Result 26221 states and 77629 transitions. [2019-12-07 18:52:38,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:38,273 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 18:52:38,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:38,303 INFO L225 Difference]: With dead ends: 26221 [2019-12-07 18:52:38,303 INFO L226 Difference]: Without dead ends: 26221 [2019-12-07 18:52:38,303 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:38,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26221 states. [2019-12-07 18:52:38,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26221 to 22162. [2019-12-07 18:52:38,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22162 states. [2019-12-07 18:52:38,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22162 states to 22162 states and 66335 transitions. [2019-12-07 18:52:38,650 INFO L78 Accepts]: Start accepts. Automaton has 22162 states and 66335 transitions. Word has length 40 [2019-12-07 18:52:38,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:38,650 INFO L462 AbstractCegarLoop]: Abstraction has 22162 states and 66335 transitions. [2019-12-07 18:52:38,650 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:38,650 INFO L276 IsEmpty]: Start isEmpty. Operand 22162 states and 66335 transitions. [2019-12-07 18:52:38,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:52:38,668 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:38,668 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:38,668 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:38,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:38,668 INFO L82 PathProgramCache]: Analyzing trace with hash 1843753540, now seen corresponding path program 1 times [2019-12-07 18:52:38,669 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:38,669 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [121195842] [2019-12-07 18:52:38,669 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:38,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:38,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:38,710 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [121195842] [2019-12-07 18:52:38,710 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:38,710 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:52:38,710 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [855030899] [2019-12-07 18:52:38,711 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:52:38,711 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:38,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:52:38,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:38,711 INFO L87 Difference]: Start difference. First operand 22162 states and 66335 transitions. Second operand 5 states. [2019-12-07 18:52:38,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:38,780 INFO L93 Difference]: Finished difference Result 20581 states and 62860 transitions. [2019-12-07 18:52:38,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:52:38,780 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 18:52:38,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:38,802 INFO L225 Difference]: With dead ends: 20581 [2019-12-07 18:52:38,802 INFO L226 Difference]: Without dead ends: 20581 [2019-12-07 18:52:38,802 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:38,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20581 states. [2019-12-07 18:52:39,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20581 to 18875. [2019-12-07 18:52:39,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18875 states. [2019-12-07 18:52:39,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18875 states to 18875 states and 57789 transitions. [2019-12-07 18:52:39,109 INFO L78 Accepts]: Start accepts. Automaton has 18875 states and 57789 transitions. Word has length 41 [2019-12-07 18:52:39,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:39,109 INFO L462 AbstractCegarLoop]: Abstraction has 18875 states and 57789 transitions. [2019-12-07 18:52:39,109 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:52:39,109 INFO L276 IsEmpty]: Start isEmpty. Operand 18875 states and 57789 transitions. [2019-12-07 18:52:39,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:52:39,125 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:39,125 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:39,125 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:39,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:39,125 INFO L82 PathProgramCache]: Analyzing trace with hash -1628177899, now seen corresponding path program 1 times [2019-12-07 18:52:39,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:39,126 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1981236844] [2019-12-07 18:52:39,126 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:39,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:39,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:39,156 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1981236844] [2019-12-07 18:52:39,156 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:39,156 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:39,157 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1609714217] [2019-12-07 18:52:39,157 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:39,157 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:39,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:39,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:39,158 INFO L87 Difference]: Start difference. First operand 18875 states and 57789 transitions. Second operand 3 states. [2019-12-07 18:52:39,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:39,228 INFO L93 Difference]: Finished difference Result 23234 states and 69884 transitions. [2019-12-07 18:52:39,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:39,228 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:52:39,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:39,251 INFO L225 Difference]: With dead ends: 23234 [2019-12-07 18:52:39,251 INFO L226 Difference]: Without dead ends: 23234 [2019-12-07 18:52:39,252 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:39,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23234 states. [2019-12-07 18:52:39,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23234 to 18262. [2019-12-07 18:52:39,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18262 states. [2019-12-07 18:52:39,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18262 states to 18262 states and 55066 transitions. [2019-12-07 18:52:39,551 INFO L78 Accepts]: Start accepts. Automaton has 18262 states and 55066 transitions. Word has length 66 [2019-12-07 18:52:39,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:39,551 INFO L462 AbstractCegarLoop]: Abstraction has 18262 states and 55066 transitions. [2019-12-07 18:52:39,551 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:39,551 INFO L276 IsEmpty]: Start isEmpty. Operand 18262 states and 55066 transitions. [2019-12-07 18:52:39,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:52:39,566 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:39,566 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:39,566 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:39,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:39,567 INFO L82 PathProgramCache]: Analyzing trace with hash 1017702190, now seen corresponding path program 1 times [2019-12-07 18:52:39,567 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:39,567 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [578606193] [2019-12-07 18:52:39,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:39,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:39,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:39,603 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [578606193] [2019-12-07 18:52:39,603 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:39,603 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:52:39,603 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1737834318] [2019-12-07 18:52:39,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:52:39,603 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:39,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:52:39,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:39,604 INFO L87 Difference]: Start difference. First operand 18262 states and 55066 transitions. Second operand 3 states. [2019-12-07 18:52:39,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:39,683 INFO L93 Difference]: Finished difference Result 21389 states and 64650 transitions. [2019-12-07 18:52:39,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:52:39,684 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:52:39,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:39,705 INFO L225 Difference]: With dead ends: 21389 [2019-12-07 18:52:39,705 INFO L226 Difference]: Without dead ends: 21389 [2019-12-07 18:52:39,706 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:52:39,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21389 states. [2019-12-07 18:52:39,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21389 to 16890. [2019-12-07 18:52:39,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16890 states. [2019-12-07 18:52:39,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16890 states to 16890 states and 51344 transitions. [2019-12-07 18:52:39,976 INFO L78 Accepts]: Start accepts. Automaton has 16890 states and 51344 transitions. Word has length 66 [2019-12-07 18:52:39,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:39,976 INFO L462 AbstractCegarLoop]: Abstraction has 16890 states and 51344 transitions. [2019-12-07 18:52:39,976 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:52:39,976 INFO L276 IsEmpty]: Start isEmpty. Operand 16890 states and 51344 transitions. [2019-12-07 18:52:39,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:52:39,990 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:39,990 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:39,990 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:39,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:39,990 INFO L82 PathProgramCache]: Analyzing trace with hash 1992119349, now seen corresponding path program 1 times [2019-12-07 18:52:39,990 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:39,990 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1348465309] [2019-12-07 18:52:39,990 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:40,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:40,028 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:40,028 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1348465309] [2019-12-07 18:52:40,028 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:40,028 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:40,028 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [20794548] [2019-12-07 18:52:40,028 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:52:40,029 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:40,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:52:40,029 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:52:40,029 INFO L87 Difference]: Start difference. First operand 16890 states and 51344 transitions. Second operand 4 states. [2019-12-07 18:52:40,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:40,107 INFO L93 Difference]: Finished difference Result 16705 states and 50579 transitions. [2019-12-07 18:52:40,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:52:40,107 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:52:40,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:40,125 INFO L225 Difference]: With dead ends: 16705 [2019-12-07 18:52:40,125 INFO L226 Difference]: Without dead ends: 16705 [2019-12-07 18:52:40,125 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:40,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16705 states. [2019-12-07 18:52:40,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16705 to 14642. [2019-12-07 18:52:40,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14642 states. [2019-12-07 18:52:40,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14642 states to 14642 states and 44238 transitions. [2019-12-07 18:52:40,354 INFO L78 Accepts]: Start accepts. Automaton has 14642 states and 44238 transitions. Word has length 67 [2019-12-07 18:52:40,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:40,354 INFO L462 AbstractCegarLoop]: Abstraction has 14642 states and 44238 transitions. [2019-12-07 18:52:40,354 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:52:40,354 INFO L276 IsEmpty]: Start isEmpty. Operand 14642 states and 44238 transitions. [2019-12-07 18:52:40,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:52:40,367 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:40,367 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:40,367 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:40,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:40,367 INFO L82 PathProgramCache]: Analyzing trace with hash 1668578459, now seen corresponding path program 1 times [2019-12-07 18:52:40,367 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:40,367 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1500778632] [2019-12-07 18:52:40,368 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:40,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:40,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:40,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1500778632] [2019-12-07 18:52:40,453 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:40,453 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:40,453 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2011769716] [2019-12-07 18:52:40,453 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:52:40,453 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:40,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:52:40,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:52:40,454 INFO L87 Difference]: Start difference. First operand 14642 states and 44238 transitions. Second operand 4 states. [2019-12-07 18:52:40,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:40,539 INFO L93 Difference]: Finished difference Result 26314 states and 79589 transitions. [2019-12-07 18:52:40,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:52:40,539 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:52:40,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:40,563 INFO L225 Difference]: With dead ends: 26314 [2019-12-07 18:52:40,564 INFO L226 Difference]: Without dead ends: 23519 [2019-12-07 18:52:40,564 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:40,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23519 states. [2019-12-07 18:52:40,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23519 to 14089. [2019-12-07 18:52:40,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14089 states. [2019-12-07 18:52:40,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14089 states to 14089 states and 42503 transitions. [2019-12-07 18:52:40,831 INFO L78 Accepts]: Start accepts. Automaton has 14089 states and 42503 transitions. Word has length 67 [2019-12-07 18:52:40,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:40,832 INFO L462 AbstractCegarLoop]: Abstraction has 14089 states and 42503 transitions. [2019-12-07 18:52:40,832 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:52:40,832 INFO L276 IsEmpty]: Start isEmpty. Operand 14089 states and 42503 transitions. [2019-12-07 18:52:40,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:52:40,845 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:40,845 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:40,845 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:40,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:40,845 INFO L82 PathProgramCache]: Analyzing trace with hash -1376638825, now seen corresponding path program 2 times [2019-12-07 18:52:40,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:40,845 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078157396] [2019-12-07 18:52:40,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:40,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:40,918 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:40,918 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078157396] [2019-12-07 18:52:40,919 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:40,919 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:52:40,919 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1822941947] [2019-12-07 18:52:40,919 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:52:40,919 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:40,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:52:40,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:40,919 INFO L87 Difference]: Start difference. First operand 14089 states and 42503 transitions. Second operand 5 states. [2019-12-07 18:52:40,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:40,991 INFO L93 Difference]: Finished difference Result 24021 states and 72709 transitions. [2019-12-07 18:52:40,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:52:40,991 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 18:52:40,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:41,002 INFO L225 Difference]: With dead ends: 24021 [2019-12-07 18:52:41,002 INFO L226 Difference]: Without dead ends: 10920 [2019-12-07 18:52:41,002 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:52:41,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10920 states. [2019-12-07 18:52:41,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10920 to 10920. [2019-12-07 18:52:41,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10920 states. [2019-12-07 18:52:41,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10920 states to 10920 states and 33116 transitions. [2019-12-07 18:52:41,166 INFO L78 Accepts]: Start accepts. Automaton has 10920 states and 33116 transitions. Word has length 67 [2019-12-07 18:52:41,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:41,166 INFO L462 AbstractCegarLoop]: Abstraction has 10920 states and 33116 transitions. [2019-12-07 18:52:41,167 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:52:41,167 INFO L276 IsEmpty]: Start isEmpty. Operand 10920 states and 33116 transitions. [2019-12-07 18:52:41,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:52:41,175 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:41,175 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:41,175 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:41,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:41,176 INFO L82 PathProgramCache]: Analyzing trace with hash 1541701607, now seen corresponding path program 3 times [2019-12-07 18:52:41,176 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:41,176 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204556208] [2019-12-07 18:52:41,176 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:41,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:41,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:41,225 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1204556208] [2019-12-07 18:52:41,225 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:41,225 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:52:41,226 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1279599739] [2019-12-07 18:52:41,226 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:52:41,226 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:41,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:52:41,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:52:41,226 INFO L87 Difference]: Start difference. First operand 10920 states and 33116 transitions. Second operand 4 states. [2019-12-07 18:52:41,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:41,281 INFO L93 Difference]: Finished difference Result 19244 states and 58645 transitions. [2019-12-07 18:52:41,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:52:41,281 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:52:41,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:41,291 INFO L225 Difference]: With dead ends: 19244 [2019-12-07 18:52:41,291 INFO L226 Difference]: Without dead ends: 9178 [2019-12-07 18:52:41,291 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:52:41,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9178 states. [2019-12-07 18:52:41,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9178 to 9178. [2019-12-07 18:52:41,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9178 states. [2019-12-07 18:52:41,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9178 states to 9178 states and 27909 transitions. [2019-12-07 18:52:41,428 INFO L78 Accepts]: Start accepts. Automaton has 9178 states and 27909 transitions. Word has length 67 [2019-12-07 18:52:41,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:41,429 INFO L462 AbstractCegarLoop]: Abstraction has 9178 states and 27909 transitions. [2019-12-07 18:52:41,429 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:52:41,429 INFO L276 IsEmpty]: Start isEmpty. Operand 9178 states and 27909 transitions. [2019-12-07 18:52:41,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:52:41,436 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:41,436 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:41,436 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:41,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:41,436 INFO L82 PathProgramCache]: Analyzing trace with hash -1000943315, now seen corresponding path program 4 times [2019-12-07 18:52:41,436 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:41,436 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517946151] [2019-12-07 18:52:41,436 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:41,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:52:41,571 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:52:41,571 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [517946151] [2019-12-07 18:52:41,571 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:52:41,571 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:52:41,571 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [90180934] [2019-12-07 18:52:41,571 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:52:41,571 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:52:41,572 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:52:41,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:52:41,572 INFO L87 Difference]: Start difference. First operand 9178 states and 27909 transitions. Second operand 11 states. [2019-12-07 18:52:42,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:52:42,185 INFO L93 Difference]: Finished difference Result 18815 states and 55749 transitions. [2019-12-07 18:52:42,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 18:52:42,186 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:52:42,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:52:42,198 INFO L225 Difference]: With dead ends: 18815 [2019-12-07 18:52:42,198 INFO L226 Difference]: Without dead ends: 12436 [2019-12-07 18:52:42,199 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 285 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=213, Invalid=977, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 18:52:42,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12436 states. [2019-12-07 18:52:42,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12436 to 10345. [2019-12-07 18:52:42,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10345 states. [2019-12-07 18:52:42,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10345 states to 10345 states and 30750 transitions. [2019-12-07 18:52:42,371 INFO L78 Accepts]: Start accepts. Automaton has 10345 states and 30750 transitions. Word has length 67 [2019-12-07 18:52:42,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:52:42,371 INFO L462 AbstractCegarLoop]: Abstraction has 10345 states and 30750 transitions. [2019-12-07 18:52:42,371 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:52:42,371 INFO L276 IsEmpty]: Start isEmpty. Operand 10345 states and 30750 transitions. [2019-12-07 18:52:42,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:52:42,379 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:52:42,379 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:52:42,379 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:52:42,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:52:42,379 INFO L82 PathProgramCache]: Analyzing trace with hash -1748623595, now seen corresponding path program 5 times [2019-12-07 18:52:42,379 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:52:42,380 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [35345614] [2019-12-07 18:52:42,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:52:42,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:52:42,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:52:42,468 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:52:42,469 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:52:42,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [905] [905] ULTIMATE.startENTRY-->L842: Formula: (let ((.cse0 (store |v_#valid_67| 0 0))) (and (= v_~b$r_buff1_thd0~0_230 0) (= v_~b$w_buff1~0_176 0) (= v_~b$mem_tmp~0_20 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t855~0.base_25| 4)) (= v_~weak$$choice2~0_144 0) (= 0 v_~b$r_buff1_thd3~0_337) (= 0 v_~b$read_delayed~0_7) (= 0 v_~b$r_buff0_thd2~0_182) (= 0 v_~__unbuffered_p0_EAX~0_176) (= v_~__unbuffered_p1_EBX~0_38 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t855~0.base_25|) 0) (= v_~main$tmp_guard1~0_34 0) (= v_~y~0_19 0) (= 0 v_~__unbuffered_p1_EAX~0_38) (= v_~b$r_buff0_thd0~0_204 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~b$r_buff1_thd1~0_215) (= v_~a~0_14 0) (= 0 v_~x~0_124) (= 0 v_~b$r_buff0_thd3~0_395) (= v_~__unbuffered_p2_EBX~0_38 0) (= v_~b$read_delayed_var~0.offset_7 0) (= v_~z~0_23 0) (= 0 |v_ULTIMATE.start_main_~#t855~0.offset_17|) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p2_EAX~0_34) (= 0 v_~b$w_buff0_used~0_787) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t855~0.base_25|) (= |v_#NULL.offset_4| 0) (= |v_#valid_65| (store .cse0 |v_ULTIMATE.start_main_~#t855~0.base_25| 1)) (= 0 v_~b$w_buff0~0_250) (= v_~__unbuffered_cnt~0_137 0) (= 0 v_~b$w_buff1_used~0_450) (= 0 v_~b$r_buff1_thd2~0_222) (= 0 v_~weak$$choice0~0_13) (= v_~b~0_186 0) (= v_~main$tmp_guard0~0_24 0) (= v_~b$flush_delayed~0_35 0) (= 0 v_~b$read_delayed_var~0.base_7) (= 0 v_~b$r_buff0_thd1~0_323) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t855~0.base_25| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t855~0.base_25|) |v_ULTIMATE.start_main_~#t855~0.offset_17| 0)) |v_#memory_int_23|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_67|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_395, ~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_215, ~b$read_delayed_var~0.offset=v_~b$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_35|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_245|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_51|, ~b$w_buff0_used~0=v_~b$w_buff0_used~0_787, ~a~0=v_~a~0_14, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_176, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_38, #length=|v_#length_25|, ~b$w_buff0~0=v_~b$w_buff0~0_250, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ULTIMATE.start_main_~#t855~0.offset=|v_ULTIMATE.start_main_~#t855~0.offset_17|, ULTIMATE.start_main_~#t855~0.base=|v_ULTIMATE.start_main_~#t855~0.base_25|, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_204, ~b$r_buff0_thd2~0=v_~b$r_buff0_thd2~0_182, ~b$mem_tmp~0=v_~b$mem_tmp~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~b$flush_delayed~0=v_~b$flush_delayed~0_35, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ULTIMATE.start_main_~#t856~0.offset=|v_ULTIMATE.start_main_~#t856~0.offset_17|, ~b$read_delayed~0=v_~b$read_delayed~0_7, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~b$w_buff1~0=v_~b$w_buff1~0_176, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_137, ULTIMATE.start_main_~#t857~0.offset=|v_ULTIMATE.start_main_~#t857~0.offset_17|, ~x~0=v_~x~0_124, ~b$r_buff0_thd1~0=v_~b$r_buff0_thd1~0_323, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~b$w_buff1_used~0=v_~b$w_buff1_used~0_450, ~y~0=v_~y~0_19, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_222, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_230, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_38, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ULTIMATE.start_main_~#t857~0.base=|v_ULTIMATE.start_main_~#t857~0.base_21|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_4|, ~b$read_delayed_var~0.base=v_~b$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t856~0.base=|v_ULTIMATE.start_main_~#t856~0.base_21|, ~b~0=v_~b~0_186, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_28|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_23, ~weak$$choice2~0=v_~weak$$choice2~0_144, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_337} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, ~b$r_buff1_thd1~0, ~b$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ~b$w_buff0_used~0, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~b$w_buff0~0, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t855~0.offset, ULTIMATE.start_main_~#t855~0.base, ~b$r_buff0_thd0~0, ~b$r_buff0_thd2~0, ~b$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~b$flush_delayed~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t856~0.offset, ~b$read_delayed~0, ~weak$$choice0~0, ~b$w_buff1~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t857~0.offset, ~x~0, ~b$r_buff0_thd1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite51, ~b$w_buff1_used~0, ~y~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd0~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t857~0.base, ~main$tmp_guard0~0, #NULL.base, ~b$read_delayed_var~0.base, ULTIMATE.start_main_~#t856~0.base, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 18:52:42,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [864] [864] L842-1-->L844: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t856~0.base_10|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t856~0.base_10| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t856~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t856~0.base_10|) |v_ULTIMATE.start_main_~#t856~0.offset_9| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t856~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t856~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t856~0.offset_9| 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t856~0.base_10| 4) |v_#length_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t856~0.base=|v_ULTIMATE.start_main_~#t856~0.base_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t856~0.offset=|v_ULTIMATE.start_main_~#t856~0.offset_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t856~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t856~0.offset, #length] because there is no mapped edge [2019-12-07 18:52:42,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L844-1-->L846: Formula: (and (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t857~0.base_13| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t857~0.base_13| 4)) (= 0 |v_ULTIMATE.start_main_~#t857~0.offset_11|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t857~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t857~0.base_13|) |v_ULTIMATE.start_main_~#t857~0.offset_11| 2)) |v_#memory_int_15|) (not (= 0 |v_ULTIMATE.start_main_~#t857~0.base_13|)) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t857~0.base_13|) 0) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t857~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t857~0.base=|v_ULTIMATE.start_main_~#t857~0.base_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t857~0.offset=|v_ULTIMATE.start_main_~#t857~0.offset_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t857~0.base, #length, ULTIMATE.start_main_~#t857~0.offset] because there is no mapped edge [2019-12-07 18:52:42,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L4-->L754: Formula: (and (= ~b$r_buff0_thd2~0_In-1415524499 ~b$r_buff1_thd2~0_Out-1415524499) (= ~b$r_buff1_thd3~0_Out-1415524499 ~b$r_buff0_thd3~0_In-1415524499) (not (= P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1415524499 0)) (= ~b$r_buff0_thd1~0_In-1415524499 ~b$r_buff1_thd1~0_Out-1415524499) (= ~b$r_buff0_thd0~0_In-1415524499 ~b$r_buff1_thd0~0_Out-1415524499) (= 1 ~b$r_buff0_thd1~0_Out-1415524499) (= ~x~0_In-1415524499 ~__unbuffered_p0_EAX~0_Out-1415524499)) InVars {~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1415524499, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1415524499, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1415524499, P0Thread1of1ForFork2___VERIFIER_assert_~expression=P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1415524499, ~x~0=~x~0_In-1415524499, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1415524499} OutVars{~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-1415524499, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1415524499, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-1415524499, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1415524499, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_Out-1415524499, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_Out-1415524499, P0Thread1of1ForFork2___VERIFIER_assert_~expression=P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1415524499, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_Out-1415524499, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_Out-1415524499, ~x~0=~x~0_In-1415524499, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1415524499} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, ~__unbuffered_p0_EAX~0, ~b$r_buff1_thd1~0, ~b$r_buff1_thd0~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 18:52:42,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L780-2-->L780-4: Formula: (let ((.cse1 (= (mod ~b$w_buff1_used~0_In-1952664660 256) 0)) (.cse0 (= (mod ~b$r_buff1_thd2~0_In-1952664660 256) 0))) (or (and (not .cse0) (not .cse1) (= ~b$w_buff1~0_In-1952664660 |P1Thread1of1ForFork0_#t~ite9_Out-1952664660|)) (and (= ~b~0_In-1952664660 |P1Thread1of1ForFork0_#t~ite9_Out-1952664660|) (or .cse1 .cse0)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-1952664660, ~b~0=~b~0_In-1952664660, ~b$w_buff1~0=~b$w_buff1~0_In-1952664660, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1952664660} OutVars{~b$w_buff1_used~0=~b$w_buff1_used~0_In-1952664660, ~b~0=~b~0_In-1952664660, ~b$w_buff1~0=~b$w_buff1~0_In-1952664660, P1Thread1of1ForFork0_#t~ite9=|P1Thread1of1ForFork0_#t~ite9_Out-1952664660|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1952664660} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 18:52:42,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L780-4-->L781: Formula: (= v_~b~0_66 |v_P1Thread1of1ForFork0_#t~ite9_32|) InVars {P1Thread1of1ForFork0_#t~ite9=|v_P1Thread1of1ForFork0_#t~ite9_32|} OutVars{~b~0=v_~b~0_66, P1Thread1of1ForFork0_#t~ite10=|v_P1Thread1of1ForFork0_#t~ite10_51|, P1Thread1of1ForFork0_#t~ite9=|v_P1Thread1of1ForFork0_#t~ite9_31|} AuxVars[] AssignedVars[~b~0, P1Thread1of1ForFork0_#t~ite10, P1Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 18:52:42,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In-407672834 256))) (.cse0 (= (mod ~b$w_buff0_used~0_In-407672834 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork0_#t~ite11_Out-407672834|)) (and (= |P1Thread1of1ForFork0_#t~ite11_Out-407672834| ~b$w_buff0_used~0_In-407672834) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-407672834, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-407672834} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-407672834, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-407672834, P1Thread1of1ForFork0_#t~ite11=|P1Thread1of1ForFork0_#t~ite11_Out-407672834|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 18:52:42,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L782-->L782-2: Formula: (let ((.cse3 (= (mod ~b$w_buff1_used~0_In452041543 256) 0)) (.cse2 (= 0 (mod ~b$r_buff1_thd2~0_In452041543 256))) (.cse0 (= (mod ~b$w_buff0_used~0_In452041543 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd2~0_In452041543 256) 0))) (or (and (= ~b$w_buff1_used~0_In452041543 |P1Thread1of1ForFork0_#t~ite12_Out452041543|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork0_#t~ite12_Out452041543|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In452041543, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In452041543, ~b$w_buff1_used~0=~b$w_buff1_used~0_In452041543, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In452041543} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In452041543, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In452041543, ~b$w_buff1_used~0=~b$w_buff1_used~0_In452041543, P1Thread1of1ForFork0_#t~ite12=|P1Thread1of1ForFork0_#t~ite12_Out452041543|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In452041543} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 18:52:42,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L783-->L783-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In-870822879 256))) (.cse0 (= (mod ~b$w_buff0_used~0_In-870822879 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork0_#t~ite13_Out-870822879| 0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite13_Out-870822879| ~b$r_buff0_thd2~0_In-870822879) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-870822879, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-870822879} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-870822879, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-870822879, P1Thread1of1ForFork0_#t~ite13=|P1Thread1of1ForFork0_#t~ite13_Out-870822879|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 18:52:42,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L784-->L784-2: Formula: (let ((.cse1 (= (mod ~b$w_buff1_used~0_In-463200055 256) 0)) (.cse0 (= 0 (mod ~b$r_buff1_thd2~0_In-463200055 256))) (.cse2 (= 0 (mod ~b$r_buff0_thd2~0_In-463200055 256))) (.cse3 (= 0 (mod ~b$w_buff0_used~0_In-463200055 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite14_Out-463200055| ~b$r_buff1_thd2~0_In-463200055)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite14_Out-463200055| 0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-463200055, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-463200055, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-463200055, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-463200055} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-463200055, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-463200055, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-463200055, P1Thread1of1ForFork0_#t~ite14=|P1Thread1of1ForFork0_#t~ite14_Out-463200055|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-463200055} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 18:52:42,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L784-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1)) (= v_~b$r_buff1_thd2~0_85 |v_P1Thread1of1ForFork0_#t~ite14_30|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_30|} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_29|, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_85, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~__unbuffered_cnt~0, P1Thread1of1ForFork0_#t~ite14, P1Thread1of1ForFork0_#res.offset, ~b$r_buff1_thd2~0, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:52:42,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L808-->L808-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1264116692 256)))) (or (and (let ((.cse0 (= (mod ~b$r_buff0_thd3~0_In-1264116692 256) 0))) (or (= (mod ~b$w_buff0_used~0_In-1264116692 256) 0) (and (= 0 (mod ~b$w_buff1_used~0_In-1264116692 256)) .cse0) (and (= (mod ~b$r_buff1_thd3~0_In-1264116692 256) 0) .cse0))) (= |P2Thread1of1ForFork1_#t~ite20_Out-1264116692| ~b$w_buff0~0_In-1264116692) .cse1 (= |P2Thread1of1ForFork1_#t~ite21_Out-1264116692| |P2Thread1of1ForFork1_#t~ite20_Out-1264116692|)) (and (= |P2Thread1of1ForFork1_#t~ite20_In-1264116692| |P2Thread1of1ForFork1_#t~ite20_Out-1264116692|) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite21_Out-1264116692| ~b$w_buff0~0_In-1264116692)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1264116692, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1264116692, P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_In-1264116692|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1264116692, ~b$w_buff0~0=~b$w_buff0~0_In-1264116692, ~weak$$choice2~0=~weak$$choice2~0_In-1264116692, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1264116692} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1264116692, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1264116692, P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_Out-1264116692|, P2Thread1of1ForFork1_#t~ite21=|P2Thread1of1ForFork1_#t~ite21_Out-1264116692|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1264116692, ~b$w_buff0~0=~b$w_buff0~0_In-1264116692, ~weak$$choice2~0=~weak$$choice2~0_In-1264116692, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1264116692} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite20, P2Thread1of1ForFork1_#t~ite21] because there is no mapped edge [2019-12-07 18:52:42,478 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [885] [885] L810-->L810-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In2108626186 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In2108626186 256)))) (or (and (= (mod ~b$r_buff1_thd3~0_In2108626186 256) 0) .cse0) (and (= (mod ~b$w_buff1_used~0_In2108626186 256) 0) .cse0) (= 0 (mod ~b$w_buff0_used~0_In2108626186 256)))) .cse1 (= |P2Thread1of1ForFork1_#t~ite26_Out2108626186| |P2Thread1of1ForFork1_#t~ite27_Out2108626186|) (= ~b$w_buff0_used~0_In2108626186 |P2Thread1of1ForFork1_#t~ite26_Out2108626186|)) (and (not .cse1) (= |P2Thread1of1ForFork1_#t~ite26_In2108626186| |P2Thread1of1ForFork1_#t~ite26_Out2108626186|) (= ~b$w_buff0_used~0_In2108626186 |P2Thread1of1ForFork1_#t~ite27_Out2108626186|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In2108626186, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In2108626186, P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_In2108626186|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In2108626186, ~weak$$choice2~0=~weak$$choice2~0_In2108626186, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2108626186} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In2108626186, P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_Out2108626186|, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In2108626186, P2Thread1of1ForFork1_#t~ite27=|P2Thread1of1ForFork1_#t~ite27_Out2108626186|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In2108626186, ~weak$$choice2~0=~weak$$choice2~0_In2108626186, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2108626186} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite26, P2Thread1of1ForFork1_#t~ite27] because there is no mapped edge [2019-12-07 18:52:42,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L812-->L813: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_15 256))) (= v_~b$r_buff0_thd3~0_79 v_~b$r_buff0_thd3~0_78)) InVars {~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_79, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_78, P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite31=|v_P2Thread1of1ForFork1_#t~ite31_6|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_7|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite31, P2Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 18:52:42,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L815-->L819: Formula: (and (= v_~b$flush_delayed~0_7 0) (not (= (mod v_~b$flush_delayed~0_8 256) 0)) (= v_~b~0_30 v_~b$mem_tmp~0_5)) InVars {~b$mem_tmp~0=v_~b$mem_tmp~0_5, ~b$flush_delayed~0=v_~b$flush_delayed~0_8} OutVars{~b$mem_tmp~0=v_~b$mem_tmp~0_5, P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_5|, ~b~0=v_~b~0_30, ~b$flush_delayed~0=v_~b$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, ~b~0, ~b$flush_delayed~0] because there is no mapped edge [2019-12-07 18:52:42,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L819-2-->L819-4: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd3~0_In2121795100 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In2121795100 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite38_Out2121795100| ~b~0_In2121795100)) (and (not .cse1) (= ~b$w_buff1~0_In2121795100 |P2Thread1of1ForFork1_#t~ite38_Out2121795100|) (not .cse0)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In2121795100, ~b~0=~b~0_In2121795100, ~b$w_buff1~0=~b$w_buff1~0_In2121795100, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2121795100} OutVars{P2Thread1of1ForFork1_#t~ite38=|P2Thread1of1ForFork1_#t~ite38_Out2121795100|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In2121795100, ~b~0=~b~0_In2121795100, ~b$w_buff1~0=~b$w_buff1~0_In2121795100, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2121795100} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite38] because there is no mapped edge [2019-12-07 18:52:42,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L819-4-->L820: Formula: (= v_~b~0_46 |v_P2Thread1of1ForFork1_#t~ite38_10|) InVars {P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_10|} OutVars{P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_9|, ~b~0=v_~b~0_46, P2Thread1of1ForFork1_#t~ite39=|v_P2Thread1of1ForFork1_#t~ite39_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite38, ~b~0, P2Thread1of1ForFork1_#t~ite39] because there is no mapped edge [2019-12-07 18:52:42,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L820-->L820-2: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff0_used~0_In-521468395 256))) (.cse1 (= 0 (mod ~b$r_buff0_thd3~0_In-521468395 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite40_Out-521468395| 0)) (and (or .cse0 .cse1) (= ~b$w_buff0_used~0_In-521468395 |P2Thread1of1ForFork1_#t~ite40_Out-521468395|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-521468395, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-521468395} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-521468395, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-521468395, P2Thread1of1ForFork1_#t~ite40=|P2Thread1of1ForFork1_#t~ite40_Out-521468395|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite40] because there is no mapped edge [2019-12-07 18:52:42,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L821-->L821-2: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff1_used~0_In1671347061 256))) (.cse1 (= (mod ~b$r_buff1_thd3~0_In1671347061 256) 0)) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In1671347061 256))) (.cse3 (= 0 (mod ~b$r_buff0_thd3~0_In1671347061 256)))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite41_Out1671347061|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~b$w_buff1_used~0_In1671347061 |P2Thread1of1ForFork1_#t~ite41_Out1671347061|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1671347061, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1671347061, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1671347061, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1671347061} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1671347061, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1671347061, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1671347061, P2Thread1of1ForFork1_#t~ite41=|P2Thread1of1ForFork1_#t~ite41_Out1671347061|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1671347061} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite41] because there is no mapped edge [2019-12-07 18:52:42,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L822-->L822-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In882751459 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd3~0_In882751459 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite42_Out882751459| 0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite42_Out882751459| ~b$r_buff0_thd3~0_In882751459) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In882751459, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In882751459} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In882751459, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In882751459, P2Thread1of1ForFork1_#t~ite42=|P2Thread1of1ForFork1_#t~ite42_Out882751459|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite42] because there is no mapped edge [2019-12-07 18:52:42,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L823-->L823-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff1_thd3~0_In-2143117665 256))) (.cse2 (= (mod ~b$w_buff1_used~0_In-2143117665 256) 0)) (.cse0 (= (mod ~b$w_buff0_used~0_In-2143117665 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd3~0_In-2143117665 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite43_Out-2143117665| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork1_#t~ite43_Out-2143117665| ~b$r_buff1_thd3~0_In-2143117665) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2143117665, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-2143117665, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2143117665, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-2143117665} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2143117665, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-2143117665, P2Thread1of1ForFork1_#t~ite43=|P2Thread1of1ForFork1_#t~ite43_Out-2143117665|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2143117665, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-2143117665} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43] because there is no mapped edge [2019-12-07 18:52:42,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L823-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= |v_P2Thread1of1ForFork1_#t~ite43_42| v_~b$r_buff1_thd3~0_140) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_41|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_140, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, ~b$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:52:42,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L755-->L755-2: Formula: (let ((.cse1 (= (mod ~b$r_buff0_thd1~0_In1283384557 256) 0)) (.cse0 (= (mod ~b$w_buff0_used~0_In1283384557 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite5_Out1283384557| 0) (not .cse1)) (and (= |P0Thread1of1ForFork2_#t~ite5_Out1283384557| ~b$w_buff0_used~0_In1283384557) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1283384557, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1283384557} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1283384557, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1283384557, P0Thread1of1ForFork2_#t~ite5=|P0Thread1of1ForFork2_#t~ite5_Out1283384557|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:52:42,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff1_used~0_In-383124840 256))) (.cse0 (= 0 (mod ~b$r_buff1_thd1~0_In-383124840 256))) (.cse2 (= (mod ~b$w_buff0_used~0_In-383124840 256) 0)) (.cse3 (= (mod ~b$r_buff0_thd1~0_In-383124840 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite6_Out-383124840| ~b$w_buff1_used~0_In-383124840) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork2_#t~ite6_Out-383124840| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-383124840, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-383124840, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-383124840, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-383124840} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-383124840, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-383124840, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-383124840, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-383124840, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out-383124840|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:52:42,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L757-->L758: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In405294578 256) 0)) (.cse1 (= ~b$r_buff0_thd1~0_Out405294578 ~b$r_buff0_thd1~0_In405294578)) (.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In405294578 256)))) (or (and .cse0 .cse1) (and (= 0 ~b$r_buff0_thd1~0_Out405294578) (not .cse0) (not .cse2)) (and .cse1 .cse2))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In405294578, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In405294578} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In405294578, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out405294578, P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out405294578|} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:52:42,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In-1840162023 256))) (.cse3 (= (mod ~b$w_buff0_used~0_In-1840162023 256) 0)) (.cse1 (= 0 (mod ~b$w_buff1_used~0_In-1840162023 256))) (.cse0 (= (mod ~b$r_buff1_thd1~0_In-1840162023 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite8_Out-1840162023| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P0Thread1of1ForFork2_#t~ite8_Out-1840162023| ~b$r_buff1_thd1~0_In-1840162023) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1840162023, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1840162023, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1840162023, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1840162023} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1840162023, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1840162023, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1840162023, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1840162023, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-1840162023|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:52:42,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L758-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite8_34| v_~b$r_buff1_thd1~0_103) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81} OutVars{~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_103, P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_33|, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~b$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:52:42,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L846-1-->L852: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_33) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:52:42,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L852-2-->L852-4: Formula: (let ((.cse0 (= 0 (mod ~b$r_buff1_thd0~0_In946620745 256))) (.cse1 (= 0 (mod ~b$w_buff1_used~0_In946620745 256)))) (or (and (= ~b~0_In946620745 |ULTIMATE.start_main_#t~ite47_Out946620745|) (or .cse0 .cse1)) (and (not .cse0) (= ~b$w_buff1~0_In946620745 |ULTIMATE.start_main_#t~ite47_Out946620745|) (not .cse1)))) InVars {~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In946620745, ~b$w_buff1_used~0=~b$w_buff1_used~0_In946620745, ~b~0=~b~0_In946620745, ~b$w_buff1~0=~b$w_buff1~0_In946620745} OutVars{~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In946620745, ~b$w_buff1_used~0=~b$w_buff1_used~0_In946620745, ~b~0=~b~0_In946620745, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out946620745|, ~b$w_buff1~0=~b$w_buff1~0_In946620745} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:52:42,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L852-4-->L853: Formula: (= v_~b~0_51 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{~b~0=v_~b~0_51, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~b~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:52:42,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L853-->L853-2: Formula: (let ((.cse1 (= (mod ~b$w_buff0_used~0_In-941929762 256) 0)) (.cse0 (= (mod ~b$r_buff0_thd0~0_In-941929762 256) 0))) (or (and (or .cse0 .cse1) (= ~b$w_buff0_used~0_In-941929762 |ULTIMATE.start_main_#t~ite49_Out-941929762|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out-941929762|) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-941929762, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-941929762} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-941929762, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-941929762|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-941929762} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:52:42,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L854-->L854-2: Formula: (let ((.cse3 (= (mod ~b$r_buff0_thd0~0_In-1414130094 256) 0)) (.cse2 (= (mod ~b$w_buff0_used~0_In-1414130094 256) 0)) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In-1414130094 256))) (.cse1 (= (mod ~b$r_buff1_thd0~0_In-1414130094 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite50_Out-1414130094| ~b$w_buff1_used~0_In-1414130094)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite50_Out-1414130094| 0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1414130094, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1414130094, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1414130094, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1414130094} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1414130094|, ~b$w_buff0_used~0=~b$w_buff0_used~0_In-1414130094, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1414130094, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1414130094, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1414130094} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:52:42,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L855-->L855-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In19636100 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd0~0_In19636100 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out19636100|)) (and (= ~b$r_buff0_thd0~0_In19636100 |ULTIMATE.start_main_#t~ite51_Out19636100|) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In19636100, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In19636100} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In19636100, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out19636100|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In19636100} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:52:42,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L856-->L856-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd0~0_In-6979525 256))) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In-6979525 256))) (.cse3 (= (mod ~b$r_buff0_thd0~0_In-6979525 256) 0)) (.cse2 (= (mod ~b$w_buff0_used~0_In-6979525 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~b$r_buff1_thd0~0_In-6979525 |ULTIMATE.start_main_#t~ite52_Out-6979525|)) (and (= |ULTIMATE.start_main_#t~ite52_Out-6979525| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-6979525, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-6979525, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-6979525, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-6979525} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-6979525, ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-6979525|, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-6979525, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-6979525, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-6979525} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:52:42,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L856-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~b$r_buff1_thd0~0_185 |v_ULTIMATE.start_main_#t~ite52_39|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_19) (= v_~__unbuffered_p1_EBX~0_20 0) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 0 v_~__unbuffered_p0_EAX~0_139) (= v_~__unbuffered_p2_EBX~0_26 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_18 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_139, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_19} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_139, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_185, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_19, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~b$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:52:42,548 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:52:42 BasicIcfg [2019-12-07 18:52:42,548 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:52:42,549 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:52:42,549 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:52:42,549 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:52:42,549 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:51:36" (3/4) ... [2019-12-07 18:52:42,550 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:52:42,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [905] [905] ULTIMATE.startENTRY-->L842: Formula: (let ((.cse0 (store |v_#valid_67| 0 0))) (and (= v_~b$r_buff1_thd0~0_230 0) (= v_~b$w_buff1~0_176 0) (= v_~b$mem_tmp~0_20 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t855~0.base_25| 4)) (= v_~weak$$choice2~0_144 0) (= 0 v_~b$r_buff1_thd3~0_337) (= 0 v_~b$read_delayed~0_7) (= 0 v_~b$r_buff0_thd2~0_182) (= 0 v_~__unbuffered_p0_EAX~0_176) (= v_~__unbuffered_p1_EBX~0_38 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t855~0.base_25|) 0) (= v_~main$tmp_guard1~0_34 0) (= v_~y~0_19 0) (= 0 v_~__unbuffered_p1_EAX~0_38) (= v_~b$r_buff0_thd0~0_204 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~b$r_buff1_thd1~0_215) (= v_~a~0_14 0) (= 0 v_~x~0_124) (= 0 v_~b$r_buff0_thd3~0_395) (= v_~__unbuffered_p2_EBX~0_38 0) (= v_~b$read_delayed_var~0.offset_7 0) (= v_~z~0_23 0) (= 0 |v_ULTIMATE.start_main_~#t855~0.offset_17|) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p2_EAX~0_34) (= 0 v_~b$w_buff0_used~0_787) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t855~0.base_25|) (= |v_#NULL.offset_4| 0) (= |v_#valid_65| (store .cse0 |v_ULTIMATE.start_main_~#t855~0.base_25| 1)) (= 0 v_~b$w_buff0~0_250) (= v_~__unbuffered_cnt~0_137 0) (= 0 v_~b$w_buff1_used~0_450) (= 0 v_~b$r_buff1_thd2~0_222) (= 0 v_~weak$$choice0~0_13) (= v_~b~0_186 0) (= v_~main$tmp_guard0~0_24 0) (= v_~b$flush_delayed~0_35 0) (= 0 v_~b$read_delayed_var~0.base_7) (= 0 v_~b$r_buff0_thd1~0_323) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t855~0.base_25| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t855~0.base_25|) |v_ULTIMATE.start_main_~#t855~0.offset_17| 0)) |v_#memory_int_23|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_67|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_395, ~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_215, ~b$read_delayed_var~0.offset=v_~b$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_35|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_245|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_51|, ~b$w_buff0_used~0=v_~b$w_buff0_used~0_787, ~a~0=v_~a~0_14, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_176, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_38, #length=|v_#length_25|, ~b$w_buff0~0=v_~b$w_buff0~0_250, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ULTIMATE.start_main_~#t855~0.offset=|v_ULTIMATE.start_main_~#t855~0.offset_17|, ULTIMATE.start_main_~#t855~0.base=|v_ULTIMATE.start_main_~#t855~0.base_25|, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_204, ~b$r_buff0_thd2~0=v_~b$r_buff0_thd2~0_182, ~b$mem_tmp~0=v_~b$mem_tmp~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~b$flush_delayed~0=v_~b$flush_delayed~0_35, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ULTIMATE.start_main_~#t856~0.offset=|v_ULTIMATE.start_main_~#t856~0.offset_17|, ~b$read_delayed~0=v_~b$read_delayed~0_7, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~b$w_buff1~0=v_~b$w_buff1~0_176, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_137, ULTIMATE.start_main_~#t857~0.offset=|v_ULTIMATE.start_main_~#t857~0.offset_17|, ~x~0=v_~x~0_124, ~b$r_buff0_thd1~0=v_~b$r_buff0_thd1~0_323, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~b$w_buff1_used~0=v_~b$w_buff1_used~0_450, ~y~0=v_~y~0_19, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_222, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_230, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_38, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ULTIMATE.start_main_~#t857~0.base=|v_ULTIMATE.start_main_~#t857~0.base_21|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_4|, ~b$read_delayed_var~0.base=v_~b$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t856~0.base=|v_ULTIMATE.start_main_~#t856~0.base_21|, ~b~0=v_~b~0_186, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_28|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_23, ~weak$$choice2~0=v_~weak$$choice2~0_144, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_337} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, ~b$r_buff1_thd1~0, ~b$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ~b$w_buff0_used~0, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~b$w_buff0~0, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t855~0.offset, ULTIMATE.start_main_~#t855~0.base, ~b$r_buff0_thd0~0, ~b$r_buff0_thd2~0, ~b$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~b$flush_delayed~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t856~0.offset, ~b$read_delayed~0, ~weak$$choice0~0, ~b$w_buff1~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t857~0.offset, ~x~0, ~b$r_buff0_thd1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite51, ~b$w_buff1_used~0, ~y~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd0~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t857~0.base, ~main$tmp_guard0~0, #NULL.base, ~b$read_delayed_var~0.base, ULTIMATE.start_main_~#t856~0.base, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 18:52:42,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [864] [864] L842-1-->L844: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t856~0.base_10|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t856~0.base_10| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t856~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t856~0.base_10|) |v_ULTIMATE.start_main_~#t856~0.offset_9| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t856~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t856~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t856~0.offset_9| 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t856~0.base_10| 4) |v_#length_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t856~0.base=|v_ULTIMATE.start_main_~#t856~0.base_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t856~0.offset=|v_ULTIMATE.start_main_~#t856~0.offset_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t856~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t856~0.offset, #length] because there is no mapped edge [2019-12-07 18:52:42,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L844-1-->L846: Formula: (and (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t857~0.base_13| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t857~0.base_13| 4)) (= 0 |v_ULTIMATE.start_main_~#t857~0.offset_11|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t857~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t857~0.base_13|) |v_ULTIMATE.start_main_~#t857~0.offset_11| 2)) |v_#memory_int_15|) (not (= 0 |v_ULTIMATE.start_main_~#t857~0.base_13|)) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t857~0.base_13|) 0) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t857~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t857~0.base=|v_ULTIMATE.start_main_~#t857~0.base_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t857~0.offset=|v_ULTIMATE.start_main_~#t857~0.offset_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t857~0.base, #length, ULTIMATE.start_main_~#t857~0.offset] because there is no mapped edge [2019-12-07 18:52:42,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L4-->L754: Formula: (and (= ~b$r_buff0_thd2~0_In-1415524499 ~b$r_buff1_thd2~0_Out-1415524499) (= ~b$r_buff1_thd3~0_Out-1415524499 ~b$r_buff0_thd3~0_In-1415524499) (not (= P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1415524499 0)) (= ~b$r_buff0_thd1~0_In-1415524499 ~b$r_buff1_thd1~0_Out-1415524499) (= ~b$r_buff0_thd0~0_In-1415524499 ~b$r_buff1_thd0~0_Out-1415524499) (= 1 ~b$r_buff0_thd1~0_Out-1415524499) (= ~x~0_In-1415524499 ~__unbuffered_p0_EAX~0_Out-1415524499)) InVars {~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1415524499, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1415524499, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1415524499, P0Thread1of1ForFork2___VERIFIER_assert_~expression=P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1415524499, ~x~0=~x~0_In-1415524499, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1415524499} OutVars{~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-1415524499, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1415524499, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-1415524499, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1415524499, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_Out-1415524499, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_Out-1415524499, P0Thread1of1ForFork2___VERIFIER_assert_~expression=P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1415524499, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_Out-1415524499, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_Out-1415524499, ~x~0=~x~0_In-1415524499, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1415524499} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, ~__unbuffered_p0_EAX~0, ~b$r_buff1_thd1~0, ~b$r_buff1_thd0~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 18:52:42,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L780-2-->L780-4: Formula: (let ((.cse1 (= (mod ~b$w_buff1_used~0_In-1952664660 256) 0)) (.cse0 (= (mod ~b$r_buff1_thd2~0_In-1952664660 256) 0))) (or (and (not .cse0) (not .cse1) (= ~b$w_buff1~0_In-1952664660 |P1Thread1of1ForFork0_#t~ite9_Out-1952664660|)) (and (= ~b~0_In-1952664660 |P1Thread1of1ForFork0_#t~ite9_Out-1952664660|) (or .cse1 .cse0)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-1952664660, ~b~0=~b~0_In-1952664660, ~b$w_buff1~0=~b$w_buff1~0_In-1952664660, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1952664660} OutVars{~b$w_buff1_used~0=~b$w_buff1_used~0_In-1952664660, ~b~0=~b~0_In-1952664660, ~b$w_buff1~0=~b$w_buff1~0_In-1952664660, P1Thread1of1ForFork0_#t~ite9=|P1Thread1of1ForFork0_#t~ite9_Out-1952664660|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1952664660} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 18:52:42,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L780-4-->L781: Formula: (= v_~b~0_66 |v_P1Thread1of1ForFork0_#t~ite9_32|) InVars {P1Thread1of1ForFork0_#t~ite9=|v_P1Thread1of1ForFork0_#t~ite9_32|} OutVars{~b~0=v_~b~0_66, P1Thread1of1ForFork0_#t~ite10=|v_P1Thread1of1ForFork0_#t~ite10_51|, P1Thread1of1ForFork0_#t~ite9=|v_P1Thread1of1ForFork0_#t~ite9_31|} AuxVars[] AssignedVars[~b~0, P1Thread1of1ForFork0_#t~ite10, P1Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 18:52:42,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In-407672834 256))) (.cse0 (= (mod ~b$w_buff0_used~0_In-407672834 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork0_#t~ite11_Out-407672834|)) (and (= |P1Thread1of1ForFork0_#t~ite11_Out-407672834| ~b$w_buff0_used~0_In-407672834) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-407672834, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-407672834} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-407672834, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-407672834, P1Thread1of1ForFork0_#t~ite11=|P1Thread1of1ForFork0_#t~ite11_Out-407672834|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 18:52:42,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L782-->L782-2: Formula: (let ((.cse3 (= (mod ~b$w_buff1_used~0_In452041543 256) 0)) (.cse2 (= 0 (mod ~b$r_buff1_thd2~0_In452041543 256))) (.cse0 (= (mod ~b$w_buff0_used~0_In452041543 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd2~0_In452041543 256) 0))) (or (and (= ~b$w_buff1_used~0_In452041543 |P1Thread1of1ForFork0_#t~ite12_Out452041543|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork0_#t~ite12_Out452041543|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In452041543, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In452041543, ~b$w_buff1_used~0=~b$w_buff1_used~0_In452041543, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In452041543} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In452041543, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In452041543, ~b$w_buff1_used~0=~b$w_buff1_used~0_In452041543, P1Thread1of1ForFork0_#t~ite12=|P1Thread1of1ForFork0_#t~ite12_Out452041543|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In452041543} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 18:52:42,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L783-->L783-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In-870822879 256))) (.cse0 (= (mod ~b$w_buff0_used~0_In-870822879 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork0_#t~ite13_Out-870822879| 0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite13_Out-870822879| ~b$r_buff0_thd2~0_In-870822879) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-870822879, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-870822879} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-870822879, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-870822879, P1Thread1of1ForFork0_#t~ite13=|P1Thread1of1ForFork0_#t~ite13_Out-870822879|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 18:52:42,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L784-->L784-2: Formula: (let ((.cse1 (= (mod ~b$w_buff1_used~0_In-463200055 256) 0)) (.cse0 (= 0 (mod ~b$r_buff1_thd2~0_In-463200055 256))) (.cse2 (= 0 (mod ~b$r_buff0_thd2~0_In-463200055 256))) (.cse3 (= 0 (mod ~b$w_buff0_used~0_In-463200055 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite14_Out-463200055| ~b$r_buff1_thd2~0_In-463200055)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite14_Out-463200055| 0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-463200055, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-463200055, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-463200055, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-463200055} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-463200055, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-463200055, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-463200055, P1Thread1of1ForFork0_#t~ite14=|P1Thread1of1ForFork0_#t~ite14_Out-463200055|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-463200055} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 18:52:42,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L784-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1)) (= v_~b$r_buff1_thd2~0_85 |v_P1Thread1of1ForFork0_#t~ite14_30|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_30|} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_29|, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_85, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~__unbuffered_cnt~0, P1Thread1of1ForFork0_#t~ite14, P1Thread1of1ForFork0_#res.offset, ~b$r_buff1_thd2~0, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:52:42,556 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L808-->L808-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1264116692 256)))) (or (and (let ((.cse0 (= (mod ~b$r_buff0_thd3~0_In-1264116692 256) 0))) (or (= (mod ~b$w_buff0_used~0_In-1264116692 256) 0) (and (= 0 (mod ~b$w_buff1_used~0_In-1264116692 256)) .cse0) (and (= (mod ~b$r_buff1_thd3~0_In-1264116692 256) 0) .cse0))) (= |P2Thread1of1ForFork1_#t~ite20_Out-1264116692| ~b$w_buff0~0_In-1264116692) .cse1 (= |P2Thread1of1ForFork1_#t~ite21_Out-1264116692| |P2Thread1of1ForFork1_#t~ite20_Out-1264116692|)) (and (= |P2Thread1of1ForFork1_#t~ite20_In-1264116692| |P2Thread1of1ForFork1_#t~ite20_Out-1264116692|) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite21_Out-1264116692| ~b$w_buff0~0_In-1264116692)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1264116692, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1264116692, P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_In-1264116692|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1264116692, ~b$w_buff0~0=~b$w_buff0~0_In-1264116692, ~weak$$choice2~0=~weak$$choice2~0_In-1264116692, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1264116692} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1264116692, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1264116692, P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_Out-1264116692|, P2Thread1of1ForFork1_#t~ite21=|P2Thread1of1ForFork1_#t~ite21_Out-1264116692|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1264116692, ~b$w_buff0~0=~b$w_buff0~0_In-1264116692, ~weak$$choice2~0=~weak$$choice2~0_In-1264116692, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1264116692} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite20, P2Thread1of1ForFork1_#t~ite21] because there is no mapped edge [2019-12-07 18:52:42,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [885] [885] L810-->L810-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In2108626186 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In2108626186 256)))) (or (and (= (mod ~b$r_buff1_thd3~0_In2108626186 256) 0) .cse0) (and (= (mod ~b$w_buff1_used~0_In2108626186 256) 0) .cse0) (= 0 (mod ~b$w_buff0_used~0_In2108626186 256)))) .cse1 (= |P2Thread1of1ForFork1_#t~ite26_Out2108626186| |P2Thread1of1ForFork1_#t~ite27_Out2108626186|) (= ~b$w_buff0_used~0_In2108626186 |P2Thread1of1ForFork1_#t~ite26_Out2108626186|)) (and (not .cse1) (= |P2Thread1of1ForFork1_#t~ite26_In2108626186| |P2Thread1of1ForFork1_#t~ite26_Out2108626186|) (= ~b$w_buff0_used~0_In2108626186 |P2Thread1of1ForFork1_#t~ite27_Out2108626186|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In2108626186, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In2108626186, P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_In2108626186|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In2108626186, ~weak$$choice2~0=~weak$$choice2~0_In2108626186, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2108626186} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In2108626186, P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_Out2108626186|, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In2108626186, P2Thread1of1ForFork1_#t~ite27=|P2Thread1of1ForFork1_#t~ite27_Out2108626186|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In2108626186, ~weak$$choice2~0=~weak$$choice2~0_In2108626186, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2108626186} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite26, P2Thread1of1ForFork1_#t~ite27] because there is no mapped edge [2019-12-07 18:52:42,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L812-->L813: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_15 256))) (= v_~b$r_buff0_thd3~0_79 v_~b$r_buff0_thd3~0_78)) InVars {~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_79, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_78, P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite31=|v_P2Thread1of1ForFork1_#t~ite31_6|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_7|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite31, P2Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 18:52:42,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L815-->L819: Formula: (and (= v_~b$flush_delayed~0_7 0) (not (= (mod v_~b$flush_delayed~0_8 256) 0)) (= v_~b~0_30 v_~b$mem_tmp~0_5)) InVars {~b$mem_tmp~0=v_~b$mem_tmp~0_5, ~b$flush_delayed~0=v_~b$flush_delayed~0_8} OutVars{~b$mem_tmp~0=v_~b$mem_tmp~0_5, P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_5|, ~b~0=v_~b~0_30, ~b$flush_delayed~0=v_~b$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, ~b~0, ~b$flush_delayed~0] because there is no mapped edge [2019-12-07 18:52:42,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L819-2-->L819-4: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd3~0_In2121795100 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In2121795100 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite38_Out2121795100| ~b~0_In2121795100)) (and (not .cse1) (= ~b$w_buff1~0_In2121795100 |P2Thread1of1ForFork1_#t~ite38_Out2121795100|) (not .cse0)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In2121795100, ~b~0=~b~0_In2121795100, ~b$w_buff1~0=~b$w_buff1~0_In2121795100, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2121795100} OutVars{P2Thread1of1ForFork1_#t~ite38=|P2Thread1of1ForFork1_#t~ite38_Out2121795100|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In2121795100, ~b~0=~b~0_In2121795100, ~b$w_buff1~0=~b$w_buff1~0_In2121795100, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2121795100} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite38] because there is no mapped edge [2019-12-07 18:52:42,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L819-4-->L820: Formula: (= v_~b~0_46 |v_P2Thread1of1ForFork1_#t~ite38_10|) InVars {P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_10|} OutVars{P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_9|, ~b~0=v_~b~0_46, P2Thread1of1ForFork1_#t~ite39=|v_P2Thread1of1ForFork1_#t~ite39_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite38, ~b~0, P2Thread1of1ForFork1_#t~ite39] because there is no mapped edge [2019-12-07 18:52:42,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L820-->L820-2: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff0_used~0_In-521468395 256))) (.cse1 (= 0 (mod ~b$r_buff0_thd3~0_In-521468395 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite40_Out-521468395| 0)) (and (or .cse0 .cse1) (= ~b$w_buff0_used~0_In-521468395 |P2Thread1of1ForFork1_#t~ite40_Out-521468395|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-521468395, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-521468395} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-521468395, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-521468395, P2Thread1of1ForFork1_#t~ite40=|P2Thread1of1ForFork1_#t~ite40_Out-521468395|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite40] because there is no mapped edge [2019-12-07 18:52:42,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L821-->L821-2: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff1_used~0_In1671347061 256))) (.cse1 (= (mod ~b$r_buff1_thd3~0_In1671347061 256) 0)) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In1671347061 256))) (.cse3 (= 0 (mod ~b$r_buff0_thd3~0_In1671347061 256)))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite41_Out1671347061|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~b$w_buff1_used~0_In1671347061 |P2Thread1of1ForFork1_#t~ite41_Out1671347061|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1671347061, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1671347061, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1671347061, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1671347061} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1671347061, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1671347061, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1671347061, P2Thread1of1ForFork1_#t~ite41=|P2Thread1of1ForFork1_#t~ite41_Out1671347061|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1671347061} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite41] because there is no mapped edge [2019-12-07 18:52:42,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L822-->L822-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In882751459 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd3~0_In882751459 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite42_Out882751459| 0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite42_Out882751459| ~b$r_buff0_thd3~0_In882751459) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In882751459, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In882751459} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In882751459, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In882751459, P2Thread1of1ForFork1_#t~ite42=|P2Thread1of1ForFork1_#t~ite42_Out882751459|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite42] because there is no mapped edge [2019-12-07 18:52:42,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L823-->L823-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff1_thd3~0_In-2143117665 256))) (.cse2 (= (mod ~b$w_buff1_used~0_In-2143117665 256) 0)) (.cse0 (= (mod ~b$w_buff0_used~0_In-2143117665 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd3~0_In-2143117665 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite43_Out-2143117665| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork1_#t~ite43_Out-2143117665| ~b$r_buff1_thd3~0_In-2143117665) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2143117665, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-2143117665, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2143117665, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-2143117665} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2143117665, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-2143117665, P2Thread1of1ForFork1_#t~ite43=|P2Thread1of1ForFork1_#t~ite43_Out-2143117665|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2143117665, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-2143117665} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43] because there is no mapped edge [2019-12-07 18:52:42,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L823-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= |v_P2Thread1of1ForFork1_#t~ite43_42| v_~b$r_buff1_thd3~0_140) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_41|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_140, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, ~b$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:52:42,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L755-->L755-2: Formula: (let ((.cse1 (= (mod ~b$r_buff0_thd1~0_In1283384557 256) 0)) (.cse0 (= (mod ~b$w_buff0_used~0_In1283384557 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite5_Out1283384557| 0) (not .cse1)) (and (= |P0Thread1of1ForFork2_#t~ite5_Out1283384557| ~b$w_buff0_used~0_In1283384557) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1283384557, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1283384557} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1283384557, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1283384557, P0Thread1of1ForFork2_#t~ite5=|P0Thread1of1ForFork2_#t~ite5_Out1283384557|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:52:42,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff1_used~0_In-383124840 256))) (.cse0 (= 0 (mod ~b$r_buff1_thd1~0_In-383124840 256))) (.cse2 (= (mod ~b$w_buff0_used~0_In-383124840 256) 0)) (.cse3 (= (mod ~b$r_buff0_thd1~0_In-383124840 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite6_Out-383124840| ~b$w_buff1_used~0_In-383124840) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork2_#t~ite6_Out-383124840| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-383124840, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-383124840, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-383124840, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-383124840} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-383124840, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-383124840, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-383124840, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-383124840, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out-383124840|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:52:42,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L757-->L758: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In405294578 256) 0)) (.cse1 (= ~b$r_buff0_thd1~0_Out405294578 ~b$r_buff0_thd1~0_In405294578)) (.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In405294578 256)))) (or (and .cse0 .cse1) (and (= 0 ~b$r_buff0_thd1~0_Out405294578) (not .cse0) (not .cse2)) (and .cse1 .cse2))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In405294578, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In405294578} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In405294578, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out405294578, P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out405294578|} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:52:42,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In-1840162023 256))) (.cse3 (= (mod ~b$w_buff0_used~0_In-1840162023 256) 0)) (.cse1 (= 0 (mod ~b$w_buff1_used~0_In-1840162023 256))) (.cse0 (= (mod ~b$r_buff1_thd1~0_In-1840162023 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite8_Out-1840162023| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P0Thread1of1ForFork2_#t~ite8_Out-1840162023| ~b$r_buff1_thd1~0_In-1840162023) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1840162023, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1840162023, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1840162023, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1840162023} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1840162023, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1840162023, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1840162023, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1840162023, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-1840162023|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:52:42,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L758-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite8_34| v_~b$r_buff1_thd1~0_103) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81} OutVars{~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_103, P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_33|, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~b$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:52:42,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L846-1-->L852: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_33) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:52:42,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L852-2-->L852-4: Formula: (let ((.cse0 (= 0 (mod ~b$r_buff1_thd0~0_In946620745 256))) (.cse1 (= 0 (mod ~b$w_buff1_used~0_In946620745 256)))) (or (and (= ~b~0_In946620745 |ULTIMATE.start_main_#t~ite47_Out946620745|) (or .cse0 .cse1)) (and (not .cse0) (= ~b$w_buff1~0_In946620745 |ULTIMATE.start_main_#t~ite47_Out946620745|) (not .cse1)))) InVars {~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In946620745, ~b$w_buff1_used~0=~b$w_buff1_used~0_In946620745, ~b~0=~b~0_In946620745, ~b$w_buff1~0=~b$w_buff1~0_In946620745} OutVars{~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In946620745, ~b$w_buff1_used~0=~b$w_buff1_used~0_In946620745, ~b~0=~b~0_In946620745, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out946620745|, ~b$w_buff1~0=~b$w_buff1~0_In946620745} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:52:42,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L852-4-->L853: Formula: (= v_~b~0_51 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{~b~0=v_~b~0_51, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~b~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:52:42,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L853-->L853-2: Formula: (let ((.cse1 (= (mod ~b$w_buff0_used~0_In-941929762 256) 0)) (.cse0 (= (mod ~b$r_buff0_thd0~0_In-941929762 256) 0))) (or (and (or .cse0 .cse1) (= ~b$w_buff0_used~0_In-941929762 |ULTIMATE.start_main_#t~ite49_Out-941929762|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out-941929762|) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-941929762, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-941929762} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-941929762, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-941929762|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-941929762} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:52:42,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L854-->L854-2: Formula: (let ((.cse3 (= (mod ~b$r_buff0_thd0~0_In-1414130094 256) 0)) (.cse2 (= (mod ~b$w_buff0_used~0_In-1414130094 256) 0)) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In-1414130094 256))) (.cse1 (= (mod ~b$r_buff1_thd0~0_In-1414130094 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite50_Out-1414130094| ~b$w_buff1_used~0_In-1414130094)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite50_Out-1414130094| 0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1414130094, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1414130094, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1414130094, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1414130094} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1414130094|, ~b$w_buff0_used~0=~b$w_buff0_used~0_In-1414130094, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1414130094, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1414130094, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1414130094} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:52:42,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L855-->L855-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In19636100 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd0~0_In19636100 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out19636100|)) (and (= ~b$r_buff0_thd0~0_In19636100 |ULTIMATE.start_main_#t~ite51_Out19636100|) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In19636100, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In19636100} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In19636100, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out19636100|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In19636100} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:52:42,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L856-->L856-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd0~0_In-6979525 256))) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In-6979525 256))) (.cse3 (= (mod ~b$r_buff0_thd0~0_In-6979525 256) 0)) (.cse2 (= (mod ~b$w_buff0_used~0_In-6979525 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~b$r_buff1_thd0~0_In-6979525 |ULTIMATE.start_main_#t~ite52_Out-6979525|)) (and (= |ULTIMATE.start_main_#t~ite52_Out-6979525| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-6979525, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-6979525, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-6979525, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-6979525} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-6979525, ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-6979525|, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-6979525, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-6979525, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-6979525} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:52:42,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L856-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~b$r_buff1_thd0~0_185 |v_ULTIMATE.start_main_#t~ite52_39|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_19) (= v_~__unbuffered_p1_EBX~0_20 0) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 0 v_~__unbuffered_p0_EAX~0_139) (= v_~__unbuffered_p2_EBX~0_26 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_18 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_139, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_19} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_139, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_185, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_19, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~b$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:52:42,613 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_f5641e03-76c9-47d3-8859-71f56765b841/bin/uautomizer/witness.graphml [2019-12-07 18:52:42,614 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:52:42,615 INFO L168 Benchmark]: Toolchain (without parser) took 66627.89 ms. Allocated memory was 1.0 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 939.3 MB in the beginning and 2.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 18:52:42,615 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:52:42,615 INFO L168 Benchmark]: CACSL2BoogieTranslator took 403.17 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -121.4 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:52:42,615 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.24 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:52:42,615 INFO L168 Benchmark]: Boogie Preprocessor took 24.76 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:52:42,616 INFO L168 Benchmark]: RCFGBuilder took 430.36 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 994.0 MB in the end (delta: 61.3 MB). Peak memory consumption was 61.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:52:42,616 INFO L168 Benchmark]: TraceAbstraction took 65664.18 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.4 GB). Free memory was 994.0 MB in the beginning and 2.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 18:52:42,616 INFO L168 Benchmark]: Witness Printer took 64.87 ms. Allocated memory is still 6.6 GB. Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: 19.2 MB). Peak memory consumption was 19.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:52:42,617 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 403.17 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -121.4 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.24 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.76 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 430.36 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 994.0 MB in the end (delta: 61.3 MB). Peak memory consumption was 61.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 65664.18 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.4 GB). Free memory was 994.0 MB in the beginning and 2.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. * Witness Printer took 64.87 ms. Allocated memory is still 6.6 GB. Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: 19.2 MB). Peak memory consumption was 19.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 180 ProgramPointsBefore, 96 ProgramPointsAfterwards, 217 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 37 TrivialSequentialCompositions, 47 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 31 ConcurrentYvCompositions, 32 ChoiceCompositions, 7698 VarBasedMoverChecksPositive, 261 VarBasedMoverChecksNegative, 64 SemBasedMoverChecksPositive, 271 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 83556 CheckedPairsTotal, 115 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L842] FCALL, FORK 0 pthread_create(&t855, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L844] FCALL, FORK 0 pthread_create(&t856, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L846] FCALL, FORK 0 pthread_create(&t857, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L739] 1 b$w_buff1 = b$w_buff0 [L740] 1 b$w_buff0 = 1 [L741] 1 b$w_buff1_used = b$w_buff0_used [L742] 1 b$w_buff0_used = (_Bool)1 [L754] EXPR 1 b$w_buff0_used && b$r_buff0_thd1 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd1 ? b$w_buff1 : b) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L768] 2 x = 1 [L771] 2 y = 1 [L774] 2 __unbuffered_p1_EAX = y [L777] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L780] 2 b$w_buff0_used && b$r_buff0_thd2 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd2 ? b$w_buff1 : b) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L754] 1 b = b$w_buff0_used && b$r_buff0_thd1 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd1 ? b$w_buff1 : b) [L781] 2 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used [L782] 2 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd2 || b$w_buff1_used && b$r_buff1_thd2 ? (_Bool)0 : b$w_buff1_used [L783] 2 b$r_buff0_thd2 = b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$r_buff0_thd2 [L794] 3 z = 1 [L797] 3 a = 1 [L800] 3 __unbuffered_p2_EAX = a [L803] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L804] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L805] 3 b$flush_delayed = weak$$choice2 [L806] 3 b$mem_tmp = b VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L807] EXPR 3 !b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1) VAL [!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1)=0, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L807] 3 b = !b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1) [L808] 3 b$w_buff0 = weak$$choice2 ? b$w_buff0 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff0)) [L809] EXPR 3 weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1))=0, x=1, y=1, z=1] [L809] 3 b$w_buff1 = weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1)) [L810] 3 b$w_buff0_used = weak$$choice2 ? b$w_buff0_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used)) [L811] EXPR 3 weak$$choice2 ? b$w_buff1_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? b$w_buff1_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L811] 3 b$w_buff1_used = weak$$choice2 ? b$w_buff1_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L813] EXPR 3 weak$$choice2 ? b$r_buff1_thd3 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$r_buff1_thd3 : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? b$r_buff1_thd3 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$r_buff1_thd3 : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L813] 3 b$r_buff1_thd3 = weak$$choice2 ? b$r_buff1_thd3 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$r_buff1_thd3 : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L814] 3 __unbuffered_p2_EBX = b VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L819] 3 b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd3 ? b$w_buff1 : b) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L820] 3 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used [L821] 3 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd3 || b$w_buff1_used && b$r_buff1_thd3 ? (_Bool)0 : b$w_buff1_used [L822] 3 b$r_buff0_thd3 = b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$r_buff0_thd3 [L755] 1 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd1 ? (_Bool)0 : b$w_buff0_used [L756] 1 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd1 || b$w_buff1_used && b$r_buff1_thd1 ? (_Bool)0 : b$w_buff1_used [L852] 0 b$w_buff0_used && b$r_buff0_thd0 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd0 ? b$w_buff1 : b) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L853] 0 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd0 ? (_Bool)0 : b$w_buff0_used [L854] 0 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd0 || b$w_buff1_used && b$r_buff1_thd0 ? (_Bool)0 : b$w_buff1_used [L855] 0 b$r_buff0_thd0 = b$w_buff0_used && b$r_buff0_thd0 ? (_Bool)0 : b$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 171 locations, 2 error locations. Result: UNSAFE, OverallTime: 65.4s, OverallIterations: 23, TraceHistogramMax: 1, AutomataDifference: 10.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4019 SDtfs, 4461 SDslu, 7884 SDs, 0 SdLazy, 4044 SolverSat, 185 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 164 GetRequests, 35 SyntacticMatches, 13 SemanticMatches, 116 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=171775occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 31.7s AutomataMinimizationTime, 22 MinimizatonAttempts, 159960 StatesRemovedByMinimization, 18 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 917 NumberOfCodeBlocks, 917 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 828 ConstructedInterpolants, 0 QuantifiedInterpolants, 223354 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 22 InterpolantComputations, 22 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...