./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix032_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix032_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 32c5e647cdda24ef669e766bcb94fa71ef89c591 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:46:22,323 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:46:22,324 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:46:22,332 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:46:22,332 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:46:22,332 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:46:22,333 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:46:22,335 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:46:22,336 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:46:22,336 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:46:22,337 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:46:22,338 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:46:22,338 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:46:22,339 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:46:22,339 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:46:22,340 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:46:22,341 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:46:22,341 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:46:22,343 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:46:22,344 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:46:22,345 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:46:22,346 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:46:22,346 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:46:22,347 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:46:22,349 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:46:22,349 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:46:22,349 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:46:22,349 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:46:22,350 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:46:22,350 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:46:22,350 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:46:22,351 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:46:22,351 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:46:22,351 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:46:22,352 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:46:22,352 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:46:22,352 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:46:22,353 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:46:22,353 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:46:22,353 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:46:22,354 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:46:22,354 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:46:22,364 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:46:22,364 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:46:22,364 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:46:22,365 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:46:22,365 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:46:22,365 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:46:22,365 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:46:22,365 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:46:22,365 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:46:22,365 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:46:22,366 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:46:22,366 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:46:22,366 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:46:22,366 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:46:22,366 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:46:22,366 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:46:22,366 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:46:22,366 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:46:22,367 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:46:22,367 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:46:22,367 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:46:22,367 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:46:22,367 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:46:22,367 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:46:22,367 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:46:22,368 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:46:22,368 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:46:22,368 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:46:22,368 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:46:22,368 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 32c5e647cdda24ef669e766bcb94fa71ef89c591 [2019-12-07 12:46:22,464 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:46:22,473 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:46:22,475 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:46:22,476 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:46:22,477 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:46:22,477 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix032_tso.oepc.i [2019-12-07 12:46:22,517 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/data/4f4aa0a58/ffa5476df71242c6833f884c91efe22c/FLAG018ab69c7 [2019-12-07 12:46:23,008 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:46:23,009 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/sv-benchmarks/c/pthread-wmm/mix032_tso.oepc.i [2019-12-07 12:46:23,020 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/data/4f4aa0a58/ffa5476df71242c6833f884c91efe22c/FLAG018ab69c7 [2019-12-07 12:46:23,031 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/data/4f4aa0a58/ffa5476df71242c6833f884c91efe22c [2019-12-07 12:46:23,034 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:46:23,035 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:46:23,036 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:46:23,036 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:46:23,039 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:46:23,039 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:46:23" (1/1) ... [2019-12-07 12:46:23,041 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c8002ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23, skipping insertion in model container [2019-12-07 12:46:23,041 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:46:23" (1/1) ... [2019-12-07 12:46:23,046 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:46:23,077 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:46:23,364 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:46:23,374 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:46:23,432 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:46:23,488 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:46:23,488 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23 WrapperNode [2019-12-07 12:46:23,488 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:46:23,489 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:46:23,489 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:46:23,489 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:46:23,495 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23" (1/1) ... [2019-12-07 12:46:23,509 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23" (1/1) ... [2019-12-07 12:46:23,527 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:46:23,527 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:46:23,527 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:46:23,528 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:46:23,534 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23" (1/1) ... [2019-12-07 12:46:23,534 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23" (1/1) ... [2019-12-07 12:46:23,537 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23" (1/1) ... [2019-12-07 12:46:23,537 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23" (1/1) ... [2019-12-07 12:46:23,544 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23" (1/1) ... [2019-12-07 12:46:23,547 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23" (1/1) ... [2019-12-07 12:46:23,550 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23" (1/1) ... [2019-12-07 12:46:23,553 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:46:23,553 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:46:23,553 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:46:23,553 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:46:23,554 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:46:23,594 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:46:23,594 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:46:23,595 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:46:23,595 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:46:23,595 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:46:23,595 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:46:23,595 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:46:23,595 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:46:23,595 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:46:23,595 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:46:23,595 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:46:23,595 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:46:23,595 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:46:23,597 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:46:23,974 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:46:23,974 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:46:23,975 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:46:23 BoogieIcfgContainer [2019-12-07 12:46:23,975 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:46:23,976 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:46:23,976 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:46:23,978 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:46:23,978 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:46:23" (1/3) ... [2019-12-07 12:46:23,979 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d397372 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:46:23, skipping insertion in model container [2019-12-07 12:46:23,979 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:46:23" (2/3) ... [2019-12-07 12:46:23,979 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d397372 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:46:23, skipping insertion in model container [2019-12-07 12:46:23,979 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:46:23" (3/3) ... [2019-12-07 12:46:23,980 INFO L109 eAbstractionObserver]: Analyzing ICFG mix032_tso.oepc.i [2019-12-07 12:46:23,986 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:46:23,987 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:46:23,991 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:46:23,992 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:46:24,017 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,018 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,018 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,018 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,018 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,018 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,018 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,018 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,019 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,019 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,019 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,019 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,019 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,019 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,019 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,019 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,022 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,022 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,026 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,026 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:46:24,050 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:46:24,063 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:46:24,063 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:46:24,063 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:46:24,063 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:46:24,063 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:46:24,063 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:46:24,063 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:46:24,063 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:46:24,074 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 180 places, 217 transitions [2019-12-07 12:46:24,075 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 217 transitions [2019-12-07 12:46:24,129 INFO L134 PetriNetUnfolder]: 47/214 cut-off events. [2019-12-07 12:46:24,129 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:46:24,139 INFO L76 FinitePrefix]: Finished finitePrefix Result has 224 conditions, 214 events. 47/214 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 702 event pairs. 9/174 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:46:24,154 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 217 transitions [2019-12-07 12:46:24,187 INFO L134 PetriNetUnfolder]: 47/214 cut-off events. [2019-12-07 12:46:24,187 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:46:24,193 INFO L76 FinitePrefix]: Finished finitePrefix Result has 224 conditions, 214 events. 47/214 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 702 event pairs. 9/174 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:46:24,208 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 12:46:24,209 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:46:27,241 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2019-12-07 12:46:27,424 WARN L192 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 12:46:27,526 INFO L206 etLargeBlockEncoding]: Checked pairs total: 83556 [2019-12-07 12:46:27,526 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2019-12-07 12:46:27,529 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 96 places, 105 transitions [2019-12-07 12:46:45,618 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 129602 states. [2019-12-07 12:46:45,619 INFO L276 IsEmpty]: Start isEmpty. Operand 129602 states. [2019-12-07 12:46:45,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 12:46:45,623 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:46:45,623 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 12:46:45,623 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:46:45,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:46:45,627 INFO L82 PathProgramCache]: Analyzing trace with hash 923865, now seen corresponding path program 1 times [2019-12-07 12:46:45,632 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:46:45,633 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1400354280] [2019-12-07 12:46:45,633 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:46:45,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:46:45,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:46:45,760 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1400354280] [2019-12-07 12:46:45,761 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:46:45,761 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:46:45,762 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [501611538] [2019-12-07 12:46:45,765 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:46:45,765 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:46:45,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:46:45,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:46:45,776 INFO L87 Difference]: Start difference. First operand 129602 states. Second operand 3 states. [2019-12-07 12:46:46,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:46:46,604 INFO L93 Difference]: Finished difference Result 128376 states and 546782 transitions. [2019-12-07 12:46:46,604 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:46:46,605 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 12:46:46,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:46:47,067 INFO L225 Difference]: With dead ends: 128376 [2019-12-07 12:46:47,067 INFO L226 Difference]: Without dead ends: 120914 [2019-12-07 12:46:47,068 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:46:54,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120914 states. [2019-12-07 12:46:55,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120914 to 120914. [2019-12-07 12:46:55,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120914 states. [2019-12-07 12:46:56,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120914 states to 120914 states and 514358 transitions. [2019-12-07 12:46:56,233 INFO L78 Accepts]: Start accepts. Automaton has 120914 states and 514358 transitions. Word has length 3 [2019-12-07 12:46:56,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:46:56,233 INFO L462 AbstractCegarLoop]: Abstraction has 120914 states and 514358 transitions. [2019-12-07 12:46:56,233 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:46:56,233 INFO L276 IsEmpty]: Start isEmpty. Operand 120914 states and 514358 transitions. [2019-12-07 12:46:56,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:46:56,236 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:46:56,237 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:46:56,237 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:46:56,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:46:56,237 INFO L82 PathProgramCache]: Analyzing trace with hash 2102120012, now seen corresponding path program 1 times [2019-12-07 12:46:56,237 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:46:56,237 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [739369393] [2019-12-07 12:46:56,237 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:46:56,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:46:56,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:46:56,297 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [739369393] [2019-12-07 12:46:56,297 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:46:56,297 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:46:56,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203479659] [2019-12-07 12:46:56,298 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:46:56,298 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:46:56,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:46:56,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:46:56,299 INFO L87 Difference]: Start difference. First operand 120914 states and 514358 transitions. Second operand 4 states. [2019-12-07 12:46:57,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:46:57,268 INFO L93 Difference]: Finished difference Result 187704 states and 768206 transitions. [2019-12-07 12:46:57,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:46:57,269 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:46:57,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:46:57,770 INFO L225 Difference]: With dead ends: 187704 [2019-12-07 12:46:57,770 INFO L226 Difference]: Without dead ends: 187655 [2019-12-07 12:46:57,770 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:47:06,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187655 states. [2019-12-07 12:47:08,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187655 to 171775. [2019-12-07 12:47:08,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171775 states. [2019-12-07 12:47:09,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171775 states to 171775 states and 711726 transitions. [2019-12-07 12:47:09,236 INFO L78 Accepts]: Start accepts. Automaton has 171775 states and 711726 transitions. Word has length 11 [2019-12-07 12:47:09,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:47:09,237 INFO L462 AbstractCegarLoop]: Abstraction has 171775 states and 711726 transitions. [2019-12-07 12:47:09,237 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:47:09,237 INFO L276 IsEmpty]: Start isEmpty. Operand 171775 states and 711726 transitions. [2019-12-07 12:47:09,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:47:09,241 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:47:09,241 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:47:09,241 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:47:09,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:47:09,241 INFO L82 PathProgramCache]: Analyzing trace with hash -1617299066, now seen corresponding path program 1 times [2019-12-07 12:47:09,242 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:47:09,242 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [464570575] [2019-12-07 12:47:09,242 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:47:09,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:47:09,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:47:09,293 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [464570575] [2019-12-07 12:47:09,294 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:47:09,294 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:47:09,294 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805028545] [2019-12-07 12:47:09,294 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:47:09,294 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:47:09,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:47:09,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:47:09,294 INFO L87 Difference]: Start difference. First operand 171775 states and 711726 transitions. Second operand 4 states. [2019-12-07 12:47:10,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:47:10,946 INFO L93 Difference]: Finished difference Result 242262 states and 982161 transitions. [2019-12-07 12:47:10,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:47:10,947 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:47:10,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:47:11,562 INFO L225 Difference]: With dead ends: 242262 [2019-12-07 12:47:11,562 INFO L226 Difference]: Without dead ends: 242206 [2019-12-07 12:47:11,562 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:47:21,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242206 states. [2019-12-07 12:47:24,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242206 to 205026. [2019-12-07 12:47:24,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205026 states. [2019-12-07 12:47:24,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205026 states to 205026 states and 845145 transitions. [2019-12-07 12:47:24,634 INFO L78 Accepts]: Start accepts. Automaton has 205026 states and 845145 transitions. Word has length 13 [2019-12-07 12:47:24,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:47:24,635 INFO L462 AbstractCegarLoop]: Abstraction has 205026 states and 845145 transitions. [2019-12-07 12:47:24,635 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:47:24,635 INFO L276 IsEmpty]: Start isEmpty. Operand 205026 states and 845145 transitions. [2019-12-07 12:47:24,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:47:24,644 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:47:24,644 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:47:24,644 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:47:24,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:47:24,644 INFO L82 PathProgramCache]: Analyzing trace with hash 947448332, now seen corresponding path program 1 times [2019-12-07 12:47:24,644 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:47:24,645 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2037962578] [2019-12-07 12:47:24,645 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:47:24,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:47:24,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:47:24,697 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2037962578] [2019-12-07 12:47:24,697 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:47:24,697 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:47:24,697 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76683951] [2019-12-07 12:47:24,697 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:47:24,697 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:47:24,697 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:47:24,697 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:47:24,698 INFO L87 Difference]: Start difference. First operand 205026 states and 845145 transitions. Second operand 5 states. [2019-12-07 12:47:26,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:47:26,568 INFO L93 Difference]: Finished difference Result 278815 states and 1138912 transitions. [2019-12-07 12:47:26,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:47:26,568 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 12:47:26,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:47:27,275 INFO L225 Difference]: With dead ends: 278815 [2019-12-07 12:47:27,275 INFO L226 Difference]: Without dead ends: 278815 [2019-12-07 12:47:27,275 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:47:35,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278815 states. [2019-12-07 12:47:41,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278815 to 233994. [2019-12-07 12:47:41,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233994 states. [2019-12-07 12:47:42,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233994 states to 233994 states and 963338 transitions. [2019-12-07 12:47:42,203 INFO L78 Accepts]: Start accepts. Automaton has 233994 states and 963338 transitions. Word has length 16 [2019-12-07 12:47:42,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:47:42,203 INFO L462 AbstractCegarLoop]: Abstraction has 233994 states and 963338 transitions. [2019-12-07 12:47:42,203 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:47:42,203 INFO L276 IsEmpty]: Start isEmpty. Operand 233994 states and 963338 transitions. [2019-12-07 12:47:42,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:47:42,216 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:47:42,216 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:47:42,216 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:47:42,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:47:42,217 INFO L82 PathProgramCache]: Analyzing trace with hash 1320991791, now seen corresponding path program 1 times [2019-12-07 12:47:42,217 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:47:42,217 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594564792] [2019-12-07 12:47:42,217 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:47:42,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:47:42,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:47:42,260 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1594564792] [2019-12-07 12:47:42,260 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:47:42,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:47:42,260 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1984346639] [2019-12-07 12:47:42,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:47:42,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:47:42,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:47:42,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:47:42,261 INFO L87 Difference]: Start difference. First operand 233994 states and 963338 transitions. Second operand 3 states. [2019-12-07 12:47:43,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:47:43,228 INFO L93 Difference]: Finished difference Result 220624 states and 898795 transitions. [2019-12-07 12:47:43,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:47:43,229 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:47:43,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:47:43,803 INFO L225 Difference]: With dead ends: 220624 [2019-12-07 12:47:43,804 INFO L226 Difference]: Without dead ends: 220624 [2019-12-07 12:47:43,804 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:47:50,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220624 states. [2019-12-07 12:47:53,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220624 to 217410. [2019-12-07 12:47:53,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217410 states. [2019-12-07 12:47:54,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217410 states to 217410 states and 886869 transitions. [2019-12-07 12:47:54,462 INFO L78 Accepts]: Start accepts. Automaton has 217410 states and 886869 transitions. Word has length 18 [2019-12-07 12:47:54,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:47:54,462 INFO L462 AbstractCegarLoop]: Abstraction has 217410 states and 886869 transitions. [2019-12-07 12:47:54,462 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:47:54,462 INFO L276 IsEmpty]: Start isEmpty. Operand 217410 states and 886869 transitions. [2019-12-07 12:47:54,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:47:54,472 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:47:54,472 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:47:54,472 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:47:54,473 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:47:54,473 INFO L82 PathProgramCache]: Analyzing trace with hash 24190388, now seen corresponding path program 1 times [2019-12-07 12:47:54,473 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:47:54,473 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502614838] [2019-12-07 12:47:54,473 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:47:54,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:47:54,509 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:47:54,509 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502614838] [2019-12-07 12:47:54,509 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:47:54,509 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:47:54,510 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1880131859] [2019-12-07 12:47:54,510 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:47:54,510 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:47:54,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:47:54,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:47:54,510 INFO L87 Difference]: Start difference. First operand 217410 states and 886869 transitions. Second operand 3 states. [2019-12-07 12:47:54,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:47:54,636 INFO L93 Difference]: Finished difference Result 39275 states and 126331 transitions. [2019-12-07 12:47:54,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:47:54,636 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:47:54,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:47:54,688 INFO L225 Difference]: With dead ends: 39275 [2019-12-07 12:47:54,688 INFO L226 Difference]: Without dead ends: 39275 [2019-12-07 12:47:54,689 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:47:54,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39275 states. [2019-12-07 12:47:55,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39275 to 39275. [2019-12-07 12:47:55,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39275 states. [2019-12-07 12:47:55,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39275 states to 39275 states and 126331 transitions. [2019-12-07 12:47:55,335 INFO L78 Accepts]: Start accepts. Automaton has 39275 states and 126331 transitions. Word has length 18 [2019-12-07 12:47:55,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:47:55,336 INFO L462 AbstractCegarLoop]: Abstraction has 39275 states and 126331 transitions. [2019-12-07 12:47:55,336 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:47:55,336 INFO L276 IsEmpty]: Start isEmpty. Operand 39275 states and 126331 transitions. [2019-12-07 12:47:55,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:47:55,340 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:47:55,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:47:55,341 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:47:55,341 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:47:55,341 INFO L82 PathProgramCache]: Analyzing trace with hash -282717849, now seen corresponding path program 1 times [2019-12-07 12:47:55,341 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:47:55,341 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307247549] [2019-12-07 12:47:55,341 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:47:55,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:47:55,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:47:55,387 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1307247549] [2019-12-07 12:47:55,387 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:47:55,387 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:47:55,387 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [589423001] [2019-12-07 12:47:55,387 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:47:55,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:47:55,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:47:55,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:47:55,388 INFO L87 Difference]: Start difference. First operand 39275 states and 126331 transitions. Second operand 6 states. [2019-12-07 12:47:56,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:47:56,796 INFO L93 Difference]: Finished difference Result 59427 states and 186833 transitions. [2019-12-07 12:47:56,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:47:56,796 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 12:47:56,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:47:56,881 INFO L225 Difference]: With dead ends: 59427 [2019-12-07 12:47:56,881 INFO L226 Difference]: Without dead ends: 59420 [2019-12-07 12:47:56,881 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:47:57,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59420 states. [2019-12-07 12:47:57,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59420 to 39235. [2019-12-07 12:47:57,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39235 states. [2019-12-07 12:47:57,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39235 states to 39235 states and 125505 transitions. [2019-12-07 12:47:57,677 INFO L78 Accepts]: Start accepts. Automaton has 39235 states and 125505 transitions. Word has length 22 [2019-12-07 12:47:57,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:47:57,678 INFO L462 AbstractCegarLoop]: Abstraction has 39235 states and 125505 transitions. [2019-12-07 12:47:57,678 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:47:57,678 INFO L276 IsEmpty]: Start isEmpty. Operand 39235 states and 125505 transitions. [2019-12-07 12:47:57,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:47:57,685 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:47:57,686 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:47:57,686 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:47:57,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:47:57,686 INFO L82 PathProgramCache]: Analyzing trace with hash -71664384, now seen corresponding path program 1 times [2019-12-07 12:47:57,686 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:47:57,686 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [596198450] [2019-12-07 12:47:57,686 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:47:57,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:47:57,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:47:57,732 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [596198450] [2019-12-07 12:47:57,732 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:47:57,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:47:57,733 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072097585] [2019-12-07 12:47:57,733 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:47:57,733 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:47:57,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:47:57,733 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:47:57,733 INFO L87 Difference]: Start difference. First operand 39235 states and 125505 transitions. Second operand 5 states. [2019-12-07 12:47:58,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:47:58,104 INFO L93 Difference]: Finished difference Result 55542 states and 174417 transitions. [2019-12-07 12:47:58,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:47:58,105 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 12:47:58,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:47:58,185 INFO L225 Difference]: With dead ends: 55542 [2019-12-07 12:47:58,185 INFO L226 Difference]: Without dead ends: 55529 [2019-12-07 12:47:58,185 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:47:58,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55529 states. [2019-12-07 12:47:59,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55529 to 47173. [2019-12-07 12:47:59,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47173 states. [2019-12-07 12:47:59,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47173 states to 47173 states and 150323 transitions. [2019-12-07 12:47:59,120 INFO L78 Accepts]: Start accepts. Automaton has 47173 states and 150323 transitions. Word has length 25 [2019-12-07 12:47:59,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:47:59,120 INFO L462 AbstractCegarLoop]: Abstraction has 47173 states and 150323 transitions. [2019-12-07 12:47:59,120 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:47:59,121 INFO L276 IsEmpty]: Start isEmpty. Operand 47173 states and 150323 transitions. [2019-12-07 12:47:59,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:47:59,132 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:47:59,133 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:47:59,133 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:47:59,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:47:59,133 INFO L82 PathProgramCache]: Analyzing trace with hash -1418175430, now seen corresponding path program 1 times [2019-12-07 12:47:59,133 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:47:59,133 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2136756840] [2019-12-07 12:47:59,133 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:47:59,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:47:59,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:47:59,163 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2136756840] [2019-12-07 12:47:59,163 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:47:59,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:47:59,164 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [37029799] [2019-12-07 12:47:59,164 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:47:59,164 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:47:59,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:47:59,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:47:59,164 INFO L87 Difference]: Start difference. First operand 47173 states and 150323 transitions. Second operand 3 states. [2019-12-07 12:47:59,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:47:59,357 INFO L93 Difference]: Finished difference Result 67630 states and 212546 transitions. [2019-12-07 12:47:59,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:47:59,357 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 12:47:59,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:47:59,452 INFO L225 Difference]: With dead ends: 67630 [2019-12-07 12:47:59,453 INFO L226 Difference]: Without dead ends: 67630 [2019-12-07 12:47:59,453 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:47:59,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67630 states. [2019-12-07 12:48:00,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67630 to 52544. [2019-12-07 12:48:00,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52544 states. [2019-12-07 12:48:00,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52544 states to 52544 states and 165778 transitions. [2019-12-07 12:48:00,451 INFO L78 Accepts]: Start accepts. Automaton has 52544 states and 165778 transitions. Word has length 27 [2019-12-07 12:48:00,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:00,451 INFO L462 AbstractCegarLoop]: Abstraction has 52544 states and 165778 transitions. [2019-12-07 12:48:00,451 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:48:00,451 INFO L276 IsEmpty]: Start isEmpty. Operand 52544 states and 165778 transitions. [2019-12-07 12:48:00,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:48:00,466 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:00,466 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:00,466 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:00,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:00,467 INFO L82 PathProgramCache]: Analyzing trace with hash 1834697800, now seen corresponding path program 1 times [2019-12-07 12:48:00,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:00,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647188581] [2019-12-07 12:48:00,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:00,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:00,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:00,508 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [647188581] [2019-12-07 12:48:00,508 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:00,508 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:48:00,509 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [505679334] [2019-12-07 12:48:00,509 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:48:00,509 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:00,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:48:00,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:48:00,510 INFO L87 Difference]: Start difference. First operand 52544 states and 165778 transitions. Second operand 6 states. [2019-12-07 12:48:01,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:01,036 INFO L93 Difference]: Finished difference Result 73956 states and 228925 transitions. [2019-12-07 12:48:01,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 12:48:01,037 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 12:48:01,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:01,144 INFO L225 Difference]: With dead ends: 73956 [2019-12-07 12:48:01,144 INFO L226 Difference]: Without dead ends: 73914 [2019-12-07 12:48:01,144 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:48:01,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73914 states. [2019-12-07 12:48:02,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73914 to 54503. [2019-12-07 12:48:02,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54503 states. [2019-12-07 12:48:02,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54503 states to 54503 states and 171706 transitions. [2019-12-07 12:48:02,224 INFO L78 Accepts]: Start accepts. Automaton has 54503 states and 171706 transitions. Word has length 27 [2019-12-07 12:48:02,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:02,224 INFO L462 AbstractCegarLoop]: Abstraction has 54503 states and 171706 transitions. [2019-12-07 12:48:02,224 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:48:02,225 INFO L276 IsEmpty]: Start isEmpty. Operand 54503 states and 171706 transitions. [2019-12-07 12:48:02,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 12:48:02,245 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:02,245 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:02,246 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:02,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:02,246 INFO L82 PathProgramCache]: Analyzing trace with hash -197713206, now seen corresponding path program 1 times [2019-12-07 12:48:02,246 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:02,246 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159234881] [2019-12-07 12:48:02,246 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:02,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:02,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:02,275 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159234881] [2019-12-07 12:48:02,275 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:02,275 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:48:02,275 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2027129130] [2019-12-07 12:48:02,275 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:48:02,275 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:02,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:48:02,276 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:48:02,276 INFO L87 Difference]: Start difference. First operand 54503 states and 171706 transitions. Second operand 4 states. [2019-12-07 12:48:02,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:02,337 INFO L93 Difference]: Finished difference Result 21175 states and 63903 transitions. [2019-12-07 12:48:02,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:48:02,337 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 12:48:02,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:02,360 INFO L225 Difference]: With dead ends: 21175 [2019-12-07 12:48:02,360 INFO L226 Difference]: Without dead ends: 21175 [2019-12-07 12:48:02,360 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:48:02,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21175 states. [2019-12-07 12:48:02,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21175 to 19838. [2019-12-07 12:48:02,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19838 states. [2019-12-07 12:48:02,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19838 states to 19838 states and 59880 transitions. [2019-12-07 12:48:02,651 INFO L78 Accepts]: Start accepts. Automaton has 19838 states and 59880 transitions. Word has length 29 [2019-12-07 12:48:02,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:02,652 INFO L462 AbstractCegarLoop]: Abstraction has 19838 states and 59880 transitions. [2019-12-07 12:48:02,652 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:48:02,652 INFO L276 IsEmpty]: Start isEmpty. Operand 19838 states and 59880 transitions. [2019-12-07 12:48:02,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 12:48:02,667 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:02,668 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:02,668 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:02,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:02,668 INFO L82 PathProgramCache]: Analyzing trace with hash -2065332723, now seen corresponding path program 1 times [2019-12-07 12:48:02,668 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:02,668 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023087492] [2019-12-07 12:48:02,668 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:02,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:02,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:02,731 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1023087492] [2019-12-07 12:48:02,731 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:02,731 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:48:02,731 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1271977698] [2019-12-07 12:48:02,731 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:48:02,732 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:02,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:48:02,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:48:02,732 INFO L87 Difference]: Start difference. First operand 19838 states and 59880 transitions. Second operand 7 states. [2019-12-07 12:48:03,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:03,392 INFO L93 Difference]: Finished difference Result 27351 states and 80470 transitions. [2019-12-07 12:48:03,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 12:48:03,392 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 12:48:03,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:03,422 INFO L225 Difference]: With dead ends: 27351 [2019-12-07 12:48:03,422 INFO L226 Difference]: Without dead ends: 27351 [2019-12-07 12:48:03,423 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 12:48:03,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27351 states. [2019-12-07 12:48:03,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27351 to 19289. [2019-12-07 12:48:03,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19289 states. [2019-12-07 12:48:03,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19289 states to 19289 states and 58283 transitions. [2019-12-07 12:48:03,752 INFO L78 Accepts]: Start accepts. Automaton has 19289 states and 58283 transitions. Word has length 33 [2019-12-07 12:48:03,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:03,752 INFO L462 AbstractCegarLoop]: Abstraction has 19289 states and 58283 transitions. [2019-12-07 12:48:03,752 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:48:03,752 INFO L276 IsEmpty]: Start isEmpty. Operand 19289 states and 58283 transitions. [2019-12-07 12:48:03,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 12:48:03,769 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:03,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:03,769 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:03,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:03,770 INFO L82 PathProgramCache]: Analyzing trace with hash -1854368583, now seen corresponding path program 1 times [2019-12-07 12:48:03,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:03,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723999102] [2019-12-07 12:48:03,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:03,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:03,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:03,803 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723999102] [2019-12-07 12:48:03,804 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:03,804 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:48:03,804 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [475304111] [2019-12-07 12:48:03,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:48:03,804 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:03,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:48:03,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:48:03,805 INFO L87 Difference]: Start difference. First operand 19289 states and 58283 transitions. Second operand 3 states. [2019-12-07 12:48:03,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:03,859 INFO L93 Difference]: Finished difference Result 18421 states and 54862 transitions. [2019-12-07 12:48:03,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:48:03,859 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 12:48:03,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:03,878 INFO L225 Difference]: With dead ends: 18421 [2019-12-07 12:48:03,878 INFO L226 Difference]: Without dead ends: 18421 [2019-12-07 12:48:03,879 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:48:03,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18421 states. [2019-12-07 12:48:04,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18421 to 18147. [2019-12-07 12:48:04,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18147 states. [2019-12-07 12:48:04,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18147 states to 18147 states and 54094 transitions. [2019-12-07 12:48:04,123 INFO L78 Accepts]: Start accepts. Automaton has 18147 states and 54094 transitions. Word has length 40 [2019-12-07 12:48:04,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:04,123 INFO L462 AbstractCegarLoop]: Abstraction has 18147 states and 54094 transitions. [2019-12-07 12:48:04,123 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:48:04,123 INFO L276 IsEmpty]: Start isEmpty. Operand 18147 states and 54094 transitions. [2019-12-07 12:48:04,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 12:48:04,138 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:04,138 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:04,138 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:04,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:04,138 INFO L82 PathProgramCache]: Analyzing trace with hash 1843753540, now seen corresponding path program 1 times [2019-12-07 12:48:04,138 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:04,139 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821473921] [2019-12-07 12:48:04,139 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:04,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:04,186 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:04,186 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821473921] [2019-12-07 12:48:04,186 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:04,186 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:48:04,186 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [105901748] [2019-12-07 12:48:04,187 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:48:04,187 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:04,187 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:48:04,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:48:04,187 INFO L87 Difference]: Start difference. First operand 18147 states and 54094 transitions. Second operand 5 states. [2019-12-07 12:48:04,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:04,240 INFO L93 Difference]: Finished difference Result 16651 states and 50821 transitions. [2019-12-07 12:48:04,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:48:04,241 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 12:48:04,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:04,258 INFO L225 Difference]: With dead ends: 16651 [2019-12-07 12:48:04,258 INFO L226 Difference]: Without dead ends: 16651 [2019-12-07 12:48:04,258 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:48:04,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16651 states. [2019-12-07 12:48:04,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16651 to 15033. [2019-12-07 12:48:04,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15033 states. [2019-12-07 12:48:04,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15033 states to 15033 states and 46041 transitions. [2019-12-07 12:48:04,503 INFO L78 Accepts]: Start accepts. Automaton has 15033 states and 46041 transitions. Word has length 41 [2019-12-07 12:48:04,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:04,503 INFO L462 AbstractCegarLoop]: Abstraction has 15033 states and 46041 transitions. [2019-12-07 12:48:04,503 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:48:04,503 INFO L276 IsEmpty]: Start isEmpty. Operand 15033 states and 46041 transitions. [2019-12-07 12:48:04,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:48:04,519 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:04,519 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:04,519 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:04,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:04,519 INFO L82 PathProgramCache]: Analyzing trace with hash -1628177899, now seen corresponding path program 1 times [2019-12-07 12:48:04,519 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:04,520 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159226845] [2019-12-07 12:48:04,520 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:04,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:04,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:04,555 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159226845] [2019-12-07 12:48:04,556 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:04,556 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:48:04,556 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [124648363] [2019-12-07 12:48:04,556 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:48:04,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:04,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:48:04,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:48:04,557 INFO L87 Difference]: Start difference. First operand 15033 states and 46041 transitions. Second operand 3 states. [2019-12-07 12:48:04,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:04,627 INFO L93 Difference]: Finished difference Result 19008 states and 57236 transitions. [2019-12-07 12:48:04,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:48:04,627 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:48:04,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:04,647 INFO L225 Difference]: With dead ends: 19008 [2019-12-07 12:48:04,647 INFO L226 Difference]: Without dead ends: 19008 [2019-12-07 12:48:04,647 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:48:04,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19008 states. [2019-12-07 12:48:04,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19008 to 14578. [2019-12-07 12:48:04,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14578 states. [2019-12-07 12:48:04,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14578 states to 14578 states and 44075 transitions. [2019-12-07 12:48:04,890 INFO L78 Accepts]: Start accepts. Automaton has 14578 states and 44075 transitions. Word has length 66 [2019-12-07 12:48:04,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:04,890 INFO L462 AbstractCegarLoop]: Abstraction has 14578 states and 44075 transitions. [2019-12-07 12:48:04,890 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:48:04,890 INFO L276 IsEmpty]: Start isEmpty. Operand 14578 states and 44075 transitions. [2019-12-07 12:48:04,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:48:04,903 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:04,903 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:04,903 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:04,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:04,903 INFO L82 PathProgramCache]: Analyzing trace with hash 1017702190, now seen corresponding path program 1 times [2019-12-07 12:48:04,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:04,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1328431193] [2019-12-07 12:48:04,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:04,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:04,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:04,941 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1328431193] [2019-12-07 12:48:04,941 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:04,941 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:48:04,941 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1945575556] [2019-12-07 12:48:04,941 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:48:04,941 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:04,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:48:04,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:48:04,942 INFO L87 Difference]: Start difference. First operand 14578 states and 44075 transitions. Second operand 3 states. [2019-12-07 12:48:05,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:05,022 INFO L93 Difference]: Finished difference Result 17447 states and 52826 transitions. [2019-12-07 12:48:05,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:48:05,022 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:48:05,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:05,039 INFO L225 Difference]: With dead ends: 17447 [2019-12-07 12:48:05,040 INFO L226 Difference]: Without dead ends: 17447 [2019-12-07 12:48:05,040 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:48:05,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17447 states. [2019-12-07 12:48:05,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17447 to 13814. [2019-12-07 12:48:05,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13814 states. [2019-12-07 12:48:05,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13814 states to 13814 states and 42123 transitions. [2019-12-07 12:48:05,264 INFO L78 Accepts]: Start accepts. Automaton has 13814 states and 42123 transitions. Word has length 66 [2019-12-07 12:48:05,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:05,264 INFO L462 AbstractCegarLoop]: Abstraction has 13814 states and 42123 transitions. [2019-12-07 12:48:05,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:48:05,264 INFO L276 IsEmpty]: Start isEmpty. Operand 13814 states and 42123 transitions. [2019-12-07 12:48:05,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:05,276 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:05,276 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:05,276 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:05,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:05,276 INFO L82 PathProgramCache]: Analyzing trace with hash 1992119349, now seen corresponding path program 1 times [2019-12-07 12:48:05,276 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:05,276 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660237752] [2019-12-07 12:48:05,276 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:05,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:05,320 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:05,320 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1660237752] [2019-12-07 12:48:05,320 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:05,320 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:48:05,320 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1985321084] [2019-12-07 12:48:05,321 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:48:05,321 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:05,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:48:05,321 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:48:05,321 INFO L87 Difference]: Start difference. First operand 13814 states and 42123 transitions. Second operand 4 states. [2019-12-07 12:48:05,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:05,394 INFO L93 Difference]: Finished difference Result 13629 states and 41400 transitions. [2019-12-07 12:48:05,394 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:48:05,394 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 12:48:05,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:05,408 INFO L225 Difference]: With dead ends: 13629 [2019-12-07 12:48:05,408 INFO L226 Difference]: Without dead ends: 13629 [2019-12-07 12:48:05,408 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:48:05,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13629 states. [2019-12-07 12:48:05,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13629 to 12149. [2019-12-07 12:48:05,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12149 states. [2019-12-07 12:48:05,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12149 states to 12149 states and 36824 transitions. [2019-12-07 12:48:05,590 INFO L78 Accepts]: Start accepts. Automaton has 12149 states and 36824 transitions. Word has length 67 [2019-12-07 12:48:05,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:05,590 INFO L462 AbstractCegarLoop]: Abstraction has 12149 states and 36824 transitions. [2019-12-07 12:48:05,590 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:48:05,590 INFO L276 IsEmpty]: Start isEmpty. Operand 12149 states and 36824 transitions. [2019-12-07 12:48:05,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:05,599 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:05,599 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:05,599 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:05,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:05,599 INFO L82 PathProgramCache]: Analyzing trace with hash 1668578459, now seen corresponding path program 1 times [2019-12-07 12:48:05,600 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:05,600 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437418829] [2019-12-07 12:48:05,600 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:05,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:05,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:05,670 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1437418829] [2019-12-07 12:48:05,670 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:05,670 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:48:05,670 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318725888] [2019-12-07 12:48:05,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:48:05,671 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:05,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:48:05,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:48:05,671 INFO L87 Difference]: Start difference. First operand 12149 states and 36824 transitions. Second operand 4 states. [2019-12-07 12:48:05,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:05,735 INFO L93 Difference]: Finished difference Result 21564 states and 65449 transitions. [2019-12-07 12:48:05,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:48:05,736 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 12:48:05,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:05,756 INFO L225 Difference]: With dead ends: 21564 [2019-12-07 12:48:05,757 INFO L226 Difference]: Without dead ends: 18769 [2019-12-07 12:48:05,757 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:48:05,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18769 states. [2019-12-07 12:48:05,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18769 to 11596. [2019-12-07 12:48:05,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11596 states. [2019-12-07 12:48:05,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11596 states to 11596 states and 35089 transitions. [2019-12-07 12:48:05,971 INFO L78 Accepts]: Start accepts. Automaton has 11596 states and 35089 transitions. Word has length 67 [2019-12-07 12:48:05,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:05,971 INFO L462 AbstractCegarLoop]: Abstraction has 11596 states and 35089 transitions. [2019-12-07 12:48:05,971 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:48:05,971 INFO L276 IsEmpty]: Start isEmpty. Operand 11596 states and 35089 transitions. [2019-12-07 12:48:05,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:05,981 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:05,981 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:05,981 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:05,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:05,981 INFO L82 PathProgramCache]: Analyzing trace with hash -1376638825, now seen corresponding path program 2 times [2019-12-07 12:48:05,981 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:05,981 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1769323379] [2019-12-07 12:48:05,981 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:06,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:06,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:06,062 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1769323379] [2019-12-07 12:48:06,062 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:06,063 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:48:06,063 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2022453738] [2019-12-07 12:48:06,063 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:48:06,063 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:06,063 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:48:06,063 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:48:06,063 INFO L87 Difference]: Start difference. First operand 11596 states and 35089 transitions. Second operand 5 states. [2019-12-07 12:48:06,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:06,124 INFO L93 Difference]: Finished difference Result 19502 states and 59264 transitions. [2019-12-07 12:48:06,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:48:06,124 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 12:48:06,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:06,133 INFO L225 Difference]: With dead ends: 19502 [2019-12-07 12:48:06,133 INFO L226 Difference]: Without dead ends: 8705 [2019-12-07 12:48:06,133 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:48:06,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8705 states. [2019-12-07 12:48:06,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8705 to 8705. [2019-12-07 12:48:06,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8705 states. [2019-12-07 12:48:06,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8705 states to 8705 states and 26532 transitions. [2019-12-07 12:48:06,265 INFO L78 Accepts]: Start accepts. Automaton has 8705 states and 26532 transitions. Word has length 67 [2019-12-07 12:48:06,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:06,265 INFO L462 AbstractCegarLoop]: Abstraction has 8705 states and 26532 transitions. [2019-12-07 12:48:06,265 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:48:06,266 INFO L276 IsEmpty]: Start isEmpty. Operand 8705 states and 26532 transitions. [2019-12-07 12:48:06,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:06,272 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:06,272 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:06,272 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:06,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:06,272 INFO L82 PathProgramCache]: Analyzing trace with hash 1541701607, now seen corresponding path program 3 times [2019-12-07 12:48:06,273 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:06,273 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821333975] [2019-12-07 12:48:06,273 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:06,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:06,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:06,348 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821333975] [2019-12-07 12:48:06,348 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:06,348 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:48:06,349 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [554432011] [2019-12-07 12:48:06,349 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:48:06,349 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:06,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:48:06,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:48:06,350 INFO L87 Difference]: Start difference. First operand 8705 states and 26532 transitions. Second operand 4 states. [2019-12-07 12:48:06,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:06,412 INFO L93 Difference]: Finished difference Result 15378 states and 47132 transitions. [2019-12-07 12:48:06,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:48:06,413 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 12:48:06,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:06,427 INFO L225 Difference]: With dead ends: 15378 [2019-12-07 12:48:06,427 INFO L226 Difference]: Without dead ends: 12938 [2019-12-07 12:48:06,427 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:48:06,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12938 states. [2019-12-07 12:48:06,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12938 to 8474. [2019-12-07 12:48:06,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8474 states. [2019-12-07 12:48:06,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8474 states to 8474 states and 25844 transitions. [2019-12-07 12:48:06,589 INFO L78 Accepts]: Start accepts. Automaton has 8474 states and 25844 transitions. Word has length 67 [2019-12-07 12:48:06,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:06,589 INFO L462 AbstractCegarLoop]: Abstraction has 8474 states and 25844 transitions. [2019-12-07 12:48:06,589 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:48:06,589 INFO L276 IsEmpty]: Start isEmpty. Operand 8474 states and 25844 transitions. [2019-12-07 12:48:06,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:06,596 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:06,596 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:06,596 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:06,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:06,596 INFO L82 PathProgramCache]: Analyzing trace with hash 1209323901, now seen corresponding path program 4 times [2019-12-07 12:48:06,596 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:06,596 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327445681] [2019-12-07 12:48:06,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:06,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:06,686 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:06,686 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [327445681] [2019-12-07 12:48:06,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:06,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:48:06,687 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [590822788] [2019-12-07 12:48:06,687 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:48:06,687 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:06,687 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:48:06,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:48:06,687 INFO L87 Difference]: Start difference. First operand 8474 states and 25844 transitions. Second operand 5 states. [2019-12-07 12:48:06,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:06,753 INFO L93 Difference]: Finished difference Result 14965 states and 45907 transitions. [2019-12-07 12:48:06,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:48:06,754 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 12:48:06,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:06,763 INFO L225 Difference]: With dead ends: 14965 [2019-12-07 12:48:06,763 INFO L226 Difference]: Without dead ends: 6996 [2019-12-07 12:48:06,764 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:48:06,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6996 states. [2019-12-07 12:48:06,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6996 to 6996. [2019-12-07 12:48:06,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6996 states. [2019-12-07 12:48:06,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6996 states to 6996 states and 21488 transitions. [2019-12-07 12:48:06,887 INFO L78 Accepts]: Start accepts. Automaton has 6996 states and 21488 transitions. Word has length 67 [2019-12-07 12:48:06,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:06,887 INFO L462 AbstractCegarLoop]: Abstraction has 6996 states and 21488 transitions. [2019-12-07 12:48:06,887 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:48:06,887 INFO L276 IsEmpty]: Start isEmpty. Operand 6996 states and 21488 transitions. [2019-12-07 12:48:06,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:06,909 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:06,909 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:06,910 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:06,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:06,910 INFO L82 PathProgramCache]: Analyzing trace with hash -1000943315, now seen corresponding path program 5 times [2019-12-07 12:48:06,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:06,910 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1877144818] [2019-12-07 12:48:06,910 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:06,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:07,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:07,244 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1877144818] [2019-12-07 12:48:07,244 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:07,244 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 12:48:07,244 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [780326553] [2019-12-07 12:48:07,244 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 12:48:07,244 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:07,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 12:48:07,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2019-12-07 12:48:07,245 INFO L87 Difference]: Start difference. First operand 6996 states and 21488 transitions. Second operand 15 states. [2019-12-07 12:48:08,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:08,546 INFO L93 Difference]: Finished difference Result 13447 states and 40093 transitions. [2019-12-07 12:48:08,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 12:48:08,546 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 12:48:08,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:08,555 INFO L225 Difference]: With dead ends: 13447 [2019-12-07 12:48:08,555 INFO L226 Difference]: Without dead ends: 9644 [2019-12-07 12:48:08,555 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 259 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=222, Invalid=1184, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 12:48:08,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9644 states. [2019-12-07 12:48:08,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9644 to 7712. [2019-12-07 12:48:08,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7712 states. [2019-12-07 12:48:08,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7712 states to 7712 states and 23405 transitions. [2019-12-07 12:48:08,683 INFO L78 Accepts]: Start accepts. Automaton has 7712 states and 23405 transitions. Word has length 67 [2019-12-07 12:48:08,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:08,684 INFO L462 AbstractCegarLoop]: Abstraction has 7712 states and 23405 transitions. [2019-12-07 12:48:08,684 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 12:48:08,684 INFO L276 IsEmpty]: Start isEmpty. Operand 7712 states and 23405 transitions. [2019-12-07 12:48:08,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:08,689 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:08,689 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:08,690 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:08,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:08,690 INFO L82 PathProgramCache]: Analyzing trace with hash 1858790051, now seen corresponding path program 6 times [2019-12-07 12:48:08,690 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:08,690 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78910554] [2019-12-07 12:48:08,690 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:08,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:09,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:09,775 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [78910554] [2019-12-07 12:48:09,775 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:09,775 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2019-12-07 12:48:09,776 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1810474980] [2019-12-07 12:48:09,776 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-12-07 12:48:09,776 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:09,776 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-12-07 12:48:09,776 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=529, Unknown=0, NotChecked=0, Total=600 [2019-12-07 12:48:09,776 INFO L87 Difference]: Start difference. First operand 7712 states and 23405 transitions. Second operand 25 states. [2019-12-07 12:48:16,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:16,221 INFO L93 Difference]: Finished difference Result 14505 states and 42927 transitions. [2019-12-07 12:48:16,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2019-12-07 12:48:16,222 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 67 [2019-12-07 12:48:16,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:16,237 INFO L225 Difference]: With dead ends: 14505 [2019-12-07 12:48:16,237 INFO L226 Difference]: Without dead ends: 10272 [2019-12-07 12:48:16,239 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 3 SyntacticMatches, 7 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1086 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=471, Invalid=4221, Unknown=0, NotChecked=0, Total=4692 [2019-12-07 12:48:16,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10272 states. [2019-12-07 12:48:16,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10272 to 9246. [2019-12-07 12:48:16,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9246 states. [2019-12-07 12:48:16,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9246 states to 9246 states and 28093 transitions. [2019-12-07 12:48:16,396 INFO L78 Accepts]: Start accepts. Automaton has 9246 states and 28093 transitions. Word has length 67 [2019-12-07 12:48:16,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:16,397 INFO L462 AbstractCegarLoop]: Abstraction has 9246 states and 28093 transitions. [2019-12-07 12:48:16,397 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-12-07 12:48:16,397 INFO L276 IsEmpty]: Start isEmpty. Operand 9246 states and 28093 transitions. [2019-12-07 12:48:16,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:16,404 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:16,404 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:16,404 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:16,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:16,404 INFO L82 PathProgramCache]: Analyzing trace with hash -1476017125, now seen corresponding path program 7 times [2019-12-07 12:48:16,405 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:16,405 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [657203389] [2019-12-07 12:48:16,405 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:16,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:16,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:16,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [657203389] [2019-12-07 12:48:16,531 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:16,531 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:48:16,531 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [313253445] [2019-12-07 12:48:16,531 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 12:48:16,531 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:16,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 12:48:16,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:48:16,532 INFO L87 Difference]: Start difference. First operand 9246 states and 28093 transitions. Second operand 10 states. [2019-12-07 12:48:17,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:17,210 INFO L93 Difference]: Finished difference Result 17211 states and 51245 transitions. [2019-12-07 12:48:17,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 12:48:17,210 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 12:48:17,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:17,220 INFO L225 Difference]: With dead ends: 17211 [2019-12-07 12:48:17,220 INFO L226 Difference]: Without dead ends: 10540 [2019-12-07 12:48:17,221 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2019-12-07 12:48:17,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10540 states. [2019-12-07 12:48:17,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10540 to 7971. [2019-12-07 12:48:17,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7971 states. [2019-12-07 12:48:17,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7971 states to 7971 states and 23874 transitions. [2019-12-07 12:48:17,357 INFO L78 Accepts]: Start accepts. Automaton has 7971 states and 23874 transitions. Word has length 67 [2019-12-07 12:48:17,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:17,357 INFO L462 AbstractCegarLoop]: Abstraction has 7971 states and 23874 transitions. [2019-12-07 12:48:17,357 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 12:48:17,357 INFO L276 IsEmpty]: Start isEmpty. Operand 7971 states and 23874 transitions. [2019-12-07 12:48:17,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:17,363 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:17,363 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:17,363 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:17,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:17,363 INFO L82 PathProgramCache]: Analyzing trace with hash -1387520431, now seen corresponding path program 8 times [2019-12-07 12:48:17,364 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:17,364 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [495347613] [2019-12-07 12:48:17,364 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:17,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:17,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:17,830 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [495347613] [2019-12-07 12:48:17,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:17,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 12:48:17,830 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2067099292] [2019-12-07 12:48:17,831 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 12:48:17,831 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:17,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 12:48:17,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-12-07 12:48:17,831 INFO L87 Difference]: Start difference. First operand 7971 states and 23874 transitions. Second operand 16 states. [2019-12-07 12:48:18,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:18,937 INFO L93 Difference]: Finished difference Result 11504 states and 33816 transitions. [2019-12-07 12:48:18,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 12:48:18,938 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 12:48:18,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:18,946 INFO L225 Difference]: With dead ends: 11504 [2019-12-07 12:48:18,946 INFO L226 Difference]: Without dead ends: 8845 [2019-12-07 12:48:18,947 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 0 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=121, Invalid=691, Unknown=0, NotChecked=0, Total=812 [2019-12-07 12:48:18,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8845 states. [2019-12-07 12:48:19,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8845 to 8011. [2019-12-07 12:48:19,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8011 states. [2019-12-07 12:48:19,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8011 states to 8011 states and 23976 transitions. [2019-12-07 12:48:19,071 INFO L78 Accepts]: Start accepts. Automaton has 8011 states and 23976 transitions. Word has length 67 [2019-12-07 12:48:19,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:19,071 INFO L462 AbstractCegarLoop]: Abstraction has 8011 states and 23976 transitions. [2019-12-07 12:48:19,071 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 12:48:19,071 INFO L276 IsEmpty]: Start isEmpty. Operand 8011 states and 23976 transitions. [2019-12-07 12:48:19,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:19,077 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:19,078 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:19,078 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:19,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:19,078 INFO L82 PathProgramCache]: Analyzing trace with hash -535170393, now seen corresponding path program 9 times [2019-12-07 12:48:19,078 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:19,078 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65459222] [2019-12-07 12:48:19,078 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:19,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:19,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:19,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [65459222] [2019-12-07 12:48:19,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:19,206 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:48:19,206 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1824683450] [2019-12-07 12:48:19,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 12:48:19,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:19,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 12:48:19,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:48:19,207 INFO L87 Difference]: Start difference. First operand 8011 states and 23976 transitions. Second operand 10 states. [2019-12-07 12:48:19,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:19,871 INFO L93 Difference]: Finished difference Result 14224 states and 41692 transitions. [2019-12-07 12:48:19,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 12:48:19,871 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 12:48:19,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:19,881 INFO L225 Difference]: With dead ends: 14224 [2019-12-07 12:48:19,881 INFO L226 Difference]: Without dead ends: 11169 [2019-12-07 12:48:19,881 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 12:48:19,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11169 states. [2019-12-07 12:48:20,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11169 to 8251. [2019-12-07 12:48:20,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8251 states. [2019-12-07 12:48:20,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8251 states to 8251 states and 24530 transitions. [2019-12-07 12:48:20,020 INFO L78 Accepts]: Start accepts. Automaton has 8251 states and 24530 transitions. Word has length 67 [2019-12-07 12:48:20,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:20,020 INFO L462 AbstractCegarLoop]: Abstraction has 8251 states and 24530 transitions. [2019-12-07 12:48:20,020 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 12:48:20,020 INFO L276 IsEmpty]: Start isEmpty. Operand 8251 states and 24530 transitions. [2019-12-07 12:48:20,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:20,026 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:20,026 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:20,026 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:20,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:20,026 INFO L82 PathProgramCache]: Analyzing trace with hash 1156359029, now seen corresponding path program 10 times [2019-12-07 12:48:20,026 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:20,026 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1760406315] [2019-12-07 12:48:20,027 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:20,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:20,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:20,157 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1760406315] [2019-12-07 12:48:20,157 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:20,157 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:48:20,157 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2010554754] [2019-12-07 12:48:20,157 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:48:20,157 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:20,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:48:20,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:48:20,158 INFO L87 Difference]: Start difference. First operand 8251 states and 24530 transitions. Second operand 11 states. [2019-12-07 12:48:21,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:21,869 INFO L93 Difference]: Finished difference Result 13384 states and 39107 transitions. [2019-12-07 12:48:21,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 12:48:21,870 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:48:21,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:21,886 INFO L225 Difference]: With dead ends: 13384 [2019-12-07 12:48:21,886 INFO L226 Difference]: Without dead ends: 10577 [2019-12-07 12:48:21,887 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=87, Invalid=419, Unknown=0, NotChecked=0, Total=506 [2019-12-07 12:48:21,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10577 states. [2019-12-07 12:48:22,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10577 to 8023. [2019-12-07 12:48:22,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8023 states. [2019-12-07 12:48:22,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8023 states to 8023 states and 23886 transitions. [2019-12-07 12:48:22,027 INFO L78 Accepts]: Start accepts. Automaton has 8023 states and 23886 transitions. Word has length 67 [2019-12-07 12:48:22,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:22,027 INFO L462 AbstractCegarLoop]: Abstraction has 8023 states and 23886 transitions. [2019-12-07 12:48:22,027 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:48:22,027 INFO L276 IsEmpty]: Start isEmpty. Operand 8023 states and 23886 transitions. [2019-12-07 12:48:22,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:22,033 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:22,033 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:22,033 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:22,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:22,033 INFO L82 PathProgramCache]: Analyzing trace with hash -1555205525, now seen corresponding path program 11 times [2019-12-07 12:48:22,034 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:22,034 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [736554528] [2019-12-07 12:48:22,034 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:22,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:22,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:22,183 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [736554528] [2019-12-07 12:48:22,184 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:22,184 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:48:22,184 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [538499348] [2019-12-07 12:48:22,184 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:48:22,184 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:22,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:48:22,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:48:22,184 INFO L87 Difference]: Start difference. First operand 8023 states and 23886 transitions. Second operand 11 states. [2019-12-07 12:48:22,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:22,715 INFO L93 Difference]: Finished difference Result 14508 states and 42865 transitions. [2019-12-07 12:48:22,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 12:48:22,715 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:48:22,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:22,725 INFO L225 Difference]: With dead ends: 14508 [2019-12-07 12:48:22,725 INFO L226 Difference]: Without dead ends: 12145 [2019-12-07 12:48:22,726 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 185 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=179, Invalid=751, Unknown=0, NotChecked=0, Total=930 [2019-12-07 12:48:22,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12145 states. [2019-12-07 12:48:22,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12145 to 10119. [2019-12-07 12:48:22,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10119 states. [2019-12-07 12:48:22,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10119 states to 10119 states and 30204 transitions. [2019-12-07 12:48:22,884 INFO L78 Accepts]: Start accepts. Automaton has 10119 states and 30204 transitions. Word has length 67 [2019-12-07 12:48:22,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:22,884 INFO L462 AbstractCegarLoop]: Abstraction has 10119 states and 30204 transitions. [2019-12-07 12:48:22,884 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:48:22,884 INFO L276 IsEmpty]: Start isEmpty. Operand 10119 states and 30204 transitions. [2019-12-07 12:48:22,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:22,892 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:22,892 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:22,892 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:22,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:22,892 INFO L82 PathProgramCache]: Analyzing trace with hash 1250353067, now seen corresponding path program 12 times [2019-12-07 12:48:22,892 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:22,892 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1309857250] [2019-12-07 12:48:22,892 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:22,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:23,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:23,783 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1309857250] [2019-12-07 12:48:23,783 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:23,783 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 12:48:23,783 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [844280795] [2019-12-07 12:48:23,784 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 12:48:23,784 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:23,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 12:48:23,784 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=483, Unknown=0, NotChecked=0, Total=552 [2019-12-07 12:48:23,784 INFO L87 Difference]: Start difference. First operand 10119 states and 30204 transitions. Second operand 24 states. [2019-12-07 12:48:28,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:28,555 INFO L93 Difference]: Finished difference Result 11461 states and 33684 transitions. [2019-12-07 12:48:28,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 12:48:28,556 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 67 [2019-12-07 12:48:28,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:28,566 INFO L225 Difference]: With dead ends: 11461 [2019-12-07 12:48:28,566 INFO L226 Difference]: Without dead ends: 11158 [2019-12-07 12:48:28,567 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 2 SyntacticMatches, 6 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 591 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=322, Invalid=2540, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 12:48:28,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11158 states. [2019-12-07 12:48:28,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11158 to 10702. [2019-12-07 12:48:28,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10702 states. [2019-12-07 12:48:28,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10702 states to 10702 states and 31832 transitions. [2019-12-07 12:48:28,722 INFO L78 Accepts]: Start accepts. Automaton has 10702 states and 31832 transitions. Word has length 67 [2019-12-07 12:48:28,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:28,722 INFO L462 AbstractCegarLoop]: Abstraction has 10702 states and 31832 transitions. [2019-12-07 12:48:28,722 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 12:48:28,722 INFO L276 IsEmpty]: Start isEmpty. Operand 10702 states and 31832 transitions. [2019-12-07 12:48:28,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:28,730 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:28,730 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:28,730 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:28,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:28,731 INFO L82 PathProgramCache]: Analyzing trace with hash -2084454109, now seen corresponding path program 13 times [2019-12-07 12:48:28,731 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:28,731 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900869798] [2019-12-07 12:48:28,731 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:28,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:28,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:28,855 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1900869798] [2019-12-07 12:48:28,855 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:28,855 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:48:28,856 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2080606836] [2019-12-07 12:48:28,856 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:48:28,856 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:28,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:48:28,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:48:28,856 INFO L87 Difference]: Start difference. First operand 10702 states and 31832 transitions. Second operand 11 states. [2019-12-07 12:48:29,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:29,328 INFO L93 Difference]: Finished difference Result 12982 states and 37945 transitions. [2019-12-07 12:48:29,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 12:48:29,329 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:48:29,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:29,338 INFO L225 Difference]: With dead ends: 12982 [2019-12-07 12:48:29,338 INFO L226 Difference]: Without dead ends: 10002 [2019-12-07 12:48:29,338 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=151, Invalid=605, Unknown=0, NotChecked=0, Total=756 [2019-12-07 12:48:29,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10002 states. [2019-12-07 12:48:29,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10002 to 7906. [2019-12-07 12:48:29,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7906 states. [2019-12-07 12:48:29,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7906 states to 7906 states and 23435 transitions. [2019-12-07 12:48:29,468 INFO L78 Accepts]: Start accepts. Automaton has 7906 states and 23435 transitions. Word has length 67 [2019-12-07 12:48:29,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:29,468 INFO L462 AbstractCegarLoop]: Abstraction has 7906 states and 23435 transitions. [2019-12-07 12:48:29,469 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:48:29,469 INFO L276 IsEmpty]: Start isEmpty. Operand 7906 states and 23435 transitions. [2019-12-07 12:48:29,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:29,474 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:29,475 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:29,475 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:29,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:29,475 INFO L82 PathProgramCache]: Analyzing trace with hash -945042827, now seen corresponding path program 14 times [2019-12-07 12:48:29,475 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:29,475 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741783521] [2019-12-07 12:48:29,475 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:29,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:48:29,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:48:29,729 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [741783521] [2019-12-07 12:48:29,729 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:48:29,729 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 12:48:29,729 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2037932389] [2019-12-07 12:48:29,730 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 12:48:29,730 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:48:29,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 12:48:29,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 12:48:29,730 INFO L87 Difference]: Start difference. First operand 7906 states and 23435 transitions. Second operand 15 states. [2019-12-07 12:48:31,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:48:31,435 INFO L93 Difference]: Finished difference Result 10436 states and 30032 transitions. [2019-12-07 12:48:31,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 12:48:31,435 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 12:48:31,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:48:31,444 INFO L225 Difference]: With dead ends: 10436 [2019-12-07 12:48:31,444 INFO L226 Difference]: Without dead ends: 10007 [2019-12-07 12:48:31,445 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 770 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=461, Invalid=2401, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 12:48:31,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10007 states. [2019-12-07 12:48:31,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10007 to 8189. [2019-12-07 12:48:31,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8189 states. [2019-12-07 12:48:31,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8189 states to 8189 states and 24177 transitions. [2019-12-07 12:48:31,580 INFO L78 Accepts]: Start accepts. Automaton has 8189 states and 24177 transitions. Word has length 67 [2019-12-07 12:48:31,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:48:31,580 INFO L462 AbstractCegarLoop]: Abstraction has 8189 states and 24177 transitions. [2019-12-07 12:48:31,580 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 12:48:31,580 INFO L276 IsEmpty]: Start isEmpty. Operand 8189 states and 24177 transitions. [2019-12-07 12:48:31,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:48:31,586 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:48:31,586 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:48:31,586 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:48:31,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:48:31,586 INFO L82 PathProgramCache]: Analyzing trace with hash -1748623595, now seen corresponding path program 15 times [2019-12-07 12:48:31,586 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:48:31,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1558532399] [2019-12-07 12:48:31,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:48:31,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:48:31,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:48:31,670 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:48:31,671 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:48:31,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [905] [905] ULTIMATE.startENTRY-->L842: Formula: (let ((.cse0 (store |v_#valid_67| 0 0))) (and (= v_~b$r_buff1_thd0~0_230 0) (= v_~b$w_buff1~0_176 0) (= v_~b$mem_tmp~0_20 0) (= v_~weak$$choice2~0_144 0) (= 0 v_~b$r_buff1_thd3~0_337) (= 0 v_~b$read_delayed~0_7) (= 0 v_~b$r_buff0_thd2~0_182) (= 0 v_~__unbuffered_p0_EAX~0_176) (= v_~__unbuffered_p1_EBX~0_38 0) (= v_~main$tmp_guard1~0_34 0) (= v_~y~0_19 0) (= 0 v_~__unbuffered_p1_EAX~0_38) (= v_~b$r_buff0_thd0~0_204 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t867~0.base_25|)) (= 0 v_~b$r_buff1_thd1~0_215) (= v_~a~0_14 0) (= 0 v_~x~0_124) (= 0 v_~b$r_buff0_thd3~0_395) (= v_~__unbuffered_p2_EBX~0_38 0) (= v_~b$read_delayed_var~0.offset_7 0) (= v_~z~0_23 0) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p2_EAX~0_34) (= 0 v_~b$w_buff0_used~0_787) (= |v_#valid_65| (store .cse0 |v_ULTIMATE.start_main_~#t867~0.base_25| 1)) (= |v_#NULL.offset_4| 0) (= 0 v_~b$w_buff0~0_250) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t867~0.base_25|) (= v_~__unbuffered_cnt~0_137 0) (= 0 |v_ULTIMATE.start_main_~#t867~0.offset_17|) (= 0 v_~b$w_buff1_used~0_450) (= 0 v_~b$r_buff1_thd2~0_222) (= 0 v_~weak$$choice0~0_13) (= v_~b~0_186 0) (= v_~main$tmp_guard0~0_24 0) (= v_~b$flush_delayed~0_35 0) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t867~0.base_25| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t867~0.base_25|) |v_ULTIMATE.start_main_~#t867~0.offset_17| 0))) (= 0 v_~b$read_delayed_var~0.base_7) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t867~0.base_25| 4) |v_#length_25|) (= 0 v_~b$r_buff0_thd1~0_323))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_67|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_395, ~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_215, ~b$read_delayed_var~0.offset=v_~b$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t868~0.offset=|v_ULTIMATE.start_main_~#t868~0.offset_17|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_35|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_245|, ULTIMATE.start_main_~#t867~0.base=|v_ULTIMATE.start_main_~#t867~0.base_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_51|, ~b$w_buff0_used~0=v_~b$w_buff0_used~0_787, ~a~0=v_~a~0_14, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_176, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_38, #length=|v_#length_25|, ~b$w_buff0~0=v_~b$w_buff0~0_250, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_204, ~b$r_buff0_thd2~0=v_~b$r_buff0_thd2~0_182, ~b$mem_tmp~0=v_~b$mem_tmp~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~b$flush_delayed~0=v_~b$flush_delayed~0_35, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~b$read_delayed~0=v_~b$read_delayed~0_7, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t867~0.offset=|v_ULTIMATE.start_main_~#t867~0.offset_17|, ~b$w_buff1~0=v_~b$w_buff1~0_176, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_137, ~x~0=v_~x~0_124, ~b$r_buff0_thd1~0=v_~b$r_buff0_thd1~0_323, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ULTIMATE.start_main_~#t869~0.base=|v_ULTIMATE.start_main_~#t869~0.base_21|, ULTIMATE.start_main_~#t869~0.offset=|v_ULTIMATE.start_main_~#t869~0.offset_17|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~b$w_buff1_used~0=v_~b$w_buff1_used~0_450, ~y~0=v_~y~0_19, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_222, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_230, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_38, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_4|, ~b$read_delayed_var~0.base=v_~b$read_delayed_var~0.base_7, ~b~0=v_~b~0_186, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_28|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t868~0.base=|v_ULTIMATE.start_main_~#t868~0.base_21|, ~z~0=v_~z~0_23, ~weak$$choice2~0=v_~weak$$choice2~0_144, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_337} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, ~b$r_buff1_thd1~0, ~b$read_delayed_var~0.offset, ULTIMATE.start_main_~#t868~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t867~0.base, ULTIMATE.start_main_#t~ite50, ~b$w_buff0_used~0, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~b$w_buff0~0, ~__unbuffered_p2_EAX~0, ~b$r_buff0_thd0~0, ~b$r_buff0_thd2~0, ~b$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~b$flush_delayed~0, ULTIMATE.start_main_#t~nondet45, ~b$read_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t867~0.offset, ~b$w_buff1~0, ~__unbuffered_cnt~0, ~x~0, ~b$r_buff0_thd1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t869~0.base, ULTIMATE.start_main_~#t869~0.offset, ULTIMATE.start_main_#t~ite51, ~b$w_buff1_used~0, ~y~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd0~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~main$tmp_guard0~0, #NULL.base, ~b$read_delayed_var~0.base, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t868~0.base, ~z~0, ~weak$$choice2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 12:48:31,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [864] [864] L842-1-->L844: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t868~0.base_10|)) (= |v_ULTIMATE.start_main_~#t868~0.offset_9| 0) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t868~0.base_10| 1) |v_#valid_27|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t868~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t868~0.base_10|) |v_ULTIMATE.start_main_~#t868~0.offset_9| 1)) |v_#memory_int_11|) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t868~0.base_10|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t868~0.base_10| 4) |v_#length_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t868~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t868~0.offset=|v_ULTIMATE.start_main_~#t868~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t868~0.base=|v_ULTIMATE.start_main_~#t868~0.base_10|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t868~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t868~0.base, #length] because there is no mapped edge [2019-12-07 12:48:31,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L844-1-->L846: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t869~0.base_13|) (= |v_ULTIMATE.start_main_~#t869~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t869~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t869~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t869~0.base_13|) |v_ULTIMATE.start_main_~#t869~0.offset_11| 2)) |v_#memory_int_15|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t869~0.base_13| 1)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t869~0.base_13|)) (not (= |v_ULTIMATE.start_main_~#t869~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t869~0.base=|v_ULTIMATE.start_main_~#t869~0.base_13|, ULTIMATE.start_main_~#t869~0.offset=|v_ULTIMATE.start_main_~#t869~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t869~0.base, ULTIMATE.start_main_~#t869~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 12:48:31,675 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L4-->L754: Formula: (and (not (= P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1884183186 0)) (= ~b$r_buff0_thd1~0_In-1884183186 ~b$r_buff1_thd1~0_Out-1884183186) (= ~b$r_buff1_thd0~0_Out-1884183186 ~b$r_buff0_thd0~0_In-1884183186) (= ~b$r_buff0_thd2~0_In-1884183186 ~b$r_buff1_thd2~0_Out-1884183186) (= ~b$r_buff1_thd3~0_Out-1884183186 ~b$r_buff0_thd3~0_In-1884183186) (= 1 ~b$r_buff0_thd1~0_Out-1884183186) (= ~x~0_In-1884183186 ~__unbuffered_p0_EAX~0_Out-1884183186)) InVars {~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1884183186, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1884183186, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1884183186, P0Thread1of1ForFork2___VERIFIER_assert_~expression=P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1884183186, ~x~0=~x~0_In-1884183186, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1884183186} OutVars{~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-1884183186, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1884183186, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-1884183186, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1884183186, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_Out-1884183186, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_Out-1884183186, P0Thread1of1ForFork2___VERIFIER_assert_~expression=P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1884183186, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_Out-1884183186, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_Out-1884183186, ~x~0=~x~0_In-1884183186, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1884183186} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, ~__unbuffered_p0_EAX~0, ~b$r_buff1_thd1~0, ~b$r_buff1_thd0~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 12:48:31,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L780-2-->L780-4: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd2~0_In-1969332740 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In-1969332740 256) 0))) (or (and (not .cse0) (= ~b$w_buff1~0_In-1969332740 |P1Thread1of1ForFork0_#t~ite9_Out-1969332740|) (not .cse1)) (and (= ~b~0_In-1969332740 |P1Thread1of1ForFork0_#t~ite9_Out-1969332740|) (or .cse1 .cse0)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-1969332740, ~b~0=~b~0_In-1969332740, ~b$w_buff1~0=~b$w_buff1~0_In-1969332740, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1969332740} OutVars{~b$w_buff1_used~0=~b$w_buff1_used~0_In-1969332740, ~b~0=~b~0_In-1969332740, ~b$w_buff1~0=~b$w_buff1~0_In-1969332740, P1Thread1of1ForFork0_#t~ite9=|P1Thread1of1ForFork0_#t~ite9_Out-1969332740|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1969332740} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 12:48:31,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L780-4-->L781: Formula: (= v_~b~0_66 |v_P1Thread1of1ForFork0_#t~ite9_32|) InVars {P1Thread1of1ForFork0_#t~ite9=|v_P1Thread1of1ForFork0_#t~ite9_32|} OutVars{~b~0=v_~b~0_66, P1Thread1of1ForFork0_#t~ite10=|v_P1Thread1of1ForFork0_#t~ite10_51|, P1Thread1of1ForFork0_#t~ite9=|v_P1Thread1of1ForFork0_#t~ite9_31|} AuxVars[] AssignedVars[~b~0, P1Thread1of1ForFork0_#t~ite10, P1Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 12:48:31,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L781-->L781-2: Formula: (let ((.cse0 (= (mod ~b$r_buff0_thd2~0_In1798604312 256) 0)) (.cse1 (= (mod ~b$w_buff0_used~0_In1798604312 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite11_Out1798604312| ~b$w_buff0_used~0_In1798604312)) (and (not .cse0) (= |P1Thread1of1ForFork0_#t~ite11_Out1798604312| 0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1798604312, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1798604312} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1798604312, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1798604312, P1Thread1of1ForFork0_#t~ite11=|P1Thread1of1ForFork0_#t~ite11_Out1798604312|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 12:48:31,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L782-->L782-2: Formula: (let ((.cse3 (= (mod ~b$w_buff0_used~0_In-1394633383 256) 0)) (.cse2 (= 0 (mod ~b$r_buff0_thd2~0_In-1394633383 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In-1394633383 256) 0)) (.cse1 (= 0 (mod ~b$r_buff1_thd2~0_In-1394633383 256)))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite12_Out-1394633383|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork0_#t~ite12_Out-1394633383| ~b$w_buff1_used~0_In-1394633383) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1394633383, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1394633383, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1394633383, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1394633383} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1394633383, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1394633383, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1394633383, P1Thread1of1ForFork0_#t~ite12=|P1Thread1of1ForFork0_#t~ite12_Out-1394633383|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1394633383} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 12:48:31,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L783-->L783-2: Formula: (let ((.cse1 (= (mod ~b$r_buff0_thd2~0_In2126512762 256) 0)) (.cse0 (= (mod ~b$w_buff0_used~0_In2126512762 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork0_#t~ite13_Out2126512762|)) (and (or .cse1 .cse0) (= ~b$r_buff0_thd2~0_In2126512762 |P1Thread1of1ForFork0_#t~ite13_Out2126512762|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In2126512762, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In2126512762} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In2126512762, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In2126512762, P1Thread1of1ForFork0_#t~ite13=|P1Thread1of1ForFork0_#t~ite13_Out2126512762|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 12:48:31,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L784-->L784-2: Formula: (let ((.cse3 (= (mod ~b$r_buff1_thd2~0_In-1736517195 256) 0)) (.cse2 (= (mod ~b$w_buff1_used~0_In-1736517195 256) 0)) (.cse1 (= 0 (mod ~b$w_buff0_used~0_In-1736517195 256))) (.cse0 (= (mod ~b$r_buff0_thd2~0_In-1736517195 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite14_Out-1736517195|)) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork0_#t~ite14_Out-1736517195| ~b$r_buff1_thd2~0_In-1736517195) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1736517195, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1736517195, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1736517195, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1736517195} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1736517195, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1736517195, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1736517195, P1Thread1of1ForFork0_#t~ite14=|P1Thread1of1ForFork0_#t~ite14_Out-1736517195|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1736517195} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 12:48:31,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L784-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1)) (= v_~b$r_buff1_thd2~0_85 |v_P1Thread1of1ForFork0_#t~ite14_30|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_30|} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_29|, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_85, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~__unbuffered_cnt~0, P1Thread1of1ForFork0_#t~ite14, P1Thread1of1ForFork0_#res.offset, ~b$r_buff1_thd2~0, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 12:48:31,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L808-->L808-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1283311795 256)))) (or (and .cse0 (= |P2Thread1of1ForFork1_#t~ite20_Out1283311795| ~b$w_buff0~0_In1283311795) (let ((.cse1 (= (mod ~b$r_buff0_thd3~0_In1283311795 256) 0))) (or (and .cse1 (= (mod ~b$r_buff1_thd3~0_In1283311795 256) 0)) (and .cse1 (= 0 (mod ~b$w_buff1_used~0_In1283311795 256))) (= 0 (mod ~b$w_buff0_used~0_In1283311795 256)))) (= |P2Thread1of1ForFork1_#t~ite20_Out1283311795| |P2Thread1of1ForFork1_#t~ite21_Out1283311795|)) (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite21_Out1283311795| ~b$w_buff0~0_In1283311795) (= |P2Thread1of1ForFork1_#t~ite20_In1283311795| |P2Thread1of1ForFork1_#t~ite20_Out1283311795|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1283311795, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1283311795, P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_In1283311795|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1283311795, ~b$w_buff0~0=~b$w_buff0~0_In1283311795, ~weak$$choice2~0=~weak$$choice2~0_In1283311795, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1283311795} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1283311795, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1283311795, P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_Out1283311795|, P2Thread1of1ForFork1_#t~ite21=|P2Thread1of1ForFork1_#t~ite21_Out1283311795|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1283311795, ~b$w_buff0~0=~b$w_buff0~0_In1283311795, ~weak$$choice2~0=~weak$$choice2~0_In1283311795, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1283311795} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite20, P2Thread1of1ForFork1_#t~ite21] because there is no mapped edge [2019-12-07 12:48:31,679 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [885] [885] L810-->L810-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1298073589 256)))) (or (and (= ~b$w_buff0_used~0_In-1298073589 |P2Thread1of1ForFork1_#t~ite27_Out-1298073589|) (not .cse0) (= |P2Thread1of1ForFork1_#t~ite26_In-1298073589| |P2Thread1of1ForFork1_#t~ite26_Out-1298073589|)) (and (= ~b$w_buff0_used~0_In-1298073589 |P2Thread1of1ForFork1_#t~ite26_Out-1298073589|) (= |P2Thread1of1ForFork1_#t~ite27_Out-1298073589| |P2Thread1of1ForFork1_#t~ite26_Out-1298073589|) .cse0 (let ((.cse1 (= (mod ~b$r_buff0_thd3~0_In-1298073589 256) 0))) (or (= 0 (mod ~b$w_buff0_used~0_In-1298073589 256)) (and .cse1 (= 0 (mod ~b$w_buff1_used~0_In-1298073589 256))) (and (= (mod ~b$r_buff1_thd3~0_In-1298073589 256) 0) .cse1)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1298073589, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1298073589, P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_In-1298073589|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1298073589, ~weak$$choice2~0=~weak$$choice2~0_In-1298073589, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1298073589} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1298073589, P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_Out-1298073589|, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1298073589, P2Thread1of1ForFork1_#t~ite27=|P2Thread1of1ForFork1_#t~ite27_Out-1298073589|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1298073589, ~weak$$choice2~0=~weak$$choice2~0_In-1298073589, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1298073589} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite26, P2Thread1of1ForFork1_#t~ite27] because there is no mapped edge [2019-12-07 12:48:31,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L812-->L813: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_15 256))) (= v_~b$r_buff0_thd3~0_79 v_~b$r_buff0_thd3~0_78)) InVars {~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_79, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_78, P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite31=|v_P2Thread1of1ForFork1_#t~ite31_6|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_7|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite31, P2Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 12:48:31,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L815-->L819: Formula: (and (= v_~b$flush_delayed~0_7 0) (not (= (mod v_~b$flush_delayed~0_8 256) 0)) (= v_~b~0_30 v_~b$mem_tmp~0_5)) InVars {~b$mem_tmp~0=v_~b$mem_tmp~0_5, ~b$flush_delayed~0=v_~b$flush_delayed~0_8} OutVars{~b$mem_tmp~0=v_~b$mem_tmp~0_5, P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_5|, ~b~0=v_~b~0_30, ~b$flush_delayed~0=v_~b$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, ~b~0, ~b$flush_delayed~0] because there is no mapped edge [2019-12-07 12:48:31,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L819-2-->L819-4: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd3~0_In-1420352265 256))) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In-1420352265 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite38_Out-1420352265| ~b$w_buff1~0_In-1420352265)) (and (= |P2Thread1of1ForFork1_#t~ite38_Out-1420352265| ~b~0_In-1420352265) (or .cse1 .cse0)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-1420352265, ~b~0=~b~0_In-1420352265, ~b$w_buff1~0=~b$w_buff1~0_In-1420352265, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1420352265} OutVars{P2Thread1of1ForFork1_#t~ite38=|P2Thread1of1ForFork1_#t~ite38_Out-1420352265|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1420352265, ~b~0=~b~0_In-1420352265, ~b$w_buff1~0=~b$w_buff1~0_In-1420352265, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1420352265} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite38] because there is no mapped edge [2019-12-07 12:48:31,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L819-4-->L820: Formula: (= v_~b~0_46 |v_P2Thread1of1ForFork1_#t~ite38_10|) InVars {P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_10|} OutVars{P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_9|, ~b~0=v_~b~0_46, P2Thread1of1ForFork1_#t~ite39=|v_P2Thread1of1ForFork1_#t~ite39_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite38, ~b~0, P2Thread1of1ForFork1_#t~ite39] because there is no mapped edge [2019-12-07 12:48:31,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L820-->L820-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In398999166 256))) (.cse0 (= (mod ~b$r_buff0_thd3~0_In398999166 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite40_Out398999166| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite40_Out398999166| ~b$w_buff0_used~0_In398999166)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In398999166, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In398999166} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In398999166, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In398999166, P2Thread1of1ForFork1_#t~ite40=|P2Thread1of1ForFork1_#t~ite40_Out398999166|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite40] because there is no mapped edge [2019-12-07 12:48:31,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L821-->L821-2: Formula: (let ((.cse3 (= (mod ~b$w_buff1_used~0_In1781779805 256) 0)) (.cse2 (= 0 (mod ~b$r_buff1_thd3~0_In1781779805 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In1781779805 256))) (.cse1 (= 0 (mod ~b$w_buff0_used~0_In1781779805 256)))) (or (and (= ~b$w_buff1_used~0_In1781779805 |P2Thread1of1ForFork1_#t~ite41_Out1781779805|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork1_#t~ite41_Out1781779805|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1781779805, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1781779805, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1781779805, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1781779805} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1781779805, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1781779805, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1781779805, P2Thread1of1ForFork1_#t~ite41=|P2Thread1of1ForFork1_#t~ite41_Out1781779805|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1781779805} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite41] because there is no mapped edge [2019-12-07 12:48:31,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L822-->L822-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In1823662063 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In1823662063 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork1_#t~ite42_Out1823662063|) (not .cse1)) (and (or .cse1 .cse0) (= ~b$r_buff0_thd3~0_In1823662063 |P2Thread1of1ForFork1_#t~ite42_Out1823662063|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1823662063, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1823662063} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1823662063, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1823662063, P2Thread1of1ForFork1_#t~ite42=|P2Thread1of1ForFork1_#t~ite42_Out1823662063|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite42] because there is no mapped edge [2019-12-07 12:48:31,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L823-->L823-2: Formula: (let ((.cse1 (= (mod ~b$w_buff1_used~0_In-875416354 256) 0)) (.cse0 (= (mod ~b$r_buff1_thd3~0_In-875416354 256) 0)) (.cse2 (= (mod ~b$r_buff0_thd3~0_In-875416354 256) 0)) (.cse3 (= 0 (mod ~b$w_buff0_used~0_In-875416354 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite43_Out-875416354|)) (and (= |P2Thread1of1ForFork1_#t~ite43_Out-875416354| ~b$r_buff1_thd3~0_In-875416354) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-875416354, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-875416354, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-875416354, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-875416354} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-875416354, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-875416354, P2Thread1of1ForFork1_#t~ite43=|P2Thread1of1ForFork1_#t~ite43_Out-875416354|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-875416354, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-875416354} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43] because there is no mapped edge [2019-12-07 12:48:31,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L823-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= |v_P2Thread1of1ForFork1_#t~ite43_42| v_~b$r_buff1_thd3~0_140) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_41|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_140, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, ~b$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 12:48:31,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd1~0_In387451779 256))) (.cse0 (= (mod ~b$w_buff0_used~0_In387451779 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite5_Out387451779| 0) (not .cse1)) (and (= ~b$w_buff0_used~0_In387451779 |P0Thread1of1ForFork2_#t~ite5_Out387451779|) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In387451779, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In387451779} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In387451779, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In387451779, P0Thread1of1ForFork2_#t~ite5=|P0Thread1of1ForFork2_#t~ite5_Out387451779|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 12:48:31,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L756-->L756-2: Formula: (let ((.cse3 (= (mod ~b$w_buff1_used~0_In-2121670072 256) 0)) (.cse2 (= 0 (mod ~b$r_buff1_thd1~0_In-2121670072 256))) (.cse1 (= 0 (mod ~b$r_buff0_thd1~0_In-2121670072 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In-2121670072 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork2_#t~ite6_Out-2121670072| ~b$w_buff1_used~0_In-2121670072) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork2_#t~ite6_Out-2121670072|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2121670072, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-2121670072, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-2121670072, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2121670072} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2121670072, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-2121670072, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-2121670072, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2121670072, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out-2121670072|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 12:48:31,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L757-->L758: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff0_used~0_In-1528570567 256))) (.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In-1528570567 256))) (.cse1 (= ~b$r_buff0_thd1~0_Out-1528570567 ~b$r_buff0_thd1~0_In-1528570567))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= ~b$r_buff0_thd1~0_Out-1528570567 0)) (and .cse2 .cse1))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1528570567, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1528570567} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1528570567, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-1528570567, P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out-1528570567|} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 12:48:31,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~b$r_buff0_thd1~0_In-307460981 256))) (.cse1 (= (mod ~b$w_buff0_used~0_In-307460981 256) 0)) (.cse2 (= 0 (mod ~b$r_buff1_thd1~0_In-307460981 256))) (.cse3 (= 0 (mod ~b$w_buff1_used~0_In-307460981 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork2_#t~ite8_Out-307460981| ~b$r_buff1_thd1~0_In-307460981)) (and (= |P0Thread1of1ForFork2_#t~ite8_Out-307460981| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-307460981, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-307460981, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-307460981, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-307460981} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-307460981, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-307460981, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-307460981, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-307460981, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-307460981|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 12:48:31,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L758-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite8_34| v_~b$r_buff1_thd1~0_103) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81} OutVars{~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_103, P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_33|, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~b$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:48:31,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L846-1-->L852: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_33) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:48:31,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L852-2-->L852-4: Formula: (let ((.cse0 (= (mod ~b$w_buff1_used~0_In-2064950402 256) 0)) (.cse1 (= 0 (mod ~b$r_buff1_thd0~0_In-2064950402 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-2064950402| ~b~0_In-2064950402)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out-2064950402| ~b$w_buff1~0_In-2064950402) (not .cse1)))) InVars {~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-2064950402, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2064950402, ~b~0=~b~0_In-2064950402, ~b$w_buff1~0=~b$w_buff1~0_In-2064950402} OutVars{~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-2064950402, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2064950402, ~b~0=~b~0_In-2064950402, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-2064950402|, ~b$w_buff1~0=~b$w_buff1~0_In-2064950402} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 12:48:31,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L852-4-->L853: Formula: (= v_~b~0_51 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{~b~0=v_~b~0_51, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~b~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:48:31,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L853-->L853-2: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff0_used~0_In952519356 256))) (.cse1 (= (mod ~b$r_buff0_thd0~0_In952519356 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out952519356| 0)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out952519356| ~b$w_buff0_used~0_In952519356)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In952519356, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In952519356} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In952519356, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out952519356|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In952519356} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:48:31,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L854-->L854-2: Formula: (let ((.cse0 (= (mod ~b$r_buff1_thd0~0_In249664020 256) 0)) (.cse1 (= 0 (mod ~b$w_buff1_used~0_In249664020 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In249664020 256))) (.cse3 (= 0 (mod ~b$r_buff0_thd0~0_In249664020 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out249664020|)) (and (= ~b$w_buff1_used~0_In249664020 |ULTIMATE.start_main_#t~ite50_Out249664020|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In249664020, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In249664020, ~b$w_buff1_used~0=~b$w_buff1_used~0_In249664020, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In249664020} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out249664020|, ~b$w_buff0_used~0=~b$w_buff0_used~0_In249664020, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In249664020, ~b$w_buff1_used~0=~b$w_buff1_used~0_In249664020, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In249664020} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:48:31,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L855-->L855-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In866603883 256) 0)) (.cse1 (= 0 (mod ~b$r_buff0_thd0~0_In866603883 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out866603883| ~b$r_buff0_thd0~0_In866603883) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out866603883| 0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In866603883, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In866603883} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In866603883, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out866603883|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In866603883} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:48:31,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L856-->L856-2: Formula: (let ((.cse3 (= 0 (mod ~b$w_buff1_used~0_In-48963303 256))) (.cse2 (= 0 (mod ~b$r_buff1_thd0~0_In-48963303 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd0~0_In-48963303 256))) (.cse1 (= 0 (mod ~b$w_buff0_used~0_In-48963303 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-48963303| ~b$r_buff1_thd0~0_In-48963303)) (and (= |ULTIMATE.start_main_#t~ite52_Out-48963303| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-48963303, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-48963303, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-48963303, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-48963303} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-48963303, ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-48963303|, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-48963303, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-48963303, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-48963303} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:48:31,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L856-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~b$r_buff1_thd0~0_185 |v_ULTIMATE.start_main_#t~ite52_39|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_19) (= v_~__unbuffered_p1_EBX~0_20 0) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 0 v_~__unbuffered_p0_EAX~0_139) (= v_~__unbuffered_p2_EBX~0_26 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_18 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_139, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_19} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_139, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_185, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_19, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~b$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:48:31,742 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:48:31 BasicIcfg [2019-12-07 12:48:31,742 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:48:31,742 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:48:31,743 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:48:31,743 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:48:31,743 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:46:23" (3/4) ... [2019-12-07 12:48:31,745 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:48:31,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [905] [905] ULTIMATE.startENTRY-->L842: Formula: (let ((.cse0 (store |v_#valid_67| 0 0))) (and (= v_~b$r_buff1_thd0~0_230 0) (= v_~b$w_buff1~0_176 0) (= v_~b$mem_tmp~0_20 0) (= v_~weak$$choice2~0_144 0) (= 0 v_~b$r_buff1_thd3~0_337) (= 0 v_~b$read_delayed~0_7) (= 0 v_~b$r_buff0_thd2~0_182) (= 0 v_~__unbuffered_p0_EAX~0_176) (= v_~__unbuffered_p1_EBX~0_38 0) (= v_~main$tmp_guard1~0_34 0) (= v_~y~0_19 0) (= 0 v_~__unbuffered_p1_EAX~0_38) (= v_~b$r_buff0_thd0~0_204 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t867~0.base_25|)) (= 0 v_~b$r_buff1_thd1~0_215) (= v_~a~0_14 0) (= 0 v_~x~0_124) (= 0 v_~b$r_buff0_thd3~0_395) (= v_~__unbuffered_p2_EBX~0_38 0) (= v_~b$read_delayed_var~0.offset_7 0) (= v_~z~0_23 0) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p2_EAX~0_34) (= 0 v_~b$w_buff0_used~0_787) (= |v_#valid_65| (store .cse0 |v_ULTIMATE.start_main_~#t867~0.base_25| 1)) (= |v_#NULL.offset_4| 0) (= 0 v_~b$w_buff0~0_250) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t867~0.base_25|) (= v_~__unbuffered_cnt~0_137 0) (= 0 |v_ULTIMATE.start_main_~#t867~0.offset_17|) (= 0 v_~b$w_buff1_used~0_450) (= 0 v_~b$r_buff1_thd2~0_222) (= 0 v_~weak$$choice0~0_13) (= v_~b~0_186 0) (= v_~main$tmp_guard0~0_24 0) (= v_~b$flush_delayed~0_35 0) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t867~0.base_25| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t867~0.base_25|) |v_ULTIMATE.start_main_~#t867~0.offset_17| 0))) (= 0 v_~b$read_delayed_var~0.base_7) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t867~0.base_25| 4) |v_#length_25|) (= 0 v_~b$r_buff0_thd1~0_323))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_67|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_395, ~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_215, ~b$read_delayed_var~0.offset=v_~b$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t868~0.offset=|v_ULTIMATE.start_main_~#t868~0.offset_17|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_35|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_245|, ULTIMATE.start_main_~#t867~0.base=|v_ULTIMATE.start_main_~#t867~0.base_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_51|, ~b$w_buff0_used~0=v_~b$w_buff0_used~0_787, ~a~0=v_~a~0_14, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_176, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_38, #length=|v_#length_25|, ~b$w_buff0~0=v_~b$w_buff0~0_250, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_204, ~b$r_buff0_thd2~0=v_~b$r_buff0_thd2~0_182, ~b$mem_tmp~0=v_~b$mem_tmp~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~b$flush_delayed~0=v_~b$flush_delayed~0_35, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~b$read_delayed~0=v_~b$read_delayed~0_7, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t867~0.offset=|v_ULTIMATE.start_main_~#t867~0.offset_17|, ~b$w_buff1~0=v_~b$w_buff1~0_176, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_137, ~x~0=v_~x~0_124, ~b$r_buff0_thd1~0=v_~b$r_buff0_thd1~0_323, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ULTIMATE.start_main_~#t869~0.base=|v_ULTIMATE.start_main_~#t869~0.base_21|, ULTIMATE.start_main_~#t869~0.offset=|v_ULTIMATE.start_main_~#t869~0.offset_17|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~b$w_buff1_used~0=v_~b$w_buff1_used~0_450, ~y~0=v_~y~0_19, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_222, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_230, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_38, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_4|, ~b$read_delayed_var~0.base=v_~b$read_delayed_var~0.base_7, ~b~0=v_~b~0_186, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_28|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t868~0.base=|v_ULTIMATE.start_main_~#t868~0.base_21|, ~z~0=v_~z~0_23, ~weak$$choice2~0=v_~weak$$choice2~0_144, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_337} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, ~b$r_buff1_thd1~0, ~b$read_delayed_var~0.offset, ULTIMATE.start_main_~#t868~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t867~0.base, ULTIMATE.start_main_#t~ite50, ~b$w_buff0_used~0, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~b$w_buff0~0, ~__unbuffered_p2_EAX~0, ~b$r_buff0_thd0~0, ~b$r_buff0_thd2~0, ~b$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~b$flush_delayed~0, ULTIMATE.start_main_#t~nondet45, ~b$read_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t867~0.offset, ~b$w_buff1~0, ~__unbuffered_cnt~0, ~x~0, ~b$r_buff0_thd1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t869~0.base, ULTIMATE.start_main_~#t869~0.offset, ULTIMATE.start_main_#t~ite51, ~b$w_buff1_used~0, ~y~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd0~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~main$tmp_guard0~0, #NULL.base, ~b$read_delayed_var~0.base, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t868~0.base, ~z~0, ~weak$$choice2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 12:48:31,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [864] [864] L842-1-->L844: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t868~0.base_10|)) (= |v_ULTIMATE.start_main_~#t868~0.offset_9| 0) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t868~0.base_10| 1) |v_#valid_27|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t868~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t868~0.base_10|) |v_ULTIMATE.start_main_~#t868~0.offset_9| 1)) |v_#memory_int_11|) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t868~0.base_10|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t868~0.base_10| 4) |v_#length_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t868~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t868~0.offset=|v_ULTIMATE.start_main_~#t868~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t868~0.base=|v_ULTIMATE.start_main_~#t868~0.base_10|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t868~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t868~0.base, #length] because there is no mapped edge [2019-12-07 12:48:31,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L844-1-->L846: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t869~0.base_13|) (= |v_ULTIMATE.start_main_~#t869~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t869~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t869~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t869~0.base_13|) |v_ULTIMATE.start_main_~#t869~0.offset_11| 2)) |v_#memory_int_15|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t869~0.base_13| 1)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t869~0.base_13|)) (not (= |v_ULTIMATE.start_main_~#t869~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t869~0.base=|v_ULTIMATE.start_main_~#t869~0.base_13|, ULTIMATE.start_main_~#t869~0.offset=|v_ULTIMATE.start_main_~#t869~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t869~0.base, ULTIMATE.start_main_~#t869~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 12:48:31,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L4-->L754: Formula: (and (not (= P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1884183186 0)) (= ~b$r_buff0_thd1~0_In-1884183186 ~b$r_buff1_thd1~0_Out-1884183186) (= ~b$r_buff1_thd0~0_Out-1884183186 ~b$r_buff0_thd0~0_In-1884183186) (= ~b$r_buff0_thd2~0_In-1884183186 ~b$r_buff1_thd2~0_Out-1884183186) (= ~b$r_buff1_thd3~0_Out-1884183186 ~b$r_buff0_thd3~0_In-1884183186) (= 1 ~b$r_buff0_thd1~0_Out-1884183186) (= ~x~0_In-1884183186 ~__unbuffered_p0_EAX~0_Out-1884183186)) InVars {~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1884183186, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1884183186, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1884183186, P0Thread1of1ForFork2___VERIFIER_assert_~expression=P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1884183186, ~x~0=~x~0_In-1884183186, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1884183186} OutVars{~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-1884183186, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1884183186, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-1884183186, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1884183186, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_Out-1884183186, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_Out-1884183186, P0Thread1of1ForFork2___VERIFIER_assert_~expression=P0Thread1of1ForFork2___VERIFIER_assert_~expression_In-1884183186, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_Out-1884183186, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_Out-1884183186, ~x~0=~x~0_In-1884183186, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1884183186} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, ~__unbuffered_p0_EAX~0, ~b$r_buff1_thd1~0, ~b$r_buff1_thd0~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 12:48:31,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L780-2-->L780-4: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd2~0_In-1969332740 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In-1969332740 256) 0))) (or (and (not .cse0) (= ~b$w_buff1~0_In-1969332740 |P1Thread1of1ForFork0_#t~ite9_Out-1969332740|) (not .cse1)) (and (= ~b~0_In-1969332740 |P1Thread1of1ForFork0_#t~ite9_Out-1969332740|) (or .cse1 .cse0)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-1969332740, ~b~0=~b~0_In-1969332740, ~b$w_buff1~0=~b$w_buff1~0_In-1969332740, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1969332740} OutVars{~b$w_buff1_used~0=~b$w_buff1_used~0_In-1969332740, ~b~0=~b~0_In-1969332740, ~b$w_buff1~0=~b$w_buff1~0_In-1969332740, P1Thread1of1ForFork0_#t~ite9=|P1Thread1of1ForFork0_#t~ite9_Out-1969332740|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1969332740} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 12:48:31,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L780-4-->L781: Formula: (= v_~b~0_66 |v_P1Thread1of1ForFork0_#t~ite9_32|) InVars {P1Thread1of1ForFork0_#t~ite9=|v_P1Thread1of1ForFork0_#t~ite9_32|} OutVars{~b~0=v_~b~0_66, P1Thread1of1ForFork0_#t~ite10=|v_P1Thread1of1ForFork0_#t~ite10_51|, P1Thread1of1ForFork0_#t~ite9=|v_P1Thread1of1ForFork0_#t~ite9_31|} AuxVars[] AssignedVars[~b~0, P1Thread1of1ForFork0_#t~ite10, P1Thread1of1ForFork0_#t~ite9] because there is no mapped edge [2019-12-07 12:48:31,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L781-->L781-2: Formula: (let ((.cse0 (= (mod ~b$r_buff0_thd2~0_In1798604312 256) 0)) (.cse1 (= (mod ~b$w_buff0_used~0_In1798604312 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite11_Out1798604312| ~b$w_buff0_used~0_In1798604312)) (and (not .cse0) (= |P1Thread1of1ForFork0_#t~ite11_Out1798604312| 0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1798604312, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1798604312} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1798604312, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1798604312, P1Thread1of1ForFork0_#t~ite11=|P1Thread1of1ForFork0_#t~ite11_Out1798604312|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 12:48:31,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L782-->L782-2: Formula: (let ((.cse3 (= (mod ~b$w_buff0_used~0_In-1394633383 256) 0)) (.cse2 (= 0 (mod ~b$r_buff0_thd2~0_In-1394633383 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In-1394633383 256) 0)) (.cse1 (= 0 (mod ~b$r_buff1_thd2~0_In-1394633383 256)))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite12_Out-1394633383|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork0_#t~ite12_Out-1394633383| ~b$w_buff1_used~0_In-1394633383) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1394633383, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1394633383, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1394633383, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1394633383} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1394633383, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1394633383, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1394633383, P1Thread1of1ForFork0_#t~ite12=|P1Thread1of1ForFork0_#t~ite12_Out-1394633383|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1394633383} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 12:48:31,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L783-->L783-2: Formula: (let ((.cse1 (= (mod ~b$r_buff0_thd2~0_In2126512762 256) 0)) (.cse0 (= (mod ~b$w_buff0_used~0_In2126512762 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork0_#t~ite13_Out2126512762|)) (and (or .cse1 .cse0) (= ~b$r_buff0_thd2~0_In2126512762 |P1Thread1of1ForFork0_#t~ite13_Out2126512762|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In2126512762, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In2126512762} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In2126512762, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In2126512762, P1Thread1of1ForFork0_#t~ite13=|P1Thread1of1ForFork0_#t~ite13_Out2126512762|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 12:48:31,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L784-->L784-2: Formula: (let ((.cse3 (= (mod ~b$r_buff1_thd2~0_In-1736517195 256) 0)) (.cse2 (= (mod ~b$w_buff1_used~0_In-1736517195 256) 0)) (.cse1 (= 0 (mod ~b$w_buff0_used~0_In-1736517195 256))) (.cse0 (= (mod ~b$r_buff0_thd2~0_In-1736517195 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite14_Out-1736517195|)) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork0_#t~ite14_Out-1736517195| ~b$r_buff1_thd2~0_In-1736517195) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1736517195, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1736517195, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1736517195, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1736517195} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1736517195, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1736517195, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1736517195, P1Thread1of1ForFork0_#t~ite14=|P1Thread1of1ForFork0_#t~ite14_Out-1736517195|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1736517195} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 12:48:31,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L784-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1)) (= v_~b$r_buff1_thd2~0_85 |v_P1Thread1of1ForFork0_#t~ite14_30|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_30|} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork0_#t~ite14=|v_P1Thread1of1ForFork0_#t~ite14_29|, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_85, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~__unbuffered_cnt~0, P1Thread1of1ForFork0_#t~ite14, P1Thread1of1ForFork0_#res.offset, ~b$r_buff1_thd2~0, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 12:48:31,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L808-->L808-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1283311795 256)))) (or (and .cse0 (= |P2Thread1of1ForFork1_#t~ite20_Out1283311795| ~b$w_buff0~0_In1283311795) (let ((.cse1 (= (mod ~b$r_buff0_thd3~0_In1283311795 256) 0))) (or (and .cse1 (= (mod ~b$r_buff1_thd3~0_In1283311795 256) 0)) (and .cse1 (= 0 (mod ~b$w_buff1_used~0_In1283311795 256))) (= 0 (mod ~b$w_buff0_used~0_In1283311795 256)))) (= |P2Thread1of1ForFork1_#t~ite20_Out1283311795| |P2Thread1of1ForFork1_#t~ite21_Out1283311795|)) (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite21_Out1283311795| ~b$w_buff0~0_In1283311795) (= |P2Thread1of1ForFork1_#t~ite20_In1283311795| |P2Thread1of1ForFork1_#t~ite20_Out1283311795|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1283311795, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1283311795, P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_In1283311795|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1283311795, ~b$w_buff0~0=~b$w_buff0~0_In1283311795, ~weak$$choice2~0=~weak$$choice2~0_In1283311795, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1283311795} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1283311795, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1283311795, P2Thread1of1ForFork1_#t~ite20=|P2Thread1of1ForFork1_#t~ite20_Out1283311795|, P2Thread1of1ForFork1_#t~ite21=|P2Thread1of1ForFork1_#t~ite21_Out1283311795|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1283311795, ~b$w_buff0~0=~b$w_buff0~0_In1283311795, ~weak$$choice2~0=~weak$$choice2~0_In1283311795, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1283311795} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite20, P2Thread1of1ForFork1_#t~ite21] because there is no mapped edge [2019-12-07 12:48:31,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [885] [885] L810-->L810-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1298073589 256)))) (or (and (= ~b$w_buff0_used~0_In-1298073589 |P2Thread1of1ForFork1_#t~ite27_Out-1298073589|) (not .cse0) (= |P2Thread1of1ForFork1_#t~ite26_In-1298073589| |P2Thread1of1ForFork1_#t~ite26_Out-1298073589|)) (and (= ~b$w_buff0_used~0_In-1298073589 |P2Thread1of1ForFork1_#t~ite26_Out-1298073589|) (= |P2Thread1of1ForFork1_#t~ite27_Out-1298073589| |P2Thread1of1ForFork1_#t~ite26_Out-1298073589|) .cse0 (let ((.cse1 (= (mod ~b$r_buff0_thd3~0_In-1298073589 256) 0))) (or (= 0 (mod ~b$w_buff0_used~0_In-1298073589 256)) (and .cse1 (= 0 (mod ~b$w_buff1_used~0_In-1298073589 256))) (and (= (mod ~b$r_buff1_thd3~0_In-1298073589 256) 0) .cse1)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1298073589, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1298073589, P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_In-1298073589|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1298073589, ~weak$$choice2~0=~weak$$choice2~0_In-1298073589, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1298073589} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1298073589, P2Thread1of1ForFork1_#t~ite26=|P2Thread1of1ForFork1_#t~ite26_Out-1298073589|, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1298073589, P2Thread1of1ForFork1_#t~ite27=|P2Thread1of1ForFork1_#t~ite27_Out-1298073589|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1298073589, ~weak$$choice2~0=~weak$$choice2~0_In-1298073589, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1298073589} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite26, P2Thread1of1ForFork1_#t~ite27] because there is no mapped edge [2019-12-07 12:48:31,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L812-->L813: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_15 256))) (= v_~b$r_buff0_thd3~0_79 v_~b$r_buff0_thd3~0_78)) InVars {~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_79, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_78, P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite31=|v_P2Thread1of1ForFork1_#t~ite31_6|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_7|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite31, P2Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 12:48:31,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L815-->L819: Formula: (and (= v_~b$flush_delayed~0_7 0) (not (= (mod v_~b$flush_delayed~0_8 256) 0)) (= v_~b~0_30 v_~b$mem_tmp~0_5)) InVars {~b$mem_tmp~0=v_~b$mem_tmp~0_5, ~b$flush_delayed~0=v_~b$flush_delayed~0_8} OutVars{~b$mem_tmp~0=v_~b$mem_tmp~0_5, P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_5|, ~b~0=v_~b~0_30, ~b$flush_delayed~0=v_~b$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, ~b~0, ~b$flush_delayed~0] because there is no mapped edge [2019-12-07 12:48:31,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L819-2-->L819-4: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd3~0_In-1420352265 256))) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In-1420352265 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite38_Out-1420352265| ~b$w_buff1~0_In-1420352265)) (and (= |P2Thread1of1ForFork1_#t~ite38_Out-1420352265| ~b~0_In-1420352265) (or .cse1 .cse0)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-1420352265, ~b~0=~b~0_In-1420352265, ~b$w_buff1~0=~b$w_buff1~0_In-1420352265, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1420352265} OutVars{P2Thread1of1ForFork1_#t~ite38=|P2Thread1of1ForFork1_#t~ite38_Out-1420352265|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1420352265, ~b~0=~b~0_In-1420352265, ~b$w_buff1~0=~b$w_buff1~0_In-1420352265, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1420352265} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite38] because there is no mapped edge [2019-12-07 12:48:31,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L819-4-->L820: Formula: (= v_~b~0_46 |v_P2Thread1of1ForFork1_#t~ite38_10|) InVars {P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_10|} OutVars{P2Thread1of1ForFork1_#t~ite38=|v_P2Thread1of1ForFork1_#t~ite38_9|, ~b~0=v_~b~0_46, P2Thread1of1ForFork1_#t~ite39=|v_P2Thread1of1ForFork1_#t~ite39_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite38, ~b~0, P2Thread1of1ForFork1_#t~ite39] because there is no mapped edge [2019-12-07 12:48:31,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L820-->L820-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In398999166 256))) (.cse0 (= (mod ~b$r_buff0_thd3~0_In398999166 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite40_Out398999166| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite40_Out398999166| ~b$w_buff0_used~0_In398999166)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In398999166, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In398999166} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In398999166, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In398999166, P2Thread1of1ForFork1_#t~ite40=|P2Thread1of1ForFork1_#t~ite40_Out398999166|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite40] because there is no mapped edge [2019-12-07 12:48:31,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L821-->L821-2: Formula: (let ((.cse3 (= (mod ~b$w_buff1_used~0_In1781779805 256) 0)) (.cse2 (= 0 (mod ~b$r_buff1_thd3~0_In1781779805 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In1781779805 256))) (.cse1 (= 0 (mod ~b$w_buff0_used~0_In1781779805 256)))) (or (and (= ~b$w_buff1_used~0_In1781779805 |P2Thread1of1ForFork1_#t~ite41_Out1781779805|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork1_#t~ite41_Out1781779805|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1781779805, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1781779805, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1781779805, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1781779805} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1781779805, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1781779805, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1781779805, P2Thread1of1ForFork1_#t~ite41=|P2Thread1of1ForFork1_#t~ite41_Out1781779805|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1781779805} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite41] because there is no mapped edge [2019-12-07 12:48:31,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L822-->L822-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In1823662063 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In1823662063 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork1_#t~ite42_Out1823662063|) (not .cse1)) (and (or .cse1 .cse0) (= ~b$r_buff0_thd3~0_In1823662063 |P2Thread1of1ForFork1_#t~ite42_Out1823662063|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1823662063, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1823662063} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1823662063, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1823662063, P2Thread1of1ForFork1_#t~ite42=|P2Thread1of1ForFork1_#t~ite42_Out1823662063|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite42] because there is no mapped edge [2019-12-07 12:48:31,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L823-->L823-2: Formula: (let ((.cse1 (= (mod ~b$w_buff1_used~0_In-875416354 256) 0)) (.cse0 (= (mod ~b$r_buff1_thd3~0_In-875416354 256) 0)) (.cse2 (= (mod ~b$r_buff0_thd3~0_In-875416354 256) 0)) (.cse3 (= 0 (mod ~b$w_buff0_used~0_In-875416354 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite43_Out-875416354|)) (and (= |P2Thread1of1ForFork1_#t~ite43_Out-875416354| ~b$r_buff1_thd3~0_In-875416354) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-875416354, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-875416354, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-875416354, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-875416354} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-875416354, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-875416354, P2Thread1of1ForFork1_#t~ite43=|P2Thread1of1ForFork1_#t~ite43_Out-875416354|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-875416354, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-875416354} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43] because there is no mapped edge [2019-12-07 12:48:31,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L823-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= |v_P2Thread1of1ForFork1_#t~ite43_42| v_~b$r_buff1_thd3~0_140) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P2Thread1of1ForFork1_#t~ite43=|v_P2Thread1of1ForFork1_#t~ite43_41|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_140, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite43, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, ~b$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 12:48:31,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd1~0_In387451779 256))) (.cse0 (= (mod ~b$w_buff0_used~0_In387451779 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite5_Out387451779| 0) (not .cse1)) (and (= ~b$w_buff0_used~0_In387451779 |P0Thread1of1ForFork2_#t~ite5_Out387451779|) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In387451779, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In387451779} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In387451779, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In387451779, P0Thread1of1ForFork2_#t~ite5=|P0Thread1of1ForFork2_#t~ite5_Out387451779|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 12:48:31,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L756-->L756-2: Formula: (let ((.cse3 (= (mod ~b$w_buff1_used~0_In-2121670072 256) 0)) (.cse2 (= 0 (mod ~b$r_buff1_thd1~0_In-2121670072 256))) (.cse1 (= 0 (mod ~b$r_buff0_thd1~0_In-2121670072 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In-2121670072 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork2_#t~ite6_Out-2121670072| ~b$w_buff1_used~0_In-2121670072) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork2_#t~ite6_Out-2121670072|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2121670072, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-2121670072, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-2121670072, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2121670072} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2121670072, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-2121670072, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-2121670072, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2121670072, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out-2121670072|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 12:48:31,759 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L757-->L758: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff0_used~0_In-1528570567 256))) (.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In-1528570567 256))) (.cse1 (= ~b$r_buff0_thd1~0_Out-1528570567 ~b$r_buff0_thd1~0_In-1528570567))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= ~b$r_buff0_thd1~0_Out-1528570567 0)) (and .cse2 .cse1))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1528570567, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1528570567} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1528570567, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-1528570567, P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out-1528570567|} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 12:48:31,759 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~b$r_buff0_thd1~0_In-307460981 256))) (.cse1 (= (mod ~b$w_buff0_used~0_In-307460981 256) 0)) (.cse2 (= 0 (mod ~b$r_buff1_thd1~0_In-307460981 256))) (.cse3 (= 0 (mod ~b$w_buff1_used~0_In-307460981 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork2_#t~ite8_Out-307460981| ~b$r_buff1_thd1~0_In-307460981)) (and (= |P0Thread1of1ForFork2_#t~ite8_Out-307460981| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-307460981, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-307460981, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-307460981, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-307460981} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-307460981, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-307460981, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-307460981, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-307460981, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-307460981|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 12:48:31,759 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L758-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite8_34| v_~b$r_buff1_thd1~0_103) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81} OutVars{~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_103, P0Thread1of1ForFork2_#t~ite8=|v_P0Thread1of1ForFork2_#t~ite8_33|, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~b$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:48:31,759 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L846-1-->L852: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_33) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:48:31,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L852-2-->L852-4: Formula: (let ((.cse0 (= (mod ~b$w_buff1_used~0_In-2064950402 256) 0)) (.cse1 (= 0 (mod ~b$r_buff1_thd0~0_In-2064950402 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-2064950402| ~b~0_In-2064950402)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out-2064950402| ~b$w_buff1~0_In-2064950402) (not .cse1)))) InVars {~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-2064950402, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2064950402, ~b~0=~b~0_In-2064950402, ~b$w_buff1~0=~b$w_buff1~0_In-2064950402} OutVars{~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-2064950402, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2064950402, ~b~0=~b~0_In-2064950402, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-2064950402|, ~b$w_buff1~0=~b$w_buff1~0_In-2064950402} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 12:48:31,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L852-4-->L853: Formula: (= v_~b~0_51 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{~b~0=v_~b~0_51, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~b~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:48:31,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L853-->L853-2: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff0_used~0_In952519356 256))) (.cse1 (= (mod ~b$r_buff0_thd0~0_In952519356 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out952519356| 0)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out952519356| ~b$w_buff0_used~0_In952519356)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In952519356, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In952519356} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In952519356, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out952519356|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In952519356} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:48:31,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L854-->L854-2: Formula: (let ((.cse0 (= (mod ~b$r_buff1_thd0~0_In249664020 256) 0)) (.cse1 (= 0 (mod ~b$w_buff1_used~0_In249664020 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In249664020 256))) (.cse3 (= 0 (mod ~b$r_buff0_thd0~0_In249664020 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out249664020|)) (and (= ~b$w_buff1_used~0_In249664020 |ULTIMATE.start_main_#t~ite50_Out249664020|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In249664020, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In249664020, ~b$w_buff1_used~0=~b$w_buff1_used~0_In249664020, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In249664020} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out249664020|, ~b$w_buff0_used~0=~b$w_buff0_used~0_In249664020, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In249664020, ~b$w_buff1_used~0=~b$w_buff1_used~0_In249664020, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In249664020} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:48:31,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L855-->L855-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In866603883 256) 0)) (.cse1 (= 0 (mod ~b$r_buff0_thd0~0_In866603883 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out866603883| ~b$r_buff0_thd0~0_In866603883) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out866603883| 0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In866603883, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In866603883} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In866603883, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out866603883|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In866603883} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:48:31,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L856-->L856-2: Formula: (let ((.cse3 (= 0 (mod ~b$w_buff1_used~0_In-48963303 256))) (.cse2 (= 0 (mod ~b$r_buff1_thd0~0_In-48963303 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd0~0_In-48963303 256))) (.cse1 (= 0 (mod ~b$w_buff0_used~0_In-48963303 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-48963303| ~b$r_buff1_thd0~0_In-48963303)) (and (= |ULTIMATE.start_main_#t~ite52_Out-48963303| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-48963303, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-48963303, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-48963303, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-48963303} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-48963303, ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-48963303|, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-48963303, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-48963303, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-48963303} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:48:31,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L856-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~b$r_buff1_thd0~0_185 |v_ULTIMATE.start_main_#t~ite52_39|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_19) (= v_~__unbuffered_p1_EBX~0_20 0) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 0 v_~__unbuffered_p0_EAX~0_139) (= v_~__unbuffered_p2_EBX~0_26 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_18 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_139, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_19} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_139, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_185, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_19, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~b$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:48:31,817 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_c0193584-3259-42ca-b28c-53dd98abacfc/bin/uautomizer/witness.graphml [2019-12-07 12:48:31,817 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:48:31,818 INFO L168 Benchmark]: Toolchain (without parser) took 128783.16 ms. Allocated memory was 1.0 GB in the beginning and 6.6 GB in the end (delta: 5.6 GB). Free memory was 934.3 MB in the beginning and 5.8 GB in the end (delta: -4.9 GB). Peak memory consumption was 671.6 MB. Max. memory is 11.5 GB. [2019-12-07 12:48:31,818 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:48:31,818 INFO L168 Benchmark]: CACSL2BoogieTranslator took 452.63 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 934.3 MB in the beginning and 1.1 GB in the end (delta: -126.1 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 12:48:31,819 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.40 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:48:31,819 INFO L168 Benchmark]: Boogie Preprocessor took 25.48 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.1 MB). Peak memory consumption was 1.1 MB. Max. memory is 11.5 GB. [2019-12-07 12:48:31,819 INFO L168 Benchmark]: RCFGBuilder took 422.20 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 999.9 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 12:48:31,819 INFO L168 Benchmark]: TraceAbstraction took 127766.40 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 999.9 MB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 589.5 MB. Max. memory is 11.5 GB. [2019-12-07 12:48:31,820 INFO L168 Benchmark]: Witness Printer took 74.38 ms. Allocated memory is still 6.6 GB. Free memory was 5.9 GB in the beginning and 5.8 GB in the end (delta: 49.6 MB). Peak memory consumption was 49.6 MB. Max. memory is 11.5 GB. [2019-12-07 12:48:31,821 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 452.63 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 934.3 MB in the beginning and 1.1 GB in the end (delta: -126.1 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.40 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.48 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.1 MB). Peak memory consumption was 1.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 422.20 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 999.9 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 127766.40 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 999.9 MB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 589.5 MB. Max. memory is 11.5 GB. * Witness Printer took 74.38 ms. Allocated memory is still 6.6 GB. Free memory was 5.9 GB in the beginning and 5.8 GB in the end (delta: 49.6 MB). Peak memory consumption was 49.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 180 ProgramPointsBefore, 96 ProgramPointsAfterwards, 217 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 37 TrivialSequentialCompositions, 47 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 31 ConcurrentYvCompositions, 32 ChoiceCompositions, 7698 VarBasedMoverChecksPositive, 261 VarBasedMoverChecksNegative, 64 SemBasedMoverChecksPositive, 271 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 83556 CheckedPairsTotal, 115 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L842] FCALL, FORK 0 pthread_create(&t867, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L844] FCALL, FORK 0 pthread_create(&t868, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L846] FCALL, FORK 0 pthread_create(&t869, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L739] 1 b$w_buff1 = b$w_buff0 [L740] 1 b$w_buff0 = 1 [L741] 1 b$w_buff1_used = b$w_buff0_used [L742] 1 b$w_buff0_used = (_Bool)1 [L754] EXPR 1 b$w_buff0_used && b$r_buff0_thd1 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd1 ? b$w_buff1 : b) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L768] 2 x = 1 [L771] 2 y = 1 [L774] 2 __unbuffered_p1_EAX = y [L777] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L780] 2 b$w_buff0_used && b$r_buff0_thd2 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd2 ? b$w_buff1 : b) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L754] 1 b = b$w_buff0_used && b$r_buff0_thd1 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd1 ? b$w_buff1 : b) [L781] 2 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used [L782] 2 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd2 || b$w_buff1_used && b$r_buff1_thd2 ? (_Bool)0 : b$w_buff1_used [L783] 2 b$r_buff0_thd2 = b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$r_buff0_thd2 [L794] 3 z = 1 [L797] 3 a = 1 [L800] 3 __unbuffered_p2_EAX = a [L803] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L804] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L805] 3 b$flush_delayed = weak$$choice2 [L806] 3 b$mem_tmp = b VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L807] EXPR 3 !b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1) VAL [!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1)=0, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L807] 3 b = !b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1) [L808] 3 b$w_buff0 = weak$$choice2 ? b$w_buff0 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff0)) [L809] EXPR 3 weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1))=0, x=1, y=1, z=1] [L809] 3 b$w_buff1 = weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1)) [L810] 3 b$w_buff0_used = weak$$choice2 ? b$w_buff0_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used)) [L811] EXPR 3 weak$$choice2 ? b$w_buff1_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? b$w_buff1_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L811] 3 b$w_buff1_used = weak$$choice2 ? b$w_buff1_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L813] EXPR 3 weak$$choice2 ? b$r_buff1_thd3 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$r_buff1_thd3 : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? b$r_buff1_thd3 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$r_buff1_thd3 : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L813] 3 b$r_buff1_thd3 = weak$$choice2 ? b$r_buff1_thd3 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$r_buff1_thd3 : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L814] 3 __unbuffered_p2_EBX = b VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L819] 3 b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd3 ? b$w_buff1 : b) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L820] 3 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used [L821] 3 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd3 || b$w_buff1_used && b$r_buff1_thd3 ? (_Bool)0 : b$w_buff1_used [L822] 3 b$r_buff0_thd3 = b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$r_buff0_thd3 [L755] 1 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd1 ? (_Bool)0 : b$w_buff0_used [L756] 1 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd1 || b$w_buff1_used && b$r_buff1_thd1 ? (_Bool)0 : b$w_buff1_used [L852] 0 b$w_buff0_used && b$r_buff0_thd0 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd0 ? b$w_buff1 : b) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L853] 0 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd0 ? (_Bool)0 : b$w_buff0_used [L854] 0 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd0 || b$w_buff1_used && b$r_buff1_thd0 ? (_Bool)0 : b$w_buff1_used [L855] 0 b$r_buff0_thd0 = b$w_buff0_used && b$r_buff0_thd0 ? (_Bool)0 : b$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 171 locations, 2 error locations. Result: UNSAFE, OverallTime: 127.6s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 33.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6135 SDtfs, 8875 SDslu, 23269 SDs, 0 SdLazy, 19905 SolverSat, 488 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 13.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 507 GetRequests, 41 SyntacticMatches, 36 SemanticMatches, 430 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3405 ImplicationChecksByTransitivity, 8.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=233994occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 67.5s AutomataMinimizationTime, 31 MinimizatonAttempts, 214833 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 4.0s InterpolantComputationTime, 1527 NumberOfCodeBlocks, 1527 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 1429 ConstructedInterpolants, 0 QuantifiedInterpolants, 965097 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...