./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix033_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix033_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6507a8ac59363bf3e0c02ac3bbcfdfb96f1ad9a0 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:53:02,933 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:53:02,934 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:53:02,943 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:53:02,944 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:53:02,944 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:53:02,945 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:53:02,946 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:53:02,948 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:53:02,948 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:53:02,949 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:53:02,950 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:53:02,950 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:53:02,951 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:53:02,951 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:53:02,952 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:53:02,953 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:53:02,954 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:53:02,955 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:53:02,956 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:53:02,957 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:53:02,958 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:53:02,959 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:53:02,959 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:53:02,961 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:53:02,961 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:53:02,961 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:53:02,961 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:53:02,962 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:53:02,962 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:53:02,962 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:53:02,963 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:53:02,963 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:53:02,964 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:53:02,965 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:53:02,965 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:53:02,966 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:53:02,966 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:53:02,966 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:53:02,967 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:53:02,967 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:53:02,968 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 11:53:02,980 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:53:02,980 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:53:02,981 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 11:53:02,982 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 11:53:02,982 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 11:53:02,982 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:53:02,982 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:53:02,982 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:53:02,983 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:53:02,983 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:53:02,983 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:53:02,983 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:53:02,983 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:53:02,983 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:53:02,984 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:53:02,984 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:53:02,984 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:53:02,984 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:53:02,984 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 11:53:02,985 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:53:02,985 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:53:02,985 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:53:02,985 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:53:02,985 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:53:02,986 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:53:02,986 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 11:53:02,986 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:53:02,986 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:53:02,986 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:53:02,986 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6507a8ac59363bf3e0c02ac3bbcfdfb96f1ad9a0 [2019-12-07 11:53:03,094 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:53:03,102 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:53:03,104 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:53:03,105 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:53:03,105 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:53:03,105 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix033_pso.oepc.i [2019-12-07 11:53:03,142 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/data/fa0ad8862/3e81cccfaa82444c9814cbef96ecfb8d/FLAG01784eece [2019-12-07 11:53:03,644 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:53:03,644 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/sv-benchmarks/c/pthread-wmm/mix033_pso.oepc.i [2019-12-07 11:53:03,654 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/data/fa0ad8862/3e81cccfaa82444c9814cbef96ecfb8d/FLAG01784eece [2019-12-07 11:53:03,663 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/data/fa0ad8862/3e81cccfaa82444c9814cbef96ecfb8d [2019-12-07 11:53:03,665 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:53:03,666 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:53:03,667 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:53:03,667 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:53:03,669 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:53:03,670 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:53:03" (1/1) ... [2019-12-07 11:53:03,672 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:03, skipping insertion in model container [2019-12-07 11:53:03,672 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:53:03" (1/1) ... [2019-12-07 11:53:03,677 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:53:03,704 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:53:03,951 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:53:03,959 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:53:04,005 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:53:04,052 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:53:04,052 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04 WrapperNode [2019-12-07 11:53:04,052 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:53:04,053 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:53:04,053 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:53:04,053 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:53:04,059 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04" (1/1) ... [2019-12-07 11:53:04,074 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04" (1/1) ... [2019-12-07 11:53:04,093 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:53:04,093 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:53:04,093 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:53:04,093 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:53:04,101 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04" (1/1) ... [2019-12-07 11:53:04,101 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04" (1/1) ... [2019-12-07 11:53:04,105 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04" (1/1) ... [2019-12-07 11:53:04,105 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04" (1/1) ... [2019-12-07 11:53:04,115 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04" (1/1) ... [2019-12-07 11:53:04,119 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04" (1/1) ... [2019-12-07 11:53:04,123 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04" (1/1) ... [2019-12-07 11:53:04,127 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:53:04,127 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:53:04,127 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:53:04,127 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:53:04,128 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:53:04,168 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:53:04,168 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:53:04,169 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:53:04,169 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:53:04,169 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:53:04,169 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:53:04,169 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:53:04,169 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:53:04,169 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 11:53:04,169 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 11:53:04,169 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:53:04,169 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:53:04,169 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:53:04,171 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:53:04,532 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:53:04,532 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:53:04,533 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:53:04 BoogieIcfgContainer [2019-12-07 11:53:04,533 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:53:04,534 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:53:04,534 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:53:04,536 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:53:04,536 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:53:03" (1/3) ... [2019-12-07 11:53:04,537 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@586c934c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:53:04, skipping insertion in model container [2019-12-07 11:53:04,537 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:53:04" (2/3) ... [2019-12-07 11:53:04,537 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@586c934c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:53:04, skipping insertion in model container [2019-12-07 11:53:04,537 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:53:04" (3/3) ... [2019-12-07 11:53:04,539 INFO L109 eAbstractionObserver]: Analyzing ICFG mix033_pso.oepc.i [2019-12-07 11:53:04,545 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:53:04,545 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:53:04,550 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:53:04,551 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:53:04,580 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,581 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,581 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,581 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,581 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,581 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,581 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,581 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,583 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,583 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,583 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,583 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,583 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,583 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,583 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,583 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,583 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,585 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,585 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,585 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,585 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,585 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,585 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,589 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,589 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:53:04,613 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 11:53:04,626 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:53:04,626 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:53:04,626 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:53:04,626 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:53:04,626 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:53:04,626 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:53:04,626 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:53:04,626 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:53:04,637 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 11:53:04,638 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 11:53:04,692 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 11:53:04,692 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:53:04,701 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 694 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:53:04,716 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 11:53:04,749 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 11:53:04,749 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:53:04,754 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 694 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:53:04,770 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 11:53:04,771 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:53:07,826 WARN L192 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 11:53:08,061 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 48 [2019-12-07 11:53:08,082 INFO L206 etLargeBlockEncoding]: Checked pairs total: 80691 [2019-12-07 11:53:08,082 INFO L214 etLargeBlockEncoding]: Total number of compositions: 120 [2019-12-07 11:53:08,085 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 11:53:20,897 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 109594 states. [2019-12-07 11:53:20,898 INFO L276 IsEmpty]: Start isEmpty. Operand 109594 states. [2019-12-07 11:53:20,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 11:53:20,902 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:53:20,902 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 11:53:20,903 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:53:20,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:53:20,906 INFO L82 PathProgramCache]: Analyzing trace with hash 925663, now seen corresponding path program 1 times [2019-12-07 11:53:20,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:53:20,912 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [770806999] [2019-12-07 11:53:20,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:53:20,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:53:21,038 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:53:21,039 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [770806999] [2019-12-07 11:53:21,039 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:53:21,040 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:53:21,040 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1740888429] [2019-12-07 11:53:21,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:53:21,043 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:53:21,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:53:21,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:53:21,054 INFO L87 Difference]: Start difference. First operand 109594 states. Second operand 3 states. [2019-12-07 11:53:21,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:53:21,759 INFO L93 Difference]: Finished difference Result 108584 states and 463030 transitions. [2019-12-07 11:53:21,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:53:21,760 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 11:53:21,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:53:22,386 INFO L225 Difference]: With dead ends: 108584 [2019-12-07 11:53:22,386 INFO L226 Difference]: Without dead ends: 102344 [2019-12-07 11:53:22,387 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:53:25,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102344 states. [2019-12-07 11:53:27,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102344 to 102344. [2019-12-07 11:53:27,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102344 states. [2019-12-07 11:53:27,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102344 states to 102344 states and 435834 transitions. [2019-12-07 11:53:27,744 INFO L78 Accepts]: Start accepts. Automaton has 102344 states and 435834 transitions. Word has length 3 [2019-12-07 11:53:27,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:53:27,745 INFO L462 AbstractCegarLoop]: Abstraction has 102344 states and 435834 transitions. [2019-12-07 11:53:27,745 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:53:27,745 INFO L276 IsEmpty]: Start isEmpty. Operand 102344 states and 435834 transitions. [2019-12-07 11:53:27,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:53:27,747 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:53:27,747 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:53:27,748 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:53:27,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:53:27,748 INFO L82 PathProgramCache]: Analyzing trace with hash 295188242, now seen corresponding path program 1 times [2019-12-07 11:53:27,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:53:27,748 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388379602] [2019-12-07 11:53:27,748 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:53:27,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:53:27,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:53:27,813 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1388379602] [2019-12-07 11:53:27,813 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:53:27,813 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:53:27,813 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1866139960] [2019-12-07 11:53:27,814 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:53:27,814 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:53:27,814 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:53:27,814 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:53:27,814 INFO L87 Difference]: Start difference. First operand 102344 states and 435834 transitions. Second operand 4 states. [2019-12-07 11:53:30,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:53:30,716 INFO L93 Difference]: Finished difference Result 162816 states and 664963 transitions. [2019-12-07 11:53:30,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:53:30,717 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:53:30,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:53:31,151 INFO L225 Difference]: With dead ends: 162816 [2019-12-07 11:53:31,151 INFO L226 Difference]: Without dead ends: 162767 [2019-12-07 11:53:31,152 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:53:35,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162767 states. [2019-12-07 11:53:37,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162767 to 148375. [2019-12-07 11:53:37,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148375 states. [2019-12-07 11:53:38,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148375 states to 148375 states and 613985 transitions. [2019-12-07 11:53:38,211 INFO L78 Accepts]: Start accepts. Automaton has 148375 states and 613985 transitions. Word has length 11 [2019-12-07 11:53:38,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:53:38,211 INFO L462 AbstractCegarLoop]: Abstraction has 148375 states and 613985 transitions. [2019-12-07 11:53:38,211 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:53:38,211 INFO L276 IsEmpty]: Start isEmpty. Operand 148375 states and 613985 transitions. [2019-12-07 11:53:38,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:53:38,216 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:53:38,216 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:53:38,216 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:53:38,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:53:38,217 INFO L82 PathProgramCache]: Analyzing trace with hash 1979345710, now seen corresponding path program 1 times [2019-12-07 11:53:38,217 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:53:38,217 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38199733] [2019-12-07 11:53:38,217 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:53:38,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:53:38,268 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:53:38,269 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [38199733] [2019-12-07 11:53:38,269 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:53:38,269 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:53:38,269 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1326750649] [2019-12-07 11:53:38,269 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:53:38,270 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:53:38,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:53:38,270 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:53:38,270 INFO L87 Difference]: Start difference. First operand 148375 states and 613985 transitions. Second operand 4 states. [2019-12-07 11:53:39,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:53:39,786 INFO L93 Difference]: Finished difference Result 208037 states and 841937 transitions. [2019-12-07 11:53:39,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:53:39,787 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:53:39,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:53:40,297 INFO L225 Difference]: With dead ends: 208037 [2019-12-07 11:53:40,297 INFO L226 Difference]: Without dead ends: 207981 [2019-12-07 11:53:40,297 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:53:47,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207981 states. [2019-12-07 11:53:49,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207981 to 175449. [2019-12-07 11:53:49,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175449 states. [2019-12-07 11:53:50,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175449 states to 175449 states and 722246 transitions. [2019-12-07 11:53:50,731 INFO L78 Accepts]: Start accepts. Automaton has 175449 states and 722246 transitions. Word has length 13 [2019-12-07 11:53:50,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:53:50,732 INFO L462 AbstractCegarLoop]: Abstraction has 175449 states and 722246 transitions. [2019-12-07 11:53:50,732 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:53:50,732 INFO L276 IsEmpty]: Start isEmpty. Operand 175449 states and 722246 transitions. [2019-12-07 11:53:50,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:53:50,739 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:53:50,739 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:53:50,739 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:53:50,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:53:50,739 INFO L82 PathProgramCache]: Analyzing trace with hash -1850281775, now seen corresponding path program 1 times [2019-12-07 11:53:50,739 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:53:50,740 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821696041] [2019-12-07 11:53:50,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:53:50,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:53:50,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:53:50,781 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [821696041] [2019-12-07 11:53:50,781 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:53:50,781 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:53:50,782 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [542897712] [2019-12-07 11:53:50,782 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:53:50,782 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:53:50,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:53:50,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:53:50,783 INFO L87 Difference]: Start difference. First operand 175449 states and 722246 transitions. Second operand 3 states. [2019-12-07 11:53:51,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:53:51,963 INFO L93 Difference]: Finished difference Result 259190 states and 1053818 transitions. [2019-12-07 11:53:51,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:53:51,964 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 11:53:51,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:53:52,616 INFO L225 Difference]: With dead ends: 259190 [2019-12-07 11:53:52,616 INFO L226 Difference]: Without dead ends: 259190 [2019-12-07 11:53:52,617 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:53:58,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259190 states. [2019-12-07 11:54:04,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259190 to 195219. [2019-12-07 11:54:04,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195219 states. [2019-12-07 11:54:04,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195219 states to 195219 states and 799392 transitions. [2019-12-07 11:54:04,738 INFO L78 Accepts]: Start accepts. Automaton has 195219 states and 799392 transitions. Word has length 16 [2019-12-07 11:54:04,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:54:04,738 INFO L462 AbstractCegarLoop]: Abstraction has 195219 states and 799392 transitions. [2019-12-07 11:54:04,738 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:54:04,738 INFO L276 IsEmpty]: Start isEmpty. Operand 195219 states and 799392 transitions. [2019-12-07 11:54:04,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:54:04,744 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:54:04,745 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:54:04,745 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:54:04,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:54:04,745 INFO L82 PathProgramCache]: Analyzing trace with hash -1985443542, now seen corresponding path program 1 times [2019-12-07 11:54:04,745 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:54:04,745 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [906502534] [2019-12-07 11:54:04,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:54:04,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:54:04,780 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:54:04,781 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [906502534] [2019-12-07 11:54:04,781 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:54:04,781 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:54:04,781 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136547775] [2019-12-07 11:54:04,781 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:54:04,781 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:54:04,781 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:54:04,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:54:04,782 INFO L87 Difference]: Start difference. First operand 195219 states and 799392 transitions. Second operand 4 states. [2019-12-07 11:54:06,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:54:06,293 INFO L93 Difference]: Finished difference Result 227593 states and 924546 transitions. [2019-12-07 11:54:06,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:54:06,294 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 11:54:06,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:54:06,874 INFO L225 Difference]: With dead ends: 227593 [2019-12-07 11:54:06,874 INFO L226 Difference]: Without dead ends: 227593 [2019-12-07 11:54:06,875 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:54:12,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227593 states. [2019-12-07 11:54:17,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227593 to 204638. [2019-12-07 11:54:17,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204638 states. [2019-12-07 11:54:18,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204638 states to 204638 states and 837381 transitions. [2019-12-07 11:54:18,746 INFO L78 Accepts]: Start accepts. Automaton has 204638 states and 837381 transitions. Word has length 16 [2019-12-07 11:54:18,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:54:18,746 INFO L462 AbstractCegarLoop]: Abstraction has 204638 states and 837381 transitions. [2019-12-07 11:54:18,746 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:54:18,746 INFO L276 IsEmpty]: Start isEmpty. Operand 204638 states and 837381 transitions. [2019-12-07 11:54:18,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:54:18,754 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:54:18,754 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:54:18,754 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:54:18,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:54:18,754 INFO L82 PathProgramCache]: Analyzing trace with hash -32753983, now seen corresponding path program 1 times [2019-12-07 11:54:18,754 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:54:18,755 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374773299] [2019-12-07 11:54:18,755 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:54:18,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:54:18,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:54:18,788 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374773299] [2019-12-07 11:54:18,788 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:54:18,788 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:54:18,788 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1342237280] [2019-12-07 11:54:18,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:54:18,788 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:54:18,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:54:18,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:54:18,789 INFO L87 Difference]: Start difference. First operand 204638 states and 837381 transitions. Second operand 4 states. [2019-12-07 11:54:20,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:54:20,016 INFO L93 Difference]: Finished difference Result 239634 states and 974592 transitions. [2019-12-07 11:54:20,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:54:20,017 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 11:54:20,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:54:20,651 INFO L225 Difference]: With dead ends: 239634 [2019-12-07 11:54:20,651 INFO L226 Difference]: Without dead ends: 239634 [2019-12-07 11:54:20,651 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:54:26,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239634 states. [2019-12-07 11:54:29,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239634 to 207981. [2019-12-07 11:54:29,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207981 states. [2019-12-07 11:54:30,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207981 states to 207981 states and 851409 transitions. [2019-12-07 11:54:30,596 INFO L78 Accepts]: Start accepts. Automaton has 207981 states and 851409 transitions. Word has length 16 [2019-12-07 11:54:30,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:54:30,596 INFO L462 AbstractCegarLoop]: Abstraction has 207981 states and 851409 transitions. [2019-12-07 11:54:30,596 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:54:30,596 INFO L276 IsEmpty]: Start isEmpty. Operand 207981 states and 851409 transitions. [2019-12-07 11:54:30,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 11:54:30,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:54:30,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:54:30,609 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:54:30,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:54:30,610 INFO L82 PathProgramCache]: Analyzing trace with hash -486126770, now seen corresponding path program 1 times [2019-12-07 11:54:30,610 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:54:30,610 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1652760547] [2019-12-07 11:54:30,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:54:30,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:54:30,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:54:30,663 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1652760547] [2019-12-07 11:54:30,663 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:54:30,663 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:54:30,663 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [453043463] [2019-12-07 11:54:30,664 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:54:30,664 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:54:30,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:54:30,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:54:30,664 INFO L87 Difference]: Start difference. First operand 207981 states and 851409 transitions. Second operand 3 states. [2019-12-07 11:54:32,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:54:32,305 INFO L93 Difference]: Finished difference Result 372280 states and 1515056 transitions. [2019-12-07 11:54:32,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:54:32,306 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 11:54:32,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:54:36,251 INFO L225 Difference]: With dead ends: 372280 [2019-12-07 11:54:36,251 INFO L226 Difference]: Without dead ends: 337486 [2019-12-07 11:54:36,251 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:54:42,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337486 states. [2019-12-07 11:54:47,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337486 to 324440. [2019-12-07 11:54:47,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 324440 states. [2019-12-07 11:54:48,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324440 states to 324440 states and 1329299 transitions. [2019-12-07 11:54:48,784 INFO L78 Accepts]: Start accepts. Automaton has 324440 states and 1329299 transitions. Word has length 18 [2019-12-07 11:54:48,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:54:48,784 INFO L462 AbstractCegarLoop]: Abstraction has 324440 states and 1329299 transitions. [2019-12-07 11:54:48,784 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:54:48,784 INFO L276 IsEmpty]: Start isEmpty. Operand 324440 states and 1329299 transitions. [2019-12-07 11:54:48,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:54:48,805 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:54:48,805 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:54:48,805 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:54:48,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:54:48,805 INFO L82 PathProgramCache]: Analyzing trace with hash -1539660278, now seen corresponding path program 1 times [2019-12-07 11:54:48,805 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:54:48,806 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860210451] [2019-12-07 11:54:48,806 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:54:48,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:54:48,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:54:48,861 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1860210451] [2019-12-07 11:54:48,861 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:54:48,861 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:54:48,861 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [32098272] [2019-12-07 11:54:48,861 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:54:48,861 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:54:48,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:54:48,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:54:48,862 INFO L87 Difference]: Start difference. First operand 324440 states and 1329299 transitions. Second operand 5 states. [2019-12-07 11:54:51,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:54:51,784 INFO L93 Difference]: Finished difference Result 458907 states and 1837584 transitions. [2019-12-07 11:54:51,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:54:51,785 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 11:54:51,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:54:53,470 INFO L225 Difference]: With dead ends: 458907 [2019-12-07 11:54:53,470 INFO L226 Difference]: Without dead ends: 458816 [2019-12-07 11:54:53,470 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:55:05,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458816 states. [2019-12-07 11:55:11,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458816 to 349791. [2019-12-07 11:55:11,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 349791 states. [2019-12-07 11:55:12,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349791 states to 349791 states and 1426231 transitions. [2019-12-07 11:55:12,710 INFO L78 Accepts]: Start accepts. Automaton has 349791 states and 1426231 transitions. Word has length 19 [2019-12-07 11:55:12,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:55:12,710 INFO L462 AbstractCegarLoop]: Abstraction has 349791 states and 1426231 transitions. [2019-12-07 11:55:12,710 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:55:12,710 INFO L276 IsEmpty]: Start isEmpty. Operand 349791 states and 1426231 transitions. [2019-12-07 11:55:12,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:55:12,735 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:55:12,735 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:55:12,735 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:55:12,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:55:12,735 INFO L82 PathProgramCache]: Analyzing trace with hash 1882855134, now seen corresponding path program 1 times [2019-12-07 11:55:12,735 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:55:12,736 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [13095718] [2019-12-07 11:55:12,736 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:55:12,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:55:12,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:55:12,762 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [13095718] [2019-12-07 11:55:12,763 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:55:12,763 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:55:12,763 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1200952510] [2019-12-07 11:55:12,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:55:12,763 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:55:12,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:55:12,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:55:12,764 INFO L87 Difference]: Start difference. First operand 349791 states and 1426231 transitions. Second operand 3 states. [2019-12-07 11:55:15,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:55:15,050 INFO L93 Difference]: Finished difference Result 349467 states and 1424966 transitions. [2019-12-07 11:55:15,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:55:15,051 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:55:15,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:55:15,960 INFO L225 Difference]: With dead ends: 349467 [2019-12-07 11:55:15,960 INFO L226 Difference]: Without dead ends: 349467 [2019-12-07 11:55:15,961 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:55:23,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349467 states. [2019-12-07 11:55:31,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349467 to 346461. [2019-12-07 11:55:31,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 346461 states. [2019-12-07 11:55:32,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 346461 states to 346461 states and 1413505 transitions. [2019-12-07 11:55:32,664 INFO L78 Accepts]: Start accepts. Automaton has 346461 states and 1413505 transitions. Word has length 19 [2019-12-07 11:55:32,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:55:32,664 INFO L462 AbstractCegarLoop]: Abstraction has 346461 states and 1413505 transitions. [2019-12-07 11:55:32,664 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:55:32,664 INFO L276 IsEmpty]: Start isEmpty. Operand 346461 states and 1413505 transitions. [2019-12-07 11:55:32,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:55:32,688 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:55:32,688 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:55:32,688 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:55:32,688 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:55:32,688 INFO L82 PathProgramCache]: Analyzing trace with hash -434257907, now seen corresponding path program 1 times [2019-12-07 11:55:32,688 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:55:32,689 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [561628426] [2019-12-07 11:55:32,689 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:55:32,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:55:32,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:55:32,731 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [561628426] [2019-12-07 11:55:32,731 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:55:32,732 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:55:32,732 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [595948220] [2019-12-07 11:55:32,732 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:55:32,732 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:55:32,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:55:32,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:55:32,732 INFO L87 Difference]: Start difference. First operand 346461 states and 1413505 transitions. Second operand 4 states. [2019-12-07 11:55:34,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:55:34,747 INFO L93 Difference]: Finished difference Result 359648 states and 1454980 transitions. [2019-12-07 11:55:34,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:55:34,748 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 11:55:34,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:55:35,642 INFO L225 Difference]: With dead ends: 359648 [2019-12-07 11:55:35,642 INFO L226 Difference]: Without dead ends: 359648 [2019-12-07 11:55:35,643 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:55:43,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359648 states. [2019-12-07 11:55:48,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359648 to 335030. [2019-12-07 11:55:48,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 335030 states. [2019-12-07 11:55:49,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 335030 states to 335030 states and 1366497 transitions. [2019-12-07 11:55:49,546 INFO L78 Accepts]: Start accepts. Automaton has 335030 states and 1366497 transitions. Word has length 19 [2019-12-07 11:55:49,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:55:49,546 INFO L462 AbstractCegarLoop]: Abstraction has 335030 states and 1366497 transitions. [2019-12-07 11:55:49,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:55:49,547 INFO L276 IsEmpty]: Start isEmpty. Operand 335030 states and 1366497 transitions. [2019-12-07 11:55:49,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 11:55:49,575 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:55:49,575 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:55:49,575 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:55:49,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:55:49,575 INFO L82 PathProgramCache]: Analyzing trace with hash -10262915, now seen corresponding path program 1 times [2019-12-07 11:55:49,575 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:55:49,576 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017309882] [2019-12-07 11:55:49,576 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:55:49,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:55:49,600 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:55:49,600 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2017309882] [2019-12-07 11:55:49,600 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:55:49,600 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:55:49,601 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689096138] [2019-12-07 11:55:49,601 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:55:49,601 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:55:49,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:55:49,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:55:49,601 INFO L87 Difference]: Start difference. First operand 335030 states and 1366497 transitions. Second operand 3 states. [2019-12-07 11:55:54,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:55:54,001 INFO L93 Difference]: Finished difference Result 313350 states and 1264486 transitions. [2019-12-07 11:55:54,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:55:54,001 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 11:55:54,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:55:54,800 INFO L225 Difference]: With dead ends: 313350 [2019-12-07 11:55:54,800 INFO L226 Difference]: Without dead ends: 313350 [2019-12-07 11:55:54,800 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:01,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313350 states. [2019-12-07 11:56:05,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313350 to 310982. [2019-12-07 11:56:05,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 310982 states. [2019-12-07 11:56:06,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 310982 states to 310982 states and 1255856 transitions. [2019-12-07 11:56:06,173 INFO L78 Accepts]: Start accepts. Automaton has 310982 states and 1255856 transitions. Word has length 20 [2019-12-07 11:56:06,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:06,173 INFO L462 AbstractCegarLoop]: Abstraction has 310982 states and 1255856 transitions. [2019-12-07 11:56:06,173 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:56:06,173 INFO L276 IsEmpty]: Start isEmpty. Operand 310982 states and 1255856 transitions. [2019-12-07 11:56:06,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 11:56:06,192 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:06,192 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:06,192 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:06,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:06,192 INFO L82 PathProgramCache]: Analyzing trace with hash -1380317719, now seen corresponding path program 1 times [2019-12-07 11:56:06,192 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:06,192 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [395932838] [2019-12-07 11:56:06,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:06,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:06,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:06,226 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [395932838] [2019-12-07 11:56:06,226 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:06,226 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:56:06,226 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800030515] [2019-12-07 11:56:06,226 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:56:06,226 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:06,227 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:56:06,227 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:56:06,227 INFO L87 Difference]: Start difference. First operand 310982 states and 1255856 transitions. Second operand 4 states. [2019-12-07 11:56:06,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:06,524 INFO L93 Difference]: Finished difference Result 86910 states and 292872 transitions. [2019-12-07 11:56:06,524 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:56:06,524 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 11:56:06,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:06,631 INFO L225 Difference]: With dead ends: 86910 [2019-12-07 11:56:06,631 INFO L226 Difference]: Without dead ends: 65685 [2019-12-07 11:56:06,632 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:56:06,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65685 states. [2019-12-07 11:56:07,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65685 to 65573. [2019-12-07 11:56:07,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65573 states. [2019-12-07 11:56:08,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65573 states to 65573 states and 208360 transitions. [2019-12-07 11:56:08,089 INFO L78 Accepts]: Start accepts. Automaton has 65573 states and 208360 transitions. Word has length 20 [2019-12-07 11:56:08,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:08,089 INFO L462 AbstractCegarLoop]: Abstraction has 65573 states and 208360 transitions. [2019-12-07 11:56:08,089 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:56:08,089 INFO L276 IsEmpty]: Start isEmpty. Operand 65573 states and 208360 transitions. [2019-12-07 11:56:08,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:56:08,095 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:08,095 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:08,095 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:08,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:08,095 INFO L82 PathProgramCache]: Analyzing trace with hash 1141389468, now seen corresponding path program 1 times [2019-12-07 11:56:08,095 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:08,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [115024862] [2019-12-07 11:56:08,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:08,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:08,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:08,129 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [115024862] [2019-12-07 11:56:08,129 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:08,130 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:56:08,130 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879840716] [2019-12-07 11:56:08,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:56:08,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:08,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:56:08,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:56:08,131 INFO L87 Difference]: Start difference. First operand 65573 states and 208360 transitions. Second operand 5 states. [2019-12-07 11:56:08,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:08,617 INFO L93 Difference]: Finished difference Result 82355 states and 256944 transitions. [2019-12-07 11:56:08,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:56:08,617 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:56:08,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:08,738 INFO L225 Difference]: With dead ends: 82355 [2019-12-07 11:56:08,738 INFO L226 Difference]: Without dead ends: 82299 [2019-12-07 11:56:08,738 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:56:09,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82299 states. [2019-12-07 11:56:10,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82299 to 68425. [2019-12-07 11:56:10,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68425 states. [2019-12-07 11:56:10,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68425 states to 68425 states and 216910 transitions. [2019-12-07 11:56:10,245 INFO L78 Accepts]: Start accepts. Automaton has 68425 states and 216910 transitions. Word has length 22 [2019-12-07 11:56:10,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:10,245 INFO L462 AbstractCegarLoop]: Abstraction has 68425 states and 216910 transitions. [2019-12-07 11:56:10,245 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:56:10,245 INFO L276 IsEmpty]: Start isEmpty. Operand 68425 states and 216910 transitions. [2019-12-07 11:56:10,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:56:10,251 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:10,251 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:10,251 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:10,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:10,251 INFO L82 PathProgramCache]: Analyzing trace with hash 1541375313, now seen corresponding path program 1 times [2019-12-07 11:56:10,251 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:10,251 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1607958312] [2019-12-07 11:56:10,252 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:10,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:10,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:10,291 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1607958312] [2019-12-07 11:56:10,292 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:10,292 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:56:10,292 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [287760284] [2019-12-07 11:56:10,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:56:10,292 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:10,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:56:10,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:56:10,292 INFO L87 Difference]: Start difference. First operand 68425 states and 216910 transitions. Second operand 5 states. [2019-12-07 11:56:10,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:10,792 INFO L93 Difference]: Finished difference Result 85549 states and 267008 transitions. [2019-12-07 11:56:10,792 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:56:10,792 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:56:10,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:10,913 INFO L225 Difference]: With dead ends: 85549 [2019-12-07 11:56:10,913 INFO L226 Difference]: Without dead ends: 85493 [2019-12-07 11:56:10,913 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:56:11,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85493 states. [2019-12-07 11:56:12,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85493 to 68439. [2019-12-07 11:56:12,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68439 states. [2019-12-07 11:56:12,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68439 states to 68439 states and 216766 transitions. [2019-12-07 11:56:12,145 INFO L78 Accepts]: Start accepts. Automaton has 68439 states and 216766 transitions. Word has length 22 [2019-12-07 11:56:12,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:12,145 INFO L462 AbstractCegarLoop]: Abstraction has 68439 states and 216766 transitions. [2019-12-07 11:56:12,145 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:56:12,145 INFO L276 IsEmpty]: Start isEmpty. Operand 68439 states and 216766 transitions. [2019-12-07 11:56:12,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 11:56:12,159 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:12,159 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:12,159 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:12,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:12,159 INFO L82 PathProgramCache]: Analyzing trace with hash 2020314615, now seen corresponding path program 1 times [2019-12-07 11:56:12,159 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:12,159 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1854556314] [2019-12-07 11:56:12,159 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:12,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:12,329 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:12,329 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1854556314] [2019-12-07 11:56:12,329 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:12,329 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:56:12,329 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [456387306] [2019-12-07 11:56:12,330 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:56:12,330 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:12,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:56:12,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:56:12,330 INFO L87 Difference]: Start difference. First operand 68439 states and 216766 transitions. Second operand 5 states. [2019-12-07 11:56:12,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:12,704 INFO L93 Difference]: Finished difference Result 80305 states and 251119 transitions. [2019-12-07 11:56:12,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:56:12,704 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 11:56:12,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:12,819 INFO L225 Difference]: With dead ends: 80305 [2019-12-07 11:56:12,819 INFO L226 Difference]: Without dead ends: 80137 [2019-12-07 11:56:12,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:56:13,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80137 states. [2019-12-07 11:56:13,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80137 to 70638. [2019-12-07 11:56:13,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70638 states. [2019-12-07 11:56:14,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70638 states to 70638 states and 223242 transitions. [2019-12-07 11:56:14,086 INFO L78 Accepts]: Start accepts. Automaton has 70638 states and 223242 transitions. Word has length 26 [2019-12-07 11:56:14,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:14,086 INFO L462 AbstractCegarLoop]: Abstraction has 70638 states and 223242 transitions. [2019-12-07 11:56:14,086 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:56:14,086 INFO L276 IsEmpty]: Start isEmpty. Operand 70638 states and 223242 transitions. [2019-12-07 11:56:14,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 11:56:14,100 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:14,100 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:14,100 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:14,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:14,100 INFO L82 PathProgramCache]: Analyzing trace with hash 1824549582, now seen corresponding path program 1 times [2019-12-07 11:56:14,101 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:14,101 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [165355318] [2019-12-07 11:56:14,101 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:14,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:14,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:14,124 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [165355318] [2019-12-07 11:56:14,124 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:14,124 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:56:14,124 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [592563223] [2019-12-07 11:56:14,125 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:56:14,125 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:14,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:56:14,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:14,125 INFO L87 Difference]: Start difference. First operand 70638 states and 223242 transitions. Second operand 3 states. [2019-12-07 11:56:14,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:14,371 INFO L93 Difference]: Finished difference Result 84647 states and 260398 transitions. [2019-12-07 11:56:14,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:56:14,371 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 26 [2019-12-07 11:56:14,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:14,486 INFO L225 Difference]: With dead ends: 84647 [2019-12-07 11:56:14,486 INFO L226 Difference]: Without dead ends: 84647 [2019-12-07 11:56:14,486 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:14,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84647 states. [2019-12-07 11:56:15,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84647 to 70638. [2019-12-07 11:56:15,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70638 states. [2019-12-07 11:56:15,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70638 states to 70638 states and 217847 transitions. [2019-12-07 11:56:15,781 INFO L78 Accepts]: Start accepts. Automaton has 70638 states and 217847 transitions. Word has length 26 [2019-12-07 11:56:15,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:15,781 INFO L462 AbstractCegarLoop]: Abstraction has 70638 states and 217847 transitions. [2019-12-07 11:56:15,781 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:56:15,781 INFO L276 IsEmpty]: Start isEmpty. Operand 70638 states and 217847 transitions. [2019-12-07 11:56:15,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 11:56:15,800 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:15,800 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:15,800 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:15,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:15,800 INFO L82 PathProgramCache]: Analyzing trace with hash -77744514, now seen corresponding path program 1 times [2019-12-07 11:56:15,800 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:15,800 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [522433404] [2019-12-07 11:56:15,801 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:15,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:15,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:15,830 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [522433404] [2019-12-07 11:56:15,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:15,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:56:15,830 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [224986445] [2019-12-07 11:56:15,831 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:56:15,831 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:15,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:56:15,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:56:15,831 INFO L87 Difference]: Start difference. First operand 70638 states and 217847 transitions. Second operand 5 states. [2019-12-07 11:56:16,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:16,235 INFO L93 Difference]: Finished difference Result 82875 states and 253074 transitions. [2019-12-07 11:56:16,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:56:16,236 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 11:56:16,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:16,339 INFO L225 Difference]: With dead ends: 82875 [2019-12-07 11:56:16,339 INFO L226 Difference]: Without dead ends: 82691 [2019-12-07 11:56:16,340 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:56:16,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82691 states. [2019-12-07 11:56:17,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82691 to 70276. [2019-12-07 11:56:17,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70276 states. [2019-12-07 11:56:17,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70276 states to 70276 states and 216644 transitions. [2019-12-07 11:56:17,623 INFO L78 Accepts]: Start accepts. Automaton has 70276 states and 216644 transitions. Word has length 28 [2019-12-07 11:56:17,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:17,623 INFO L462 AbstractCegarLoop]: Abstraction has 70276 states and 216644 transitions. [2019-12-07 11:56:17,623 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:56:17,623 INFO L276 IsEmpty]: Start isEmpty. Operand 70276 states and 216644 transitions. [2019-12-07 11:56:17,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 11:56:17,651 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:17,651 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:17,651 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:17,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:17,651 INFO L82 PathProgramCache]: Analyzing trace with hash -604665634, now seen corresponding path program 1 times [2019-12-07 11:56:17,651 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:17,651 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1038217586] [2019-12-07 11:56:17,651 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:17,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:17,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:17,704 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1038217586] [2019-12-07 11:56:17,705 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:17,705 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:56:17,705 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [970283352] [2019-12-07 11:56:17,705 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:56:17,705 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:17,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:56:17,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:56:17,706 INFO L87 Difference]: Start difference. First operand 70276 states and 216644 transitions. Second operand 5 states. [2019-12-07 11:56:17,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:17,823 INFO L93 Difference]: Finished difference Result 31139 states and 92090 transitions. [2019-12-07 11:56:17,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:56:17,824 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 11:56:17,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:17,856 INFO L225 Difference]: With dead ends: 31139 [2019-12-07 11:56:17,856 INFO L226 Difference]: Without dead ends: 27075 [2019-12-07 11:56:17,856 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:56:17,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27075 states. [2019-12-07 11:56:18,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27075 to 25552. [2019-12-07 11:56:18,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25552 states. [2019-12-07 11:56:18,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25552 states to 25552 states and 75390 transitions. [2019-12-07 11:56:18,231 INFO L78 Accepts]: Start accepts. Automaton has 25552 states and 75390 transitions. Word has length 31 [2019-12-07 11:56:18,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:18,231 INFO L462 AbstractCegarLoop]: Abstraction has 25552 states and 75390 transitions. [2019-12-07 11:56:18,231 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:56:18,231 INFO L276 IsEmpty]: Start isEmpty. Operand 25552 states and 75390 transitions. [2019-12-07 11:56:18,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 11:56:18,248 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:18,248 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:18,249 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:18,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:18,249 INFO L82 PathProgramCache]: Analyzing trace with hash 147507175, now seen corresponding path program 1 times [2019-12-07 11:56:18,249 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:18,249 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [424804562] [2019-12-07 11:56:18,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:18,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:18,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:18,297 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [424804562] [2019-12-07 11:56:18,297 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:18,297 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:56:18,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127069183] [2019-12-07 11:56:18,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:56:18,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:18,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:56:18,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:56:18,297 INFO L87 Difference]: Start difference. First operand 25552 states and 75390 transitions. Second operand 6 states. [2019-12-07 11:56:18,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:18,672 INFO L93 Difference]: Finished difference Result 30385 states and 88582 transitions. [2019-12-07 11:56:18,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:56:18,673 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 11:56:18,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:18,706 INFO L225 Difference]: With dead ends: 30385 [2019-12-07 11:56:18,706 INFO L226 Difference]: Without dead ends: 30129 [2019-12-07 11:56:18,706 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:56:18,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30129 states. [2019-12-07 11:56:19,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30129 to 25617. [2019-12-07 11:56:19,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25617 states. [2019-12-07 11:56:19,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25617 states to 25617 states and 75584 transitions. [2019-12-07 11:56:19,118 INFO L78 Accepts]: Start accepts. Automaton has 25617 states and 75584 transitions. Word has length 32 [2019-12-07 11:56:19,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:19,118 INFO L462 AbstractCegarLoop]: Abstraction has 25617 states and 75584 transitions. [2019-12-07 11:56:19,118 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:56:19,118 INFO L276 IsEmpty]: Start isEmpty. Operand 25617 states and 75584 transitions. [2019-12-07 11:56:19,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 11:56:19,135 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:19,135 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:19,135 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:19,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:19,135 INFO L82 PathProgramCache]: Analyzing trace with hash -1407969559, now seen corresponding path program 2 times [2019-12-07 11:56:19,135 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:19,135 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253176702] [2019-12-07 11:56:19,136 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:19,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:19,179 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:19,179 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [253176702] [2019-12-07 11:56:19,179 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:19,179 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:56:19,179 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2068883855] [2019-12-07 11:56:19,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:56:19,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:19,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:56:19,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:56:19,180 INFO L87 Difference]: Start difference. First operand 25617 states and 75584 transitions. Second operand 6 states. [2019-12-07 11:56:19,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:19,574 INFO L93 Difference]: Finished difference Result 30678 states and 89487 transitions. [2019-12-07 11:56:19,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:56:19,574 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 11:56:19,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:19,607 INFO L225 Difference]: With dead ends: 30678 [2019-12-07 11:56:19,607 INFO L226 Difference]: Without dead ends: 30361 [2019-12-07 11:56:19,607 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:56:19,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30361 states. [2019-12-07 11:56:19,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30361 to 25584. [2019-12-07 11:56:19,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25584 states. [2019-12-07 11:56:20,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25584 states to 25584 states and 75501 transitions. [2019-12-07 11:56:20,085 INFO L78 Accepts]: Start accepts. Automaton has 25584 states and 75501 transitions. Word has length 32 [2019-12-07 11:56:20,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:20,086 INFO L462 AbstractCegarLoop]: Abstraction has 25584 states and 75501 transitions. [2019-12-07 11:56:20,086 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:56:20,086 INFO L276 IsEmpty]: Start isEmpty. Operand 25584 states and 75501 transitions. [2019-12-07 11:56:20,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 11:56:20,101 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:20,101 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:20,101 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:20,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:20,101 INFO L82 PathProgramCache]: Analyzing trace with hash 1247784206, now seen corresponding path program 1 times [2019-12-07 11:56:20,101 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:20,102 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34703740] [2019-12-07 11:56:20,102 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:20,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:20,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:20,153 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34703740] [2019-12-07 11:56:20,153 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:20,153 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:56:20,153 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872436547] [2019-12-07 11:56:20,153 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:56:20,154 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:20,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:56:20,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:56:20,154 INFO L87 Difference]: Start difference. First operand 25584 states and 75501 transitions. Second operand 6 states. [2019-12-07 11:56:20,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:20,569 INFO L93 Difference]: Finished difference Result 29652 states and 86454 transitions. [2019-12-07 11:56:20,569 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:56:20,570 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 11:56:20,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:20,606 INFO L225 Difference]: With dead ends: 29652 [2019-12-07 11:56:20,606 INFO L226 Difference]: Without dead ends: 29277 [2019-12-07 11:56:20,606 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:56:20,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29277 states. [2019-12-07 11:56:20,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29277 to 24506. [2019-12-07 11:56:20,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24506 states. [2019-12-07 11:56:20,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24506 states to 24506 states and 72314 transitions. [2019-12-07 11:56:20,985 INFO L78 Accepts]: Start accepts. Automaton has 24506 states and 72314 transitions. Word has length 34 [2019-12-07 11:56:20,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:20,985 INFO L462 AbstractCegarLoop]: Abstraction has 24506 states and 72314 transitions. [2019-12-07 11:56:20,985 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:56:20,985 INFO L276 IsEmpty]: Start isEmpty. Operand 24506 states and 72314 transitions. [2019-12-07 11:56:21,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:56:21,005 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:21,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:21,005 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:21,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:21,005 INFO L82 PathProgramCache]: Analyzing trace with hash 280000667, now seen corresponding path program 1 times [2019-12-07 11:56:21,006 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:21,006 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098683252] [2019-12-07 11:56:21,006 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:21,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:21,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:21,042 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2098683252] [2019-12-07 11:56:21,042 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:21,042 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:56:21,042 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1488066108] [2019-12-07 11:56:21,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:56:21,043 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:21,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:56:21,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:21,043 INFO L87 Difference]: Start difference. First operand 24506 states and 72314 transitions. Second operand 3 states. [2019-12-07 11:56:21,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:21,102 INFO L93 Difference]: Finished difference Result 24506 states and 71350 transitions. [2019-12-07 11:56:21,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:56:21,103 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 11:56:21,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:21,129 INFO L225 Difference]: With dead ends: 24506 [2019-12-07 11:56:21,129 INFO L226 Difference]: Without dead ends: 24506 [2019-12-07 11:56:21,129 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:21,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24506 states. [2019-12-07 11:56:21,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24506 to 24244. [2019-12-07 11:56:21,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24244 states. [2019-12-07 11:56:21,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24244 states to 24244 states and 70629 transitions. [2019-12-07 11:56:21,461 INFO L78 Accepts]: Start accepts. Automaton has 24244 states and 70629 transitions. Word has length 41 [2019-12-07 11:56:21,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:21,461 INFO L462 AbstractCegarLoop]: Abstraction has 24244 states and 70629 transitions. [2019-12-07 11:56:21,461 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:56:21,461 INFO L276 IsEmpty]: Start isEmpty. Operand 24244 states and 70629 transitions. [2019-12-07 11:56:21,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 11:56:21,481 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:21,482 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:21,482 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:21,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:21,482 INFO L82 PathProgramCache]: Analyzing trace with hash 1735658860, now seen corresponding path program 1 times [2019-12-07 11:56:21,482 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:21,482 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1222384988] [2019-12-07 11:56:21,482 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:21,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:21,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:21,518 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1222384988] [2019-12-07 11:56:21,518 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:21,518 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:56:21,518 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810343359] [2019-12-07 11:56:21,518 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:56:21,518 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:21,518 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:56:21,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:21,518 INFO L87 Difference]: Start difference. First operand 24244 states and 70629 transitions. Second operand 3 states. [2019-12-07 11:56:21,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:21,597 INFO L93 Difference]: Finished difference Result 32760 states and 95798 transitions. [2019-12-07 11:56:21,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:56:21,597 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2019-12-07 11:56:21,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:21,608 INFO L225 Difference]: With dead ends: 32760 [2019-12-07 11:56:21,608 INFO L226 Difference]: Without dead ends: 12034 [2019-12-07 11:56:21,609 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:21,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12034 states. [2019-12-07 11:56:21,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12034 to 11990. [2019-12-07 11:56:21,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11990 states. [2019-12-07 11:56:21,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11990 states to 11990 states and 34388 transitions. [2019-12-07 11:56:21,771 INFO L78 Accepts]: Start accepts. Automaton has 11990 states and 34388 transitions. Word has length 42 [2019-12-07 11:56:21,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:21,771 INFO L462 AbstractCegarLoop]: Abstraction has 11990 states and 34388 transitions. [2019-12-07 11:56:21,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:56:21,771 INFO L276 IsEmpty]: Start isEmpty. Operand 11990 states and 34388 transitions. [2019-12-07 11:56:21,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 11:56:21,780 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:21,780 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:21,780 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:21,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:21,780 INFO L82 PathProgramCache]: Analyzing trace with hash 1498841336, now seen corresponding path program 2 times [2019-12-07 11:56:21,780 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:21,780 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1246411326] [2019-12-07 11:56:21,780 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:21,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:21,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:21,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1246411326] [2019-12-07 11:56:21,828 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:21,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:56:21,828 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [997082232] [2019-12-07 11:56:21,829 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:56:21,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:21,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:56:21,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:56:21,829 INFO L87 Difference]: Start difference. First operand 11990 states and 34388 transitions. Second operand 6 states. [2019-12-07 11:56:21,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:21,896 INFO L93 Difference]: Finished difference Result 11043 states and 32390 transitions. [2019-12-07 11:56:21,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:56:21,897 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2019-12-07 11:56:21,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:21,906 INFO L225 Difference]: With dead ends: 11043 [2019-12-07 11:56:21,906 INFO L226 Difference]: Without dead ends: 9390 [2019-12-07 11:56:21,907 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:56:21,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9390 states. [2019-12-07 11:56:22,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9390 to 9390. [2019-12-07 11:56:22,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9390 states. [2019-12-07 11:56:22,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9390 states to 9390 states and 28429 transitions. [2019-12-07 11:56:22,043 INFO L78 Accepts]: Start accepts. Automaton has 9390 states and 28429 transitions. Word has length 42 [2019-12-07 11:56:22,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:22,044 INFO L462 AbstractCegarLoop]: Abstraction has 9390 states and 28429 transitions. [2019-12-07 11:56:22,044 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:56:22,044 INFO L276 IsEmpty]: Start isEmpty. Operand 9390 states and 28429 transitions. [2019-12-07 11:56:22,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:56:22,050 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:22,051 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:22,051 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:22,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:22,051 INFO L82 PathProgramCache]: Analyzing trace with hash -224937897, now seen corresponding path program 1 times [2019-12-07 11:56:22,051 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:22,051 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [348353941] [2019-12-07 11:56:22,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:22,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:22,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:22,106 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [348353941] [2019-12-07 11:56:22,106 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:22,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:56:22,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2055001792] [2019-12-07 11:56:22,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:56:22,107 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:22,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:56:22,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:56:22,107 INFO L87 Difference]: Start difference. First operand 9390 states and 28429 transitions. Second operand 6 states. [2019-12-07 11:56:22,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:22,579 INFO L93 Difference]: Finished difference Result 17261 states and 51283 transitions. [2019-12-07 11:56:22,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 11:56:22,579 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 11:56:22,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:22,595 INFO L225 Difference]: With dead ends: 17261 [2019-12-07 11:56:22,595 INFO L226 Difference]: Without dead ends: 17261 [2019-12-07 11:56:22,595 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:56:22,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17261 states. [2019-12-07 11:56:22,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17261 to 13272. [2019-12-07 11:56:22,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13272 states. [2019-12-07 11:56:22,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13272 states to 13272 states and 40002 transitions. [2019-12-07 11:56:22,810 INFO L78 Accepts]: Start accepts. Automaton has 13272 states and 40002 transitions. Word has length 65 [2019-12-07 11:56:22,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:22,811 INFO L462 AbstractCegarLoop]: Abstraction has 13272 states and 40002 transitions. [2019-12-07 11:56:22,811 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:56:22,811 INFO L276 IsEmpty]: Start isEmpty. Operand 13272 states and 40002 transitions. [2019-12-07 11:56:22,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:56:22,822 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:22,823 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:22,823 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:22,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:22,823 INFO L82 PathProgramCache]: Analyzing trace with hash 1636974987, now seen corresponding path program 2 times [2019-12-07 11:56:22,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:22,823 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [765789143] [2019-12-07 11:56:22,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:22,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:22,895 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:22,895 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [765789143] [2019-12-07 11:56:22,895 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:22,895 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:56:22,895 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [998619403] [2019-12-07 11:56:22,895 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 11:56:22,896 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:22,896 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 11:56:22,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 11:56:22,896 INFO L87 Difference]: Start difference. First operand 13272 states and 40002 transitions. Second operand 8 states. [2019-12-07 11:56:23,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:23,796 INFO L93 Difference]: Finished difference Result 23530 states and 69197 transitions. [2019-12-07 11:56:23,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:56:23,797 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 65 [2019-12-07 11:56:23,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:23,820 INFO L225 Difference]: With dead ends: 23530 [2019-12-07 11:56:23,820 INFO L226 Difference]: Without dead ends: 23530 [2019-12-07 11:56:23,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:56:23,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23530 states. [2019-12-07 11:56:24,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23530 to 14184. [2019-12-07 11:56:24,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14184 states. [2019-12-07 11:56:24,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14184 states to 14184 states and 42654 transitions. [2019-12-07 11:56:24,086 INFO L78 Accepts]: Start accepts. Automaton has 14184 states and 42654 transitions. Word has length 65 [2019-12-07 11:56:24,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:24,087 INFO L462 AbstractCegarLoop]: Abstraction has 14184 states and 42654 transitions. [2019-12-07 11:56:24,087 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 11:56:24,087 INFO L276 IsEmpty]: Start isEmpty. Operand 14184 states and 42654 transitions. [2019-12-07 11:56:24,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:56:24,098 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:24,098 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:24,098 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:24,098 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:24,098 INFO L82 PathProgramCache]: Analyzing trace with hash -338575261, now seen corresponding path program 3 times [2019-12-07 11:56:24,098 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:24,099 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1668890611] [2019-12-07 11:56:24,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:24,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:24,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:24,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1668890611] [2019-12-07 11:56:24,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:24,182 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:56:24,183 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [218676337] [2019-12-07 11:56:24,183 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 11:56:24,183 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:24,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 11:56:24,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:56:24,183 INFO L87 Difference]: Start difference. First operand 14184 states and 42654 transitions. Second operand 9 states. [2019-12-07 11:56:25,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:25,396 INFO L93 Difference]: Finished difference Result 23893 states and 70438 transitions. [2019-12-07 11:56:25,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 11:56:25,396 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 65 [2019-12-07 11:56:25,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:25,418 INFO L225 Difference]: With dead ends: 23893 [2019-12-07 11:56:25,418 INFO L226 Difference]: Without dead ends: 23893 [2019-12-07 11:56:25,419 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=485, Unknown=0, NotChecked=0, Total=600 [2019-12-07 11:56:25,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23893 states. [2019-12-07 11:56:25,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23893 to 13818. [2019-12-07 11:56:25,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13818 states. [2019-12-07 11:56:25,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13818 states to 13818 states and 41623 transitions. [2019-12-07 11:56:25,682 INFO L78 Accepts]: Start accepts. Automaton has 13818 states and 41623 transitions. Word has length 65 [2019-12-07 11:56:25,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:25,682 INFO L462 AbstractCegarLoop]: Abstraction has 13818 states and 41623 transitions. [2019-12-07 11:56:25,682 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 11:56:25,682 INFO L276 IsEmpty]: Start isEmpty. Operand 13818 states and 41623 transitions. [2019-12-07 11:56:25,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:56:25,694 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:25,694 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:25,694 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:25,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:25,694 INFO L82 PathProgramCache]: Analyzing trace with hash 1110190313, now seen corresponding path program 4 times [2019-12-07 11:56:25,694 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:25,694 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138872528] [2019-12-07 11:56:25,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:25,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:25,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:25,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [138872528] [2019-12-07 11:56:25,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:25,734 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:56:25,734 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1387916497] [2019-12-07 11:56:25,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:56:25,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:25,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:56:25,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:25,735 INFO L87 Difference]: Start difference. First operand 13818 states and 41623 transitions. Second operand 3 states. [2019-12-07 11:56:25,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:25,806 INFO L93 Difference]: Finished difference Result 16584 states and 49988 transitions. [2019-12-07 11:56:25,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:56:25,807 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 11:56:25,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:25,823 INFO L225 Difference]: With dead ends: 16584 [2019-12-07 11:56:25,823 INFO L226 Difference]: Without dead ends: 16584 [2019-12-07 11:56:25,823 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:25,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16584 states. [2019-12-07 11:56:26,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16584 to 12289. [2019-12-07 11:56:26,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12289 states. [2019-12-07 11:56:26,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12289 states to 12289 states and 37337 transitions. [2019-12-07 11:56:26,024 INFO L78 Accepts]: Start accepts. Automaton has 12289 states and 37337 transitions. Word has length 65 [2019-12-07 11:56:26,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:26,024 INFO L462 AbstractCegarLoop]: Abstraction has 12289 states and 37337 transitions. [2019-12-07 11:56:26,024 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:56:26,025 INFO L276 IsEmpty]: Start isEmpty. Operand 12289 states and 37337 transitions. [2019-12-07 11:56:26,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:56:26,035 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:26,035 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:26,035 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:26,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:26,035 INFO L82 PathProgramCache]: Analyzing trace with hash -623699513, now seen corresponding path program 1 times [2019-12-07 11:56:26,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:26,036 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223782245] [2019-12-07 11:56:26,036 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:26,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:26,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:26,131 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1223782245] [2019-12-07 11:56:26,131 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:26,131 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:56:26,131 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [812382930] [2019-12-07 11:56:26,131 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:56:26,132 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:26,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:56:26,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:56:26,132 INFO L87 Difference]: Start difference. First operand 12289 states and 37337 transitions. Second operand 10 states. [2019-12-07 11:56:27,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:27,423 INFO L93 Difference]: Finished difference Result 31296 states and 94925 transitions. [2019-12-07 11:56:27,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 11:56:27,423 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 11:56:27,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:27,448 INFO L225 Difference]: With dead ends: 31296 [2019-12-07 11:56:27,448 INFO L226 Difference]: Without dead ends: 20807 [2019-12-07 11:56:27,449 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=140, Invalid=562, Unknown=0, NotChecked=0, Total=702 [2019-12-07 11:56:27,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20807 states. [2019-12-07 11:56:27,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20807 to 15119. [2019-12-07 11:56:27,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15119 states. [2019-12-07 11:56:27,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15119 states to 15119 states and 45261 transitions. [2019-12-07 11:56:27,702 INFO L78 Accepts]: Start accepts. Automaton has 15119 states and 45261 transitions. Word has length 66 [2019-12-07 11:56:27,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:27,702 INFO L462 AbstractCegarLoop]: Abstraction has 15119 states and 45261 transitions. [2019-12-07 11:56:27,702 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:56:27,702 INFO L276 IsEmpty]: Start isEmpty. Operand 15119 states and 45261 transitions. [2019-12-07 11:56:27,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:56:27,715 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:27,715 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:27,715 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:27,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:27,715 INFO L82 PathProgramCache]: Analyzing trace with hash -1795841111, now seen corresponding path program 2 times [2019-12-07 11:56:27,715 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:27,715 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [231082680] [2019-12-07 11:56:27,715 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:27,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:27,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:27,849 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [231082680] [2019-12-07 11:56:27,849 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:27,850 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:56:27,850 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036720792] [2019-12-07 11:56:27,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:56:27,850 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:27,850 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:56:27,850 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:56:27,850 INFO L87 Difference]: Start difference. First operand 15119 states and 45261 transitions. Second operand 11 states. [2019-12-07 11:56:30,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:30,785 INFO L93 Difference]: Finished difference Result 27748 states and 82724 transitions. [2019-12-07 11:56:30,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 11:56:30,787 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 11:56:30,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:30,828 INFO L225 Difference]: With dead ends: 27748 [2019-12-07 11:56:30,828 INFO L226 Difference]: Without dead ends: 22908 [2019-12-07 11:56:30,828 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=154, Invalid=716, Unknown=0, NotChecked=0, Total=870 [2019-12-07 11:56:30,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22908 states. [2019-12-07 11:56:31,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22908 to 15115. [2019-12-07 11:56:31,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15115 states. [2019-12-07 11:56:31,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15115 states to 15115 states and 45004 transitions. [2019-12-07 11:56:31,102 INFO L78 Accepts]: Start accepts. Automaton has 15115 states and 45004 transitions. Word has length 66 [2019-12-07 11:56:31,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:31,102 INFO L462 AbstractCegarLoop]: Abstraction has 15115 states and 45004 transitions. [2019-12-07 11:56:31,102 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:56:31,102 INFO L276 IsEmpty]: Start isEmpty. Operand 15115 states and 45004 transitions. [2019-12-07 11:56:31,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:56:31,115 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:31,115 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:31,116 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:31,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:31,116 INFO L82 PathProgramCache]: Analyzing trace with hash -131673981, now seen corresponding path program 3 times [2019-12-07 11:56:31,116 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:31,116 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529869735] [2019-12-07 11:56:31,116 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:31,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:31,471 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:31,471 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1529869735] [2019-12-07 11:56:31,471 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:31,471 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:56:31,472 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [356893549] [2019-12-07 11:56:31,472 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:56:31,472 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:31,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:56:31,472 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=194, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:56:31,472 INFO L87 Difference]: Start difference. First operand 15115 states and 45004 transitions. Second operand 16 states. [2019-12-07 11:56:35,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:35,673 INFO L93 Difference]: Finished difference Result 35178 states and 101635 transitions. [2019-12-07 11:56:35,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 11:56:35,675 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 66 [2019-12-07 11:56:35,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:35,722 INFO L225 Difference]: With dead ends: 35178 [2019-12-07 11:56:35,722 INFO L226 Difference]: Without dead ends: 30386 [2019-12-07 11:56:35,723 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 653 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=427, Invalid=2023, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 11:56:35,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30386 states. [2019-12-07 11:56:36,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30386 to 15768. [2019-12-07 11:56:36,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15768 states. [2019-12-07 11:56:36,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15768 states to 15768 states and 46639 transitions. [2019-12-07 11:56:36,051 INFO L78 Accepts]: Start accepts. Automaton has 15768 states and 46639 transitions. Word has length 66 [2019-12-07 11:56:36,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:36,051 INFO L462 AbstractCegarLoop]: Abstraction has 15768 states and 46639 transitions. [2019-12-07 11:56:36,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:56:36,051 INFO L276 IsEmpty]: Start isEmpty. Operand 15768 states and 46639 transitions. [2019-12-07 11:56:36,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:56:36,065 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:36,065 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:36,065 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:36,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:36,066 INFO L82 PathProgramCache]: Analyzing trace with hash 461520025, now seen corresponding path program 4 times [2019-12-07 11:56:36,066 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:36,066 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [971534567] [2019-12-07 11:56:36,066 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:36,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:36,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:36,177 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [971534567] [2019-12-07 11:56:36,177 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:36,177 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 11:56:36,177 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2065903017] [2019-12-07 11:56:36,178 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 11:56:36,178 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:36,178 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 11:56:36,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:56:36,178 INFO L87 Difference]: Start difference. First operand 15768 states and 46639 transitions. Second operand 12 states. [2019-12-07 11:56:36,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:36,988 INFO L93 Difference]: Finished difference Result 42365 states and 125888 transitions. [2019-12-07 11:56:36,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 11:56:36,989 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 11:56:36,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:37,016 INFO L225 Difference]: With dead ends: 42365 [2019-12-07 11:56:37,016 INFO L226 Difference]: Without dead ends: 26690 [2019-12-07 11:56:37,016 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 351 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=280, Invalid=1202, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 11:56:37,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26690 states. [2019-12-07 11:56:37,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26690 to 14040. [2019-12-07 11:56:37,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14040 states. [2019-12-07 11:56:37,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14040 states to 14040 states and 41929 transitions. [2019-12-07 11:56:37,284 INFO L78 Accepts]: Start accepts. Automaton has 14040 states and 41929 transitions. Word has length 66 [2019-12-07 11:56:37,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:37,284 INFO L462 AbstractCegarLoop]: Abstraction has 14040 states and 41929 transitions. [2019-12-07 11:56:37,284 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 11:56:37,284 INFO L276 IsEmpty]: Start isEmpty. Operand 14040 states and 41929 transitions. [2019-12-07 11:56:37,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:56:37,296 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:37,296 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:37,297 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:37,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:37,297 INFO L82 PathProgramCache]: Analyzing trace with hash -663530261, now seen corresponding path program 5 times [2019-12-07 11:56:37,297 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:37,297 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1654994456] [2019-12-07 11:56:37,297 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:37,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:56:37,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:56:37,367 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 11:56:37,367 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:56:37,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [907] [907] ULTIMATE.startENTRY-->L840: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= |v_ULTIMATE.start_main_~#t879~0.offset_22| 0) (= v_~main$tmp_guard0~0_40 0) (= 0 v_~b$r_buff1_thd1~0_173) (= 0 v_~__unbuffered_p1_EAX~0_44) (= 0 v_~x~0_134) (= v_~z~0_33 0) (= 0 v_~weak$$choice0~0_14) (= |v_#NULL.offset_6| 0) (= 0 v_~b$r_buff0_thd2~0_158) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t879~0.base_30| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t879~0.base_30|) |v_ULTIMATE.start_main_~#t879~0.offset_22| 0)) |v_#memory_int_25|) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~b$read_delayed~0_7) (= v_~a~0_13 0) (= v_~b$w_buff1~0_227 0) (< 0 |v_#StackHeapBarrier_19|) (= v_~weak$$choice2~0_143 0) (= 0 v_~b$r_buff0_thd3~0_397) (= v_~b$r_buff1_thd0~0_151 0) (= 0 v_~b$r_buff1_thd3~0_304) (= 0 v_~b$r_buff0_thd1~0_258) (= v_~__unbuffered_p1_EBX~0_44 0) (= v_~__unbuffered_cnt~0_127 0) (= v_~b$read_delayed_var~0.offset_7 0) (= v_~b~0_156 0) (= v_~y~0_27 0) (= v_~main$tmp_guard1~0_28 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX~0_34) (< |v_#StackHeapBarrier_19| |v_ULTIMATE.start_main_~#t879~0.base_30|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t879~0.base_30| 4)) (= v_~b$mem_tmp~0_17 0) (= 0 v_~b$r_buff1_thd2~0_163) (= v_~b$flush_delayed~0_32 0) (= 0 v_~b$w_buff1_used~0_458) (= 0 v_~b$w_buff0_used~0_811) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t879~0.base_30|)) (= v_~b$r_buff0_thd0~0_167 0) (= 0 v_~b$w_buff0~0_363) (= 0 v_~b$read_delayed_var~0.base_7) (= (store .cse0 |v_ULTIMATE.start_main_~#t879~0.base_30| 1) |v_#valid_69|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_19|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_26|, #length=|v_#length_26|} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_397, ~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_173, ~b$read_delayed_var~0.offset=v_~b$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_64|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_38|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_38|, ~b$w_buff0_used~0=v_~b$w_buff0_used~0_811, ~a~0=v_~a~0_13, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_58|, ULTIMATE.start_main_~#t880~0.offset=|v_ULTIMATE.start_main_~#t880~0.offset_15|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_25|, ~b$w_buff0~0=v_~b$w_buff0~0_363, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_167, ~b$r_buff0_thd2~0=v_~b$r_buff0_thd2~0_158, ~b$mem_tmp~0=v_~b$mem_tmp~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~b$flush_delayed~0=v_~b$flush_delayed~0_32, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~b$read_delayed~0=v_~b$read_delayed~0_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_19|, ~b$w_buff1~0=v_~b$w_buff1~0_227, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127, ~x~0=v_~x~0_134, ~b$r_buff0_thd1~0=v_~b$r_buff0_thd1~0_258, ULTIMATE.start_main_~#t881~0.offset=|v_ULTIMATE.start_main_~#t881~0.offset_15|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_105|, ULTIMATE.start_main_~#t881~0.base=|v_ULTIMATE.start_main_~#t881~0.base_18|, ULTIMATE.start_main_~#t879~0.offset=|v_ULTIMATE.start_main_~#t879~0.offset_22|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~b$w_buff1_used~0=v_~b$w_buff1_used~0_458, ~y~0=v_~y~0_27, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_163, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_151, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_44, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_40, #NULL.base=|v_#NULL.base_6|, ~b$read_delayed_var~0.base=v_~b$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t879~0.base=|v_ULTIMATE.start_main_~#t879~0.base_30|, ~b~0=v_~b~0_156, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_~#t880~0.base=|v_ULTIMATE.start_main_~#t880~0.base_24|, ~z~0=v_~z~0_33, ~weak$$choice2~0=v_~weak$$choice2~0_143, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_304} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, ~b$r_buff1_thd1~0, ~b$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ~b$w_buff0_used~0, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t880~0.offset, ~__unbuffered_p1_EAX~0, #length, ~b$w_buff0~0, ~__unbuffered_p2_EAX~0, ~b$r_buff0_thd0~0, ~b$r_buff0_thd2~0, ~b$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~b$flush_delayed~0, ULTIMATE.start_main_#t~nondet45, ~b$read_delayed~0, ~weak$$choice0~0, ~b$w_buff1~0, ~__unbuffered_cnt~0, ~x~0, ~b$r_buff0_thd1~0, ULTIMATE.start_main_~#t881~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t881~0.base, ULTIMATE.start_main_~#t879~0.offset, ULTIMATE.start_main_#t~ite51, ~b$w_buff1_used~0, ~y~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd0~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~main$tmp_guard0~0, #NULL.base, ~b$read_delayed_var~0.base, ULTIMATE.start_main_~#t879~0.base, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t880~0.base, ~z~0, ~weak$$choice2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 11:56:37,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L840-1-->L842: Formula: (and (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t880~0.base_12| 1)) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t880~0.base_12|) 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t880~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t880~0.base_12|) |v_ULTIMATE.start_main_~#t880~0.offset_10| 1)) |v_#memory_int_17|) (not (= 0 |v_ULTIMATE.start_main_~#t880~0.base_12|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t880~0.base_12| 4) |v_#length_17|) (= 0 |v_ULTIMATE.start_main_~#t880~0.offset_10|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t880~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t880~0.offset=|v_ULTIMATE.start_main_~#t880~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t880~0.base=|v_ULTIMATE.start_main_~#t880~0.base_12|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t880~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t880~0.base, #length] because there is no mapped edge [2019-12-07 11:56:37,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L752: Formula: (and (= ~b$r_buff0_thd0~0_In-1320784495 ~b$r_buff1_thd0~0_Out-1320784495) (= ~b$r_buff0_thd1~0_Out-1320784495 1) (= ~x~0_Out-1320784495 1) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1320784495 0)) (= ~b$r_buff0_thd2~0_In-1320784495 ~b$r_buff1_thd2~0_Out-1320784495) (= ~b$r_buff1_thd3~0_Out-1320784495 ~b$r_buff0_thd3~0_In-1320784495) (= ~b$r_buff0_thd1~0_In-1320784495 ~b$r_buff1_thd1~0_Out-1320784495)) InVars {~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1320784495, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1320784495, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1320784495, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1320784495, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1320784495} OutVars{~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-1320784495, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1320784495, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1320784495, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_Out-1320784495, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_Out-1320784495, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1320784495, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_Out-1320784495, ~x~0=~x~0_Out-1320784495, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_Out-1320784495, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1320784495} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, ~b$r_buff1_thd1~0, ~b$r_buff1_thd0~0, ~b$r_buff1_thd2~0, ~x~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 11:56:37,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L778-2-->L778-5: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff1_used~0_In679204661 256))) (.cse2 (= 0 (mod ~b$r_buff1_thd2~0_In679204661 256))) (.cse1 (= |P1Thread1of1ForFork2_#t~ite10_Out679204661| |P1Thread1of1ForFork2_#t~ite9_Out679204661|))) (or (and (= ~b$w_buff1~0_In679204661 |P1Thread1of1ForFork2_#t~ite9_Out679204661|) (not .cse0) .cse1 (not .cse2)) (and (or .cse0 .cse2) (= ~b~0_In679204661 |P1Thread1of1ForFork2_#t~ite9_Out679204661|) .cse1))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In679204661, ~b~0=~b~0_In679204661, ~b$w_buff1~0=~b$w_buff1~0_In679204661, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In679204661} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out679204661|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In679204661, ~b~0=~b~0_In679204661, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out679204661|, ~b$w_buff1~0=~b$w_buff1~0_In679204661, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In679204661} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 11:56:37,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In1622819839 256) 0)) (.cse1 (= 0 (mod ~b$r_buff0_thd1~0_In1622819839 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1622819839|)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out1622819839| ~b$w_buff0_used~0_In1622819839)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1622819839, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1622819839} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1622819839, P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1622819839|, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1622819839} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 11:56:37,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L754-->L754-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff0_thd1~0_In1599446918 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In1599446918 256))) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In1599446918 256))) (.cse1 (= 0 (mod ~b$r_buff1_thd1~0_In1599446918 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1599446918|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~b$w_buff1_used~0_In1599446918 |P0Thread1of1ForFork1_#t~ite6_Out1599446918|) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1599446918, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1599446918, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In1599446918, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1599446918} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1599446918, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1599446918, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In1599446918, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1599446918, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1599446918|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 11:56:37,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In-7714752 256) 0)) (.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In-7714752 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-7714752|) (not .cse1)) (and (or .cse0 .cse1) (= ~b$w_buff0_used~0_In-7714752 |P1Thread1of1ForFork2_#t~ite11_Out-7714752|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-7714752, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-7714752} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-7714752, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-7714752, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-7714752|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 11:56:37,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L755-->L756: Formula: (let ((.cse1 (= (mod ~b$r_buff0_thd1~0_In-782376031 256) 0)) (.cse2 (= ~b$r_buff0_thd1~0_In-782376031 ~b$r_buff0_thd1~0_Out-782376031)) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In-782376031 256)))) (or (and (not .cse0) (= 0 ~b$r_buff0_thd1~0_Out-782376031) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-782376031, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-782376031} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-782376031, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-782376031, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-782376031|} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-12-07 11:56:37,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In-174615172 256))) (.cse0 (= (mod ~b$r_buff0_thd1~0_In-174615172 256) 0)) (.cse2 (= (mod ~b$w_buff1_used~0_In-174615172 256) 0)) (.cse3 (= (mod ~b$r_buff1_thd1~0_In-174615172 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out-174615172| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite8_Out-174615172| ~b$r_buff1_thd1~0_In-174615172)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-174615172, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-174615172, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-174615172, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-174615172} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-174615172, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-174615172, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-174615172, P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-174615172|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-174615172} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 11:56:37,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~b$r_buff1_thd1~0_107 |v_P0Thread1of1ForFork1_#t~ite8_46|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_87 1) v_~__unbuffered_cnt~0_86)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87} OutVars{~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_107, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_45|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86} AuxVars[] AssignedVars[~b$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:56:37,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L842-1-->L844: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t881~0.base_12|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t881~0.base_12| 1) |v_#valid_36|) (= 0 |v_ULTIMATE.start_main_~#t881~0.offset_10|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t881~0.base_12|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t881~0.base_12| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t881~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t881~0.base_12|) |v_ULTIMATE.start_main_~#t881~0.offset_10| 2)) |v_#memory_int_15|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t881~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t881~0.offset=|v_ULTIMATE.start_main_~#t881~0.offset_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_15|, #length=|v_#length_15|, ULTIMATE.start_main_~#t881~0.base=|v_ULTIMATE.start_main_~#t881~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t881~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t881~0.base] because there is no mapped edge [2019-12-07 11:56:37,377 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L809-->L809-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1176870620 256)))) (or (and (= ~b$w_buff1_used~0_In-1176870620 |P2Thread1of1ForFork0_#t~ite29_Out-1176870620|) .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out-1176870620| |P2Thread1of1ForFork0_#t~ite30_Out-1176870620|) (let ((.cse1 (= (mod ~b$r_buff0_thd3~0_In-1176870620 256) 0))) (or (and .cse1 (= 0 (mod ~b$w_buff1_used~0_In-1176870620 256))) (and .cse1 (= 0 (mod ~b$r_buff1_thd3~0_In-1176870620 256))) (= (mod ~b$w_buff0_used~0_In-1176870620 256) 0)))) (and (= |P2Thread1of1ForFork0_#t~ite29_In-1176870620| |P2Thread1of1ForFork0_#t~ite29_Out-1176870620|) (= ~b$w_buff1_used~0_In-1176870620 |P2Thread1of1ForFork0_#t~ite30_Out-1176870620|) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1176870620, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1176870620, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1176870620, ~weak$$choice2~0=~weak$$choice2~0_In-1176870620, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1176870620|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1176870620} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1176870620, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1176870620, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1176870620, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1176870620|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1176870620|, ~weak$$choice2~0=~weak$$choice2~0_In-1176870620, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1176870620} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:56:37,377 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [897] [897] L810-->L811-8: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite36_36| v_~b$r_buff1_thd3~0_279) (= v_~b$r_buff0_thd3~0_376 v_~b$r_buff0_thd3~0_375) (not (= 0 (mod v_~weak$$choice2~0_126 256))) (= |v_P2Thread1of1ForFork0_#t~ite34_29| |v_P2Thread1of1ForFork0_#t~ite34_28|) (= |v_P2Thread1of1ForFork0_#t~ite35_33| |v_P2Thread1of1ForFork0_#t~ite35_32|)) InVars {~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_376, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_33|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_29|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} OutVars{P2Thread1of1ForFork0_#t~ite36=|v_P2Thread1of1ForFork0_#t~ite36_36|, ~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_375, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_23|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_32|, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_32|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_28|, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_25|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite36, ~b$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, P2Thread1of1ForFork0_#t~ite35, P2Thread1of1ForFork0_#t~ite34, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:56:37,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L813-->L817: Formula: (and (= v_~b$flush_delayed~0_6 0) (not (= (mod v_~b$flush_delayed~0_7 256) 0)) (= v_~b~0_16 v_~b$mem_tmp~0_4)) InVars {~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b$flush_delayed~0=v_~b$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b~0=v_~b~0_16, ~b$flush_delayed~0=v_~b$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~b~0, ~b$flush_delayed~0] because there is no mapped edge [2019-12-07 11:56:37,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L817-2-->L817-5: Formula: (let ((.cse2 (= (mod ~b$r_buff1_thd3~0_In-478784908 256) 0)) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In-478784908 256))) (.cse1 (= |P2Thread1of1ForFork0_#t~ite39_Out-478784908| |P2Thread1of1ForFork0_#t~ite38_Out-478784908|))) (or (and (not .cse0) (= ~b$w_buff1~0_In-478784908 |P2Thread1of1ForFork0_#t~ite38_Out-478784908|) .cse1 (not .cse2)) (and (or .cse2 .cse0) .cse1 (= ~b~0_In-478784908 |P2Thread1of1ForFork0_#t~ite38_Out-478784908|)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-478784908, ~b~0=~b~0_In-478784908, ~b$w_buff1~0=~b$w_buff1~0_In-478784908, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-478784908} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-478784908|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-478784908|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-478784908, ~b~0=~b~0_In-478784908, ~b$w_buff1~0=~b$w_buff1~0_In-478784908, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-478784908} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 11:56:37,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In426257613 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd3~0_In426257613 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out426257613| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out426257613| ~b$w_buff0_used~0_In426257613)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In426257613, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In426257613} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In426257613, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In426257613, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out426257613|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 11:56:37,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L819-->L819-2: Formula: (let ((.cse2 (= (mod ~b$w_buff1_used~0_In1401693918 256) 0)) (.cse3 (= (mod ~b$r_buff1_thd3~0_In1401693918 256) 0)) (.cse1 (= 0 (mod ~b$r_buff0_thd3~0_In1401693918 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In1401693918 256)))) (or (and (= ~b$w_buff1_used~0_In1401693918 |P2Thread1of1ForFork0_#t~ite41_Out1401693918|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1401693918|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1401693918, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1401693918, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1401693918, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1401693918} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1401693918, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1401693918, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1401693918, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1401693918|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1401693918} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 11:56:37,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L820-->L820-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In-1933865829 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In-1933865829 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1933865829| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1933865829| ~b$r_buff0_thd3~0_In-1933865829) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1933865829, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1933865829} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1933865829, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1933865829, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1933865829|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 11:56:37,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L821-->L821-2: Formula: (let ((.cse2 (= 0 (mod ~b$r_buff1_thd3~0_In262755449 256))) (.cse3 (= (mod ~b$w_buff1_used~0_In262755449 256) 0)) (.cse1 (= (mod ~b$w_buff0_used~0_In262755449 256) 0)) (.cse0 (= (mod ~b$r_buff0_thd3~0_In262755449 256) 0))) (or (and (= ~b$r_buff1_thd3~0_In262755449 |P2Thread1of1ForFork0_#t~ite43_Out262755449|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out262755449|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In262755449, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In262755449, ~b$w_buff1_used~0=~b$w_buff1_used~0_In262755449, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In262755449} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In262755449, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In262755449, P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out262755449|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In262755449, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In262755449} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 11:56:37,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L821-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite43_34| v_~b$r_buff1_thd3~0_101)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_101, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~__unbuffered_cnt~0, ~b$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 11:56:37,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~b$w_buff1_used~0_In-550721285 256) 0)) (.cse3 (= (mod ~b$r_buff1_thd2~0_In-550721285 256) 0)) (.cse1 (= 0 (mod ~b$w_buff0_used~0_In-550721285 256))) (.cse0 (= (mod ~b$r_buff0_thd2~0_In-550721285 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-550721285| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~b$w_buff1_used~0_In-550721285 |P1Thread1of1ForFork2_#t~ite12_Out-550721285|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-550721285, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-550721285, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-550721285, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-550721285} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-550721285, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-550721285, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-550721285, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-550721285|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-550721285} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 11:56:37,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In1162988879 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In1162988879 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1162988879|) (not .cse1)) (and (or .cse1 .cse0) (= ~b$r_buff0_thd2~0_In1162988879 |P1Thread1of1ForFork2_#t~ite13_Out1162988879|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1162988879, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1162988879} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1162988879, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1162988879, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1162988879|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 11:56:37,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L782-->L782-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff0_thd2~0_In1777596281 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In1777596281 256))) (.cse1 (= 0 (mod ~b$w_buff1_used~0_In1777596281 256))) (.cse0 (= 0 (mod ~b$r_buff1_thd2~0_In1777596281 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite14_Out1777596281| ~b$r_buff1_thd2~0_In1777596281) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out1777596281| 0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1777596281, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1777596281, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1777596281, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In1777596281} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1777596281, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1777596281, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1777596281, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1777596281|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In1777596281} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:56:37,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~b$r_buff1_thd2~0_91 |v_P1Thread1of1ForFork2_#t~ite14_50|) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_50|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_49|, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_91, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, ~b$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 11:56:37,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L848-->L850-2: Formula: (and (or (= 0 (mod v_~b$w_buff0_used~0_159 256)) (= 0 (mod v_~b$r_buff0_thd0~0_23 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} OutVars{~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:56:37,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L850-2-->L850-4: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd0~0_In1379683829 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In1379683829 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out1379683829| ~b~0_In1379683829) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1379683829| ~b$w_buff1~0_In1379683829) (not .cse0)))) InVars {~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In1379683829, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1379683829, ~b~0=~b~0_In1379683829, ~b$w_buff1~0=~b$w_buff1~0_In1379683829} OutVars{~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In1379683829, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1379683829, ~b~0=~b~0_In1379683829, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1379683829|, ~b$w_buff1~0=~b$w_buff1~0_In1379683829} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 11:56:37,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L850-4-->L851: Formula: (= v_~b~0_28 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{~b~0=v_~b~0_28, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|} AuxVars[] AssignedVars[~b~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:56:37,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L851-->L851-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In-503054881 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd0~0_In-503054881 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-503054881|) (not .cse1)) (and (or .cse1 .cse0) (= ~b$w_buff0_used~0_In-503054881 |ULTIMATE.start_main_#t~ite49_Out-503054881|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-503054881, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-503054881} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-503054881, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-503054881|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-503054881} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:56:37,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L852-->L852-2: Formula: (let ((.cse2 (= (mod ~b$w_buff0_used~0_In544716352 256) 0)) (.cse3 (= 0 (mod ~b$r_buff0_thd0~0_In544716352 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In544716352 256) 0)) (.cse1 (= (mod ~b$r_buff1_thd0~0_In544716352 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out544716352| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite50_Out544716352| ~b$w_buff1_used~0_In544716352) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In544716352, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In544716352, ~b$w_buff1_used~0=~b$w_buff1_used~0_In544716352, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In544716352} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out544716352|, ~b$w_buff0_used~0=~b$w_buff0_used~0_In544716352, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In544716352, ~b$w_buff1_used~0=~b$w_buff1_used~0_In544716352, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In544716352} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:56:37,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L853-->L853-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In76164877 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd0~0_In76164877 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out76164877| 0)) (and (or .cse0 .cse1) (= ~b$r_buff0_thd0~0_In76164877 |ULTIMATE.start_main_#t~ite51_Out76164877|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In76164877, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In76164877} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In76164877, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out76164877|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In76164877} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:56:37,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L854-->L854-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff0_thd0~0_In-2119238586 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In-2119238586 256))) (.cse1 (= (mod ~b$r_buff1_thd0~0_In-2119238586 256) 0)) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In-2119238586 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-2119238586| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite52_Out-2119238586| ~b$r_buff1_thd0~0_In-2119238586) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2119238586, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-2119238586, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2119238586, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-2119238586} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2119238586, ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-2119238586|, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-2119238586, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2119238586, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-2119238586} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:56:37,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] L854-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 1 v_~__unbuffered_p1_EAX~0_30) (= v_~__unbuffered_p2_EBX~0_21 0) (= v_~x~0_96 2) (= v_~__unbuffered_p1_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~b$r_buff1_thd0~0_116 |v_ULTIMATE.start_main_#t~ite52_39|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_116, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~b$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:56:37,438 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:56:37 BasicIcfg [2019-12-07 11:56:37,438 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:56:37,438 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:56:37,438 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:56:37,438 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:56:37,439 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:53:04" (3/4) ... [2019-12-07 11:56:37,440 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:56:37,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [907] [907] ULTIMATE.startENTRY-->L840: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= |v_ULTIMATE.start_main_~#t879~0.offset_22| 0) (= v_~main$tmp_guard0~0_40 0) (= 0 v_~b$r_buff1_thd1~0_173) (= 0 v_~__unbuffered_p1_EAX~0_44) (= 0 v_~x~0_134) (= v_~z~0_33 0) (= 0 v_~weak$$choice0~0_14) (= |v_#NULL.offset_6| 0) (= 0 v_~b$r_buff0_thd2~0_158) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t879~0.base_30| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t879~0.base_30|) |v_ULTIMATE.start_main_~#t879~0.offset_22| 0)) |v_#memory_int_25|) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~b$read_delayed~0_7) (= v_~a~0_13 0) (= v_~b$w_buff1~0_227 0) (< 0 |v_#StackHeapBarrier_19|) (= v_~weak$$choice2~0_143 0) (= 0 v_~b$r_buff0_thd3~0_397) (= v_~b$r_buff1_thd0~0_151 0) (= 0 v_~b$r_buff1_thd3~0_304) (= 0 v_~b$r_buff0_thd1~0_258) (= v_~__unbuffered_p1_EBX~0_44 0) (= v_~__unbuffered_cnt~0_127 0) (= v_~b$read_delayed_var~0.offset_7 0) (= v_~b~0_156 0) (= v_~y~0_27 0) (= v_~main$tmp_guard1~0_28 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX~0_34) (< |v_#StackHeapBarrier_19| |v_ULTIMATE.start_main_~#t879~0.base_30|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t879~0.base_30| 4)) (= v_~b$mem_tmp~0_17 0) (= 0 v_~b$r_buff1_thd2~0_163) (= v_~b$flush_delayed~0_32 0) (= 0 v_~b$w_buff1_used~0_458) (= 0 v_~b$w_buff0_used~0_811) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t879~0.base_30|)) (= v_~b$r_buff0_thd0~0_167 0) (= 0 v_~b$w_buff0~0_363) (= 0 v_~b$read_delayed_var~0.base_7) (= (store .cse0 |v_ULTIMATE.start_main_~#t879~0.base_30| 1) |v_#valid_69|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_19|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_26|, #length=|v_#length_26|} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_397, ~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_173, ~b$read_delayed_var~0.offset=v_~b$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_64|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_38|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_38|, ~b$w_buff0_used~0=v_~b$w_buff0_used~0_811, ~a~0=v_~a~0_13, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_58|, ULTIMATE.start_main_~#t880~0.offset=|v_ULTIMATE.start_main_~#t880~0.offset_15|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_25|, ~b$w_buff0~0=v_~b$w_buff0~0_363, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_167, ~b$r_buff0_thd2~0=v_~b$r_buff0_thd2~0_158, ~b$mem_tmp~0=v_~b$mem_tmp~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~b$flush_delayed~0=v_~b$flush_delayed~0_32, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~b$read_delayed~0=v_~b$read_delayed~0_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_19|, ~b$w_buff1~0=v_~b$w_buff1~0_227, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127, ~x~0=v_~x~0_134, ~b$r_buff0_thd1~0=v_~b$r_buff0_thd1~0_258, ULTIMATE.start_main_~#t881~0.offset=|v_ULTIMATE.start_main_~#t881~0.offset_15|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_105|, ULTIMATE.start_main_~#t881~0.base=|v_ULTIMATE.start_main_~#t881~0.base_18|, ULTIMATE.start_main_~#t879~0.offset=|v_ULTIMATE.start_main_~#t879~0.offset_22|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~b$w_buff1_used~0=v_~b$w_buff1_used~0_458, ~y~0=v_~y~0_27, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_163, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_151, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_44, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_40, #NULL.base=|v_#NULL.base_6|, ~b$read_delayed_var~0.base=v_~b$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t879~0.base=|v_ULTIMATE.start_main_~#t879~0.base_30|, ~b~0=v_~b~0_156, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_~#t880~0.base=|v_ULTIMATE.start_main_~#t880~0.base_24|, ~z~0=v_~z~0_33, ~weak$$choice2~0=v_~weak$$choice2~0_143, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_304} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, ~b$r_buff1_thd1~0, ~b$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ~b$w_buff0_used~0, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t880~0.offset, ~__unbuffered_p1_EAX~0, #length, ~b$w_buff0~0, ~__unbuffered_p2_EAX~0, ~b$r_buff0_thd0~0, ~b$r_buff0_thd2~0, ~b$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~b$flush_delayed~0, ULTIMATE.start_main_#t~nondet45, ~b$read_delayed~0, ~weak$$choice0~0, ~b$w_buff1~0, ~__unbuffered_cnt~0, ~x~0, ~b$r_buff0_thd1~0, ULTIMATE.start_main_~#t881~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t881~0.base, ULTIMATE.start_main_~#t879~0.offset, ULTIMATE.start_main_#t~ite51, ~b$w_buff1_used~0, ~y~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd0~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~main$tmp_guard0~0, #NULL.base, ~b$read_delayed_var~0.base, ULTIMATE.start_main_~#t879~0.base, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t880~0.base, ~z~0, ~weak$$choice2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 11:56:37,441 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L840-1-->L842: Formula: (and (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t880~0.base_12| 1)) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t880~0.base_12|) 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t880~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t880~0.base_12|) |v_ULTIMATE.start_main_~#t880~0.offset_10| 1)) |v_#memory_int_17|) (not (= 0 |v_ULTIMATE.start_main_~#t880~0.base_12|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t880~0.base_12| 4) |v_#length_17|) (= 0 |v_ULTIMATE.start_main_~#t880~0.offset_10|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t880~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t880~0.offset=|v_ULTIMATE.start_main_~#t880~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t880~0.base=|v_ULTIMATE.start_main_~#t880~0.base_12|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t880~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t880~0.base, #length] because there is no mapped edge [2019-12-07 11:56:37,441 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L752: Formula: (and (= ~b$r_buff0_thd0~0_In-1320784495 ~b$r_buff1_thd0~0_Out-1320784495) (= ~b$r_buff0_thd1~0_Out-1320784495 1) (= ~x~0_Out-1320784495 1) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1320784495 0)) (= ~b$r_buff0_thd2~0_In-1320784495 ~b$r_buff1_thd2~0_Out-1320784495) (= ~b$r_buff1_thd3~0_Out-1320784495 ~b$r_buff0_thd3~0_In-1320784495) (= ~b$r_buff0_thd1~0_In-1320784495 ~b$r_buff1_thd1~0_Out-1320784495)) InVars {~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1320784495, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1320784495, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1320784495, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1320784495, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1320784495} OutVars{~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-1320784495, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1320784495, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1320784495, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_Out-1320784495, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_Out-1320784495, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1320784495, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_Out-1320784495, ~x~0=~x~0_Out-1320784495, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_Out-1320784495, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1320784495} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, ~b$r_buff1_thd1~0, ~b$r_buff1_thd0~0, ~b$r_buff1_thd2~0, ~x~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 11:56:37,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L778-2-->L778-5: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff1_used~0_In679204661 256))) (.cse2 (= 0 (mod ~b$r_buff1_thd2~0_In679204661 256))) (.cse1 (= |P1Thread1of1ForFork2_#t~ite10_Out679204661| |P1Thread1of1ForFork2_#t~ite9_Out679204661|))) (or (and (= ~b$w_buff1~0_In679204661 |P1Thread1of1ForFork2_#t~ite9_Out679204661|) (not .cse0) .cse1 (not .cse2)) (and (or .cse0 .cse2) (= ~b~0_In679204661 |P1Thread1of1ForFork2_#t~ite9_Out679204661|) .cse1))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In679204661, ~b~0=~b~0_In679204661, ~b$w_buff1~0=~b$w_buff1~0_In679204661, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In679204661} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out679204661|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In679204661, ~b~0=~b~0_In679204661, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out679204661|, ~b$w_buff1~0=~b$w_buff1~0_In679204661, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In679204661} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 11:56:37,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In1622819839 256) 0)) (.cse1 (= 0 (mod ~b$r_buff0_thd1~0_In1622819839 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1622819839|)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out1622819839| ~b$w_buff0_used~0_In1622819839)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1622819839, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1622819839} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1622819839, P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1622819839|, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1622819839} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 11:56:37,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L754-->L754-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff0_thd1~0_In1599446918 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In1599446918 256))) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In1599446918 256))) (.cse1 (= 0 (mod ~b$r_buff1_thd1~0_In1599446918 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1599446918|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~b$w_buff1_used~0_In1599446918 |P0Thread1of1ForFork1_#t~ite6_Out1599446918|) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1599446918, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1599446918, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In1599446918, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1599446918} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1599446918, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1599446918, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In1599446918, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1599446918, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1599446918|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 11:56:37,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In-7714752 256) 0)) (.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In-7714752 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-7714752|) (not .cse1)) (and (or .cse0 .cse1) (= ~b$w_buff0_used~0_In-7714752 |P1Thread1of1ForFork2_#t~ite11_Out-7714752|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-7714752, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-7714752} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-7714752, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-7714752, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-7714752|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 11:56:37,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L755-->L756: Formula: (let ((.cse1 (= (mod ~b$r_buff0_thd1~0_In-782376031 256) 0)) (.cse2 (= ~b$r_buff0_thd1~0_In-782376031 ~b$r_buff0_thd1~0_Out-782376031)) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In-782376031 256)))) (or (and (not .cse0) (= 0 ~b$r_buff0_thd1~0_Out-782376031) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-782376031, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-782376031} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-782376031, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-782376031, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-782376031|} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-12-07 11:56:37,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In-174615172 256))) (.cse0 (= (mod ~b$r_buff0_thd1~0_In-174615172 256) 0)) (.cse2 (= (mod ~b$w_buff1_used~0_In-174615172 256) 0)) (.cse3 (= (mod ~b$r_buff1_thd1~0_In-174615172 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out-174615172| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite8_Out-174615172| ~b$r_buff1_thd1~0_In-174615172)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-174615172, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-174615172, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-174615172, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-174615172} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-174615172, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-174615172, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-174615172, P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-174615172|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-174615172} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 11:56:37,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~b$r_buff1_thd1~0_107 |v_P0Thread1of1ForFork1_#t~ite8_46|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_87 1) v_~__unbuffered_cnt~0_86)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87} OutVars{~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_107, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_45|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86} AuxVars[] AssignedVars[~b$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:56:37,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L842-1-->L844: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t881~0.base_12|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t881~0.base_12| 1) |v_#valid_36|) (= 0 |v_ULTIMATE.start_main_~#t881~0.offset_10|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t881~0.base_12|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t881~0.base_12| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t881~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t881~0.base_12|) |v_ULTIMATE.start_main_~#t881~0.offset_10| 2)) |v_#memory_int_15|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t881~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t881~0.offset=|v_ULTIMATE.start_main_~#t881~0.offset_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_15|, #length=|v_#length_15|, ULTIMATE.start_main_~#t881~0.base=|v_ULTIMATE.start_main_~#t881~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t881~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t881~0.base] because there is no mapped edge [2019-12-07 11:56:37,447 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L809-->L809-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1176870620 256)))) (or (and (= ~b$w_buff1_used~0_In-1176870620 |P2Thread1of1ForFork0_#t~ite29_Out-1176870620|) .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out-1176870620| |P2Thread1of1ForFork0_#t~ite30_Out-1176870620|) (let ((.cse1 (= (mod ~b$r_buff0_thd3~0_In-1176870620 256) 0))) (or (and .cse1 (= 0 (mod ~b$w_buff1_used~0_In-1176870620 256))) (and .cse1 (= 0 (mod ~b$r_buff1_thd3~0_In-1176870620 256))) (= (mod ~b$w_buff0_used~0_In-1176870620 256) 0)))) (and (= |P2Thread1of1ForFork0_#t~ite29_In-1176870620| |P2Thread1of1ForFork0_#t~ite29_Out-1176870620|) (= ~b$w_buff1_used~0_In-1176870620 |P2Thread1of1ForFork0_#t~ite30_Out-1176870620|) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1176870620, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1176870620, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1176870620, ~weak$$choice2~0=~weak$$choice2~0_In-1176870620, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1176870620|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1176870620} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1176870620, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1176870620, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1176870620, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1176870620|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1176870620|, ~weak$$choice2~0=~weak$$choice2~0_In-1176870620, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1176870620} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:56:37,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [897] [897] L810-->L811-8: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite36_36| v_~b$r_buff1_thd3~0_279) (= v_~b$r_buff0_thd3~0_376 v_~b$r_buff0_thd3~0_375) (not (= 0 (mod v_~weak$$choice2~0_126 256))) (= |v_P2Thread1of1ForFork0_#t~ite34_29| |v_P2Thread1of1ForFork0_#t~ite34_28|) (= |v_P2Thread1of1ForFork0_#t~ite35_33| |v_P2Thread1of1ForFork0_#t~ite35_32|)) InVars {~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_376, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_33|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_29|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} OutVars{P2Thread1of1ForFork0_#t~ite36=|v_P2Thread1of1ForFork0_#t~ite36_36|, ~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_375, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_23|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_32|, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_32|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_28|, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_25|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite36, ~b$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, P2Thread1of1ForFork0_#t~ite35, P2Thread1of1ForFork0_#t~ite34, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:56:37,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L813-->L817: Formula: (and (= v_~b$flush_delayed~0_6 0) (not (= (mod v_~b$flush_delayed~0_7 256) 0)) (= v_~b~0_16 v_~b$mem_tmp~0_4)) InVars {~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b$flush_delayed~0=v_~b$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b~0=v_~b~0_16, ~b$flush_delayed~0=v_~b$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~b~0, ~b$flush_delayed~0] because there is no mapped edge [2019-12-07 11:56:37,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L817-2-->L817-5: Formula: (let ((.cse2 (= (mod ~b$r_buff1_thd3~0_In-478784908 256) 0)) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In-478784908 256))) (.cse1 (= |P2Thread1of1ForFork0_#t~ite39_Out-478784908| |P2Thread1of1ForFork0_#t~ite38_Out-478784908|))) (or (and (not .cse0) (= ~b$w_buff1~0_In-478784908 |P2Thread1of1ForFork0_#t~ite38_Out-478784908|) .cse1 (not .cse2)) (and (or .cse2 .cse0) .cse1 (= ~b~0_In-478784908 |P2Thread1of1ForFork0_#t~ite38_Out-478784908|)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-478784908, ~b~0=~b~0_In-478784908, ~b$w_buff1~0=~b$w_buff1~0_In-478784908, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-478784908} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-478784908|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-478784908|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-478784908, ~b~0=~b~0_In-478784908, ~b$w_buff1~0=~b$w_buff1~0_In-478784908, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-478784908} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 11:56:37,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In426257613 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd3~0_In426257613 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out426257613| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out426257613| ~b$w_buff0_used~0_In426257613)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In426257613, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In426257613} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In426257613, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In426257613, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out426257613|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 11:56:37,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L819-->L819-2: Formula: (let ((.cse2 (= (mod ~b$w_buff1_used~0_In1401693918 256) 0)) (.cse3 (= (mod ~b$r_buff1_thd3~0_In1401693918 256) 0)) (.cse1 (= 0 (mod ~b$r_buff0_thd3~0_In1401693918 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In1401693918 256)))) (or (and (= ~b$w_buff1_used~0_In1401693918 |P2Thread1of1ForFork0_#t~ite41_Out1401693918|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1401693918|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1401693918, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1401693918, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1401693918, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1401693918} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1401693918, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1401693918, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1401693918, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1401693918|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In1401693918} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 11:56:37,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L820-->L820-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In-1933865829 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In-1933865829 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1933865829| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1933865829| ~b$r_buff0_thd3~0_In-1933865829) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1933865829, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1933865829} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1933865829, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1933865829, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1933865829|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 11:56:37,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L821-->L821-2: Formula: (let ((.cse2 (= 0 (mod ~b$r_buff1_thd3~0_In262755449 256))) (.cse3 (= (mod ~b$w_buff1_used~0_In262755449 256) 0)) (.cse1 (= (mod ~b$w_buff0_used~0_In262755449 256) 0)) (.cse0 (= (mod ~b$r_buff0_thd3~0_In262755449 256) 0))) (or (and (= ~b$r_buff1_thd3~0_In262755449 |P2Thread1of1ForFork0_#t~ite43_Out262755449|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out262755449|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In262755449, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In262755449, ~b$w_buff1_used~0=~b$w_buff1_used~0_In262755449, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In262755449} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In262755449, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In262755449, P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out262755449|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In262755449, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In262755449} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 11:56:37,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L821-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite43_34| v_~b$r_buff1_thd3~0_101)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_101, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~__unbuffered_cnt~0, ~b$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 11:56:37,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~b$w_buff1_used~0_In-550721285 256) 0)) (.cse3 (= (mod ~b$r_buff1_thd2~0_In-550721285 256) 0)) (.cse1 (= 0 (mod ~b$w_buff0_used~0_In-550721285 256))) (.cse0 (= (mod ~b$r_buff0_thd2~0_In-550721285 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-550721285| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~b$w_buff1_used~0_In-550721285 |P1Thread1of1ForFork2_#t~ite12_Out-550721285|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-550721285, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-550721285, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-550721285, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-550721285} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-550721285, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-550721285, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-550721285, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-550721285|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-550721285} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 11:56:37,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In1162988879 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In1162988879 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1162988879|) (not .cse1)) (and (or .cse1 .cse0) (= ~b$r_buff0_thd2~0_In1162988879 |P1Thread1of1ForFork2_#t~ite13_Out1162988879|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1162988879, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1162988879} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1162988879, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1162988879, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1162988879|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 11:56:37,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L782-->L782-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff0_thd2~0_In1777596281 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In1777596281 256))) (.cse1 (= 0 (mod ~b$w_buff1_used~0_In1777596281 256))) (.cse0 (= 0 (mod ~b$r_buff1_thd2~0_In1777596281 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite14_Out1777596281| ~b$r_buff1_thd2~0_In1777596281) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out1777596281| 0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1777596281, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1777596281, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1777596281, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In1777596281} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1777596281, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1777596281, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1777596281, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1777596281|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In1777596281} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:56:37,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~b$r_buff1_thd2~0_91 |v_P1Thread1of1ForFork2_#t~ite14_50|) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_50|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_49|, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_91, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, ~b$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 11:56:37,452 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L848-->L850-2: Formula: (and (or (= 0 (mod v_~b$w_buff0_used~0_159 256)) (= 0 (mod v_~b$r_buff0_thd0~0_23 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} OutVars{~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:56:37,452 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L850-2-->L850-4: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd0~0_In1379683829 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In1379683829 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out1379683829| ~b~0_In1379683829) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1379683829| ~b$w_buff1~0_In1379683829) (not .cse0)))) InVars {~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In1379683829, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1379683829, ~b~0=~b~0_In1379683829, ~b$w_buff1~0=~b$w_buff1~0_In1379683829} OutVars{~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In1379683829, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1379683829, ~b~0=~b~0_In1379683829, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1379683829|, ~b$w_buff1~0=~b$w_buff1~0_In1379683829} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 11:56:37,452 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L850-4-->L851: Formula: (= v_~b~0_28 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{~b~0=v_~b~0_28, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|} AuxVars[] AssignedVars[~b~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:56:37,452 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L851-->L851-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In-503054881 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd0~0_In-503054881 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-503054881|) (not .cse1)) (and (or .cse1 .cse0) (= ~b$w_buff0_used~0_In-503054881 |ULTIMATE.start_main_#t~ite49_Out-503054881|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-503054881, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-503054881} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-503054881, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-503054881|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-503054881} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:56:37,452 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L852-->L852-2: Formula: (let ((.cse2 (= (mod ~b$w_buff0_used~0_In544716352 256) 0)) (.cse3 (= 0 (mod ~b$r_buff0_thd0~0_In544716352 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In544716352 256) 0)) (.cse1 (= (mod ~b$r_buff1_thd0~0_In544716352 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out544716352| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite50_Out544716352| ~b$w_buff1_used~0_In544716352) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In544716352, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In544716352, ~b$w_buff1_used~0=~b$w_buff1_used~0_In544716352, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In544716352} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out544716352|, ~b$w_buff0_used~0=~b$w_buff0_used~0_In544716352, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In544716352, ~b$w_buff1_used~0=~b$w_buff1_used~0_In544716352, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In544716352} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:56:37,453 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L853-->L853-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In76164877 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd0~0_In76164877 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out76164877| 0)) (and (or .cse0 .cse1) (= ~b$r_buff0_thd0~0_In76164877 |ULTIMATE.start_main_#t~ite51_Out76164877|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In76164877, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In76164877} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In76164877, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out76164877|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In76164877} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:56:37,453 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L854-->L854-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff0_thd0~0_In-2119238586 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In-2119238586 256))) (.cse1 (= (mod ~b$r_buff1_thd0~0_In-2119238586 256) 0)) (.cse0 (= 0 (mod ~b$w_buff1_used~0_In-2119238586 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-2119238586| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite52_Out-2119238586| ~b$r_buff1_thd0~0_In-2119238586) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2119238586, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-2119238586, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2119238586, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-2119238586} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2119238586, ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-2119238586|, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-2119238586, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2119238586, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-2119238586} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:56:37,453 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] L854-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 1 v_~__unbuffered_p1_EAX~0_30) (= v_~__unbuffered_p2_EBX~0_21 0) (= v_~x~0_96 2) (= v_~__unbuffered_p1_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~b$r_buff1_thd0~0_116 |v_ULTIMATE.start_main_#t~ite52_39|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_116, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~b$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:56:37,511 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_e18aa30c-9080-4ae2-be7d-e589e2596a5c/bin/uautomizer/witness.graphml [2019-12-07 11:56:37,511 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:56:37,512 INFO L168 Benchmark]: Toolchain (without parser) took 213845.97 ms. Allocated memory was 1.0 GB in the beginning and 8.9 GB in the end (delta: 7.9 GB). Free memory was 934.5 MB in the beginning and 4.6 GB in the end (delta: -3.7 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 11:56:37,512 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 956.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:56:37,513 INFO L168 Benchmark]: CACSL2BoogieTranslator took 385.70 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 934.5 MB in the beginning and 1.1 GB in the end (delta: -125.9 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 11:56:37,513 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.05 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:56:37,513 INFO L168 Benchmark]: Boogie Preprocessor took 33.60 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.1 MB). Peak memory consumption was 1.1 MB. Max. memory is 11.5 GB. [2019-12-07 11:56:37,513 INFO L168 Benchmark]: RCFGBuilder took 406.34 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 998.7 MB in the end (delta: 60.5 MB). Peak memory consumption was 60.5 MB. Max. memory is 11.5 GB. [2019-12-07 11:56:37,514 INFO L168 Benchmark]: TraceAbstraction took 212903.83 ms. Allocated memory was 1.1 GB in the beginning and 8.9 GB in the end (delta: 7.8 GB). Free memory was 998.7 MB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 11:56:37,514 INFO L168 Benchmark]: Witness Printer took 73.07 ms. Allocated memory is still 8.9 GB. Free memory was 4.6 GB in the beginning and 4.6 GB in the end (delta: 47.8 MB). Peak memory consumption was 47.8 MB. Max. memory is 11.5 GB. [2019-12-07 11:56:37,515 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 956.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 385.70 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 934.5 MB in the beginning and 1.1 GB in the end (delta: -125.9 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.05 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 33.60 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.1 MB). Peak memory consumption was 1.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 406.34 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 998.7 MB in the end (delta: 60.5 MB). Peak memory consumption was 60.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 212903.83 ms. Allocated memory was 1.1 GB in the beginning and 8.9 GB in the end (delta: 7.8 GB). Free memory was 998.7 MB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. * Witness Printer took 73.07 ms. Allocated memory is still 8.9 GB. Free memory was 4.6 GB in the beginning and 4.6 GB in the end (delta: 47.8 MB). Peak memory consumption was 47.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 179 ProgramPointsBefore, 93 ProgramPointsAfterwards, 216 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 36 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 32 ChoiceCompositions, 7364 VarBasedMoverChecksPositive, 244 VarBasedMoverChecksNegative, 47 SemBasedMoverChecksPositive, 271 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 80691 CheckedPairsTotal, 120 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L840] FCALL, FORK 0 pthread_create(&t879, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L842] FCALL, FORK 0 pthread_create(&t880, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L737] 1 b$w_buff1 = b$w_buff0 [L738] 1 b$w_buff0 = 1 [L739] 1 b$w_buff1_used = b$w_buff0_used [L740] 1 b$w_buff0_used = (_Bool)1 [L752] EXPR 1 b$w_buff0_used && b$r_buff0_thd1 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd1 ? b$w_buff1 : b) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L766] 2 x = 2 [L769] 2 y = 1 [L772] 2 __unbuffered_p1_EAX = y [L775] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L778] EXPR 2 b$w_buff0_used && b$r_buff0_thd2 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd2 ? b$w_buff1 : b) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L752] 1 b = b$w_buff0_used && b$r_buff0_thd1 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd1 ? b$w_buff1 : b) [L778] 2 b = b$w_buff0_used && b$r_buff0_thd2 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd2 ? b$w_buff1 : b) [L753] 1 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd1 ? (_Bool)0 : b$w_buff0_used [L754] 1 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd1 || b$w_buff1_used && b$r_buff1_thd1 ? (_Bool)0 : b$w_buff1_used [L844] FCALL, FORK 0 pthread_create(&t881, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L792] 3 z = 1 [L795] 3 a = 1 [L798] 3 __unbuffered_p2_EAX = a [L801] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L802] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L803] 3 b$flush_delayed = weak$$choice2 [L804] 3 b$mem_tmp = b VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L805] EXPR 3 !b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1) VAL [!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1)=0, __unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L805] 3 b = !b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1) [L806] EXPR 3 weak$$choice2 ? b$w_buff0 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? b$w_buff0 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff0))=1, x=2, y=1, z=1] [L806] 3 b$w_buff0 = weak$$choice2 ? b$w_buff0 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff0)) [L807] EXPR 3 weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1))=0, x=2, y=1, z=1] [L807] 3 b$w_buff1 = weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1)) [L808] EXPR 3 weak$$choice2 ? b$w_buff0_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? b$w_buff0_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used))=0, x=2, y=1, z=1] [L808] 3 b$w_buff0_used = weak$$choice2 ? b$w_buff0_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used)) [L809] 3 b$w_buff1_used = weak$$choice2 ? b$w_buff1_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L811] 3 b$r_buff1_thd3 = weak$$choice2 ? b$r_buff1_thd3 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$r_buff1_thd3 : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L812] 3 __unbuffered_p2_EBX = b VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L817] EXPR 3 b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd3 ? b$w_buff1 : b) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L817] 3 b = b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd3 ? b$w_buff1 : b) [L818] 3 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used [L819] 3 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd3 || b$w_buff1_used && b$r_buff1_thd3 ? (_Bool)0 : b$w_buff1_used [L820] 3 b$r_buff0_thd3 = b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$r_buff0_thd3 [L779] 2 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used [L780] 2 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd2 || b$w_buff1_used && b$r_buff1_thd2 ? (_Bool)0 : b$w_buff1_used [L781] 2 b$r_buff0_thd2 = b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$r_buff0_thd2 [L846] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L851] 0 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd0 ? (_Bool)0 : b$w_buff0_used [L852] 0 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd0 || b$w_buff1_used && b$r_buff1_thd0 ? (_Bool)0 : b$w_buff1_used [L853] 0 b$r_buff0_thd0 = b$w_buff0_used && b$r_buff0_thd0 ? (_Bool)0 : b$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 212.7s, OverallIterations: 33, TraceHistogramMax: 1, AutomataDifference: 50.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7042 SDtfs, 8418 SDslu, 20474 SDs, 0 SdLazy, 16073 SolverSat, 338 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 345 GetRequests, 42 SyntacticMatches, 23 SemanticMatches, 280 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1479 ImplicationChecksByTransitivity, 2.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=349791occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 142.9s AutomataMinimizationTime, 32 MinimizatonAttempts, 468872 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.5s InterpolantComputationTime, 1158 NumberOfCodeBlocks, 1158 NumberOfCodeBlocksAsserted, 33 NumberOfCheckSat, 1060 ConstructedInterpolants, 0 QuantifiedInterpolants, 215742 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 32 InterpolantComputations, 32 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...