./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix033_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix033_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5093385750896416ecdf6421cc1c512c4b228c3e ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:17:09,430 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:17:09,431 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:17:09,439 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:17:09,439 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:17:09,440 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:17:09,441 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:17:09,442 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:17:09,443 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:17:09,444 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:17:09,445 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:17:09,445 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:17:09,446 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:17:09,446 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:17:09,447 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:17:09,448 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:17:09,448 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:17:09,449 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:17:09,450 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:17:09,452 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:17:09,453 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:17:09,453 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:17:09,454 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:17:09,454 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:17:09,456 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:17:09,456 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:17:09,456 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:17:09,457 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:17:09,457 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:17:09,458 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:17:09,458 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:17:09,458 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:17:09,459 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:17:09,459 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:17:09,460 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:17:09,460 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:17:09,460 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:17:09,460 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:17:09,460 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:17:09,461 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:17:09,461 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:17:09,462 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 13:17:09,471 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:17:09,472 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:17:09,472 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 13:17:09,472 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 13:17:09,473 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 13:17:09,473 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:17:09,473 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:17:09,473 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:17:09,473 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:17:09,473 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:17:09,473 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:17:09,474 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:17:09,474 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:17:09,474 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:17:09,474 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:17:09,474 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:17:09,474 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:17:09,474 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:17:09,474 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 13:17:09,475 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:17:09,475 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:17:09,475 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:17:09,475 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:17:09,475 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:17:09,475 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:17:09,475 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 13:17:09,475 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:17:09,475 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:17:09,476 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:17:09,476 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5093385750896416ecdf6421cc1c512c4b228c3e [2019-12-07 13:17:09,576 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:17:09,586 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:17:09,588 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:17:09,589 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:17:09,590 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:17:09,590 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix033_rmo.oepc.i [2019-12-07 13:17:09,627 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/data/0f9b493d8/b61b032de0374761ac560555d85c1eaa/FLAGd8c3dd114 [2019-12-07 13:17:09,996 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:17:09,996 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/sv-benchmarks/c/pthread-wmm/mix033_rmo.oepc.i [2019-12-07 13:17:10,006 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/data/0f9b493d8/b61b032de0374761ac560555d85c1eaa/FLAGd8c3dd114 [2019-12-07 13:17:10,015 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/data/0f9b493d8/b61b032de0374761ac560555d85c1eaa [2019-12-07 13:17:10,017 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:17:10,018 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:17:10,018 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:17:10,018 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:17:10,021 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:17:10,021 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:17:10" (1/1) ... [2019-12-07 13:17:10,023 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10, skipping insertion in model container [2019-12-07 13:17:10,023 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:17:10" (1/1) ... [2019-12-07 13:17:10,028 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:17:10,058 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:17:10,321 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:17:10,328 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:17:10,374 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:17:10,422 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:17:10,423 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10 WrapperNode [2019-12-07 13:17:10,423 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:17:10,423 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:17:10,424 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:17:10,424 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:17:10,430 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10" (1/1) ... [2019-12-07 13:17:10,444 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10" (1/1) ... [2019-12-07 13:17:10,464 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:17:10,464 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:17:10,464 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:17:10,464 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:17:10,471 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10" (1/1) ... [2019-12-07 13:17:10,471 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10" (1/1) ... [2019-12-07 13:17:10,475 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10" (1/1) ... [2019-12-07 13:17:10,476 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10" (1/1) ... [2019-12-07 13:17:10,483 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10" (1/1) ... [2019-12-07 13:17:10,486 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10" (1/1) ... [2019-12-07 13:17:10,489 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10" (1/1) ... [2019-12-07 13:17:10,493 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:17:10,493 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:17:10,493 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:17:10,493 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:17:10,494 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:17:10,544 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:17:10,544 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:17:10,544 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:17:10,544 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:17:10,544 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:17:10,545 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:17:10,545 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:17:10,545 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:17:10,545 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:17:10,545 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:17:10,545 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:17:10,545 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:17:10,545 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:17:10,546 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:17:10,913 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:17:10,913 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:17:10,914 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:17:10 BoogieIcfgContainer [2019-12-07 13:17:10,914 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:17:10,915 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:17:10,915 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:17:10,917 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:17:10,917 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:17:10" (1/3) ... [2019-12-07 13:17:10,918 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@8aaaa1b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:17:10, skipping insertion in model container [2019-12-07 13:17:10,918 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:17:10" (2/3) ... [2019-12-07 13:17:10,918 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@8aaaa1b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:17:10, skipping insertion in model container [2019-12-07 13:17:10,918 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:17:10" (3/3) ... [2019-12-07 13:17:10,919 INFO L109 eAbstractionObserver]: Analyzing ICFG mix033_rmo.oepc.i [2019-12-07 13:17:10,926 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:17:10,926 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:17:10,931 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:17:10,931 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:17:10,956 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,957 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,957 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,957 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,957 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,957 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,957 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,957 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,958 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,958 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,958 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,958 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,958 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,958 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,958 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,959 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,959 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,959 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,959 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,959 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,959 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,959 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,959 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,959 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,960 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,960 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,960 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,960 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,960 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,960 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,960 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,960 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,960 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,961 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,961 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,961 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,961 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,961 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,961 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,962 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,962 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,962 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,962 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,962 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,962 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,962 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,962 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,962 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,963 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,963 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,963 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,963 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,963 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,963 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,963 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,963 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,964 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,964 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,964 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,964 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,964 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,964 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,964 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,964 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,965 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,965 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,965 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,965 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,965 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,965 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,966 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,966 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,966 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,966 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,966 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,966 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,966 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,966 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,966 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,967 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,967 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,967 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,967 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,967 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,967 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,967 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,967 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,967 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,967 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,968 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,968 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,968 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,968 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,968 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,968 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,968 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,968 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,968 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,969 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,969 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,969 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,969 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,969 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,969 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,969 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,969 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,969 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,969 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:17:10,990 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 13:17:11,002 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:17:11,002 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:17:11,002 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:17:11,002 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:17:11,002 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:17:11,003 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:17:11,003 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:17:11,003 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:17:11,014 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 13:17:11,015 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 13:17:11,070 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 13:17:11,071 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:17:11,081 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 694 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:17:11,097 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 13:17:11,127 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 13:17:11,127 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:17:11,133 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 694 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:17:11,151 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 13:17:11,152 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:17:14,189 WARN L192 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 13:17:14,421 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 48 [2019-12-07 13:17:14,443 INFO L206 etLargeBlockEncoding]: Checked pairs total: 80691 [2019-12-07 13:17:14,443 INFO L214 etLargeBlockEncoding]: Total number of compositions: 120 [2019-12-07 13:17:14,445 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 13:17:27,201 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 109594 states. [2019-12-07 13:17:27,203 INFO L276 IsEmpty]: Start isEmpty. Operand 109594 states. [2019-12-07 13:17:27,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 13:17:27,207 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:17:27,207 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 13:17:27,207 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:17:27,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:17:27,211 INFO L82 PathProgramCache]: Analyzing trace with hash 925663, now seen corresponding path program 1 times [2019-12-07 13:17:27,216 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:17:27,217 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1558833704] [2019-12-07 13:17:27,217 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:17:27,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:17:27,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:17:27,352 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1558833704] [2019-12-07 13:17:27,352 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:17:27,352 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:17:27,353 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462849380] [2019-12-07 13:17:27,356 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:17:27,356 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:17:27,365 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:17:27,365 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:17:27,367 INFO L87 Difference]: Start difference. First operand 109594 states. Second operand 3 states. [2019-12-07 13:17:28,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:17:28,231 INFO L93 Difference]: Finished difference Result 108584 states and 463030 transitions. [2019-12-07 13:17:28,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:17:28,233 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 13:17:28,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:17:28,700 INFO L225 Difference]: With dead ends: 108584 [2019-12-07 13:17:28,700 INFO L226 Difference]: Without dead ends: 102344 [2019-12-07 13:17:28,701 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:17:32,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102344 states. [2019-12-07 13:17:33,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102344 to 102344. [2019-12-07 13:17:33,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102344 states. [2019-12-07 13:17:35,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102344 states to 102344 states and 435834 transitions. [2019-12-07 13:17:35,756 INFO L78 Accepts]: Start accepts. Automaton has 102344 states and 435834 transitions. Word has length 3 [2019-12-07 13:17:35,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:17:35,756 INFO L462 AbstractCegarLoop]: Abstraction has 102344 states and 435834 transitions. [2019-12-07 13:17:35,756 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:17:35,757 INFO L276 IsEmpty]: Start isEmpty. Operand 102344 states and 435834 transitions. [2019-12-07 13:17:35,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:17:35,759 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:17:35,759 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:17:35,759 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:17:35,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:17:35,759 INFO L82 PathProgramCache]: Analyzing trace with hash 295188242, now seen corresponding path program 1 times [2019-12-07 13:17:35,760 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:17:35,760 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [785572699] [2019-12-07 13:17:35,760 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:17:35,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:17:35,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:17:35,822 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [785572699] [2019-12-07 13:17:35,822 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:17:35,822 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:17:35,823 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1718326595] [2019-12-07 13:17:35,823 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:17:35,824 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:17:35,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:17:35,824 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:17:35,824 INFO L87 Difference]: Start difference. First operand 102344 states and 435834 transitions. Second operand 4 states. [2019-12-07 13:17:36,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:17:36,712 INFO L93 Difference]: Finished difference Result 162816 states and 664963 transitions. [2019-12-07 13:17:36,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:17:36,713 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:17:36,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:17:37,134 INFO L225 Difference]: With dead ends: 162816 [2019-12-07 13:17:37,134 INFO L226 Difference]: Without dead ends: 162767 [2019-12-07 13:17:37,135 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:17:41,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162767 states. [2019-12-07 13:17:43,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162767 to 148375. [2019-12-07 13:17:43,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148375 states. [2019-12-07 13:17:44,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148375 states to 148375 states and 613985 transitions. [2019-12-07 13:17:44,297 INFO L78 Accepts]: Start accepts. Automaton has 148375 states and 613985 transitions. Word has length 11 [2019-12-07 13:17:44,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:17:44,298 INFO L462 AbstractCegarLoop]: Abstraction has 148375 states and 613985 transitions. [2019-12-07 13:17:44,298 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:17:44,298 INFO L276 IsEmpty]: Start isEmpty. Operand 148375 states and 613985 transitions. [2019-12-07 13:17:44,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:17:44,304 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:17:44,304 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:17:44,304 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:17:44,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:17:44,305 INFO L82 PathProgramCache]: Analyzing trace with hash 1979345710, now seen corresponding path program 1 times [2019-12-07 13:17:44,305 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:17:44,305 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273151997] [2019-12-07 13:17:44,305 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:17:44,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:17:44,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:17:44,351 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273151997] [2019-12-07 13:17:44,351 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:17:44,351 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:17:44,351 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1763028537] [2019-12-07 13:17:44,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:17:44,352 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:17:44,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:17:44,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:17:44,352 INFO L87 Difference]: Start difference. First operand 148375 states and 613985 transitions. Second operand 4 states. [2019-12-07 13:17:45,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:17:45,444 INFO L93 Difference]: Finished difference Result 208037 states and 841937 transitions. [2019-12-07 13:17:45,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:17:45,446 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 13:17:45,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:17:45,995 INFO L225 Difference]: With dead ends: 208037 [2019-12-07 13:17:45,995 INFO L226 Difference]: Without dead ends: 207981 [2019-12-07 13:17:45,995 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:17:52,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207981 states. [2019-12-07 13:17:55,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207981 to 175449. [2019-12-07 13:17:55,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175449 states. [2019-12-07 13:17:56,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175449 states to 175449 states and 722246 transitions. [2019-12-07 13:17:56,021 INFO L78 Accepts]: Start accepts. Automaton has 175449 states and 722246 transitions. Word has length 13 [2019-12-07 13:17:56,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:17:56,022 INFO L462 AbstractCegarLoop]: Abstraction has 175449 states and 722246 transitions. [2019-12-07 13:17:56,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:17:56,022 INFO L276 IsEmpty]: Start isEmpty. Operand 175449 states and 722246 transitions. [2019-12-07 13:17:56,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:17:56,030 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:17:56,030 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:17:56,030 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:17:56,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:17:56,030 INFO L82 PathProgramCache]: Analyzing trace with hash -1850281775, now seen corresponding path program 1 times [2019-12-07 13:17:56,030 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:17:56,030 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1435909167] [2019-12-07 13:17:56,030 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:17:56,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:17:56,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:17:56,067 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1435909167] [2019-12-07 13:17:56,067 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:17:56,067 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:17:56,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [51251400] [2019-12-07 13:17:56,068 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:17:56,068 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:17:56,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:17:56,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:17:56,068 INFO L87 Difference]: Start difference. First operand 175449 states and 722246 transitions. Second operand 3 states. [2019-12-07 13:17:57,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:17:57,254 INFO L93 Difference]: Finished difference Result 259190 states and 1053818 transitions. [2019-12-07 13:17:57,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:17:57,255 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 13:17:57,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:17:57,903 INFO L225 Difference]: With dead ends: 259190 [2019-12-07 13:17:57,903 INFO L226 Difference]: Without dead ends: 259190 [2019-12-07 13:17:57,904 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:18:03,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259190 states. [2019-12-07 13:18:08,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259190 to 195219. [2019-12-07 13:18:08,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195219 states. [2019-12-07 13:18:09,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195219 states to 195219 states and 799392 transitions. [2019-12-07 13:18:09,335 INFO L78 Accepts]: Start accepts. Automaton has 195219 states and 799392 transitions. Word has length 16 [2019-12-07 13:18:09,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:18:09,336 INFO L462 AbstractCegarLoop]: Abstraction has 195219 states and 799392 transitions. [2019-12-07 13:18:09,336 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:18:09,336 INFO L276 IsEmpty]: Start isEmpty. Operand 195219 states and 799392 transitions. [2019-12-07 13:18:09,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:18:09,342 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:18:09,342 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:18:09,343 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:18:09,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:18:09,343 INFO L82 PathProgramCache]: Analyzing trace with hash -1985443542, now seen corresponding path program 1 times [2019-12-07 13:18:09,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:18:09,343 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2134380130] [2019-12-07 13:18:09,343 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:18:09,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:18:09,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:18:09,376 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2134380130] [2019-12-07 13:18:09,377 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:18:09,377 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:18:09,377 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [429739583] [2019-12-07 13:18:09,377 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:18:09,377 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:18:09,377 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:18:09,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:18:09,378 INFO L87 Difference]: Start difference. First operand 195219 states and 799392 transitions. Second operand 4 states. [2019-12-07 13:18:10,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:18:10,881 INFO L93 Difference]: Finished difference Result 227593 states and 924546 transitions. [2019-12-07 13:18:10,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:18:10,881 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 13:18:10,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:18:11,455 INFO L225 Difference]: With dead ends: 227593 [2019-12-07 13:18:11,455 INFO L226 Difference]: Without dead ends: 227593 [2019-12-07 13:18:11,456 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:18:16,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227593 states. [2019-12-07 13:18:22,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227593 to 204638. [2019-12-07 13:18:22,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204638 states. [2019-12-07 13:18:22,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204638 states to 204638 states and 837381 transitions. [2019-12-07 13:18:22,977 INFO L78 Accepts]: Start accepts. Automaton has 204638 states and 837381 transitions. Word has length 16 [2019-12-07 13:18:22,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:18:22,977 INFO L462 AbstractCegarLoop]: Abstraction has 204638 states and 837381 transitions. [2019-12-07 13:18:22,977 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:18:22,977 INFO L276 IsEmpty]: Start isEmpty. Operand 204638 states and 837381 transitions. [2019-12-07 13:18:22,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:18:22,986 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:18:22,986 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:18:22,986 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:18:22,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:18:22,987 INFO L82 PathProgramCache]: Analyzing trace with hash -32753983, now seen corresponding path program 1 times [2019-12-07 13:18:22,987 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:18:22,987 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1488395731] [2019-12-07 13:18:22,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:18:23,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:18:23,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:18:23,032 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1488395731] [2019-12-07 13:18:23,032 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:18:23,032 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:18:23,032 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1890017970] [2019-12-07 13:18:23,032 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:18:23,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:18:23,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:18:23,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:18:23,033 INFO L87 Difference]: Start difference. First operand 204638 states and 837381 transitions. Second operand 4 states. [2019-12-07 13:18:24,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:18:24,272 INFO L93 Difference]: Finished difference Result 239634 states and 974592 transitions. [2019-12-07 13:18:24,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:18:24,273 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 13:18:24,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:18:25,362 INFO L225 Difference]: With dead ends: 239634 [2019-12-07 13:18:25,362 INFO L226 Difference]: Without dead ends: 239634 [2019-12-07 13:18:25,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:18:30,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239634 states. [2019-12-07 13:18:33,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239634 to 207981. [2019-12-07 13:18:33,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207981 states. [2019-12-07 13:18:34,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207981 states to 207981 states and 851409 transitions. [2019-12-07 13:18:34,217 INFO L78 Accepts]: Start accepts. Automaton has 207981 states and 851409 transitions. Word has length 16 [2019-12-07 13:18:34,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:18:34,218 INFO L462 AbstractCegarLoop]: Abstraction has 207981 states and 851409 transitions. [2019-12-07 13:18:34,218 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:18:34,218 INFO L276 IsEmpty]: Start isEmpty. Operand 207981 states and 851409 transitions. [2019-12-07 13:18:34,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 13:18:34,231 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:18:34,231 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:18:34,231 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:18:34,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:18:34,231 INFO L82 PathProgramCache]: Analyzing trace with hash -486126770, now seen corresponding path program 1 times [2019-12-07 13:18:34,232 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:18:34,232 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1208579971] [2019-12-07 13:18:34,232 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:18:34,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:18:34,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:18:34,291 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1208579971] [2019-12-07 13:18:34,291 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:18:34,291 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:18:34,292 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [429890514] [2019-12-07 13:18:34,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:18:34,292 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:18:34,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:18:34,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:18:34,293 INFO L87 Difference]: Start difference. First operand 207981 states and 851409 transitions. Second operand 3 states. [2019-12-07 13:18:36,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:18:36,385 INFO L93 Difference]: Finished difference Result 372280 states and 1515056 transitions. [2019-12-07 13:18:36,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:18:36,386 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 13:18:36,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:18:37,233 INFO L225 Difference]: With dead ends: 372280 [2019-12-07 13:18:37,233 INFO L226 Difference]: Without dead ends: 337486 [2019-12-07 13:18:37,233 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:18:43,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337486 states. [2019-12-07 13:18:51,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337486 to 324440. [2019-12-07 13:18:51,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 324440 states. [2019-12-07 13:18:52,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324440 states to 324440 states and 1329299 transitions. [2019-12-07 13:18:52,857 INFO L78 Accepts]: Start accepts. Automaton has 324440 states and 1329299 transitions. Word has length 18 [2019-12-07 13:18:52,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:18:52,858 INFO L462 AbstractCegarLoop]: Abstraction has 324440 states and 1329299 transitions. [2019-12-07 13:18:52,858 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:18:52,858 INFO L276 IsEmpty]: Start isEmpty. Operand 324440 states and 1329299 transitions. [2019-12-07 13:18:52,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:18:52,879 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:18:52,879 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:18:52,879 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:18:52,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:18:52,879 INFO L82 PathProgramCache]: Analyzing trace with hash -1539660278, now seen corresponding path program 1 times [2019-12-07 13:18:52,879 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:18:52,879 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215654738] [2019-12-07 13:18:52,880 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:18:52,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:18:52,927 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:18:52,928 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215654738] [2019-12-07 13:18:52,928 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:18:52,928 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:18:52,928 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [631185216] [2019-12-07 13:18:52,928 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:18:52,928 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:18:52,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:18:52,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:18:52,929 INFO L87 Difference]: Start difference. First operand 324440 states and 1329299 transitions. Second operand 5 states. [2019-12-07 13:18:56,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:18:56,394 INFO L93 Difference]: Finished difference Result 458907 states and 1837584 transitions. [2019-12-07 13:18:56,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:18:56,395 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 13:18:56,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:18:57,583 INFO L225 Difference]: With dead ends: 458907 [2019-12-07 13:18:57,583 INFO L226 Difference]: Without dead ends: 458816 [2019-12-07 13:18:57,583 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:19:08,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458816 states. [2019-12-07 13:19:14,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458816 to 349791. [2019-12-07 13:19:14,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 349791 states. [2019-12-07 13:19:16,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349791 states to 349791 states and 1426231 transitions. [2019-12-07 13:19:16,083 INFO L78 Accepts]: Start accepts. Automaton has 349791 states and 1426231 transitions. Word has length 19 [2019-12-07 13:19:16,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:19:16,083 INFO L462 AbstractCegarLoop]: Abstraction has 349791 states and 1426231 transitions. [2019-12-07 13:19:16,083 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:19:16,083 INFO L276 IsEmpty]: Start isEmpty. Operand 349791 states and 1426231 transitions. [2019-12-07 13:19:16,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:19:16,108 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:19:16,108 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:19:16,108 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:19:16,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:19:16,109 INFO L82 PathProgramCache]: Analyzing trace with hash 1882855134, now seen corresponding path program 1 times [2019-12-07 13:19:16,109 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:19:16,109 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31391400] [2019-12-07 13:19:16,109 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:19:16,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:19:16,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:19:16,169 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [31391400] [2019-12-07 13:19:16,169 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:19:16,169 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:19:16,169 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1532649038] [2019-12-07 13:19:16,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:19:16,170 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:19:16,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:19:16,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:19:16,170 INFO L87 Difference]: Start difference. First operand 349791 states and 1426231 transitions. Second operand 4 states. [2019-12-07 13:19:18,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:19:18,279 INFO L93 Difference]: Finished difference Result 361795 states and 1462920 transitions. [2019-12-07 13:19:18,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:19:18,280 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 13:19:18,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:19:19,188 INFO L225 Difference]: With dead ends: 361795 [2019-12-07 13:19:19,188 INFO L226 Difference]: Without dead ends: 361795 [2019-12-07 13:19:19,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:19:29,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 361795 states. [2019-12-07 13:19:34,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 361795 to 346461. [2019-12-07 13:19:34,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 346461 states. [2019-12-07 13:19:36,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 346461 states to 346461 states and 1413505 transitions. [2019-12-07 13:19:36,094 INFO L78 Accepts]: Start accepts. Automaton has 346461 states and 1413505 transitions. Word has length 19 [2019-12-07 13:19:36,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:19:36,094 INFO L462 AbstractCegarLoop]: Abstraction has 346461 states and 1413505 transitions. [2019-12-07 13:19:36,094 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:19:36,094 INFO L276 IsEmpty]: Start isEmpty. Operand 346461 states and 1413505 transitions. [2019-12-07 13:19:36,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:19:36,119 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:19:36,120 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:19:36,120 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:19:36,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:19:36,120 INFO L82 PathProgramCache]: Analyzing trace with hash -434257907, now seen corresponding path program 1 times [2019-12-07 13:19:36,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:19:36,120 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [540785052] [2019-12-07 13:19:36,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:19:36,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:19:36,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:19:36,162 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [540785052] [2019-12-07 13:19:36,163 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:19:36,163 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:19:36,163 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2133300458] [2019-12-07 13:19:36,163 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:19:36,163 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:19:36,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:19:36,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:19:36,163 INFO L87 Difference]: Start difference. First operand 346461 states and 1413505 transitions. Second operand 4 states. [2019-12-07 13:19:38,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:19:38,285 INFO L93 Difference]: Finished difference Result 359648 states and 1454980 transitions. [2019-12-07 13:19:38,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:19:38,286 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 13:19:38,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:19:39,914 INFO L225 Difference]: With dead ends: 359648 [2019-12-07 13:19:39,914 INFO L226 Difference]: Without dead ends: 359648 [2019-12-07 13:19:39,914 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:19:46,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359648 states. [2019-12-07 13:19:52,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359648 to 335030. [2019-12-07 13:19:52,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 335030 states. [2019-12-07 13:19:53,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 335030 states to 335030 states and 1366497 transitions. [2019-12-07 13:19:53,177 INFO L78 Accepts]: Start accepts. Automaton has 335030 states and 1366497 transitions. Word has length 19 [2019-12-07 13:19:53,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:19:53,177 INFO L462 AbstractCegarLoop]: Abstraction has 335030 states and 1366497 transitions. [2019-12-07 13:19:53,177 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:19:53,177 INFO L276 IsEmpty]: Start isEmpty. Operand 335030 states and 1366497 transitions. [2019-12-07 13:19:53,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 13:19:53,207 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:19:53,207 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:19:53,207 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:19:53,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:19:53,208 INFO L82 PathProgramCache]: Analyzing trace with hash -10262915, now seen corresponding path program 1 times [2019-12-07 13:19:53,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:19:53,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905152241] [2019-12-07 13:19:53,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:19:53,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:19:53,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:19:53,234 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905152241] [2019-12-07 13:19:53,235 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:19:53,235 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:19:53,235 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1674433501] [2019-12-07 13:19:53,235 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:19:53,235 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:19:53,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:19:53,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:19:53,236 INFO L87 Difference]: Start difference. First operand 335030 states and 1366497 transitions. Second operand 3 states. [2019-12-07 13:19:57,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:19:57,364 INFO L93 Difference]: Finished difference Result 313350 states and 1264486 transitions. [2019-12-07 13:19:57,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:19:57,365 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 13:19:57,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:19:58,164 INFO L225 Difference]: With dead ends: 313350 [2019-12-07 13:19:58,164 INFO L226 Difference]: Without dead ends: 313350 [2019-12-07 13:19:58,164 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:20:03,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313350 states. [2019-12-07 13:20:08,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313350 to 310982. [2019-12-07 13:20:08,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 310982 states. [2019-12-07 13:20:08,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 310982 states to 310982 states and 1255856 transitions. [2019-12-07 13:20:08,983 INFO L78 Accepts]: Start accepts. Automaton has 310982 states and 1255856 transitions. Word has length 20 [2019-12-07 13:20:08,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:08,983 INFO L462 AbstractCegarLoop]: Abstraction has 310982 states and 1255856 transitions. [2019-12-07 13:20:08,983 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:20:08,983 INFO L276 IsEmpty]: Start isEmpty. Operand 310982 states and 1255856 transitions. [2019-12-07 13:20:09,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 13:20:09,002 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:09,003 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:09,003 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:09,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:09,003 INFO L82 PathProgramCache]: Analyzing trace with hash -1380317719, now seen corresponding path program 1 times [2019-12-07 13:20:09,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:09,003 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130814373] [2019-12-07 13:20:09,003 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:09,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:09,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:09,043 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [130814373] [2019-12-07 13:20:09,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:09,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:20:09,043 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [859258035] [2019-12-07 13:20:09,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:20:09,043 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:09,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:20:09,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:20:09,044 INFO L87 Difference]: Start difference. First operand 310982 states and 1255856 transitions. Second operand 4 states. [2019-12-07 13:20:09,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:09,818 INFO L93 Difference]: Finished difference Result 86910 states and 292872 transitions. [2019-12-07 13:20:09,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:20:09,819 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 13:20:09,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:09,926 INFO L225 Difference]: With dead ends: 86910 [2019-12-07 13:20:09,926 INFO L226 Difference]: Without dead ends: 65685 [2019-12-07 13:20:09,926 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:20:10,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65685 states. [2019-12-07 13:20:10,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65685 to 65573. [2019-12-07 13:20:10,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65573 states. [2019-12-07 13:20:10,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65573 states to 65573 states and 208360 transitions. [2019-12-07 13:20:10,918 INFO L78 Accepts]: Start accepts. Automaton has 65573 states and 208360 transitions. Word has length 20 [2019-12-07 13:20:10,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:10,918 INFO L462 AbstractCegarLoop]: Abstraction has 65573 states and 208360 transitions. [2019-12-07 13:20:10,918 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:20:10,918 INFO L276 IsEmpty]: Start isEmpty. Operand 65573 states and 208360 transitions. [2019-12-07 13:20:10,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:20:10,924 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:10,924 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:10,924 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:10,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:10,925 INFO L82 PathProgramCache]: Analyzing trace with hash 1141389468, now seen corresponding path program 1 times [2019-12-07 13:20:10,925 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:10,925 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923781622] [2019-12-07 13:20:10,925 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:10,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:10,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:10,964 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923781622] [2019-12-07 13:20:10,964 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:10,964 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:20:10,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761682415] [2019-12-07 13:20:10,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:20:10,965 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:10,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:20:10,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:20:10,965 INFO L87 Difference]: Start difference. First operand 65573 states and 208360 transitions. Second operand 5 states. [2019-12-07 13:20:11,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:11,417 INFO L93 Difference]: Finished difference Result 82355 states and 256944 transitions. [2019-12-07 13:20:11,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:20:11,418 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 13:20:11,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:11,529 INFO L225 Difference]: With dead ends: 82355 [2019-12-07 13:20:11,529 INFO L226 Difference]: Without dead ends: 82299 [2019-12-07 13:20:11,529 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:20:11,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82299 states. [2019-12-07 13:20:12,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82299 to 68425. [2019-12-07 13:20:12,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68425 states. [2019-12-07 13:20:13,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68425 states to 68425 states and 216910 transitions. [2019-12-07 13:20:13,018 INFO L78 Accepts]: Start accepts. Automaton has 68425 states and 216910 transitions. Word has length 22 [2019-12-07 13:20:13,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:13,018 INFO L462 AbstractCegarLoop]: Abstraction has 68425 states and 216910 transitions. [2019-12-07 13:20:13,018 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:20:13,018 INFO L276 IsEmpty]: Start isEmpty. Operand 68425 states and 216910 transitions. [2019-12-07 13:20:13,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:20:13,024 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:13,024 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:13,025 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:13,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:13,025 INFO L82 PathProgramCache]: Analyzing trace with hash 1541375313, now seen corresponding path program 1 times [2019-12-07 13:20:13,025 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:13,025 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [395286433] [2019-12-07 13:20:13,025 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:13,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:13,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:13,060 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [395286433] [2019-12-07 13:20:13,060 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:13,060 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:20:13,060 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [39993389] [2019-12-07 13:20:13,060 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:20:13,060 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:13,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:20:13,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:20:13,061 INFO L87 Difference]: Start difference. First operand 68425 states and 216910 transitions. Second operand 5 states. [2019-12-07 13:20:13,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:13,544 INFO L93 Difference]: Finished difference Result 85549 states and 267008 transitions. [2019-12-07 13:20:13,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:20:13,544 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 13:20:13,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:13,665 INFO L225 Difference]: With dead ends: 85549 [2019-12-07 13:20:13,665 INFO L226 Difference]: Without dead ends: 85493 [2019-12-07 13:20:13,665 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:20:13,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85493 states. [2019-12-07 13:20:14,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85493 to 68439. [2019-12-07 13:20:14,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68439 states. [2019-12-07 13:20:15,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68439 states to 68439 states and 216766 transitions. [2019-12-07 13:20:15,019 INFO L78 Accepts]: Start accepts. Automaton has 68439 states and 216766 transitions. Word has length 22 [2019-12-07 13:20:15,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:15,020 INFO L462 AbstractCegarLoop]: Abstraction has 68439 states and 216766 transitions. [2019-12-07 13:20:15,020 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:20:15,020 INFO L276 IsEmpty]: Start isEmpty. Operand 68439 states and 216766 transitions. [2019-12-07 13:20:15,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 13:20:15,033 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:15,033 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:15,033 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:15,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:15,033 INFO L82 PathProgramCache]: Analyzing trace with hash 2020314615, now seen corresponding path program 1 times [2019-12-07 13:20:15,033 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:15,033 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1828145926] [2019-12-07 13:20:15,033 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:15,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:15,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:15,070 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1828145926] [2019-12-07 13:20:15,070 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:15,070 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:20:15,070 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [46669480] [2019-12-07 13:20:15,070 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:20:15,070 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:15,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:20:15,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:20:15,071 INFO L87 Difference]: Start difference. First operand 68439 states and 216766 transitions. Second operand 5 states. [2019-12-07 13:20:15,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:15,475 INFO L93 Difference]: Finished difference Result 80305 states and 251119 transitions. [2019-12-07 13:20:15,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:20:15,476 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 13:20:15,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:15,593 INFO L225 Difference]: With dead ends: 80305 [2019-12-07 13:20:15,593 INFO L226 Difference]: Without dead ends: 80137 [2019-12-07 13:20:15,593 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:20:15,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80137 states. [2019-12-07 13:20:16,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80137 to 70638. [2019-12-07 13:20:16,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70638 states. [2019-12-07 13:20:16,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70638 states to 70638 states and 223242 transitions. [2019-12-07 13:20:16,807 INFO L78 Accepts]: Start accepts. Automaton has 70638 states and 223242 transitions. Word has length 26 [2019-12-07 13:20:16,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:16,807 INFO L462 AbstractCegarLoop]: Abstraction has 70638 states and 223242 transitions. [2019-12-07 13:20:16,807 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:20:16,807 INFO L276 IsEmpty]: Start isEmpty. Operand 70638 states and 223242 transitions. [2019-12-07 13:20:16,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 13:20:16,823 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:16,823 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:16,823 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:16,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:16,823 INFO L82 PathProgramCache]: Analyzing trace with hash 1824549582, now seen corresponding path program 1 times [2019-12-07 13:20:16,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:16,823 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305352403] [2019-12-07 13:20:16,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:16,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:16,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:16,845 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1305352403] [2019-12-07 13:20:16,845 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:16,845 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:20:16,845 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [3557052] [2019-12-07 13:20:16,846 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:20:16,846 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:16,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:20:16,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:20:16,846 INFO L87 Difference]: Start difference. First operand 70638 states and 223242 transitions. Second operand 3 states. [2019-12-07 13:20:17,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:17,183 INFO L93 Difference]: Finished difference Result 84647 states and 260398 transitions. [2019-12-07 13:20:17,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:20:17,184 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 26 [2019-12-07 13:20:17,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:17,294 INFO L225 Difference]: With dead ends: 84647 [2019-12-07 13:20:17,295 INFO L226 Difference]: Without dead ends: 84647 [2019-12-07 13:20:17,295 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:20:17,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84647 states. [2019-12-07 13:20:18,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84647 to 70638. [2019-12-07 13:20:18,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70638 states. [2019-12-07 13:20:18,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70638 states to 70638 states and 217847 transitions. [2019-12-07 13:20:18,471 INFO L78 Accepts]: Start accepts. Automaton has 70638 states and 217847 transitions. Word has length 26 [2019-12-07 13:20:18,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:18,471 INFO L462 AbstractCegarLoop]: Abstraction has 70638 states and 217847 transitions. [2019-12-07 13:20:18,471 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:20:18,471 INFO L276 IsEmpty]: Start isEmpty. Operand 70638 states and 217847 transitions. [2019-12-07 13:20:18,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 13:20:18,492 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:18,492 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:18,492 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:18,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:18,492 INFO L82 PathProgramCache]: Analyzing trace with hash -77744514, now seen corresponding path program 1 times [2019-12-07 13:20:18,493 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:18,493 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [823639689] [2019-12-07 13:20:18,493 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:18,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:18,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:18,525 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [823639689] [2019-12-07 13:20:18,525 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:18,525 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:20:18,525 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [139757261] [2019-12-07 13:20:18,525 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:20:18,525 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:18,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:20:18,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:20:18,526 INFO L87 Difference]: Start difference. First operand 70638 states and 217847 transitions. Second operand 5 states. [2019-12-07 13:20:18,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:18,942 INFO L93 Difference]: Finished difference Result 82875 states and 253074 transitions. [2019-12-07 13:20:18,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:20:18,942 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 13:20:18,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:19,053 INFO L225 Difference]: With dead ends: 82875 [2019-12-07 13:20:19,054 INFO L226 Difference]: Without dead ends: 82691 [2019-12-07 13:20:19,054 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:20:19,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82691 states. [2019-12-07 13:20:20,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82691 to 70276. [2019-12-07 13:20:20,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70276 states. [2019-12-07 13:20:20,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70276 states to 70276 states and 216644 transitions. [2019-12-07 13:20:20,301 INFO L78 Accepts]: Start accepts. Automaton has 70276 states and 216644 transitions. Word has length 28 [2019-12-07 13:20:20,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:20,302 INFO L462 AbstractCegarLoop]: Abstraction has 70276 states and 216644 transitions. [2019-12-07 13:20:20,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:20:20,302 INFO L276 IsEmpty]: Start isEmpty. Operand 70276 states and 216644 transitions. [2019-12-07 13:20:20,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 13:20:20,332 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:20,332 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:20,332 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:20,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:20,332 INFO L82 PathProgramCache]: Analyzing trace with hash -604665634, now seen corresponding path program 1 times [2019-12-07 13:20:20,332 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:20,332 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [475846021] [2019-12-07 13:20:20,332 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:20,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:20,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:20,383 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [475846021] [2019-12-07 13:20:20,383 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:20,383 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:20:20,383 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1818901971] [2019-12-07 13:20:20,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:20:20,383 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:20,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:20:20,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:20:20,384 INFO L87 Difference]: Start difference. First operand 70276 states and 216644 transitions. Second operand 5 states. [2019-12-07 13:20:20,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:20,493 INFO L93 Difference]: Finished difference Result 31139 states and 92090 transitions. [2019-12-07 13:20:20,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:20:20,494 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 13:20:20,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:20,528 INFO L225 Difference]: With dead ends: 31139 [2019-12-07 13:20:20,528 INFO L226 Difference]: Without dead ends: 27075 [2019-12-07 13:20:20,529 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:20:20,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27075 states. [2019-12-07 13:20:20,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27075 to 25552. [2019-12-07 13:20:20,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25552 states. [2019-12-07 13:20:20,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25552 states to 25552 states and 75390 transitions. [2019-12-07 13:20:20,908 INFO L78 Accepts]: Start accepts. Automaton has 25552 states and 75390 transitions. Word has length 31 [2019-12-07 13:20:20,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:20,908 INFO L462 AbstractCegarLoop]: Abstraction has 25552 states and 75390 transitions. [2019-12-07 13:20:20,908 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:20:20,908 INFO L276 IsEmpty]: Start isEmpty. Operand 25552 states and 75390 transitions. [2019-12-07 13:20:20,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 13:20:20,925 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:20,926 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:20,926 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:20,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:20,926 INFO L82 PathProgramCache]: Analyzing trace with hash 147507175, now seen corresponding path program 1 times [2019-12-07 13:20:20,926 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:20,926 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132899705] [2019-12-07 13:20:20,926 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:20,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:20,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:20,958 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132899705] [2019-12-07 13:20:20,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:20,958 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:20:20,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78929532] [2019-12-07 13:20:20,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:20:20,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:20,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:20:20,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:20:20,959 INFO L87 Difference]: Start difference. First operand 25552 states and 75390 transitions. Second operand 5 states. [2019-12-07 13:20:21,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:21,232 INFO L93 Difference]: Finished difference Result 28526 states and 83377 transitions. [2019-12-07 13:20:21,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:20:21,232 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2019-12-07 13:20:21,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:21,266 INFO L225 Difference]: With dead ends: 28526 [2019-12-07 13:20:21,266 INFO L226 Difference]: Without dead ends: 28348 [2019-12-07 13:20:21,267 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:20:21,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28348 states. [2019-12-07 13:20:21,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28348 to 25592. [2019-12-07 13:20:21,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25592 states. [2019-12-07 13:20:21,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25592 states to 25592 states and 75487 transitions. [2019-12-07 13:20:21,651 INFO L78 Accepts]: Start accepts. Automaton has 25592 states and 75487 transitions. Word has length 32 [2019-12-07 13:20:21,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:21,651 INFO L462 AbstractCegarLoop]: Abstraction has 25592 states and 75487 transitions. [2019-12-07 13:20:21,651 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:20:21,651 INFO L276 IsEmpty]: Start isEmpty. Operand 25592 states and 75487 transitions. [2019-12-07 13:20:21,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 13:20:21,669 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:21,669 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:21,669 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:21,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:21,730 INFO L82 PathProgramCache]: Analyzing trace with hash -1407969559, now seen corresponding path program 2 times [2019-12-07 13:20:21,730 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:21,730 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [991119641] [2019-12-07 13:20:21,730 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:21,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:21,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:21,770 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [991119641] [2019-12-07 13:20:21,771 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:21,771 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:20:21,771 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2042882524] [2019-12-07 13:20:21,771 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:20:21,771 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:21,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:20:21,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:20:21,771 INFO L87 Difference]: Start difference. First operand 25592 states and 75487 transitions. Second operand 6 states. [2019-12-07 13:20:22,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:22,196 INFO L93 Difference]: Finished difference Result 30595 states and 89234 transitions. [2019-12-07 13:20:22,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:20:22,196 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 13:20:22,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:22,230 INFO L225 Difference]: With dead ends: 30595 [2019-12-07 13:20:22,231 INFO L226 Difference]: Without dead ends: 30298 [2019-12-07 13:20:22,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:20:22,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30298 states. [2019-12-07 13:20:22,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30298 to 25573. [2019-12-07 13:20:22,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25573 states. [2019-12-07 13:20:22,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25573 states to 25573 states and 75454 transitions. [2019-12-07 13:20:22,635 INFO L78 Accepts]: Start accepts. Automaton has 25573 states and 75454 transitions. Word has length 32 [2019-12-07 13:20:22,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:22,635 INFO L462 AbstractCegarLoop]: Abstraction has 25573 states and 75454 transitions. [2019-12-07 13:20:22,635 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:20:22,635 INFO L276 IsEmpty]: Start isEmpty. Operand 25573 states and 75454 transitions. [2019-12-07 13:20:22,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 13:20:22,654 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:22,654 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:22,654 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:22,654 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:22,654 INFO L82 PathProgramCache]: Analyzing trace with hash 1247784206, now seen corresponding path program 1 times [2019-12-07 13:20:22,655 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:22,655 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676963065] [2019-12-07 13:20:22,655 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:22,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:22,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:22,701 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676963065] [2019-12-07 13:20:22,701 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:22,701 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:20:22,701 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1139724810] [2019-12-07 13:20:22,701 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:20:22,701 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:22,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:20:22,702 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:20:22,702 INFO L87 Difference]: Start difference. First operand 25573 states and 75454 transitions. Second operand 6 states. [2019-12-07 13:20:23,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:23,121 INFO L93 Difference]: Finished difference Result 29666 states and 86488 transitions. [2019-12-07 13:20:23,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:20:23,121 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 13:20:23,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:23,154 INFO L225 Difference]: With dead ends: 29666 [2019-12-07 13:20:23,154 INFO L226 Difference]: Without dead ends: 29291 [2019-12-07 13:20:23,155 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:20:23,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29291 states. [2019-12-07 13:20:23,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29291 to 24495. [2019-12-07 13:20:23,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24495 states. [2019-12-07 13:20:23,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24495 states to 24495 states and 72267 transitions. [2019-12-07 13:20:23,531 INFO L78 Accepts]: Start accepts. Automaton has 24495 states and 72267 transitions. Word has length 34 [2019-12-07 13:20:23,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:23,531 INFO L462 AbstractCegarLoop]: Abstraction has 24495 states and 72267 transitions. [2019-12-07 13:20:23,531 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:20:23,531 INFO L276 IsEmpty]: Start isEmpty. Operand 24495 states and 72267 transitions. [2019-12-07 13:20:23,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:20:23,552 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:23,552 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:23,552 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:23,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:23,552 INFO L82 PathProgramCache]: Analyzing trace with hash 280000667, now seen corresponding path program 1 times [2019-12-07 13:20:23,553 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:23,553 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060701389] [2019-12-07 13:20:23,553 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:23,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:23,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:23,611 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2060701389] [2019-12-07 13:20:23,611 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:23,611 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:20:23,611 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018606391] [2019-12-07 13:20:23,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:20:23,612 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:23,612 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:20:23,612 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:20:23,612 INFO L87 Difference]: Start difference. First operand 24495 states and 72267 transitions. Second operand 4 states. [2019-12-07 13:20:23,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:23,698 INFO L93 Difference]: Finished difference Result 33132 states and 98307 transitions. [2019-12-07 13:20:23,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:20:23,699 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 41 [2019-12-07 13:20:23,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:23,711 INFO L225 Difference]: With dead ends: 33132 [2019-12-07 13:20:23,712 INFO L226 Difference]: Without dead ends: 12290 [2019-12-07 13:20:23,712 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:20:23,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12290 states. [2019-12-07 13:20:23,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12290 to 12251. [2019-12-07 13:20:23,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12251 states. [2019-12-07 13:20:23,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12251 states to 12251 states and 35714 transitions. [2019-12-07 13:20:23,870 INFO L78 Accepts]: Start accepts. Automaton has 12251 states and 35714 transitions. Word has length 41 [2019-12-07 13:20:23,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:23,871 INFO L462 AbstractCegarLoop]: Abstraction has 12251 states and 35714 transitions. [2019-12-07 13:20:23,871 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:20:23,871 INFO L276 IsEmpty]: Start isEmpty. Operand 12251 states and 35714 transitions. [2019-12-07 13:20:23,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:20:23,880 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:23,880 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:23,880 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:23,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:23,881 INFO L82 PathProgramCache]: Analyzing trace with hash -2063356405, now seen corresponding path program 2 times [2019-12-07 13:20:23,881 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:23,881 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472666979] [2019-12-07 13:20:23,881 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:23,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:23,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:23,929 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472666979] [2019-12-07 13:20:23,929 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:23,929 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:20:23,929 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1157750786] [2019-12-07 13:20:23,929 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:20:23,929 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:23,929 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:20:23,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:20:23,930 INFO L87 Difference]: Start difference. First operand 12251 states and 35714 transitions. Second operand 6 states. [2019-12-07 13:20:23,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:23,991 INFO L93 Difference]: Finished difference Result 11296 states and 33687 transitions. [2019-12-07 13:20:23,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:20:23,991 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 13:20:23,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:24,001 INFO L225 Difference]: With dead ends: 11296 [2019-12-07 13:20:24,001 INFO L226 Difference]: Without dead ends: 9630 [2019-12-07 13:20:24,001 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:20:24,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9630 states. [2019-12-07 13:20:24,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9630 to 9630. [2019-12-07 13:20:24,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9630 states. [2019-12-07 13:20:24,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9630 states to 9630 states and 29655 transitions. [2019-12-07 13:20:24,140 INFO L78 Accepts]: Start accepts. Automaton has 9630 states and 29655 transitions. Word has length 41 [2019-12-07 13:20:24,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:24,141 INFO L462 AbstractCegarLoop]: Abstraction has 9630 states and 29655 transitions. [2019-12-07 13:20:24,141 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:20:24,141 INFO L276 IsEmpty]: Start isEmpty. Operand 9630 states and 29655 transitions. [2019-12-07 13:20:24,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 13:20:24,148 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:24,148 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:24,148 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:24,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:24,149 INFO L82 PathProgramCache]: Analyzing trace with hash -293239324, now seen corresponding path program 1 times [2019-12-07 13:20:24,149 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:24,149 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [163347822] [2019-12-07 13:20:24,149 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:24,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:24,186 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:24,187 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [163347822] [2019-12-07 13:20:24,187 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:24,187 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:20:24,187 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1417745666] [2019-12-07 13:20:24,187 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:20:24,187 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:24,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:20:24,188 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:20:24,188 INFO L87 Difference]: Start difference. First operand 9630 states and 29655 transitions. Second operand 3 states. [2019-12-07 13:20:24,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:24,258 INFO L93 Difference]: Finished difference Result 12328 states and 37911 transitions. [2019-12-07 13:20:24,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:20:24,258 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 13:20:24,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:24,272 INFO L225 Difference]: With dead ends: 12328 [2019-12-07 13:20:24,272 INFO L226 Difference]: Without dead ends: 12328 [2019-12-07 13:20:24,273 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:20:24,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12328 states. [2019-12-07 13:20:24,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12328 to 9550. [2019-12-07 13:20:24,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9550 states. [2019-12-07 13:20:24,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9550 states to 9550 states and 29659 transitions. [2019-12-07 13:20:24,438 INFO L78 Accepts]: Start accepts. Automaton has 9550 states and 29659 transitions. Word has length 64 [2019-12-07 13:20:24,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:24,438 INFO L462 AbstractCegarLoop]: Abstraction has 9550 states and 29659 transitions. [2019-12-07 13:20:24,438 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:20:24,438 INFO L276 IsEmpty]: Start isEmpty. Operand 9550 states and 29659 transitions. [2019-12-07 13:20:24,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:20:24,446 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:24,446 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:24,446 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:24,446 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:24,446 INFO L82 PathProgramCache]: Analyzing trace with hash 1553923546, now seen corresponding path program 1 times [2019-12-07 13:20:24,447 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:24,447 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769976172] [2019-12-07 13:20:24,447 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:24,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:24,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:24,664 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769976172] [2019-12-07 13:20:24,664 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:24,664 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:20:24,664 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201235205] [2019-12-07 13:20:24,665 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:20:24,665 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:24,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:20:24,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:20:24,665 INFO L87 Difference]: Start difference. First operand 9550 states and 29659 transitions. Second operand 13 states. [2019-12-07 13:20:28,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:28,420 INFO L93 Difference]: Finished difference Result 46733 states and 141359 transitions. [2019-12-07 13:20:28,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 13:20:28,421 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 65 [2019-12-07 13:20:28,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:28,467 INFO L225 Difference]: With dead ends: 46733 [2019-12-07 13:20:28,467 INFO L226 Difference]: Without dead ends: 30272 [2019-12-07 13:20:28,468 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 464 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=327, Invalid=1565, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 13:20:28,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30272 states. [2019-12-07 13:20:28,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30272 to 12642. [2019-12-07 13:20:28,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12642 states. [2019-12-07 13:20:28,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12642 states to 12642 states and 39731 transitions. [2019-12-07 13:20:28,779 INFO L78 Accepts]: Start accepts. Automaton has 12642 states and 39731 transitions. Word has length 65 [2019-12-07 13:20:28,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:28,779 INFO L462 AbstractCegarLoop]: Abstraction has 12642 states and 39731 transitions. [2019-12-07 13:20:28,779 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:20:28,780 INFO L276 IsEmpty]: Start isEmpty. Operand 12642 states and 39731 transitions. [2019-12-07 13:20:28,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:20:28,793 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:28,793 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:28,793 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:28,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:28,793 INFO L82 PathProgramCache]: Analyzing trace with hash 460519704, now seen corresponding path program 2 times [2019-12-07 13:20:28,793 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:28,793 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1842330970] [2019-12-07 13:20:28,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:28,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:29,036 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:29,036 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1842330970] [2019-12-07 13:20:29,036 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:29,036 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:20:29,036 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1347603250] [2019-12-07 13:20:29,036 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:20:29,036 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:29,037 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:20:29,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:20:29,037 INFO L87 Difference]: Start difference. First operand 12642 states and 39731 transitions. Second operand 13 states. [2019-12-07 13:20:34,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:34,615 INFO L93 Difference]: Finished difference Result 38335 states and 115563 transitions. [2019-12-07 13:20:34,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 13:20:34,616 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 65 [2019-12-07 13:20:34,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:34,664 INFO L225 Difference]: With dead ends: 38335 [2019-12-07 13:20:34,664 INFO L226 Difference]: Without dead ends: 30400 [2019-12-07 13:20:34,665 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 239 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=208, Invalid=982, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 13:20:34,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30400 states. [2019-12-07 13:20:34,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30400 to 12874. [2019-12-07 13:20:34,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12874 states. [2019-12-07 13:20:34,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12874 states to 12874 states and 40229 transitions. [2019-12-07 13:20:34,968 INFO L78 Accepts]: Start accepts. Automaton has 12874 states and 40229 transitions. Word has length 65 [2019-12-07 13:20:34,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:34,968 INFO L462 AbstractCegarLoop]: Abstraction has 12874 states and 40229 transitions. [2019-12-07 13:20:34,968 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:20:34,968 INFO L276 IsEmpty]: Start isEmpty. Operand 12874 states and 40229 transitions. [2019-12-07 13:20:34,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:20:34,981 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:34,981 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:34,982 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:34,982 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:34,982 INFO L82 PathProgramCache]: Analyzing trace with hash -490914692, now seen corresponding path program 3 times [2019-12-07 13:20:34,982 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:34,982 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528507344] [2019-12-07 13:20:34,982 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:34,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:35,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:35,062 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [528507344] [2019-12-07 13:20:35,062 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:35,062 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:20:35,062 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1356145771] [2019-12-07 13:20:35,062 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:20:35,062 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:35,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:20:35,063 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:20:35,063 INFO L87 Difference]: Start difference. First operand 12874 states and 40229 transitions. Second operand 7 states. [2019-12-07 13:20:35,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:35,477 INFO L93 Difference]: Finished difference Result 37991 states and 115769 transitions. [2019-12-07 13:20:35,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 13:20:35,477 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 13:20:35,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:35,513 INFO L225 Difference]: With dead ends: 37991 [2019-12-07 13:20:35,513 INFO L226 Difference]: Without dead ends: 28564 [2019-12-07 13:20:35,513 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2019-12-07 13:20:35,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28564 states. [2019-12-07 13:20:35,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28564 to 15479. [2019-12-07 13:20:35,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15479 states. [2019-12-07 13:20:35,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15479 states to 15479 states and 47781 transitions. [2019-12-07 13:20:35,839 INFO L78 Accepts]: Start accepts. Automaton has 15479 states and 47781 transitions. Word has length 65 [2019-12-07 13:20:35,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:35,839 INFO L462 AbstractCegarLoop]: Abstraction has 15479 states and 47781 transitions. [2019-12-07 13:20:35,839 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:20:35,839 INFO L276 IsEmpty]: Start isEmpty. Operand 15479 states and 47781 transitions. [2019-12-07 13:20:35,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:20:35,854 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:35,854 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:35,854 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:35,854 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:35,854 INFO L82 PathProgramCache]: Analyzing trace with hash -1528101508, now seen corresponding path program 4 times [2019-12-07 13:20:35,854 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:35,855 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1765906550] [2019-12-07 13:20:35,855 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:35,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:35,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:35,931 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1765906550] [2019-12-07 13:20:35,931 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:35,931 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:20:35,931 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [334857849] [2019-12-07 13:20:35,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:20:35,931 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:35,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:20:35,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:20:35,932 INFO L87 Difference]: Start difference. First operand 15479 states and 47781 transitions. Second operand 6 states. [2019-12-07 13:20:36,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:36,229 INFO L93 Difference]: Finished difference Result 39326 states and 119121 transitions. [2019-12-07 13:20:36,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 13:20:36,229 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 13:20:36,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:36,263 INFO L225 Difference]: With dead ends: 39326 [2019-12-07 13:20:36,263 INFO L226 Difference]: Without dead ends: 30031 [2019-12-07 13:20:36,263 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:20:36,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30031 states. [2019-12-07 13:20:36,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30031 to 15667. [2019-12-07 13:20:36,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15667 states. [2019-12-07 13:20:36,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15667 states to 15667 states and 48369 transitions. [2019-12-07 13:20:36,592 INFO L78 Accepts]: Start accepts. Automaton has 15667 states and 48369 transitions. Word has length 65 [2019-12-07 13:20:36,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:36,592 INFO L462 AbstractCegarLoop]: Abstraction has 15667 states and 48369 transitions. [2019-12-07 13:20:36,592 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:20:36,592 INFO L276 IsEmpty]: Start isEmpty. Operand 15667 states and 48369 transitions. [2019-12-07 13:20:36,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:20:36,607 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:36,608 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:36,608 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:36,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:36,608 INFO L82 PathProgramCache]: Analyzing trace with hash 82915224, now seen corresponding path program 5 times [2019-12-07 13:20:36,608 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:36,608 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [37116186] [2019-12-07 13:20:36,608 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:36,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:36,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:36,686 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [37116186] [2019-12-07 13:20:36,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:36,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:20:36,686 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897974164] [2019-12-07 13:20:36,686 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:20:36,686 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:36,686 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:20:36,686 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:20:36,687 INFO L87 Difference]: Start difference. First operand 15667 states and 48369 transitions. Second operand 7 states. [2019-12-07 13:20:36,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:36,967 INFO L93 Difference]: Finished difference Result 30480 states and 92246 transitions. [2019-12-07 13:20:36,968 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 13:20:36,968 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 13:20:36,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:37,000 INFO L225 Difference]: With dead ends: 30480 [2019-12-07 13:20:37,000 INFO L226 Difference]: Without dead ends: 28039 [2019-12-07 13:20:37,000 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:20:37,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28039 states. [2019-12-07 13:20:37,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28039 to 15643. [2019-12-07 13:20:37,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15643 states. [2019-12-07 13:20:37,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15643 states to 15643 states and 48294 transitions. [2019-12-07 13:20:37,378 INFO L78 Accepts]: Start accepts. Automaton has 15643 states and 48294 transitions. Word has length 65 [2019-12-07 13:20:37,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:37,378 INFO L462 AbstractCegarLoop]: Abstraction has 15643 states and 48294 transitions. [2019-12-07 13:20:37,378 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:20:37,378 INFO L276 IsEmpty]: Start isEmpty. Operand 15643 states and 48294 transitions. [2019-12-07 13:20:37,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:20:37,391 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:37,391 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:37,392 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:37,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:37,392 INFO L82 PathProgramCache]: Analyzing trace with hash 1394555808, now seen corresponding path program 6 times [2019-12-07 13:20:37,392 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:37,392 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [562110306] [2019-12-07 13:20:37,392 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:37,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:37,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:37,465 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [562110306] [2019-12-07 13:20:37,465 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:37,466 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:20:37,466 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [114754252] [2019-12-07 13:20:37,466 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:20:37,466 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:37,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:20:37,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:20:37,467 INFO L87 Difference]: Start difference. First operand 15643 states and 48294 transitions. Second operand 7 states. [2019-12-07 13:20:37,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:37,770 INFO L93 Difference]: Finished difference Result 31887 states and 96902 transitions. [2019-12-07 13:20:37,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 13:20:37,770 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 13:20:37,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:37,807 INFO L225 Difference]: With dead ends: 31887 [2019-12-07 13:20:37,807 INFO L226 Difference]: Without dead ends: 29634 [2019-12-07 13:20:37,807 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:20:37,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29634 states. [2019-12-07 13:20:38,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29634 to 15712. [2019-12-07 13:20:38,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15712 states. [2019-12-07 13:20:38,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15712 states to 15712 states and 48530 transitions. [2019-12-07 13:20:38,133 INFO L78 Accepts]: Start accepts. Automaton has 15712 states and 48530 transitions. Word has length 65 [2019-12-07 13:20:38,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:38,133 INFO L462 AbstractCegarLoop]: Abstraction has 15712 states and 48530 transitions. [2019-12-07 13:20:38,133 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:20:38,133 INFO L276 IsEmpty]: Start isEmpty. Operand 15712 states and 48530 transitions. [2019-12-07 13:20:38,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:20:38,148 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:38,148 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:38,148 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:38,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:38,148 INFO L82 PathProgramCache]: Analyzing trace with hash -945056774, now seen corresponding path program 7 times [2019-12-07 13:20:38,148 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:38,148 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748684775] [2019-12-07 13:20:38,148 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:38,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:38,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:38,204 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748684775] [2019-12-07 13:20:38,204 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:38,204 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:20:38,204 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1116962345] [2019-12-07 13:20:38,205 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:20:38,205 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:38,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:20:38,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:20:38,205 INFO L87 Difference]: Start difference. First operand 15712 states and 48530 transitions. Second operand 4 states. [2019-12-07 13:20:38,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:38,285 INFO L93 Difference]: Finished difference Result 26299 states and 81635 transitions. [2019-12-07 13:20:38,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:20:38,285 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2019-12-07 13:20:38,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:38,313 INFO L225 Difference]: With dead ends: 26299 [2019-12-07 13:20:38,313 INFO L226 Difference]: Without dead ends: 22489 [2019-12-07 13:20:38,313 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:20:38,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22489 states. [2019-12-07 13:20:38,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22489 to 15191. [2019-12-07 13:20:38,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15191 states. [2019-12-07 13:20:38,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15191 states to 15191 states and 46874 transitions. [2019-12-07 13:20:38,574 INFO L78 Accepts]: Start accepts. Automaton has 15191 states and 46874 transitions. Word has length 65 [2019-12-07 13:20:38,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:38,574 INFO L462 AbstractCegarLoop]: Abstraction has 15191 states and 46874 transitions. [2019-12-07 13:20:38,574 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:20:38,574 INFO L276 IsEmpty]: Start isEmpty. Operand 15191 states and 46874 transitions. [2019-12-07 13:20:38,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:20:38,588 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:38,588 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:38,588 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:38,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:38,589 INFO L82 PathProgramCache]: Analyzing trace with hash -1130939332, now seen corresponding path program 8 times [2019-12-07 13:20:38,589 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:38,589 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1982381265] [2019-12-07 13:20:38,589 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:38,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:38,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:38,628 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1982381265] [2019-12-07 13:20:38,628 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:38,628 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:20:38,628 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [789385426] [2019-12-07 13:20:38,629 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:20:38,629 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:38,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:20:38,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:20:38,629 INFO L87 Difference]: Start difference. First operand 15191 states and 46874 transitions. Second operand 3 states. [2019-12-07 13:20:38,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:38,665 INFO L93 Difference]: Finished difference Result 12839 states and 38997 transitions. [2019-12-07 13:20:38,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:20:38,665 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 13:20:38,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:38,679 INFO L225 Difference]: With dead ends: 12839 [2019-12-07 13:20:38,679 INFO L226 Difference]: Without dead ends: 12839 [2019-12-07 13:20:38,679 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:20:38,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12839 states. [2019-12-07 13:20:38,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12839 to 11621. [2019-12-07 13:20:38,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11621 states. [2019-12-07 13:20:38,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11621 states to 11621 states and 35350 transitions. [2019-12-07 13:20:38,838 INFO L78 Accepts]: Start accepts. Automaton has 11621 states and 35350 transitions. Word has length 65 [2019-12-07 13:20:38,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:38,838 INFO L462 AbstractCegarLoop]: Abstraction has 11621 states and 35350 transitions. [2019-12-07 13:20:38,838 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:20:38,838 INFO L276 IsEmpty]: Start isEmpty. Operand 11621 states and 35350 transitions. [2019-12-07 13:20:38,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:20:38,847 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:38,847 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:38,847 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:38,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:38,847 INFO L82 PathProgramCache]: Analyzing trace with hash -623699513, now seen corresponding path program 1 times [2019-12-07 13:20:38,847 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:38,847 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1735206235] [2019-12-07 13:20:38,847 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:38,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:38,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:38,951 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1735206235] [2019-12-07 13:20:38,952 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:38,952 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:20:38,952 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804893898] [2019-12-07 13:20:38,952 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:20:38,952 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:38,952 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:20:38,952 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:20:38,953 INFO L87 Difference]: Start difference. First operand 11621 states and 35350 transitions. Second operand 10 states. [2019-12-07 13:20:39,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:39,905 INFO L93 Difference]: Finished difference Result 22944 states and 69273 transitions. [2019-12-07 13:20:39,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 13:20:39,905 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 13:20:39,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:39,924 INFO L225 Difference]: With dead ends: 22944 [2019-12-07 13:20:39,924 INFO L226 Difference]: Without dead ends: 17437 [2019-12-07 13:20:39,924 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=94, Invalid=368, Unknown=0, NotChecked=0, Total=462 [2019-12-07 13:20:39,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17437 states. [2019-12-07 13:20:40,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17437 to 12155. [2019-12-07 13:20:40,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12155 states. [2019-12-07 13:20:40,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12155 states to 12155 states and 36825 transitions. [2019-12-07 13:20:40,130 INFO L78 Accepts]: Start accepts. Automaton has 12155 states and 36825 transitions. Word has length 66 [2019-12-07 13:20:40,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:40,130 INFO L462 AbstractCegarLoop]: Abstraction has 12155 states and 36825 transitions. [2019-12-07 13:20:40,130 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:20:40,130 INFO L276 IsEmpty]: Start isEmpty. Operand 12155 states and 36825 transitions. [2019-12-07 13:20:40,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:20:40,141 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:40,141 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:40,141 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:40,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:40,142 INFO L82 PathProgramCache]: Analyzing trace with hash -1795841111, now seen corresponding path program 2 times [2019-12-07 13:20:40,142 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:40,142 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [346355915] [2019-12-07 13:20:40,142 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:40,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:40,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:40,247 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [346355915] [2019-12-07 13:20:40,247 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:40,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:20:40,248 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1208886278] [2019-12-07 13:20:40,248 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:20:40,248 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:40,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:20:40,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:20:40,248 INFO L87 Difference]: Start difference. First operand 12155 states and 36825 transitions. Second operand 11 states. [2019-12-07 13:20:41,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:41,224 INFO L93 Difference]: Finished difference Result 21832 states and 65444 transitions. [2019-12-07 13:20:41,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 13:20:41,224 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 13:20:41,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:41,241 INFO L225 Difference]: With dead ends: 21832 [2019-12-07 13:20:41,241 INFO L226 Difference]: Without dead ends: 18037 [2019-12-07 13:20:41,241 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=102, Invalid=404, Unknown=0, NotChecked=0, Total=506 [2019-12-07 13:20:41,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18037 states. [2019-12-07 13:20:41,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18037 to 12183. [2019-12-07 13:20:41,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12183 states. [2019-12-07 13:20:41,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12183 states to 12183 states and 36759 transitions. [2019-12-07 13:20:41,440 INFO L78 Accepts]: Start accepts. Automaton has 12183 states and 36759 transitions. Word has length 66 [2019-12-07 13:20:41,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:41,440 INFO L462 AbstractCegarLoop]: Abstraction has 12183 states and 36759 transitions. [2019-12-07 13:20:41,440 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:20:41,440 INFO L276 IsEmpty]: Start isEmpty. Operand 12183 states and 36759 transitions. [2019-12-07 13:20:41,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:20:41,451 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:41,451 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:41,451 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:41,451 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:41,451 INFO L82 PathProgramCache]: Analyzing trace with hash -131673981, now seen corresponding path program 3 times [2019-12-07 13:20:41,451 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:41,451 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467618471] [2019-12-07 13:20:41,451 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:41,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:41,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:41,602 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467618471] [2019-12-07 13:20:41,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:41,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:20:41,603 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036606420] [2019-12-07 13:20:41,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:20:41,603 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:41,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:20:41,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:20:41,603 INFO L87 Difference]: Start difference. First operand 12183 states and 36759 transitions. Second operand 11 states. [2019-12-07 13:20:42,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:42,509 INFO L93 Difference]: Finished difference Result 28739 states and 86353 transitions. [2019-12-07 13:20:42,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 13:20:42,509 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 13:20:42,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:42,542 INFO L225 Difference]: With dead ends: 28739 [2019-12-07 13:20:42,542 INFO L226 Difference]: Without dead ends: 26332 [2019-12-07 13:20:42,542 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 279 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=236, Invalid=954, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 13:20:42,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26332 states. [2019-12-07 13:20:42,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26332 to 14403. [2019-12-07 13:20:42,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14403 states. [2019-12-07 13:20:42,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14403 states to 14403 states and 43208 transitions. [2019-12-07 13:20:42,833 INFO L78 Accepts]: Start accepts. Automaton has 14403 states and 43208 transitions. Word has length 66 [2019-12-07 13:20:42,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:42,833 INFO L462 AbstractCegarLoop]: Abstraction has 14403 states and 43208 transitions. [2019-12-07 13:20:42,833 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:20:42,834 INFO L276 IsEmpty]: Start isEmpty. Operand 14403 states and 43208 transitions. [2019-12-07 13:20:42,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:20:42,847 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:42,847 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:42,847 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:42,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:42,847 INFO L82 PathProgramCache]: Analyzing trace with hash 1121708431, now seen corresponding path program 4 times [2019-12-07 13:20:42,847 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:42,848 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1734159080] [2019-12-07 13:20:42,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:42,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:43,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:43,145 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1734159080] [2019-12-07 13:20:43,145 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:43,145 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:20:43,145 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1046102910] [2019-12-07 13:20:43,145 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:20:43,145 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:43,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:20:43,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:20:43,145 INFO L87 Difference]: Start difference. First operand 14403 states and 43208 transitions. Second operand 15 states. [2019-12-07 13:20:44,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:44,772 INFO L93 Difference]: Finished difference Result 17873 states and 52706 transitions. [2019-12-07 13:20:44,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 13:20:44,773 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 66 [2019-12-07 13:20:44,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:44,790 INFO L225 Difference]: With dead ends: 17873 [2019-12-07 13:20:44,790 INFO L226 Difference]: Without dead ends: 17770 [2019-12-07 13:20:44,791 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 328 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=240, Invalid=1400, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 13:20:44,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17770 states. [2019-12-07 13:20:44,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17770 to 14683. [2019-12-07 13:20:44,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14683 states. [2019-12-07 13:20:45,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14683 states to 14683 states and 43538 transitions. [2019-12-07 13:20:45,008 INFO L78 Accepts]: Start accepts. Automaton has 14683 states and 43538 transitions. Word has length 66 [2019-12-07 13:20:45,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:45,008 INFO L462 AbstractCegarLoop]: Abstraction has 14683 states and 43538 transitions. [2019-12-07 13:20:45,008 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:20:45,008 INFO L276 IsEmpty]: Start isEmpty. Operand 14683 states and 43538 transitions. [2019-12-07 13:20:45,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:20:45,022 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:45,022 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:45,022 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:45,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:45,022 INFO L82 PathProgramCache]: Analyzing trace with hash 323077009, now seen corresponding path program 5 times [2019-12-07 13:20:45,022 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:45,022 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110046430] [2019-12-07 13:20:45,022 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:45,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:45,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:45,150 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2110046430] [2019-12-07 13:20:45,150 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:45,150 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:20:45,150 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1891295786] [2019-12-07 13:20:45,151 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:20:45,151 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:45,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:20:45,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:20:45,151 INFO L87 Difference]: Start difference. First operand 14683 states and 43538 transitions. Second operand 11 states. [2019-12-07 13:20:45,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:45,862 INFO L93 Difference]: Finished difference Result 27091 states and 80154 transitions. [2019-12-07 13:20:45,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 13:20:45,863 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 13:20:45,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:45,884 INFO L225 Difference]: With dead ends: 27091 [2019-12-07 13:20:45,884 INFO L226 Difference]: Without dead ends: 21594 [2019-12-07 13:20:45,885 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 248 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=229, Invalid=893, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 13:20:45,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21594 states. [2019-12-07 13:20:46,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21594 to 11251. [2019-12-07 13:20:46,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11251 states. [2019-12-07 13:20:46,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11251 states to 11251 states and 33488 transitions. [2019-12-07 13:20:46,100 INFO L78 Accepts]: Start accepts. Automaton has 11251 states and 33488 transitions. Word has length 66 [2019-12-07 13:20:46,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:46,100 INFO L462 AbstractCegarLoop]: Abstraction has 11251 states and 33488 transitions. [2019-12-07 13:20:46,100 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:20:46,100 INFO L276 IsEmpty]: Start isEmpty. Operand 11251 states and 33488 transitions. [2019-12-07 13:20:46,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:20:46,109 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:46,109 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:46,110 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:46,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:46,110 INFO L82 PathProgramCache]: Analyzing trace with hash 461520025, now seen corresponding path program 6 times [2019-12-07 13:20:46,110 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:46,110 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900256553] [2019-12-07 13:20:46,110 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:46,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:20:46,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:20:46,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1900256553] [2019-12-07 13:20:46,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:20:46,287 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 13:20:46,288 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1724030835] [2019-12-07 13:20:46,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:20:46,288 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:20:46,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:20:46,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:20:46,288 INFO L87 Difference]: Start difference. First operand 11251 states and 33488 transitions. Second operand 13 states. [2019-12-07 13:20:47,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:20:47,016 INFO L93 Difference]: Finished difference Result 13948 states and 40760 transitions. [2019-12-07 13:20:47,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 13:20:47,016 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 66 [2019-12-07 13:20:47,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:20:47,030 INFO L225 Difference]: With dead ends: 13948 [2019-12-07 13:20:47,030 INFO L226 Difference]: Without dead ends: 13693 [2019-12-07 13:20:47,030 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=117, Invalid=483, Unknown=0, NotChecked=0, Total=600 [2019-12-07 13:20:47,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13693 states. [2019-12-07 13:20:47,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13693 to 11075. [2019-12-07 13:20:47,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11075 states. [2019-12-07 13:20:47,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11075 states to 11075 states and 33032 transitions. [2019-12-07 13:20:47,196 INFO L78 Accepts]: Start accepts. Automaton has 11075 states and 33032 transitions. Word has length 66 [2019-12-07 13:20:47,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:20:47,196 INFO L462 AbstractCegarLoop]: Abstraction has 11075 states and 33032 transitions. [2019-12-07 13:20:47,196 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:20:47,196 INFO L276 IsEmpty]: Start isEmpty. Operand 11075 states and 33032 transitions. [2019-12-07 13:20:47,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:20:47,205 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:20:47,205 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:20:47,205 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:20:47,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:20:47,206 INFO L82 PathProgramCache]: Analyzing trace with hash -663530261, now seen corresponding path program 7 times [2019-12-07 13:20:47,206 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:20:47,206 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1472698606] [2019-12-07 13:20:47,206 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:20:47,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:20:47,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:20:47,280 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 13:20:47,280 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:20:47,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [907] [907] ULTIMATE.startENTRY-->L840: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t885~0.base_30|)) (= v_~main$tmp_guard0~0_40 0) (= 0 v_~b$r_buff1_thd1~0_173) (= 0 v_~__unbuffered_p1_EAX~0_44) (= 0 v_~x~0_134) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t885~0.base_30| 1)) (= v_~z~0_33 0) (= 0 v_~weak$$choice0~0_14) (= |v_ULTIMATE.start_main_~#t885~0.offset_22| 0) (= |v_#NULL.offset_6| 0) (= 0 v_~b$r_buff0_thd2~0_158) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~b$read_delayed~0_7) (= v_~a~0_13 0) (= v_~b$w_buff1~0_227 0) (< 0 |v_#StackHeapBarrier_19|) (= v_~weak$$choice2~0_143 0) (= 0 v_~b$r_buff0_thd3~0_397) (= v_~b$r_buff1_thd0~0_151 0) (= 0 v_~b$r_buff1_thd3~0_304) (= 0 v_~b$r_buff0_thd1~0_258) (= v_~__unbuffered_p1_EBX~0_44 0) (= v_~__unbuffered_cnt~0_127 0) (= v_~b$read_delayed_var~0.offset_7 0) (< |v_#StackHeapBarrier_19| |v_ULTIMATE.start_main_~#t885~0.base_30|) (= v_~b~0_156 0) (= v_~y~0_27 0) (= v_~main$tmp_guard1~0_28 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX~0_34) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t885~0.base_30| 4)) (= v_~b$mem_tmp~0_17 0) (= 0 v_~b$r_buff1_thd2~0_163) (= v_~b$flush_delayed~0_32 0) (= 0 v_~b$w_buff1_used~0_458) (= 0 v_~b$w_buff0_used~0_811) (= v_~b$r_buff0_thd0~0_167 0) (= 0 v_~b$w_buff0~0_363) (= 0 v_~b$read_delayed_var~0.base_7) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t885~0.base_30| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t885~0.base_30|) |v_ULTIMATE.start_main_~#t885~0.offset_22| 0)) |v_#memory_int_25|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_19|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_26|, #length=|v_#length_26|} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_397, ~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_173, ~b$read_delayed_var~0.offset=v_~b$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_64|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_38|, ULTIMATE.start_main_~#t885~0.offset=|v_ULTIMATE.start_main_~#t885~0.offset_22|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_38|, ~b$w_buff0_used~0=v_~b$w_buff0_used~0_811, ~a~0=v_~a~0_13, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_58|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_25|, ~b$w_buff0~0=v_~b$w_buff0~0_363, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_167, ~b$r_buff0_thd2~0=v_~b$r_buff0_thd2~0_158, ~b$mem_tmp~0=v_~b$mem_tmp~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~b$flush_delayed~0=v_~b$flush_delayed~0_32, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~b$read_delayed~0=v_~b$read_delayed~0_7, ULTIMATE.start_main_~#t887~0.offset=|v_ULTIMATE.start_main_~#t887~0.offset_15|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_19|, ~b$w_buff1~0=v_~b$w_buff1~0_227, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127, ULTIMATE.start_main_~#t886~0.offset=|v_ULTIMATE.start_main_~#t886~0.offset_15|, ~x~0=v_~x~0_134, ~b$r_buff0_thd1~0=v_~b$r_buff0_thd1~0_258, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_105|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~b$w_buff1_used~0=v_~b$w_buff1_used~0_458, ~y~0=v_~y~0_27, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_163, ULTIMATE.start_main_~#t887~0.base=|v_ULTIMATE.start_main_~#t887~0.base_18|, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_151, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_44, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ULTIMATE.start_main_~#t886~0.base=|v_ULTIMATE.start_main_~#t886~0.base_24|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_40, ULTIMATE.start_main_~#t885~0.base=|v_ULTIMATE.start_main_~#t885~0.base_30|, #NULL.base=|v_#NULL.base_6|, ~b$read_delayed_var~0.base=v_~b$read_delayed_var~0.base_7, ~b~0=v_~b~0_156, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_25|, ~z~0=v_~z~0_33, ~weak$$choice2~0=v_~weak$$choice2~0_143, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_304} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, ~b$r_buff1_thd1~0, ~b$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t885~0.offset, ULTIMATE.start_main_#t~ite50, ~b$w_buff0_used~0, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~b$w_buff0~0, ~__unbuffered_p2_EAX~0, ~b$r_buff0_thd0~0, ~b$r_buff0_thd2~0, ~b$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~b$flush_delayed~0, ULTIMATE.start_main_#t~nondet45, ~b$read_delayed~0, ULTIMATE.start_main_~#t887~0.offset, ~weak$$choice0~0, ~b$w_buff1~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t886~0.offset, ~x~0, ~b$r_buff0_thd1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite51, ~b$w_buff1_used~0, ~y~0, ~b$r_buff1_thd2~0, ULTIMATE.start_main_~#t887~0.base, ~b$r_buff1_thd0~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t886~0.base, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t885~0.base, #NULL.base, ~b$read_delayed_var~0.base, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 13:20:47,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L840-1-->L842: Formula: (and (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t886~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t886~0.base_12|) |v_ULTIMATE.start_main_~#t886~0.offset_10| 1)) |v_#memory_int_17|) (not (= |v_ULTIMATE.start_main_~#t886~0.base_12| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t886~0.base_12|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t886~0.base_12|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t886~0.base_12| 4)) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t886~0.base_12| 1) |v_#valid_38|) (= |v_ULTIMATE.start_main_~#t886~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t886~0.base=|v_ULTIMATE.start_main_~#t886~0.base_12|, #length=|v_#length_17|, ULTIMATE.start_main_~#t886~0.offset=|v_ULTIMATE.start_main_~#t886~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t886~0.base, #length, ULTIMATE.start_main_~#t886~0.offset] because there is no mapped edge [2019-12-07 13:20:47,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L752: Formula: (and (= 1 ~b$r_buff0_thd1~0_Out1913838252) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1913838252)) (= ~b$r_buff1_thd3~0_Out1913838252 ~b$r_buff0_thd3~0_In1913838252) (= ~b$r_buff1_thd0~0_Out1913838252 ~b$r_buff0_thd0~0_In1913838252) (= ~b$r_buff1_thd1~0_Out1913838252 ~b$r_buff0_thd1~0_In1913838252) (= 1 ~x~0_Out1913838252) (= ~b$r_buff0_thd2~0_In1913838252 ~b$r_buff1_thd2~0_Out1913838252)) InVars {~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1913838252, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1913838252, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1913838252, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1913838252, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1913838252} OutVars{~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out1913838252, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1913838252, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1913838252, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_Out1913838252, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_Out1913838252, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1913838252, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_Out1913838252, ~x~0=~x~0_Out1913838252, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_Out1913838252, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1913838252} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, ~b$r_buff1_thd1~0, ~b$r_buff1_thd0~0, ~b$r_buff1_thd2~0, ~x~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 13:20:47,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L778-2-->L778-5: Formula: (let ((.cse1 (= (mod ~b$r_buff1_thd2~0_In-667285539 256) 0)) (.cse0 (= (mod ~b$w_buff1_used~0_In-667285539 256) 0)) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out-667285539| |P1Thread1of1ForFork2_#t~ite10_Out-667285539|))) (or (and (= ~b$w_buff1~0_In-667285539 |P1Thread1of1ForFork2_#t~ite9_Out-667285539|) (not .cse0) (not .cse1) .cse2) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-667285539| ~b~0_In-667285539) (or .cse1 .cse0) .cse2))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-667285539, ~b~0=~b~0_In-667285539, ~b$w_buff1~0=~b$w_buff1~0_In-667285539, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-667285539} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-667285539|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-667285539, ~b~0=~b~0_In-667285539, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-667285539|, ~b$w_buff1~0=~b$w_buff1~0_In-667285539, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-667285539} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:20:47,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd1~0_In1664960845 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In1664960845 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out1664960845| ~b$w_buff0_used~0_In1664960845)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1664960845|) (not .cse1) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1664960845, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1664960845} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1664960845, P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1664960845|, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1664960845} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:20:47,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~b$w_buff1_used~0_In316982851 256) 0)) (.cse1 (= 0 (mod ~b$r_buff1_thd1~0_In316982851 256))) (.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In316982851 256))) (.cse3 (= 0 (mod ~b$w_buff0_used~0_In316982851 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out316982851| ~b$w_buff1_used~0_In316982851)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out316982851|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In316982851, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In316982851, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In316982851, ~b$w_buff1_used~0=~b$w_buff1_used~0_In316982851} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In316982851, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In316982851, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In316982851, ~b$w_buff1_used~0=~b$w_buff1_used~0_In316982851, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out316982851|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:20:47,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~b$r_buff0_thd2~0_In-2128023145 256))) (.cse1 (= 0 (mod ~b$w_buff0_used~0_In-2128023145 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-2128023145| ~b$w_buff0_used~0_In-2128023145)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-2128023145| 0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2128023145, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2128023145} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2128023145, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2128023145, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-2128023145|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:20:47,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L755-->L756: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff0_used~0_In-1988270640 256))) (.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In-1988270640 256))) (.cse1 (= ~b$r_buff0_thd1~0_In-1988270640 ~b$r_buff0_thd1~0_Out-1988270640))) (or (and .cse0 .cse1) (and (not .cse0) (= 0 ~b$r_buff0_thd1~0_Out-1988270640) (not .cse2)) (and .cse2 .cse1))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1988270640, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1988270640} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1988270640, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-1988270640, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1988270640|} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-12-07 13:20:47,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff1_used~0_In-1505151343 256))) (.cse1 (= (mod ~b$r_buff1_thd1~0_In-1505151343 256) 0)) (.cse3 (= 0 (mod ~b$r_buff0_thd1~0_In-1505151343 256))) (.cse2 (= (mod ~b$w_buff0_used~0_In-1505151343 256) 0))) (or (and (= ~b$r_buff1_thd1~0_In-1505151343 |P0Thread1of1ForFork1_#t~ite8_Out-1505151343|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1505151343|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1505151343, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1505151343, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1505151343, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1505151343} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1505151343, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1505151343, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1505151343, P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1505151343|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1505151343} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:20:47,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~b$r_buff1_thd1~0_107 |v_P0Thread1of1ForFork1_#t~ite8_46|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_87 1) v_~__unbuffered_cnt~0_86)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87} OutVars{~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_107, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_45|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86} AuxVars[] AssignedVars[~b$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:20:47,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L842-1-->L844: Formula: (and (= |v_ULTIMATE.start_main_~#t887~0.offset_10| 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t887~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t887~0.base_12|) |v_ULTIMATE.start_main_~#t887~0.offset_10| 2)) |v_#memory_int_15|) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t887~0.base_12|) 0) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t887~0.base_12| 1)) (not (= |v_ULTIMATE.start_main_~#t887~0.base_12| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t887~0.base_12|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t887~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_15|, #length=|v_#length_15|, ULTIMATE.start_main_~#t887~0.base=|v_ULTIMATE.start_main_~#t887~0.base_12|, ULTIMATE.start_main_~#t887~0.offset=|v_ULTIMATE.start_main_~#t887~0.offset_10|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t887~0.base, ULTIMATE.start_main_~#t887~0.offset] because there is no mapped edge [2019-12-07 13:20:47,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L809-->L809-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1478309630 256)))) (or (and (= ~b$w_buff1_used~0_In-1478309630 |P2Thread1of1ForFork0_#t~ite30_Out-1478309630|) (= |P2Thread1of1ForFork0_#t~ite29_In-1478309630| |P2Thread1of1ForFork0_#t~ite29_Out-1478309630|) (not .cse0)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out-1478309630| |P2Thread1of1ForFork0_#t~ite30_Out-1478309630|) (let ((.cse1 (= 0 (mod ~b$r_buff0_thd3~0_In-1478309630 256)))) (or (= 0 (mod ~b$w_buff0_used~0_In-1478309630 256)) (and .cse1 (= (mod ~b$r_buff1_thd3~0_In-1478309630 256) 0)) (and .cse1 (= 0 (mod ~b$w_buff1_used~0_In-1478309630 256))))) (= ~b$w_buff1_used~0_In-1478309630 |P2Thread1of1ForFork0_#t~ite29_Out-1478309630|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1478309630, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1478309630, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1478309630, ~weak$$choice2~0=~weak$$choice2~0_In-1478309630, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1478309630|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1478309630} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1478309630, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1478309630, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1478309630, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1478309630|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1478309630|, ~weak$$choice2~0=~weak$$choice2~0_In-1478309630, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1478309630} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:20:47,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [897] [897] L810-->L811-8: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite36_36| v_~b$r_buff1_thd3~0_279) (= v_~b$r_buff0_thd3~0_376 v_~b$r_buff0_thd3~0_375) (not (= 0 (mod v_~weak$$choice2~0_126 256))) (= |v_P2Thread1of1ForFork0_#t~ite34_29| |v_P2Thread1of1ForFork0_#t~ite34_28|) (= |v_P2Thread1of1ForFork0_#t~ite35_33| |v_P2Thread1of1ForFork0_#t~ite35_32|)) InVars {~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_376, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_33|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_29|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} OutVars{P2Thread1of1ForFork0_#t~ite36=|v_P2Thread1of1ForFork0_#t~ite36_36|, ~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_375, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_23|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_32|, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_32|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_28|, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_25|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite36, ~b$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, P2Thread1of1ForFork0_#t~ite35, P2Thread1of1ForFork0_#t~ite34, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:20:47,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L813-->L817: Formula: (and (= v_~b$flush_delayed~0_6 0) (not (= (mod v_~b$flush_delayed~0_7 256) 0)) (= v_~b~0_16 v_~b$mem_tmp~0_4)) InVars {~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b$flush_delayed~0=v_~b$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b~0=v_~b~0_16, ~b$flush_delayed~0=v_~b$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~b~0, ~b$flush_delayed~0] because there is no mapped edge [2019-12-07 13:20:47,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L817-2-->L817-5: Formula: (let ((.cse2 (= 0 (mod ~b$w_buff1_used~0_In2029083012 256))) (.cse1 (= (mod ~b$r_buff1_thd3~0_In2029083012 256) 0)) (.cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out2029083012| |P2Thread1of1ForFork0_#t~ite39_Out2029083012|))) (or (and .cse0 (= ~b$w_buff1~0_In2029083012 |P2Thread1of1ForFork0_#t~ite38_Out2029083012|) (not .cse1) (not .cse2)) (and (or .cse2 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out2029083012| ~b~0_In2029083012) .cse0))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In2029083012, ~b~0=~b~0_In2029083012, ~b$w_buff1~0=~b$w_buff1~0_In2029083012, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2029083012} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out2029083012|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out2029083012|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In2029083012, ~b~0=~b~0_In2029083012, ~b$w_buff1~0=~b$w_buff1~0_In2029083012, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2029083012} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:20:47,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In-1720982222 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd3~0_In-1720982222 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1720982222| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-1720982222| ~b$w_buff0_used~0_In-1720982222)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1720982222, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1720982222} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1720982222, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1720982222, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1720982222|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:20:47,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L819-->L819-2: Formula: (let ((.cse3 (= (mod ~b$w_buff1_used~0_In-184498766 256) 0)) (.cse2 (= (mod ~b$r_buff1_thd3~0_In-184498766 256) 0)) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In-184498766 256))) (.cse1 (= (mod ~b$w_buff0_used~0_In-184498766 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-184498766| ~b$w_buff1_used~0_In-184498766) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite41_Out-184498766| 0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-184498766, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-184498766, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-184498766, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-184498766} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-184498766, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-184498766, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-184498766, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-184498766|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-184498766} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:20:47,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L820-->L820-2: Formula: (let ((.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In-1403717575 256))) (.cse1 (= (mod ~b$w_buff0_used~0_In-1403717575 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1403717575| ~b$r_buff0_thd3~0_In-1403717575) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1403717575| 0) (not .cse0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1403717575, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1403717575} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1403717575, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1403717575, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1403717575|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:20:47,294 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L821-->L821-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff1_thd3~0_In914314518 256))) (.cse2 (= 0 (mod ~b$w_buff1_used~0_In914314518 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In914314518 256))) (.cse1 (= (mod ~b$r_buff0_thd3~0_In914314518 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out914314518| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite43_Out914314518| ~b$r_buff1_thd3~0_In914314518) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In914314518, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In914314518, ~b$w_buff1_used~0=~b$w_buff1_used~0_In914314518, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In914314518} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In914314518, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In914314518, P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out914314518|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In914314518, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In914314518} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:20:47,294 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L821-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite43_34| v_~b$r_buff1_thd3~0_101)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_101, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~__unbuffered_cnt~0, ~b$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:20:47,294 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff0_used~0_In741350328 256))) (.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In741350328 256))) (.cse2 (= (mod ~b$w_buff1_used~0_In741350328 256) 0)) (.cse3 (= (mod ~b$r_buff1_thd2~0_In741350328 256) 0))) (or (and (or .cse0 .cse1) (= ~b$w_buff1_used~0_In741350328 |P1Thread1of1ForFork2_#t~ite12_Out741350328|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out741350328|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In741350328, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In741350328, ~b$w_buff1_used~0=~b$w_buff1_used~0_In741350328, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In741350328} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In741350328, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In741350328, ~b$w_buff1_used~0=~b$w_buff1_used~0_In741350328, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out741350328|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In741350328} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:20:47,294 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In892263601 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In892263601 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out892263601| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out892263601| ~b$r_buff0_thd2~0_In892263601)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In892263601, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In892263601} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In892263601, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In892263601, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out892263601|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:20:47,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L782-->L782-2: Formula: (let ((.cse2 (= 0 (mod ~b$w_buff0_used~0_In-1740834553 256))) (.cse3 (= (mod ~b$r_buff0_thd2~0_In-1740834553 256) 0)) (.cse0 (= (mod ~b$w_buff1_used~0_In-1740834553 256) 0)) (.cse1 (= 0 (mod ~b$r_buff1_thd2~0_In-1740834553 256)))) (or (and (or .cse0 .cse1) (= ~b$r_buff1_thd2~0_In-1740834553 |P1Thread1of1ForFork2_#t~ite14_Out-1740834553|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1740834553|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1740834553, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1740834553, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1740834553, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1740834553} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1740834553, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1740834553, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1740834553, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1740834553|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1740834553} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:20:47,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~b$r_buff1_thd2~0_91 |v_P1Thread1of1ForFork2_#t~ite14_50|) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_50|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_49|, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_91, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, ~b$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:20:47,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L848-->L850-2: Formula: (and (or (= 0 (mod v_~b$w_buff0_used~0_159 256)) (= 0 (mod v_~b$r_buff0_thd0~0_23 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} OutVars{~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 13:20:47,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L850-2-->L850-4: Formula: (let ((.cse0 (= (mod ~b$w_buff1_used~0_In317521205 256) 0)) (.cse1 (= 0 (mod ~b$r_buff1_thd0~0_In317521205 256)))) (or (and (or .cse0 .cse1) (= ~b~0_In317521205 |ULTIMATE.start_main_#t~ite47_Out317521205|)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out317521205| ~b$w_buff1~0_In317521205) (not .cse1)))) InVars {~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In317521205, ~b$w_buff1_used~0=~b$w_buff1_used~0_In317521205, ~b~0=~b~0_In317521205, ~b$w_buff1~0=~b$w_buff1~0_In317521205} OutVars{~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In317521205, ~b$w_buff1_used~0=~b$w_buff1_used~0_In317521205, ~b~0=~b~0_In317521205, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out317521205|, ~b$w_buff1~0=~b$w_buff1~0_In317521205} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:20:47,296 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L850-4-->L851: Formula: (= v_~b~0_28 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{~b~0=v_~b~0_28, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|} AuxVars[] AssignedVars[~b~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:20:47,296 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L851-->L851-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In-1270278927 256) 0)) (.cse1 (= 0 (mod ~b$r_buff0_thd0~0_In-1270278927 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1270278927| ~b$w_buff0_used~0_In-1270278927)) (and (= |ULTIMATE.start_main_#t~ite49_Out-1270278927| 0) (not .cse0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1270278927, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1270278927} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1270278927, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1270278927|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1270278927} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:20:47,296 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L852-->L852-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In-1992865864 256))) (.cse0 (= (mod ~b$r_buff0_thd0~0_In-1992865864 256) 0)) (.cse2 (= (mod ~b$r_buff1_thd0~0_In-1992865864 256) 0)) (.cse3 (= (mod ~b$w_buff1_used~0_In-1992865864 256) 0))) (or (and (= ~b$w_buff1_used~0_In-1992865864 |ULTIMATE.start_main_#t~ite50_Out-1992865864|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1992865864|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1992865864, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1992865864, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1992865864, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1992865864} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1992865864|, ~b$w_buff0_used~0=~b$w_buff0_used~0_In-1992865864, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1992865864, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1992865864, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1992865864} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:20:47,296 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L853-->L853-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd0~0_In-1362534147 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In-1362534147 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out-1362534147| ~b$r_buff0_thd0~0_In-1362534147) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1362534147| 0) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1362534147, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1362534147} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1362534147, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1362534147|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1362534147} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:20:47,297 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L854-->L854-2: Formula: (let ((.cse1 (= (mod ~b$r_buff0_thd0~0_In397901817 256) 0)) (.cse0 (= (mod ~b$w_buff0_used~0_In397901817 256) 0)) (.cse3 (= (mod ~b$w_buff1_used~0_In397901817 256) 0)) (.cse2 (= 0 (mod ~b$r_buff1_thd0~0_In397901817 256)))) (or (and (or .cse0 .cse1) (= ~b$r_buff1_thd0~0_In397901817 |ULTIMATE.start_main_#t~ite52_Out397901817|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out397901817|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In397901817, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In397901817, ~b$w_buff1_used~0=~b$w_buff1_used~0_In397901817, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In397901817} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In397901817, ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out397901817|, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In397901817, ~b$w_buff1_used~0=~b$w_buff1_used~0_In397901817, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In397901817} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:20:47,297 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] L854-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 1 v_~__unbuffered_p1_EAX~0_30) (= v_~__unbuffered_p2_EBX~0_21 0) (= v_~x~0_96 2) (= v_~__unbuffered_p1_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~b$r_buff1_thd0~0_116 |v_ULTIMATE.start_main_#t~ite52_39|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_116, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~b$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:20:47,363 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:20:47 BasicIcfg [2019-12-07 13:20:47,364 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:20:47,364 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:20:47,364 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:20:47,364 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:20:47,365 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:17:10" (3/4) ... [2019-12-07 13:20:47,367 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:20:47,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [907] [907] ULTIMATE.startENTRY-->L840: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t885~0.base_30|)) (= v_~main$tmp_guard0~0_40 0) (= 0 v_~b$r_buff1_thd1~0_173) (= 0 v_~__unbuffered_p1_EAX~0_44) (= 0 v_~x~0_134) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t885~0.base_30| 1)) (= v_~z~0_33 0) (= 0 v_~weak$$choice0~0_14) (= |v_ULTIMATE.start_main_~#t885~0.offset_22| 0) (= |v_#NULL.offset_6| 0) (= 0 v_~b$r_buff0_thd2~0_158) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~b$read_delayed~0_7) (= v_~a~0_13 0) (= v_~b$w_buff1~0_227 0) (< 0 |v_#StackHeapBarrier_19|) (= v_~weak$$choice2~0_143 0) (= 0 v_~b$r_buff0_thd3~0_397) (= v_~b$r_buff1_thd0~0_151 0) (= 0 v_~b$r_buff1_thd3~0_304) (= 0 v_~b$r_buff0_thd1~0_258) (= v_~__unbuffered_p1_EBX~0_44 0) (= v_~__unbuffered_cnt~0_127 0) (= v_~b$read_delayed_var~0.offset_7 0) (< |v_#StackHeapBarrier_19| |v_ULTIMATE.start_main_~#t885~0.base_30|) (= v_~b~0_156 0) (= v_~y~0_27 0) (= v_~main$tmp_guard1~0_28 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX~0_34) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t885~0.base_30| 4)) (= v_~b$mem_tmp~0_17 0) (= 0 v_~b$r_buff1_thd2~0_163) (= v_~b$flush_delayed~0_32 0) (= 0 v_~b$w_buff1_used~0_458) (= 0 v_~b$w_buff0_used~0_811) (= v_~b$r_buff0_thd0~0_167 0) (= 0 v_~b$w_buff0~0_363) (= 0 v_~b$read_delayed_var~0.base_7) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t885~0.base_30| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t885~0.base_30|) |v_ULTIMATE.start_main_~#t885~0.offset_22| 0)) |v_#memory_int_25|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_19|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_26|, #length=|v_#length_26|} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_397, ~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_173, ~b$read_delayed_var~0.offset=v_~b$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_64|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_38|, ULTIMATE.start_main_~#t885~0.offset=|v_ULTIMATE.start_main_~#t885~0.offset_22|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_38|, ~b$w_buff0_used~0=v_~b$w_buff0_used~0_811, ~a~0=v_~a~0_13, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_58|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_25|, ~b$w_buff0~0=v_~b$w_buff0~0_363, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_167, ~b$r_buff0_thd2~0=v_~b$r_buff0_thd2~0_158, ~b$mem_tmp~0=v_~b$mem_tmp~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~b$flush_delayed~0=v_~b$flush_delayed~0_32, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~b$read_delayed~0=v_~b$read_delayed~0_7, ULTIMATE.start_main_~#t887~0.offset=|v_ULTIMATE.start_main_~#t887~0.offset_15|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_19|, ~b$w_buff1~0=v_~b$w_buff1~0_227, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127, ULTIMATE.start_main_~#t886~0.offset=|v_ULTIMATE.start_main_~#t886~0.offset_15|, ~x~0=v_~x~0_134, ~b$r_buff0_thd1~0=v_~b$r_buff0_thd1~0_258, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_105|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~b$w_buff1_used~0=v_~b$w_buff1_used~0_458, ~y~0=v_~y~0_27, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_163, ULTIMATE.start_main_~#t887~0.base=|v_ULTIMATE.start_main_~#t887~0.base_18|, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_151, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_44, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ULTIMATE.start_main_~#t886~0.base=|v_ULTIMATE.start_main_~#t886~0.base_24|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_40, ULTIMATE.start_main_~#t885~0.base=|v_ULTIMATE.start_main_~#t885~0.base_30|, #NULL.base=|v_#NULL.base_6|, ~b$read_delayed_var~0.base=v_~b$read_delayed_var~0.base_7, ~b~0=v_~b~0_156, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_25|, ~z~0=v_~z~0_33, ~weak$$choice2~0=v_~weak$$choice2~0_143, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_304} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, ~b$r_buff1_thd1~0, ~b$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t885~0.offset, ULTIMATE.start_main_#t~ite50, ~b$w_buff0_used~0, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~b$w_buff0~0, ~__unbuffered_p2_EAX~0, ~b$r_buff0_thd0~0, ~b$r_buff0_thd2~0, ~b$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~b$flush_delayed~0, ULTIMATE.start_main_#t~nondet45, ~b$read_delayed~0, ULTIMATE.start_main_~#t887~0.offset, ~weak$$choice0~0, ~b$w_buff1~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t886~0.offset, ~x~0, ~b$r_buff0_thd1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite51, ~b$w_buff1_used~0, ~y~0, ~b$r_buff1_thd2~0, ULTIMATE.start_main_~#t887~0.base, ~b$r_buff1_thd0~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t886~0.base, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t885~0.base, #NULL.base, ~b$read_delayed_var~0.base, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 13:20:47,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L840-1-->L842: Formula: (and (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t886~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t886~0.base_12|) |v_ULTIMATE.start_main_~#t886~0.offset_10| 1)) |v_#memory_int_17|) (not (= |v_ULTIMATE.start_main_~#t886~0.base_12| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t886~0.base_12|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t886~0.base_12|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t886~0.base_12| 4)) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t886~0.base_12| 1) |v_#valid_38|) (= |v_ULTIMATE.start_main_~#t886~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t886~0.base=|v_ULTIMATE.start_main_~#t886~0.base_12|, #length=|v_#length_17|, ULTIMATE.start_main_~#t886~0.offset=|v_ULTIMATE.start_main_~#t886~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t886~0.base, #length, ULTIMATE.start_main_~#t886~0.offset] because there is no mapped edge [2019-12-07 13:20:47,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L752: Formula: (and (= 1 ~b$r_buff0_thd1~0_Out1913838252) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1913838252)) (= ~b$r_buff1_thd3~0_Out1913838252 ~b$r_buff0_thd3~0_In1913838252) (= ~b$r_buff1_thd0~0_Out1913838252 ~b$r_buff0_thd0~0_In1913838252) (= ~b$r_buff1_thd1~0_Out1913838252 ~b$r_buff0_thd1~0_In1913838252) (= 1 ~x~0_Out1913838252) (= ~b$r_buff0_thd2~0_In1913838252 ~b$r_buff1_thd2~0_Out1913838252)) InVars {~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1913838252, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1913838252, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1913838252, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1913838252, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1913838252} OutVars{~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out1913838252, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In1913838252, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1913838252, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_Out1913838252, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_Out1913838252, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1913838252, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_Out1913838252, ~x~0=~x~0_Out1913838252, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_Out1913838252, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1913838252} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, ~b$r_buff1_thd1~0, ~b$r_buff1_thd0~0, ~b$r_buff1_thd2~0, ~x~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 13:20:47,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L778-2-->L778-5: Formula: (let ((.cse1 (= (mod ~b$r_buff1_thd2~0_In-667285539 256) 0)) (.cse0 (= (mod ~b$w_buff1_used~0_In-667285539 256) 0)) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out-667285539| |P1Thread1of1ForFork2_#t~ite10_Out-667285539|))) (or (and (= ~b$w_buff1~0_In-667285539 |P1Thread1of1ForFork2_#t~ite9_Out-667285539|) (not .cse0) (not .cse1) .cse2) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-667285539| ~b~0_In-667285539) (or .cse1 .cse0) .cse2))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-667285539, ~b~0=~b~0_In-667285539, ~b$w_buff1~0=~b$w_buff1~0_In-667285539, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-667285539} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-667285539|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-667285539, ~b~0=~b~0_In-667285539, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-667285539|, ~b$w_buff1~0=~b$w_buff1~0_In-667285539, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-667285539} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:20:47,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd1~0_In1664960845 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In1664960845 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out1664960845| ~b$w_buff0_used~0_In1664960845)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1664960845|) (not .cse1) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1664960845, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1664960845} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1664960845, P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1664960845|, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1664960845} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:20:47,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~b$w_buff1_used~0_In316982851 256) 0)) (.cse1 (= 0 (mod ~b$r_buff1_thd1~0_In316982851 256))) (.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In316982851 256))) (.cse3 (= 0 (mod ~b$w_buff0_used~0_In316982851 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out316982851| ~b$w_buff1_used~0_In316982851)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out316982851|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In316982851, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In316982851, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In316982851, ~b$w_buff1_used~0=~b$w_buff1_used~0_In316982851} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In316982851, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In316982851, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In316982851, ~b$w_buff1_used~0=~b$w_buff1_used~0_In316982851, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out316982851|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:20:47,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~b$r_buff0_thd2~0_In-2128023145 256))) (.cse1 (= 0 (mod ~b$w_buff0_used~0_In-2128023145 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-2128023145| ~b$w_buff0_used~0_In-2128023145)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-2128023145| 0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2128023145, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2128023145} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2128023145, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2128023145, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-2128023145|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:20:47,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L755-->L756: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff0_used~0_In-1988270640 256))) (.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In-1988270640 256))) (.cse1 (= ~b$r_buff0_thd1~0_In-1988270640 ~b$r_buff0_thd1~0_Out-1988270640))) (or (and .cse0 .cse1) (and (not .cse0) (= 0 ~b$r_buff0_thd1~0_Out-1988270640) (not .cse2)) (and .cse2 .cse1))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1988270640, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1988270640} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1988270640, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-1988270640, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1988270640|} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-12-07 13:20:47,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff1_used~0_In-1505151343 256))) (.cse1 (= (mod ~b$r_buff1_thd1~0_In-1505151343 256) 0)) (.cse3 (= 0 (mod ~b$r_buff0_thd1~0_In-1505151343 256))) (.cse2 (= (mod ~b$w_buff0_used~0_In-1505151343 256) 0))) (or (and (= ~b$r_buff1_thd1~0_In-1505151343 |P0Thread1of1ForFork1_#t~ite8_Out-1505151343|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1505151343|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1505151343, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1505151343, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1505151343, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1505151343} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1505151343, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1505151343, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1505151343, P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1505151343|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1505151343} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:20:47,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~b$r_buff1_thd1~0_107 |v_P0Thread1of1ForFork1_#t~ite8_46|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_87 1) v_~__unbuffered_cnt~0_86)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87} OutVars{~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_107, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_45|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86} AuxVars[] AssignedVars[~b$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:20:47,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L842-1-->L844: Formula: (and (= |v_ULTIMATE.start_main_~#t887~0.offset_10| 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t887~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t887~0.base_12|) |v_ULTIMATE.start_main_~#t887~0.offset_10| 2)) |v_#memory_int_15|) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t887~0.base_12|) 0) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t887~0.base_12| 1)) (not (= |v_ULTIMATE.start_main_~#t887~0.base_12| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t887~0.base_12|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t887~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_15|, #length=|v_#length_15|, ULTIMATE.start_main_~#t887~0.base=|v_ULTIMATE.start_main_~#t887~0.base_12|, ULTIMATE.start_main_~#t887~0.offset=|v_ULTIMATE.start_main_~#t887~0.offset_10|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t887~0.base, ULTIMATE.start_main_~#t887~0.offset] because there is no mapped edge [2019-12-07 13:20:47,375 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L809-->L809-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1478309630 256)))) (or (and (= ~b$w_buff1_used~0_In-1478309630 |P2Thread1of1ForFork0_#t~ite30_Out-1478309630|) (= |P2Thread1of1ForFork0_#t~ite29_In-1478309630| |P2Thread1of1ForFork0_#t~ite29_Out-1478309630|) (not .cse0)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out-1478309630| |P2Thread1of1ForFork0_#t~ite30_Out-1478309630|) (let ((.cse1 (= 0 (mod ~b$r_buff0_thd3~0_In-1478309630 256)))) (or (= 0 (mod ~b$w_buff0_used~0_In-1478309630 256)) (and .cse1 (= (mod ~b$r_buff1_thd3~0_In-1478309630 256) 0)) (and .cse1 (= 0 (mod ~b$w_buff1_used~0_In-1478309630 256))))) (= ~b$w_buff1_used~0_In-1478309630 |P2Thread1of1ForFork0_#t~ite29_Out-1478309630|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1478309630, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1478309630, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1478309630, ~weak$$choice2~0=~weak$$choice2~0_In-1478309630, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1478309630|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1478309630} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1478309630, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1478309630, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1478309630, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1478309630|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1478309630|, ~weak$$choice2~0=~weak$$choice2~0_In-1478309630, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1478309630} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:20:47,375 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [897] [897] L810-->L811-8: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite36_36| v_~b$r_buff1_thd3~0_279) (= v_~b$r_buff0_thd3~0_376 v_~b$r_buff0_thd3~0_375) (not (= 0 (mod v_~weak$$choice2~0_126 256))) (= |v_P2Thread1of1ForFork0_#t~ite34_29| |v_P2Thread1of1ForFork0_#t~ite34_28|) (= |v_P2Thread1of1ForFork0_#t~ite35_33| |v_P2Thread1of1ForFork0_#t~ite35_32|)) InVars {~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_376, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_33|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_29|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} OutVars{P2Thread1of1ForFork0_#t~ite36=|v_P2Thread1of1ForFork0_#t~ite36_36|, ~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_375, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_23|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_32|, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_32|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_28|, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_25|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite36, ~b$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, P2Thread1of1ForFork0_#t~ite35, P2Thread1of1ForFork0_#t~ite34, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:20:47,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L813-->L817: Formula: (and (= v_~b$flush_delayed~0_6 0) (not (= (mod v_~b$flush_delayed~0_7 256) 0)) (= v_~b~0_16 v_~b$mem_tmp~0_4)) InVars {~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b$flush_delayed~0=v_~b$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b~0=v_~b~0_16, ~b$flush_delayed~0=v_~b$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~b~0, ~b$flush_delayed~0] because there is no mapped edge [2019-12-07 13:20:47,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L817-2-->L817-5: Formula: (let ((.cse2 (= 0 (mod ~b$w_buff1_used~0_In2029083012 256))) (.cse1 (= (mod ~b$r_buff1_thd3~0_In2029083012 256) 0)) (.cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out2029083012| |P2Thread1of1ForFork0_#t~ite39_Out2029083012|))) (or (and .cse0 (= ~b$w_buff1~0_In2029083012 |P2Thread1of1ForFork0_#t~ite38_Out2029083012|) (not .cse1) (not .cse2)) (and (or .cse2 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out2029083012| ~b~0_In2029083012) .cse0))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In2029083012, ~b~0=~b~0_In2029083012, ~b$w_buff1~0=~b$w_buff1~0_In2029083012, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2029083012} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out2029083012|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out2029083012|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In2029083012, ~b~0=~b~0_In2029083012, ~b$w_buff1~0=~b$w_buff1~0_In2029083012, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In2029083012} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:20:47,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In-1720982222 256) 0)) (.cse1 (= (mod ~b$r_buff0_thd3~0_In-1720982222 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1720982222| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-1720982222| ~b$w_buff0_used~0_In-1720982222)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1720982222, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1720982222} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1720982222, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1720982222, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1720982222|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:20:47,377 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L819-->L819-2: Formula: (let ((.cse3 (= (mod ~b$w_buff1_used~0_In-184498766 256) 0)) (.cse2 (= (mod ~b$r_buff1_thd3~0_In-184498766 256) 0)) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In-184498766 256))) (.cse1 (= (mod ~b$w_buff0_used~0_In-184498766 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-184498766| ~b$w_buff1_used~0_In-184498766) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite41_Out-184498766| 0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-184498766, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-184498766, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-184498766, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-184498766} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-184498766, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-184498766, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-184498766, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-184498766|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-184498766} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:20:47,377 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L820-->L820-2: Formula: (let ((.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In-1403717575 256))) (.cse1 (= (mod ~b$w_buff0_used~0_In-1403717575 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1403717575| ~b$r_buff0_thd3~0_In-1403717575) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1403717575| 0) (not .cse0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1403717575, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1403717575} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1403717575, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1403717575, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1403717575|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:20:47,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L821-->L821-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff1_thd3~0_In914314518 256))) (.cse2 (= 0 (mod ~b$w_buff1_used~0_In914314518 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In914314518 256))) (.cse1 (= (mod ~b$r_buff0_thd3~0_In914314518 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out914314518| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite43_Out914314518| ~b$r_buff1_thd3~0_In914314518) (or .cse0 .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In914314518, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In914314518, ~b$w_buff1_used~0=~b$w_buff1_used~0_In914314518, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In914314518} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In914314518, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In914314518, P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out914314518|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In914314518, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In914314518} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:20:47,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L821-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite43_34| v_~b$r_buff1_thd3~0_101)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_101, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~__unbuffered_cnt~0, ~b$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:20:47,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~b$w_buff0_used~0_In741350328 256))) (.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In741350328 256))) (.cse2 (= (mod ~b$w_buff1_used~0_In741350328 256) 0)) (.cse3 (= (mod ~b$r_buff1_thd2~0_In741350328 256) 0))) (or (and (or .cse0 .cse1) (= ~b$w_buff1_used~0_In741350328 |P1Thread1of1ForFork2_#t~ite12_Out741350328|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out741350328|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In741350328, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In741350328, ~b$w_buff1_used~0=~b$w_buff1_used~0_In741350328, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In741350328} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In741350328, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In741350328, ~b$w_buff1_used~0=~b$w_buff1_used~0_In741350328, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out741350328|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In741350328} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:20:47,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd2~0_In892263601 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In892263601 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out892263601| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out892263601| ~b$r_buff0_thd2~0_In892263601)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In892263601, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In892263601} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In892263601, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In892263601, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out892263601|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:20:47,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L782-->L782-2: Formula: (let ((.cse2 (= 0 (mod ~b$w_buff0_used~0_In-1740834553 256))) (.cse3 (= (mod ~b$r_buff0_thd2~0_In-1740834553 256) 0)) (.cse0 (= (mod ~b$w_buff1_used~0_In-1740834553 256) 0)) (.cse1 (= 0 (mod ~b$r_buff1_thd2~0_In-1740834553 256)))) (or (and (or .cse0 .cse1) (= ~b$r_buff1_thd2~0_In-1740834553 |P1Thread1of1ForFork2_#t~ite14_Out-1740834553|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1740834553|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1740834553, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1740834553, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1740834553, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1740834553} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1740834553, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1740834553, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1740834553, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1740834553|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1740834553} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:20:47,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~b$r_buff1_thd2~0_91 |v_P1Thread1of1ForFork2_#t~ite14_50|) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_50|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_49|, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_91, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, ~b$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:20:47,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L848-->L850-2: Formula: (and (or (= 0 (mod v_~b$w_buff0_used~0_159 256)) (= 0 (mod v_~b$r_buff0_thd0~0_23 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} OutVars{~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 13:20:47,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L850-2-->L850-4: Formula: (let ((.cse0 (= (mod ~b$w_buff1_used~0_In317521205 256) 0)) (.cse1 (= 0 (mod ~b$r_buff1_thd0~0_In317521205 256)))) (or (and (or .cse0 .cse1) (= ~b~0_In317521205 |ULTIMATE.start_main_#t~ite47_Out317521205|)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out317521205| ~b$w_buff1~0_In317521205) (not .cse1)))) InVars {~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In317521205, ~b$w_buff1_used~0=~b$w_buff1_used~0_In317521205, ~b~0=~b~0_In317521205, ~b$w_buff1~0=~b$w_buff1~0_In317521205} OutVars{~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In317521205, ~b$w_buff1_used~0=~b$w_buff1_used~0_In317521205, ~b~0=~b~0_In317521205, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out317521205|, ~b$w_buff1~0=~b$w_buff1~0_In317521205} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:20:47,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L850-4-->L851: Formula: (= v_~b~0_28 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{~b~0=v_~b~0_28, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|} AuxVars[] AssignedVars[~b~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:20:47,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L851-->L851-2: Formula: (let ((.cse0 (= (mod ~b$w_buff0_used~0_In-1270278927 256) 0)) (.cse1 (= 0 (mod ~b$r_buff0_thd0~0_In-1270278927 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1270278927| ~b$w_buff0_used~0_In-1270278927)) (and (= |ULTIMATE.start_main_#t~ite49_Out-1270278927| 0) (not .cse0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1270278927, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1270278927} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1270278927, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1270278927|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1270278927} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:20:47,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L852-->L852-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In-1992865864 256))) (.cse0 (= (mod ~b$r_buff0_thd0~0_In-1992865864 256) 0)) (.cse2 (= (mod ~b$r_buff1_thd0~0_In-1992865864 256) 0)) (.cse3 (= (mod ~b$w_buff1_used~0_In-1992865864 256) 0))) (or (and (= ~b$w_buff1_used~0_In-1992865864 |ULTIMATE.start_main_#t~ite50_Out-1992865864|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1992865864|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1992865864, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1992865864, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1992865864, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1992865864} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1992865864|, ~b$w_buff0_used~0=~b$w_buff0_used~0_In-1992865864, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1992865864, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1992865864, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1992865864} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:20:47,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L853-->L853-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff0_thd0~0_In-1362534147 256))) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In-1362534147 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out-1362534147| ~b$r_buff0_thd0~0_In-1362534147) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1362534147| 0) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1362534147, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1362534147} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1362534147, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1362534147|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1362534147} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:20:47,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L854-->L854-2: Formula: (let ((.cse1 (= (mod ~b$r_buff0_thd0~0_In397901817 256) 0)) (.cse0 (= (mod ~b$w_buff0_used~0_In397901817 256) 0)) (.cse3 (= (mod ~b$w_buff1_used~0_In397901817 256) 0)) (.cse2 (= 0 (mod ~b$r_buff1_thd0~0_In397901817 256)))) (or (and (or .cse0 .cse1) (= ~b$r_buff1_thd0~0_In397901817 |ULTIMATE.start_main_#t~ite52_Out397901817|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out397901817|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In397901817, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In397901817, ~b$w_buff1_used~0=~b$w_buff1_used~0_In397901817, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In397901817} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In397901817, ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out397901817|, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In397901817, ~b$w_buff1_used~0=~b$w_buff1_used~0_In397901817, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In397901817} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:20:47,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] L854-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 1 v_~__unbuffered_p1_EAX~0_30) (= v_~__unbuffered_p2_EBX~0_21 0) (= v_~x~0_96 2) (= v_~__unbuffered_p1_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~b$r_buff1_thd0~0_116 |v_ULTIMATE.start_main_#t~ite52_39|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_116, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~b$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:20:47,449 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_0139438d-0f14-4ec8-a626-331f8db6c91b/bin/uautomizer/witness.graphml [2019-12-07 13:20:47,450 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:20:47,451 INFO L168 Benchmark]: Toolchain (without parser) took 217433.22 ms. Allocated memory was 1.0 GB in the beginning and 8.8 GB in the end (delta: 7.7 GB). Free memory was 938.1 MB in the beginning and 4.2 GB in the end (delta: -3.3 GB). Peak memory consumption was 4.5 GB. Max. memory is 11.5 GB. [2019-12-07 13:20:47,451 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:20:47,451 INFO L168 Benchmark]: CACSL2BoogieTranslator took 404.91 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.8 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -132.1 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 13:20:47,451 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.70 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:20:47,451 INFO L168 Benchmark]: Boogie Preprocessor took 28.71 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:20:47,452 INFO L168 Benchmark]: RCFGBuilder took 421.11 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 998.0 MB in the end (delta: 66.7 MB). Peak memory consumption was 66.7 MB. Max. memory is 11.5 GB. [2019-12-07 13:20:47,452 INFO L168 Benchmark]: TraceAbstraction took 216448.87 ms. Allocated memory was 1.1 GB in the beginning and 8.8 GB in the end (delta: 7.6 GB). Free memory was 998.0 MB in the beginning and 4.3 GB in the end (delta: -3.3 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 13:20:47,452 INFO L168 Benchmark]: Witness Printer took 85.73 ms. Allocated memory is still 8.8 GB. Free memory was 4.3 GB in the beginning and 4.2 GB in the end (delta: 44.3 MB). Peak memory consumption was 44.3 MB. Max. memory is 11.5 GB. [2019-12-07 13:20:47,454 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 404.91 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.8 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -132.1 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.70 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.71 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 421.11 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 998.0 MB in the end (delta: 66.7 MB). Peak memory consumption was 66.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 216448.87 ms. Allocated memory was 1.1 GB in the beginning and 8.8 GB in the end (delta: 7.6 GB). Free memory was 998.0 MB in the beginning and 4.3 GB in the end (delta: -3.3 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. * Witness Printer took 85.73 ms. Allocated memory is still 8.8 GB. Free memory was 4.3 GB in the beginning and 4.2 GB in the end (delta: 44.3 MB). Peak memory consumption was 44.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 179 ProgramPointsBefore, 93 ProgramPointsAfterwards, 216 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 36 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 32 ChoiceCompositions, 7364 VarBasedMoverChecksPositive, 244 VarBasedMoverChecksNegative, 47 SemBasedMoverChecksPositive, 271 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 80691 CheckedPairsTotal, 120 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L840] FCALL, FORK 0 pthread_create(&t885, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L842] FCALL, FORK 0 pthread_create(&t886, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L737] 1 b$w_buff1 = b$w_buff0 [L738] 1 b$w_buff0 = 1 [L739] 1 b$w_buff1_used = b$w_buff0_used [L740] 1 b$w_buff0_used = (_Bool)1 [L752] EXPR 1 b$w_buff0_used && b$r_buff0_thd1 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd1 ? b$w_buff1 : b) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L766] 2 x = 2 [L769] 2 y = 1 [L772] 2 __unbuffered_p1_EAX = y [L775] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L778] EXPR 2 b$w_buff0_used && b$r_buff0_thd2 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd2 ? b$w_buff1 : b) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L752] 1 b = b$w_buff0_used && b$r_buff0_thd1 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd1 ? b$w_buff1 : b) [L778] 2 b = b$w_buff0_used && b$r_buff0_thd2 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd2 ? b$w_buff1 : b) [L753] 1 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd1 ? (_Bool)0 : b$w_buff0_used [L754] 1 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd1 || b$w_buff1_used && b$r_buff1_thd1 ? (_Bool)0 : b$w_buff1_used [L844] FCALL, FORK 0 pthread_create(&t887, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L792] 3 z = 1 [L795] 3 a = 1 [L798] 3 __unbuffered_p2_EAX = a [L801] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L802] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L803] 3 b$flush_delayed = weak$$choice2 [L804] 3 b$mem_tmp = b VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L805] EXPR 3 !b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1) VAL [!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1)=0, __unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L805] 3 b = !b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1) [L806] EXPR 3 weak$$choice2 ? b$w_buff0 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? b$w_buff0 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff0))=1, x=2, y=1, z=1] [L806] 3 b$w_buff0 = weak$$choice2 ? b$w_buff0 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff0)) [L807] EXPR 3 weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1))=0, x=2, y=1, z=1] [L807] 3 b$w_buff1 = weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1)) [L808] EXPR 3 weak$$choice2 ? b$w_buff0_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? b$w_buff0_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used))=0, x=2, y=1, z=1] [L808] 3 b$w_buff0_used = weak$$choice2 ? b$w_buff0_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used)) [L809] 3 b$w_buff1_used = weak$$choice2 ? b$w_buff1_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L811] 3 b$r_buff1_thd3 = weak$$choice2 ? b$r_buff1_thd3 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$r_buff1_thd3 : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L812] 3 __unbuffered_p2_EBX = b VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L817] EXPR 3 b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd3 ? b$w_buff1 : b) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L817] 3 b = b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd3 ? b$w_buff1 : b) [L818] 3 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used [L819] 3 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd3 || b$w_buff1_used && b$r_buff1_thd3 ? (_Bool)0 : b$w_buff1_used [L820] 3 b$r_buff0_thd3 = b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$r_buff0_thd3 [L779] 2 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used [L780] 2 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd2 || b$w_buff1_used && b$r_buff1_thd2 ? (_Bool)0 : b$w_buff1_used [L781] 2 b$r_buff0_thd2 = b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$r_buff0_thd2 [L846] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L851] 0 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd0 ? (_Bool)0 : b$w_buff0_used [L852] 0 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd0 || b$w_buff1_used && b$r_buff1_thd0 ? (_Bool)0 : b$w_buff1_used [L853] 0 b$r_buff0_thd0 = b$w_buff0_used && b$r_buff0_thd0 ? (_Bool)0 : b$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 216.2s, OverallIterations: 39, TraceHistogramMax: 1, AutomataDifference: 52.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10034 SDtfs, 11598 SDslu, 35251 SDs, 0 SdLazy, 20535 SolverSat, 419 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 13.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 471 GetRequests, 59 SyntacticMatches, 21 SemanticMatches, 391 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1884 ImplicationChecksByTransitivity, 3.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=349791occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 144.3s AutomataMinimizationTime, 38 MinimizatonAttempts, 550026 StatesRemovedByMinimization, 36 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.2s InterpolantComputationTime, 1571 NumberOfCodeBlocks, 1571 NumberOfCodeBlocksAsserted, 39 NumberOfCheckSat, 1467 ConstructedInterpolants, 0 QuantifiedInterpolants, 670937 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 38 InterpolantComputations, 38 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...