./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix033_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix033_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 61fbd74819416f3a826c14a3a829d131719b7720 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:09:54,191 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:09:54,192 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:09:54,200 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:09:54,200 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:09:54,201 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:09:54,202 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:09:54,203 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:09:54,205 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:09:54,205 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:09:54,206 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:09:54,207 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:09:54,207 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:09:54,207 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:09:54,208 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:09:54,209 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:09:54,209 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:09:54,210 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:09:54,211 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:09:54,213 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:09:54,214 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:09:54,214 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:09:54,215 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:09:54,215 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:09:54,217 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:09:54,217 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:09:54,217 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:09:54,218 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:09:54,218 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:09:54,219 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:09:54,219 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:09:54,219 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:09:54,220 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:09:54,220 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:09:54,221 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:09:54,221 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:09:54,221 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:09:54,221 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:09:54,221 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:09:54,222 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:09:54,222 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:09:54,223 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 10:09:54,233 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:09:54,233 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:09:54,234 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 10:09:54,234 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 10:09:54,234 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 10:09:54,234 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:09:54,234 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:09:54,234 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:09:54,234 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:09:54,235 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:09:54,235 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:09:54,235 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:09:54,235 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:09:54,235 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:09:54,235 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:09:54,235 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:09:54,235 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:09:54,236 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:09:54,236 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 10:09:54,236 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:09:54,236 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:09:54,236 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:09:54,236 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:09:54,236 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:09:54,236 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:09:54,237 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 10:09:54,237 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:09:54,237 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:09:54,237 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:09:54,237 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 61fbd74819416f3a826c14a3a829d131719b7720 [2019-12-07 10:09:54,334 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:09:54,343 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:09:54,345 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:09:54,346 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:09:54,346 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:09:54,346 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix033_tso.oepc.i [2019-12-07 10:09:54,385 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/data/3ed1e5ffc/5c76ba2286474ff784b970ad6f0552f7/FLAGe7a5b4dec [2019-12-07 10:09:54,843 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:09:54,843 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/sv-benchmarks/c/pthread-wmm/mix033_tso.oepc.i [2019-12-07 10:09:54,854 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/data/3ed1e5ffc/5c76ba2286474ff784b970ad6f0552f7/FLAGe7a5b4dec [2019-12-07 10:09:54,862 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/data/3ed1e5ffc/5c76ba2286474ff784b970ad6f0552f7 [2019-12-07 10:09:54,864 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:09:54,865 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:09:54,866 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:09:54,866 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:09:54,868 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:09:54,868 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:09:54" (1/1) ... [2019-12-07 10:09:54,870 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:54, skipping insertion in model container [2019-12-07 10:09:54,870 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:09:54" (1/1) ... [2019-12-07 10:09:54,875 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:09:54,905 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:09:55,154 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:09:55,162 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:09:55,203 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:09:55,249 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:09:55,250 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55 WrapperNode [2019-12-07 10:09:55,250 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:09:55,250 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:09:55,250 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:09:55,250 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:09:55,257 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55" (1/1) ... [2019-12-07 10:09:55,269 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55" (1/1) ... [2019-12-07 10:09:55,291 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:09:55,291 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:09:55,291 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:09:55,291 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:09:55,298 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55" (1/1) ... [2019-12-07 10:09:55,298 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55" (1/1) ... [2019-12-07 10:09:55,301 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55" (1/1) ... [2019-12-07 10:09:55,301 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55" (1/1) ... [2019-12-07 10:09:55,309 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55" (1/1) ... [2019-12-07 10:09:55,311 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55" (1/1) ... [2019-12-07 10:09:55,314 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55" (1/1) ... [2019-12-07 10:09:55,317 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:09:55,317 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:09:55,317 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:09:55,317 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:09:55,318 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:09:55,359 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 10:09:55,359 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 10:09:55,359 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 10:09:55,360 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 10:09:55,360 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 10:09:55,360 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 10:09:55,360 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 10:09:55,360 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 10:09:55,360 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 10:09:55,360 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 10:09:55,360 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 10:09:55,360 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:09:55,360 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:09:55,361 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 10:09:55,739 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:09:55,739 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 10:09:55,741 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:09:55 BoogieIcfgContainer [2019-12-07 10:09:55,741 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:09:55,742 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:09:55,742 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:09:55,744 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:09:55,744 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:09:54" (1/3) ... [2019-12-07 10:09:55,745 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@753f2696 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:09:55, skipping insertion in model container [2019-12-07 10:09:55,745 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:09:55" (2/3) ... [2019-12-07 10:09:55,746 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@753f2696 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:09:55, skipping insertion in model container [2019-12-07 10:09:55,746 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:09:55" (3/3) ... [2019-12-07 10:09:55,747 INFO L109 eAbstractionObserver]: Analyzing ICFG mix033_tso.oepc.i [2019-12-07 10:09:55,754 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 10:09:55,754 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:09:55,759 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:09:55,760 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 10:09:55,783 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,783 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,783 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,783 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,784 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,784 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,784 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,784 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,784 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,784 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,784 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,784 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,785 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,785 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,785 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,785 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,785 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,785 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,785 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,785 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,785 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,786 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,786 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,786 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,786 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,786 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,786 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,786 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,786 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,787 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,787 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,788 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,788 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,788 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,788 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,788 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,788 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,789 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,789 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,789 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,789 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,790 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,790 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,790 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,790 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,790 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,790 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,791 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,791 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,791 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,791 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,791 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,792 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,792 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,792 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,792 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,792 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,792 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,792 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,793 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,793 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,793 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,793 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,793 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,794 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,794 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,794 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,794 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,794 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,795 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,795 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,795 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,795 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,795 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,795 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,796 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,796 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,796 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,796 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,796 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,796 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,796 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,797 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,797 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,797 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,797 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,797 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,797 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,798 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,798 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,798 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,798 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,798 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,798 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:09:55,811 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 10:09:55,823 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:09:55,824 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:09:55,824 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:09:55,824 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:09:55,824 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:09:55,824 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:09:55,824 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:09:55,824 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:09:55,836 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 10:09:55,837 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 10:09:55,891 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 10:09:55,892 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:09:55,902 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 578 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:09:55,916 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 10:09:55,946 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 10:09:55,947 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:09:55,951 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 578 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:09:55,965 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 10:09:55,966 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 10:09:59,089 WARN L192 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 10:09:59,185 INFO L206 etLargeBlockEncoding]: Checked pairs total: 82137 [2019-12-07 10:09:59,185 INFO L214 etLargeBlockEncoding]: Total number of compositions: 118 [2019-12-07 10:09:59,187 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 99 transitions [2019-12-07 10:10:10,857 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102312 states. [2019-12-07 10:10:10,858 INFO L276 IsEmpty]: Start isEmpty. Operand 102312 states. [2019-12-07 10:10:10,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 10:10:10,863 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:10,863 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 10:10:10,864 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:10,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:10,868 INFO L82 PathProgramCache]: Analyzing trace with hash 830375313, now seen corresponding path program 1 times [2019-12-07 10:10:10,873 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:10,874 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [660503616] [2019-12-07 10:10:10,874 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:10,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:11,028 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:11,028 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [660503616] [2019-12-07 10:10:11,029 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:11,029 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:10:11,030 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [592876854] [2019-12-07 10:10:11,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:10:11,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:11,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:10:11,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:10:11,044 INFO L87 Difference]: Start difference. First operand 102312 states. Second operand 3 states. [2019-12-07 10:10:11,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:11,766 INFO L93 Difference]: Finished difference Result 102012 states and 430324 transitions. [2019-12-07 10:10:11,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:10:11,768 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 10:10:11,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:12,345 INFO L225 Difference]: With dead ends: 102012 [2019-12-07 10:10:12,345 INFO L226 Difference]: Without dead ends: 99828 [2019-12-07 10:10:12,346 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:10:15,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99828 states. [2019-12-07 10:10:17,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99828 to 99828. [2019-12-07 10:10:17,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99828 states. [2019-12-07 10:10:17,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99828 states to 99828 states and 421406 transitions. [2019-12-07 10:10:17,652 INFO L78 Accepts]: Start accepts. Automaton has 99828 states and 421406 transitions. Word has length 5 [2019-12-07 10:10:17,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:17,652 INFO L462 AbstractCegarLoop]: Abstraction has 99828 states and 421406 transitions. [2019-12-07 10:10:17,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:10:17,653 INFO L276 IsEmpty]: Start isEmpty. Operand 99828 states and 421406 transitions. [2019-12-07 10:10:17,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 10:10:17,656 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:17,656 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:17,656 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:17,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:17,657 INFO L82 PathProgramCache]: Analyzing trace with hash 1614971329, now seen corresponding path program 1 times [2019-12-07 10:10:17,657 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:17,657 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [4128990] [2019-12-07 10:10:17,657 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:17,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:17,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:17,730 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [4128990] [2019-12-07 10:10:17,730 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:17,731 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:10:17,731 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [943016891] [2019-12-07 10:10:17,732 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:10:17,732 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:17,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:10:17,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:10:17,732 INFO L87 Difference]: Start difference. First operand 99828 states and 421406 transitions. Second operand 4 states. [2019-12-07 10:10:20,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:20,573 INFO L93 Difference]: Finished difference Result 160374 states and 648740 transitions. [2019-12-07 10:10:20,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:10:20,574 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 10:10:20,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:20,972 INFO L225 Difference]: With dead ends: 160374 [2019-12-07 10:10:20,972 INFO L226 Difference]: Without dead ends: 160325 [2019-12-07 10:10:20,973 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:10:25,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160325 states. [2019-12-07 10:10:27,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160325 to 147565. [2019-12-07 10:10:27,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147565 states. [2019-12-07 10:10:27,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147565 states to 147565 states and 602627 transitions. [2019-12-07 10:10:27,435 INFO L78 Accepts]: Start accepts. Automaton has 147565 states and 602627 transitions. Word has length 11 [2019-12-07 10:10:27,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:27,435 INFO L462 AbstractCegarLoop]: Abstraction has 147565 states and 602627 transitions. [2019-12-07 10:10:27,435 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:10:27,435 INFO L276 IsEmpty]: Start isEmpty. Operand 147565 states and 602627 transitions. [2019-12-07 10:10:27,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:10:27,439 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:27,439 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:27,439 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:27,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:27,440 INFO L82 PathProgramCache]: Analyzing trace with hash -1756735114, now seen corresponding path program 1 times [2019-12-07 10:10:27,440 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:27,440 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1443744779] [2019-12-07 10:10:27,440 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:27,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:27,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:27,496 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1443744779] [2019-12-07 10:10:27,496 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:27,496 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:10:27,496 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1971276734] [2019-12-07 10:10:27,497 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:10:27,497 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:27,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:10:27,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:10:27,497 INFO L87 Difference]: Start difference. First operand 147565 states and 602627 transitions. Second operand 4 states. [2019-12-07 10:10:28,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:28,783 INFO L93 Difference]: Finished difference Result 184357 states and 740248 transitions. [2019-12-07 10:10:28,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:10:28,784 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:10:28,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:29,217 INFO L225 Difference]: With dead ends: 184357 [2019-12-07 10:10:29,217 INFO L226 Difference]: Without dead ends: 184357 [2019-12-07 10:10:29,217 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:10:35,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184357 states. [2019-12-07 10:10:37,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184357 to 165298. [2019-12-07 10:10:37,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165298 states. [2019-12-07 10:10:38,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165298 states to 165298 states and 670224 transitions. [2019-12-07 10:10:38,366 INFO L78 Accepts]: Start accepts. Automaton has 165298 states and 670224 transitions. Word has length 13 [2019-12-07 10:10:38,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:38,367 INFO L462 AbstractCegarLoop]: Abstraction has 165298 states and 670224 transitions. [2019-12-07 10:10:38,367 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:10:38,367 INFO L276 IsEmpty]: Start isEmpty. Operand 165298 states and 670224 transitions. [2019-12-07 10:10:38,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:10:38,369 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:38,369 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:38,369 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:38,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:38,370 INFO L82 PathProgramCache]: Analyzing trace with hash -781051858, now seen corresponding path program 1 times [2019-12-07 10:10:38,370 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:38,370 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [810724981] [2019-12-07 10:10:38,370 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:38,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:38,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:38,414 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [810724981] [2019-12-07 10:10:38,414 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:38,414 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:10:38,414 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551238115] [2019-12-07 10:10:38,415 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:10:38,415 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:38,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:10:38,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:10:38,415 INFO L87 Difference]: Start difference. First operand 165298 states and 670224 transitions. Second operand 4 states. [2019-12-07 10:10:39,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:39,602 INFO L93 Difference]: Finished difference Result 227859 states and 907344 transitions. [2019-12-07 10:10:39,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:10:39,602 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:10:39,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:40,181 INFO L225 Difference]: With dead ends: 227859 [2019-12-07 10:10:40,181 INFO L226 Difference]: Without dead ends: 227796 [2019-12-07 10:10:40,181 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:10:45,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227796 states. [2019-12-07 10:10:50,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227796 to 186669. [2019-12-07 10:10:50,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186669 states. [2019-12-07 10:10:50,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186669 states to 186669 states and 756068 transitions. [2019-12-07 10:10:50,846 INFO L78 Accepts]: Start accepts. Automaton has 186669 states and 756068 transitions. Word has length 13 [2019-12-07 10:10:50,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:10:50,847 INFO L462 AbstractCegarLoop]: Abstraction has 186669 states and 756068 transitions. [2019-12-07 10:10:50,847 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:10:50,847 INFO L276 IsEmpty]: Start isEmpty. Operand 186669 states and 756068 transitions. [2019-12-07 10:10:50,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:10:50,867 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:10:50,867 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:10:50,867 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:10:50,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:10:50,867 INFO L82 PathProgramCache]: Analyzing trace with hash -1037669390, now seen corresponding path program 1 times [2019-12-07 10:10:50,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:10:50,868 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1524401063] [2019-12-07 10:10:50,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:10:50,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:10:50,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:10:50,938 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1524401063] [2019-12-07 10:10:50,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:10:50,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:10:50,939 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1475845977] [2019-12-07 10:10:50,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:10:50,939 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:10:50,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:10:50,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:10:50,939 INFO L87 Difference]: Start difference. First operand 186669 states and 756068 transitions. Second operand 5 states. [2019-12-07 10:10:52,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:10:52,795 INFO L93 Difference]: Finished difference Result 275655 states and 1090039 transitions. [2019-12-07 10:10:52,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:10:52,796 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 10:10:52,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:10:53,481 INFO L225 Difference]: With dead ends: 275655 [2019-12-07 10:10:53,481 INFO L226 Difference]: Without dead ends: 275592 [2019-12-07 10:10:53,481 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:10:59,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275592 states. [2019-12-07 10:11:04,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275592 to 196641. [2019-12-07 10:11:04,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196641 states. [2019-12-07 10:11:05,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196641 states to 196641 states and 792475 transitions. [2019-12-07 10:11:05,364 INFO L78 Accepts]: Start accepts. Automaton has 196641 states and 792475 transitions. Word has length 19 [2019-12-07 10:11:05,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:05,365 INFO L462 AbstractCegarLoop]: Abstraction has 196641 states and 792475 transitions. [2019-12-07 10:11:05,365 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:11:05,365 INFO L276 IsEmpty]: Start isEmpty. Operand 196641 states and 792475 transitions. [2019-12-07 10:11:05,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:11:05,380 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:05,380 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:05,380 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:05,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:05,381 INFO L82 PathProgramCache]: Analyzing trace with hash -1284927782, now seen corresponding path program 1 times [2019-12-07 10:11:05,381 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:05,381 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1327423136] [2019-12-07 10:11:05,381 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:05,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:05,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:05,442 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1327423136] [2019-12-07 10:11:05,442 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:05,442 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:11:05,442 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1849274297] [2019-12-07 10:11:05,442 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:11:05,442 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:05,443 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:11:05,443 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:11:05,443 INFO L87 Difference]: Start difference. First operand 196641 states and 792475 transitions. Second operand 5 states. [2019-12-07 10:11:07,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:07,368 INFO L93 Difference]: Finished difference Result 288100 states and 1135905 transitions. [2019-12-07 10:11:07,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:11:07,369 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 10:11:07,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:08,071 INFO L225 Difference]: With dead ends: 288100 [2019-12-07 10:11:08,071 INFO L226 Difference]: Without dead ends: 288037 [2019-12-07 10:11:08,071 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:11:14,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288037 states. [2019-12-07 10:11:17,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288037 to 201342. [2019-12-07 10:11:17,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201342 states. [2019-12-07 10:11:17,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201342 states to 201342 states and 809961 transitions. [2019-12-07 10:11:17,836 INFO L78 Accepts]: Start accepts. Automaton has 201342 states and 809961 transitions. Word has length 19 [2019-12-07 10:11:17,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:17,837 INFO L462 AbstractCegarLoop]: Abstraction has 201342 states and 809961 transitions. [2019-12-07 10:11:17,837 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:11:17,837 INFO L276 IsEmpty]: Start isEmpty. Operand 201342 states and 809961 transitions. [2019-12-07 10:11:17,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:11:17,851 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:17,851 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:17,851 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:17,851 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:17,851 INFO L82 PathProgramCache]: Analyzing trace with hash -1241691420, now seen corresponding path program 1 times [2019-12-07 10:11:17,852 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:17,852 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [626272547] [2019-12-07 10:11:17,852 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:17,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:17,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:17,907 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [626272547] [2019-12-07 10:11:17,907 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:17,907 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:11:17,907 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [509042354] [2019-12-07 10:11:17,908 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:11:17,908 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:17,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:11:17,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:11:17,908 INFO L87 Difference]: Start difference. First operand 201342 states and 809961 transitions. Second operand 5 states. [2019-12-07 10:11:20,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:20,115 INFO L93 Difference]: Finished difference Result 331188 states and 1307783 transitions. [2019-12-07 10:11:20,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:11:20,116 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 10:11:20,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:20,943 INFO L225 Difference]: With dead ends: 331188 [2019-12-07 10:11:20,943 INFO L226 Difference]: Without dead ends: 331048 [2019-12-07 10:11:20,943 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:11:30,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331048 states. [2019-12-07 10:11:34,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331048 to 225486. [2019-12-07 10:11:34,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225486 states. [2019-12-07 10:11:35,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225486 states to 225486 states and 906633 transitions. [2019-12-07 10:11:35,188 INFO L78 Accepts]: Start accepts. Automaton has 225486 states and 906633 transitions. Word has length 19 [2019-12-07 10:11:35,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:35,188 INFO L462 AbstractCegarLoop]: Abstraction has 225486 states and 906633 transitions. [2019-12-07 10:11:35,188 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:11:35,188 INFO L276 IsEmpty]: Start isEmpty. Operand 225486 states and 906633 transitions. [2019-12-07 10:11:35,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 10:11:35,241 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:35,241 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:35,241 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:35,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:35,241 INFO L82 PathProgramCache]: Analyzing trace with hash -118998244, now seen corresponding path program 1 times [2019-12-07 10:11:35,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:35,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832860708] [2019-12-07 10:11:35,242 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:35,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:35,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:35,267 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [832860708] [2019-12-07 10:11:35,267 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:35,268 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:11:35,268 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [858537078] [2019-12-07 10:11:35,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:11:35,268 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:35,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:11:35,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:35,269 INFO L87 Difference]: Start difference. First operand 225486 states and 906633 transitions. Second operand 3 states. [2019-12-07 10:11:35,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:35,401 INFO L93 Difference]: Finished difference Result 41834 states and 131488 transitions. [2019-12-07 10:11:35,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:11:35,402 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-07 10:11:35,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:35,455 INFO L225 Difference]: With dead ends: 41834 [2019-12-07 10:11:35,455 INFO L226 Difference]: Without dead ends: 41834 [2019-12-07 10:11:35,456 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:35,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41834 states. [2019-12-07 10:11:36,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41834 to 41834. [2019-12-07 10:11:36,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41834 states. [2019-12-07 10:11:36,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41834 states to 41834 states and 131488 transitions. [2019-12-07 10:11:36,123 INFO L78 Accepts]: Start accepts. Automaton has 41834 states and 131488 transitions. Word has length 25 [2019-12-07 10:11:36,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:36,123 INFO L462 AbstractCegarLoop]: Abstraction has 41834 states and 131488 transitions. [2019-12-07 10:11:36,123 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:11:36,123 INFO L276 IsEmpty]: Start isEmpty. Operand 41834 states and 131488 transitions. [2019-12-07 10:11:36,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 10:11:36,136 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:36,136 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:36,136 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:36,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:36,137 INFO L82 PathProgramCache]: Analyzing trace with hash 1864812213, now seen corresponding path program 1 times [2019-12-07 10:11:36,137 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:36,137 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884520348] [2019-12-07 10:11:36,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:36,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:36,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:36,176 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [884520348] [2019-12-07 10:11:36,176 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:36,176 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:11:36,177 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [83566869] [2019-12-07 10:11:36,177 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:11:36,177 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:36,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:11:36,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:11:36,177 INFO L87 Difference]: Start difference. First operand 41834 states and 131488 transitions. Second operand 4 states. [2019-12-07 10:11:36,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:36,208 INFO L93 Difference]: Finished difference Result 8545 states and 22826 transitions. [2019-12-07 10:11:36,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:11:36,209 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 10:11:36,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:36,216 INFO L225 Difference]: With dead ends: 8545 [2019-12-07 10:11:36,216 INFO L226 Difference]: Without dead ends: 8545 [2019-12-07 10:11:36,216 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:11:36,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8545 states. [2019-12-07 10:11:36,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8545 to 8377. [2019-12-07 10:11:36,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8377 states. [2019-12-07 10:11:36,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8377 states to 8377 states and 22346 transitions. [2019-12-07 10:11:36,315 INFO L78 Accepts]: Start accepts. Automaton has 8377 states and 22346 transitions. Word has length 31 [2019-12-07 10:11:36,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:36,316 INFO L462 AbstractCegarLoop]: Abstraction has 8377 states and 22346 transitions. [2019-12-07 10:11:36,316 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:11:36,316 INFO L276 IsEmpty]: Start isEmpty. Operand 8377 states and 22346 transitions. [2019-12-07 10:11:36,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 10:11:36,323 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:36,323 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:36,324 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:36,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:36,324 INFO L82 PathProgramCache]: Analyzing trace with hash -1376683013, now seen corresponding path program 1 times [2019-12-07 10:11:36,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:36,324 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [975651478] [2019-12-07 10:11:36,324 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:36,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:36,431 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:36,431 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [975651478] [2019-12-07 10:11:36,431 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:36,431 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:11:36,431 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1735475256] [2019-12-07 10:11:36,431 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:11:36,431 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:36,432 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:11:36,432 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:11:36,432 INFO L87 Difference]: Start difference. First operand 8377 states and 22346 transitions. Second operand 7 states. [2019-12-07 10:11:36,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:36,873 INFO L93 Difference]: Finished difference Result 10204 states and 26373 transitions. [2019-12-07 10:11:36,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 10:11:36,873 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 37 [2019-12-07 10:11:36,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:36,881 INFO L225 Difference]: With dead ends: 10204 [2019-12-07 10:11:36,881 INFO L226 Difference]: Without dead ends: 10204 [2019-12-07 10:11:36,882 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=128, Unknown=0, NotChecked=0, Total=182 [2019-12-07 10:11:36,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10204 states. [2019-12-07 10:11:36,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10204 to 7857. [2019-12-07 10:11:36,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7857 states. [2019-12-07 10:11:36,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7857 states to 7857 states and 20884 transitions. [2019-12-07 10:11:36,981 INFO L78 Accepts]: Start accepts. Automaton has 7857 states and 20884 transitions. Word has length 37 [2019-12-07 10:11:36,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:36,981 INFO L462 AbstractCegarLoop]: Abstraction has 7857 states and 20884 transitions. [2019-12-07 10:11:36,982 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:11:36,982 INFO L276 IsEmpty]: Start isEmpty. Operand 7857 states and 20884 transitions. [2019-12-07 10:11:36,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 10:11:36,986 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:36,986 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:36,986 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:36,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:36,986 INFO L82 PathProgramCache]: Analyzing trace with hash -138647957, now seen corresponding path program 2 times [2019-12-07 10:11:36,986 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:36,987 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1496247976] [2019-12-07 10:11:36,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:37,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:37,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:37,031 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1496247976] [2019-12-07 10:11:37,031 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:37,032 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:11:37,032 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [109094209] [2019-12-07 10:11:37,032 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:11:37,032 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:37,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:11:37,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:11:37,033 INFO L87 Difference]: Start difference. First operand 7857 states and 20884 transitions. Second operand 5 states. [2019-12-07 10:11:37,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:37,063 INFO L93 Difference]: Finished difference Result 5460 states and 15503 transitions. [2019-12-07 10:11:37,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:11:37,063 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-12-07 10:11:37,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:37,069 INFO L225 Difference]: With dead ends: 5460 [2019-12-07 10:11:37,070 INFO L226 Difference]: Without dead ends: 5460 [2019-12-07 10:11:37,070 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:11:37,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5460 states. [2019-12-07 10:11:37,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5460 to 4907. [2019-12-07 10:11:37,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4907 states. [2019-12-07 10:11:37,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4907 states to 4907 states and 14035 transitions. [2019-12-07 10:11:37,135 INFO L78 Accepts]: Start accepts. Automaton has 4907 states and 14035 transitions. Word has length 37 [2019-12-07 10:11:37,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:37,136 INFO L462 AbstractCegarLoop]: Abstraction has 4907 states and 14035 transitions. [2019-12-07 10:11:37,136 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:11:37,136 INFO L276 IsEmpty]: Start isEmpty. Operand 4907 states and 14035 transitions. [2019-12-07 10:11:37,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:11:37,140 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:37,140 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:37,140 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:37,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:37,140 INFO L82 PathProgramCache]: Analyzing trace with hash 863082331, now seen corresponding path program 1 times [2019-12-07 10:11:37,140 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:37,140 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300323232] [2019-12-07 10:11:37,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:37,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:37,190 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:37,191 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300323232] [2019-12-07 10:11:37,191 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:37,191 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:11:37,191 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1159415133] [2019-12-07 10:11:37,191 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:11:37,191 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:37,191 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:11:37,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:37,191 INFO L87 Difference]: Start difference. First operand 4907 states and 14035 transitions. Second operand 3 states. [2019-12-07 10:11:37,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:37,208 INFO L93 Difference]: Finished difference Result 4655 states and 13130 transitions. [2019-12-07 10:11:37,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:11:37,208 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 10:11:37,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:37,213 INFO L225 Difference]: With dead ends: 4655 [2019-12-07 10:11:37,213 INFO L226 Difference]: Without dead ends: 4655 [2019-12-07 10:11:37,214 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:37,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4655 states. [2019-12-07 10:11:37,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4655 to 4655. [2019-12-07 10:11:37,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4655 states. [2019-12-07 10:11:37,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4655 states to 4655 states and 13130 transitions. [2019-12-07 10:11:37,575 INFO L78 Accepts]: Start accepts. Automaton has 4655 states and 13130 transitions. Word has length 65 [2019-12-07 10:11:37,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:37,576 INFO L462 AbstractCegarLoop]: Abstraction has 4655 states and 13130 transitions. [2019-12-07 10:11:37,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:11:37,576 INFO L276 IsEmpty]: Start isEmpty. Operand 4655 states and 13130 transitions. [2019-12-07 10:11:37,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:11:37,579 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:37,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:37,579 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:37,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:37,579 INFO L82 PathProgramCache]: Analyzing trace with hash 1730486525, now seen corresponding path program 1 times [2019-12-07 10:11:37,579 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:37,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [734452520] [2019-12-07 10:11:37,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:37,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:37,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:37,635 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [734452520] [2019-12-07 10:11:37,636 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:37,636 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:11:37,636 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712830482] [2019-12-07 10:11:37,636 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:11:37,636 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:37,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:11:37,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:37,637 INFO L87 Difference]: Start difference. First operand 4655 states and 13130 transitions. Second operand 3 states. [2019-12-07 10:11:37,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:37,671 INFO L93 Difference]: Finished difference Result 4655 states and 13129 transitions. [2019-12-07 10:11:37,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:11:37,671 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 10:11:37,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:37,677 INFO L225 Difference]: With dead ends: 4655 [2019-12-07 10:11:37,677 INFO L226 Difference]: Without dead ends: 4655 [2019-12-07 10:11:37,677 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:37,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4655 states. [2019-12-07 10:11:37,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4655 to 4288. [2019-12-07 10:11:37,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4288 states. [2019-12-07 10:11:37,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4288 states to 4288 states and 12214 transitions. [2019-12-07 10:11:37,748 INFO L78 Accepts]: Start accepts. Automaton has 4288 states and 12214 transitions. Word has length 66 [2019-12-07 10:11:37,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:37,749 INFO L462 AbstractCegarLoop]: Abstraction has 4288 states and 12214 transitions. [2019-12-07 10:11:37,749 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:11:37,749 INFO L276 IsEmpty]: Start isEmpty. Operand 4288 states and 12214 transitions. [2019-12-07 10:11:37,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:11:37,752 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:37,752 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:37,752 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:37,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:37,752 INFO L82 PathProgramCache]: Analyzing trace with hash 486113497, now seen corresponding path program 1 times [2019-12-07 10:11:37,752 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:37,752 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [783879233] [2019-12-07 10:11:37,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:37,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:37,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:37,815 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [783879233] [2019-12-07 10:11:37,815 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:37,815 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:11:37,815 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1867141155] [2019-12-07 10:11:37,816 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:11:37,816 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:37,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:11:37,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:37,816 INFO L87 Difference]: Start difference. First operand 4288 states and 12214 transitions. Second operand 3 states. [2019-12-07 10:11:37,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:37,835 INFO L93 Difference]: Finished difference Result 4288 states and 12034 transitions. [2019-12-07 10:11:37,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:11:37,836 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 10:11:37,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:37,840 INFO L225 Difference]: With dead ends: 4288 [2019-12-07 10:11:37,840 INFO L226 Difference]: Without dead ends: 4288 [2019-12-07 10:11:37,841 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:11:37,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4288 states. [2019-12-07 10:11:37,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4288 to 4288. [2019-12-07 10:11:37,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4288 states. [2019-12-07 10:11:37,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4288 states to 4288 states and 12034 transitions. [2019-12-07 10:11:37,900 INFO L78 Accepts]: Start accepts. Automaton has 4288 states and 12034 transitions. Word has length 67 [2019-12-07 10:11:37,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:37,900 INFO L462 AbstractCegarLoop]: Abstraction has 4288 states and 12034 transitions. [2019-12-07 10:11:37,900 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:11:37,900 INFO L276 IsEmpty]: Start isEmpty. Operand 4288 states and 12034 transitions. [2019-12-07 10:11:37,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 10:11:37,904 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:37,904 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:37,904 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:37,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:37,904 INFO L82 PathProgramCache]: Analyzing trace with hash 1583995874, now seen corresponding path program 1 times [2019-12-07 10:11:37,904 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:37,904 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193460228] [2019-12-07 10:11:37,904 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:37,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:38,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:38,175 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193460228] [2019-12-07 10:11:38,175 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:38,175 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 10:11:38,175 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [522655892] [2019-12-07 10:11:38,175 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 10:11:38,175 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:38,175 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 10:11:38,176 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2019-12-07 10:11:38,176 INFO L87 Difference]: Start difference. First operand 4288 states and 12034 transitions. Second operand 16 states. [2019-12-07 10:11:39,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:39,205 INFO L93 Difference]: Finished difference Result 8308 states and 23020 transitions. [2019-12-07 10:11:39,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 10:11:39,206 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 68 [2019-12-07 10:11:39,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:39,212 INFO L225 Difference]: With dead ends: 8308 [2019-12-07 10:11:39,212 INFO L226 Difference]: Without dead ends: 7634 [2019-12-07 10:11:39,213 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 349 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=358, Invalid=1364, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 10:11:39,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7634 states. [2019-12-07 10:11:39,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7634 to 6038. [2019-12-07 10:11:39,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6038 states. [2019-12-07 10:11:39,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6038 states to 6038 states and 16820 transitions. [2019-12-07 10:11:39,292 INFO L78 Accepts]: Start accepts. Automaton has 6038 states and 16820 transitions. Word has length 68 [2019-12-07 10:11:39,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:39,292 INFO L462 AbstractCegarLoop]: Abstraction has 6038 states and 16820 transitions. [2019-12-07 10:11:39,292 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 10:11:39,293 INFO L276 IsEmpty]: Start isEmpty. Operand 6038 states and 16820 transitions. [2019-12-07 10:11:39,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 10:11:39,296 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:39,296 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:39,297 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:39,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:39,297 INFO L82 PathProgramCache]: Analyzing trace with hash -1734168910, now seen corresponding path program 2 times [2019-12-07 10:11:39,297 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:39,297 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [835845196] [2019-12-07 10:11:39,297 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:39,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:39,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:39,465 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [835845196] [2019-12-07 10:11:39,466 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:39,466 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 10:11:39,466 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [392067782] [2019-12-07 10:11:39,466 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 10:11:39,466 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:39,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 10:11:39,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:11:39,467 INFO L87 Difference]: Start difference. First operand 6038 states and 16820 transitions. Second operand 13 states. [2019-12-07 10:11:39,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:39,813 INFO L93 Difference]: Finished difference Result 9522 states and 26476 transitions. [2019-12-07 10:11:39,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 10:11:39,814 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 68 [2019-12-07 10:11:39,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:39,821 INFO L225 Difference]: With dead ends: 9522 [2019-12-07 10:11:39,821 INFO L226 Difference]: Without dead ends: 9496 [2019-12-07 10:11:39,822 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=409, Unknown=0, NotChecked=0, Total=506 [2019-12-07 10:11:39,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9496 states. [2019-12-07 10:11:39,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9496 to 6284. [2019-12-07 10:11:39,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6284 states. [2019-12-07 10:11:39,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6284 states to 6284 states and 17536 transitions. [2019-12-07 10:11:39,912 INFO L78 Accepts]: Start accepts. Automaton has 6284 states and 17536 transitions. Word has length 68 [2019-12-07 10:11:39,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:39,913 INFO L462 AbstractCegarLoop]: Abstraction has 6284 states and 17536 transitions. [2019-12-07 10:11:39,913 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 10:11:39,913 INFO L276 IsEmpty]: Start isEmpty. Operand 6284 states and 17536 transitions. [2019-12-07 10:11:39,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 10:11:39,917 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:39,917 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:39,917 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:39,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:39,917 INFO L82 PathProgramCache]: Analyzing trace with hash 1138948950, now seen corresponding path program 3 times [2019-12-07 10:11:39,917 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:39,918 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2130363037] [2019-12-07 10:11:39,918 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:39,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:11:40,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:11:40,133 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2130363037] [2019-12-07 10:11:40,133 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:11:40,133 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 10:11:40,134 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [794963939] [2019-12-07 10:11:40,134 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 10:11:40,134 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:11:40,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 10:11:40,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2019-12-07 10:11:40,134 INFO L87 Difference]: Start difference. First operand 6284 states and 17536 transitions. Second operand 15 states. [2019-12-07 10:11:40,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:11:40,857 INFO L93 Difference]: Finished difference Result 10563 states and 29469 transitions. [2019-12-07 10:11:40,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 10:11:40,857 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 68 [2019-12-07 10:11:40,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:11:40,867 INFO L225 Difference]: With dead ends: 10563 [2019-12-07 10:11:40,868 INFO L226 Difference]: Without dead ends: 10537 [2019-12-07 10:11:40,868 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=169, Invalid=761, Unknown=0, NotChecked=0, Total=930 [2019-12-07 10:11:40,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10537 states. [2019-12-07 10:11:40,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10537 to 6361. [2019-12-07 10:11:40,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6361 states. [2019-12-07 10:11:40,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6361 states to 6361 states and 17707 transitions. [2019-12-07 10:11:40,969 INFO L78 Accepts]: Start accepts. Automaton has 6361 states and 17707 transitions. Word has length 68 [2019-12-07 10:11:40,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:11:40,970 INFO L462 AbstractCegarLoop]: Abstraction has 6361 states and 17707 transitions. [2019-12-07 10:11:40,970 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 10:11:40,970 INFO L276 IsEmpty]: Start isEmpty. Operand 6361 states and 17707 transitions. [2019-12-07 10:11:40,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 10:11:40,975 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:11:40,975 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:11:40,975 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:11:40,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:11:40,975 INFO L82 PathProgramCache]: Analyzing trace with hash 829115294, now seen corresponding path program 4 times [2019-12-07 10:11:40,975 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:11:40,975 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107507414] [2019-12-07 10:11:40,975 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:11:40,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:11:41,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:11:41,057 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 10:11:41,057 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:11:41,060 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] ULTIMATE.startENTRY-->L827: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t891~0.base_24| 4) |v_#length_21|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t891~0.base_24|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t891~0.base_24|)) (= 0 v_~__unbuffered_p1_EAX~0_77) (= v_~__unbuffered_cnt~0_133 0) (= 0 |v_ULTIMATE.start_main_~#t891~0.offset_17|) (= |v_#NULL.offset_7| 0) (= 0 v_~x~0_162) (= v_~a~0_11 0) (= v_~x$r_buff1_thd0~0_242 0) (= v_~x$mem_tmp~0_19 0) (= v_~x$r_buff1_thd1~0_183 0) (= 0 v_~x$r_buff1_thd2~0_137) (= 0 v_~x$r_buff0_thd2~0_211) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t891~0.base_24| 1)) (= v_~main$tmp_guard0~0_27 0) (= v_~x$r_buff0_thd0~0_328 0) (= v_~main$tmp_guard1~0_21 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y~0_70 0) (= 0 v_~x$r_buff0_thd3~0_142) (= 0 v_~weak$$choice2~0_94) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~x$w_buff0~0_417) (= v_~x$r_buff0_thd1~0_166 0) (= v_~x$flush_delayed~0_36 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$r_buff1_thd3~0_132) (= 0 v_~x$read_delayed_var~0.offset_8) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t891~0.base_24| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t891~0.base_24|) |v_ULTIMATE.start_main_~#t891~0.offset_17| 0)) |v_#memory_int_17|) (= 0 |v_#NULL.base_7|) (= 0 v_~x$w_buff1_used~0_523) (= 0 v_~weak$$choice0~0_13) (= v_~b~0_19 0) (= v_~__unbuffered_p2_EBX~0_19 0) (= v_~z~0_71 0) (= 0 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p1_EBX~0_78 0) (= 0 v_~x$w_buff1~0_278) (= 0 v_~x$w_buff0_used~0_807))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_19|, ~x$w_buff0~0=v_~x$w_buff0~0_417, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_39|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_37|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_24|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_33|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_183, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_142, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_43|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_23|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_27|, ~a~0=v_~a~0_11, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_77, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_328, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_19, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_36|, ~x$w_buff1~0=v_~x$w_buff1~0_278, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_25|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_523, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_137, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_30|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_77|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_142|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_133, ~x~0=v_~x~0_162, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_166, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_19|, ULTIMATE.start_main_~#t893~0.base=|v_ULTIMATE.start_main_~#t893~0.base_18|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_29|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_24|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_132, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_109|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_20|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_86|, ULTIMATE.start_main_~#t891~0.offset=|v_ULTIMATE.start_main_~#t891~0.offset_17|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~y~0=v_~y~0_70, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_8|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_78, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_~#t891~0.base=|v_ULTIMATE.start_main_~#t891~0.base_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_24|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_34|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_27, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_242, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_211, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_43|, ULTIMATE.start_main_~#t893~0.offset=|v_ULTIMATE.start_main_~#t893~0.offset_14|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_21|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_807, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_84|, ULTIMATE.start_main_~#t892~0.base=|v_ULTIMATE.start_main_~#t892~0.base_20|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ~b~0=v_~b~0_19, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_71, ULTIMATE.start_main_~#t892~0.offset=|v_ULTIMATE.start_main_~#t892~0.offset_15|, ~weak$$choice2~0=v_~weak$$choice2~0_94, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_~#t893~0.base, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t891~0.offset, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t891~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t893~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t892~0.base, ~x$read_delayed_var~0.offset, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ULTIMATE.start_main_~#t892~0.offset, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 10:11:41,060 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L827-1-->L829: Formula: (and (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t892~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t892~0.base_10|) |v_ULTIMATE.start_main_~#t892~0.offset_10| 1))) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t892~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t892~0.base_10| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t892~0.base_10|) (= 0 |v_ULTIMATE.start_main_~#t892~0.offset_10|) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t892~0.base_10| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t892~0.base_10| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t892~0.base=|v_ULTIMATE.start_main_~#t892~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_5|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t892~0.offset=|v_ULTIMATE.start_main_~#t892~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t892~0.base, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t892~0.offset] because there is no mapped edge [2019-12-07 10:11:41,061 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L829-1-->L831: Formula: (and (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t893~0.base_12| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t893~0.base_12| 4)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t893~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t893~0.base_12|) |v_ULTIMATE.start_main_~#t893~0.offset_10| 2))) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t893~0.base_12|) (= |v_ULTIMATE.start_main_~#t893~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t893~0.base_12|)) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t893~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t893~0.base=|v_ULTIMATE.start_main_~#t893~0.base_12|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t893~0.offset=|v_ULTIMATE.start_main_~#t893~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t893~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t893~0.offset] because there is no mapped edge [2019-12-07 10:11:41,061 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L4-->L778: Formula: (and (= ~x$r_buff1_thd3~0_Out613902896 ~x$r_buff0_thd3~0_In613902896) (= ~y~0_Out613902896 1) (= ~x$r_buff0_thd2~0_In613902896 ~x$r_buff1_thd2~0_Out613902896) (= ~x$r_buff0_thd0~0_In613902896 ~x$r_buff1_thd0~0_Out613902896) (= ~__unbuffered_p1_EBX~0_Out613902896 ~z~0_In613902896) (= ~x$r_buff1_thd1~0_Out613902896 ~x$r_buff0_thd1~0_In613902896) (not (= P1Thread1of1ForFork2___VERIFIER_assert_~expression_In613902896 0)) (= ~__unbuffered_p1_EAX~0_Out613902896 ~y~0_Out613902896) (= ~x$r_buff0_thd2~0_Out613902896 1)) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In613902896, P1Thread1of1ForFork2___VERIFIER_assert_~expression=P1Thread1of1ForFork2___VERIFIER_assert_~expression_In613902896, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In613902896, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In613902896, ~z~0=~z~0_In613902896, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In613902896} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In613902896, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In613902896, ~__unbuffered_p1_EBX~0=~__unbuffered_p1_EBX~0_Out613902896, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_Out613902896, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out613902896, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out613902896, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In613902896, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out613902896, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out613902896, P1Thread1of1ForFork2___VERIFIER_assert_~expression=P1Thread1of1ForFork2___VERIFIER_assert_~expression_In613902896, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_Out613902896, ~z~0=~z~0_In613902896, ~y~0=~y~0_Out613902896} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd3~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0, ~y~0] because there is no mapped edge [2019-12-07 10:11:41,062 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In948779664 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In948779664 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out948779664| ~x$w_buff0_used~0_In948779664) (or .cse0 .cse1)) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out948779664| 0) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In948779664, ~x$w_buff0_used~0=~x$w_buff0_used~0_In948779664} OutVars{P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out948779664|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In948779664, ~x$w_buff0_used~0=~x$w_buff0_used~0_In948779664} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:11:41,062 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L804-2-->L804-4: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1869498397 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1869498397 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1869498397 |P2Thread1of1ForFork0_#t~ite15_Out-1869498397|)) (and (= ~x~0_In-1869498397 |P2Thread1of1ForFork0_#t~ite15_Out-1869498397|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1869498397, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1869498397, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1869498397, ~x~0=~x~0_In-1869498397} OutVars{P2Thread1of1ForFork0_#t~ite15=|P2Thread1of1ForFork0_#t~ite15_Out-1869498397|, ~x$w_buff1~0=~x$w_buff1~0_In-1869498397, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1869498397, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1869498397, ~x~0=~x~0_In-1869498397} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite15] because there is no mapped edge [2019-12-07 10:11:41,063 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L804-4-->L805: Formula: (= v_~x~0_17 |v_P2Thread1of1ForFork0_#t~ite15_6|) InVars {P2Thread1of1ForFork0_#t~ite15=|v_P2Thread1of1ForFork0_#t~ite15_6|} OutVars{P2Thread1of1ForFork0_#t~ite15=|v_P2Thread1of1ForFork0_#t~ite15_5|, P2Thread1of1ForFork0_#t~ite16=|v_P2Thread1of1ForFork0_#t~ite16_5|, ~x~0=v_~x~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite15, P2Thread1of1ForFork0_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 10:11:41,063 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L805-->L805-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In84704927 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In84704927 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite17_Out84704927|)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In84704927 |P2Thread1of1ForFork0_#t~ite17_Out84704927|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In84704927, ~x$w_buff0_used~0=~x$w_buff0_used~0_In84704927} OutVars{P2Thread1of1ForFork0_#t~ite17=|P2Thread1of1ForFork0_#t~ite17_Out84704927|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In84704927, ~x$w_buff0_used~0=~x$w_buff0_used~0_In84704927} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite17] because there is no mapped edge [2019-12-07 10:11:41,063 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L806-->L806-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In-884796192 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-884796192 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-884796192 256))) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-884796192 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite18_Out-884796192| ~x$w_buff1_used~0_In-884796192)) (and (= |P2Thread1of1ForFork0_#t~ite18_Out-884796192| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-884796192, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-884796192, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-884796192, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-884796192} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-884796192, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-884796192, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-884796192, P2Thread1of1ForFork0_#t~ite18=|P2Thread1of1ForFork0_#t~ite18_Out-884796192|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-884796192} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite18] because there is no mapped edge [2019-12-07 10:11:41,063 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L807-->L807-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1040048153 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In1040048153 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite19_Out1040048153| ~x$r_buff0_thd3~0_In1040048153) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite19_Out1040048153| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1040048153, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1040048153} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1040048153, P2Thread1of1ForFork0_#t~ite19=|P2Thread1of1ForFork0_#t~ite19_Out1040048153|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1040048153} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite19] because there is no mapped edge [2019-12-07 10:11:41,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L808-->L808-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In-1264221139 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-1264221139 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1264221139 256))) (.cse0 (= (mod ~x$r_buff1_thd3~0_In-1264221139 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite20_Out-1264221139| 0)) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite20_Out-1264221139| ~x$r_buff1_thd3~0_In-1264221139) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1264221139, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1264221139, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1264221139, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1264221139} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1264221139, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1264221139, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1264221139, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1264221139|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1264221139} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 10:11:41,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L808-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_80 1) v_~__unbuffered_cnt~0_79) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~x$r_buff1_thd3~0_64 |v_P2Thread1of1ForFork0_#t~ite20_34|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P2Thread1of1ForFork0_#t~ite20=|v_P2Thread1of1ForFork0_#t~ite20_34|} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_64, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, P2Thread1of1ForFork0_#t~ite20=|v_P2Thread1of1ForFork0_#t~ite20_33|, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#t~ite20, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:11:41,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L743-2-->L743-5: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd1~0_In320459617 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In320459617 256))) (.cse0 (= |P0Thread1of1ForFork1_#t~ite4_Out320459617| |P0Thread1of1ForFork1_#t~ite3_Out320459617|))) (or (and (= |P0Thread1of1ForFork1_#t~ite3_Out320459617| ~x~0_In320459617) .cse0 (or .cse1 .cse2)) (and (= ~x$w_buff1~0_In320459617 |P0Thread1of1ForFork1_#t~ite3_Out320459617|) (not .cse1) (not .cse2) .cse0))) InVars {~x$w_buff1~0=~x$w_buff1~0_In320459617, ~x$w_buff1_used~0=~x$w_buff1_used~0_In320459617, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In320459617, ~x~0=~x~0_In320459617} OutVars{P0Thread1of1ForFork1_#t~ite4=|P0Thread1of1ForFork1_#t~ite4_Out320459617|, P0Thread1of1ForFork1_#t~ite3=|P0Thread1of1ForFork1_#t~ite3_Out320459617|, ~x$w_buff1~0=~x$w_buff1~0_In320459617, ~x$w_buff1_used~0=~x$w_buff1_used~0_In320459617, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In320459617, ~x~0=~x~0_In320459617} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite4, P0Thread1of1ForFork1_#t~ite3] because there is no mapped edge [2019-12-07 10:11:41,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd2~0_In817313008 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In817313008 256))) (.cse3 (= (mod ~x$r_buff0_thd2~0_In817313008 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In817313008 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out817313008| ~x$w_buff1_used~0_In817313008) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite12_Out817313008| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In817313008, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In817313008, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In817313008, ~x$w_buff0_used~0=~x$w_buff0_used~0_In817313008} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In817313008, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In817313008, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out817313008|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In817313008, ~x$w_buff0_used~0=~x$w_buff0_used~0_In817313008} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 10:11:41,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L781-->L782: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In1453701066 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In1453701066 256) 0)) (.cse0 (= ~x$r_buff0_thd2~0_Out1453701066 ~x$r_buff0_thd2~0_In1453701066))) (or (and .cse0 .cse1) (and (= ~x$r_buff0_thd2~0_Out1453701066 0) (not .cse2) (not .cse1)) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1453701066, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1453701066} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1453701066, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1453701066|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1453701066} AuxVars[] AssignedVars[~x$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 10:11:41,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L782-->L782-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In-202972429 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd2~0_In-202972429 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-202972429 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-202972429 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-202972429| ~x$r_buff1_thd2~0_In-202972429) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-202972429| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-202972429, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-202972429, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-202972429, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-202972429} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-202972429, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-202972429, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-202972429|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-202972429, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-202972429} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 10:11:41,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= v_~x$r_buff1_thd2~0_58 |v_P1Thread1of1ForFork2_#t~ite14_40|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_40|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_58, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_39|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:11:41,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L744-->L744-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1682304136 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1682304136 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1682304136 |P0Thread1of1ForFork1_#t~ite5_Out-1682304136|)) (and (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out-1682304136| 0) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1682304136, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1682304136} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1682304136|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1682304136, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1682304136} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 10:11:41,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L745-->L745-2: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd1~0_In-775687214 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-775687214 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-775687214 256))) (.cse2 (= (mod ~x$r_buff0_thd1~0_In-775687214 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-775687214| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork1_#t~ite6_Out-775687214| ~x$w_buff1_used~0_In-775687214)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-775687214, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-775687214, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-775687214, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-775687214} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-775687214, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-775687214|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-775687214, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-775687214, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-775687214} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 10:11:41,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L746-->L746-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-740025544 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-740025544 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite7_Out-740025544| ~x$r_buff0_thd1~0_In-740025544) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite7_Out-740025544| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-740025544, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-740025544} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-740025544, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-740025544|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-740025544} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-12-07 10:11:41,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L747-->L747-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In1048682283 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1048682283 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1048682283 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1048682283 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1048682283| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out1048682283| ~x$r_buff1_thd1~0_In1048682283)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1048682283, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1048682283, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1048682283, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1048682283} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1048682283, P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1048682283|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1048682283, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1048682283, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1048682283} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 10:11:41,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L747-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~x$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_30|) (= v_~__unbuffered_cnt~0_67 (+ v_~__unbuffered_cnt~0_68 1))) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_29|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_67} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 10:11:41,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L831-1-->L837: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:11:41,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L837-2-->L837-5: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In964303952 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite25_Out964303952| |ULTIMATE.start_main_#t~ite24_Out964303952|)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In964303952 256) 0))) (or (and .cse0 (= ~x~0_In964303952 |ULTIMATE.start_main_#t~ite24_Out964303952|) (or .cse1 .cse2)) (and (not .cse1) (= ~x$w_buff1~0_In964303952 |ULTIMATE.start_main_#t~ite24_Out964303952|) .cse0 (not .cse2)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In964303952, ~x$w_buff1_used~0=~x$w_buff1_used~0_In964303952, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In964303952, ~x~0=~x~0_In964303952} OutVars{~x$w_buff1~0=~x$w_buff1~0_In964303952, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out964303952|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out964303952|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In964303952, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In964303952, ~x~0=~x~0_In964303952} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 10:11:41,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L838-->L838-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-760637057 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-760637057 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite26_Out-760637057| 0)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-760637057 |ULTIMATE.start_main_#t~ite26_Out-760637057|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-760637057, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-760637057} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-760637057, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-760637057|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-760637057} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 10:11:41,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L839-->L839-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In1750399198 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In1750399198 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In1750399198 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1750399198 256)))) (or (and (= ~x$w_buff1_used~0_In1750399198 |ULTIMATE.start_main_#t~ite27_Out1750399198|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |ULTIMATE.start_main_#t~ite27_Out1750399198|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1750399198, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1750399198, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1750399198, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1750399198} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1750399198, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1750399198, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out1750399198|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1750399198, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1750399198} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 10:11:41,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L840-->L840-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1275327414 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1275327414 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite28_Out1275327414| 0)) (and (= |ULTIMATE.start_main_#t~ite28_Out1275327414| ~x$r_buff0_thd0~0_In1275327414) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1275327414, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1275327414} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1275327414, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1275327414|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1275327414} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 10:11:41,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1532984890 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In1532984890 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In1532984890 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In1532984890 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite29_Out1532984890| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite29_Out1532984890| ~x$r_buff1_thd0~0_In1532984890)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1532984890, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1532984890, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1532984890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1532984890} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1532984890, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1532984890|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1532984890, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1532984890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1532984890} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 10:11:41,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L849-->L849-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In481838987 256)))) (or (and (= |ULTIMATE.start_main_#t~ite36_Out481838987| ~x$w_buff0~0_In481838987) (not .cse0) (= |ULTIMATE.start_main_#t~ite35_In481838987| |ULTIMATE.start_main_#t~ite35_Out481838987|)) (and (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In481838987 256)))) (or (and (= (mod ~x$w_buff1_used~0_In481838987 256) 0) .cse1) (= (mod ~x$w_buff0_used~0_In481838987 256) 0) (and .cse1 (= (mod ~x$r_buff1_thd0~0_In481838987 256) 0)))) .cse0 (= |ULTIMATE.start_main_#t~ite35_Out481838987| ~x$w_buff0~0_In481838987) (= |ULTIMATE.start_main_#t~ite36_Out481838987| |ULTIMATE.start_main_#t~ite35_Out481838987|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In481838987, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In481838987, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In481838987|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In481838987, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In481838987, ~weak$$choice2~0=~weak$$choice2~0_In481838987, ~x$w_buff0_used~0=~x$w_buff0_used~0_In481838987} OutVars{~x$w_buff0~0=~x$w_buff0~0_In481838987, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In481838987, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out481838987|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out481838987|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In481838987, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In481838987, ~weak$$choice2~0=~weak$$choice2~0_In481838987, ~x$w_buff0_used~0=~x$w_buff0_used~0_In481838987} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 10:11:41,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L850-->L850-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1126836859 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_Out1126836859| ~x$w_buff1~0_In1126836859) (= |ULTIMATE.start_main_#t~ite38_In1126836859| |ULTIMATE.start_main_#t~ite38_Out1126836859|)) (and (= |ULTIMATE.start_main_#t~ite39_Out1126836859| |ULTIMATE.start_main_#t~ite38_Out1126836859|) (= |ULTIMATE.start_main_#t~ite38_Out1126836859| ~x$w_buff1~0_In1126836859) .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In1126836859 256) 0))) (or (= (mod ~x$w_buff0_used~0_In1126836859 256) 0) (and (= (mod ~x$w_buff1_used~0_In1126836859 256) 0) .cse1) (and (= (mod ~x$r_buff1_thd0~0_In1126836859 256) 0) .cse1)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1126836859, ~x$w_buff1~0=~x$w_buff1~0_In1126836859, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1126836859, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1126836859|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1126836859, ~weak$$choice2~0=~weak$$choice2~0_In1126836859, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1126836859} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1126836859, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1126836859|, ~x$w_buff1~0=~x$w_buff1~0_In1126836859, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1126836859, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1126836859|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1126836859, ~weak$$choice2~0=~weak$$choice2~0_In1126836859, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1126836859} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 10:11:41,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L851-->L851-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-639249480 256)))) (or (and .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-639249480 256) 0))) (or (and .cse1 (= (mod ~x$r_buff1_thd0~0_In-639249480 256) 0)) (and (= 0 (mod ~x$w_buff1_used~0_In-639249480 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-639249480 256)))) (= ~x$w_buff0_used~0_In-639249480 |ULTIMATE.start_main_#t~ite41_Out-639249480|) (= |ULTIMATE.start_main_#t~ite41_Out-639249480| |ULTIMATE.start_main_#t~ite42_Out-639249480|)) (and (= ~x$w_buff0_used~0_In-639249480 |ULTIMATE.start_main_#t~ite42_Out-639249480|) (not .cse0) (= |ULTIMATE.start_main_#t~ite41_In-639249480| |ULTIMATE.start_main_#t~ite41_Out-639249480|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-639249480, ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In-639249480|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-639249480, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-639249480, ~weak$$choice2~0=~weak$$choice2~0_In-639249480, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-639249480} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-639249480, ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-639249480|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-639249480, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-639249480, ~weak$$choice2~0=~weak$$choice2~0_In-639249480, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-639249480|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-639249480} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 10:11:41,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L853-->L854: Formula: (and (= v_~x$r_buff0_thd0~0_126 v_~x$r_buff0_thd0~0_125) (not (= 0 (mod v_~weak$$choice2~0_24 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_126, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_24} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:11:41,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L854-->L854-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-113996698 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out-113996698| ~x$r_buff1_thd0~0_In-113996698) (= |ULTIMATE.start_main_#t~ite50_In-113996698| |ULTIMATE.start_main_#t~ite50_Out-113996698|) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite51_Out-113996698| |ULTIMATE.start_main_#t~ite50_Out-113996698|) (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-113996698 256) 0))) (or (and .cse1 (= (mod ~x$r_buff1_thd0~0_In-113996698 256) 0)) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In-113996698 256))) (= (mod ~x$w_buff0_used~0_In-113996698 256) 0))) .cse0 (= ~x$r_buff1_thd0~0_In-113996698 |ULTIMATE.start_main_#t~ite50_Out-113996698|)))) InVars {ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_In-113996698|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-113996698, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-113996698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-113996698, ~weak$$choice2~0=~weak$$choice2~0_In-113996698, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-113996698} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-113996698|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-113996698, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-113996698|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-113996698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-113996698, ~weak$$choice2~0=~weak$$choice2~0_In-113996698, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-113996698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:11:41,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L856-->L859-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_11 256)) (= v_~x$mem_tmp~0_14 v_~x~0_125) (not (= 0 (mod v_~x$flush_delayed~0_29 256))) (= v_~x$flush_delayed~0_28 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_29, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_14} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_28|, ~x$flush_delayed~0=v_~x$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_14, ~x~0=v_~x~0_125, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:11:41,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L859-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 10:11:41,125 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:11:41 BasicIcfg [2019-12-07 10:11:41,125 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:11:41,126 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:11:41,126 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:11:41,126 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:11:41,126 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:09:55" (3/4) ... [2019-12-07 10:11:41,128 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:11:41,128 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] ULTIMATE.startENTRY-->L827: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t891~0.base_24| 4) |v_#length_21|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t891~0.base_24|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t891~0.base_24|)) (= 0 v_~__unbuffered_p1_EAX~0_77) (= v_~__unbuffered_cnt~0_133 0) (= 0 |v_ULTIMATE.start_main_~#t891~0.offset_17|) (= |v_#NULL.offset_7| 0) (= 0 v_~x~0_162) (= v_~a~0_11 0) (= v_~x$r_buff1_thd0~0_242 0) (= v_~x$mem_tmp~0_19 0) (= v_~x$r_buff1_thd1~0_183 0) (= 0 v_~x$r_buff1_thd2~0_137) (= 0 v_~x$r_buff0_thd2~0_211) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t891~0.base_24| 1)) (= v_~main$tmp_guard0~0_27 0) (= v_~x$r_buff0_thd0~0_328 0) (= v_~main$tmp_guard1~0_21 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y~0_70 0) (= 0 v_~x$r_buff0_thd3~0_142) (= 0 v_~weak$$choice2~0_94) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~x$w_buff0~0_417) (= v_~x$r_buff0_thd1~0_166 0) (= v_~x$flush_delayed~0_36 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$r_buff1_thd3~0_132) (= 0 v_~x$read_delayed_var~0.offset_8) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t891~0.base_24| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t891~0.base_24|) |v_ULTIMATE.start_main_~#t891~0.offset_17| 0)) |v_#memory_int_17|) (= 0 |v_#NULL.base_7|) (= 0 v_~x$w_buff1_used~0_523) (= 0 v_~weak$$choice0~0_13) (= v_~b~0_19 0) (= v_~__unbuffered_p2_EBX~0_19 0) (= v_~z~0_71 0) (= 0 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p1_EBX~0_78 0) (= 0 v_~x$w_buff1~0_278) (= 0 v_~x$w_buff0_used~0_807))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_19|, ~x$w_buff0~0=v_~x$w_buff0~0_417, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_39|, ~x$flush_delayed~0=v_~x$flush_delayed~0_36, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_37|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_24|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_33|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_183, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_142, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_43|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_23|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_27|, ~a~0=v_~a~0_11, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_77, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_328, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_19, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_36|, ~x$w_buff1~0=v_~x$w_buff1~0_278, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_25|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_523, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_137, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_30|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_77|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_142|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_133, ~x~0=v_~x~0_162, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_166, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_19|, ULTIMATE.start_main_~#t893~0.base=|v_ULTIMATE.start_main_~#t893~0.base_18|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_29|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_24|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_132, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_109|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_20|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_86|, ULTIMATE.start_main_~#t891~0.offset=|v_ULTIMATE.start_main_~#t891~0.offset_17|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~y~0=v_~y~0_70, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_8|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_78, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_~#t891~0.base=|v_ULTIMATE.start_main_~#t891~0.base_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_24|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_34|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_27, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_242, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_211, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_43|, ULTIMATE.start_main_~#t893~0.offset=|v_ULTIMATE.start_main_~#t893~0.offset_14|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_21|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_807, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_84|, ULTIMATE.start_main_~#t892~0.base=|v_ULTIMATE.start_main_~#t892~0.base_20|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ~b~0=v_~b~0_19, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_71, ULTIMATE.start_main_~#t892~0.offset=|v_ULTIMATE.start_main_~#t892~0.offset_15|, ~weak$$choice2~0=v_~weak$$choice2~0_94, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_~#t893~0.base, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t891~0.offset, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t891~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t893~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t892~0.base, ~x$read_delayed_var~0.offset, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ULTIMATE.start_main_~#t892~0.offset, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 10:11:41,128 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L827-1-->L829: Formula: (and (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t892~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t892~0.base_10|) |v_ULTIMATE.start_main_~#t892~0.offset_10| 1))) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t892~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t892~0.base_10| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t892~0.base_10|) (= 0 |v_ULTIMATE.start_main_~#t892~0.offset_10|) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t892~0.base_10| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t892~0.base_10| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t892~0.base=|v_ULTIMATE.start_main_~#t892~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_5|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t892~0.offset=|v_ULTIMATE.start_main_~#t892~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t892~0.base, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t892~0.offset] because there is no mapped edge [2019-12-07 10:11:41,129 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L829-1-->L831: Formula: (and (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t893~0.base_12| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t893~0.base_12| 4)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t893~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t893~0.base_12|) |v_ULTIMATE.start_main_~#t893~0.offset_10| 2))) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t893~0.base_12|) (= |v_ULTIMATE.start_main_~#t893~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t893~0.base_12|)) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t893~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t893~0.base=|v_ULTIMATE.start_main_~#t893~0.base_12|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t893~0.offset=|v_ULTIMATE.start_main_~#t893~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t893~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t893~0.offset] because there is no mapped edge [2019-12-07 10:11:41,129 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L4-->L778: Formula: (and (= ~x$r_buff1_thd3~0_Out613902896 ~x$r_buff0_thd3~0_In613902896) (= ~y~0_Out613902896 1) (= ~x$r_buff0_thd2~0_In613902896 ~x$r_buff1_thd2~0_Out613902896) (= ~x$r_buff0_thd0~0_In613902896 ~x$r_buff1_thd0~0_Out613902896) (= ~__unbuffered_p1_EBX~0_Out613902896 ~z~0_In613902896) (= ~x$r_buff1_thd1~0_Out613902896 ~x$r_buff0_thd1~0_In613902896) (not (= P1Thread1of1ForFork2___VERIFIER_assert_~expression_In613902896 0)) (= ~__unbuffered_p1_EAX~0_Out613902896 ~y~0_Out613902896) (= ~x$r_buff0_thd2~0_Out613902896 1)) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In613902896, P1Thread1of1ForFork2___VERIFIER_assert_~expression=P1Thread1of1ForFork2___VERIFIER_assert_~expression_In613902896, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In613902896, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In613902896, ~z~0=~z~0_In613902896, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In613902896} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In613902896, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In613902896, ~__unbuffered_p1_EBX~0=~__unbuffered_p1_EBX~0_Out613902896, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_Out613902896, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out613902896, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out613902896, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In613902896, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out613902896, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out613902896, P1Thread1of1ForFork2___VERIFIER_assert_~expression=P1Thread1of1ForFork2___VERIFIER_assert_~expression_In613902896, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_Out613902896, ~z~0=~z~0_In613902896, ~y~0=~y~0_Out613902896} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd3~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0, ~y~0] because there is no mapped edge [2019-12-07 10:11:41,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In948779664 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In948779664 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out948779664| ~x$w_buff0_used~0_In948779664) (or .cse0 .cse1)) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out948779664| 0) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In948779664, ~x$w_buff0_used~0=~x$w_buff0_used~0_In948779664} OutVars{P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out948779664|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In948779664, ~x$w_buff0_used~0=~x$w_buff0_used~0_In948779664} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:11:41,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L804-2-->L804-4: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1869498397 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1869498397 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1869498397 |P2Thread1of1ForFork0_#t~ite15_Out-1869498397|)) (and (= ~x~0_In-1869498397 |P2Thread1of1ForFork0_#t~ite15_Out-1869498397|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1869498397, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1869498397, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1869498397, ~x~0=~x~0_In-1869498397} OutVars{P2Thread1of1ForFork0_#t~ite15=|P2Thread1of1ForFork0_#t~ite15_Out-1869498397|, ~x$w_buff1~0=~x$w_buff1~0_In-1869498397, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1869498397, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1869498397, ~x~0=~x~0_In-1869498397} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite15] because there is no mapped edge [2019-12-07 10:11:41,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L804-4-->L805: Formula: (= v_~x~0_17 |v_P2Thread1of1ForFork0_#t~ite15_6|) InVars {P2Thread1of1ForFork0_#t~ite15=|v_P2Thread1of1ForFork0_#t~ite15_6|} OutVars{P2Thread1of1ForFork0_#t~ite15=|v_P2Thread1of1ForFork0_#t~ite15_5|, P2Thread1of1ForFork0_#t~ite16=|v_P2Thread1of1ForFork0_#t~ite16_5|, ~x~0=v_~x~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite15, P2Thread1of1ForFork0_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 10:11:41,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L805-->L805-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In84704927 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In84704927 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite17_Out84704927|)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In84704927 |P2Thread1of1ForFork0_#t~ite17_Out84704927|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In84704927, ~x$w_buff0_used~0=~x$w_buff0_used~0_In84704927} OutVars{P2Thread1of1ForFork0_#t~ite17=|P2Thread1of1ForFork0_#t~ite17_Out84704927|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In84704927, ~x$w_buff0_used~0=~x$w_buff0_used~0_In84704927} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite17] because there is no mapped edge [2019-12-07 10:11:41,131 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L806-->L806-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In-884796192 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-884796192 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-884796192 256))) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-884796192 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite18_Out-884796192| ~x$w_buff1_used~0_In-884796192)) (and (= |P2Thread1of1ForFork0_#t~ite18_Out-884796192| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-884796192, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-884796192, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-884796192, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-884796192} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-884796192, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-884796192, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-884796192, P2Thread1of1ForFork0_#t~ite18=|P2Thread1of1ForFork0_#t~ite18_Out-884796192|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-884796192} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite18] because there is no mapped edge [2019-12-07 10:11:41,131 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L807-->L807-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1040048153 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In1040048153 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite19_Out1040048153| ~x$r_buff0_thd3~0_In1040048153) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite19_Out1040048153| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1040048153, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1040048153} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1040048153, P2Thread1of1ForFork0_#t~ite19=|P2Thread1of1ForFork0_#t~ite19_Out1040048153|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1040048153} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite19] because there is no mapped edge [2019-12-07 10:11:41,131 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L808-->L808-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In-1264221139 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-1264221139 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1264221139 256))) (.cse0 (= (mod ~x$r_buff1_thd3~0_In-1264221139 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite20_Out-1264221139| 0)) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite20_Out-1264221139| ~x$r_buff1_thd3~0_In-1264221139) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1264221139, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1264221139, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1264221139, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1264221139} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1264221139, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1264221139, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1264221139, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1264221139|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1264221139} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 10:11:41,131 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L808-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_80 1) v_~__unbuffered_cnt~0_79) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~x$r_buff1_thd3~0_64 |v_P2Thread1of1ForFork0_#t~ite20_34|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P2Thread1of1ForFork0_#t~ite20=|v_P2Thread1of1ForFork0_#t~ite20_34|} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_64, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, P2Thread1of1ForFork0_#t~ite20=|v_P2Thread1of1ForFork0_#t~ite20_33|, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#t~ite20, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:11:41,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L743-2-->L743-5: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd1~0_In320459617 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In320459617 256))) (.cse0 (= |P0Thread1of1ForFork1_#t~ite4_Out320459617| |P0Thread1of1ForFork1_#t~ite3_Out320459617|))) (or (and (= |P0Thread1of1ForFork1_#t~ite3_Out320459617| ~x~0_In320459617) .cse0 (or .cse1 .cse2)) (and (= ~x$w_buff1~0_In320459617 |P0Thread1of1ForFork1_#t~ite3_Out320459617|) (not .cse1) (not .cse2) .cse0))) InVars {~x$w_buff1~0=~x$w_buff1~0_In320459617, ~x$w_buff1_used~0=~x$w_buff1_used~0_In320459617, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In320459617, ~x~0=~x~0_In320459617} OutVars{P0Thread1of1ForFork1_#t~ite4=|P0Thread1of1ForFork1_#t~ite4_Out320459617|, P0Thread1of1ForFork1_#t~ite3=|P0Thread1of1ForFork1_#t~ite3_Out320459617|, ~x$w_buff1~0=~x$w_buff1~0_In320459617, ~x$w_buff1_used~0=~x$w_buff1_used~0_In320459617, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In320459617, ~x~0=~x~0_In320459617} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite4, P0Thread1of1ForFork1_#t~ite3] because there is no mapped edge [2019-12-07 10:11:41,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd2~0_In817313008 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In817313008 256))) (.cse3 (= (mod ~x$r_buff0_thd2~0_In817313008 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In817313008 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out817313008| ~x$w_buff1_used~0_In817313008) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite12_Out817313008| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In817313008, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In817313008, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In817313008, ~x$w_buff0_used~0=~x$w_buff0_used~0_In817313008} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In817313008, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In817313008, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out817313008|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In817313008, ~x$w_buff0_used~0=~x$w_buff0_used~0_In817313008} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 10:11:41,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L781-->L782: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In1453701066 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In1453701066 256) 0)) (.cse0 (= ~x$r_buff0_thd2~0_Out1453701066 ~x$r_buff0_thd2~0_In1453701066))) (or (and .cse0 .cse1) (and (= ~x$r_buff0_thd2~0_Out1453701066 0) (not .cse2) (not .cse1)) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1453701066, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1453701066} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1453701066, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1453701066|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1453701066} AuxVars[] AssignedVars[~x$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 10:11:41,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L782-->L782-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In-202972429 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd2~0_In-202972429 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-202972429 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-202972429 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-202972429| ~x$r_buff1_thd2~0_In-202972429) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-202972429| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-202972429, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-202972429, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-202972429, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-202972429} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-202972429, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-202972429, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-202972429|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-202972429, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-202972429} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 10:11:41,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= v_~x$r_buff1_thd2~0_58 |v_P1Thread1of1ForFork2_#t~ite14_40|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_40|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_58, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_39|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:11:41,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L744-->L744-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1682304136 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1682304136 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1682304136 |P0Thread1of1ForFork1_#t~ite5_Out-1682304136|)) (and (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out-1682304136| 0) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1682304136, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1682304136} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1682304136|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1682304136, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1682304136} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 10:11:41,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L745-->L745-2: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd1~0_In-775687214 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-775687214 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-775687214 256))) (.cse2 (= (mod ~x$r_buff0_thd1~0_In-775687214 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-775687214| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork1_#t~ite6_Out-775687214| ~x$w_buff1_used~0_In-775687214)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-775687214, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-775687214, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-775687214, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-775687214} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-775687214, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-775687214|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-775687214, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-775687214, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-775687214} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 10:11:41,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L746-->L746-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-740025544 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-740025544 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite7_Out-740025544| ~x$r_buff0_thd1~0_In-740025544) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite7_Out-740025544| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-740025544, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-740025544} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-740025544, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-740025544|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-740025544} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-12-07 10:11:41,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L747-->L747-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In1048682283 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1048682283 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1048682283 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1048682283 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1048682283| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out1048682283| ~x$r_buff1_thd1~0_In1048682283)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1048682283, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1048682283, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1048682283, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1048682283} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1048682283, P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1048682283|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1048682283, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1048682283, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1048682283} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 10:11:41,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L747-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~x$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_30|) (= v_~__unbuffered_cnt~0_67 (+ v_~__unbuffered_cnt~0_68 1))) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_29|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_67} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 10:11:41,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L831-1-->L837: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:11:41,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L837-2-->L837-5: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In964303952 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite25_Out964303952| |ULTIMATE.start_main_#t~ite24_Out964303952|)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In964303952 256) 0))) (or (and .cse0 (= ~x~0_In964303952 |ULTIMATE.start_main_#t~ite24_Out964303952|) (or .cse1 .cse2)) (and (not .cse1) (= ~x$w_buff1~0_In964303952 |ULTIMATE.start_main_#t~ite24_Out964303952|) .cse0 (not .cse2)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In964303952, ~x$w_buff1_used~0=~x$w_buff1_used~0_In964303952, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In964303952, ~x~0=~x~0_In964303952} OutVars{~x$w_buff1~0=~x$w_buff1~0_In964303952, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out964303952|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out964303952|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In964303952, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In964303952, ~x~0=~x~0_In964303952} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 10:11:41,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L838-->L838-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-760637057 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-760637057 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite26_Out-760637057| 0)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-760637057 |ULTIMATE.start_main_#t~ite26_Out-760637057|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-760637057, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-760637057} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-760637057, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-760637057|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-760637057} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 10:11:41,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L839-->L839-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In1750399198 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In1750399198 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In1750399198 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1750399198 256)))) (or (and (= ~x$w_buff1_used~0_In1750399198 |ULTIMATE.start_main_#t~ite27_Out1750399198|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |ULTIMATE.start_main_#t~ite27_Out1750399198|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1750399198, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1750399198, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1750399198, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1750399198} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1750399198, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1750399198, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out1750399198|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1750399198, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1750399198} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 10:11:41,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L840-->L840-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1275327414 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1275327414 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite28_Out1275327414| 0)) (and (= |ULTIMATE.start_main_#t~ite28_Out1275327414| ~x$r_buff0_thd0~0_In1275327414) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1275327414, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1275327414} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1275327414, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1275327414|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1275327414} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 10:11:41,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1532984890 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In1532984890 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In1532984890 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In1532984890 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite29_Out1532984890| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite29_Out1532984890| ~x$r_buff1_thd0~0_In1532984890)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1532984890, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1532984890, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1532984890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1532984890} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1532984890, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1532984890|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1532984890, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1532984890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1532984890} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 10:11:41,136 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L849-->L849-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In481838987 256)))) (or (and (= |ULTIMATE.start_main_#t~ite36_Out481838987| ~x$w_buff0~0_In481838987) (not .cse0) (= |ULTIMATE.start_main_#t~ite35_In481838987| |ULTIMATE.start_main_#t~ite35_Out481838987|)) (and (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In481838987 256)))) (or (and (= (mod ~x$w_buff1_used~0_In481838987 256) 0) .cse1) (= (mod ~x$w_buff0_used~0_In481838987 256) 0) (and .cse1 (= (mod ~x$r_buff1_thd0~0_In481838987 256) 0)))) .cse0 (= |ULTIMATE.start_main_#t~ite35_Out481838987| ~x$w_buff0~0_In481838987) (= |ULTIMATE.start_main_#t~ite36_Out481838987| |ULTIMATE.start_main_#t~ite35_Out481838987|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In481838987, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In481838987, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In481838987|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In481838987, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In481838987, ~weak$$choice2~0=~weak$$choice2~0_In481838987, ~x$w_buff0_used~0=~x$w_buff0_used~0_In481838987} OutVars{~x$w_buff0~0=~x$w_buff0~0_In481838987, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In481838987, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out481838987|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out481838987|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In481838987, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In481838987, ~weak$$choice2~0=~weak$$choice2~0_In481838987, ~x$w_buff0_used~0=~x$w_buff0_used~0_In481838987} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 10:11:41,137 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L850-->L850-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1126836859 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_Out1126836859| ~x$w_buff1~0_In1126836859) (= |ULTIMATE.start_main_#t~ite38_In1126836859| |ULTIMATE.start_main_#t~ite38_Out1126836859|)) (and (= |ULTIMATE.start_main_#t~ite39_Out1126836859| |ULTIMATE.start_main_#t~ite38_Out1126836859|) (= |ULTIMATE.start_main_#t~ite38_Out1126836859| ~x$w_buff1~0_In1126836859) .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In1126836859 256) 0))) (or (= (mod ~x$w_buff0_used~0_In1126836859 256) 0) (and (= (mod ~x$w_buff1_used~0_In1126836859 256) 0) .cse1) (and (= (mod ~x$r_buff1_thd0~0_In1126836859 256) 0) .cse1)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1126836859, ~x$w_buff1~0=~x$w_buff1~0_In1126836859, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1126836859, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1126836859|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1126836859, ~weak$$choice2~0=~weak$$choice2~0_In1126836859, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1126836859} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1126836859, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1126836859|, ~x$w_buff1~0=~x$w_buff1~0_In1126836859, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1126836859, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1126836859|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1126836859, ~weak$$choice2~0=~weak$$choice2~0_In1126836859, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1126836859} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 10:11:41,137 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L851-->L851-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-639249480 256)))) (or (and .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-639249480 256) 0))) (or (and .cse1 (= (mod ~x$r_buff1_thd0~0_In-639249480 256) 0)) (and (= 0 (mod ~x$w_buff1_used~0_In-639249480 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-639249480 256)))) (= ~x$w_buff0_used~0_In-639249480 |ULTIMATE.start_main_#t~ite41_Out-639249480|) (= |ULTIMATE.start_main_#t~ite41_Out-639249480| |ULTIMATE.start_main_#t~ite42_Out-639249480|)) (and (= ~x$w_buff0_used~0_In-639249480 |ULTIMATE.start_main_#t~ite42_Out-639249480|) (not .cse0) (= |ULTIMATE.start_main_#t~ite41_In-639249480| |ULTIMATE.start_main_#t~ite41_Out-639249480|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-639249480, ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In-639249480|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-639249480, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-639249480, ~weak$$choice2~0=~weak$$choice2~0_In-639249480, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-639249480} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-639249480, ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-639249480|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-639249480, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-639249480, ~weak$$choice2~0=~weak$$choice2~0_In-639249480, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-639249480|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-639249480} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 10:11:41,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L853-->L854: Formula: (and (= v_~x$r_buff0_thd0~0_126 v_~x$r_buff0_thd0~0_125) (not (= 0 (mod v_~weak$$choice2~0_24 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_126, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_125, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_24} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:11:41,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L854-->L854-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-113996698 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out-113996698| ~x$r_buff1_thd0~0_In-113996698) (= |ULTIMATE.start_main_#t~ite50_In-113996698| |ULTIMATE.start_main_#t~ite50_Out-113996698|) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite51_Out-113996698| |ULTIMATE.start_main_#t~ite50_Out-113996698|) (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-113996698 256) 0))) (or (and .cse1 (= (mod ~x$r_buff1_thd0~0_In-113996698 256) 0)) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In-113996698 256))) (= (mod ~x$w_buff0_used~0_In-113996698 256) 0))) .cse0 (= ~x$r_buff1_thd0~0_In-113996698 |ULTIMATE.start_main_#t~ite50_Out-113996698|)))) InVars {ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_In-113996698|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-113996698, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-113996698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-113996698, ~weak$$choice2~0=~weak$$choice2~0_In-113996698, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-113996698} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-113996698|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-113996698, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-113996698|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-113996698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-113996698, ~weak$$choice2~0=~weak$$choice2~0_In-113996698, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-113996698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:11:41,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L856-->L859-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_11 256)) (= v_~x$mem_tmp~0_14 v_~x~0_125) (not (= 0 (mod v_~x$flush_delayed~0_29 256))) (= v_~x$flush_delayed~0_28 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_29, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_14} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_28|, ~x$flush_delayed~0=v_~x$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~x$mem_tmp~0=v_~x$mem_tmp~0_14, ~x~0=v_~x~0_125, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:11:41,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L859-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 10:11:41,200 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_6b6e6a22-eca0-48ee-8505-40c8828e600b/bin/uautomizer/witness.graphml [2019-12-07 10:11:41,200 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:11:41,201 INFO L168 Benchmark]: Toolchain (without parser) took 106335.96 ms. Allocated memory was 1.0 GB in the beginning and 8.0 GB in the end (delta: 7.0 GB). Free memory was 939.3 MB in the beginning and 3.9 GB in the end (delta: -3.0 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2019-12-07 10:11:41,201 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:11:41,202 INFO L168 Benchmark]: CACSL2BoogieTranslator took 384.37 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 80.7 MB). Free memory was 939.3 MB in the beginning and 1.0 GB in the end (delta: -109.1 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:11:41,202 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.69 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:11:41,202 INFO L168 Benchmark]: Boogie Preprocessor took 25.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:11:41,202 INFO L168 Benchmark]: RCFGBuilder took 423.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 980.3 MB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. [2019-12-07 10:11:41,203 INFO L168 Benchmark]: TraceAbstraction took 105383.92 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.9 GB). Free memory was 980.3 MB in the beginning and 3.9 GB in the end (delta: -3.0 GB). Peak memory consumption was 4.0 GB. Max. memory is 11.5 GB. [2019-12-07 10:11:41,203 INFO L168 Benchmark]: Witness Printer took 74.22 ms. Allocated memory is still 8.0 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 37.9 MB). Peak memory consumption was 37.9 MB. Max. memory is 11.5 GB. [2019-12-07 10:11:41,205 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 384.37 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 80.7 MB). Free memory was 939.3 MB in the beginning and 1.0 GB in the end (delta: -109.1 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.69 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 423.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 980.3 MB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 105383.92 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.9 GB). Free memory was 980.3 MB in the beginning and 3.9 GB in the end (delta: -3.0 GB). Peak memory consumption was 4.0 GB. Max. memory is 11.5 GB. * Witness Printer took 74.22 ms. Allocated memory is still 8.0 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 37.9 MB). Peak memory consumption was 37.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 179 ProgramPointsBefore, 92 ProgramPointsAfterwards, 216 TransitionsBefore, 99 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 8 FixpointIterations, 36 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 34 ChoiceCompositions, 6446 VarBasedMoverChecksPositive, 230 VarBasedMoverChecksNegative, 40 SemBasedMoverChecksPositive, 257 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 82137 CheckedPairsTotal, 118 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L827] FCALL, FORK 0 pthread_create(&t891, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L829] FCALL, FORK 0 pthread_create(&t892, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L757] 2 x$w_buff1 = x$w_buff0 [L758] 2 x$w_buff0 = 2 [L759] 2 x$w_buff1_used = x$w_buff0_used [L760] 2 x$w_buff0_used = (_Bool)1 [L831] FCALL, FORK 0 pthread_create(&t893, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L778] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L778] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L792] 3 z = 1 [L795] 3 a = 1 [L798] 3 __unbuffered_p2_EAX = a [L801] 3 __unbuffered_p2_EBX = b VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L804] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L737] 1 b = 1 [L740] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=2, y=1, z=1] [L805] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L806] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L807] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L743] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L779] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L780] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L743] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L744] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L745] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L746] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L837] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L837] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L838] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L839] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L840] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L841] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L844] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L845] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L846] 0 x$flush_delayed = weak$$choice2 [L847] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L848] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L848] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L849] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L850] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L851] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L852] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L852] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L854] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L855] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 105.2s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 19.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2800 SDtfs, 3217 SDslu, 7254 SDs, 0 SdLazy, 4097 SolverSat, 225 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 176 GetRequests, 13 SyntacticMatches, 21 SemanticMatches, 142 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 628 ImplicationChecksByTransitivity, 1.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=225486occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 69.1s AutomataMinimizationTime, 17 MinimizatonAttempts, 356573 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 699 NumberOfCodeBlocks, 699 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 614 ConstructedInterpolants, 0 QuantifiedInterpolants, 193162 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...