./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix034_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix034_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 30ea70b89721eac5ed4f63275a9abaeb19932fd3 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:40:28,792 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:40:28,793 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:40:28,801 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:40:28,801 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:40:28,802 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:40:28,803 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:40:28,804 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:40:28,806 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:40:28,806 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:40:28,807 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:40:28,808 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:40:28,808 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:40:28,808 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:40:28,809 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:40:28,810 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:40:28,810 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:40:28,811 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:40:28,813 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:40:28,814 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:40:28,815 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:40:28,816 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:40:28,817 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:40:28,817 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:40:28,819 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:40:28,819 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:40:28,819 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:40:28,820 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:40:28,820 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:40:28,821 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:40:28,821 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:40:28,821 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:40:28,822 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:40:28,822 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:40:28,823 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:40:28,823 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:40:28,823 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:40:28,823 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:40:28,823 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:40:28,824 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:40:28,824 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:40:28,825 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:40:28,834 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:40:28,834 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:40:28,835 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:40:28,835 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:40:28,835 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:40:28,835 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:40:28,835 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:40:28,836 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:40:28,836 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:40:28,836 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:40:28,836 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:40:28,836 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:40:28,836 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:40:28,836 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:40:28,836 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:40:28,836 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:40:28,836 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:40:28,837 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:40:28,837 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:40:28,837 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:40:28,837 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:40:28,837 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:40:28,837 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:40:28,837 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:40:28,837 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:40:28,838 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:40:28,838 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:40:28,838 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:40:28,838 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:40:28,838 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 30ea70b89721eac5ed4f63275a9abaeb19932fd3 [2019-12-07 14:40:28,942 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:40:28,953 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:40:28,956 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:40:28,957 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:40:28,957 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:40:28,958 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix034_tso.oepc.i [2019-12-07 14:40:29,006 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/data/f71054c4c/a641bb63521045f3ba501d1ce5d50a34/FLAG6cb2f7d38 [2019-12-07 14:40:29,528 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:40:29,528 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/sv-benchmarks/c/pthread-wmm/mix034_tso.oepc.i [2019-12-07 14:40:29,538 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/data/f71054c4c/a641bb63521045f3ba501d1ce5d50a34/FLAG6cb2f7d38 [2019-12-07 14:40:29,979 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/data/f71054c4c/a641bb63521045f3ba501d1ce5d50a34 [2019-12-07 14:40:29,981 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:40:29,983 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:40:29,983 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:40:29,983 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:40:29,986 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:40:29,987 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:40:29" (1/1) ... [2019-12-07 14:40:29,989 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7b6fc423 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:29, skipping insertion in model container [2019-12-07 14:40:29,989 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:40:29" (1/1) ... [2019-12-07 14:40:29,994 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:40:30,023 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:40:30,294 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:40:30,303 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:40:30,356 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:40:30,405 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:40:30,405 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30 WrapperNode [2019-12-07 14:40:30,405 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:40:30,406 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:40:30,406 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:40:30,406 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:40:30,412 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30" (1/1) ... [2019-12-07 14:40:30,430 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30" (1/1) ... [2019-12-07 14:40:30,455 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:40:30,455 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:40:30,455 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:40:30,455 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:40:30,462 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30" (1/1) ... [2019-12-07 14:40:30,462 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30" (1/1) ... [2019-12-07 14:40:30,465 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30" (1/1) ... [2019-12-07 14:40:30,465 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30" (1/1) ... [2019-12-07 14:40:30,472 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30" (1/1) ... [2019-12-07 14:40:30,474 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30" (1/1) ... [2019-12-07 14:40:30,476 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30" (1/1) ... [2019-12-07 14:40:30,479 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:40:30,480 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:40:30,480 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:40:30,480 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:40:30,480 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:40:30,520 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:40:30,520 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:40:30,520 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:40:30,520 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:40:30,520 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:40:30,521 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:40:30,521 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:40:30,521 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:40:30,521 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:40:30,521 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:40:30,521 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:40:30,522 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:40:30,857 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:40:30,857 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:40:30,858 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:40:30 BoogieIcfgContainer [2019-12-07 14:40:30,858 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:40:30,858 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:40:30,859 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:40:30,860 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:40:30,860 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:40:29" (1/3) ... [2019-12-07 14:40:30,861 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3382a6e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:40:30, skipping insertion in model container [2019-12-07 14:40:30,861 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:40:30" (2/3) ... [2019-12-07 14:40:30,861 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3382a6e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:40:30, skipping insertion in model container [2019-12-07 14:40:30,861 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:40:30" (3/3) ... [2019-12-07 14:40:30,862 INFO L109 eAbstractionObserver]: Analyzing ICFG mix034_tso.oepc.i [2019-12-07 14:40:30,869 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:40:30,869 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:40:30,873 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:40:30,874 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:40:30,898 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,898 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,898 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,899 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,899 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,899 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,899 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,899 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,899 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,900 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,900 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,900 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,900 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,900 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,901 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,901 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,901 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,901 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,901 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,905 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,905 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,905 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,906 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,906 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,906 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,906 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,906 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,906 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,913 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,913 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,913 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,913 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,913 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,913 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,914 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,914 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,914 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,914 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,914 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,914 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,915 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,915 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,915 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,915 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,915 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,915 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,916 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,916 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,916 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,916 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,916 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,916 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,917 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,917 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,917 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,917 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,917 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,917 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,921 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,921 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,921 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,921 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,921 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,925 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,925 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:40:30,938 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 14:40:30,953 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:40:30,953 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:40:30,953 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:40:30,953 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:40:30,953 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:40:30,953 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:40:30,953 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:40:30,953 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:40:30,963 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 149 places, 183 transitions [2019-12-07 14:40:30,965 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 149 places, 183 transitions [2019-12-07 14:40:31,019 INFO L134 PetriNetUnfolder]: 41/181 cut-off events. [2019-12-07 14:40:31,019 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:40:31,027 INFO L76 FinitePrefix]: Finished finitePrefix Result has 188 conditions, 181 events. 41/181 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 578 event pairs. 6/144 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 14:40:31,038 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 149 places, 183 transitions [2019-12-07 14:40:31,063 INFO L134 PetriNetUnfolder]: 41/181 cut-off events. [2019-12-07 14:40:31,063 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:40:31,067 INFO L76 FinitePrefix]: Finished finitePrefix Result has 188 conditions, 181 events. 41/181 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 578 event pairs. 6/144 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 14:40:31,077 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12056 [2019-12-07 14:40:31,078 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:40:33,835 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 14:40:34,061 INFO L206 etLargeBlockEncoding]: Checked pairs total: 72636 [2019-12-07 14:40:34,061 INFO L214 etLargeBlockEncoding]: Total number of compositions: 111 [2019-12-07 14:40:34,064 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 76 places, 87 transitions [2019-12-07 14:40:34,430 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8766 states. [2019-12-07 14:40:34,432 INFO L276 IsEmpty]: Start isEmpty. Operand 8766 states. [2019-12-07 14:40:34,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 14:40:34,436 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:34,436 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 14:40:34,437 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:34,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:34,441 INFO L82 PathProgramCache]: Analyzing trace with hash 798122, now seen corresponding path program 1 times [2019-12-07 14:40:34,447 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:34,447 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1524357481] [2019-12-07 14:40:34,447 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:34,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:34,580 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:34,580 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1524357481] [2019-12-07 14:40:34,581 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:34,581 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:40:34,582 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [30877390] [2019-12-07 14:40:34,586 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:40:34,587 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:34,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:40:34,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:40:34,602 INFO L87 Difference]: Start difference. First operand 8766 states. Second operand 3 states. [2019-12-07 14:40:34,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:34,785 INFO L93 Difference]: Finished difference Result 8598 states and 28114 transitions. [2019-12-07 14:40:34,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:40:34,787 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 14:40:34,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:34,848 INFO L225 Difference]: With dead ends: 8598 [2019-12-07 14:40:34,848 INFO L226 Difference]: Without dead ends: 7662 [2019-12-07 14:40:34,849 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:40:34,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7662 states. [2019-12-07 14:40:35,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7662 to 7662. [2019-12-07 14:40:35,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7662 states. [2019-12-07 14:40:35,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7662 states to 7662 states and 24964 transitions. [2019-12-07 14:40:35,120 INFO L78 Accepts]: Start accepts. Automaton has 7662 states and 24964 transitions. Word has length 3 [2019-12-07 14:40:35,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:35,121 INFO L462 AbstractCegarLoop]: Abstraction has 7662 states and 24964 transitions. [2019-12-07 14:40:35,121 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:40:35,121 INFO L276 IsEmpty]: Start isEmpty. Operand 7662 states and 24964 transitions. [2019-12-07 14:40:35,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 14:40:35,124 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:35,124 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:35,124 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:35,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:35,124 INFO L82 PathProgramCache]: Analyzing trace with hash 1441761450, now seen corresponding path program 1 times [2019-12-07 14:40:35,124 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:35,125 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1154206710] [2019-12-07 14:40:35,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:35,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:35,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:35,172 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1154206710] [2019-12-07 14:40:35,172 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:35,172 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:40:35,172 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1390539950] [2019-12-07 14:40:35,173 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:40:35,174 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:35,174 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:40:35,174 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:40:35,174 INFO L87 Difference]: Start difference. First operand 7662 states and 24964 transitions. Second operand 3 states. [2019-12-07 14:40:35,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:35,192 INFO L93 Difference]: Finished difference Result 1232 states and 2811 transitions. [2019-12-07 14:40:35,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:40:35,192 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2019-12-07 14:40:35,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:35,198 INFO L225 Difference]: With dead ends: 1232 [2019-12-07 14:40:35,198 INFO L226 Difference]: Without dead ends: 1232 [2019-12-07 14:40:35,198 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:40:35,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1232 states. [2019-12-07 14:40:35,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1232 to 1232. [2019-12-07 14:40:35,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1232 states. [2019-12-07 14:40:35,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1232 states to 1232 states and 2811 transitions. [2019-12-07 14:40:35,218 INFO L78 Accepts]: Start accepts. Automaton has 1232 states and 2811 transitions. Word has length 11 [2019-12-07 14:40:35,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:35,218 INFO L462 AbstractCegarLoop]: Abstraction has 1232 states and 2811 transitions. [2019-12-07 14:40:35,218 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:40:35,218 INFO L276 IsEmpty]: Start isEmpty. Operand 1232 states and 2811 transitions. [2019-12-07 14:40:35,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:40:35,219 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:35,220 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:35,220 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:35,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:35,220 INFO L82 PathProgramCache]: Analyzing trace with hash -973399749, now seen corresponding path program 1 times [2019-12-07 14:40:35,220 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:35,220 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [543448781] [2019-12-07 14:40:35,220 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:35,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:35,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:35,259 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [543448781] [2019-12-07 14:40:35,260 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:35,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:40:35,260 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [184196346] [2019-12-07 14:40:35,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:40:35,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:35,261 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:40:35,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:40:35,261 INFO L87 Difference]: Start difference. First operand 1232 states and 2811 transitions. Second operand 3 states. [2019-12-07 14:40:35,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:35,302 INFO L93 Difference]: Finished difference Result 1943 states and 4408 transitions. [2019-12-07 14:40:35,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:40:35,302 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 14:40:35,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:35,311 INFO L225 Difference]: With dead ends: 1943 [2019-12-07 14:40:35,311 INFO L226 Difference]: Without dead ends: 1943 [2019-12-07 14:40:35,311 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:40:35,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1943 states. [2019-12-07 14:40:35,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1943 to 1365. [2019-12-07 14:40:35,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1365 states. [2019-12-07 14:40:35,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 3186 transitions. [2019-12-07 14:40:35,362 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 3186 transitions. Word has length 14 [2019-12-07 14:40:35,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:35,363 INFO L462 AbstractCegarLoop]: Abstraction has 1365 states and 3186 transitions. [2019-12-07 14:40:35,363 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:40:35,363 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 3186 transitions. [2019-12-07 14:40:35,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:40:35,364 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:35,364 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:35,364 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:35,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:35,364 INFO L82 PathProgramCache]: Analyzing trace with hash -895424426, now seen corresponding path program 1 times [2019-12-07 14:40:35,364 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:35,364 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611000319] [2019-12-07 14:40:35,365 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:35,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:35,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:35,413 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1611000319] [2019-12-07 14:40:35,413 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:35,414 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:40:35,414 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1757435182] [2019-12-07 14:40:35,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:40:35,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:35,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:40:35,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:40:35,414 INFO L87 Difference]: Start difference. First operand 1365 states and 3186 transitions. Second operand 4 states. [2019-12-07 14:40:35,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:35,529 INFO L93 Difference]: Finished difference Result 1724 states and 3916 transitions. [2019-12-07 14:40:35,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:40:35,529 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 14:40:35,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:35,537 INFO L225 Difference]: With dead ends: 1724 [2019-12-07 14:40:35,537 INFO L226 Difference]: Without dead ends: 1724 [2019-12-07 14:40:35,538 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:40:35,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1724 states. [2019-12-07 14:40:35,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1724 to 1660. [2019-12-07 14:40:35,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1660 states. [2019-12-07 14:40:35,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1660 states to 1660 states and 3792 transitions. [2019-12-07 14:40:35,563 INFO L78 Accepts]: Start accepts. Automaton has 1660 states and 3792 transitions. Word has length 14 [2019-12-07 14:40:35,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:35,563 INFO L462 AbstractCegarLoop]: Abstraction has 1660 states and 3792 transitions. [2019-12-07 14:40:35,564 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:40:35,564 INFO L276 IsEmpty]: Start isEmpty. Operand 1660 states and 3792 transitions. [2019-12-07 14:40:35,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:40:35,565 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:35,565 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:35,565 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:35,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:35,565 INFO L82 PathProgramCache]: Analyzing trace with hash -270244683, now seen corresponding path program 1 times [2019-12-07 14:40:35,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:35,565 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839827598] [2019-12-07 14:40:35,566 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:35,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:35,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:35,617 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [839827598] [2019-12-07 14:40:35,617 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:35,617 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:40:35,617 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1760070276] [2019-12-07 14:40:35,617 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:40:35,617 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:35,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:40:35,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:40:35,618 INFO L87 Difference]: Start difference. First operand 1660 states and 3792 transitions. Second operand 4 states. [2019-12-07 14:40:35,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:35,719 INFO L93 Difference]: Finished difference Result 1991 states and 4482 transitions. [2019-12-07 14:40:35,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:40:35,720 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 14:40:35,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:35,728 INFO L225 Difference]: With dead ends: 1991 [2019-12-07 14:40:35,728 INFO L226 Difference]: Without dead ends: 1991 [2019-12-07 14:40:35,728 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:40:35,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1991 states. [2019-12-07 14:40:35,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1991 to 1731. [2019-12-07 14:40:35,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1731 states. [2019-12-07 14:40:35,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1731 states to 1731 states and 3946 transitions. [2019-12-07 14:40:35,752 INFO L78 Accepts]: Start accepts. Automaton has 1731 states and 3946 transitions. Word has length 14 [2019-12-07 14:40:35,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:35,752 INFO L462 AbstractCegarLoop]: Abstraction has 1731 states and 3946 transitions. [2019-12-07 14:40:35,752 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:40:35,752 INFO L276 IsEmpty]: Start isEmpty. Operand 1731 states and 3946 transitions. [2019-12-07 14:40:35,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 14:40:35,753 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:35,754 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:35,754 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:35,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:35,754 INFO L82 PathProgramCache]: Analyzing trace with hash 2057308803, now seen corresponding path program 1 times [2019-12-07 14:40:35,754 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:35,754 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1234390966] [2019-12-07 14:40:35,754 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:35,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:35,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:35,803 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1234390966] [2019-12-07 14:40:35,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:35,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:40:35,803 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1376302373] [2019-12-07 14:40:35,803 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:40:35,804 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:35,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:40:35,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:40:35,804 INFO L87 Difference]: Start difference. First operand 1731 states and 3946 transitions. Second operand 5 states. [2019-12-07 14:40:35,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:35,951 INFO L93 Difference]: Finished difference Result 2258 states and 4996 transitions. [2019-12-07 14:40:35,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:40:35,951 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2019-12-07 14:40:35,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:35,960 INFO L225 Difference]: With dead ends: 2258 [2019-12-07 14:40:35,960 INFO L226 Difference]: Without dead ends: 2258 [2019-12-07 14:40:35,961 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:40:35,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2258 states. [2019-12-07 14:40:35,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2258 to 2002. [2019-12-07 14:40:35,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2002 states. [2019-12-07 14:40:35,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2002 states to 2002 states and 4502 transitions. [2019-12-07 14:40:35,989 INFO L78 Accepts]: Start accepts. Automaton has 2002 states and 4502 transitions. Word has length 24 [2019-12-07 14:40:35,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:35,989 INFO L462 AbstractCegarLoop]: Abstraction has 2002 states and 4502 transitions. [2019-12-07 14:40:35,990 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:40:35,990 INFO L276 IsEmpty]: Start isEmpty. Operand 2002 states and 4502 transitions. [2019-12-07 14:40:35,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 14:40:35,991 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:35,991 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:35,991 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:35,991 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:35,992 INFO L82 PathProgramCache]: Analyzing trace with hash -1461081411, now seen corresponding path program 1 times [2019-12-07 14:40:35,992 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:35,992 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373973959] [2019-12-07 14:40:35,992 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:36,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:36,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:36,050 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373973959] [2019-12-07 14:40:36,050 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:36,050 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:40:36,050 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1597287018] [2019-12-07 14:40:36,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:40:36,051 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:36,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:40:36,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:40:36,051 INFO L87 Difference]: Start difference. First operand 2002 states and 4502 transitions. Second operand 5 states. [2019-12-07 14:40:36,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:36,366 INFO L93 Difference]: Finished difference Result 2854 states and 6297 transitions. [2019-12-07 14:40:36,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:40:36,366 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 14:40:36,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:36,372 INFO L225 Difference]: With dead ends: 2854 [2019-12-07 14:40:36,372 INFO L226 Difference]: Without dead ends: 2854 [2019-12-07 14:40:36,372 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:40:36,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2854 states. [2019-12-07 14:40:36,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2854 to 2447. [2019-12-07 14:40:36,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2447 states. [2019-12-07 14:40:36,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2447 states to 2447 states and 5484 transitions. [2019-12-07 14:40:36,415 INFO L78 Accepts]: Start accepts. Automaton has 2447 states and 5484 transitions. Word has length 26 [2019-12-07 14:40:36,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:36,415 INFO L462 AbstractCegarLoop]: Abstraction has 2447 states and 5484 transitions. [2019-12-07 14:40:36,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:40:36,416 INFO L276 IsEmpty]: Start isEmpty. Operand 2447 states and 5484 transitions. [2019-12-07 14:40:36,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 14:40:36,419 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:36,419 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:36,419 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:36,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:36,419 INFO L82 PathProgramCache]: Analyzing trace with hash 605769272, now seen corresponding path program 1 times [2019-12-07 14:40:36,420 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:36,420 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [810928795] [2019-12-07 14:40:36,420 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:36,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:36,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:36,476 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [810928795] [2019-12-07 14:40:36,477 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:36,477 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:40:36,477 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2011558544] [2019-12-07 14:40:36,477 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:40:36,477 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:36,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:40:36,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:40:36,477 INFO L87 Difference]: Start difference. First operand 2447 states and 5484 transitions. Second operand 5 states. [2019-12-07 14:40:36,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:36,615 INFO L93 Difference]: Finished difference Result 2949 states and 6475 transitions. [2019-12-07 14:40:36,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:40:36,615 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 14:40:36,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:36,619 INFO L225 Difference]: With dead ends: 2949 [2019-12-07 14:40:36,619 INFO L226 Difference]: Without dead ends: 2949 [2019-12-07 14:40:36,620 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:40:36,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2949 states. [2019-12-07 14:40:36,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2949 to 2382. [2019-12-07 14:40:36,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2382 states. [2019-12-07 14:40:36,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2382 states to 2382 states and 5344 transitions. [2019-12-07 14:40:36,650 INFO L78 Accepts]: Start accepts. Automaton has 2382 states and 5344 transitions. Word has length 26 [2019-12-07 14:40:36,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:36,650 INFO L462 AbstractCegarLoop]: Abstraction has 2382 states and 5344 transitions. [2019-12-07 14:40:36,650 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:40:36,650 INFO L276 IsEmpty]: Start isEmpty. Operand 2382 states and 5344 transitions. [2019-12-07 14:40:36,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:40:36,652 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:36,652 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:36,652 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:36,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:36,652 INFO L82 PathProgramCache]: Analyzing trace with hash 461323697, now seen corresponding path program 1 times [2019-12-07 14:40:36,653 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:36,653 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [394741330] [2019-12-07 14:40:36,653 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:36,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:36,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:36,723 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [394741330] [2019-12-07 14:40:36,723 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:36,723 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:40:36,723 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242849909] [2019-12-07 14:40:36,723 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:40:36,724 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:36,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:40:36,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:40:36,724 INFO L87 Difference]: Start difference. First operand 2382 states and 5344 transitions. Second operand 4 states. [2019-12-07 14:40:36,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:36,740 INFO L93 Difference]: Finished difference Result 2381 states and 5342 transitions. [2019-12-07 14:40:36,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:40:36,740 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2019-12-07 14:40:36,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:36,744 INFO L225 Difference]: With dead ends: 2381 [2019-12-07 14:40:36,744 INFO L226 Difference]: Without dead ends: 2381 [2019-12-07 14:40:36,745 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:40:36,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2381 states. [2019-12-07 14:40:36,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2381 to 2381. [2019-12-07 14:40:36,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2381 states. [2019-12-07 14:40:36,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 5342 transitions. [2019-12-07 14:40:36,779 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 5342 transitions. Word has length 27 [2019-12-07 14:40:36,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:36,779 INFO L462 AbstractCegarLoop]: Abstraction has 2381 states and 5342 transitions. [2019-12-07 14:40:36,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:40:36,780 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 5342 transitions. [2019-12-07 14:40:36,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 14:40:36,782 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:36,782 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:36,782 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:36,782 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:36,782 INFO L82 PathProgramCache]: Analyzing trace with hash 93559855, now seen corresponding path program 1 times [2019-12-07 14:40:36,782 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:36,783 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577154294] [2019-12-07 14:40:36,783 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:36,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:36,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:36,829 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [577154294] [2019-12-07 14:40:36,829 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:36,829 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:40:36,829 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889037526] [2019-12-07 14:40:36,829 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:40:36,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:36,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:40:36,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:40:36,830 INFO L87 Difference]: Start difference. First operand 2381 states and 5342 transitions. Second operand 4 states. [2019-12-07 14:40:36,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:36,843 INFO L93 Difference]: Finished difference Result 1330 states and 2854 transitions. [2019-12-07 14:40:36,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:40:36,843 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 28 [2019-12-07 14:40:36,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:36,861 INFO L225 Difference]: With dead ends: 1330 [2019-12-07 14:40:36,861 INFO L226 Difference]: Without dead ends: 1330 [2019-12-07 14:40:36,861 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:40:36,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1330 states. [2019-12-07 14:40:36,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1330 to 1235. [2019-12-07 14:40:36,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1235 states. [2019-12-07 14:40:36,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1235 states to 1235 states and 2679 transitions. [2019-12-07 14:40:36,876 INFO L78 Accepts]: Start accepts. Automaton has 1235 states and 2679 transitions. Word has length 28 [2019-12-07 14:40:36,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:36,876 INFO L462 AbstractCegarLoop]: Abstraction has 1235 states and 2679 transitions. [2019-12-07 14:40:36,876 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:40:36,876 INFO L276 IsEmpty]: Start isEmpty. Operand 1235 states and 2679 transitions. [2019-12-07 14:40:36,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-12-07 14:40:36,878 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:36,878 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:36,878 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:36,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:36,878 INFO L82 PathProgramCache]: Analyzing trace with hash -466202404, now seen corresponding path program 1 times [2019-12-07 14:40:36,878 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:36,878 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209473608] [2019-12-07 14:40:36,878 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:36,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:36,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:36,938 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209473608] [2019-12-07 14:40:36,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:36,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:40:36,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [404605650] [2019-12-07 14:40:36,938 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:40:36,939 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:36,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:40:36,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:40:36,939 INFO L87 Difference]: Start difference. First operand 1235 states and 2679 transitions. Second operand 6 states. [2019-12-07 14:40:37,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:37,307 INFO L93 Difference]: Finished difference Result 1625 states and 3433 transitions. [2019-12-07 14:40:37,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 14:40:37,308 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 50 [2019-12-07 14:40:37,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:37,311 INFO L225 Difference]: With dead ends: 1625 [2019-12-07 14:40:37,311 INFO L226 Difference]: Without dead ends: 1625 [2019-12-07 14:40:37,311 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:40:37,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1625 states. [2019-12-07 14:40:37,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1625 to 1289. [2019-12-07 14:40:37,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1289 states. [2019-12-07 14:40:37,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1289 states to 1289 states and 2791 transitions. [2019-12-07 14:40:37,335 INFO L78 Accepts]: Start accepts. Automaton has 1289 states and 2791 transitions. Word has length 50 [2019-12-07 14:40:37,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:37,336 INFO L462 AbstractCegarLoop]: Abstraction has 1289 states and 2791 transitions. [2019-12-07 14:40:37,336 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:40:37,336 INFO L276 IsEmpty]: Start isEmpty. Operand 1289 states and 2791 transitions. [2019-12-07 14:40:37,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-12-07 14:40:37,338 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:37,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:37,339 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:37,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:37,339 INFO L82 PathProgramCache]: Analyzing trace with hash 1640582438, now seen corresponding path program 2 times [2019-12-07 14:40:37,339 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:37,339 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [370716763] [2019-12-07 14:40:37,339 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:37,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:37,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:37,382 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [370716763] [2019-12-07 14:40:37,383 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:37,383 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:40:37,383 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [71618267] [2019-12-07 14:40:37,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:40:37,383 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:37,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:40:37,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:40:37,384 INFO L87 Difference]: Start difference. First operand 1289 states and 2791 transitions. Second operand 3 states. [2019-12-07 14:40:37,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:37,426 INFO L93 Difference]: Finished difference Result 1646 states and 3525 transitions. [2019-12-07 14:40:37,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:40:37,426 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 50 [2019-12-07 14:40:37,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:37,428 INFO L225 Difference]: With dead ends: 1646 [2019-12-07 14:40:37,428 INFO L226 Difference]: Without dead ends: 1646 [2019-12-07 14:40:37,429 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:40:37,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1646 states. [2019-12-07 14:40:37,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1646 to 1333. [2019-12-07 14:40:37,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1333 states. [2019-12-07 14:40:37,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1333 states to 1333 states and 2894 transitions. [2019-12-07 14:40:37,447 INFO L78 Accepts]: Start accepts. Automaton has 1333 states and 2894 transitions. Word has length 50 [2019-12-07 14:40:37,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:37,448 INFO L462 AbstractCegarLoop]: Abstraction has 1333 states and 2894 transitions. [2019-12-07 14:40:37,448 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:40:37,448 INFO L276 IsEmpty]: Start isEmpty. Operand 1333 states and 2894 transitions. [2019-12-07 14:40:37,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 14:40:37,451 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:37,451 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:37,451 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:37,451 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:37,451 INFO L82 PathProgramCache]: Analyzing trace with hash -475366277, now seen corresponding path program 1 times [2019-12-07 14:40:37,451 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:37,451 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406962249] [2019-12-07 14:40:37,451 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:37,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:37,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:37,528 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406962249] [2019-12-07 14:40:37,528 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:37,528 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:40:37,528 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1280759] [2019-12-07 14:40:37,529 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:40:37,529 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:37,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:40:37,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:40:37,529 INFO L87 Difference]: Start difference. First operand 1333 states and 2894 transitions. Second operand 7 states. [2019-12-07 14:40:38,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:38,012 INFO L93 Difference]: Finished difference Result 1713 states and 3612 transitions. [2019-12-07 14:40:38,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 14:40:38,013 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2019-12-07 14:40:38,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:38,017 INFO L225 Difference]: With dead ends: 1713 [2019-12-07 14:40:38,017 INFO L226 Difference]: Without dead ends: 1713 [2019-12-07 14:40:38,017 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:40:38,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1713 states. [2019-12-07 14:40:38,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1713 to 1317. [2019-12-07 14:40:38,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1317 states. [2019-12-07 14:40:38,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1317 states to 1317 states and 2864 transitions. [2019-12-07 14:40:38,036 INFO L78 Accepts]: Start accepts. Automaton has 1317 states and 2864 transitions. Word has length 51 [2019-12-07 14:40:38,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:38,036 INFO L462 AbstractCegarLoop]: Abstraction has 1317 states and 2864 transitions. [2019-12-07 14:40:38,036 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:40:38,036 INFO L276 IsEmpty]: Start isEmpty. Operand 1317 states and 2864 transitions. [2019-12-07 14:40:38,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 14:40:38,038 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:38,038 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:38,039 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:38,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:38,039 INFO L82 PathProgramCache]: Analyzing trace with hash 410454385, now seen corresponding path program 2 times [2019-12-07 14:40:38,039 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:38,039 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [298194854] [2019-12-07 14:40:38,039 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:38,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:38,224 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:38,224 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [298194854] [2019-12-07 14:40:38,224 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:38,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:40:38,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1047646935] [2019-12-07 14:40:38,225 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:40:38,225 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:38,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:40:38,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:40:38,225 INFO L87 Difference]: Start difference. First operand 1317 states and 2864 transitions. Second operand 10 states. [2019-12-07 14:40:39,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:39,322 INFO L93 Difference]: Finished difference Result 2164 states and 4766 transitions. [2019-12-07 14:40:39,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 14:40:39,323 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 51 [2019-12-07 14:40:39,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:39,335 INFO L225 Difference]: With dead ends: 2164 [2019-12-07 14:40:39,335 INFO L226 Difference]: Without dead ends: 1814 [2019-12-07 14:40:39,335 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=74, Invalid=268, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:40:39,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1814 states. [2019-12-07 14:40:39,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1814 to 1451. [2019-12-07 14:40:39,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1451 states. [2019-12-07 14:40:39,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1451 states to 1451 states and 3204 transitions. [2019-12-07 14:40:39,363 INFO L78 Accepts]: Start accepts. Automaton has 1451 states and 3204 transitions. Word has length 51 [2019-12-07 14:40:39,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:39,363 INFO L462 AbstractCegarLoop]: Abstraction has 1451 states and 3204 transitions. [2019-12-07 14:40:39,363 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:40:39,364 INFO L276 IsEmpty]: Start isEmpty. Operand 1451 states and 3204 transitions. [2019-12-07 14:40:39,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 14:40:39,366 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:39,366 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:39,366 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:39,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:39,366 INFO L82 PathProgramCache]: Analyzing trace with hash -2146691981, now seen corresponding path program 3 times [2019-12-07 14:40:39,366 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:39,366 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356223072] [2019-12-07 14:40:39,366 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:39,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:39,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:39,524 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356223072] [2019-12-07 14:40:39,524 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:39,524 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:40:39,524 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665121414] [2019-12-07 14:40:39,524 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:40:39,524 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:39,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:40:39,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:40:39,525 INFO L87 Difference]: Start difference. First operand 1451 states and 3204 transitions. Second operand 10 states. [2019-12-07 14:40:40,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:40,521 INFO L93 Difference]: Finished difference Result 1904 states and 4213 transitions. [2019-12-07 14:40:40,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 14:40:40,522 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 51 [2019-12-07 14:40:40,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:40,529 INFO L225 Difference]: With dead ends: 1904 [2019-12-07 14:40:40,530 INFO L226 Difference]: Without dead ends: 1781 [2019-12-07 14:40:40,530 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=219, Unknown=0, NotChecked=0, Total=272 [2019-12-07 14:40:40,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1781 states. [2019-12-07 14:40:40,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1781 to 1421. [2019-12-07 14:40:40,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1421 states. [2019-12-07 14:40:40,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1421 states to 1421 states and 3135 transitions. [2019-12-07 14:40:40,564 INFO L78 Accepts]: Start accepts. Automaton has 1421 states and 3135 transitions. Word has length 51 [2019-12-07 14:40:40,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:40,564 INFO L462 AbstractCegarLoop]: Abstraction has 1421 states and 3135 transitions. [2019-12-07 14:40:40,564 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:40:40,564 INFO L276 IsEmpty]: Start isEmpty. Operand 1421 states and 3135 transitions. [2019-12-07 14:40:40,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 14:40:40,566 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:40,566 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:40,567 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:40,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:40,567 INFO L82 PathProgramCache]: Analyzing trace with hash 1406453809, now seen corresponding path program 4 times [2019-12-07 14:40:40,567 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:40,567 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [688542555] [2019-12-07 14:40:40,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:40,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:40,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:40,733 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [688542555] [2019-12-07 14:40:40,733 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:40,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 14:40:40,734 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201677364] [2019-12-07 14:40:40,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 14:40:40,734 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:40,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 14:40:40,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:40:40,734 INFO L87 Difference]: Start difference. First operand 1421 states and 3135 transitions. Second operand 12 states. [2019-12-07 14:40:42,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:42,187 INFO L93 Difference]: Finished difference Result 4006 states and 8377 transitions. [2019-12-07 14:40:42,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 14:40:42,187 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 51 [2019-12-07 14:40:42,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:42,191 INFO L225 Difference]: With dead ends: 4006 [2019-12-07 14:40:42,191 INFO L226 Difference]: Without dead ends: 2459 [2019-12-07 14:40:42,192 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 7 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 202 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=225, Invalid=831, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 14:40:42,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2459 states. [2019-12-07 14:40:42,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2459 to 1423. [2019-12-07 14:40:42,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1423 states. [2019-12-07 14:40:42,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1423 states to 1423 states and 3118 transitions. [2019-12-07 14:40:42,214 INFO L78 Accepts]: Start accepts. Automaton has 1423 states and 3118 transitions. Word has length 51 [2019-12-07 14:40:42,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:42,214 INFO L462 AbstractCegarLoop]: Abstraction has 1423 states and 3118 transitions. [2019-12-07 14:40:42,214 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 14:40:42,214 INFO L276 IsEmpty]: Start isEmpty. Operand 1423 states and 3118 transitions. [2019-12-07 14:40:42,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 14:40:42,216 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:42,216 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:42,216 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:42,216 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:42,216 INFO L82 PathProgramCache]: Analyzing trace with hash -767533557, now seen corresponding path program 5 times [2019-12-07 14:40:42,216 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:42,216 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321280770] [2019-12-07 14:40:42,216 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:42,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:42,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:42,384 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1321280770] [2019-12-07 14:40:42,384 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:42,384 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:40:42,384 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1102468049] [2019-12-07 14:40:42,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:40:42,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:42,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:40:42,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:40:42,385 INFO L87 Difference]: Start difference. First operand 1423 states and 3118 transitions. Second operand 11 states. [2019-12-07 14:40:43,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:43,080 INFO L93 Difference]: Finished difference Result 2004 states and 4322 transitions. [2019-12-07 14:40:43,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 14:40:43,080 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 51 [2019-12-07 14:40:43,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:43,083 INFO L225 Difference]: With dead ends: 2004 [2019-12-07 14:40:43,083 INFO L226 Difference]: Without dead ends: 1960 [2019-12-07 14:40:43,084 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=87, Invalid=375, Unknown=0, NotChecked=0, Total=462 [2019-12-07 14:40:43,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1960 states. [2019-12-07 14:40:43,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1960 to 1441. [2019-12-07 14:40:43,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1441 states. [2019-12-07 14:40:43,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1441 states to 1441 states and 3160 transitions. [2019-12-07 14:40:43,099 INFO L78 Accepts]: Start accepts. Automaton has 1441 states and 3160 transitions. Word has length 51 [2019-12-07 14:40:43,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:43,099 INFO L462 AbstractCegarLoop]: Abstraction has 1441 states and 3160 transitions. [2019-12-07 14:40:43,099 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:40:43,099 INFO L276 IsEmpty]: Start isEmpty. Operand 1441 states and 3160 transitions. [2019-12-07 14:40:43,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 14:40:43,101 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:43,101 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:43,101 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:43,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:43,101 INFO L82 PathProgramCache]: Analyzing trace with hash -994757767, now seen corresponding path program 6 times [2019-12-07 14:40:43,101 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:43,101 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046789634] [2019-12-07 14:40:43,101 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:43,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:43,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:43,143 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2046789634] [2019-12-07 14:40:43,144 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:43,144 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:40:43,144 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392478147] [2019-12-07 14:40:43,144 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:40:43,144 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:43,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:40:43,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:40:43,144 INFO L87 Difference]: Start difference. First operand 1441 states and 3160 transitions. Second operand 7 states. [2019-12-07 14:40:43,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:43,326 INFO L93 Difference]: Finished difference Result 3548 states and 7471 transitions. [2019-12-07 14:40:43,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 14:40:43,326 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2019-12-07 14:40:43,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:43,328 INFO L225 Difference]: With dead ends: 3548 [2019-12-07 14:40:43,329 INFO L226 Difference]: Without dead ends: 2505 [2019-12-07 14:40:43,329 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:40:43,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2505 states. [2019-12-07 14:40:43,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2505 to 1376. [2019-12-07 14:40:43,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1376 states. [2019-12-07 14:40:43,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1376 states to 1376 states and 2989 transitions. [2019-12-07 14:40:43,347 INFO L78 Accepts]: Start accepts. Automaton has 1376 states and 2989 transitions. Word has length 51 [2019-12-07 14:40:43,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:43,347 INFO L462 AbstractCegarLoop]: Abstraction has 1376 states and 2989 transitions. [2019-12-07 14:40:43,347 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:40:43,347 INFO L276 IsEmpty]: Start isEmpty. Operand 1376 states and 2989 transitions. [2019-12-07 14:40:43,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 14:40:43,349 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:43,349 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:43,349 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:43,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:43,349 INFO L82 PathProgramCache]: Analyzing trace with hash 1876939711, now seen corresponding path program 7 times [2019-12-07 14:40:43,349 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:43,349 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1597675745] [2019-12-07 14:40:43,349 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:43,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:43,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:43,441 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1597675745] [2019-12-07 14:40:43,441 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:43,441 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:40:43,441 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1971957500] [2019-12-07 14:40:43,442 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 14:40:43,442 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:43,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 14:40:43,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:40:43,442 INFO L87 Difference]: Start difference. First operand 1376 states and 2989 transitions. Second operand 9 states. [2019-12-07 14:40:43,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:43,978 INFO L93 Difference]: Finished difference Result 1952 states and 4064 transitions. [2019-12-07 14:40:43,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 14:40:43,978 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 51 [2019-12-07 14:40:43,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:43,981 INFO L225 Difference]: With dead ends: 1952 [2019-12-07 14:40:43,981 INFO L226 Difference]: Without dead ends: 1952 [2019-12-07 14:40:43,981 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 4 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2019-12-07 14:40:43,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1952 states. [2019-12-07 14:40:44,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1952 to 1233. [2019-12-07 14:40:44,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1233 states. [2019-12-07 14:40:44,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1233 states to 1233 states and 2612 transitions. [2019-12-07 14:40:44,002 INFO L78 Accepts]: Start accepts. Automaton has 1233 states and 2612 transitions. Word has length 51 [2019-12-07 14:40:44,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:44,003 INFO L462 AbstractCegarLoop]: Abstraction has 1233 states and 2612 transitions. [2019-12-07 14:40:44,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 14:40:44,003 INFO L276 IsEmpty]: Start isEmpty. Operand 1233 states and 2612 transitions. [2019-12-07 14:40:44,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 14:40:44,005 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:44,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:44,005 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:44,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:44,006 INFO L82 PathProgramCache]: Analyzing trace with hash 1053790121, now seen corresponding path program 8 times [2019-12-07 14:40:44,006 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:44,006 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1569035194] [2019-12-07 14:40:44,006 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:44,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:40:44,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:40:44,046 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1569035194] [2019-12-07 14:40:44,046 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:40:44,046 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:40:44,046 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430732244] [2019-12-07 14:40:44,047 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:40:44,047 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:40:44,047 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:40:44,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:40:44,047 INFO L87 Difference]: Start difference. First operand 1233 states and 2612 transitions. Second operand 3 states. [2019-12-07 14:40:44,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:40:44,055 INFO L93 Difference]: Finished difference Result 1232 states and 2610 transitions. [2019-12-07 14:40:44,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:40:44,056 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 51 [2019-12-07 14:40:44,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:40:44,057 INFO L225 Difference]: With dead ends: 1232 [2019-12-07 14:40:44,057 INFO L226 Difference]: Without dead ends: 1232 [2019-12-07 14:40:44,057 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:40:44,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1232 states. [2019-12-07 14:40:44,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1232 to 1003. [2019-12-07 14:40:44,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1003 states. [2019-12-07 14:40:44,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1003 states to 1003 states and 2167 transitions. [2019-12-07 14:40:44,068 INFO L78 Accepts]: Start accepts. Automaton has 1003 states and 2167 transitions. Word has length 51 [2019-12-07 14:40:44,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:40:44,068 INFO L462 AbstractCegarLoop]: Abstraction has 1003 states and 2167 transitions. [2019-12-07 14:40:44,068 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:40:44,068 INFO L276 IsEmpty]: Start isEmpty. Operand 1003 states and 2167 transitions. [2019-12-07 14:40:44,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 14:40:44,070 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:40:44,070 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:40:44,070 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:40:44,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:40:44,070 INFO L82 PathProgramCache]: Analyzing trace with hash 860763375, now seen corresponding path program 1 times [2019-12-07 14:40:44,070 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:40:44,070 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1866773300] [2019-12-07 14:40:44,070 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:40:44,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:40:44,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:40:44,127 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:40:44,127 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:40:44,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] ULTIMATE.startENTRY-->L804: Formula: (let ((.cse0 (store |v_#valid_57| 0 0))) (and (= 0 v_~__unbuffered_p0_EAX~0_86) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t909~0.base_35|) (= v_~z$w_buff1_used~0_473 0) (= v_~z$r_buff0_thd0~0_147 0) (= 0 v_~z$flush_delayed~0_37) (= v_~y~0_17 0) (= v_~z$w_buff0~0_405 0) (= v_~z$r_buff1_thd2~0_225 0) (= v_~z$w_buff1~0_248 0) (= v_~z~0_137 0) (= v_~main$tmp_guard0~0_15 0) (= v_~z$r_buff1_thd1~0_122 0) (= v_~__unbuffered_p1_EBX~0_35 0) (= 0 v_~__unbuffered_cnt~0_56) (= v_~weak$$choice2~0_106 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= |v_ULTIMATE.start_main_~#t909~0.offset_24| 0) (= v_~z$r_buff1_thd0~0_141 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~z$r_buff0_thd2~0_374 0) (= 0 v_~weak$$choice0~0_18) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z$w_buff0_used~0_734 0) (= |v_#NULL.offset_5| 0) (= v_~main$tmp_guard1~0_36 0) (= v_~x~0_79 0) (= v_~z$r_buff0_thd1~0_206 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t909~0.base_35| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t909~0.base_35|) |v_ULTIMATE.start_main_~#t909~0.offset_24| 0)) |v_#memory_int_15|) (= |v_#valid_55| (store .cse0 |v_ULTIMATE.start_main_~#t909~0.base_35| 1)) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t909~0.base_35|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t909~0.base_35| 4)) (= 0 |v_#NULL.base_5|) (= v_~z$mem_tmp~0_21 0) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_57|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_225, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_248, #NULL.offset=|v_#NULL.offset_5|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_271|, ULTIMATE.start_main_~#t909~0.offset=|v_ULTIMATE.start_main_~#t909~0.offset_24|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_129|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_75|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_147, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_86, ULTIMATE.start_main_~#t909~0.base=|v_ULTIMATE.start_main_~#t909~0.base_35|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_141, #length=|v_#length_15|, ~y~0=v_~y~0_17, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_374, ~z$mem_tmp~0=v_~z$mem_tmp~0_21, ULTIMATE.start_main_~#t910~0.offset=|v_ULTIMATE.start_main_~#t910~0.offset_15|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_35, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_734, ~z$w_buff0~0=v_~z$w_buff0~0_405, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_473, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_15, #NULL.base=|v_#NULL.base_5|, ~weak$$choice0~0=v_~weak$$choice0~0_18, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_53|, ULTIMATE.start_main_~#t910~0.base=|v_ULTIMATE.start_main_~#t910~0.base_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_77|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_55|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_122, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_17|, ~z~0=v_~z~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_106, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_206, ~x~0=v_~x~0_79} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ~main$tmp_guard1~0, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_~#t909~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t909~0.base, ~__unbuffered_p1_EAX~0, ~z$r_buff1_thd0~0, #length, ~y~0, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t910~0.offset, ~__unbuffered_p1_EBX~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t910~0.base, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ULTIMATE.start_main_#t~nondet38, ~z$read_delayed_var~0.base, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 14:40:44,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L804-1-->L806: Formula: (and (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t910~0.base_13| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t910~0.base_13|) |v_ULTIMATE.start_main_~#t910~0.offset_11| 1))) (not (= 0 |v_ULTIMATE.start_main_~#t910~0.base_13|)) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t910~0.base_13| 1) |v_#valid_29|) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t910~0.base_13|) 0) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t910~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t910~0.offset_11|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t910~0.base_13| 4) |v_#length_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t910~0.base=|v_ULTIMATE.start_main_~#t910~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t910~0.offset=|v_ULTIMATE.start_main_~#t910~0.offset_11|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t910~0.base, ULTIMATE.start_main_~#t910~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 14:40:44,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->L4-3: Formula: (and (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-452979125| (ite (not (and (not (= (mod ~z$w_buff1_used~0_Out-452979125 256) 0)) (not (= 0 (mod ~z$w_buff0_used~0_Out-452979125 256))))) 1 0)) (= P0Thread1of1ForFork0_~arg.base_Out-452979125 |P0Thread1of1ForFork0_#in~arg.base_In-452979125|) (not (= P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-452979125 0)) (= ~z$w_buff1~0_Out-452979125 ~z$w_buff0~0_In-452979125) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-452979125| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-452979125) (= |P0Thread1of1ForFork0_#in~arg.offset_In-452979125| P0Thread1of1ForFork0_~arg.offset_Out-452979125) (= ~z$w_buff1_used~0_Out-452979125 ~z$w_buff0_used~0_In-452979125) (= ~z$w_buff0_used~0_Out-452979125 1) (= 1 ~z$w_buff0~0_Out-452979125)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-452979125|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-452979125, ~z$w_buff0~0=~z$w_buff0~0_In-452979125, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-452979125|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-452979125|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out-452979125, ~z$w_buff0~0=~z$w_buff0~0_Out-452979125, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-452979125, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out-452979125, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-452979125|, ~z$w_buff1~0=~z$w_buff1~0_Out-452979125, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out-452979125, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-452979125|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out-452979125} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 14:40:44,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L773-->L773-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1861354638 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite24_Out-1861354638| |P1Thread1of1ForFork1_#t~ite23_Out-1861354638|) (= |P1Thread1of1ForFork1_#t~ite23_Out-1861354638| ~z$w_buff1_used~0_In-1861354638) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1861354638 256)))) (or (and (= (mod ~z$w_buff1_used~0_In-1861354638 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In-1861354638 256) 0) (and (= (mod ~z$r_buff1_thd2~0_In-1861354638 256) 0) .cse1)))) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite24_Out-1861354638| ~z$w_buff1_used~0_In-1861354638) (= |P1Thread1of1ForFork1_#t~ite23_In-1861354638| |P1Thread1of1ForFork1_#t~ite23_Out-1861354638|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1861354638, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1861354638, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1861354638, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_In-1861354638|, ~weak$$choice2~0=~weak$$choice2~0_In-1861354638, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1861354638} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1861354638, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1861354638, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_Out-1861354638|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1861354638, P1Thread1of1ForFork1_#t~ite24=|P1Thread1of1ForFork1_#t~ite24_Out-1861354638|, ~weak$$choice2~0=~weak$$choice2~0_In-1861354638, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1861354638} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite23, P1Thread1of1ForFork1_#t~ite24] because there is no mapped edge [2019-12-07 14:40:44,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L774-->L775-8: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite28_49| |v_P1Thread1of1ForFork1_#t~ite28_48|) (= |v_P1Thread1of1ForFork1_#t~ite29_44| |v_P1Thread1of1ForFork1_#t~ite29_45|) (= v_~z$r_buff1_thd2~0_205 |v_P1Thread1of1ForFork1_#t~ite30_38|) (= v_~z$r_buff0_thd2~0_355 v_~z$r_buff0_thd2~0_354) (not (= 0 (mod v_~weak$$choice2~0_96 256)))) InVars {P1Thread1of1ForFork1_#t~ite29=|v_P1Thread1of1ForFork1_#t~ite29_45|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_205, ~weak$$choice2~0=v_~weak$$choice2~0_96, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_355, P1Thread1of1ForFork1_#t~ite28=|v_P1Thread1of1ForFork1_#t~ite28_49|} OutVars{P1Thread1of1ForFork1_#t~ite29=|v_P1Thread1of1ForFork1_#t~ite29_44|, P1Thread1of1ForFork1_#t~ite30=|v_P1Thread1of1ForFork1_#t~ite30_38|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_205, ~weak$$choice2~0=v_~weak$$choice2~0_96, P1Thread1of1ForFork1_#t~ite27=|v_P1Thread1of1ForFork1_#t~ite27_24|, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_354, P1Thread1of1ForFork1_#t~ite28=|v_P1Thread1of1ForFork1_#t~ite28_48|, P1Thread1of1ForFork1_#t~ite25=|v_P1Thread1of1ForFork1_#t~ite25_27|, P1Thread1of1ForFork1_#t~ite26=|v_P1Thread1of1ForFork1_#t~ite26_29|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite29, P1Thread1of1ForFork1_#t~ite30, P1Thread1of1ForFork1_#t~ite27, ~z$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite28, P1Thread1of1ForFork1_#t~ite25, P1Thread1of1ForFork1_#t~ite26] because there is no mapped edge [2019-12-07 14:40:44,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [664] [664] L777-->L781: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_31 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_31} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 14:40:44,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L743-->L743-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1737548974 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1737548974 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1737548974 |P0Thread1of1ForFork0_#t~ite5_Out-1737548974|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1737548974|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1737548974, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1737548974} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1737548974|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1737548974, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1737548974} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:40:44,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L744-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd1~0_In1502959718 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1502959718 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1502959718 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1502959718 256) 0))) (or (and (= ~z$w_buff1_used~0_In1502959718 |P0Thread1of1ForFork0_#t~ite6_Out1502959718|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork0_#t~ite6_Out1502959718| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1502959718, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1502959718, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1502959718, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1502959718} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1502959718|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1502959718, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1502959718, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1502959718, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1502959718} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:40:44,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L745-->L746: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-1755935292 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1755935292 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_In-1755935292 ~z$r_buff0_thd1~0_Out-1755935292))) (or (and .cse0 .cse1) (and (not .cse1) (= 0 ~z$r_buff0_thd1~0_Out-1755935292) (not .cse2)) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1755935292, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1755935292} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1755935292, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1755935292|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1755935292} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:40:44,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L746-->L746-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-321500001 256))) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-321500001 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-321500001 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-321500001 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-321500001| 0)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$r_buff1_thd1~0_In-321500001 |P0Thread1of1ForFork0_#t~ite8_Out-321500001|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-321500001, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-321500001, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321500001, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-321500001} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-321500001, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-321500001|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-321500001, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321500001, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-321500001} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:40:44,136 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L781-2-->L781-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1637219490 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1637219490 256))) (.cse2 (= |P1Thread1of1ForFork1_#t~ite33_Out1637219490| |P1Thread1of1ForFork1_#t~ite32_Out1637219490|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~z$w_buff1~0_In1637219490 |P1Thread1of1ForFork1_#t~ite32_Out1637219490|)) (and (or .cse0 .cse1) (= ~z~0_In1637219490 |P1Thread1of1ForFork1_#t~ite32_Out1637219490|) .cse2))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1637219490, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1637219490, ~z$w_buff1~0=~z$w_buff1~0_In1637219490, ~z~0=~z~0_In1637219490} OutVars{~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1637219490, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1637219490, ~z$w_buff1~0=~z$w_buff1~0_In1637219490, P1Thread1of1ForFork1_#t~ite32=|P1Thread1of1ForFork1_#t~ite32_Out1637219490|, P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out1637219490|, ~z~0=~z~0_In1637219490} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 14:40:44,136 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L782-->L782-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In323502599 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In323502599 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite34_Out323502599| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite34_Out323502599| ~z$w_buff0_used~0_In323502599)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In323502599, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In323502599} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In323502599, P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out323502599|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In323502599} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 14:40:44,137 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L783-->L783-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In620744796 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In620744796 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In620744796 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In620744796 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite35_Out620744796| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite35_Out620744796| ~z$w_buff1_used~0_In620744796) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In620744796, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In620744796, ~z$w_buff1_used~0=~z$w_buff1_used~0_In620744796, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In620744796} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In620744796, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In620744796, ~z$w_buff1_used~0=~z$w_buff1_used~0_In620744796, P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out620744796|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In620744796} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 14:40:44,137 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L784-->L784-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-1173676309 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1173676309 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite36_Out-1173676309| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite36_Out-1173676309| ~z$r_buff0_thd2~0_In-1173676309)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1173676309, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1173676309} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1173676309, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1173676309, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out-1173676309|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 14:40:44,137 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L785-->L785-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-455736955 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-455736955 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-455736955 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In-455736955 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite37_Out-455736955| ~z$r_buff1_thd2~0_In-455736955) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite37_Out-455736955| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-455736955, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-455736955, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-455736955, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-455736955} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-455736955, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-455736955, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-455736955, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-455736955, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out-455736955|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:40:44,137 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L785-2-->P1EXIT: Formula: (and (= v_~z$r_buff1_thd2~0_128 |v_P1Thread1of1ForFork1_#t~ite37_28|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_128, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_27|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:40:44,137 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [735] [735] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_33 (+ v_~__unbuffered_cnt~0_34 1)) (= v_~z$r_buff1_thd1~0_51 |v_P0Thread1of1ForFork0_#t~ite8_26|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_51, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:40:44,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L806-1-->L812: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_22) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_22} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_22, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 14:40:44,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L812-2-->L812-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1441958195 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In1441958195 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite40_Out1441958195| ~z~0_In1441958195) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite40_Out1441958195| ~z$w_buff1~0_In1441958195) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1441958195, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1441958195, ~z$w_buff1~0=~z$w_buff1~0_In1441958195, ~z~0=~z~0_In1441958195} OutVars{ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1441958195|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1441958195, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1441958195, ~z$w_buff1~0=~z$w_buff1~0_In1441958195, ~z~0=~z~0_In1441958195} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-12-07 14:40:44,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L812-4-->L813: Formula: (= v_~z~0_17 |v_ULTIMATE.start_main_#t~ite40_11|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ~z~0=v_~z~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~z~0] because there is no mapped edge [2019-12-07 14:40:44,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1411835082 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1411835082 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite42_Out1411835082|)) (and (= ~z$w_buff0_used~0_In1411835082 |ULTIMATE.start_main_#t~ite42_Out1411835082|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1411835082, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1411835082} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1411835082, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1411835082, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out1411835082|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:40:44,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In904719222 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In904719222 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In904719222 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In904719222 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In904719222 |ULTIMATE.start_main_#t~ite43_Out904719222|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite43_Out904719222| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In904719222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In904719222, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In904719222, ~z$w_buff1_used~0=~z$w_buff1_used~0_In904719222} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In904719222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In904719222, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In904719222, ~z$w_buff1_used~0=~z$w_buff1_used~0_In904719222, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out904719222|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 14:40:44,139 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-311027031 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-311027031 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out-311027031| ~z$r_buff0_thd0~0_In-311027031) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite44_Out-311027031| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-311027031, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-311027031} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-311027031, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-311027031, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-311027031|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 14:40:44,139 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L816-->L816-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-893952704 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-893952704 256))) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-893952704 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-893952704 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite45_Out-893952704| ~z$r_buff1_thd0~0_In-893952704)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite45_Out-893952704| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-893952704, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-893952704, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-893952704, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-893952704} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-893952704, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-893952704, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-893952704, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-893952704, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-893952704|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 14:40:44,139 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L816-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_14 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_14 0) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_52) (= v_~__unbuffered_p1_EBX~0_20 0) (= 1 v_~__unbuffered_p1_EAX~0_22))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_15) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_15 256)) (= |v_ULTIMATE.start_main_#t~ite45_42| v_~z$r_buff1_thd0~0_93)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_52, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_42|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_52, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_14, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_93, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_41|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:40:44,180 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:40:44 BasicIcfg [2019-12-07 14:40:44,180 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:40:44,181 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:40:44,181 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:40:44,181 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:40:44,181 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:40:30" (3/4) ... [2019-12-07 14:40:44,183 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:40:44,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] ULTIMATE.startENTRY-->L804: Formula: (let ((.cse0 (store |v_#valid_57| 0 0))) (and (= 0 v_~__unbuffered_p0_EAX~0_86) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t909~0.base_35|) (= v_~z$w_buff1_used~0_473 0) (= v_~z$r_buff0_thd0~0_147 0) (= 0 v_~z$flush_delayed~0_37) (= v_~y~0_17 0) (= v_~z$w_buff0~0_405 0) (= v_~z$r_buff1_thd2~0_225 0) (= v_~z$w_buff1~0_248 0) (= v_~z~0_137 0) (= v_~main$tmp_guard0~0_15 0) (= v_~z$r_buff1_thd1~0_122 0) (= v_~__unbuffered_p1_EBX~0_35 0) (= 0 v_~__unbuffered_cnt~0_56) (= v_~weak$$choice2~0_106 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= |v_ULTIMATE.start_main_~#t909~0.offset_24| 0) (= v_~z$r_buff1_thd0~0_141 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~z$r_buff0_thd2~0_374 0) (= 0 v_~weak$$choice0~0_18) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z$w_buff0_used~0_734 0) (= |v_#NULL.offset_5| 0) (= v_~main$tmp_guard1~0_36 0) (= v_~x~0_79 0) (= v_~z$r_buff0_thd1~0_206 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t909~0.base_35| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t909~0.base_35|) |v_ULTIMATE.start_main_~#t909~0.offset_24| 0)) |v_#memory_int_15|) (= |v_#valid_55| (store .cse0 |v_ULTIMATE.start_main_~#t909~0.base_35| 1)) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t909~0.base_35|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t909~0.base_35| 4)) (= 0 |v_#NULL.base_5|) (= v_~z$mem_tmp~0_21 0) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_57|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_225, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_248, #NULL.offset=|v_#NULL.offset_5|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_271|, ULTIMATE.start_main_~#t909~0.offset=|v_ULTIMATE.start_main_~#t909~0.offset_24|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_129|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_75|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_147, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_86, ULTIMATE.start_main_~#t909~0.base=|v_ULTIMATE.start_main_~#t909~0.base_35|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_141, #length=|v_#length_15|, ~y~0=v_~y~0_17, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_374, ~z$mem_tmp~0=v_~z$mem_tmp~0_21, ULTIMATE.start_main_~#t910~0.offset=|v_ULTIMATE.start_main_~#t910~0.offset_15|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_35, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_734, ~z$w_buff0~0=v_~z$w_buff0~0_405, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_473, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_15, #NULL.base=|v_#NULL.base_5|, ~weak$$choice0~0=v_~weak$$choice0~0_18, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_53|, ULTIMATE.start_main_~#t910~0.base=|v_ULTIMATE.start_main_~#t910~0.base_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_77|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_55|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_122, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_17|, ~z~0=v_~z~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_106, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_206, ~x~0=v_~x~0_79} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ~main$tmp_guard1~0, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_~#t909~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t909~0.base, ~__unbuffered_p1_EAX~0, ~z$r_buff1_thd0~0, #length, ~y~0, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t910~0.offset, ~__unbuffered_p1_EBX~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t910~0.base, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ULTIMATE.start_main_#t~nondet38, ~z$read_delayed_var~0.base, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 14:40:44,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L804-1-->L806: Formula: (and (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t910~0.base_13| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t910~0.base_13|) |v_ULTIMATE.start_main_~#t910~0.offset_11| 1))) (not (= 0 |v_ULTIMATE.start_main_~#t910~0.base_13|)) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t910~0.base_13| 1) |v_#valid_29|) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t910~0.base_13|) 0) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t910~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t910~0.offset_11|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t910~0.base_13| 4) |v_#length_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t910~0.base=|v_ULTIMATE.start_main_~#t910~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t910~0.offset=|v_ULTIMATE.start_main_~#t910~0.offset_11|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t910~0.base, ULTIMATE.start_main_~#t910~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 14:40:44,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->L4-3: Formula: (and (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-452979125| (ite (not (and (not (= (mod ~z$w_buff1_used~0_Out-452979125 256) 0)) (not (= 0 (mod ~z$w_buff0_used~0_Out-452979125 256))))) 1 0)) (= P0Thread1of1ForFork0_~arg.base_Out-452979125 |P0Thread1of1ForFork0_#in~arg.base_In-452979125|) (not (= P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-452979125 0)) (= ~z$w_buff1~0_Out-452979125 ~z$w_buff0~0_In-452979125) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-452979125| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-452979125) (= |P0Thread1of1ForFork0_#in~arg.offset_In-452979125| P0Thread1of1ForFork0_~arg.offset_Out-452979125) (= ~z$w_buff1_used~0_Out-452979125 ~z$w_buff0_used~0_In-452979125) (= ~z$w_buff0_used~0_Out-452979125 1) (= 1 ~z$w_buff0~0_Out-452979125)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-452979125|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-452979125, ~z$w_buff0~0=~z$w_buff0~0_In-452979125, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-452979125|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-452979125|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out-452979125, ~z$w_buff0~0=~z$w_buff0~0_Out-452979125, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-452979125, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out-452979125, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-452979125|, ~z$w_buff1~0=~z$w_buff1~0_Out-452979125, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out-452979125, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-452979125|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out-452979125} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 14:40:44,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L773-->L773-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1861354638 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite24_Out-1861354638| |P1Thread1of1ForFork1_#t~ite23_Out-1861354638|) (= |P1Thread1of1ForFork1_#t~ite23_Out-1861354638| ~z$w_buff1_used~0_In-1861354638) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1861354638 256)))) (or (and (= (mod ~z$w_buff1_used~0_In-1861354638 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In-1861354638 256) 0) (and (= (mod ~z$r_buff1_thd2~0_In-1861354638 256) 0) .cse1)))) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite24_Out-1861354638| ~z$w_buff1_used~0_In-1861354638) (= |P1Thread1of1ForFork1_#t~ite23_In-1861354638| |P1Thread1of1ForFork1_#t~ite23_Out-1861354638|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1861354638, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1861354638, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1861354638, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_In-1861354638|, ~weak$$choice2~0=~weak$$choice2~0_In-1861354638, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1861354638} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1861354638, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1861354638, P1Thread1of1ForFork1_#t~ite23=|P1Thread1of1ForFork1_#t~ite23_Out-1861354638|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1861354638, P1Thread1of1ForFork1_#t~ite24=|P1Thread1of1ForFork1_#t~ite24_Out-1861354638|, ~weak$$choice2~0=~weak$$choice2~0_In-1861354638, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1861354638} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite23, P1Thread1of1ForFork1_#t~ite24] because there is no mapped edge [2019-12-07 14:40:44,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L774-->L775-8: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite28_49| |v_P1Thread1of1ForFork1_#t~ite28_48|) (= |v_P1Thread1of1ForFork1_#t~ite29_44| |v_P1Thread1of1ForFork1_#t~ite29_45|) (= v_~z$r_buff1_thd2~0_205 |v_P1Thread1of1ForFork1_#t~ite30_38|) (= v_~z$r_buff0_thd2~0_355 v_~z$r_buff0_thd2~0_354) (not (= 0 (mod v_~weak$$choice2~0_96 256)))) InVars {P1Thread1of1ForFork1_#t~ite29=|v_P1Thread1of1ForFork1_#t~ite29_45|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_205, ~weak$$choice2~0=v_~weak$$choice2~0_96, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_355, P1Thread1of1ForFork1_#t~ite28=|v_P1Thread1of1ForFork1_#t~ite28_49|} OutVars{P1Thread1of1ForFork1_#t~ite29=|v_P1Thread1of1ForFork1_#t~ite29_44|, P1Thread1of1ForFork1_#t~ite30=|v_P1Thread1of1ForFork1_#t~ite30_38|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_205, ~weak$$choice2~0=v_~weak$$choice2~0_96, P1Thread1of1ForFork1_#t~ite27=|v_P1Thread1of1ForFork1_#t~ite27_24|, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_354, P1Thread1of1ForFork1_#t~ite28=|v_P1Thread1of1ForFork1_#t~ite28_48|, P1Thread1of1ForFork1_#t~ite25=|v_P1Thread1of1ForFork1_#t~ite25_27|, P1Thread1of1ForFork1_#t~ite26=|v_P1Thread1of1ForFork1_#t~ite26_29|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite29, P1Thread1of1ForFork1_#t~ite30, P1Thread1of1ForFork1_#t~ite27, ~z$r_buff0_thd2~0, P1Thread1of1ForFork1_#t~ite28, P1Thread1of1ForFork1_#t~ite25, P1Thread1of1ForFork1_#t~ite26] because there is no mapped edge [2019-12-07 14:40:44,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [664] [664] L777-->L781: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_31 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_31} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 14:40:44,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L743-->L743-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1737548974 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1737548974 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1737548974 |P0Thread1of1ForFork0_#t~ite5_Out-1737548974|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1737548974|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1737548974, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1737548974} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1737548974|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1737548974, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1737548974} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:40:44,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L744-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd1~0_In1502959718 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1502959718 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1502959718 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1502959718 256) 0))) (or (and (= ~z$w_buff1_used~0_In1502959718 |P0Thread1of1ForFork0_#t~ite6_Out1502959718|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork0_#t~ite6_Out1502959718| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1502959718, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1502959718, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1502959718, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1502959718} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1502959718|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1502959718, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1502959718, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1502959718, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1502959718} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:40:44,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L745-->L746: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-1755935292 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1755935292 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_In-1755935292 ~z$r_buff0_thd1~0_Out-1755935292))) (or (and .cse0 .cse1) (and (not .cse1) (= 0 ~z$r_buff0_thd1~0_Out-1755935292) (not .cse2)) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1755935292, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1755935292} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1755935292, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1755935292|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1755935292} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:40:44,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L746-->L746-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-321500001 256))) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-321500001 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-321500001 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-321500001 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-321500001| 0)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$r_buff1_thd1~0_In-321500001 |P0Thread1of1ForFork0_#t~ite8_Out-321500001|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-321500001, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-321500001, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321500001, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-321500001} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-321500001, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-321500001|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-321500001, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-321500001, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-321500001} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:40:44,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L781-2-->L781-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1637219490 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1637219490 256))) (.cse2 (= |P1Thread1of1ForFork1_#t~ite33_Out1637219490| |P1Thread1of1ForFork1_#t~ite32_Out1637219490|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~z$w_buff1~0_In1637219490 |P1Thread1of1ForFork1_#t~ite32_Out1637219490|)) (and (or .cse0 .cse1) (= ~z~0_In1637219490 |P1Thread1of1ForFork1_#t~ite32_Out1637219490|) .cse2))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1637219490, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1637219490, ~z$w_buff1~0=~z$w_buff1~0_In1637219490, ~z~0=~z~0_In1637219490} OutVars{~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1637219490, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1637219490, ~z$w_buff1~0=~z$w_buff1~0_In1637219490, P1Thread1of1ForFork1_#t~ite32=|P1Thread1of1ForFork1_#t~ite32_Out1637219490|, P1Thread1of1ForFork1_#t~ite33=|P1Thread1of1ForFork1_#t~ite33_Out1637219490|, ~z~0=~z~0_In1637219490} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite32, P1Thread1of1ForFork1_#t~ite33] because there is no mapped edge [2019-12-07 14:40:44,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L782-->L782-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In323502599 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In323502599 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite34_Out323502599| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite34_Out323502599| ~z$w_buff0_used~0_In323502599)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In323502599, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In323502599} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In323502599, P1Thread1of1ForFork1_#t~ite34=|P1Thread1of1ForFork1_#t~ite34_Out323502599|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In323502599} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 14:40:44,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L783-->L783-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In620744796 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In620744796 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In620744796 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In620744796 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite35_Out620744796| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite35_Out620744796| ~z$w_buff1_used~0_In620744796) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In620744796, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In620744796, ~z$w_buff1_used~0=~z$w_buff1_used~0_In620744796, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In620744796} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In620744796, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In620744796, ~z$w_buff1_used~0=~z$w_buff1_used~0_In620744796, P1Thread1of1ForFork1_#t~ite35=|P1Thread1of1ForFork1_#t~ite35_Out620744796|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In620744796} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 14:40:44,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L784-->L784-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-1173676309 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1173676309 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite36_Out-1173676309| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite36_Out-1173676309| ~z$r_buff0_thd2~0_In-1173676309)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1173676309, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1173676309} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1173676309, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1173676309, P1Thread1of1ForFork1_#t~ite36=|P1Thread1of1ForFork1_#t~ite36_Out-1173676309|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 14:40:44,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L785-->L785-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-455736955 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-455736955 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-455736955 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In-455736955 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite37_Out-455736955| ~z$r_buff1_thd2~0_In-455736955) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite37_Out-455736955| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-455736955, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-455736955, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-455736955, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-455736955} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-455736955, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-455736955, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-455736955, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-455736955, P1Thread1of1ForFork1_#t~ite37=|P1Thread1of1ForFork1_#t~ite37_Out-455736955|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:40:44,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L785-2-->P1EXIT: Formula: (and (= v_~z$r_buff1_thd2~0_128 |v_P1Thread1of1ForFork1_#t~ite37_28|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_128, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|, P1Thread1of1ForFork1_#t~ite37=|v_P1Thread1of1ForFork1_#t~ite37_27|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base, P1Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:40:44,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [735] [735] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_33 (+ v_~__unbuffered_cnt~0_34 1)) (= v_~z$r_buff1_thd1~0_51 |v_P0Thread1of1ForFork0_#t~ite8_26|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_51, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:40:44,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L806-1-->L812: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 2 v_~__unbuffered_cnt~0_22) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_22} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_22, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 14:40:44,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L812-2-->L812-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1441958195 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In1441958195 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite40_Out1441958195| ~z~0_In1441958195) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite40_Out1441958195| ~z$w_buff1~0_In1441958195) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1441958195, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1441958195, ~z$w_buff1~0=~z$w_buff1~0_In1441958195, ~z~0=~z~0_In1441958195} OutVars{ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1441958195|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1441958195, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1441958195, ~z$w_buff1~0=~z$w_buff1~0_In1441958195, ~z~0=~z~0_In1441958195} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40] because there is no mapped edge [2019-12-07 14:40:44,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L812-4-->L813: Formula: (= v_~z~0_17 |v_ULTIMATE.start_main_#t~ite40_11|) InVars {ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ~z~0=v_~z~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~z~0] because there is no mapped edge [2019-12-07 14:40:44,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1411835082 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1411835082 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite42_Out1411835082|)) (and (= ~z$w_buff0_used~0_In1411835082 |ULTIMATE.start_main_#t~ite42_Out1411835082|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1411835082, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1411835082} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1411835082, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1411835082, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out1411835082|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:40:44,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In904719222 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In904719222 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In904719222 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In904719222 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In904719222 |ULTIMATE.start_main_#t~ite43_Out904719222|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite43_Out904719222| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In904719222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In904719222, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In904719222, ~z$w_buff1_used~0=~z$w_buff1_used~0_In904719222} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In904719222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In904719222, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In904719222, ~z$w_buff1_used~0=~z$w_buff1_used~0_In904719222, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out904719222|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 14:40:44,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-311027031 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-311027031 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out-311027031| ~z$r_buff0_thd0~0_In-311027031) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite44_Out-311027031| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-311027031, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-311027031} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-311027031, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-311027031, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-311027031|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 14:40:44,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L816-->L816-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-893952704 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-893952704 256))) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-893952704 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-893952704 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite45_Out-893952704| ~z$r_buff1_thd0~0_In-893952704)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite45_Out-893952704| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-893952704, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-893952704, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-893952704, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-893952704} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-893952704, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-893952704, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-893952704, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-893952704, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-893952704|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 14:40:44,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L816-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_14 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_14 0) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_52) (= v_~__unbuffered_p1_EBX~0_20 0) (= 1 v_~__unbuffered_p1_EAX~0_22))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_15) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_15 256)) (= |v_ULTIMATE.start_main_#t~ite45_42| v_~z$r_buff1_thd0~0_93)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_52, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_42|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_52, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_14, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_20, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_93, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_41|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:40:44,239 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_099b46f7-f76d-4215-a892-85b175b2f8b5/bin/uautomizer/witness.graphml [2019-12-07 14:40:44,239 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:40:44,240 INFO L168 Benchmark]: Toolchain (without parser) took 14257.85 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 413.1 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -211.3 MB). Peak memory consumption was 201.9 MB. Max. memory is 11.5 GB. [2019-12-07 14:40:44,240 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:40:44,241 INFO L168 Benchmark]: CACSL2BoogieTranslator took 422.33 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 87.6 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -115.8 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 14:40:44,241 INFO L168 Benchmark]: Boogie Procedure Inliner took 48.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:40:44,241 INFO L168 Benchmark]: Boogie Preprocessor took 24.54 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:40:44,241 INFO L168 Benchmark]: RCFGBuilder took 378.37 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 999.2 MB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. [2019-12-07 14:40:44,242 INFO L168 Benchmark]: TraceAbstraction took 13322.03 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 325.6 MB). Free memory was 999.2 MB in the beginning and 1.2 GB in the end (delta: -165.9 MB). Peak memory consumption was 159.6 MB. Max. memory is 11.5 GB. [2019-12-07 14:40:44,242 INFO L168 Benchmark]: Witness Printer took 58.45 ms. Allocated memory is still 1.4 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 15.9 MB). Peak memory consumption was 15.9 MB. Max. memory is 11.5 GB. [2019-12-07 14:40:44,243 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 422.33 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 87.6 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -115.8 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 48.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.54 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 378.37 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 999.2 MB in the end (delta: 49.2 MB). Peak memory consumption was 49.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13322.03 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 325.6 MB). Free memory was 999.2 MB in the beginning and 1.2 GB in the end (delta: -165.9 MB). Peak memory consumption was 159.6 MB. Max. memory is 11.5 GB. * Witness Printer took 58.45 ms. Allocated memory is still 1.4 GB. Free memory was 1.2 GB in the beginning and 1.1 GB in the end (delta: 15.9 MB). Peak memory consumption was 15.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 149 ProgramPointsBefore, 76 ProgramPointsAfterwards, 183 TransitionsBefore, 87 TransitionsAfterwards, 12056 CoEnabledTransitionPairs, 11 FixpointIterations, 31 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 31 ConcurrentYvCompositions, 26 ChoiceCompositions, 4657 VarBasedMoverChecksPositive, 296 VarBasedMoverChecksNegative, 137 SemBasedMoverChecksPositive, 234 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 72636 CheckedPairsTotal, 111 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L804] FCALL, FORK 0 pthread_create(&t909, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L806] FCALL, FORK 0 pthread_create(&t910, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L733] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L734] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L735] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L736] 1 z$r_buff0_thd1 = (_Bool)1 [L739] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L756] 2 x = 1 [L759] 2 y = 1 [L762] 2 __unbuffered_p1_EAX = y [L765] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L766] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L767] 2 z$flush_delayed = weak$$choice2 [L768] 2 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L769] EXPR 2 !z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L769] 2 z = !z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff1) [L770] EXPR 2 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L770] 2 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : z$w_buff0)) [L771] EXPR 2 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L771] 2 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff1 : z$w_buff1)) [L772] EXPR 2 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L772] 2 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used)) [L773] 2 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L775] 2 z$r_buff1_thd2 = weak$$choice2 ? z$r_buff1_thd2 : (!z$w_buff0_used || !z$r_buff0_thd2 && !z$w_buff1_used || !z$r_buff0_thd2 && !z$r_buff1_thd2 ? z$r_buff1_thd2 : (z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L776] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L743] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L744] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L781] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L781] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L782] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L783] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L784] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L812] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L813] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L814] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L815] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 143 locations, 2 error locations. Result: UNSAFE, OverallTime: 13.1s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 7.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3108 SDtfs, 2856 SDslu, 8952 SDs, 0 SdLazy, 9436 SolverSat, 129 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 237 GetRequests, 58 SyntacticMatches, 21 SemanticMatches, 158 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 388 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8766occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.7s AutomataMinimizationTime, 20 MinimizatonAttempts, 7627 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 747 NumberOfCodeBlocks, 747 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 675 ConstructedInterpolants, 0 QuantifiedInterpolants, 178273 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...