./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix035_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix035_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f687f46c8fe465ca460d3a8f87e9b5b595b7d782 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:18:01,152 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:18:01,153 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:18:01,161 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:18:01,161 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:18:01,162 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:18:01,163 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:18:01,164 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:18:01,165 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:18:01,166 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:18:01,167 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:18:01,167 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:18:01,168 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:18:01,168 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:18:01,169 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:18:01,170 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:18:01,170 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:18:01,171 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:18:01,172 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:18:01,174 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:18:01,175 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:18:01,176 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:18:01,176 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:18:01,177 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:18:01,179 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:18:01,179 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:18:01,179 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:18:01,179 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:18:01,180 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:18:01,180 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:18:01,180 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:18:01,181 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:18:01,181 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:18:01,182 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:18:01,182 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:18:01,182 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:18:01,183 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:18:01,183 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:18:01,183 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:18:01,184 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:18:01,184 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:18:01,184 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:18:01,194 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:18:01,194 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:18:01,195 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:18:01,195 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:18:01,195 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:18:01,196 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:18:01,196 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:18:01,196 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:18:01,196 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:18:01,196 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:18:01,196 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:18:01,196 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:18:01,196 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:18:01,197 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:18:01,197 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:18:01,197 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:18:01,197 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:18:01,197 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:18:01,197 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:18:01,198 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:18:01,198 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:18:01,198 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:18:01,198 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:18:01,198 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:18:01,198 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:18:01,198 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:18:01,199 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:18:01,199 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:18:01,199 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:18:01,199 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f687f46c8fe465ca460d3a8f87e9b5b595b7d782 [2019-12-07 12:18:01,297 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:18:01,307 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:18:01,310 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:18:01,311 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:18:01,311 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:18:01,312 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix035_power.oepc.i [2019-12-07 12:18:01,350 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/data/78e3204f5/0432c265ccba4cc2b4a8d3e1fae0e7f8/FLAG7ca135e6d [2019-12-07 12:18:01,795 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:18:01,795 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/sv-benchmarks/c/pthread-wmm/mix035_power.oepc.i [2019-12-07 12:18:01,806 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/data/78e3204f5/0432c265ccba4cc2b4a8d3e1fae0e7f8/FLAG7ca135e6d [2019-12-07 12:18:01,814 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/data/78e3204f5/0432c265ccba4cc2b4a8d3e1fae0e7f8 [2019-12-07 12:18:01,816 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:18:01,817 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:18:01,817 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:18:01,817 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:18:01,819 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:18:01,820 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:18:01" (1/1) ... [2019-12-07 12:18:01,822 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:01, skipping insertion in model container [2019-12-07 12:18:01,822 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:18:01" (1/1) ... [2019-12-07 12:18:01,826 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:18:01,856 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:18:02,106 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:18:02,114 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:18:02,158 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:18:02,203 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:18:02,204 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02 WrapperNode [2019-12-07 12:18:02,204 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:18:02,204 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:18:02,204 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:18:02,205 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:18:02,210 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02" (1/1) ... [2019-12-07 12:18:02,223 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02" (1/1) ... [2019-12-07 12:18:02,242 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:18:02,242 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:18:02,242 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:18:02,242 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:18:02,248 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02" (1/1) ... [2019-12-07 12:18:02,249 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02" (1/1) ... [2019-12-07 12:18:02,252 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02" (1/1) ... [2019-12-07 12:18:02,252 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02" (1/1) ... [2019-12-07 12:18:02,259 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02" (1/1) ... [2019-12-07 12:18:02,263 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02" (1/1) ... [2019-12-07 12:18:02,265 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02" (1/1) ... [2019-12-07 12:18:02,268 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:18:02,269 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:18:02,269 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:18:02,269 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:18:02,270 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:18:02,308 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:18:02,309 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:18:02,309 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:18:02,309 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:18:02,309 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:18:02,309 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:18:02,309 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:18:02,309 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:18:02,309 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:18:02,309 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:18:02,309 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:18:02,309 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:18:02,310 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:18:02,311 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:18:02,689 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:18:02,689 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:18:02,690 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:18:02 BoogieIcfgContainer [2019-12-07 12:18:02,690 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:18:02,691 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:18:02,691 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:18:02,694 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:18:02,694 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:18:01" (1/3) ... [2019-12-07 12:18:02,694 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6bd0fabd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:18:02, skipping insertion in model container [2019-12-07 12:18:02,695 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:02" (2/3) ... [2019-12-07 12:18:02,695 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6bd0fabd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:18:02, skipping insertion in model container [2019-12-07 12:18:02,695 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:18:02" (3/3) ... [2019-12-07 12:18:02,696 INFO L109 eAbstractionObserver]: Analyzing ICFG mix035_power.oepc.i [2019-12-07 12:18:02,705 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:18:02,705 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:18:02,711 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:18:02,712 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:18:02,740 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,740 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,740 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,740 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,741 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,741 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,741 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,741 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,741 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,741 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,742 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,742 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,742 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,742 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,742 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,742 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,742 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,743 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,744 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,745 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,745 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,746 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,746 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,746 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,746 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,746 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,747 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,747 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,747 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,747 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,747 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,748 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,748 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,748 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,748 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,748 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,748 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,751 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,752 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,752 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,752 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,752 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,752 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,752 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,752 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,753 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,753 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,753 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,753 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,753 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,753 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:02,785 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:18:02,801 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:18:02,802 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:18:02,802 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:18:02,802 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:18:02,802 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:18:02,802 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:18:02,802 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:18:02,802 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:18:02,813 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 12:18:02,814 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 12:18:02,871 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 12:18:02,871 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:18:02,881 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 707 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:18:02,897 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 12:18:02,929 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 12:18:02,929 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:18:02,935 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 707 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:18:02,950 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 12:18:02,951 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:18:05,890 WARN L192 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 12:18:06,156 WARN L192 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 43 [2019-12-07 12:18:06,213 INFO L206 etLargeBlockEncoding]: Checked pairs total: 83880 [2019-12-07 12:18:06,213 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 12:18:06,216 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 104 transitions [2019-12-07 12:18:20,421 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 118052 states. [2019-12-07 12:18:20,423 INFO L276 IsEmpty]: Start isEmpty. Operand 118052 states. [2019-12-07 12:18:20,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 12:18:20,426 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:20,427 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 12:18:20,427 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:20,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:20,430 INFO L82 PathProgramCache]: Analyzing trace with hash 918883, now seen corresponding path program 1 times [2019-12-07 12:18:20,436 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:20,436 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813265798] [2019-12-07 12:18:20,436 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:20,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:20,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:20,568 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [813265798] [2019-12-07 12:18:20,568 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:20,569 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:18:20,569 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201715115] [2019-12-07 12:18:20,572 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:18:20,572 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:20,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:18:20,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:20,583 INFO L87 Difference]: Start difference. First operand 118052 states. Second operand 3 states. [2019-12-07 12:18:21,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:21,389 INFO L93 Difference]: Finished difference Result 117122 states and 502402 transitions. [2019-12-07 12:18:21,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:18:21,390 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 12:18:21,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:21,843 INFO L225 Difference]: With dead ends: 117122 [2019-12-07 12:18:21,843 INFO L226 Difference]: Without dead ends: 109842 [2019-12-07 12:18:21,844 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:26,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109842 states. [2019-12-07 12:18:29,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109842 to 109842. [2019-12-07 12:18:29,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109842 states. [2019-12-07 12:18:29,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109842 states to 109842 states and 470538 transitions. [2019-12-07 12:18:29,429 INFO L78 Accepts]: Start accepts. Automaton has 109842 states and 470538 transitions. Word has length 3 [2019-12-07 12:18:29,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:29,429 INFO L462 AbstractCegarLoop]: Abstraction has 109842 states and 470538 transitions. [2019-12-07 12:18:29,429 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:18:29,429 INFO L276 IsEmpty]: Start isEmpty. Operand 109842 states and 470538 transitions. [2019-12-07 12:18:29,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:18:29,433 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:29,433 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:29,433 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:29,433 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:29,433 INFO L82 PathProgramCache]: Analyzing trace with hash -1326055600, now seen corresponding path program 1 times [2019-12-07 12:18:29,433 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:29,434 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979233197] [2019-12-07 12:18:29,434 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:29,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:29,509 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:29,509 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979233197] [2019-12-07 12:18:29,509 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:29,509 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:29,509 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1758467856] [2019-12-07 12:18:29,510 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:18:29,511 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:29,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:18:29,511 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:18:29,511 INFO L87 Difference]: Start difference. First operand 109842 states and 470538 transitions. Second operand 4 states. [2019-12-07 12:18:30,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:30,690 INFO L93 Difference]: Finished difference Result 170700 states and 702967 transitions. [2019-12-07 12:18:30,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:18:30,691 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:18:30,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:31,128 INFO L225 Difference]: With dead ends: 170700 [2019-12-07 12:18:31,128 INFO L226 Difference]: Without dead ends: 170651 [2019-12-07 12:18:31,128 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:36,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170651 states. [2019-12-07 12:18:40,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170651 to 155174. [2019-12-07 12:18:40,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155174 states. [2019-12-07 12:18:40,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155174 states to 155174 states and 647977 transitions. [2019-12-07 12:18:40,669 INFO L78 Accepts]: Start accepts. Automaton has 155174 states and 647977 transitions. Word has length 11 [2019-12-07 12:18:40,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:40,669 INFO L462 AbstractCegarLoop]: Abstraction has 155174 states and 647977 transitions. [2019-12-07 12:18:40,669 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:18:40,669 INFO L276 IsEmpty]: Start isEmpty. Operand 155174 states and 647977 transitions. [2019-12-07 12:18:40,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:18:40,673 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:40,673 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:40,674 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:40,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:40,674 INFO L82 PathProgramCache]: Analyzing trace with hash -1447855061, now seen corresponding path program 1 times [2019-12-07 12:18:40,674 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:40,674 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [866964420] [2019-12-07 12:18:40,674 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:40,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:40,717 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:40,717 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [866964420] [2019-12-07 12:18:40,717 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:40,717 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:40,717 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2132374362] [2019-12-07 12:18:40,718 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:18:40,718 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:40,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:18:40,718 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:40,718 INFO L87 Difference]: Start difference. First operand 155174 states and 647977 transitions. Second operand 3 states. [2019-12-07 12:18:40,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:40,817 INFO L93 Difference]: Finished difference Result 33806 states and 110729 transitions. [2019-12-07 12:18:40,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:18:40,817 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 12:18:40,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:40,887 INFO L225 Difference]: With dead ends: 33806 [2019-12-07 12:18:40,887 INFO L226 Difference]: Without dead ends: 33806 [2019-12-07 12:18:40,888 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:41,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33806 states. [2019-12-07 12:18:41,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33806 to 33806. [2019-12-07 12:18:41,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33806 states. [2019-12-07 12:18:41,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33806 states to 33806 states and 110729 transitions. [2019-12-07 12:18:41,742 INFO L78 Accepts]: Start accepts. Automaton has 33806 states and 110729 transitions. Word has length 13 [2019-12-07 12:18:41,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:41,742 INFO L462 AbstractCegarLoop]: Abstraction has 33806 states and 110729 transitions. [2019-12-07 12:18:41,742 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:18:41,742 INFO L276 IsEmpty]: Start isEmpty. Operand 33806 states and 110729 transitions. [2019-12-07 12:18:41,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:18:41,744 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:41,745 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:41,745 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:41,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:41,745 INFO L82 PathProgramCache]: Analyzing trace with hash 627665056, now seen corresponding path program 1 times [2019-12-07 12:18:41,745 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:41,745 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1922666728] [2019-12-07 12:18:41,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:41,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:41,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:41,775 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1922666728] [2019-12-07 12:18:41,776 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:41,776 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:18:41,776 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [569792946] [2019-12-07 12:18:41,776 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:18:41,776 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:41,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:18:41,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:41,777 INFO L87 Difference]: Start difference. First operand 33806 states and 110729 transitions. Second operand 3 states. [2019-12-07 12:18:41,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:41,935 INFO L93 Difference]: Finished difference Result 52205 states and 169891 transitions. [2019-12-07 12:18:41,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:18:41,936 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 12:18:41,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:42,037 INFO L225 Difference]: With dead ends: 52205 [2019-12-07 12:18:42,037 INFO L226 Difference]: Without dead ends: 52205 [2019-12-07 12:18:42,038 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:42,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52205 states. [2019-12-07 12:18:42,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52205 to 38718. [2019-12-07 12:18:42,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38718 states. [2019-12-07 12:18:42,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38718 states to 38718 states and 127749 transitions. [2019-12-07 12:18:42,798 INFO L78 Accepts]: Start accepts. Automaton has 38718 states and 127749 transitions. Word has length 16 [2019-12-07 12:18:42,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:42,799 INFO L462 AbstractCegarLoop]: Abstraction has 38718 states and 127749 transitions. [2019-12-07 12:18:42,800 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:18:42,800 INFO L276 IsEmpty]: Start isEmpty. Operand 38718 states and 127749 transitions. [2019-12-07 12:18:42,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:18:42,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:42,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:42,802 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:42,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:42,803 INFO L82 PathProgramCache]: Analyzing trace with hash 712450242, now seen corresponding path program 1 times [2019-12-07 12:18:42,803 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:42,803 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383388645] [2019-12-07 12:18:42,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:42,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:42,861 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:42,861 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [383388645] [2019-12-07 12:18:42,861 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:42,861 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:42,861 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318881667] [2019-12-07 12:18:42,862 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:18:42,862 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:42,862 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:18:42,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:18:42,862 INFO L87 Difference]: Start difference. First operand 38718 states and 127749 transitions. Second operand 4 states. [2019-12-07 12:18:43,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:43,101 INFO L93 Difference]: Finished difference Result 46485 states and 150983 transitions. [2019-12-07 12:18:43,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:18:43,101 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 12:18:43,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:43,168 INFO L225 Difference]: With dead ends: 46485 [2019-12-07 12:18:43,168 INFO L226 Difference]: Without dead ends: 46485 [2019-12-07 12:18:43,168 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:43,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46485 states. [2019-12-07 12:18:43,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46485 to 42622. [2019-12-07 12:18:43,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42622 states. [2019-12-07 12:18:43,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42622 states to 42622 states and 139503 transitions. [2019-12-07 12:18:43,890 INFO L78 Accepts]: Start accepts. Automaton has 42622 states and 139503 transitions. Word has length 16 [2019-12-07 12:18:43,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:43,890 INFO L462 AbstractCegarLoop]: Abstraction has 42622 states and 139503 transitions. [2019-12-07 12:18:43,890 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:18:43,890 INFO L276 IsEmpty]: Start isEmpty. Operand 42622 states and 139503 transitions. [2019-12-07 12:18:43,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:18:43,892 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:43,892 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:43,893 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:43,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:43,893 INFO L82 PathProgramCache]: Analyzing trace with hash 646000998, now seen corresponding path program 1 times [2019-12-07 12:18:43,893 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:43,893 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [371530140] [2019-12-07 12:18:43,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:43,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:43,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:43,937 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [371530140] [2019-12-07 12:18:43,937 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:43,937 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:43,937 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1260502127] [2019-12-07 12:18:43,937 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:18:43,938 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:43,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:18:43,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:18:43,938 INFO L87 Difference]: Start difference. First operand 42622 states and 139503 transitions. Second operand 4 states. [2019-12-07 12:18:44,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:44,209 INFO L93 Difference]: Finished difference Result 51005 states and 165609 transitions. [2019-12-07 12:18:44,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:18:44,210 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 12:18:44,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:44,303 INFO L225 Difference]: With dead ends: 51005 [2019-12-07 12:18:44,303 INFO L226 Difference]: Without dead ends: 51005 [2019-12-07 12:18:44,303 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:44,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51005 states. [2019-12-07 12:18:45,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51005 to 44274. [2019-12-07 12:18:45,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44274 states. [2019-12-07 12:18:45,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44274 states to 44274 states and 144974 transitions. [2019-12-07 12:18:45,324 INFO L78 Accepts]: Start accepts. Automaton has 44274 states and 144974 transitions. Word has length 16 [2019-12-07 12:18:45,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:45,324 INFO L462 AbstractCegarLoop]: Abstraction has 44274 states and 144974 transitions. [2019-12-07 12:18:45,325 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:18:45,325 INFO L276 IsEmpty]: Start isEmpty. Operand 44274 states and 144974 transitions. [2019-12-07 12:18:45,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:18:45,331 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:45,331 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:45,331 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:45,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:45,331 INFO L82 PathProgramCache]: Analyzing trace with hash -2051800974, now seen corresponding path program 1 times [2019-12-07 12:18:45,332 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:45,332 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173999663] [2019-12-07 12:18:45,332 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:45,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:45,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:45,387 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1173999663] [2019-12-07 12:18:45,388 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:45,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:18:45,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1923528678] [2019-12-07 12:18:45,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:18:45,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:45,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:18:45,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:45,389 INFO L87 Difference]: Start difference. First operand 44274 states and 144974 transitions. Second operand 5 states. [2019-12-07 12:18:45,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:45,832 INFO L93 Difference]: Finished difference Result 60565 states and 193473 transitions. [2019-12-07 12:18:45,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:18:45,833 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:18:45,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:45,923 INFO L225 Difference]: With dead ends: 60565 [2019-12-07 12:18:45,923 INFO L226 Difference]: Without dead ends: 60558 [2019-12-07 12:18:45,924 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:18:46,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60558 states. [2019-12-07 12:18:46,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60558 to 45614. [2019-12-07 12:18:46,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45614 states. [2019-12-07 12:18:46,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45614 states to 45614 states and 149067 transitions. [2019-12-07 12:18:46,775 INFO L78 Accepts]: Start accepts. Automaton has 45614 states and 149067 transitions. Word has length 22 [2019-12-07 12:18:46,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:46,776 INFO L462 AbstractCegarLoop]: Abstraction has 45614 states and 149067 transitions. [2019-12-07 12:18:46,776 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:18:46,776 INFO L276 IsEmpty]: Start isEmpty. Operand 45614 states and 149067 transitions. [2019-12-07 12:18:46,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:18:46,782 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:46,782 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:46,782 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:46,782 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:46,782 INFO L82 PathProgramCache]: Analyzing trace with hash -2118250218, now seen corresponding path program 1 times [2019-12-07 12:18:46,782 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:46,783 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1429050053] [2019-12-07 12:18:46,783 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:46,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:46,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:46,840 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1429050053] [2019-12-07 12:18:46,840 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:46,840 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:18:46,840 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [519529094] [2019-12-07 12:18:46,840 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:18:46,840 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:46,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:18:46,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:46,841 INFO L87 Difference]: Start difference. First operand 45614 states and 149067 transitions. Second operand 5 states. [2019-12-07 12:18:47,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:47,288 INFO L93 Difference]: Finished difference Result 63360 states and 201880 transitions. [2019-12-07 12:18:47,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:18:47,288 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:18:47,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:47,382 INFO L225 Difference]: With dead ends: 63360 [2019-12-07 12:18:47,382 INFO L226 Difference]: Without dead ends: 63353 [2019-12-07 12:18:47,382 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:18:47,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63353 states. [2019-12-07 12:18:48,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63353 to 43925. [2019-12-07 12:18:48,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43925 states. [2019-12-07 12:18:48,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43925 states to 43925 states and 143672 transitions. [2019-12-07 12:18:48,281 INFO L78 Accepts]: Start accepts. Automaton has 43925 states and 143672 transitions. Word has length 22 [2019-12-07 12:18:48,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:48,281 INFO L462 AbstractCegarLoop]: Abstraction has 43925 states and 143672 transitions. [2019-12-07 12:18:48,281 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:18:48,281 INFO L276 IsEmpty]: Start isEmpty. Operand 43925 states and 143672 transitions. [2019-12-07 12:18:48,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:18:48,291 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:48,291 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:48,291 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:48,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:48,291 INFO L82 PathProgramCache]: Analyzing trace with hash 1701171988, now seen corresponding path program 1 times [2019-12-07 12:18:48,291 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:48,291 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635338368] [2019-12-07 12:18:48,291 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:48,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:48,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:48,325 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635338368] [2019-12-07 12:18:48,326 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:48,326 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:18:48,326 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1829492027] [2019-12-07 12:18:48,326 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:18:48,326 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:48,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:18:48,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:18:48,326 INFO L87 Difference]: Start difference. First operand 43925 states and 143672 transitions. Second operand 4 states. [2019-12-07 12:18:48,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:48,382 INFO L93 Difference]: Finished difference Result 18121 states and 56197 transitions. [2019-12-07 12:18:48,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:18:48,383 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 12:18:48,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:48,404 INFO L225 Difference]: With dead ends: 18121 [2019-12-07 12:18:48,404 INFO L226 Difference]: Without dead ends: 18121 [2019-12-07 12:18:48,404 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:18:48,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18121 states. [2019-12-07 12:18:48,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18121 to 17758. [2019-12-07 12:18:48,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17758 states. [2019-12-07 12:18:48,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17758 states to 17758 states and 55161 transitions. [2019-12-07 12:18:48,661 INFO L78 Accepts]: Start accepts. Automaton has 17758 states and 55161 transitions. Word has length 25 [2019-12-07 12:18:48,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:48,661 INFO L462 AbstractCegarLoop]: Abstraction has 17758 states and 55161 transitions. [2019-12-07 12:18:48,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:18:48,661 INFO L276 IsEmpty]: Start isEmpty. Operand 17758 states and 55161 transitions. [2019-12-07 12:18:48,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:18:48,673 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:48,673 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:48,674 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:48,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:48,674 INFO L82 PathProgramCache]: Analyzing trace with hash -735951720, now seen corresponding path program 1 times [2019-12-07 12:18:48,674 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:48,674 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538849546] [2019-12-07 12:18:48,674 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:48,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:48,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:48,695 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [538849546] [2019-12-07 12:18:48,695 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:48,695 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:18:48,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [638226670] [2019-12-07 12:18:48,696 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:18:48,696 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:48,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:18:48,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:48,696 INFO L87 Difference]: Start difference. First operand 17758 states and 55161 transitions. Second operand 3 states. [2019-12-07 12:18:48,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:48,766 INFO L93 Difference]: Finished difference Result 23499 states and 69479 transitions. [2019-12-07 12:18:48,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:18:48,766 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 12:18:48,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:48,792 INFO L225 Difference]: With dead ends: 23499 [2019-12-07 12:18:48,793 INFO L226 Difference]: Without dead ends: 23499 [2019-12-07 12:18:48,793 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:48,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23499 states. [2019-12-07 12:18:49,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23499 to 17758. [2019-12-07 12:18:49,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17758 states. [2019-12-07 12:18:49,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17758 states to 17758 states and 52847 transitions. [2019-12-07 12:18:49,083 INFO L78 Accepts]: Start accepts. Automaton has 17758 states and 52847 transitions. Word has length 27 [2019-12-07 12:18:49,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:49,083 INFO L462 AbstractCegarLoop]: Abstraction has 17758 states and 52847 transitions. [2019-12-07 12:18:49,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:18:49,084 INFO L276 IsEmpty]: Start isEmpty. Operand 17758 states and 52847 transitions. [2019-12-07 12:18:49,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:18:49,095 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:49,095 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:49,095 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:49,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:49,095 INFO L82 PathProgramCache]: Analyzing trace with hash -963527987, now seen corresponding path program 1 times [2019-12-07 12:18:49,095 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:49,095 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212257424] [2019-12-07 12:18:49,095 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:49,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:49,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:49,141 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212257424] [2019-12-07 12:18:49,141 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:49,141 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:18:49,141 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [132640383] [2019-12-07 12:18:49,142 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:18:49,142 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:49,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:18:49,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:49,142 INFO L87 Difference]: Start difference. First operand 17758 states and 52847 transitions. Second operand 5 states. [2019-12-07 12:18:49,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:49,364 INFO L93 Difference]: Finished difference Result 21964 states and 64554 transitions. [2019-12-07 12:18:49,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:18:49,364 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 12:18:49,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:49,385 INFO L225 Difference]: With dead ends: 21964 [2019-12-07 12:18:49,386 INFO L226 Difference]: Without dead ends: 21964 [2019-12-07 12:18:49,386 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:18:49,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21964 states. [2019-12-07 12:18:49,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21964 to 20594. [2019-12-07 12:18:49,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20594 states. [2019-12-07 12:18:49,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20594 states to 20594 states and 61091 transitions. [2019-12-07 12:18:49,681 INFO L78 Accepts]: Start accepts. Automaton has 20594 states and 61091 transitions. Word has length 27 [2019-12-07 12:18:49,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:49,681 INFO L462 AbstractCegarLoop]: Abstraction has 20594 states and 61091 transitions. [2019-12-07 12:18:49,681 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:18:49,681 INFO L276 IsEmpty]: Start isEmpty. Operand 20594 states and 61091 transitions. [2019-12-07 12:18:49,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 12:18:49,694 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:49,694 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:49,694 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:49,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:49,694 INFO L82 PathProgramCache]: Analyzing trace with hash 1072867226, now seen corresponding path program 1 times [2019-12-07 12:18:49,694 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:49,694 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1282445537] [2019-12-07 12:18:49,694 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:49,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:49,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:49,740 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1282445537] [2019-12-07 12:18:49,740 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:49,740 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:18:49,740 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1597905763] [2019-12-07 12:18:49,741 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:18:49,741 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:49,741 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:18:49,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:49,741 INFO L87 Difference]: Start difference. First operand 20594 states and 61091 transitions. Second operand 5 states. [2019-12-07 12:18:49,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:49,821 INFO L93 Difference]: Finished difference Result 20911 states and 61888 transitions. [2019-12-07 12:18:49,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:18:49,821 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 12:18:49,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:49,843 INFO L225 Difference]: With dead ends: 20911 [2019-12-07 12:18:49,843 INFO L226 Difference]: Without dead ends: 20911 [2019-12-07 12:18:49,843 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:49,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20911 states. [2019-12-07 12:18:50,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20911 to 20911. [2019-12-07 12:18:50,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20911 states. [2019-12-07 12:18:50,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20911 states to 20911 states and 61888 transitions. [2019-12-07 12:18:50,129 INFO L78 Accepts]: Start accepts. Automaton has 20911 states and 61888 transitions. Word has length 28 [2019-12-07 12:18:50,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:50,129 INFO L462 AbstractCegarLoop]: Abstraction has 20911 states and 61888 transitions. [2019-12-07 12:18:50,129 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:18:50,129 INFO L276 IsEmpty]: Start isEmpty. Operand 20911 states and 61888 transitions. [2019-12-07 12:18:50,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 12:18:50,143 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:50,143 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:50,143 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:50,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:50,143 INFO L82 PathProgramCache]: Analyzing trace with hash -1714199023, now seen corresponding path program 1 times [2019-12-07 12:18:50,143 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:50,143 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [41853331] [2019-12-07 12:18:50,143 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:50,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:50,198 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:50,198 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [41853331] [2019-12-07 12:18:50,199 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:50,199 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:18:50,199 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [856418988] [2019-12-07 12:18:50,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:18:50,199 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:50,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:18:50,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:50,199 INFO L87 Difference]: Start difference. First operand 20911 states and 61888 transitions. Second operand 5 states. [2019-12-07 12:18:50,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:50,464 INFO L93 Difference]: Finished difference Result 24383 states and 71254 transitions. [2019-12-07 12:18:50,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:18:50,465 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 12:18:50,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:50,489 INFO L225 Difference]: With dead ends: 24383 [2019-12-07 12:18:50,489 INFO L226 Difference]: Without dead ends: 24383 [2019-12-07 12:18:50,489 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:18:50,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24383 states. [2019-12-07 12:18:50,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24383 to 21026. [2019-12-07 12:18:50,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21026 states. [2019-12-07 12:18:50,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21026 states to 21026 states and 62164 transitions. [2019-12-07 12:18:50,792 INFO L78 Accepts]: Start accepts. Automaton has 21026 states and 62164 transitions. Word has length 29 [2019-12-07 12:18:50,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:50,792 INFO L462 AbstractCegarLoop]: Abstraction has 21026 states and 62164 transitions. [2019-12-07 12:18:50,792 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:18:50,792 INFO L276 IsEmpty]: Start isEmpty. Operand 21026 states and 62164 transitions. [2019-12-07 12:18:50,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 12:18:50,809 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:50,809 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:50,809 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:50,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:50,809 INFO L82 PathProgramCache]: Analyzing trace with hash 1459957021, now seen corresponding path program 1 times [2019-12-07 12:18:50,810 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:50,810 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1253784235] [2019-12-07 12:18:50,810 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:50,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:50,880 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:50,880 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1253784235] [2019-12-07 12:18:50,880 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:50,881 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:18:50,881 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [456185069] [2019-12-07 12:18:50,881 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:18:50,881 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:50,881 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:18:50,881 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:18:50,881 INFO L87 Difference]: Start difference. First operand 21026 states and 62164 transitions. Second operand 6 states. [2019-12-07 12:18:51,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:51,313 INFO L93 Difference]: Finished difference Result 27860 states and 80966 transitions. [2019-12-07 12:18:51,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:18:51,313 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 12:18:51,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:51,343 INFO L225 Difference]: With dead ends: 27860 [2019-12-07 12:18:51,343 INFO L226 Difference]: Without dead ends: 27860 [2019-12-07 12:18:51,343 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:18:51,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27860 states. [2019-12-07 12:18:51,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27860 to 22078. [2019-12-07 12:18:51,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22078 states. [2019-12-07 12:18:51,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22078 states to 22078 states and 65194 transitions. [2019-12-07 12:18:51,713 INFO L78 Accepts]: Start accepts. Automaton has 22078 states and 65194 transitions. Word has length 33 [2019-12-07 12:18:51,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:51,713 INFO L462 AbstractCegarLoop]: Abstraction has 22078 states and 65194 transitions. [2019-12-07 12:18:51,713 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:18:51,713 INFO L276 IsEmpty]: Start isEmpty. Operand 22078 states and 65194 transitions. [2019-12-07 12:18:51,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 12:18:51,729 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:51,729 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:51,729 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:51,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:51,729 INFO L82 PathProgramCache]: Analyzing trace with hash -617380767, now seen corresponding path program 1 times [2019-12-07 12:18:51,729 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:51,729 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748821872] [2019-12-07 12:18:51,729 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:51,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:51,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:51,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748821872] [2019-12-07 12:18:51,851 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:51,851 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:18:51,851 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974492119] [2019-12-07 12:18:51,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:18:51,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:51,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:18:51,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:18:51,852 INFO L87 Difference]: Start difference. First operand 22078 states and 65194 transitions. Second operand 6 states. [2019-12-07 12:18:52,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:52,316 INFO L93 Difference]: Finished difference Result 27029 states and 78779 transitions. [2019-12-07 12:18:52,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:18:52,317 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2019-12-07 12:18:52,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:52,345 INFO L225 Difference]: With dead ends: 27029 [2019-12-07 12:18:52,345 INFO L226 Difference]: Without dead ends: 27029 [2019-12-07 12:18:52,346 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:18:52,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27029 states. [2019-12-07 12:18:52,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27029 to 19090. [2019-12-07 12:18:52,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19090 states. [2019-12-07 12:18:52,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19090 states to 19090 states and 56687 transitions. [2019-12-07 12:18:52,663 INFO L78 Accepts]: Start accepts. Automaton has 19090 states and 56687 transitions. Word has length 35 [2019-12-07 12:18:52,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:52,663 INFO L462 AbstractCegarLoop]: Abstraction has 19090 states and 56687 transitions. [2019-12-07 12:18:52,663 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:18:52,663 INFO L276 IsEmpty]: Start isEmpty. Operand 19090 states and 56687 transitions. [2019-12-07 12:18:52,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 12:18:52,677 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:52,677 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:52,677 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:52,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:52,678 INFO L82 PathProgramCache]: Analyzing trace with hash -282480739, now seen corresponding path program 1 times [2019-12-07 12:18:52,678 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:52,678 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989903993] [2019-12-07 12:18:52,678 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:52,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:52,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:52,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989903993] [2019-12-07 12:18:52,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:52,734 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:52,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1377035519] [2019-12-07 12:18:52,735 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:18:52,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:52,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:18:52,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:52,735 INFO L87 Difference]: Start difference. First operand 19090 states and 56687 transitions. Second operand 3 states. [2019-12-07 12:18:52,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:52,796 INFO L93 Difference]: Finished difference Result 19090 states and 56611 transitions. [2019-12-07 12:18:52,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:18:52,796 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 12:18:52,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:52,820 INFO L225 Difference]: With dead ends: 19090 [2019-12-07 12:18:52,820 INFO L226 Difference]: Without dead ends: 19090 [2019-12-07 12:18:52,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:52,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19090 states. [2019-12-07 12:18:53,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19090 to 17041. [2019-12-07 12:18:53,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17041 states. [2019-12-07 12:18:53,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17041 states to 17041 states and 50985 transitions. [2019-12-07 12:18:53,079 INFO L78 Accepts]: Start accepts. Automaton has 17041 states and 50985 transitions. Word has length 39 [2019-12-07 12:18:53,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:53,079 INFO L462 AbstractCegarLoop]: Abstraction has 17041 states and 50985 transitions. [2019-12-07 12:18:53,079 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:18:53,080 INFO L276 IsEmpty]: Start isEmpty. Operand 17041 states and 50985 transitions. [2019-12-07 12:18:53,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 12:18:53,094 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:53,094 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:53,094 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:53,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:53,094 INFO L82 PathProgramCache]: Analyzing trace with hash -730896502, now seen corresponding path program 1 times [2019-12-07 12:18:53,094 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:53,094 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [513431246] [2019-12-07 12:18:53,094 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:53,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:53,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:53,144 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [513431246] [2019-12-07 12:18:53,144 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:53,144 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:53,144 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1478201032] [2019-12-07 12:18:53,144 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:18:53,144 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:53,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:18:53,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:18:53,145 INFO L87 Difference]: Start difference. First operand 17041 states and 50985 transitions. Second operand 4 states. [2019-12-07 12:18:53,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:53,191 INFO L93 Difference]: Finished difference Result 17040 states and 50983 transitions. [2019-12-07 12:18:53,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:18:53,191 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 40 [2019-12-07 12:18:53,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:53,210 INFO L225 Difference]: With dead ends: 17040 [2019-12-07 12:18:53,210 INFO L226 Difference]: Without dead ends: 17040 [2019-12-07 12:18:53,211 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:18:53,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17040 states. [2019-12-07 12:18:53,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17040 to 17040. [2019-12-07 12:18:53,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17040 states. [2019-12-07 12:18:53,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17040 states to 17040 states and 50983 transitions. [2019-12-07 12:18:53,446 INFO L78 Accepts]: Start accepts. Automaton has 17040 states and 50983 transitions. Word has length 40 [2019-12-07 12:18:53,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:53,446 INFO L462 AbstractCegarLoop]: Abstraction has 17040 states and 50983 transitions. [2019-12-07 12:18:53,446 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:18:53,446 INFO L276 IsEmpty]: Start isEmpty. Operand 17040 states and 50983 transitions. [2019-12-07 12:18:53,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 12:18:53,459 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:53,459 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:53,459 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:53,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:53,459 INFO L82 PathProgramCache]: Analyzing trace with hash 88308807, now seen corresponding path program 1 times [2019-12-07 12:18:53,459 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:53,460 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [110013053] [2019-12-07 12:18:53,460 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:53,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:53,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:53,492 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [110013053] [2019-12-07 12:18:53,493 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:53,493 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:18:53,493 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1425307360] [2019-12-07 12:18:53,493 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:18:53,493 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:53,493 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:18:53,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:53,494 INFO L87 Difference]: Start difference. First operand 17040 states and 50983 transitions. Second operand 5 states. [2019-12-07 12:18:53,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:53,566 INFO L93 Difference]: Finished difference Result 15854 states and 48442 transitions. [2019-12-07 12:18:53,566 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:18:53,566 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 12:18:53,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:53,589 INFO L225 Difference]: With dead ends: 15854 [2019-12-07 12:18:53,589 INFO L226 Difference]: Without dead ends: 15854 [2019-12-07 12:18:53,589 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:53,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15854 states. [2019-12-07 12:18:53,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15854 to 15854. [2019-12-07 12:18:53,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15854 states. [2019-12-07 12:18:53,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15854 states to 15854 states and 48442 transitions. [2019-12-07 12:18:53,823 INFO L78 Accepts]: Start accepts. Automaton has 15854 states and 48442 transitions. Word has length 41 [2019-12-07 12:18:53,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:53,823 INFO L462 AbstractCegarLoop]: Abstraction has 15854 states and 48442 transitions. [2019-12-07 12:18:53,823 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:18:53,824 INFO L276 IsEmpty]: Start isEmpty. Operand 15854 states and 48442 transitions. [2019-12-07 12:18:53,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 12:18:53,837 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:53,837 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:53,837 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:53,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:53,837 INFO L82 PathProgramCache]: Analyzing trace with hash -1304450216, now seen corresponding path program 1 times [2019-12-07 12:18:53,837 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:53,837 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700884894] [2019-12-07 12:18:53,837 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:53,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:53,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:53,875 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700884894] [2019-12-07 12:18:53,875 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:53,875 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:53,875 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [881330019] [2019-12-07 12:18:53,875 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:18:53,876 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:53,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:18:53,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:53,876 INFO L87 Difference]: Start difference. First operand 15854 states and 48442 transitions. Second operand 3 states. [2019-12-07 12:18:53,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:53,953 INFO L93 Difference]: Finished difference Result 18718 states and 56966 transitions. [2019-12-07 12:18:53,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:18:53,954 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 12:18:53,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:53,973 INFO L225 Difference]: With dead ends: 18718 [2019-12-07 12:18:53,973 INFO L226 Difference]: Without dead ends: 18718 [2019-12-07 12:18:53,974 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:54,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18718 states. [2019-12-07 12:18:54,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18718 to 14754. [2019-12-07 12:18:54,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14754 states. [2019-12-07 12:18:54,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14754 states to 14754 states and 45271 transitions. [2019-12-07 12:18:54,214 INFO L78 Accepts]: Start accepts. Automaton has 14754 states and 45271 transitions. Word has length 65 [2019-12-07 12:18:54,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:54,215 INFO L462 AbstractCegarLoop]: Abstraction has 14754 states and 45271 transitions. [2019-12-07 12:18:54,215 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:18:54,215 INFO L276 IsEmpty]: Start isEmpty. Operand 14754 states and 45271 transitions. [2019-12-07 12:18:54,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:18:54,228 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:54,228 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:54,228 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:54,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:54,228 INFO L82 PathProgramCache]: Analyzing trace with hash -443590128, now seen corresponding path program 1 times [2019-12-07 12:18:54,228 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:54,228 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286066478] [2019-12-07 12:18:54,228 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:54,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:54,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:54,300 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286066478] [2019-12-07 12:18:54,300 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:54,300 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:18:54,300 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1945909460] [2019-12-07 12:18:54,300 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:18:54,300 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:54,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:18:54,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:18:54,301 INFO L87 Difference]: Start difference. First operand 14754 states and 45271 transitions. Second operand 7 states. [2019-12-07 12:18:54,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:54,617 INFO L93 Difference]: Finished difference Result 43028 states and 130471 transitions. [2019-12-07 12:18:54,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:18:54,617 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 12:18:54,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:54,654 INFO L225 Difference]: With dead ends: 43028 [2019-12-07 12:18:54,654 INFO L226 Difference]: Without dead ends: 33603 [2019-12-07 12:18:54,654 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 12:18:54,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33603 states. [2019-12-07 12:18:54,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33603 to 17842. [2019-12-07 12:18:54,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17842 states. [2019-12-07 12:18:55,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17842 states to 17842 states and 54924 transitions. [2019-12-07 12:18:55,022 INFO L78 Accepts]: Start accepts. Automaton has 17842 states and 54924 transitions. Word has length 66 [2019-12-07 12:18:55,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:55,022 INFO L462 AbstractCegarLoop]: Abstraction has 17842 states and 54924 transitions. [2019-12-07 12:18:55,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:18:55,022 INFO L276 IsEmpty]: Start isEmpty. Operand 17842 states and 54924 transitions. [2019-12-07 12:18:55,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:18:55,037 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:55,037 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:55,037 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:55,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:55,037 INFO L82 PathProgramCache]: Analyzing trace with hash -212956252, now seen corresponding path program 2 times [2019-12-07 12:18:55,038 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:55,038 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952012392] [2019-12-07 12:18:55,038 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:55,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:55,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:55,107 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952012392] [2019-12-07 12:18:55,107 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:55,107 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:18:55,107 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890845232] [2019-12-07 12:18:55,107 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:18:55,108 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:55,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:18:55,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:18:55,108 INFO L87 Difference]: Start difference. First operand 17842 states and 54924 transitions. Second operand 7 states. [2019-12-07 12:18:55,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:55,400 INFO L93 Difference]: Finished difference Result 48185 states and 144929 transitions. [2019-12-07 12:18:55,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:18:55,401 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 12:18:55,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:55,443 INFO L225 Difference]: With dead ends: 48185 [2019-12-07 12:18:55,443 INFO L226 Difference]: Without dead ends: 35773 [2019-12-07 12:18:55,443 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 12:18:55,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35773 states. [2019-12-07 12:18:55,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35773 to 21102. [2019-12-07 12:18:55,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21102 states. [2019-12-07 12:18:55,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21102 states to 21102 states and 64691 transitions. [2019-12-07 12:18:55,875 INFO L78 Accepts]: Start accepts. Automaton has 21102 states and 64691 transitions. Word has length 66 [2019-12-07 12:18:55,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:55,875 INFO L462 AbstractCegarLoop]: Abstraction has 21102 states and 64691 transitions. [2019-12-07 12:18:55,875 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:18:55,875 INFO L276 IsEmpty]: Start isEmpty. Operand 21102 states and 64691 transitions. [2019-12-07 12:18:55,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:18:55,893 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:55,893 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:55,893 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:55,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:55,893 INFO L82 PathProgramCache]: Analyzing trace with hash 1114987540, now seen corresponding path program 3 times [2019-12-07 12:18:55,893 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:55,894 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945341517] [2019-12-07 12:18:55,894 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:55,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:55,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:55,956 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945341517] [2019-12-07 12:18:55,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:55,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:18:55,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [171483153] [2019-12-07 12:18:55,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:18:55,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:55,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:18:55,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:18:55,957 INFO L87 Difference]: Start difference. First operand 21102 states and 64691 transitions. Second operand 7 states. [2019-12-07 12:18:56,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:56,244 INFO L93 Difference]: Finished difference Result 44447 states and 133624 transitions. [2019-12-07 12:18:56,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 12:18:56,245 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 12:18:56,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:56,288 INFO L225 Difference]: With dead ends: 44447 [2019-12-07 12:18:56,288 INFO L226 Difference]: Without dead ends: 38734 [2019-12-07 12:18:56,288 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-12-07 12:18:56,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38734 states. [2019-12-07 12:18:56,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38734 to 21382. [2019-12-07 12:18:56,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21382 states. [2019-12-07 12:18:56,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21382 states to 21382 states and 65574 transitions. [2019-12-07 12:18:56,711 INFO L78 Accepts]: Start accepts. Automaton has 21382 states and 65574 transitions. Word has length 66 [2019-12-07 12:18:56,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:56,711 INFO L462 AbstractCegarLoop]: Abstraction has 21382 states and 65574 transitions. [2019-12-07 12:18:56,711 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:18:56,711 INFO L276 IsEmpty]: Start isEmpty. Operand 21382 states and 65574 transitions. [2019-12-07 12:18:56,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:18:56,729 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:56,729 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:56,730 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:56,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:56,730 INFO L82 PathProgramCache]: Analyzing trace with hash 771503262, now seen corresponding path program 4 times [2019-12-07 12:18:56,730 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:56,730 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1546303388] [2019-12-07 12:18:56,730 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:56,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:56,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:56,768 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1546303388] [2019-12-07 12:18:56,768 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:56,768 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:56,769 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1063610111] [2019-12-07 12:18:56,769 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:18:56,769 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:56,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:18:56,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:56,769 INFO L87 Difference]: Start difference. First operand 21382 states and 65574 transitions. Second operand 3 states. [2019-12-07 12:18:56,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:56,813 INFO L93 Difference]: Finished difference Result 17624 states and 52955 transitions. [2019-12-07 12:18:56,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:18:56,814 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:18:56,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:56,833 INFO L225 Difference]: With dead ends: 17624 [2019-12-07 12:18:56,833 INFO L226 Difference]: Without dead ends: 17624 [2019-12-07 12:18:56,833 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:56,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17624 states. [2019-12-07 12:18:57,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17624 to 16192. [2019-12-07 12:18:57,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16192 states. [2019-12-07 12:18:57,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16192 states to 16192 states and 48657 transitions. [2019-12-07 12:18:57,069 INFO L78 Accepts]: Start accepts. Automaton has 16192 states and 48657 transitions. Word has length 66 [2019-12-07 12:18:57,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:57,069 INFO L462 AbstractCegarLoop]: Abstraction has 16192 states and 48657 transitions. [2019-12-07 12:18:57,069 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:18:57,069 INFO L276 IsEmpty]: Start isEmpty. Operand 16192 states and 48657 transitions. [2019-12-07 12:18:57,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:18:57,082 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:57,082 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:57,083 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:57,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:57,083 INFO L82 PathProgramCache]: Analyzing trace with hash -1509100091, now seen corresponding path program 1 times [2019-12-07 12:18:57,083 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:57,083 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793347831] [2019-12-07 12:18:57,083 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:57,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:57,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:57,541 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1793347831] [2019-12-07 12:18:57,541 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:57,541 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 12:18:57,541 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [577317934] [2019-12-07 12:18:57,541 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 12:18:57,541 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:57,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 12:18:57,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2019-12-07 12:18:57,542 INFO L87 Difference]: Start difference. First operand 16192 states and 48657 transitions. Second operand 19 states. [2019-12-07 12:19:02,759 WARN L192 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 26 [2019-12-07 12:19:03,077 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 27 [2019-12-07 12:19:04,395 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 23 [2019-12-07 12:19:04,959 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 24 [2019-12-07 12:19:05,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:05,633 INFO L93 Difference]: Finished difference Result 24611 states and 73489 transitions. [2019-12-07 12:19:05,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 101 states. [2019-12-07 12:19:05,634 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 12:19:05,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:05,656 INFO L225 Difference]: With dead ends: 24611 [2019-12-07 12:19:05,656 INFO L226 Difference]: Without dead ends: 21972 [2019-12-07 12:19:05,659 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3377 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=1286, Invalid=9220, Unknown=0, NotChecked=0, Total=10506 [2019-12-07 12:19:05,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21972 states. [2019-12-07 12:19:05,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21972 to 17628. [2019-12-07 12:19:05,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17628 states. [2019-12-07 12:19:05,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17628 states to 17628 states and 52820 transitions. [2019-12-07 12:19:05,972 INFO L78 Accepts]: Start accepts. Automaton has 17628 states and 52820 transitions. Word has length 67 [2019-12-07 12:19:05,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:05,972 INFO L462 AbstractCegarLoop]: Abstraction has 17628 states and 52820 transitions. [2019-12-07 12:19:05,972 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 12:19:05,972 INFO L276 IsEmpty]: Start isEmpty. Operand 17628 states and 52820 transitions. [2019-12-07 12:19:05,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:19:05,990 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:05,990 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:05,990 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:05,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:05,991 INFO L82 PathProgramCache]: Analyzing trace with hash -38556609, now seen corresponding path program 2 times [2019-12-07 12:19:05,991 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:05,991 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662311244] [2019-12-07 12:19:05,991 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:06,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:06,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:06,128 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662311244] [2019-12-07 12:19:06,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:06,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:19:06,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [944322385] [2019-12-07 12:19:06,129 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:19:06,129 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:06,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:19:06,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:19:06,129 INFO L87 Difference]: Start difference. First operand 17628 states and 52820 transitions. Second operand 11 states. [2019-12-07 12:19:06,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:06,982 INFO L93 Difference]: Finished difference Result 39000 states and 116040 transitions. [2019-12-07 12:19:06,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 12:19:06,982 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:19:06,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:07,013 INFO L225 Difference]: With dead ends: 39000 [2019-12-07 12:19:07,013 INFO L226 Difference]: Without dead ends: 29415 [2019-12-07 12:19:07,014 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 241 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=203, Invalid=853, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 12:19:07,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29415 states. [2019-12-07 12:19:07,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29415 to 16200. [2019-12-07 12:19:07,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16200 states. [2019-12-07 12:19:07,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16200 states to 16200 states and 48246 transitions. [2019-12-07 12:19:07,332 INFO L78 Accepts]: Start accepts. Automaton has 16200 states and 48246 transitions. Word has length 67 [2019-12-07 12:19:07,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:07,332 INFO L462 AbstractCegarLoop]: Abstraction has 16200 states and 48246 transitions. [2019-12-07 12:19:07,332 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:19:07,332 INFO L276 IsEmpty]: Start isEmpty. Operand 16200 states and 48246 transitions. [2019-12-07 12:19:07,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:19:07,345 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:07,345 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:07,346 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:07,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:07,346 INFO L82 PathProgramCache]: Analyzing trace with hash 547876883, now seen corresponding path program 3 times [2019-12-07 12:19:07,346 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:07,346 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737536282] [2019-12-07 12:19:07,346 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:07,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:07,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:07,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737536282] [2019-12-07 12:19:07,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:07,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 12:19:07,744 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1632049589] [2019-12-07 12:19:07,744 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 12:19:07,744 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:07,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 12:19:07,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=334, Unknown=0, NotChecked=0, Total=380 [2019-12-07 12:19:07,745 INFO L87 Difference]: Start difference. First operand 16200 states and 48246 transitions. Second operand 20 states. [2019-12-07 12:19:12,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:12,315 INFO L93 Difference]: Finished difference Result 18023 states and 52549 transitions. [2019-12-07 12:19:12,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 12:19:12,316 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 67 [2019-12-07 12:19:12,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:12,334 INFO L225 Difference]: With dead ends: 18023 [2019-12-07 12:19:12,334 INFO L226 Difference]: Without dead ends: 17641 [2019-12-07 12:19:12,335 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 393 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=296, Invalid=1960, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 12:19:12,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17641 states. [2019-12-07 12:19:12,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17641 to 16319. [2019-12-07 12:19:12,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16319 states. [2019-12-07 12:19:12,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16319 states to 16319 states and 48364 transitions. [2019-12-07 12:19:12,575 INFO L78 Accepts]: Start accepts. Automaton has 16319 states and 48364 transitions. Word has length 67 [2019-12-07 12:19:12,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:12,575 INFO L462 AbstractCegarLoop]: Abstraction has 16319 states and 48364 transitions. [2019-12-07 12:19:12,575 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 12:19:12,575 INFO L276 IsEmpty]: Start isEmpty. Operand 16319 states and 48364 transitions. [2019-12-07 12:19:12,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:19:12,589 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:12,589 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:12,589 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:12,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:12,589 INFO L82 PathProgramCache]: Analyzing trace with hash 2028748037, now seen corresponding path program 4 times [2019-12-07 12:19:12,589 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:12,590 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [380005917] [2019-12-07 12:19:12,590 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:12,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:12,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:12,713 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [380005917] [2019-12-07 12:19:12,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:12,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:19:12,713 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [493376793] [2019-12-07 12:19:12,714 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:19:12,714 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:12,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:19:12,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:19:12,714 INFO L87 Difference]: Start difference. First operand 16319 states and 48364 transitions. Second operand 11 states. [2019-12-07 12:19:13,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:13,288 INFO L93 Difference]: Finished difference Result 29753 states and 87820 transitions. [2019-12-07 12:19:13,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 12:19:13,288 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:19:13,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:13,321 INFO L225 Difference]: With dead ends: 29753 [2019-12-07 12:19:13,321 INFO L226 Difference]: Without dead ends: 29166 [2019-12-07 12:19:13,321 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=128, Invalid=522, Unknown=0, NotChecked=0, Total=650 [2019-12-07 12:19:13,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29166 states. [2019-12-07 12:19:13,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29166 to 15692. [2019-12-07 12:19:13,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15692 states. [2019-12-07 12:19:13,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15692 states to 15692 states and 46725 transitions. [2019-12-07 12:19:13,636 INFO L78 Accepts]: Start accepts. Automaton has 15692 states and 46725 transitions. Word has length 67 [2019-12-07 12:19:13,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:13,636 INFO L462 AbstractCegarLoop]: Abstraction has 15692 states and 46725 transitions. [2019-12-07 12:19:13,636 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:19:13,636 INFO L276 IsEmpty]: Start isEmpty. Operand 15692 states and 46725 transitions. [2019-12-07 12:19:13,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:19:13,649 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:13,649 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:13,650 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:13,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:13,650 INFO L82 PathProgramCache]: Analyzing trace with hash -1209104993, now seen corresponding path program 5 times [2019-12-07 12:19:13,650 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:13,650 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [186201656] [2019-12-07 12:19:13,650 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:13,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:19:13,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:19:13,732 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:19:13,732 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:19:13,735 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_69| 0 0))) (and (= v_~a$w_buff0~0_303 0) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~__unbuffered_p2_EBX~0_46 0) (= v_~z~0_13 0) (= |v_#NULL.offset_7| 0) (= v_~a~0_199 0) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$r_buff0_thd2~0_205) (= v_~a$r_buff0_thd3~0_412 0) (= v_~weak$$choice2~0_126 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t913~0.base_30|)) (= 0 v_~a$read_delayed~0_7) (= v_~a$read_delayed_var~0.offset_7 0) (= v_~y~0_30 0) (= v_~a$r_buff1_thd3~0_326 0) (= v_~main$tmp_guard0~0_25 0) (= 0 v_~__unbuffered_cnt~0_83) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~a$w_buff1_used~0_450) (= (store .cse0 |v_ULTIMATE.start_main_~#t913~0.base_30| 1) |v_#valid_67|) (= 0 |v_ULTIMATE.start_main_~#t913~0.offset_22|) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t913~0.base_30|) (= 0 v_~__unbuffered_p0_EAX~0_159) (= v_~a$flush_delayed~0_27 0) (= 0 v_~a$r_buff1_thd2~0_197) (= v_~a$mem_tmp~0_16 0) (= v_~main$tmp_guard1~0_32 0) (= 0 |v_#NULL.base_7|) (= 0 v_~a$r_buff1_thd1~0_190) (= v_~a$r_buff1_thd0~0_208 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t913~0.base_30| 4)) (= 0 v_~x~0_153) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t913~0.base_30| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t913~0.base_30|) |v_ULTIMATE.start_main_~#t913~0.offset_22| 0)) |v_#memory_int_19|) (= 0 v_~a$w_buff1~0_206) (= 0 v_~a$r_buff0_thd1~0_334) (= 0 v_~__unbuffered_p2_EAX~0_36) (= v_~a$r_buff0_thd0~0_214 0) (= 0 v_~weak$$choice0~0_13) (= 0 v_~a$w_buff0_used~0_788))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_197, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_53|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_53|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_214, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_33|, ~a~0=v_~a~0_199, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_159, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_36, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_46, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_326, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_788, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_334, ULTIMATE.start_main_~#t914~0.base=|v_ULTIMATE.start_main_~#t914~0.base_23|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_303, ULTIMATE.start_main_~#t913~0.base=|v_ULTIMATE.start_main_~#t913~0.base_30|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_208, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, ~x~0=v_~x~0_153, ~a$read_delayed~0=v_~a$read_delayed~0_7, ULTIMATE.start_main_~#t915~0.base=|v_ULTIMATE.start_main_~#t915~0.base_15|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_79|, ULTIMATE.start_main_~#t915~0.offset=|v_ULTIMATE.start_main_~#t915~0.offset_13|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_206, ~y~0=v_~y~0_30, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_190, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_412, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, ULTIMATE.start_main_~#t913~0.offset=|v_ULTIMATE.start_main_~#t913~0.offset_22|, #NULL.base=|v_#NULL.base_7|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_67|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t914~0.offset=|v_ULTIMATE.start_main_~#t914~0.offset_17|, ~z~0=v_~z~0_13, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_450, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t914~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ULTIMATE.start_main_~#t913~0.base, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ULTIMATE.start_main_~#t915~0.base, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t915~0.offset, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t913~0.offset, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t914~0.offset, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 12:19:13,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L4-->L750: Formula: (and (= ~a$r_buff0_thd1~0_Out-167145814 1) (= ~a$r_buff1_thd3~0_Out-167145814 ~a$r_buff0_thd3~0_In-167145814) (= ~a$r_buff0_thd1~0_In-167145814 ~a$r_buff1_thd1~0_Out-167145814) (= ~a$r_buff1_thd0~0_Out-167145814 ~a$r_buff0_thd0~0_In-167145814) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-167145814 0)) (= ~a$r_buff1_thd2~0_Out-167145814 ~a$r_buff0_thd2~0_In-167145814) (= ~x~0_In-167145814 ~__unbuffered_p0_EAX~0_Out-167145814)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-167145814, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-167145814, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-167145814, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-167145814, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-167145814, ~x~0=~x~0_In-167145814} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-167145814, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-167145814, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-167145814, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-167145814, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-167145814, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-167145814, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-167145814, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-167145814, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-167145814, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-167145814, ~x~0=~x~0_In-167145814} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:19:13,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L832-1-->L834: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t914~0.offset_10|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t914~0.base_11| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t914~0.base_11|) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t914~0.base_11| 1)) (= (select |v_#valid_42| |v_ULTIMATE.start_main_~#t914~0.base_11|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t914~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t914~0.base_11|) |v_ULTIMATE.start_main_~#t914~0.offset_10| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t914~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t914~0.offset=|v_ULTIMATE.start_main_~#t914~0.offset_10|, #length=|v_#length_17|, ULTIMATE.start_main_~#t914~0.base=|v_ULTIMATE.start_main_~#t914~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t914~0.offset, #length, ULTIMATE.start_main_~#t914~0.base] because there is no mapped edge [2019-12-07 12:19:13,737 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [864] [864] L834-1-->L836: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t915~0.offset_10|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t915~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t915~0.base_11|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t915~0.base_11| 4)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t915~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t915~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t915~0.base_11|) |v_ULTIMATE.start_main_~#t915~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t915~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t915~0.base=|v_ULTIMATE.start_main_~#t915~0.base_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t915~0.offset=|v_ULTIMATE.start_main_~#t915~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t915~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t915~0.offset] because there is no mapped edge [2019-12-07 12:19:13,738 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L770-2-->L770-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1789513281 256))) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1789513281 256) 0))) (or (and (not .cse0) (= ~a$w_buff1~0_In-1789513281 |P1Thread1of1ForFork2_#t~ite9_Out-1789513281|) (not .cse1)) (and (or .cse1 .cse0) (= ~a~0_In-1789513281 |P1Thread1of1ForFork2_#t~ite9_Out-1789513281|)))) InVars {~a~0=~a~0_In-1789513281, ~a$w_buff1~0=~a$w_buff1~0_In-1789513281, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1789513281, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1789513281} OutVars{~a~0=~a~0_In-1789513281, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1789513281|, ~a$w_buff1~0=~a$w_buff1~0_In-1789513281, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1789513281, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1789513281} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 12:19:13,738 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L770-4-->L771: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_28| v_~a~0_66) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_28|} OutVars{~a~0=v_~a~0_66, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_27|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_41|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 12:19:13,738 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-493714996 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-493714996 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-493714996| ~a$w_buff0_used~0_In-493714996) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out-493714996| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-493714996, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-493714996} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-493714996, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-493714996, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-493714996|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 12:19:13,739 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L772-->L772-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In1833437090 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd2~0_In1833437090 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In1833437090 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In1833437090 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out1833437090| 0)) (and (= ~a$w_buff1_used~0_In1833437090 |P1Thread1of1ForFork2_#t~ite12_Out1833437090|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1833437090, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1833437090, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1833437090, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1833437090} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1833437090, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1833437090, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1833437090, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1833437090|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1833437090} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 12:19:13,739 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L773-->L773-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd2~0_In-601869006 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-601869006 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-601869006| 0)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-601869006| ~a$r_buff0_thd2~0_In-601869006) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-601869006, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-601869006} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-601869006, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-601869006, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-601869006|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 12:19:13,739 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L774-->L774-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1853319182 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1853319182 256))) (.cse2 (= (mod ~a$r_buff1_thd2~0_In1853319182 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In1853319182 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1853319182|)) (and (= ~a$r_buff1_thd2~0_In1853319182 |P1Thread1of1ForFork2_#t~ite14_Out1853319182|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1853319182, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1853319182, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1853319182, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1853319182} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1853319182, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1853319182, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1853319182, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1853319182, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1853319182|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 12:19:13,739 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L774-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_51) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_51, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:19:13,739 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In3887102 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In3887102 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out3887102| ~a$w_buff0_used~0_In3887102)) (and (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out3887102|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In3887102, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In3887102} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out3887102|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In3887102, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In3887102} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 12:19:13,740 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In2121906270 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In2121906270 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In2121906270 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In2121906270 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out2121906270|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~a$w_buff1_used~0_In2121906270 |P0Thread1of1ForFork1_#t~ite6_Out2121906270|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2121906270, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2121906270, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2121906270, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2121906270} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out2121906270|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2121906270, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2121906270, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2121906270, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2121906270} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 12:19:13,740 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L753-->L754: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_In-1414474075 ~a$r_buff0_thd1~0_Out-1414474075)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1414474075 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1414474075 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (not .cse0) (= ~a$r_buff0_thd1~0_Out-1414474075 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1414474075, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1414474075} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1414474075|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1414474075, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1414474075} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:19:13,740 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In1946044710 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1946044710 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd1~0_In1946044710 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1946044710 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1946044710|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$r_buff1_thd1~0_In1946044710 |P0Thread1of1ForFork1_#t~ite8_Out1946044710|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1946044710, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1946044710, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1946044710, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1946044710} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1946044710|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1946044710, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1946044710, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1946044710, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1946044710} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 12:19:13,740 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L754-2-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_87 |v_P0Thread1of1ForFork1_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_35|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_87, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:19:13,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In2131126723 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_Out2131126723| ~a$w_buff1_used~0_In2131126723) (= |P2Thread1of1ForFork0_#t~ite30_Out2131126723| |P2Thread1of1ForFork0_#t~ite29_Out2131126723|) (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In2131126723 256)))) (or (and .cse0 (= (mod ~a$r_buff1_thd3~0_In2131126723 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In2131126723 256)) (and .cse0 (= (mod ~a$w_buff1_used~0_In2131126723 256) 0)))) .cse1) (and (= |P2Thread1of1ForFork0_#t~ite29_In2131126723| |P2Thread1of1ForFork0_#t~ite29_Out2131126723|) (= |P2Thread1of1ForFork0_#t~ite30_Out2131126723| ~a$w_buff1_used~0_In2131126723) (not .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2131126723, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2131126723, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2131126723, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2131126723, ~weak$$choice2~0=~weak$$choice2~0_In2131126723, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In2131126723|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2131126723, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2131126723, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2131126723, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2131126723, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out2131126723|, ~weak$$choice2~0=~weak$$choice2~0_In2131126723, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out2131126723|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 12:19:13,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~a$r_buff0_thd3~0_66 v_~a$r_buff0_thd3~0_65)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_66, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_65, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:19:13,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L805-->L809: Formula: (and (= v_~a$flush_delayed~0_11 0) (= v_~a~0_48 v_~a$mem_tmp~0_5) (not (= (mod v_~a$flush_delayed~0_12 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_48, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_11} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 12:19:13,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L809-2-->L809-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In746940343 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In746940343 256)))) (or (and (or .cse0 .cse1) (= ~a~0_In746940343 |P2Thread1of1ForFork0_#t~ite38_Out746940343|)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out746940343| ~a$w_buff1~0_In746940343) (not .cse0)))) InVars {~a~0=~a~0_In746940343, ~a$w_buff1~0=~a$w_buff1~0_In746940343, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In746940343, ~a$w_buff1_used~0=~a$w_buff1_used~0_In746940343} OutVars{~a~0=~a~0_In746940343, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out746940343|, ~a$w_buff1~0=~a$w_buff1~0_In746940343, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In746940343, ~a$w_buff1_used~0=~a$w_buff1_used~0_In746940343} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:19:13,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L809-4-->L810: Formula: (= v_~a~0_37 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{~a~0=v_~a~0_37, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:19:13,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1838393225 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1838393225 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1838393225 |P2Thread1of1ForFork0_#t~ite40_Out1838393225|)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out1838393225| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1838393225, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1838393225} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1838393225|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1838393225, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1838393225} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 12:19:13,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In92778400 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In92778400 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In92778400 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In92778400 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out92778400|)) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out92778400| ~a$w_buff1_used~0_In92778400) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In92778400, ~a$w_buff0_used~0=~a$w_buff0_used~0_In92778400, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In92778400, ~a$w_buff1_used~0=~a$w_buff1_used~0_In92778400} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In92778400, ~a$w_buff0_used~0=~a$w_buff0_used~0_In92778400, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In92778400, ~a$w_buff1_used~0=~a$w_buff1_used~0_In92778400, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out92778400|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 12:19:13,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In2008797932 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In2008797932 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out2008797932| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out2008797932| ~a$r_buff0_thd3~0_In2008797932)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2008797932, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2008797932} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In2008797932, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2008797932, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out2008797932|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 12:19:13,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1057518784 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1057518784 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In1057518784 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1057518784 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out1057518784|)) (and (= ~a$r_buff1_thd3~0_In1057518784 |P2Thread1of1ForFork0_#t~ite43_Out1057518784|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1057518784, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1057518784, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1057518784, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1057518784} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1057518784|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1057518784, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1057518784, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1057518784, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1057518784} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 12:19:13,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L813-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_201 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_201, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 12:19:13,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:19:13,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L842-2-->L842-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite47_Out968211564| |ULTIMATE.start_main_#t~ite48_Out968211564|)) (.cse2 (= (mod ~a$w_buff1_used~0_In968211564 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd0~0_In968211564 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= |ULTIMATE.start_main_#t~ite47_Out968211564| ~a$w_buff1~0_In968211564)) (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out968211564| ~a~0_In968211564) (or .cse2 .cse1)))) InVars {~a~0=~a~0_In968211564, ~a$w_buff1~0=~a$w_buff1~0_In968211564, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In968211564, ~a$w_buff1_used~0=~a$w_buff1_used~0_In968211564} OutVars{~a~0=~a~0_In968211564, ~a$w_buff1~0=~a$w_buff1~0_In968211564, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out968211564|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In968211564, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out968211564|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In968211564} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:19:13,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In396577605 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In396577605 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out396577605| ~a$w_buff0_used~0_In396577605) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out396577605| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In396577605, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In396577605} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In396577605, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out396577605|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In396577605} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:19:13,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L844-->L844-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1552531313 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1552531313 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-1552531313 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-1552531313 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-1552531313| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite50_Out-1552531313| ~a$w_buff1_used~0_In-1552531313)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1552531313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1552531313, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1552531313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1552531313} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1552531313|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1552531313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1552531313, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1552531313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1552531313} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:19:13,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L845-->L845-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-240814308 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-240814308 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-240814308| 0)) (and (= ~a$r_buff0_thd0~0_In-240814308 |ULTIMATE.start_main_#t~ite51_Out-240814308|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-240814308, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-240814308} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-240814308|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-240814308, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-240814308} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:19:13,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-516104119 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-516104119 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-516104119 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In-516104119 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-516104119| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite52_Out-516104119| ~a$r_buff1_thd0~0_In-516104119) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-516104119, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-516104119, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-516104119, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-516104119} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-516104119|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-516104119, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-516104119, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-516104119, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-516104119} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:19:13,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~a$r_buff1_thd0~0_170 |v_ULTIMATE.start_main_#t~ite52_39|) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_32 0) (= 1 v_~__unbuffered_p2_EAX~0_21) (= 0 v_~__unbuffered_p0_EAX~0_128))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_128, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_128, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_21, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_170, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:19:13,816 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:19:13 BasicIcfg [2019-12-07 12:19:13,816 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:19:13,816 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:19:13,817 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:19:13,817 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:19:13,817 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:18:02" (3/4) ... [2019-12-07 12:19:13,819 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:19:13,819 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_69| 0 0))) (and (= v_~a$w_buff0~0_303 0) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~__unbuffered_p2_EBX~0_46 0) (= v_~z~0_13 0) (= |v_#NULL.offset_7| 0) (= v_~a~0_199 0) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$r_buff0_thd2~0_205) (= v_~a$r_buff0_thd3~0_412 0) (= v_~weak$$choice2~0_126 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t913~0.base_30|)) (= 0 v_~a$read_delayed~0_7) (= v_~a$read_delayed_var~0.offset_7 0) (= v_~y~0_30 0) (= v_~a$r_buff1_thd3~0_326 0) (= v_~main$tmp_guard0~0_25 0) (= 0 v_~__unbuffered_cnt~0_83) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~a$w_buff1_used~0_450) (= (store .cse0 |v_ULTIMATE.start_main_~#t913~0.base_30| 1) |v_#valid_67|) (= 0 |v_ULTIMATE.start_main_~#t913~0.offset_22|) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t913~0.base_30|) (= 0 v_~__unbuffered_p0_EAX~0_159) (= v_~a$flush_delayed~0_27 0) (= 0 v_~a$r_buff1_thd2~0_197) (= v_~a$mem_tmp~0_16 0) (= v_~main$tmp_guard1~0_32 0) (= 0 |v_#NULL.base_7|) (= 0 v_~a$r_buff1_thd1~0_190) (= v_~a$r_buff1_thd0~0_208 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t913~0.base_30| 4)) (= 0 v_~x~0_153) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t913~0.base_30| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t913~0.base_30|) |v_ULTIMATE.start_main_~#t913~0.offset_22| 0)) |v_#memory_int_19|) (= 0 v_~a$w_buff1~0_206) (= 0 v_~a$r_buff0_thd1~0_334) (= 0 v_~__unbuffered_p2_EAX~0_36) (= v_~a$r_buff0_thd0~0_214 0) (= 0 v_~weak$$choice0~0_13) (= 0 v_~a$w_buff0_used~0_788))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_197, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_53|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_53|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_214, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_33|, ~a~0=v_~a~0_199, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_159, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_36, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_46, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_326, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_788, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_334, ULTIMATE.start_main_~#t914~0.base=|v_ULTIMATE.start_main_~#t914~0.base_23|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_303, ULTIMATE.start_main_~#t913~0.base=|v_ULTIMATE.start_main_~#t913~0.base_30|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_208, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, ~x~0=v_~x~0_153, ~a$read_delayed~0=v_~a$read_delayed~0_7, ULTIMATE.start_main_~#t915~0.base=|v_ULTIMATE.start_main_~#t915~0.base_15|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_79|, ULTIMATE.start_main_~#t915~0.offset=|v_ULTIMATE.start_main_~#t915~0.offset_13|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_206, ~y~0=v_~y~0_30, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_190, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_412, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, ULTIMATE.start_main_~#t913~0.offset=|v_ULTIMATE.start_main_~#t913~0.offset_22|, #NULL.base=|v_#NULL.base_7|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_67|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t914~0.offset=|v_ULTIMATE.start_main_~#t914~0.offset_17|, ~z~0=v_~z~0_13, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_450, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t914~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ULTIMATE.start_main_~#t913~0.base, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ULTIMATE.start_main_~#t915~0.base, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t915~0.offset, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t913~0.offset, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t914~0.offset, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 12:19:13,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L4-->L750: Formula: (and (= ~a$r_buff0_thd1~0_Out-167145814 1) (= ~a$r_buff1_thd3~0_Out-167145814 ~a$r_buff0_thd3~0_In-167145814) (= ~a$r_buff0_thd1~0_In-167145814 ~a$r_buff1_thd1~0_Out-167145814) (= ~a$r_buff1_thd0~0_Out-167145814 ~a$r_buff0_thd0~0_In-167145814) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-167145814 0)) (= ~a$r_buff1_thd2~0_Out-167145814 ~a$r_buff0_thd2~0_In-167145814) (= ~x~0_In-167145814 ~__unbuffered_p0_EAX~0_Out-167145814)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-167145814, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-167145814, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-167145814, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-167145814, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-167145814, ~x~0=~x~0_In-167145814} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-167145814, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-167145814, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-167145814, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-167145814, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-167145814, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-167145814, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-167145814, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-167145814, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-167145814, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-167145814, ~x~0=~x~0_In-167145814} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:19:13,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L832-1-->L834: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t914~0.offset_10|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t914~0.base_11| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t914~0.base_11|) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t914~0.base_11| 1)) (= (select |v_#valid_42| |v_ULTIMATE.start_main_~#t914~0.base_11|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t914~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t914~0.base_11|) |v_ULTIMATE.start_main_~#t914~0.offset_10| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t914~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t914~0.offset=|v_ULTIMATE.start_main_~#t914~0.offset_10|, #length=|v_#length_17|, ULTIMATE.start_main_~#t914~0.base=|v_ULTIMATE.start_main_~#t914~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t914~0.offset, #length, ULTIMATE.start_main_~#t914~0.base] because there is no mapped edge [2019-12-07 12:19:13,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [864] [864] L834-1-->L836: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t915~0.offset_10|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t915~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t915~0.base_11|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t915~0.base_11| 4)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t915~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t915~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t915~0.base_11|) |v_ULTIMATE.start_main_~#t915~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t915~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t915~0.base=|v_ULTIMATE.start_main_~#t915~0.base_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t915~0.offset=|v_ULTIMATE.start_main_~#t915~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t915~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t915~0.offset] because there is no mapped edge [2019-12-07 12:19:13,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L770-2-->L770-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1789513281 256))) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1789513281 256) 0))) (or (and (not .cse0) (= ~a$w_buff1~0_In-1789513281 |P1Thread1of1ForFork2_#t~ite9_Out-1789513281|) (not .cse1)) (and (or .cse1 .cse0) (= ~a~0_In-1789513281 |P1Thread1of1ForFork2_#t~ite9_Out-1789513281|)))) InVars {~a~0=~a~0_In-1789513281, ~a$w_buff1~0=~a$w_buff1~0_In-1789513281, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1789513281, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1789513281} OutVars{~a~0=~a~0_In-1789513281, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1789513281|, ~a$w_buff1~0=~a$w_buff1~0_In-1789513281, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1789513281, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1789513281} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 12:19:13,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L770-4-->L771: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_28| v_~a~0_66) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_28|} OutVars{~a~0=v_~a~0_66, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_27|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_41|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 12:19:13,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-493714996 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-493714996 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-493714996| ~a$w_buff0_used~0_In-493714996) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out-493714996| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-493714996, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-493714996} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-493714996, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-493714996, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-493714996|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 12:19:13,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L772-->L772-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In1833437090 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd2~0_In1833437090 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In1833437090 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In1833437090 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out1833437090| 0)) (and (= ~a$w_buff1_used~0_In1833437090 |P1Thread1of1ForFork2_#t~ite12_Out1833437090|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1833437090, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1833437090, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1833437090, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1833437090} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1833437090, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1833437090, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1833437090, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1833437090|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1833437090} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 12:19:13,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L773-->L773-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd2~0_In-601869006 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-601869006 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-601869006| 0)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-601869006| ~a$r_buff0_thd2~0_In-601869006) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-601869006, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-601869006} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-601869006, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-601869006, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-601869006|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 12:19:13,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L774-->L774-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1853319182 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1853319182 256))) (.cse2 (= (mod ~a$r_buff1_thd2~0_In1853319182 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In1853319182 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1853319182|)) (and (= ~a$r_buff1_thd2~0_In1853319182 |P1Thread1of1ForFork2_#t~ite14_Out1853319182|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1853319182, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1853319182, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1853319182, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1853319182} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1853319182, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1853319182, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1853319182, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1853319182, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1853319182|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 12:19:13,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L774-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_51) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_51, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:19:13,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In3887102 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In3887102 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out3887102| ~a$w_buff0_used~0_In3887102)) (and (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out3887102|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In3887102, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In3887102} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out3887102|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In3887102, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In3887102} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 12:19:13,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In2121906270 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In2121906270 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In2121906270 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In2121906270 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out2121906270|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~a$w_buff1_used~0_In2121906270 |P0Thread1of1ForFork1_#t~ite6_Out2121906270|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2121906270, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2121906270, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2121906270, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2121906270} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out2121906270|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2121906270, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2121906270, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2121906270, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2121906270} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 12:19:13,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L753-->L754: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_In-1414474075 ~a$r_buff0_thd1~0_Out-1414474075)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1414474075 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1414474075 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (not .cse0) (= ~a$r_buff0_thd1~0_Out-1414474075 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1414474075, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1414474075} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1414474075|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1414474075, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1414474075} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:19:13,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In1946044710 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1946044710 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd1~0_In1946044710 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1946044710 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1946044710|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$r_buff1_thd1~0_In1946044710 |P0Thread1of1ForFork1_#t~ite8_Out1946044710|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1946044710, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1946044710, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1946044710, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1946044710} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1946044710|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1946044710, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1946044710, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1946044710, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1946044710} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 12:19:13,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L754-2-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_87 |v_P0Thread1of1ForFork1_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_35|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_87, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:19:13,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In2131126723 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_Out2131126723| ~a$w_buff1_used~0_In2131126723) (= |P2Thread1of1ForFork0_#t~ite30_Out2131126723| |P2Thread1of1ForFork0_#t~ite29_Out2131126723|) (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In2131126723 256)))) (or (and .cse0 (= (mod ~a$r_buff1_thd3~0_In2131126723 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In2131126723 256)) (and .cse0 (= (mod ~a$w_buff1_used~0_In2131126723 256) 0)))) .cse1) (and (= |P2Thread1of1ForFork0_#t~ite29_In2131126723| |P2Thread1of1ForFork0_#t~ite29_Out2131126723|) (= |P2Thread1of1ForFork0_#t~ite30_Out2131126723| ~a$w_buff1_used~0_In2131126723) (not .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2131126723, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2131126723, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2131126723, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2131126723, ~weak$$choice2~0=~weak$$choice2~0_In2131126723, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In2131126723|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2131126723, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2131126723, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2131126723, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2131126723, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out2131126723|, ~weak$$choice2~0=~weak$$choice2~0_In2131126723, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out2131126723|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 12:19:13,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~a$r_buff0_thd3~0_66 v_~a$r_buff0_thd3~0_65)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_66, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_65, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:19:13,828 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L805-->L809: Formula: (and (= v_~a$flush_delayed~0_11 0) (= v_~a~0_48 v_~a$mem_tmp~0_5) (not (= (mod v_~a$flush_delayed~0_12 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_48, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_11} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 12:19:13,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L809-2-->L809-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In746940343 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In746940343 256)))) (or (and (or .cse0 .cse1) (= ~a~0_In746940343 |P2Thread1of1ForFork0_#t~ite38_Out746940343|)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out746940343| ~a$w_buff1~0_In746940343) (not .cse0)))) InVars {~a~0=~a~0_In746940343, ~a$w_buff1~0=~a$w_buff1~0_In746940343, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In746940343, ~a$w_buff1_used~0=~a$w_buff1_used~0_In746940343} OutVars{~a~0=~a~0_In746940343, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out746940343|, ~a$w_buff1~0=~a$w_buff1~0_In746940343, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In746940343, ~a$w_buff1_used~0=~a$w_buff1_used~0_In746940343} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:19:13,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L809-4-->L810: Formula: (= v_~a~0_37 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{~a~0=v_~a~0_37, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:19:13,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1838393225 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1838393225 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1838393225 |P2Thread1of1ForFork0_#t~ite40_Out1838393225|)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out1838393225| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1838393225, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1838393225} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1838393225|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1838393225, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1838393225} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 12:19:13,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In92778400 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In92778400 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In92778400 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In92778400 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out92778400|)) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out92778400| ~a$w_buff1_used~0_In92778400) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In92778400, ~a$w_buff0_used~0=~a$w_buff0_used~0_In92778400, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In92778400, ~a$w_buff1_used~0=~a$w_buff1_used~0_In92778400} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In92778400, ~a$w_buff0_used~0=~a$w_buff0_used~0_In92778400, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In92778400, ~a$w_buff1_used~0=~a$w_buff1_used~0_In92778400, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out92778400|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 12:19:13,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In2008797932 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In2008797932 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out2008797932| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out2008797932| ~a$r_buff0_thd3~0_In2008797932)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2008797932, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2008797932} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In2008797932, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2008797932, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out2008797932|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 12:19:13,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1057518784 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1057518784 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In1057518784 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1057518784 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out1057518784|)) (and (= ~a$r_buff1_thd3~0_In1057518784 |P2Thread1of1ForFork0_#t~ite43_Out1057518784|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1057518784, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1057518784, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1057518784, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1057518784} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1057518784|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1057518784, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1057518784, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1057518784, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1057518784} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 12:19:13,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L813-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_201 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_201, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 12:19:13,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:19:13,831 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L842-2-->L842-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite47_Out968211564| |ULTIMATE.start_main_#t~ite48_Out968211564|)) (.cse2 (= (mod ~a$w_buff1_used~0_In968211564 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd0~0_In968211564 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= |ULTIMATE.start_main_#t~ite47_Out968211564| ~a$w_buff1~0_In968211564)) (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out968211564| ~a~0_In968211564) (or .cse2 .cse1)))) InVars {~a~0=~a~0_In968211564, ~a$w_buff1~0=~a$w_buff1~0_In968211564, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In968211564, ~a$w_buff1_used~0=~a$w_buff1_used~0_In968211564} OutVars{~a~0=~a~0_In968211564, ~a$w_buff1~0=~a$w_buff1~0_In968211564, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out968211564|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In968211564, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out968211564|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In968211564} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:19:13,831 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In396577605 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In396577605 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out396577605| ~a$w_buff0_used~0_In396577605) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out396577605| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In396577605, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In396577605} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In396577605, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out396577605|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In396577605} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:19:13,831 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L844-->L844-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1552531313 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1552531313 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-1552531313 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-1552531313 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-1552531313| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite50_Out-1552531313| ~a$w_buff1_used~0_In-1552531313)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1552531313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1552531313, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1552531313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1552531313} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1552531313|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1552531313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1552531313, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1552531313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1552531313} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:19:13,832 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L845-->L845-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-240814308 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-240814308 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-240814308| 0)) (and (= ~a$r_buff0_thd0~0_In-240814308 |ULTIMATE.start_main_#t~ite51_Out-240814308|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-240814308, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-240814308} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-240814308|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-240814308, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-240814308} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:19:13,832 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-516104119 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-516104119 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-516104119 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In-516104119 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-516104119| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite52_Out-516104119| ~a$r_buff1_thd0~0_In-516104119) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-516104119, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-516104119, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-516104119, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-516104119} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-516104119|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-516104119, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-516104119, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-516104119, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-516104119} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:19:13,832 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~a$r_buff1_thd0~0_170 |v_ULTIMATE.start_main_#t~ite52_39|) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_32 0) (= 1 v_~__unbuffered_p2_EAX~0_21) (= 0 v_~__unbuffered_p0_EAX~0_128))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_128, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_128, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_21, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_170, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:19:13,883 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_46895866-2625-4193-988a-ddb0ac5add4f/bin/uautomizer/witness.graphml [2019-12-07 12:19:13,884 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:19:13,884 INFO L168 Benchmark]: Toolchain (without parser) took 72068.12 ms. Allocated memory was 1.0 GB in the beginning and 6.1 GB in the end (delta: 5.1 GB). Free memory was 939.8 MB in the beginning and 2.3 GB in the end (delta: -1.4 GB). Peak memory consumption was 3.7 GB. Max. memory is 11.5 GB. [2019-12-07 12:19:13,885 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:19:13,885 INFO L168 Benchmark]: CACSL2BoogieTranslator took 387.07 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 106.4 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -134.3 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 12:19:13,885 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.37 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:19:13,885 INFO L168 Benchmark]: Boogie Preprocessor took 26.68 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:19:13,886 INFO L168 Benchmark]: RCFGBuilder took 421.46 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. [2019-12-07 12:19:13,886 INFO L168 Benchmark]: TraceAbstraction took 71125.12 ms. Allocated memory was 1.1 GB in the beginning and 6.1 GB in the end (delta: 4.9 GB). Free memory was 1.0 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2019-12-07 12:19:13,886 INFO L168 Benchmark]: Witness Printer took 67.14 ms. Allocated memory is still 6.1 GB. Free memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 16.9 MB). Peak memory consumption was 16.9 MB. Max. memory is 11.5 GB. [2019-12-07 12:19:13,887 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 387.07 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 106.4 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -134.3 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.37 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.68 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 421.46 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 71125.12 ms. Allocated memory was 1.1 GB in the beginning and 6.1 GB in the end (delta: 4.9 GB). Free memory was 1.0 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. * Witness Printer took 67.14 ms. Allocated memory is still 6.1 GB. Free memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 16.9 MB). Peak memory consumption was 16.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 178 ProgramPointsBefore, 94 ProgramPointsAfterwards, 215 TransitionsBefore, 104 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 35 TrivialSequentialCompositions, 47 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 31 ChoiceCompositions, 7408 VarBasedMoverChecksPositive, 251 VarBasedMoverChecksNegative, 42 SemBasedMoverChecksPositive, 283 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 83880 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L832] FCALL, FORK 0 pthread_create(&t913, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L735] 1 a$w_buff1 = a$w_buff0 [L736] 1 a$w_buff0 = 1 [L737] 1 a$w_buff1_used = a$w_buff0_used [L738] 1 a$w_buff0_used = (_Bool)1 [L750] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L834] FCALL, FORK 0 pthread_create(&t914, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L764] 2 x = 1 [L767] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L770] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L750] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L771] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L772] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L773] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L751] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L752] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L836] FCALL, FORK 0 pthread_create(&t915, ((void *)0), P2, ((void *)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L784] 3 y = 1 [L787] 3 z = 1 [L790] 3 __unbuffered_p2_EAX = z [L793] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L794] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L795] 3 a$flush_delayed = weak$$choice2 [L796] 3 a$mem_tmp = a VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=1] [L797] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=1] [L797] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L798] EXPR 3 weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0))=1, x=1, y=1, z=1] [L798] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L799] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=1] [L799] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L800] EXPR 3 weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used))=0, x=1, y=1, z=1] [L800] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L801] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L803] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L804] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=1] [L809] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=1] [L810] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L811] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L812] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L842] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=1] [L842] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L843] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L844] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L845] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 70.9s, OverallIterations: 28, TraceHistogramMax: 1, AutomataDifference: 22.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6188 SDtfs, 6709 SDslu, 23093 SDs, 0 SdLazy, 13788 SolverSat, 297 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 367 GetRequests, 42 SyntacticMatches, 14 SemanticMatches, 311 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4228 ImplicationChecksByTransitivity, 6.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=155174occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 27.9s AutomataMinimizationTime, 27 MinimizatonAttempts, 186066 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 1107 NumberOfCodeBlocks, 1107 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1013 ConstructedInterpolants, 0 QuantifiedInterpolants, 294897 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 27 InterpolantComputations, 27 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...