./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix036_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix036_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d388ab1cdabcd8ce0c288474f9782d914b4327ba ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:26:20,121 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:26:20,123 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:26:20,131 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:26:20,131 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:26:20,132 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:26:20,133 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:26:20,134 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:26:20,135 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:26:20,136 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:26:20,136 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:26:20,137 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:26:20,138 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:26:20,138 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:26:20,139 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:26:20,140 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:26:20,140 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:26:20,141 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:26:20,143 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:26:20,144 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:26:20,145 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:26:20,146 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:26:20,147 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:26:20,147 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:26:20,149 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:26:20,149 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:26:20,149 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:26:20,150 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:26:20,150 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:26:20,151 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:26:20,151 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:26:20,151 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:26:20,152 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:26:20,152 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:26:20,153 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:26:20,153 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:26:20,154 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:26:20,154 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:26:20,154 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:26:20,155 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:26:20,155 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:26:20,155 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:26:20,165 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:26:20,165 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:26:20,166 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:26:20,166 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:26:20,166 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:26:20,166 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:26:20,166 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:26:20,166 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:26:20,167 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:26:20,167 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:26:20,167 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:26:20,167 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:26:20,167 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:26:20,167 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:26:20,167 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:26:20,167 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:26:20,168 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:26:20,168 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:26:20,168 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:26:20,168 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:26:20,168 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:26:20,168 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:26:20,168 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:26:20,169 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:26:20,169 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:26:20,169 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:26:20,169 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:26:20,169 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:26:20,169 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:26:20,170 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d388ab1cdabcd8ce0c288474f9782d914b4327ba [2019-12-07 17:26:20,273 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:26:20,280 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:26:20,283 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:26:20,284 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:26:20,284 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:26:20,284 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix036_rmo.opt.i [2019-12-07 17:26:20,322 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/data/a16fb4ac7/183c7b6851914cae9dad57457e277be9/FLAGd11748b29 [2019-12-07 17:26:20,732 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:26:20,732 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/sv-benchmarks/c/pthread-wmm/mix036_rmo.opt.i [2019-12-07 17:26:20,743 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/data/a16fb4ac7/183c7b6851914cae9dad57457e277be9/FLAGd11748b29 [2019-12-07 17:26:20,751 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/data/a16fb4ac7/183c7b6851914cae9dad57457e277be9 [2019-12-07 17:26:20,753 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:26:20,754 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:26:20,754 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:26:20,755 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:26:20,757 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:26:20,757 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:26:20" (1/1) ... [2019-12-07 17:26:20,759 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:20, skipping insertion in model container [2019-12-07 17:26:20,759 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:26:20" (1/1) ... [2019-12-07 17:26:20,764 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:26:20,793 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:26:21,040 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:26:21,047 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:26:21,090 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:26:21,135 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:26:21,136 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21 WrapperNode [2019-12-07 17:26:21,136 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:26:21,136 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:26:21,136 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:26:21,137 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:26:21,142 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21" (1/1) ... [2019-12-07 17:26:21,155 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21" (1/1) ... [2019-12-07 17:26:21,174 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:26:21,175 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:26:21,175 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:26:21,175 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:26:21,181 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21" (1/1) ... [2019-12-07 17:26:21,181 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21" (1/1) ... [2019-12-07 17:26:21,184 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21" (1/1) ... [2019-12-07 17:26:21,184 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21" (1/1) ... [2019-12-07 17:26:21,191 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21" (1/1) ... [2019-12-07 17:26:21,194 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21" (1/1) ... [2019-12-07 17:26:21,196 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21" (1/1) ... [2019-12-07 17:26:21,199 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:26:21,199 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:26:21,199 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:26:21,199 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:26:21,200 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:26:21,240 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:26:21,240 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:26:21,240 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:26:21,240 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:26:21,240 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:26:21,240 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:26:21,240 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:26:21,240 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:26:21,240 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:26:21,240 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:26:21,241 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 17:26:21,241 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 17:26:21,241 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:26:21,241 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:26:21,241 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:26:21,242 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:26:21,628 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:26:21,628 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:26:21,629 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:26:21 BoogieIcfgContainer [2019-12-07 17:26:21,629 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:26:21,630 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:26:21,630 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:26:21,632 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:26:21,632 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:26:20" (1/3) ... [2019-12-07 17:26:21,633 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38105b95 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:26:21, skipping insertion in model container [2019-12-07 17:26:21,633 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:26:21" (2/3) ... [2019-12-07 17:26:21,633 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38105b95 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:26:21, skipping insertion in model container [2019-12-07 17:26:21,633 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:26:21" (3/3) ... [2019-12-07 17:26:21,634 INFO L109 eAbstractionObserver]: Analyzing ICFG mix036_rmo.opt.i [2019-12-07 17:26:21,641 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:26:21,641 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:26:21,646 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:26:21,647 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:26:21,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,675 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,675 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,675 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,675 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,675 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,677 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,677 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,685 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,685 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,685 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,685 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,685 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,685 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,685 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,686 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,686 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,686 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,686 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,686 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,693 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,694 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,694 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,694 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,694 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,699 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,699 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,699 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,700 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,700 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,700 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,700 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,700 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,700 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,701 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,701 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,701 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,701 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,701 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,701 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,702 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,702 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,702 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,702 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,702 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,702 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,703 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,703 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,703 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,703 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,703 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,703 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,703 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,704 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,704 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:26:21,720 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 17:26:21,732 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:26:21,732 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:26:21,732 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:26:21,732 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:26:21,732 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:26:21,733 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:26:21,733 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:26:21,733 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:26:21,743 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 183 places, 211 transitions [2019-12-07 17:26:21,744 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 183 places, 211 transitions [2019-12-07 17:26:21,811 INFO L134 PetriNetUnfolder]: 41/207 cut-off events. [2019-12-07 17:26:21,811 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:26:21,821 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 207 events. 41/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 13. Compared 704 event pairs. 12/176 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 17:26:21,837 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 183 places, 211 transitions [2019-12-07 17:26:21,872 INFO L134 PetriNetUnfolder]: 41/207 cut-off events. [2019-12-07 17:26:21,872 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:26:21,877 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 207 events. 41/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 13. Compared 704 event pairs. 12/176 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 17:26:21,893 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 18126 [2019-12-07 17:26:21,893 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:26:25,280 WARN L192 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 49 [2019-12-07 17:26:25,474 WARN L192 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 103 DAG size of output: 101 [2019-12-07 17:26:25,579 INFO L206 etLargeBlockEncoding]: Checked pairs total: 74129 [2019-12-07 17:26:25,579 INFO L214 etLargeBlockEncoding]: Total number of compositions: 127 [2019-12-07 17:26:25,581 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 88 places, 95 transitions [2019-12-07 17:26:50,988 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 160086 states. [2019-12-07 17:26:50,989 INFO L276 IsEmpty]: Start isEmpty. Operand 160086 states. [2019-12-07 17:26:50,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 17:26:50,994 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:50,994 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:50,994 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:50,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:50,998 INFO L82 PathProgramCache]: Analyzing trace with hash -74872892, now seen corresponding path program 1 times [2019-12-07 17:26:51,004 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:51,004 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280586166] [2019-12-07 17:26:51,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:51,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:51,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:51,153 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280586166] [2019-12-07 17:26:51,153 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:51,153 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:26:51,154 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712208241] [2019-12-07 17:26:51,156 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:26:51,157 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:51,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:26:51,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:51,167 INFO L87 Difference]: Start difference. First operand 160086 states. Second operand 3 states. [2019-12-07 17:26:52,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:52,245 INFO L93 Difference]: Finished difference Result 158186 states and 763682 transitions. [2019-12-07 17:26:52,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:26:52,246 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 17:26:52,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:52,995 INFO L225 Difference]: With dead ends: 158186 [2019-12-07 17:26:52,996 INFO L226 Difference]: Without dead ends: 149138 [2019-12-07 17:26:52,996 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:27:00,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149138 states. [2019-12-07 17:27:02,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149138 to 149138. [2019-12-07 17:27:02,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149138 states. [2019-12-07 17:27:02,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149138 states to 149138 states and 719092 transitions. [2019-12-07 17:27:02,617 INFO L78 Accepts]: Start accepts. Automaton has 149138 states and 719092 transitions. Word has length 7 [2019-12-07 17:27:02,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:27:02,617 INFO L462 AbstractCegarLoop]: Abstraction has 149138 states and 719092 transitions. [2019-12-07 17:27:02,618 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:27:02,618 INFO L276 IsEmpty]: Start isEmpty. Operand 149138 states and 719092 transitions. [2019-12-07 17:27:02,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 17:27:02,627 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:27:02,627 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:27:02,628 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:27:02,628 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:27:02,628 INFO L82 PathProgramCache]: Analyzing trace with hash 117436716, now seen corresponding path program 1 times [2019-12-07 17:27:02,628 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:27:02,628 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131301261] [2019-12-07 17:27:02,629 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:27:02,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:27:02,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:27:02,698 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131301261] [2019-12-07 17:27:02,698 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:27:02,698 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:27:02,698 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [650050781] [2019-12-07 17:27:02,699 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:27:02,699 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:27:02,699 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:27:02,699 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:27:02,699 INFO L87 Difference]: Start difference. First operand 149138 states and 719092 transitions. Second operand 4 states. [2019-12-07 17:27:06,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:27:06,231 INFO L93 Difference]: Finished difference Result 229934 states and 1066258 transitions. [2019-12-07 17:27:06,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:27:06,231 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 17:27:06,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:27:06,898 INFO L225 Difference]: With dead ends: 229934 [2019-12-07 17:27:06,898 INFO L226 Difference]: Without dead ends: 229738 [2019-12-07 17:27:06,898 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:27:12,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229738 states. [2019-12-07 17:27:15,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229738 to 213034. [2019-12-07 17:27:15,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213034 states. [2019-12-07 17:27:16,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213034 states to 213034 states and 997136 transitions. [2019-12-07 17:27:16,908 INFO L78 Accepts]: Start accepts. Automaton has 213034 states and 997136 transitions. Word has length 15 [2019-12-07 17:27:16,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:27:16,909 INFO L462 AbstractCegarLoop]: Abstraction has 213034 states and 997136 transitions. [2019-12-07 17:27:16,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:27:16,909 INFO L276 IsEmpty]: Start isEmpty. Operand 213034 states and 997136 transitions. [2019-12-07 17:27:16,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 17:27:16,912 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:27:16,912 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:27:16,913 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:27:16,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:27:16,913 INFO L82 PathProgramCache]: Analyzing trace with hash 860387736, now seen corresponding path program 1 times [2019-12-07 17:27:16,913 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:27:16,913 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [637784761] [2019-12-07 17:27:16,913 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:27:16,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:27:16,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:27:16,968 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [637784761] [2019-12-07 17:27:16,968 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:27:16,968 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:27:16,968 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [447725216] [2019-12-07 17:27:16,969 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:27:16,969 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:27:16,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:27:16,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:27:16,969 INFO L87 Difference]: Start difference. First operand 213034 states and 997136 transitions. Second operand 4 states. [2019-12-07 17:27:18,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:27:18,554 INFO L93 Difference]: Finished difference Result 303626 states and 1391380 transitions. [2019-12-07 17:27:18,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:27:18,555 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 17:27:18,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:27:22,939 INFO L225 Difference]: With dead ends: 303626 [2019-12-07 17:27:22,939 INFO L226 Difference]: Without dead ends: 303402 [2019-12-07 17:27:22,940 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:27:29,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 303402 states. [2019-12-07 17:27:33,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 303402 to 256502. [2019-12-07 17:27:33,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256502 states. [2019-12-07 17:27:34,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256502 states to 256502 states and 1193404 transitions. [2019-12-07 17:27:34,763 INFO L78 Accepts]: Start accepts. Automaton has 256502 states and 1193404 transitions. Word has length 15 [2019-12-07 17:27:34,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:27:34,763 INFO L462 AbstractCegarLoop]: Abstraction has 256502 states and 1193404 transitions. [2019-12-07 17:27:34,764 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:27:34,764 INFO L276 IsEmpty]: Start isEmpty. Operand 256502 states and 1193404 transitions. [2019-12-07 17:27:34,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:27:34,769 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:27:34,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:27:34,769 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:27:34,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:27:34,769 INFO L82 PathProgramCache]: Analyzing trace with hash -293201311, now seen corresponding path program 1 times [2019-12-07 17:27:34,769 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:27:34,769 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1245297780] [2019-12-07 17:27:34,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:27:34,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:27:34,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:27:34,805 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1245297780] [2019-12-07 17:27:34,805 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:27:34,805 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:27:34,805 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [334367155] [2019-12-07 17:27:34,806 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:27:34,806 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:27:34,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:27:34,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:27:34,806 INFO L87 Difference]: Start difference. First operand 256502 states and 1193404 transitions. Second operand 4 states. [2019-12-07 17:27:36,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:27:36,980 INFO L93 Difference]: Finished difference Result 322820 states and 1487561 transitions. [2019-12-07 17:27:36,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:27:36,981 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 17:27:36,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:27:37,887 INFO L225 Difference]: With dead ends: 322820 [2019-12-07 17:27:37,887 INFO L226 Difference]: Without dead ends: 322628 [2019-12-07 17:27:37,887 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:27:45,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322628 states. [2019-12-07 17:27:53,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322628 to 276774. [2019-12-07 17:27:53,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 276774 states. [2019-12-07 17:27:54,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276774 states to 276774 states and 1285532 transitions. [2019-12-07 17:27:54,110 INFO L78 Accepts]: Start accepts. Automaton has 276774 states and 1285532 transitions. Word has length 16 [2019-12-07 17:27:54,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:27:54,110 INFO L462 AbstractCegarLoop]: Abstraction has 276774 states and 1285532 transitions. [2019-12-07 17:27:54,110 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:27:54,110 INFO L276 IsEmpty]: Start isEmpty. Operand 276774 states and 1285532 transitions. [2019-12-07 17:27:54,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:27:54,114 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:27:54,114 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:27:54,114 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:27:54,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:27:54,115 INFO L82 PathProgramCache]: Analyzing trace with hash -293081279, now seen corresponding path program 1 times [2019-12-07 17:27:54,115 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:27:54,115 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225057206] [2019-12-07 17:27:54,115 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:27:54,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:27:54,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:27:54,147 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225057206] [2019-12-07 17:27:54,148 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:27:54,148 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:27:54,148 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1687528319] [2019-12-07 17:27:54,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:27:54,148 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:27:54,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:27:54,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:27:54,149 INFO L87 Difference]: Start difference. First operand 276774 states and 1285532 transitions. Second operand 4 states. [2019-12-07 17:27:56,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:27:56,311 INFO L93 Difference]: Finished difference Result 336936 states and 1552183 transitions. [2019-12-07 17:27:56,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:27:56,311 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 17:27:56,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:27:57,287 INFO L225 Difference]: With dead ends: 336936 [2019-12-07 17:27:57,287 INFO L226 Difference]: Without dead ends: 336744 [2019-12-07 17:27:57,287 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:28:07,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336744 states. [2019-12-07 17:28:12,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336744 to 277412. [2019-12-07 17:28:12,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277412 states. [2019-12-07 17:28:13,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277412 states to 277412 states and 1288143 transitions. [2019-12-07 17:28:13,500 INFO L78 Accepts]: Start accepts. Automaton has 277412 states and 1288143 transitions. Word has length 16 [2019-12-07 17:28:13,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:28:13,501 INFO L462 AbstractCegarLoop]: Abstraction has 277412 states and 1288143 transitions. [2019-12-07 17:28:13,501 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:28:13,501 INFO L276 IsEmpty]: Start isEmpty. Operand 277412 states and 1288143 transitions. [2019-12-07 17:28:13,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 17:28:13,519 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:28:13,519 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:28:13,519 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:28:13,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:28:13,520 INFO L82 PathProgramCache]: Analyzing trace with hash -236448520, now seen corresponding path program 1 times [2019-12-07 17:28:13,520 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:28:13,520 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [289267353] [2019-12-07 17:28:13,520 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:28:13,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:28:13,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:28:13,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [289267353] [2019-12-07 17:28:13,562 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:28:13,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:28:13,563 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [199519933] [2019-12-07 17:28:13,563 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:28:13,563 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:28:13,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:28:13,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:28:13,563 INFO L87 Difference]: Start difference. First operand 277412 states and 1288143 transitions. Second operand 3 states. [2019-12-07 17:28:14,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:28:14,878 INFO L93 Difference]: Finished difference Result 275822 states and 1280712 transitions. [2019-12-07 17:28:14,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:28:14,879 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 17:28:14,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:28:16,190 INFO L225 Difference]: With dead ends: 275822 [2019-12-07 17:28:16,190 INFO L226 Difference]: Without dead ends: 275822 [2019-12-07 17:28:16,190 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:28:26,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275822 states. [2019-12-07 17:28:29,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275822 to 275822. [2019-12-07 17:28:29,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 275822 states. [2019-12-07 17:28:31,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 275822 states to 275822 states and 1280712 transitions. [2019-12-07 17:28:31,198 INFO L78 Accepts]: Start accepts. Automaton has 275822 states and 1280712 transitions. Word has length 20 [2019-12-07 17:28:31,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:28:31,199 INFO L462 AbstractCegarLoop]: Abstraction has 275822 states and 1280712 transitions. [2019-12-07 17:28:31,199 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:28:31,199 INFO L276 IsEmpty]: Start isEmpty. Operand 275822 states and 1280712 transitions. [2019-12-07 17:28:31,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 17:28:31,224 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:28:31,224 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:28:31,224 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:28:31,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:28:31,224 INFO L82 PathProgramCache]: Analyzing trace with hash 559574299, now seen corresponding path program 1 times [2019-12-07 17:28:31,224 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:28:31,224 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716361219] [2019-12-07 17:28:31,224 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:28:31,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:28:31,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:28:31,272 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716361219] [2019-12-07 17:28:31,272 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:28:31,273 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:28:31,273 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [778365064] [2019-12-07 17:28:31,273 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:28:31,273 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:28:31,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:28:31,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:28:31,274 INFO L87 Difference]: Start difference. First operand 275822 states and 1280712 transitions. Second operand 5 states. [2019-12-07 17:28:33,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:28:33,954 INFO L93 Difference]: Finished difference Result 385174 states and 1757400 transitions. [2019-12-07 17:28:33,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:28:33,955 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 17:28:33,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:28:35,057 INFO L225 Difference]: With dead ends: 385174 [2019-12-07 17:28:35,058 INFO L226 Difference]: Without dead ends: 384792 [2019-12-07 17:28:35,058 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:28:46,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 384792 states. [2019-12-07 17:28:51,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 384792 to 290536. [2019-12-07 17:28:51,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 290536 states. [2019-12-07 17:28:53,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290536 states to 290536 states and 1346927 transitions. [2019-12-07 17:28:53,103 INFO L78 Accepts]: Start accepts. Automaton has 290536 states and 1346927 transitions. Word has length 21 [2019-12-07 17:28:53,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:28:53,104 INFO L462 AbstractCegarLoop]: Abstraction has 290536 states and 1346927 transitions. [2019-12-07 17:28:53,104 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:28:53,104 INFO L276 IsEmpty]: Start isEmpty. Operand 290536 states and 1346927 transitions. [2019-12-07 17:28:53,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 17:28:53,129 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:28:53,129 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:28:53,129 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:28:53,129 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:28:53,130 INFO L82 PathProgramCache]: Analyzing trace with hash 357663375, now seen corresponding path program 1 times [2019-12-07 17:28:53,130 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:28:53,130 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [163706782] [2019-12-07 17:28:53,130 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:28:53,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:28:53,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:28:53,163 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [163706782] [2019-12-07 17:28:53,163 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:28:53,163 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:28:53,163 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264492867] [2019-12-07 17:28:53,164 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:28:53,164 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:28:53,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:28:53,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:28:53,164 INFO L87 Difference]: Start difference. First operand 290536 states and 1346927 transitions. Second operand 3 states. [2019-12-07 17:28:53,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:28:53,916 INFO L93 Difference]: Finished difference Result 179389 states and 748773 transitions. [2019-12-07 17:28:53,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:28:53,917 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 17:28:53,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:28:54,381 INFO L225 Difference]: With dead ends: 179389 [2019-12-07 17:28:54,381 INFO L226 Difference]: Without dead ends: 179389 [2019-12-07 17:28:54,381 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:28:58,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179389 states. [2019-12-07 17:29:00,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179389 to 179389. [2019-12-07 17:29:00,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179389 states. [2019-12-07 17:29:01,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179389 states to 179389 states and 748773 transitions. [2019-12-07 17:29:01,609 INFO L78 Accepts]: Start accepts. Automaton has 179389 states and 748773 transitions. Word has length 21 [2019-12-07 17:29:01,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:01,609 INFO L462 AbstractCegarLoop]: Abstraction has 179389 states and 748773 transitions. [2019-12-07 17:29:01,609 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:29:01,609 INFO L276 IsEmpty]: Start isEmpty. Operand 179389 states and 748773 transitions. [2019-12-07 17:29:01,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:29:01,625 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:01,625 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:01,625 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:01,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:01,626 INFO L82 PathProgramCache]: Analyzing trace with hash 371264485, now seen corresponding path program 1 times [2019-12-07 17:29:01,626 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:01,626 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [186197126] [2019-12-07 17:29:01,626 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:01,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:01,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:01,677 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [186197126] [2019-12-07 17:29:01,677 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:01,677 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:29:01,677 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1783846278] [2019-12-07 17:29:01,677 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:29:01,678 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:01,678 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:29:01,678 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:29:01,678 INFO L87 Difference]: Start difference. First operand 179389 states and 748773 transitions. Second operand 4 states. [2019-12-07 17:29:03,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:03,335 INFO L93 Difference]: Finished difference Result 284843 states and 1188989 transitions. [2019-12-07 17:29:03,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:29:03,336 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 17:29:03,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:04,019 INFO L225 Difference]: With dead ends: 284843 [2019-12-07 17:29:04,019 INFO L226 Difference]: Without dead ends: 275011 [2019-12-07 17:29:04,019 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:11,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275011 states. [2019-12-07 17:29:15,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275011 to 274789. [2019-12-07 17:29:15,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 274789 states. [2019-12-07 17:29:16,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 274789 states to 274789 states and 1148100 transitions. [2019-12-07 17:29:16,000 INFO L78 Accepts]: Start accepts. Automaton has 274789 states and 1148100 transitions. Word has length 22 [2019-12-07 17:29:16,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:16,001 INFO L462 AbstractCegarLoop]: Abstraction has 274789 states and 1148100 transitions. [2019-12-07 17:29:16,001 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:29:16,001 INFO L276 IsEmpty]: Start isEmpty. Operand 274789 states and 1148100 transitions. [2019-12-07 17:29:16,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:29:16,027 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:16,027 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:16,027 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:16,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:16,027 INFO L82 PathProgramCache]: Analyzing trace with hash 1724335203, now seen corresponding path program 2 times [2019-12-07 17:29:16,028 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:16,028 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632205223] [2019-12-07 17:29:16,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:16,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:16,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:16,054 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632205223] [2019-12-07 17:29:16,054 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:16,054 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:29:16,054 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1140477602] [2019-12-07 17:29:16,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:29:16,054 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:16,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:29:16,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:29:16,055 INFO L87 Difference]: Start difference. First operand 274789 states and 1148100 transitions. Second operand 4 states. [2019-12-07 17:29:16,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:16,265 INFO L93 Difference]: Finished difference Result 62542 states and 218525 transitions. [2019-12-07 17:29:16,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:29:16,265 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 17:29:16,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:16,373 INFO L225 Difference]: With dead ends: 62542 [2019-12-07 17:29:16,373 INFO L226 Difference]: Without dead ends: 62542 [2019-12-07 17:29:16,373 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:29:16,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62542 states. [2019-12-07 17:29:17,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62542 to 62542. [2019-12-07 17:29:17,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62542 states. [2019-12-07 17:29:17,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62542 states to 62542 states and 218525 transitions. [2019-12-07 17:29:17,743 INFO L78 Accepts]: Start accepts. Automaton has 62542 states and 218525 transitions. Word has length 22 [2019-12-07 17:29:17,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:17,744 INFO L462 AbstractCegarLoop]: Abstraction has 62542 states and 218525 transitions. [2019-12-07 17:29:17,744 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:29:17,744 INFO L276 IsEmpty]: Start isEmpty. Operand 62542 states and 218525 transitions. [2019-12-07 17:29:17,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 17:29:17,753 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:17,753 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:17,753 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:17,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:17,753 INFO L82 PathProgramCache]: Analyzing trace with hash 127408811, now seen corresponding path program 1 times [2019-12-07 17:29:17,753 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:17,753 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374537579] [2019-12-07 17:29:17,754 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:17,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:17,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:17,791 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374537579] [2019-12-07 17:29:17,791 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:17,791 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:29:17,791 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [606337970] [2019-12-07 17:29:17,791 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:29:17,792 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:17,792 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:29:17,792 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:17,792 INFO L87 Difference]: Start difference. First operand 62542 states and 218525 transitions. Second operand 5 states. [2019-12-07 17:29:18,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:18,302 INFO L93 Difference]: Finished difference Result 88931 states and 306134 transitions. [2019-12-07 17:29:18,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:29:18,303 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2019-12-07 17:29:18,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:18,450 INFO L225 Difference]: With dead ends: 88931 [2019-12-07 17:29:18,450 INFO L226 Difference]: Without dead ends: 88907 [2019-12-07 17:29:18,451 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:29:18,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88907 states. [2019-12-07 17:29:19,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88907 to 68768. [2019-12-07 17:29:19,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68768 states. [2019-12-07 17:29:20,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68768 states to 68768 states and 239569 transitions. [2019-12-07 17:29:20,018 INFO L78 Accepts]: Start accepts. Automaton has 68768 states and 239569 transitions. Word has length 24 [2019-12-07 17:29:20,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:20,019 INFO L462 AbstractCegarLoop]: Abstraction has 68768 states and 239569 transitions. [2019-12-07 17:29:20,019 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:29:20,019 INFO L276 IsEmpty]: Start isEmpty. Operand 68768 states and 239569 transitions. [2019-12-07 17:29:20,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 17:29:20,028 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:20,028 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:20,028 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:20,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:20,029 INFO L82 PathProgramCache]: Analyzing trace with hash 127528843, now seen corresponding path program 1 times [2019-12-07 17:29:20,029 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:20,029 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [112396515] [2019-12-07 17:29:20,029 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:20,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:20,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:20,065 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [112396515] [2019-12-07 17:29:20,066 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:20,066 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:29:20,066 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [496387755] [2019-12-07 17:29:20,066 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:29:20,066 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:20,066 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:29:20,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:20,067 INFO L87 Difference]: Start difference. First operand 68768 states and 239569 transitions. Second operand 5 states. [2019-12-07 17:29:20,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:20,585 INFO L93 Difference]: Finished difference Result 90953 states and 312676 transitions. [2019-12-07 17:29:20,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:29:20,585 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2019-12-07 17:29:20,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:20,745 INFO L225 Difference]: With dead ends: 90953 [2019-12-07 17:29:20,746 INFO L226 Difference]: Without dead ends: 90929 [2019-12-07 17:29:20,746 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:29:21,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90929 states. [2019-12-07 17:29:21,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90929 to 63934. [2019-12-07 17:29:21,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63934 states. [2019-12-07 17:29:22,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63934 states to 63934 states and 222658 transitions. [2019-12-07 17:29:22,209 INFO L78 Accepts]: Start accepts. Automaton has 63934 states and 222658 transitions. Word has length 24 [2019-12-07 17:29:22,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:22,209 INFO L462 AbstractCegarLoop]: Abstraction has 63934 states and 222658 transitions. [2019-12-07 17:29:22,209 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:29:22,209 INFO L276 IsEmpty]: Start isEmpty. Operand 63934 states and 222658 transitions. [2019-12-07 17:29:22,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:29:22,236 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:22,236 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:22,236 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:22,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:22,236 INFO L82 PathProgramCache]: Analyzing trace with hash 459682268, now seen corresponding path program 1 times [2019-12-07 17:29:22,236 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:22,237 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506754477] [2019-12-07 17:29:22,237 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:22,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:22,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:22,274 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [506754477] [2019-12-07 17:29:22,274 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:22,274 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:29:22,274 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [266223814] [2019-12-07 17:29:22,274 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:29:22,274 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:22,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:29:22,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:22,275 INFO L87 Difference]: Start difference. First operand 63934 states and 222658 transitions. Second operand 5 states. [2019-12-07 17:29:22,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:22,703 INFO L93 Difference]: Finished difference Result 85044 states and 292494 transitions. [2019-12-07 17:29:22,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:29:22,703 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 17:29:22,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:22,833 INFO L225 Difference]: With dead ends: 85044 [2019-12-07 17:29:22,833 INFO L226 Difference]: Without dead ends: 85017 [2019-12-07 17:29:22,834 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:29:23,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85017 states. [2019-12-07 17:29:23,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85017 to 70109. [2019-12-07 17:29:23,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70109 states. [2019-12-07 17:29:24,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70109 states to 70109 states and 243720 transitions. [2019-12-07 17:29:24,126 INFO L78 Accepts]: Start accepts. Automaton has 70109 states and 243720 transitions. Word has length 31 [2019-12-07 17:29:24,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:24,126 INFO L462 AbstractCegarLoop]: Abstraction has 70109 states and 243720 transitions. [2019-12-07 17:29:24,126 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:29:24,127 INFO L276 IsEmpty]: Start isEmpty. Operand 70109 states and 243720 transitions. [2019-12-07 17:29:24,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:29:24,159 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:24,159 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:24,159 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:24,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:24,160 INFO L82 PathProgramCache]: Analyzing trace with hash 1441773244, now seen corresponding path program 1 times [2019-12-07 17:29:24,160 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:24,160 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781928381] [2019-12-07 17:29:24,160 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:24,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:24,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:24,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [781928381] [2019-12-07 17:29:24,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:24,182 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:29:24,183 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [994213340] [2019-12-07 17:29:24,183 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:29:24,183 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:24,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:29:24,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:29:24,184 INFO L87 Difference]: Start difference. First operand 70109 states and 243720 transitions. Second operand 3 states. [2019-12-07 17:29:24,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:24,629 INFO L93 Difference]: Finished difference Result 99408 states and 345793 transitions. [2019-12-07 17:29:24,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:29:24,630 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 31 [2019-12-07 17:29:24,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:24,811 INFO L225 Difference]: With dead ends: 99408 [2019-12-07 17:29:24,811 INFO L226 Difference]: Without dead ends: 99408 [2019-12-07 17:29:24,812 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:29:25,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99408 states. [2019-12-07 17:29:26,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99408 to 82230. [2019-12-07 17:29:26,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82230 states. [2019-12-07 17:29:26,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82230 states to 82230 states and 286116 transitions. [2019-12-07 17:29:26,285 INFO L78 Accepts]: Start accepts. Automaton has 82230 states and 286116 transitions. Word has length 31 [2019-12-07 17:29:26,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:26,285 INFO L462 AbstractCegarLoop]: Abstraction has 82230 states and 286116 transitions. [2019-12-07 17:29:26,285 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:29:26,285 INFO L276 IsEmpty]: Start isEmpty. Operand 82230 states and 286116 transitions. [2019-12-07 17:29:26,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 17:29:26,325 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:26,325 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:26,325 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:26,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:26,325 INFO L82 PathProgramCache]: Analyzing trace with hash -1101412888, now seen corresponding path program 1 times [2019-12-07 17:29:26,326 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:26,326 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449257408] [2019-12-07 17:29:26,326 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:26,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:26,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:26,360 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449257408] [2019-12-07 17:29:26,361 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:26,361 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:29:26,361 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [824788395] [2019-12-07 17:29:26,361 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:29:26,361 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:26,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:29:26,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:26,362 INFO L87 Difference]: Start difference. First operand 82230 states and 286116 transitions. Second operand 5 states. [2019-12-07 17:29:27,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:27,009 INFO L93 Difference]: Finished difference Result 98184 states and 335926 transitions. [2019-12-07 17:29:27,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:29:27,010 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2019-12-07 17:29:27,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:27,164 INFO L225 Difference]: With dead ends: 98184 [2019-12-07 17:29:27,165 INFO L226 Difference]: Without dead ends: 98158 [2019-12-07 17:29:27,165 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:29:27,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98158 states. [2019-12-07 17:29:28,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98158 to 80206. [2019-12-07 17:29:28,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80206 states. [2019-12-07 17:29:28,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80206 states to 80206 states and 279221 transitions. [2019-12-07 17:29:28,631 INFO L78 Accepts]: Start accepts. Automaton has 80206 states and 279221 transitions. Word has length 32 [2019-12-07 17:29:28,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:28,632 INFO L462 AbstractCegarLoop]: Abstraction has 80206 states and 279221 transitions. [2019-12-07 17:29:28,632 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:29:28,632 INFO L276 IsEmpty]: Start isEmpty. Operand 80206 states and 279221 transitions. [2019-12-07 17:29:28,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 17:29:28,670 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:28,671 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:28,671 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:28,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:28,671 INFO L82 PathProgramCache]: Analyzing trace with hash -917563487, now seen corresponding path program 1 times [2019-12-07 17:29:28,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:28,671 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518673632] [2019-12-07 17:29:28,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:28,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:28,720 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:28,721 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518673632] [2019-12-07 17:29:28,721 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:28,721 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:29:28,721 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [468242489] [2019-12-07 17:29:28,721 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:29:28,721 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:28,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:29:28,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:28,721 INFO L87 Difference]: Start difference. First operand 80206 states and 279221 transitions. Second operand 5 states. [2019-12-07 17:29:29,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:29,368 INFO L93 Difference]: Finished difference Result 114657 states and 394025 transitions. [2019-12-07 17:29:29,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:29:29,368 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2019-12-07 17:29:29,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:29,581 INFO L225 Difference]: With dead ends: 114657 [2019-12-07 17:29:29,581 INFO L226 Difference]: Without dead ends: 114657 [2019-12-07 17:29:29,581 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:29:30,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114657 states. [2019-12-07 17:29:31,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114657 to 102063. [2019-12-07 17:29:31,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102063 states. [2019-12-07 17:29:31,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102063 states to 102063 states and 353591 transitions. [2019-12-07 17:29:31,498 INFO L78 Accepts]: Start accepts. Automaton has 102063 states and 353591 transitions. Word has length 32 [2019-12-07 17:29:31,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:31,498 INFO L462 AbstractCegarLoop]: Abstraction has 102063 states and 353591 transitions. [2019-12-07 17:29:31,498 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:29:31,498 INFO L276 IsEmpty]: Start isEmpty. Operand 102063 states and 353591 transitions. [2019-12-07 17:29:31,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 17:29:31,556 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:31,557 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:31,557 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:31,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:31,557 INFO L82 PathProgramCache]: Analyzing trace with hash 592862499, now seen corresponding path program 1 times [2019-12-07 17:29:31,557 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:31,557 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1040007358] [2019-12-07 17:29:31,557 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:31,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:31,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:31,602 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1040007358] [2019-12-07 17:29:31,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:31,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:29:31,602 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2089804995] [2019-12-07 17:29:31,602 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:29:31,602 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:31,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:29:31,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:31,603 INFO L87 Difference]: Start difference. First operand 102063 states and 353591 transitions. Second operand 5 states. [2019-12-07 17:29:32,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:32,525 INFO L93 Difference]: Finished difference Result 143120 states and 490601 transitions. [2019-12-07 17:29:32,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:29:32,525 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2019-12-07 17:29:32,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:32,772 INFO L225 Difference]: With dead ends: 143120 [2019-12-07 17:29:32,772 INFO L226 Difference]: Without dead ends: 143120 [2019-12-07 17:29:32,772 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:29:33,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143120 states. [2019-12-07 17:29:34,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143120 to 114391. [2019-12-07 17:29:34,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114391 states. [2019-12-07 17:29:34,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114391 states to 114391 states and 396191 transitions. [2019-12-07 17:29:34,919 INFO L78 Accepts]: Start accepts. Automaton has 114391 states and 396191 transitions. Word has length 32 [2019-12-07 17:29:34,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:34,919 INFO L462 AbstractCegarLoop]: Abstraction has 114391 states and 396191 transitions. [2019-12-07 17:29:34,920 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:29:34,920 INFO L276 IsEmpty]: Start isEmpty. Operand 114391 states and 396191 transitions. [2019-12-07 17:29:35,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:29:35,001 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:35,001 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:35,001 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:35,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:35,001 INFO L82 PathProgramCache]: Analyzing trace with hash -181451484, now seen corresponding path program 1 times [2019-12-07 17:29:35,001 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:35,001 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1407382304] [2019-12-07 17:29:35,002 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:35,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:35,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:35,302 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1407382304] [2019-12-07 17:29:35,302 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:35,302 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:29:35,302 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1314273826] [2019-12-07 17:29:35,302 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:29:35,303 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:35,303 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:29:35,303 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:29:35,303 INFO L87 Difference]: Start difference. First operand 114391 states and 396191 transitions. Second operand 4 states. [2019-12-07 17:29:35,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:35,861 INFO L93 Difference]: Finished difference Result 175983 states and 610834 transitions. [2019-12-07 17:29:35,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:29:35,862 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2019-12-07 17:29:35,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:36,166 INFO L225 Difference]: With dead ends: 175983 [2019-12-07 17:29:36,166 INFO L226 Difference]: Without dead ends: 168431 [2019-12-07 17:29:36,166 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:36,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168431 states. [2019-12-07 17:29:38,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168431 to 136541. [2019-12-07 17:29:38,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136541 states. [2019-12-07 17:29:38,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136541 states to 136541 states and 478115 transitions. [2019-12-07 17:29:38,835 INFO L78 Accepts]: Start accepts. Automaton has 136541 states and 478115 transitions. Word has length 33 [2019-12-07 17:29:38,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:38,835 INFO L462 AbstractCegarLoop]: Abstraction has 136541 states and 478115 transitions. [2019-12-07 17:29:38,835 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:29:38,835 INFO L276 IsEmpty]: Start isEmpty. Operand 136541 states and 478115 transitions. [2019-12-07 17:29:38,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:29:38,937 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:38,937 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:38,937 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:38,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:38,938 INFO L82 PathProgramCache]: Analyzing trace with hash -1932693659, now seen corresponding path program 1 times [2019-12-07 17:29:38,938 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:38,938 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1667857402] [2019-12-07 17:29:38,938 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:38,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:38,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:38,985 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1667857402] [2019-12-07 17:29:38,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:38,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:29:38,986 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [628473235] [2019-12-07 17:29:38,986 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:29:38,986 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:38,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:29:38,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:29:38,986 INFO L87 Difference]: Start difference. First operand 136541 states and 478115 transitions. Second operand 3 states. [2019-12-07 17:29:39,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:39,421 INFO L93 Difference]: Finished difference Result 132328 states and 461391 transitions. [2019-12-07 17:29:39,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:29:39,422 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-12-07 17:29:39,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:39,667 INFO L225 Difference]: With dead ends: 132328 [2019-12-07 17:29:39,667 INFO L226 Difference]: Without dead ends: 132328 [2019-12-07 17:29:39,668 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:29:40,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132328 states. [2019-12-07 17:29:41,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132328 to 123941. [2019-12-07 17:29:41,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123941 states. [2019-12-07 17:29:41,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123941 states to 123941 states and 432292 transitions. [2019-12-07 17:29:41,949 INFO L78 Accepts]: Start accepts. Automaton has 123941 states and 432292 transitions. Word has length 33 [2019-12-07 17:29:41,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:41,949 INFO L462 AbstractCegarLoop]: Abstraction has 123941 states and 432292 transitions. [2019-12-07 17:29:41,949 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:29:41,949 INFO L276 IsEmpty]: Start isEmpty. Operand 123941 states and 432292 transitions. [2019-12-07 17:29:42,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:29:42,045 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:42,045 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:42,045 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:42,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:42,045 INFO L82 PathProgramCache]: Analyzing trace with hash 1080944817, now seen corresponding path program 1 times [2019-12-07 17:29:42,045 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:42,045 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742749915] [2019-12-07 17:29:42,045 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:42,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:42,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:42,084 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [742749915] [2019-12-07 17:29:42,084 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:42,084 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:29:42,084 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [472182074] [2019-12-07 17:29:42,084 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:29:42,084 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:42,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:29:42,085 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:42,085 INFO L87 Difference]: Start difference. First operand 123941 states and 432292 transitions. Second operand 5 states. [2019-12-07 17:29:42,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:42,340 INFO L93 Difference]: Finished difference Result 68809 states and 247678 transitions. [2019-12-07 17:29:42,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:29:42,341 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2019-12-07 17:29:42,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:42,463 INFO L225 Difference]: With dead ends: 68809 [2019-12-07 17:29:42,463 INFO L226 Difference]: Without dead ends: 68809 [2019-12-07 17:29:42,464 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:42,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68809 states. [2019-12-07 17:29:43,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68809 to 53817. [2019-12-07 17:29:43,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53817 states. [2019-12-07 17:29:43,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53817 states to 53817 states and 187789 transitions. [2019-12-07 17:29:43,470 INFO L78 Accepts]: Start accepts. Automaton has 53817 states and 187789 transitions. Word has length 33 [2019-12-07 17:29:43,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:43,471 INFO L462 AbstractCegarLoop]: Abstraction has 53817 states and 187789 transitions. [2019-12-07 17:29:43,471 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:29:43,471 INFO L276 IsEmpty]: Start isEmpty. Operand 53817 states and 187789 transitions. [2019-12-07 17:29:43,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 17:29:43,538 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:43,538 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:43,538 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:43,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:43,539 INFO L82 PathProgramCache]: Analyzing trace with hash 301569509, now seen corresponding path program 1 times [2019-12-07 17:29:43,539 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:43,539 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1774469169] [2019-12-07 17:29:43,539 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:43,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:43,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:43,593 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1774469169] [2019-12-07 17:29:43,593 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:43,593 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:29:43,593 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [326988771] [2019-12-07 17:29:43,593 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:29:43,593 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:43,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:29:43,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:29:43,594 INFO L87 Difference]: Start difference. First operand 53817 states and 187789 transitions. Second operand 6 states. [2019-12-07 17:29:44,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:44,228 INFO L93 Difference]: Finished difference Result 65494 states and 225148 transitions. [2019-12-07 17:29:44,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:29:44,228 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 17:29:44,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:44,335 INFO L225 Difference]: With dead ends: 65494 [2019-12-07 17:29:44,335 INFO L226 Difference]: Without dead ends: 65402 [2019-12-07 17:29:44,335 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:29:44,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65402 states. [2019-12-07 17:29:45,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65402 to 54481. [2019-12-07 17:29:45,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54481 states. [2019-12-07 17:29:45,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54481 states to 54481 states and 190010 transitions. [2019-12-07 17:29:45,340 INFO L78 Accepts]: Start accepts. Automaton has 54481 states and 190010 transitions. Word has length 43 [2019-12-07 17:29:45,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:45,340 INFO L462 AbstractCegarLoop]: Abstraction has 54481 states and 190010 transitions. [2019-12-07 17:29:45,340 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:29:45,340 INFO L276 IsEmpty]: Start isEmpty. Operand 54481 states and 190010 transitions. [2019-12-07 17:29:45,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 17:29:45,409 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:45,409 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:45,410 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:45,410 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:45,410 INFO L82 PathProgramCache]: Analyzing trace with hash 1643904346, now seen corresponding path program 1 times [2019-12-07 17:29:45,410 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:45,410 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262760502] [2019-12-07 17:29:45,410 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:45,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:45,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:45,445 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [262760502] [2019-12-07 17:29:45,445 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:45,445 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:29:45,445 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1022278587] [2019-12-07 17:29:45,446 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:29:45,446 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:45,446 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:29:45,446 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:29:45,446 INFO L87 Difference]: Start difference. First operand 54481 states and 190010 transitions. Second operand 4 states. [2019-12-07 17:29:45,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:45,710 INFO L93 Difference]: Finished difference Result 91331 states and 319682 transitions. [2019-12-07 17:29:45,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:29:45,710 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 43 [2019-12-07 17:29:45,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:45,786 INFO L225 Difference]: With dead ends: 91331 [2019-12-07 17:29:45,786 INFO L226 Difference]: Without dead ends: 46260 [2019-12-07 17:29:45,786 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:45,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46260 states. [2019-12-07 17:29:46,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46260 to 46022. [2019-12-07 17:29:46,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46022 states. [2019-12-07 17:29:46,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46022 states to 46022 states and 160392 transitions. [2019-12-07 17:29:46,495 INFO L78 Accepts]: Start accepts. Automaton has 46022 states and 160392 transitions. Word has length 43 [2019-12-07 17:29:46,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:46,495 INFO L462 AbstractCegarLoop]: Abstraction has 46022 states and 160392 transitions. [2019-12-07 17:29:46,495 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:29:46,495 INFO L276 IsEmpty]: Start isEmpty. Operand 46022 states and 160392 transitions. [2019-12-07 17:29:46,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 17:29:46,691 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:46,692 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:46,692 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:46,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:46,692 INFO L82 PathProgramCache]: Analyzing trace with hash -1477031722, now seen corresponding path program 2 times [2019-12-07 17:29:46,692 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:46,692 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1573783317] [2019-12-07 17:29:46,692 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:46,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:46,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:46,722 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1573783317] [2019-12-07 17:29:46,722 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:46,722 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:29:46,722 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [171965001] [2019-12-07 17:29:46,722 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:29:46,722 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:46,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:29:46,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:29:46,722 INFO L87 Difference]: Start difference. First operand 46022 states and 160392 transitions. Second operand 3 states. [2019-12-07 17:29:46,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:46,835 INFO L93 Difference]: Finished difference Result 39004 states and 134034 transitions. [2019-12-07 17:29:46,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:29:46,836 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 43 [2019-12-07 17:29:46,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:46,896 INFO L225 Difference]: With dead ends: 39004 [2019-12-07 17:29:46,896 INFO L226 Difference]: Without dead ends: 39004 [2019-12-07 17:29:46,896 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:29:47,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39004 states. [2019-12-07 17:29:47,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39004 to 37975. [2019-12-07 17:29:47,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37975 states. [2019-12-07 17:29:47,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37975 states to 37975 states and 130835 transitions. [2019-12-07 17:29:47,471 INFO L78 Accepts]: Start accepts. Automaton has 37975 states and 130835 transitions. Word has length 43 [2019-12-07 17:29:47,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:47,471 INFO L462 AbstractCegarLoop]: Abstraction has 37975 states and 130835 transitions. [2019-12-07 17:29:47,471 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:29:47,471 INFO L276 IsEmpty]: Start isEmpty. Operand 37975 states and 130835 transitions. [2019-12-07 17:29:47,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 17:29:47,510 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:47,510 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:47,510 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:47,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:47,510 INFO L82 PathProgramCache]: Analyzing trace with hash -925128929, now seen corresponding path program 1 times [2019-12-07 17:29:47,510 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:47,510 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [368267624] [2019-12-07 17:29:47,510 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:47,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:47,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:47,557 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [368267624] [2019-12-07 17:29:47,557 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:47,557 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:29:47,557 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1833830287] [2019-12-07 17:29:47,557 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:29:47,557 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:47,558 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:29:47,558 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:29:47,558 INFO L87 Difference]: Start difference. First operand 37975 states and 130835 transitions. Second operand 6 states. [2019-12-07 17:29:47,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:47,936 INFO L93 Difference]: Finished difference Result 43806 states and 148028 transitions. [2019-12-07 17:29:47,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 17:29:47,937 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2019-12-07 17:29:47,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:47,998 INFO L225 Difference]: With dead ends: 43806 [2019-12-07 17:29:47,998 INFO L226 Difference]: Without dead ends: 43714 [2019-12-07 17:29:47,998 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:29:48,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43714 states. [2019-12-07 17:29:48,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43714 to 35924. [2019-12-07 17:29:48,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35924 states. [2019-12-07 17:29:48,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35924 states to 35924 states and 124360 transitions. [2019-12-07 17:29:48,609 INFO L78 Accepts]: Start accepts. Automaton has 35924 states and 124360 transitions. Word has length 44 [2019-12-07 17:29:48,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:48,609 INFO L462 AbstractCegarLoop]: Abstraction has 35924 states and 124360 transitions. [2019-12-07 17:29:48,609 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:29:48,609 INFO L276 IsEmpty]: Start isEmpty. Operand 35924 states and 124360 transitions. [2019-12-07 17:29:48,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 17:29:48,646 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:48,647 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:48,647 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:48,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:48,647 INFO L82 PathProgramCache]: Analyzing trace with hash -45425920, now seen corresponding path program 1 times [2019-12-07 17:29:48,647 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:48,647 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187009069] [2019-12-07 17:29:48,647 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:48,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:48,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:48,684 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187009069] [2019-12-07 17:29:48,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:48,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:29:48,685 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54349686] [2019-12-07 17:29:48,685 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:29:48,685 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:48,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:29:48,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:29:48,685 INFO L87 Difference]: Start difference. First operand 35924 states and 124360 transitions. Second operand 6 states. [2019-12-07 17:29:48,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:48,811 INFO L93 Difference]: Finished difference Result 34037 states and 119834 transitions. [2019-12-07 17:29:48,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:29:48,811 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2019-12-07 17:29:48,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:48,859 INFO L225 Difference]: With dead ends: 34037 [2019-12-07 17:29:48,859 INFO L226 Difference]: Without dead ends: 31925 [2019-12-07 17:29:48,859 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:29:48,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31925 states. [2019-12-07 17:29:49,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31925 to 22456. [2019-12-07 17:29:49,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22456 states. [2019-12-07 17:29:49,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22456 states to 22456 states and 83042 transitions. [2019-12-07 17:29:49,290 INFO L78 Accepts]: Start accepts. Automaton has 22456 states and 83042 transitions. Word has length 44 [2019-12-07 17:29:49,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:49,290 INFO L462 AbstractCegarLoop]: Abstraction has 22456 states and 83042 transitions. [2019-12-07 17:29:49,290 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:29:49,290 INFO L276 IsEmpty]: Start isEmpty. Operand 22456 states and 83042 transitions. [2019-12-07 17:29:49,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:29:49,315 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:49,315 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:49,315 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:49,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:49,315 INFO L82 PathProgramCache]: Analyzing trace with hash 755425574, now seen corresponding path program 1 times [2019-12-07 17:29:49,315 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:49,315 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089274432] [2019-12-07 17:29:49,315 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:49,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:49,347 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:49,347 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089274432] [2019-12-07 17:29:49,347 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:49,347 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:29:49,347 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [285229065] [2019-12-07 17:29:49,347 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:29:49,348 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:49,348 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:29:49,348 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:29:49,348 INFO L87 Difference]: Start difference. First operand 22456 states and 83042 transitions. Second operand 4 states. [2019-12-07 17:29:49,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:49,504 INFO L93 Difference]: Finished difference Result 31267 states and 111215 transitions. [2019-12-07 17:29:49,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:29:49,505 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2019-12-07 17:29:49,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:49,538 INFO L225 Difference]: With dead ends: 31267 [2019-12-07 17:29:49,538 INFO L226 Difference]: Without dead ends: 20124 [2019-12-07 17:29:49,538 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:49,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20124 states. [2019-12-07 17:29:49,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20124 to 20124. [2019-12-07 17:29:49,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20124 states. [2019-12-07 17:29:49,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20124 states to 20124 states and 73222 transitions. [2019-12-07 17:29:49,867 INFO L78 Accepts]: Start accepts. Automaton has 20124 states and 73222 transitions. Word has length 59 [2019-12-07 17:29:49,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:49,867 INFO L462 AbstractCegarLoop]: Abstraction has 20124 states and 73222 transitions. [2019-12-07 17:29:49,867 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:29:49,867 INFO L276 IsEmpty]: Start isEmpty. Operand 20124 states and 73222 transitions. [2019-12-07 17:29:49,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:29:49,888 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:49,888 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:49,888 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:49,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:49,889 INFO L82 PathProgramCache]: Analyzing trace with hash 696293578, now seen corresponding path program 2 times [2019-12-07 17:29:49,889 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:49,889 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254250656] [2019-12-07 17:29:49,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:49,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:49,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:49,943 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254250656] [2019-12-07 17:29:49,943 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:49,943 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:29:49,943 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1482842792] [2019-12-07 17:29:49,943 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:29:49,943 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:49,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:29:49,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:29:49,944 INFO L87 Difference]: Start difference. First operand 20124 states and 73222 transitions. Second operand 5 states. [2019-12-07 17:29:50,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:50,040 INFO L93 Difference]: Finished difference Result 27370 states and 96605 transitions. [2019-12-07 17:29:50,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:29:50,040 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 59 [2019-12-07 17:29:50,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:50,049 INFO L225 Difference]: With dead ends: 27370 [2019-12-07 17:29:50,049 INFO L226 Difference]: Without dead ends: 7800 [2019-12-07 17:29:50,049 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:29:50,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7800 states. [2019-12-07 17:29:50,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7800 to 7800. [2019-12-07 17:29:50,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7800 states. [2019-12-07 17:29:50,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7800 states to 7800 states and 24895 transitions. [2019-12-07 17:29:50,157 INFO L78 Accepts]: Start accepts. Automaton has 7800 states and 24895 transitions. Word has length 59 [2019-12-07 17:29:50,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:50,158 INFO L462 AbstractCegarLoop]: Abstraction has 7800 states and 24895 transitions. [2019-12-07 17:29:50,158 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:29:50,158 INFO L276 IsEmpty]: Start isEmpty. Operand 7800 states and 24895 transitions. [2019-12-07 17:29:50,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:29:50,164 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:50,164 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:50,164 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:50,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:50,165 INFO L82 PathProgramCache]: Analyzing trace with hash 1949196794, now seen corresponding path program 3 times [2019-12-07 17:29:50,165 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:50,165 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1645459061] [2019-12-07 17:29:50,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:50,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:50,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:50,279 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1645459061] [2019-12-07 17:29:50,279 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:50,279 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:29:50,280 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1566965968] [2019-12-07 17:29:50,280 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:29:50,280 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:50,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:29:50,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:29:50,280 INFO L87 Difference]: Start difference. First operand 7800 states and 24895 transitions. Second operand 10 states. [2019-12-07 17:29:51,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:51,004 INFO L93 Difference]: Finished difference Result 15593 states and 48625 transitions. [2019-12-07 17:29:51,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 17:29:51,004 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 59 [2019-12-07 17:29:51,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:51,015 INFO L225 Difference]: With dead ends: 15593 [2019-12-07 17:29:51,015 INFO L226 Difference]: Without dead ends: 10260 [2019-12-07 17:29:51,015 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2019-12-07 17:29:51,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10260 states. [2019-12-07 17:29:51,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10260 to 9486. [2019-12-07 17:29:51,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9486 states. [2019-12-07 17:29:51,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9486 states to 9486 states and 29718 transitions. [2019-12-07 17:29:51,144 INFO L78 Accepts]: Start accepts. Automaton has 9486 states and 29718 transitions. Word has length 59 [2019-12-07 17:29:51,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:51,144 INFO L462 AbstractCegarLoop]: Abstraction has 9486 states and 29718 transitions. [2019-12-07 17:29:51,144 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:29:51,144 INFO L276 IsEmpty]: Start isEmpty. Operand 9486 states and 29718 transitions. [2019-12-07 17:29:51,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:29:51,152 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:51,152 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:51,152 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:51,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:51,152 INFO L82 PathProgramCache]: Analyzing trace with hash -1854145516, now seen corresponding path program 4 times [2019-12-07 17:29:51,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:51,152 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [909458372] [2019-12-07 17:29:51,152 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:51,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:51,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:51,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [909458372] [2019-12-07 17:29:51,453 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:51,454 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:29:51,454 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1481387773] [2019-12-07 17:29:51,454 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:29:51,454 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:51,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:29:51,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:29:51,455 INFO L87 Difference]: Start difference. First operand 9486 states and 29718 transitions. Second operand 15 states. [2019-12-07 17:29:52,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:52,949 INFO L93 Difference]: Finished difference Result 13811 states and 42136 transitions. [2019-12-07 17:29:52,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 17:29:52,950 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 59 [2019-12-07 17:29:52,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:52,962 INFO L225 Difference]: With dead ends: 13811 [2019-12-07 17:29:52,962 INFO L226 Difference]: Without dead ends: 12149 [2019-12-07 17:29:52,963 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 290 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=197, Invalid=1063, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 17:29:53,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12149 states. [2019-12-07 17:29:53,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12149 to 9870. [2019-12-07 17:29:53,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9870 states. [2019-12-07 17:29:53,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9870 states to 9870 states and 30560 transitions. [2019-12-07 17:29:53,105 INFO L78 Accepts]: Start accepts. Automaton has 9870 states and 30560 transitions. Word has length 59 [2019-12-07 17:29:53,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:53,105 INFO L462 AbstractCegarLoop]: Abstraction has 9870 states and 30560 transitions. [2019-12-07 17:29:53,105 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:29:53,105 INFO L276 IsEmpty]: Start isEmpty. Operand 9870 states and 30560 transitions. [2019-12-07 17:29:53,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:29:53,113 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:53,113 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:53,113 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:53,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:53,114 INFO L82 PathProgramCache]: Analyzing trace with hash -448038556, now seen corresponding path program 5 times [2019-12-07 17:29:53,114 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:53,114 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1080634415] [2019-12-07 17:29:53,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:53,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:53,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:53,436 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1080634415] [2019-12-07 17:29:53,436 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:53,436 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:29:53,437 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2081790767] [2019-12-07 17:29:53,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:29:53,437 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:53,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:29:53,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:29:53,437 INFO L87 Difference]: Start difference. First operand 9870 states and 30560 transitions. Second operand 15 states. [2019-12-07 17:29:55,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:55,329 INFO L93 Difference]: Finished difference Result 15389 states and 47123 transitions. [2019-12-07 17:29:55,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 17:29:55,329 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 59 [2019-12-07 17:29:55,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:55,344 INFO L225 Difference]: With dead ends: 15389 [2019-12-07 17:29:55,344 INFO L226 Difference]: Without dead ends: 15075 [2019-12-07 17:29:55,345 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 679 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=416, Invalid=2236, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 17:29:55,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15075 states. [2019-12-07 17:29:55,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15075 to 13094. [2019-12-07 17:29:55,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13094 states. [2019-12-07 17:29:55,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13094 states to 13094 states and 40533 transitions. [2019-12-07 17:29:55,533 INFO L78 Accepts]: Start accepts. Automaton has 13094 states and 40533 transitions. Word has length 59 [2019-12-07 17:29:55,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:55,533 INFO L462 AbstractCegarLoop]: Abstraction has 13094 states and 40533 transitions. [2019-12-07 17:29:55,533 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:29:55,533 INFO L276 IsEmpty]: Start isEmpty. Operand 13094 states and 40533 transitions. [2019-12-07 17:29:55,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:29:55,545 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:55,545 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:55,545 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:55,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:55,545 INFO L82 PathProgramCache]: Analyzing trace with hash 369067236, now seen corresponding path program 6 times [2019-12-07 17:29:55,546 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:55,546 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316141686] [2019-12-07 17:29:55,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:55,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:55,808 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:55,808 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1316141686] [2019-12-07 17:29:55,808 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:55,808 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:29:55,808 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [583313149] [2019-12-07 17:29:55,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:29:55,808 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:55,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:29:55,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:29:55,809 INFO L87 Difference]: Start difference. First operand 13094 states and 40533 transitions. Second operand 15 states. [2019-12-07 17:29:56,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:56,878 INFO L93 Difference]: Finished difference Result 17092 states and 52017 transitions. [2019-12-07 17:29:56,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 17:29:56,879 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 59 [2019-12-07 17:29:56,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:56,894 INFO L225 Difference]: With dead ends: 17092 [2019-12-07 17:29:56,894 INFO L226 Difference]: Without dead ends: 14582 [2019-12-07 17:29:56,895 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 307 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=230, Invalid=1102, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 17:29:56,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14582 states. [2019-12-07 17:29:57,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14582 to 12773. [2019-12-07 17:29:57,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12773 states. [2019-12-07 17:29:57,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12773 states to 12773 states and 39706 transitions. [2019-12-07 17:29:57,095 INFO L78 Accepts]: Start accepts. Automaton has 12773 states and 39706 transitions. Word has length 59 [2019-12-07 17:29:57,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:57,095 INFO L462 AbstractCegarLoop]: Abstraction has 12773 states and 39706 transitions. [2019-12-07 17:29:57,095 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:29:57,095 INFO L276 IsEmpty]: Start isEmpty. Operand 12773 states and 39706 transitions. [2019-12-07 17:29:57,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:29:57,107 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:57,107 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:57,107 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:57,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:57,107 INFO L82 PathProgramCache]: Analyzing trace with hash -1277650624, now seen corresponding path program 7 times [2019-12-07 17:29:57,107 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:57,108 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [730694996] [2019-12-07 17:29:57,108 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:57,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:57,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:57,227 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [730694996] [2019-12-07 17:29:57,227 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:57,227 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:29:57,228 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [576771334] [2019-12-07 17:29:57,228 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:29:57,228 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:57,228 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:29:57,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:29:57,228 INFO L87 Difference]: Start difference. First operand 12773 states and 39706 transitions. Second operand 11 states. [2019-12-07 17:29:58,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:58,013 INFO L93 Difference]: Finished difference Result 18126 states and 55737 transitions. [2019-12-07 17:29:58,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 17:29:58,014 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 17:29:58,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:58,028 INFO L225 Difference]: With dead ends: 18126 [2019-12-07 17:29:58,029 INFO L226 Difference]: Without dead ends: 13731 [2019-12-07 17:29:58,029 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=87, Invalid=419, Unknown=0, NotChecked=0, Total=506 [2019-12-07 17:29:58,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13731 states. [2019-12-07 17:29:58,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13731 to 12549. [2019-12-07 17:29:58,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12549 states. [2019-12-07 17:29:58,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12549 states to 12549 states and 38980 transitions. [2019-12-07 17:29:58,210 INFO L78 Accepts]: Start accepts. Automaton has 12549 states and 38980 transitions. Word has length 59 [2019-12-07 17:29:58,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:58,210 INFO L462 AbstractCegarLoop]: Abstraction has 12549 states and 38980 transitions. [2019-12-07 17:29:58,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:29:58,210 INFO L276 IsEmpty]: Start isEmpty. Operand 12549 states and 38980 transitions. [2019-12-07 17:29:58,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:29:58,221 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:58,221 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:58,221 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:58,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:58,222 INFO L82 PathProgramCache]: Analyzing trace with hash 22853442, now seen corresponding path program 8 times [2019-12-07 17:29:58,222 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:58,222 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1357372146] [2019-12-07 17:29:58,222 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:58,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:58,320 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:58,320 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1357372146] [2019-12-07 17:29:58,320 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:58,320 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:29:58,320 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1006734214] [2019-12-07 17:29:58,321 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:29:58,321 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:58,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:29:58,321 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:29:58,321 INFO L87 Difference]: Start difference. First operand 12549 states and 38980 transitions. Second operand 10 states. [2019-12-07 17:29:58,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:58,723 INFO L93 Difference]: Finished difference Result 16928 states and 52126 transitions. [2019-12-07 17:29:58,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 17:29:58,724 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 59 [2019-12-07 17:29:58,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:58,735 INFO L225 Difference]: With dead ends: 16928 [2019-12-07 17:29:58,735 INFO L226 Difference]: Without dead ends: 11203 [2019-12-07 17:29:58,735 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 138 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=560, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:29:58,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11203 states. [2019-12-07 17:29:58,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11203 to 9717. [2019-12-07 17:29:58,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9717 states. [2019-12-07 17:29:58,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9717 states to 9717 states and 30078 transitions. [2019-12-07 17:29:58,872 INFO L78 Accepts]: Start accepts. Automaton has 9717 states and 30078 transitions. Word has length 59 [2019-12-07 17:29:58,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:58,872 INFO L462 AbstractCegarLoop]: Abstraction has 9717 states and 30078 transitions. [2019-12-07 17:29:58,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:29:58,872 INFO L276 IsEmpty]: Start isEmpty. Operand 9717 states and 30078 transitions. [2019-12-07 17:29:58,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:29:58,880 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:58,880 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:58,880 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:58,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:58,880 INFO L82 PathProgramCache]: Analyzing trace with hash 1656101628, now seen corresponding path program 9 times [2019-12-07 17:29:58,880 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:58,880 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241055309] [2019-12-07 17:29:58,880 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:58,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:58,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:58,995 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241055309] [2019-12-07 17:29:58,995 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:58,995 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:29:58,995 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [547506075] [2019-12-07 17:29:58,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:29:58,995 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:58,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:29:58,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:29:58,996 INFO L87 Difference]: Start difference. First operand 9717 states and 30078 transitions. Second operand 11 states. [2019-12-07 17:29:59,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:29:59,415 INFO L93 Difference]: Finished difference Result 13450 states and 41615 transitions. [2019-12-07 17:29:59,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 17:29:59,416 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 17:29:59,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:29:59,430 INFO L225 Difference]: With dead ends: 13450 [2019-12-07 17:29:59,430 INFO L226 Difference]: Without dead ends: 13140 [2019-12-07 17:29:59,430 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 125 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=130, Invalid=572, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:29:59,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13140 states. [2019-12-07 17:29:59,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13140 to 12468. [2019-12-07 17:29:59,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12468 states. [2019-12-07 17:29:59,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12468 states to 12468 states and 38722 transitions. [2019-12-07 17:29:59,615 INFO L78 Accepts]: Start accepts. Automaton has 12468 states and 38722 transitions. Word has length 59 [2019-12-07 17:29:59,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:29:59,615 INFO L462 AbstractCegarLoop]: Abstraction has 12468 states and 38722 transitions. [2019-12-07 17:29:59,615 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:29:59,615 INFO L276 IsEmpty]: Start isEmpty. Operand 12468 states and 38722 transitions. [2019-12-07 17:29:59,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:29:59,626 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:29:59,626 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:29:59,626 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:29:59,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:29:59,627 INFO L82 PathProgramCache]: Analyzing trace with hash -1821759876, now seen corresponding path program 10 times [2019-12-07 17:29:59,627 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:29:59,627 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1770848463] [2019-12-07 17:29:59,627 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:29:59,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:29:59,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:29:59,724 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1770848463] [2019-12-07 17:29:59,724 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:29:59,724 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:29:59,724 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1428020136] [2019-12-07 17:29:59,725 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:29:59,725 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:29:59,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:29:59,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:29:59,725 INFO L87 Difference]: Start difference. First operand 12468 states and 38722 transitions. Second operand 11 states. [2019-12-07 17:30:00,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:00,155 INFO L93 Difference]: Finished difference Result 13694 states and 41839 transitions. [2019-12-07 17:30:00,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 17:30:00,155 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 17:30:00,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:00,164 INFO L225 Difference]: With dead ends: 13694 [2019-12-07 17:30:00,165 INFO L226 Difference]: Without dead ends: 10155 [2019-12-07 17:30:00,165 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=122, Invalid=478, Unknown=0, NotChecked=0, Total=600 [2019-12-07 17:30:00,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10155 states. [2019-12-07 17:30:00,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10155 to 9365. [2019-12-07 17:30:00,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9365 states. [2019-12-07 17:30:00,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9365 states to 9365 states and 28995 transitions. [2019-12-07 17:30:00,288 INFO L78 Accepts]: Start accepts. Automaton has 9365 states and 28995 transitions. Word has length 59 [2019-12-07 17:30:00,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:00,288 INFO L462 AbstractCegarLoop]: Abstraction has 9365 states and 28995 transitions. [2019-12-07 17:30:00,288 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:30:00,289 INFO L276 IsEmpty]: Start isEmpty. Operand 9365 states and 28995 transitions. [2019-12-07 17:30:00,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:30:00,296 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:00,296 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:00,296 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:00,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:00,296 INFO L82 PathProgramCache]: Analyzing trace with hash 1556260520, now seen corresponding path program 11 times [2019-12-07 17:30:00,296 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:00,296 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970145641] [2019-12-07 17:30:00,296 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:00,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:00,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:00,422 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [970145641] [2019-12-07 17:30:00,423 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:00,423 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 17:30:00,423 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [610809366] [2019-12-07 17:30:00,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:30:00,423 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:00,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:30:00,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:30:00,423 INFO L87 Difference]: Start difference. First operand 9365 states and 28995 transitions. Second operand 13 states. [2019-12-07 17:30:01,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:01,256 INFO L93 Difference]: Finished difference Result 10649 states and 32327 transitions. [2019-12-07 17:30:01,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 17:30:01,257 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 59 [2019-12-07 17:30:01,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:01,274 INFO L225 Difference]: With dead ends: 10649 [2019-12-07 17:30:01,274 INFO L226 Difference]: Without dead ends: 10027 [2019-12-07 17:30:01,275 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=107, Invalid=445, Unknown=0, NotChecked=0, Total=552 [2019-12-07 17:30:01,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10027 states. [2019-12-07 17:30:01,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10027 to 9033. [2019-12-07 17:30:01,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9033 states. [2019-12-07 17:30:01,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9033 states to 9033 states and 28086 transitions. [2019-12-07 17:30:01,403 INFO L78 Accepts]: Start accepts. Automaton has 9033 states and 28086 transitions. Word has length 59 [2019-12-07 17:30:01,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:01,403 INFO L462 AbstractCegarLoop]: Abstraction has 9033 states and 28086 transitions. [2019-12-07 17:30:01,403 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:30:01,403 INFO L276 IsEmpty]: Start isEmpty. Operand 9033 states and 28086 transitions. [2019-12-07 17:30:01,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:30:01,413 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:01,413 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:01,413 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:01,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:01,413 INFO L82 PathProgramCache]: Analyzing trace with hash -765256248, now seen corresponding path program 12 times [2019-12-07 17:30:01,413 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:01,414 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1543952910] [2019-12-07 17:30:01,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:01,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:30:01,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:30:01,489 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:30:01,489 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:30:01,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] ULTIMATE.startENTRY-->L850: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= 0 v_~y$r_buff1_thd4~0_204) (= 0 v_~y$read_delayed_var~0.offset_8) (= v_~main$tmp_guard1~0_50 0) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t957~0.base_26| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t957~0.base_26|) |v_ULTIMATE.start_main_~#t957~0.offset_17| 0)) |v_#memory_int_27|) (= v_~a~0_15 0) (= 0 v_~y$w_buff0~0_524) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t957~0.base_26|) (= 0 v_~y$r_buff0_thd3~0_184) (= v_~y$read_delayed~0_7 0) (= 0 v_~y$r_buff0_thd4~0_132) (= v_~y$w_buff0_used~0_906 0) (= |v_#NULL.offset_3| 0) (= v_~weak$$choice2~0_152 0) (= v_~y$r_buff1_thd0~0_180 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t957~0.base_26|)) (= 0 v_~__unbuffered_p0_EAX~0_69) (= 0 v_~y$r_buff0_thd2~0_313) (= v_~y~0_171 0) (= v_~x~0_48 0) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t957~0.base_26| 4)) (= v_~y$mem_tmp~0_33 0) (= 0 v_~__unbuffered_p1_EAX~0_59) (= 0 v_~__unbuffered_p3_EAX~0_47) (= 0 v_~__unbuffered_p3_EBX~0_47) (= 0 v_~weak$$choice0~0_21) (= |v_ULTIMATE.start_main_~#t957~0.offset_17| 0) (= 0 v_~__unbuffered_p2_EAX~0_124) (= 0 v_~y$flush_delayed~0_62) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t957~0.base_26| 1)) (= 0 v_~y$r_buff1_thd1~0_92) (< 0 |v_#StackHeapBarrier_20|) (= v_~y$w_buff1~0_331 0) (= v_~z~0_40 0) (= 0 |v_#NULL.base_3|) (= v_~y$r_buff0_thd0~0_125 0) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~y$r_buff1_thd2~0_274) (= v_~__unbuffered_cnt~0_218 0) (= v_~y$r_buff0_thd1~0_33 0) (= v_~b~0_43 0) (= 0 v_~y$r_buff1_thd3~0_153) (= v_~y$w_buff1_used~0_620 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_28|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_97|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_38|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_200|, ULTIMATE.start_main_~#t959~0.base=|v_ULTIMATE.start_main_~#t959~0.base_26|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_15, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_69, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_153, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_59, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_62, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_47, #length=|v_#length_29|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_124, ULTIMATE.start_main_~#t959~0.offset=|v_ULTIMATE.start_main_~#t959~0.offset_19|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_28|, ULTIMATE.start_main_~#t960~0.base=|v_ULTIMATE.start_main_~#t960~0.base_24|, ULTIMATE.start_main_~#t960~0.offset=|v_ULTIMATE.start_main_~#t960~0.offset_17|, ~weak$$choice0~0=v_~weak$$choice0~0_21, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_204, ~y$w_buff1~0=v_~y$w_buff1~0_331, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_313, ULTIMATE.start_main_~#t957~0.offset=|v_ULTIMATE.start_main_~#t957~0.offset_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_218, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_180, ~x~0=v_~x~0_48, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_906, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_38|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_40|, ULTIMATE.start_main_~#t958~0.offset=|v_ULTIMATE.start_main_~#t958~0.offset_19|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_62|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_92, ~y$w_buff0~0=v_~y$w_buff0~0_524, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_184, ULTIMATE.start_main_~#t958~0.base=|v_ULTIMATE.start_main_~#t958~0.base_25|, ~y~0=v_~y~0_171, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_47, #NULL.base=|v_#NULL.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_274, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_132, ~b~0=v_~b~0_43, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_34|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_125, #valid=|v_#valid_80|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_40, ~weak$$choice2~0=v_~weak$$choice2~0_152, ULTIMATE.start_main_~#t957~0.base=|v_ULTIMATE.start_main_~#t957~0.base_26|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_620} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t959~0.base, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t959~0.offset, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t960~0.base, ULTIMATE.start_main_~#t960~0.offset, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_~#t957~0.offset, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t958~0.offset, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t958~0.base, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ~b~0, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t957~0.base, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:30:01,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L850-1-->L852: Formula: (and (= (select |v_#valid_43| |v_ULTIMATE.start_main_~#t958~0.base_12|) 0) (not (= |v_ULTIMATE.start_main_~#t958~0.base_12| 0)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t958~0.base_12| 4)) (= 0 |v_ULTIMATE.start_main_~#t958~0.offset_11|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t958~0.base_12| 1)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t958~0.base_12|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t958~0.base_12| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t958~0.base_12|) |v_ULTIMATE.start_main_~#t958~0.offset_11| 1)) |v_#memory_int_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t958~0.base=|v_ULTIMATE.start_main_~#t958~0.base_12|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_21|, ULTIMATE.start_main_~#t958~0.offset=|v_ULTIMATE.start_main_~#t958~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t958~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t958~0.offset] because there is no mapped edge [2019-12-07 17:30:01,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L852-1-->L854: Formula: (and (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t959~0.base_13| 1) |v_#valid_40|) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t959~0.base_13| 4) |v_#length_19|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t959~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t959~0.offset_11|) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t959~0.base_13|) 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t959~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t959~0.base_13|) |v_ULTIMATE.start_main_~#t959~0.offset_11| 2)) |v_#memory_int_17|) (not (= |v_ULTIMATE.start_main_~#t959~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t959~0.offset=|v_ULTIMATE.start_main_~#t959~0.offset_11|, ULTIMATE.start_main_~#t959~0.base=|v_ULTIMATE.start_main_~#t959~0.base_13|} AuxVars[] AssignedVars[#valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t959~0.offset, ULTIMATE.start_main_~#t959~0.base] because there is no mapped edge [2019-12-07 17:30:01,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L854-1-->L856: Formula: (and (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t960~0.base_12|) (= |v_ULTIMATE.start_main_~#t960~0.offset_10| 0) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t960~0.base_12| 1)) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t960~0.base_12|) 0) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t960~0.base_12| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t960~0.base_12|) |v_ULTIMATE.start_main_~#t960~0.offset_10| 3))) (not (= 0 |v_ULTIMATE.start_main_~#t960~0.base_12|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t960~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ULTIMATE.start_main_~#t960~0.base=|v_ULTIMATE.start_main_~#t960~0.base_12|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_21|, #length=|v_#length_23|, ULTIMATE.start_main_~#t960~0.offset=|v_ULTIMATE.start_main_~#t960~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t960~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t960~0.offset] because there is no mapped edge [2019-12-07 17:30:01,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L4-->L801: Formula: (and (= v_~z~0_12 v_~__unbuffered_p2_EAX~0_13) (= v_~y$r_buff0_thd0~0_41 v_~y$r_buff1_thd0~0_36) (= v_~y$r_buff0_thd3~0_35 v_~y$r_buff1_thd3~0_31) (= v_~y$r_buff0_thd4~0_32 v_~y$r_buff1_thd4~0_28) (= v_~y$r_buff1_thd1~0_9 v_~y$r_buff0_thd1~0_9) (not (= v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_46 0)) (= v_~y$r_buff0_thd2~0_103 v_~y$r_buff1_thd2~0_52) (= v_~y$r_buff0_thd3~0_34 1)) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_32, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_35, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_103, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_9, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_46, ~z~0=v_~z~0_12} OutVars{P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_46, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_52, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_32, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_9, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_28, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_31, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_34, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_103, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_9, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_13, ~z~0=v_~z~0_12, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_36} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 17:30:01,495 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork1_~arg.offset_16 |v_P0Thread1of1ForFork1_#in~arg.offset_18|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~b~0_20 1) (= v_~x~0_26 v_~__unbuffered_p0_EAX~0_24) (= (+ v_~__unbuffered_cnt~0_86 1) v_~__unbuffered_cnt~0_85) (= |v_P0Thread1of1ForFork1_#in~arg.base_18| v_P0Thread1of1ForFork1_~arg.base_16) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_18|, ~x~0=v_~x~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_24, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_18|, ~b~0=v_~b~0_20, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_85, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_18|, ~x~0=v_~x~0_26, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_16} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, ~b~0, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 17:30:01,495 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L827-2-->L827-5: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1716402047 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In1716402047 256))) (.cse2 (= |P3Thread1of1ForFork0_#t~ite32_Out1716402047| |P3Thread1of1ForFork0_#t~ite33_Out1716402047|))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork0_#t~ite32_Out1716402047| ~y$w_buff1~0_In1716402047) .cse2) (and (= ~y~0_In1716402047 |P3Thread1of1ForFork0_#t~ite32_Out1716402047|) (or .cse1 .cse0) .cse2))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1716402047, ~y$w_buff1~0=~y$w_buff1~0_In1716402047, ~y~0=~y~0_In1716402047, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1716402047} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1716402047, ~y$w_buff1~0=~y$w_buff1~0_In1716402047, ~y~0=~y~0_In1716402047, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out1716402047|, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out1716402047|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1716402047} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 17:30:01,496 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L828-->L828-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1571626790 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-1571626790 256)))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~ite34_Out-1571626790| ~y$w_buff0_used~0_In-1571626790)) (and (= |P3Thread1of1ForFork0_#t~ite34_Out-1571626790| 0) (not .cse1) (not .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1571626790, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1571626790} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1571626790, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1571626790, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out-1571626790|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 17:30:01,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-1549992540 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1549992540 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1549992540 |P2Thread1of1ForFork3_#t~ite28_Out-1549992540|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork3_#t~ite28_Out-1549992540|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1549992540, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1549992540} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1549992540, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1549992540, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out-1549992540|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 17:30:01,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L829-->L829-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd4~0_In1492105421 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1492105421 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd4~0_In1492105421 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In1492105421 256) 0))) (or (and (= ~y$w_buff1_used~0_In1492105421 |P3Thread1of1ForFork0_#t~ite35_Out1492105421|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P3Thread1of1ForFork0_#t~ite35_Out1492105421| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1492105421, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1492105421, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1492105421, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1492105421} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1492105421, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1492105421, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1492105421, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out1492105421|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1492105421} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 17:30:01,498 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L803-->L803-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In-334736686 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-334736686 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-334736686 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-334736686 256) 0))) (or (and (= |P2Thread1of1ForFork3_#t~ite29_Out-334736686| ~y$w_buff1_used~0_In-334736686) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork3_#t~ite29_Out-334736686| 0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-334736686, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-334736686, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-334736686, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-334736686} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-334736686, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-334736686, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-334736686, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out-334736686|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-334736686} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 17:30:01,498 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L804-->L805: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-2026386302 ~y$r_buff0_thd3~0_Out-2026386302)) (.cse0 (= (mod ~y$w_buff0_used~0_In-2026386302 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-2026386302 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (= ~y$r_buff0_thd3~0_Out-2026386302 0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2026386302, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2026386302} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out-2026386302|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2026386302, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-2026386302} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:30:01,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L805-->L805-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd3~0_In1990416102 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In1990416102 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd3~0_In1990416102 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1990416102 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork3_#t~ite31_Out1990416102| ~y$r_buff1_thd3~0_In1990416102) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork3_#t~ite31_Out1990416102| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1990416102, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1990416102, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1990416102, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1990416102} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1990416102, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1990416102, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1990416102, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out1990416102|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1990416102} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 17:30:01,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L805-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= |v_P2Thread1of1ForFork3_#t~ite31_34| v_~y$r_buff1_thd3~0_46) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_46, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 17:30:01,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L765-->L765-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-127677563 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out-127677563| |P1Thread1of1ForFork2_#t~ite8_Out-127677563|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-127677563 256)))) (or (and .cse0 (= (mod ~y$w_buff1_used~0_In-127677563 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-127677563 256)) (and (= (mod ~y$r_buff1_thd2~0_In-127677563 256) 0) .cse0))) (= ~y$w_buff0~0_In-127677563 |P1Thread1of1ForFork2_#t~ite8_Out-127677563|) .cse1) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-127677563| ~y$w_buff0~0_In-127677563) (= |P1Thread1of1ForFork2_#t~ite8_In-127677563| |P1Thread1of1ForFork2_#t~ite8_Out-127677563|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-127677563, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-127677563, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_In-127677563|, ~y$w_buff0~0=~y$w_buff0~0_In-127677563, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-127677563, ~weak$$choice2~0=~weak$$choice2~0_In-127677563, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-127677563} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-127677563, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-127677563|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-127677563, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-127677563|, ~y$w_buff0~0=~y$w_buff0~0_In-127677563, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-127677563, ~weak$$choice2~0=~weak$$choice2~0_In-127677563, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-127677563} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:30:01,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L766-->L766-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In43252447 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out43252447| ~y$w_buff1~0_In43252447) (= |P1Thread1of1ForFork2_#t~ite11_In43252447| |P1Thread1of1ForFork2_#t~ite11_Out43252447|) (not .cse0)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out43252447| |P1Thread1of1ForFork2_#t~ite11_Out43252447|) (= |P1Thread1of1ForFork2_#t~ite11_Out43252447| ~y$w_buff1~0_In43252447) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In43252447 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In43252447 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In43252447 256) 0) (and (= (mod ~y$r_buff1_thd2~0_In43252447 256) 0) .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In43252447, ~y$w_buff1~0=~y$w_buff1~0_In43252447, ~y$w_buff0_used~0=~y$w_buff0_used~0_In43252447, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In43252447, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_In43252447|, ~weak$$choice2~0=~weak$$choice2~0_In43252447, ~y$w_buff1_used~0=~y$w_buff1_used~0_In43252447} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In43252447, ~y$w_buff1~0=~y$w_buff1~0_In43252447, ~y$w_buff0_used~0=~y$w_buff0_used~0_In43252447, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In43252447, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out43252447|, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out43252447|, ~weak$$choice2~0=~weak$$choice2~0_In43252447, ~y$w_buff1_used~0=~y$w_buff1_used~0_In43252447} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12, P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:30:01,501 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L769-->L770: Formula: (and (= v_~y$r_buff0_thd2~0_106 v_~y$r_buff0_thd2~0_105) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_6|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_105, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_9|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_7|, ~weak$$choice2~0=v_~weak$$choice2~0_28} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:30:01,502 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L770-->L770-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1767340575 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite24_Out-1767340575| ~y$r_buff1_thd2~0_In-1767340575) (= |P1Thread1of1ForFork2_#t~ite23_In-1767340575| |P1Thread1of1ForFork2_#t~ite23_Out-1767340575|)) (and (= ~y$r_buff1_thd2~0_In-1767340575 |P1Thread1of1ForFork2_#t~ite23_Out-1767340575|) (= |P1Thread1of1ForFork2_#t~ite24_Out-1767340575| |P1Thread1of1ForFork2_#t~ite23_Out-1767340575|) (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1767340575 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In-1767340575 256)) (and (= (mod ~y$w_buff1_used~0_In-1767340575 256) 0) .cse1) (and (= 0 (mod ~y$r_buff1_thd2~0_In-1767340575 256)) .cse1))) .cse0))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1767340575, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1767340575, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1767340575, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In-1767340575|, ~weak$$choice2~0=~weak$$choice2~0_In-1767340575, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1767340575} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1767340575, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1767340575, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1767340575, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out-1767340575|, ~weak$$choice2~0=~weak$$choice2~0_In-1767340575, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out-1767340575|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1767340575} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 17:30:01,502 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [735] [735] L772-->L780: Formula: (and (= (+ v_~__unbuffered_cnt~0_17 1) v_~__unbuffered_cnt~0_16) (not (= 0 (mod v_~y$flush_delayed~0_10 256))) (= v_~y~0_26 v_~y$mem_tmp~0_7) (= 0 v_~y$flush_delayed~0_9)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_10, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_16, ~y~0=v_~y~0_26, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 17:30:01,502 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L830-->L830-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In-200040396 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-200040396 256)))) (or (and (not .cse0) (= 0 |P3Thread1of1ForFork0_#t~ite36_Out-200040396|) (not .cse1)) (and (= |P3Thread1of1ForFork0_#t~ite36_Out-200040396| ~y$r_buff0_thd4~0_In-200040396) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-200040396, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-200040396} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-200040396, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-200040396, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-200040396|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 17:30:01,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L831-->L831-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd4~0_In118887767 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In118887767 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In118887767 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In118887767 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork0_#t~ite37_Out118887767| 0)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~ite37_Out118887767| ~y$r_buff1_thd4~0_In118887767)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In118887767, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In118887767, ~y$w_buff0_used~0=~y$w_buff0_used~0_In118887767, ~y$w_buff1_used~0=~y$w_buff1_used~0_In118887767} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In118887767, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In118887767, ~y$w_buff0_used~0=~y$w_buff0_used~0_In118887767, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out118887767|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In118887767} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 17:30:01,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L831-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_146 (+ v_~__unbuffered_cnt~0_147 1)) (= |v_P3Thread1of1ForFork0_#t~ite37_64| v_~y$r_buff1_thd4~0_141) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|)) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_64|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_147} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_141, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_63|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_146} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:30:01,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L856-1-->L862: Formula: (and (= v_~main$tmp_guard0~0_12 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_38) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_12 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_12} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:30:01,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L862-2-->L862-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In-1422709133 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1422709133 256)))) (or (and (= ~y$w_buff1~0_In-1422709133 |ULTIMATE.start_main_#t~ite42_Out-1422709133|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y~0_In-1422709133 |ULTIMATE.start_main_#t~ite42_Out-1422709133|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1422709133, ~y~0=~y~0_In-1422709133, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1422709133, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1422709133} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1422709133, ~y~0=~y~0_In-1422709133, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1422709133|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1422709133, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1422709133} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:30:01,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L862-4-->L863: Formula: (= v_~y~0_20 |v_ULTIMATE.start_main_#t~ite42_7|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_7|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_6|, ~y~0=v_~y~0_20, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:30:01,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L863-->L863-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-233763309 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-233763309 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite44_Out-233763309|) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out-233763309| ~y$w_buff0_used~0_In-233763309)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-233763309, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-233763309} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-233763309, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-233763309, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-233763309|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 17:30:01,504 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L864-->L864-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In263780061 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd0~0_In263780061 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In263780061 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In263780061 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out263780061| ~y$w_buff1_used~0_In263780061) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite45_Out263780061| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In263780061, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In263780061, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In263780061, ~y$w_buff1_used~0=~y$w_buff1_used~0_In263780061} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In263780061, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In263780061, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In263780061, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out263780061|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In263780061} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:30:01,504 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L865-->L865-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1013475305 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-1013475305 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite46_Out-1013475305|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$r_buff0_thd0~0_In-1013475305 |ULTIMATE.start_main_#t~ite46_Out-1013475305|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1013475305, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1013475305} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1013475305, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1013475305, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1013475305|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 17:30:01,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L866-->L866-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1834842706 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-1834842706 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1834842706 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-1834842706 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-1834842706| ~y$r_buff1_thd0~0_In-1834842706) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite47_Out-1834842706| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1834842706, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1834842706, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1834842706, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1834842706} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1834842706, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1834842706, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1834842706|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1834842706, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1834842706} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 17:30:01,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L866-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~y$r_buff1_thd0~0_137 |v_ULTIMATE.start_main_#t~ite47_48|) (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p3_EBX~0_23) (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p2_EAX~0_92) (= 0 v_~__unbuffered_p0_EAX~0_41) (= 1 v_~__unbuffered_p3_EAX~0_23))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_41, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_23, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_48|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_92, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_41, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_23, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_92, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_23, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_137, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:30:01,561 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:30:01 BasicIcfg [2019-12-07 17:30:01,561 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:30:01,562 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:30:01,562 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:30:01,562 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:30:01,562 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:26:21" (3/4) ... [2019-12-07 17:30:01,564 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:30:01,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] ULTIMATE.startENTRY-->L850: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= 0 v_~y$r_buff1_thd4~0_204) (= 0 v_~y$read_delayed_var~0.offset_8) (= v_~main$tmp_guard1~0_50 0) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t957~0.base_26| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t957~0.base_26|) |v_ULTIMATE.start_main_~#t957~0.offset_17| 0)) |v_#memory_int_27|) (= v_~a~0_15 0) (= 0 v_~y$w_buff0~0_524) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t957~0.base_26|) (= 0 v_~y$r_buff0_thd3~0_184) (= v_~y$read_delayed~0_7 0) (= 0 v_~y$r_buff0_thd4~0_132) (= v_~y$w_buff0_used~0_906 0) (= |v_#NULL.offset_3| 0) (= v_~weak$$choice2~0_152 0) (= v_~y$r_buff1_thd0~0_180 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t957~0.base_26|)) (= 0 v_~__unbuffered_p0_EAX~0_69) (= 0 v_~y$r_buff0_thd2~0_313) (= v_~y~0_171 0) (= v_~x~0_48 0) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t957~0.base_26| 4)) (= v_~y$mem_tmp~0_33 0) (= 0 v_~__unbuffered_p1_EAX~0_59) (= 0 v_~__unbuffered_p3_EAX~0_47) (= 0 v_~__unbuffered_p3_EBX~0_47) (= 0 v_~weak$$choice0~0_21) (= |v_ULTIMATE.start_main_~#t957~0.offset_17| 0) (= 0 v_~__unbuffered_p2_EAX~0_124) (= 0 v_~y$flush_delayed~0_62) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t957~0.base_26| 1)) (= 0 v_~y$r_buff1_thd1~0_92) (< 0 |v_#StackHeapBarrier_20|) (= v_~y$w_buff1~0_331 0) (= v_~z~0_40 0) (= 0 |v_#NULL.base_3|) (= v_~y$r_buff0_thd0~0_125 0) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~y$r_buff1_thd2~0_274) (= v_~__unbuffered_cnt~0_218 0) (= v_~y$r_buff0_thd1~0_33 0) (= v_~b~0_43 0) (= 0 v_~y$r_buff1_thd3~0_153) (= v_~y$w_buff1_used~0_620 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_28|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_97|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_38|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_200|, ULTIMATE.start_main_~#t959~0.base=|v_ULTIMATE.start_main_~#t959~0.base_26|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_15, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_69, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_153, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_59, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_62, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_47, #length=|v_#length_29|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_124, ULTIMATE.start_main_~#t959~0.offset=|v_ULTIMATE.start_main_~#t959~0.offset_19|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_28|, ULTIMATE.start_main_~#t960~0.base=|v_ULTIMATE.start_main_~#t960~0.base_24|, ULTIMATE.start_main_~#t960~0.offset=|v_ULTIMATE.start_main_~#t960~0.offset_17|, ~weak$$choice0~0=v_~weak$$choice0~0_21, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_204, ~y$w_buff1~0=v_~y$w_buff1~0_331, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_313, ULTIMATE.start_main_~#t957~0.offset=|v_ULTIMATE.start_main_~#t957~0.offset_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_218, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_180, ~x~0=v_~x~0_48, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_906, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_38|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_40|, ULTIMATE.start_main_~#t958~0.offset=|v_ULTIMATE.start_main_~#t958~0.offset_19|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_62|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_92, ~y$w_buff0~0=v_~y$w_buff0~0_524, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_184, ULTIMATE.start_main_~#t958~0.base=|v_ULTIMATE.start_main_~#t958~0.base_25|, ~y~0=v_~y~0_171, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_47, #NULL.base=|v_#NULL.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_274, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_132, ~b~0=v_~b~0_43, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_34|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_125, #valid=|v_#valid_80|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_40, ~weak$$choice2~0=v_~weak$$choice2~0_152, ULTIMATE.start_main_~#t957~0.base=|v_ULTIMATE.start_main_~#t957~0.base_26|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_620} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t959~0.base, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t959~0.offset, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t960~0.base, ULTIMATE.start_main_~#t960~0.offset, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_~#t957~0.offset, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t958~0.offset, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t958~0.base, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ~b~0, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t957~0.base, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:30:01,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L850-1-->L852: Formula: (and (= (select |v_#valid_43| |v_ULTIMATE.start_main_~#t958~0.base_12|) 0) (not (= |v_ULTIMATE.start_main_~#t958~0.base_12| 0)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t958~0.base_12| 4)) (= 0 |v_ULTIMATE.start_main_~#t958~0.offset_11|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t958~0.base_12| 1)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t958~0.base_12|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t958~0.base_12| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t958~0.base_12|) |v_ULTIMATE.start_main_~#t958~0.offset_11| 1)) |v_#memory_int_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t958~0.base=|v_ULTIMATE.start_main_~#t958~0.base_12|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_21|, ULTIMATE.start_main_~#t958~0.offset=|v_ULTIMATE.start_main_~#t958~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t958~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t958~0.offset] because there is no mapped edge [2019-12-07 17:30:01,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L852-1-->L854: Formula: (and (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t959~0.base_13| 1) |v_#valid_40|) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t959~0.base_13| 4) |v_#length_19|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t959~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t959~0.offset_11|) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t959~0.base_13|) 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t959~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t959~0.base_13|) |v_ULTIMATE.start_main_~#t959~0.offset_11| 2)) |v_#memory_int_17|) (not (= |v_ULTIMATE.start_main_~#t959~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t959~0.offset=|v_ULTIMATE.start_main_~#t959~0.offset_11|, ULTIMATE.start_main_~#t959~0.base=|v_ULTIMATE.start_main_~#t959~0.base_13|} AuxVars[] AssignedVars[#valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t959~0.offset, ULTIMATE.start_main_~#t959~0.base] because there is no mapped edge [2019-12-07 17:30:01,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L854-1-->L856: Formula: (and (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t960~0.base_12|) (= |v_ULTIMATE.start_main_~#t960~0.offset_10| 0) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t960~0.base_12| 1)) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t960~0.base_12|) 0) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t960~0.base_12| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t960~0.base_12|) |v_ULTIMATE.start_main_~#t960~0.offset_10| 3))) (not (= 0 |v_ULTIMATE.start_main_~#t960~0.base_12|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t960~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ULTIMATE.start_main_~#t960~0.base=|v_ULTIMATE.start_main_~#t960~0.base_12|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_21|, #length=|v_#length_23|, ULTIMATE.start_main_~#t960~0.offset=|v_ULTIMATE.start_main_~#t960~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t960~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t960~0.offset] because there is no mapped edge [2019-12-07 17:30:01,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L4-->L801: Formula: (and (= v_~z~0_12 v_~__unbuffered_p2_EAX~0_13) (= v_~y$r_buff0_thd0~0_41 v_~y$r_buff1_thd0~0_36) (= v_~y$r_buff0_thd3~0_35 v_~y$r_buff1_thd3~0_31) (= v_~y$r_buff0_thd4~0_32 v_~y$r_buff1_thd4~0_28) (= v_~y$r_buff1_thd1~0_9 v_~y$r_buff0_thd1~0_9) (not (= v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_46 0)) (= v_~y$r_buff0_thd2~0_103 v_~y$r_buff1_thd2~0_52) (= v_~y$r_buff0_thd3~0_34 1)) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_32, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_35, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_103, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_9, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_46, ~z~0=v_~z~0_12} OutVars{P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_46, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_52, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_32, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_9, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_28, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_31, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_34, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_103, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_9, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_13, ~z~0=v_~z~0_12, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_36} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 17:30:01,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork1_~arg.offset_16 |v_P0Thread1of1ForFork1_#in~arg.offset_18|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~b~0_20 1) (= v_~x~0_26 v_~__unbuffered_p0_EAX~0_24) (= (+ v_~__unbuffered_cnt~0_86 1) v_~__unbuffered_cnt~0_85) (= |v_P0Thread1of1ForFork1_#in~arg.base_18| v_P0Thread1of1ForFork1_~arg.base_16) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_18|, ~x~0=v_~x~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_24, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_18|, ~b~0=v_~b~0_20, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_85, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_18|, ~x~0=v_~x~0_26, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_16} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, ~b~0, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 17:30:01,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L827-2-->L827-5: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1716402047 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In1716402047 256))) (.cse2 (= |P3Thread1of1ForFork0_#t~ite32_Out1716402047| |P3Thread1of1ForFork0_#t~ite33_Out1716402047|))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork0_#t~ite32_Out1716402047| ~y$w_buff1~0_In1716402047) .cse2) (and (= ~y~0_In1716402047 |P3Thread1of1ForFork0_#t~ite32_Out1716402047|) (or .cse1 .cse0) .cse2))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1716402047, ~y$w_buff1~0=~y$w_buff1~0_In1716402047, ~y~0=~y~0_In1716402047, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1716402047} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1716402047, ~y$w_buff1~0=~y$w_buff1~0_In1716402047, ~y~0=~y~0_In1716402047, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out1716402047|, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out1716402047|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1716402047} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 17:30:01,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L828-->L828-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1571626790 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-1571626790 256)))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~ite34_Out-1571626790| ~y$w_buff0_used~0_In-1571626790)) (and (= |P3Thread1of1ForFork0_#t~ite34_Out-1571626790| 0) (not .cse1) (not .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1571626790, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1571626790} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1571626790, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1571626790, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out-1571626790|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 17:30:01,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-1549992540 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1549992540 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1549992540 |P2Thread1of1ForFork3_#t~ite28_Out-1549992540|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork3_#t~ite28_Out-1549992540|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1549992540, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1549992540} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1549992540, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1549992540, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out-1549992540|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 17:30:01,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L829-->L829-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd4~0_In1492105421 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1492105421 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd4~0_In1492105421 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In1492105421 256) 0))) (or (and (= ~y$w_buff1_used~0_In1492105421 |P3Thread1of1ForFork0_#t~ite35_Out1492105421|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P3Thread1of1ForFork0_#t~ite35_Out1492105421| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1492105421, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1492105421, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1492105421, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1492105421} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1492105421, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1492105421, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1492105421, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out1492105421|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1492105421} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 17:30:01,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L803-->L803-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In-334736686 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-334736686 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-334736686 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-334736686 256) 0))) (or (and (= |P2Thread1of1ForFork3_#t~ite29_Out-334736686| ~y$w_buff1_used~0_In-334736686) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork3_#t~ite29_Out-334736686| 0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-334736686, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-334736686, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-334736686, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-334736686} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-334736686, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-334736686, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-334736686, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out-334736686|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-334736686} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 17:30:01,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L804-->L805: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-2026386302 ~y$r_buff0_thd3~0_Out-2026386302)) (.cse0 (= (mod ~y$w_buff0_used~0_In-2026386302 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-2026386302 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (= ~y$r_buff0_thd3~0_Out-2026386302 0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2026386302, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2026386302} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out-2026386302|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2026386302, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-2026386302} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:30:01,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L805-->L805-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd3~0_In1990416102 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In1990416102 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd3~0_In1990416102 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1990416102 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork3_#t~ite31_Out1990416102| ~y$r_buff1_thd3~0_In1990416102) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork3_#t~ite31_Out1990416102| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1990416102, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1990416102, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1990416102, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1990416102} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1990416102, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1990416102, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1990416102, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out1990416102|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1990416102} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 17:30:01,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L805-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= |v_P2Thread1of1ForFork3_#t~ite31_34| v_~y$r_buff1_thd3~0_46) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_46, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 17:30:01,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L765-->L765-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-127677563 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out-127677563| |P1Thread1of1ForFork2_#t~ite8_Out-127677563|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-127677563 256)))) (or (and .cse0 (= (mod ~y$w_buff1_used~0_In-127677563 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-127677563 256)) (and (= (mod ~y$r_buff1_thd2~0_In-127677563 256) 0) .cse0))) (= ~y$w_buff0~0_In-127677563 |P1Thread1of1ForFork2_#t~ite8_Out-127677563|) .cse1) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-127677563| ~y$w_buff0~0_In-127677563) (= |P1Thread1of1ForFork2_#t~ite8_In-127677563| |P1Thread1of1ForFork2_#t~ite8_Out-127677563|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-127677563, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-127677563, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_In-127677563|, ~y$w_buff0~0=~y$w_buff0~0_In-127677563, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-127677563, ~weak$$choice2~0=~weak$$choice2~0_In-127677563, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-127677563} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-127677563, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-127677563|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-127677563, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-127677563|, ~y$w_buff0~0=~y$w_buff0~0_In-127677563, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-127677563, ~weak$$choice2~0=~weak$$choice2~0_In-127677563, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-127677563} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:30:01,572 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L766-->L766-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In43252447 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out43252447| ~y$w_buff1~0_In43252447) (= |P1Thread1of1ForFork2_#t~ite11_In43252447| |P1Thread1of1ForFork2_#t~ite11_Out43252447|) (not .cse0)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out43252447| |P1Thread1of1ForFork2_#t~ite11_Out43252447|) (= |P1Thread1of1ForFork2_#t~ite11_Out43252447| ~y$w_buff1~0_In43252447) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In43252447 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In43252447 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In43252447 256) 0) (and (= (mod ~y$r_buff1_thd2~0_In43252447 256) 0) .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In43252447, ~y$w_buff1~0=~y$w_buff1~0_In43252447, ~y$w_buff0_used~0=~y$w_buff0_used~0_In43252447, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In43252447, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_In43252447|, ~weak$$choice2~0=~weak$$choice2~0_In43252447, ~y$w_buff1_used~0=~y$w_buff1_used~0_In43252447} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In43252447, ~y$w_buff1~0=~y$w_buff1~0_In43252447, ~y$w_buff0_used~0=~y$w_buff0_used~0_In43252447, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In43252447, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out43252447|, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out43252447|, ~weak$$choice2~0=~weak$$choice2~0_In43252447, ~y$w_buff1_used~0=~y$w_buff1_used~0_In43252447} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12, P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:30:01,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L769-->L770: Formula: (and (= v_~y$r_buff0_thd2~0_106 v_~y$r_buff0_thd2~0_105) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_6|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_105, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_9|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_7|, ~weak$$choice2~0=v_~weak$$choice2~0_28} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:30:01,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L770-->L770-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1767340575 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite24_Out-1767340575| ~y$r_buff1_thd2~0_In-1767340575) (= |P1Thread1of1ForFork2_#t~ite23_In-1767340575| |P1Thread1of1ForFork2_#t~ite23_Out-1767340575|)) (and (= ~y$r_buff1_thd2~0_In-1767340575 |P1Thread1of1ForFork2_#t~ite23_Out-1767340575|) (= |P1Thread1of1ForFork2_#t~ite24_Out-1767340575| |P1Thread1of1ForFork2_#t~ite23_Out-1767340575|) (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1767340575 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In-1767340575 256)) (and (= (mod ~y$w_buff1_used~0_In-1767340575 256) 0) .cse1) (and (= 0 (mod ~y$r_buff1_thd2~0_In-1767340575 256)) .cse1))) .cse0))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1767340575, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1767340575, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1767340575, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In-1767340575|, ~weak$$choice2~0=~weak$$choice2~0_In-1767340575, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1767340575} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1767340575, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1767340575, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1767340575, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out-1767340575|, ~weak$$choice2~0=~weak$$choice2~0_In-1767340575, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out-1767340575|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1767340575} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 17:30:01,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [735] [735] L772-->L780: Formula: (and (= (+ v_~__unbuffered_cnt~0_17 1) v_~__unbuffered_cnt~0_16) (not (= 0 (mod v_~y$flush_delayed~0_10 256))) (= v_~y~0_26 v_~y$mem_tmp~0_7) (= 0 v_~y$flush_delayed~0_9)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_10, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_16, ~y~0=v_~y~0_26, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 17:30:01,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L830-->L830-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In-200040396 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-200040396 256)))) (or (and (not .cse0) (= 0 |P3Thread1of1ForFork0_#t~ite36_Out-200040396|) (not .cse1)) (and (= |P3Thread1of1ForFork0_#t~ite36_Out-200040396| ~y$r_buff0_thd4~0_In-200040396) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-200040396, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-200040396} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-200040396, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-200040396, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-200040396|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 17:30:01,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L831-->L831-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd4~0_In118887767 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In118887767 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In118887767 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In118887767 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork0_#t~ite37_Out118887767| 0)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~ite37_Out118887767| ~y$r_buff1_thd4~0_In118887767)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In118887767, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In118887767, ~y$w_buff0_used~0=~y$w_buff0_used~0_In118887767, ~y$w_buff1_used~0=~y$w_buff1_used~0_In118887767} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In118887767, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In118887767, ~y$w_buff0_used~0=~y$w_buff0_used~0_In118887767, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out118887767|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In118887767} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 17:30:01,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L831-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_146 (+ v_~__unbuffered_cnt~0_147 1)) (= |v_P3Thread1of1ForFork0_#t~ite37_64| v_~y$r_buff1_thd4~0_141) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|)) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_64|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_147} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_141, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_63|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_146} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:30:01,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L856-1-->L862: Formula: (and (= v_~main$tmp_guard0~0_12 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_38) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_12 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_12} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:30:01,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L862-2-->L862-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In-1422709133 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1422709133 256)))) (or (and (= ~y$w_buff1~0_In-1422709133 |ULTIMATE.start_main_#t~ite42_Out-1422709133|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y~0_In-1422709133 |ULTIMATE.start_main_#t~ite42_Out-1422709133|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1422709133, ~y~0=~y~0_In-1422709133, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1422709133, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1422709133} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1422709133, ~y~0=~y~0_In-1422709133, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1422709133|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1422709133, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1422709133} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:30:01,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L862-4-->L863: Formula: (= v_~y~0_20 |v_ULTIMATE.start_main_#t~ite42_7|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_7|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_6|, ~y~0=v_~y~0_20, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:30:01,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L863-->L863-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-233763309 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-233763309 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite44_Out-233763309|) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out-233763309| ~y$w_buff0_used~0_In-233763309)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-233763309, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-233763309} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-233763309, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-233763309, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-233763309|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 17:30:01,576 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L864-->L864-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In263780061 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd0~0_In263780061 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In263780061 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In263780061 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out263780061| ~y$w_buff1_used~0_In263780061) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite45_Out263780061| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In263780061, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In263780061, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In263780061, ~y$w_buff1_used~0=~y$w_buff1_used~0_In263780061} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In263780061, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In263780061, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In263780061, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out263780061|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In263780061} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:30:01,576 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L865-->L865-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1013475305 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-1013475305 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite46_Out-1013475305|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$r_buff0_thd0~0_In-1013475305 |ULTIMATE.start_main_#t~ite46_Out-1013475305|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1013475305, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1013475305} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1013475305, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1013475305, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1013475305|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 17:30:01,577 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L866-->L866-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1834842706 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-1834842706 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1834842706 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-1834842706 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-1834842706| ~y$r_buff1_thd0~0_In-1834842706) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite47_Out-1834842706| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1834842706, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1834842706, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1834842706, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1834842706} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1834842706, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1834842706, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1834842706|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1834842706, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1834842706} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 17:30:01,577 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L866-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~y$r_buff1_thd0~0_137 |v_ULTIMATE.start_main_#t~ite47_48|) (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p3_EBX~0_23) (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p2_EAX~0_92) (= 0 v_~__unbuffered_p0_EAX~0_41) (= 1 v_~__unbuffered_p3_EAX~0_23))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_41, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_23, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_48|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_92, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_41, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_23, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_92, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_23, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_137, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:30:01,635 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_38dbb4fc-c1f1-4ff1-b9a2-3fa43f189066/bin/uautomizer/witness.graphml [2019-12-07 17:30:01,635 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:30:01,636 INFO L168 Benchmark]: Toolchain (without parser) took 220882.05 ms. Allocated memory was 1.0 GB in the beginning and 9.7 GB in the end (delta: 8.7 GB). Free memory was 939.3 MB in the beginning and 5.8 GB in the end (delta: -4.9 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2019-12-07 17:30:01,636 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:30:01,636 INFO L168 Benchmark]: CACSL2BoogieTranslator took 381.72 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.3 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -116.4 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:30:01,637 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.99 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:30:01,637 INFO L168 Benchmark]: Boogie Preprocessor took 24.50 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:30:01,637 INFO L168 Benchmark]: RCFGBuilder took 430.29 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 999.8 MB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. [2019-12-07 17:30:01,637 INFO L168 Benchmark]: TraceAbstraction took 219931.20 ms. Allocated memory was 1.1 GB in the beginning and 9.7 GB in the end (delta: 8.6 GB). Free memory was 999.8 MB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 3.7 GB. Max. memory is 11.5 GB. [2019-12-07 17:30:01,637 INFO L168 Benchmark]: Witness Printer took 73.33 ms. Allocated memory is still 9.7 GB. Free memory was 5.9 GB in the beginning and 5.8 GB in the end (delta: 12.9 MB). Peak memory consumption was 12.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:30:01,639 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 381.72 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.3 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -116.4 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.99 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.50 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 430.29 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 999.8 MB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 219931.20 ms. Allocated memory was 1.1 GB in the beginning and 9.7 GB in the end (delta: 8.6 GB). Free memory was 999.8 MB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 3.7 GB. Max. memory is 11.5 GB. * Witness Printer took 73.33 ms. Allocated memory is still 9.7 GB. Free memory was 5.9 GB in the beginning and 5.8 GB in the end (delta: 12.9 MB). Peak memory consumption was 12.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.8s, 183 ProgramPointsBefore, 88 ProgramPointsAfterwards, 211 TransitionsBefore, 95 TransitionsAfterwards, 18126 CoEnabledTransitionPairs, 8 FixpointIterations, 39 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 26 ChoiceCompositions, 7374 VarBasedMoverChecksPositive, 271 VarBasedMoverChecksNegative, 80 SemBasedMoverChecksPositive, 263 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 74129 CheckedPairsTotal, 127 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L850] FCALL, FORK 0 pthread_create(&t957, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L852] FCALL, FORK 0 pthread_create(&t958, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L854] FCALL, FORK 0 pthread_create(&t959, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L856] FCALL, FORK 0 pthread_create(&t960, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L785] 3 y$w_buff1 = y$w_buff0 [L786] 3 y$w_buff0 = 1 [L787] 3 y$w_buff1_used = y$w_buff0_used [L788] 3 y$w_buff0_used = (_Bool)1 [L801] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L815] 4 z = 1 [L818] 4 a = 1 [L821] 4 __unbuffered_p3_EAX = a [L824] 4 __unbuffered_p3_EBX = b VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] EXPR 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L827] 4 y = y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) [L828] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L757] 2 x = 1 [L760] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L761] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L762] 2 y$flush_delayed = weak$$choice2 [L763] 2 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L802] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L829] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L764] EXPR 2 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L803] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L764] 2 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L765] 2 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L766] 2 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L767] EXPR 2 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L767] 2 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L768] EXPR 2 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L768] 2 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L770] 2 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L771] 2 __unbuffered_p1_EAX = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L830] 4 y$r_buff0_thd4 = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$r_buff0_thd4 [L862] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L863] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L864] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L865] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 171 locations, 2 error locations. Result: UNSAFE, OverallTime: 219.7s, OverallIterations: 37, TraceHistogramMax: 1, AutomataDifference: 46.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6599 SDtfs, 9341 SDslu, 19875 SDs, 0 SdLazy, 13736 SolverSat, 387 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 424 GetRequests, 41 SyntacticMatches, 22 SemanticMatches, 361 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1875 ImplicationChecksByTransitivity, 3.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=290536occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 139.9s AutomataMinimizationTime, 36 MinimizatonAttempts, 498446 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 1405 NumberOfCodeBlocks, 1405 NumberOfCodeBlocksAsserted, 37 NumberOfCheckSat, 1310 ConstructedInterpolants, 0 QuantifiedInterpolants, 329008 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 36 InterpolantComputations, 36 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...