./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix038_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix038_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 623b5338dcc800731f82d9cd6d56249ebeda940a ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:35:09,545 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:35:09,546 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:35:09,553 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:35:09,553 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:35:09,554 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:35:09,555 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:35:09,556 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:35:09,558 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:35:09,558 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:35:09,559 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:35:09,560 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:35:09,560 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:35:09,561 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:35:09,561 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:35:09,562 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:35:09,563 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:35:09,563 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:35:09,564 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:35:09,566 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:35:09,567 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:35:09,568 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:35:09,569 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:35:09,569 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:35:09,571 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:35:09,571 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:35:09,571 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:35:09,572 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:35:09,572 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:35:09,573 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:35:09,573 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:35:09,573 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:35:09,574 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:35:09,574 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:35:09,575 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:35:09,575 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:35:09,576 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:35:09,576 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:35:09,576 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:35:09,576 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:35:09,577 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:35:09,577 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 13:35:09,587 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:35:09,587 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:35:09,588 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 13:35:09,588 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 13:35:09,588 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 13:35:09,588 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:35:09,588 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:35:09,588 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:35:09,588 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:35:09,589 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:35:09,589 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:35:09,589 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:35:09,589 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:35:09,589 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:35:09,589 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:35:09,589 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:35:09,590 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:35:09,590 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:35:09,590 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 13:35:09,590 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:35:09,590 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:35:09,590 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:35:09,591 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:35:09,591 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:35:09,591 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:35:09,591 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 13:35:09,591 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:35:09,591 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:35:09,591 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:35:09,591 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 623b5338dcc800731f82d9cd6d56249ebeda940a [2019-12-07 13:35:09,690 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:35:09,698 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:35:09,701 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:35:09,702 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:35:09,703 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:35:09,703 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix038_power.oepc.i [2019-12-07 13:35:09,751 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/data/f32e3890c/9db0bd9c254742459618b06fda5856d5/FLAG64ee2d552 [2019-12-07 13:35:10,208 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:35:10,209 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/sv-benchmarks/c/pthread-wmm/mix038_power.oepc.i [2019-12-07 13:35:10,221 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/data/f32e3890c/9db0bd9c254742459618b06fda5856d5/FLAG64ee2d552 [2019-12-07 13:35:10,231 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/data/f32e3890c/9db0bd9c254742459618b06fda5856d5 [2019-12-07 13:35:10,233 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:35:10,234 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:35:10,235 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:35:10,235 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:35:10,237 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:35:10,238 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:35:10" (1/1) ... [2019-12-07 13:35:10,239 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25138a46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10, skipping insertion in model container [2019-12-07 13:35:10,240 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:35:10" (1/1) ... [2019-12-07 13:35:10,244 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:35:10,274 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:35:10,531 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:35:10,540 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:35:10,593 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:35:10,637 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:35:10,638 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10 WrapperNode [2019-12-07 13:35:10,638 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:35:10,638 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:35:10,638 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:35:10,639 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:35:10,644 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10" (1/1) ... [2019-12-07 13:35:10,657 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10" (1/1) ... [2019-12-07 13:35:10,675 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:35:10,676 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:35:10,676 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:35:10,676 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:35:10,682 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10" (1/1) ... [2019-12-07 13:35:10,682 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10" (1/1) ... [2019-12-07 13:35:10,686 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10" (1/1) ... [2019-12-07 13:35:10,686 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10" (1/1) ... [2019-12-07 13:35:10,693 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10" (1/1) ... [2019-12-07 13:35:10,696 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10" (1/1) ... [2019-12-07 13:35:10,699 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10" (1/1) ... [2019-12-07 13:35:10,702 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:35:10,703 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:35:10,703 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:35:10,703 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:35:10,703 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:35:10,750 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:35:10,750 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:35:10,750 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:35:10,750 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:35:10,750 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:35:10,750 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:35:10,750 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:35:10,750 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:35:10,751 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:35:10,751 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:35:10,751 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:35:10,751 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:35:10,751 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:35:10,752 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:35:11,113 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:35:11,113 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:35:11,114 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:35:11 BoogieIcfgContainer [2019-12-07 13:35:11,114 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:35:11,115 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:35:11,115 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:35:11,117 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:35:11,117 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:35:10" (1/3) ... [2019-12-07 13:35:11,118 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@57c7e9bb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:35:11, skipping insertion in model container [2019-12-07 13:35:11,118 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:35:10" (2/3) ... [2019-12-07 13:35:11,118 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@57c7e9bb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:35:11, skipping insertion in model container [2019-12-07 13:35:11,118 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:35:11" (3/3) ... [2019-12-07 13:35:11,119 INFO L109 eAbstractionObserver]: Analyzing ICFG mix038_power.oepc.i [2019-12-07 13:35:11,126 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:35:11,126 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:35:11,131 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:35:11,131 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:35:11,157 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,157 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,157 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,157 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,157 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,158 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,158 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,158 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,158 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,158 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,159 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,159 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,159 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,159 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,159 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,159 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,159 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,159 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,160 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,160 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,160 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,160 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,160 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,160 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,160 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,160 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,162 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,162 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,165 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,166 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,167 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,167 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,169 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,169 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,169 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,169 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,169 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,169 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,169 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,169 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,170 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,170 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,170 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,170 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,170 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,170 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,170 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,170 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,171 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,171 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,171 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,171 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,171 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,171 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,171 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,171 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,172 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,172 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,172 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,172 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,172 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,172 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,172 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,172 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,173 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,173 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,173 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,173 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,173 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,173 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,173 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,173 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,173 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,174 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,174 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,174 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,174 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,174 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,174 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,174 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,174 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,175 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,175 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,175 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,175 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,175 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,175 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,175 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,176 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,176 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,176 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,176 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,176 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,176 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,176 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,176 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,176 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,177 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,177 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,177 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,177 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,177 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,177 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,177 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,177 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,177 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,178 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,178 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,178 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,178 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,178 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,178 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,178 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,178 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,179 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,179 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,179 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,179 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,179 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,179 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,179 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,179 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,179 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,180 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,180 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,180 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,180 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,180 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,180 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,180 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,180 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,180 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,181 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:35:11,194 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 13:35:11,209 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:35:11,210 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:35:11,210 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:35:11,210 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:35:11,210 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:35:11,210 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:35:11,210 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:35:11,210 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:35:11,220 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 13:35:11,222 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 13:35:11,291 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 13:35:11,291 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:35:11,307 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:35:11,326 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 13:35:11,367 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 13:35:11,367 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:35:11,375 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:35:11,393 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 13:35:11,394 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:35:14,380 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 13:35:14,723 WARN L192 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 13:35:14,814 INFO L206 etLargeBlockEncoding]: Checked pairs total: 87212 [2019-12-07 13:35:14,814 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 13:35:14,817 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 13:35:26,322 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 13:35:26,323 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 13:35:26,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 13:35:26,328 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:26,329 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 13:35:26,329 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:26,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:26,334 INFO L82 PathProgramCache]: Analyzing trace with hash 919766, now seen corresponding path program 1 times [2019-12-07 13:35:26,339 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:26,339 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784040645] [2019-12-07 13:35:26,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:26,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:26,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:26,476 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784040645] [2019-12-07 13:35:26,477 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:26,477 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:35:26,478 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [88752960] [2019-12-07 13:35:26,480 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:35:26,481 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:26,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:35:26,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:35:26,491 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 13:35:27,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:27,148 INFO L93 Difference]: Finished difference Result 101544 states and 430594 transitions. [2019-12-07 13:35:27,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:35:27,149 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 13:35:27,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:27,798 INFO L225 Difference]: With dead ends: 101544 [2019-12-07 13:35:27,798 INFO L226 Difference]: Without dead ends: 95304 [2019-12-07 13:35:27,799 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:35:31,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95304 states. [2019-12-07 13:35:32,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95304 to 95304. [2019-12-07 13:35:32,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95304 states. [2019-12-07 13:35:32,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95304 states to 95304 states and 403554 transitions. [2019-12-07 13:35:32,803 INFO L78 Accepts]: Start accepts. Automaton has 95304 states and 403554 transitions. Word has length 3 [2019-12-07 13:35:32,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:32,803 INFO L462 AbstractCegarLoop]: Abstraction has 95304 states and 403554 transitions. [2019-12-07 13:35:32,803 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:35:32,803 INFO L276 IsEmpty]: Start isEmpty. Operand 95304 states and 403554 transitions. [2019-12-07 13:35:32,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:35:32,806 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:32,806 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:32,807 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:32,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:32,807 INFO L82 PathProgramCache]: Analyzing trace with hash -1982627867, now seen corresponding path program 1 times [2019-12-07 13:35:32,807 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:32,807 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241702583] [2019-12-07 13:35:32,807 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:32,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:32,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:32,874 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241702583] [2019-12-07 13:35:32,874 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:32,874 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:35:32,874 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1337238359] [2019-12-07 13:35:32,875 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:35:32,875 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:32,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:35:32,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:35:32,876 INFO L87 Difference]: Start difference. First operand 95304 states and 403554 transitions. Second operand 4 states. [2019-12-07 13:35:35,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:35,442 INFO L93 Difference]: Finished difference Result 152040 states and 617140 transitions. [2019-12-07 13:35:35,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:35:35,443 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:35:35,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:35,830 INFO L225 Difference]: With dead ends: 152040 [2019-12-07 13:35:35,831 INFO L226 Difference]: Without dead ends: 151991 [2019-12-07 13:35:35,831 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:35:39,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151991 states. [2019-12-07 13:35:41,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151991 to 137801. [2019-12-07 13:35:41,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137801 states. [2019-12-07 13:35:42,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137801 states to 137801 states and 566928 transitions. [2019-12-07 13:35:42,070 INFO L78 Accepts]: Start accepts. Automaton has 137801 states and 566928 transitions. Word has length 11 [2019-12-07 13:35:42,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:42,070 INFO L462 AbstractCegarLoop]: Abstraction has 137801 states and 566928 transitions. [2019-12-07 13:35:42,070 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:35:42,070 INFO L276 IsEmpty]: Start isEmpty. Operand 137801 states and 566928 transitions. [2019-12-07 13:35:42,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:35:42,074 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:42,074 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:42,074 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:42,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:42,074 INFO L82 PathProgramCache]: Analyzing trace with hash -1673757482, now seen corresponding path program 1 times [2019-12-07 13:35:42,075 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:42,075 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [163445461] [2019-12-07 13:35:42,075 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:42,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:42,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:42,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [163445461] [2019-12-07 13:35:42,122 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:42,122 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:35:42,122 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1947230754] [2019-12-07 13:35:42,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:35:42,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:42,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:35:42,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:35:42,123 INFO L87 Difference]: Start difference. First operand 137801 states and 566928 transitions. Second operand 3 states. [2019-12-07 13:35:42,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:42,228 INFO L93 Difference]: Finished difference Result 30915 states and 99823 transitions. [2019-12-07 13:35:42,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:35:42,228 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 13:35:42,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:42,275 INFO L225 Difference]: With dead ends: 30915 [2019-12-07 13:35:42,275 INFO L226 Difference]: Without dead ends: 30915 [2019-12-07 13:35:42,276 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:35:42,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30915 states. [2019-12-07 13:35:42,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30915 to 30915. [2019-12-07 13:35:42,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30915 states. [2019-12-07 13:35:42,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30915 states to 30915 states and 99823 transitions. [2019-12-07 13:35:42,790 INFO L78 Accepts]: Start accepts. Automaton has 30915 states and 99823 transitions. Word has length 13 [2019-12-07 13:35:42,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:42,790 INFO L462 AbstractCegarLoop]: Abstraction has 30915 states and 99823 transitions. [2019-12-07 13:35:42,790 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:35:42,790 INFO L276 IsEmpty]: Start isEmpty. Operand 30915 states and 99823 transitions. [2019-12-07 13:35:42,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:35:42,792 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:42,792 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:42,792 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:42,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:42,793 INFO L82 PathProgramCache]: Analyzing trace with hash 841711145, now seen corresponding path program 1 times [2019-12-07 13:35:42,793 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:42,793 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1828695105] [2019-12-07 13:35:42,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:42,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:42,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:42,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1828695105] [2019-12-07 13:35:42,851 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:42,851 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:35:42,851 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [533385485] [2019-12-07 13:35:42,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:35:42,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:42,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:35:42,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:35:42,852 INFO L87 Difference]: Start difference. First operand 30915 states and 99823 transitions. Second operand 4 states. [2019-12-07 13:35:43,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:43,094 INFO L93 Difference]: Finished difference Result 38538 states and 124019 transitions. [2019-12-07 13:35:43,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:35:43,095 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 13:35:43,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:43,159 INFO L225 Difference]: With dead ends: 38538 [2019-12-07 13:35:43,159 INFO L226 Difference]: Without dead ends: 38538 [2019-12-07 13:35:43,159 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:35:43,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38538 states. [2019-12-07 13:35:43,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38538 to 34473. [2019-12-07 13:35:43,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34473 states. [2019-12-07 13:35:44,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34473 states to 34473 states and 111272 transitions. [2019-12-07 13:35:44,022 INFO L78 Accepts]: Start accepts. Automaton has 34473 states and 111272 transitions. Word has length 16 [2019-12-07 13:35:44,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:44,023 INFO L462 AbstractCegarLoop]: Abstraction has 34473 states and 111272 transitions. [2019-12-07 13:35:44,023 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:35:44,023 INFO L276 IsEmpty]: Start isEmpty. Operand 34473 states and 111272 transitions. [2019-12-07 13:35:44,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:35:44,029 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:44,029 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:44,029 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:44,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:44,030 INFO L82 PathProgramCache]: Analyzing trace with hash 361242897, now seen corresponding path program 1 times [2019-12-07 13:35:44,030 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:44,030 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [289218526] [2019-12-07 13:35:44,030 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:44,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:44,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:44,131 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [289218526] [2019-12-07 13:35:44,131 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:44,131 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:35:44,132 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034725308] [2019-12-07 13:35:44,132 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:35:44,132 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:44,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:35:44,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:35:44,132 INFO L87 Difference]: Start difference. First operand 34473 states and 111272 transitions. Second operand 7 states. [2019-12-07 13:35:44,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:44,743 INFO L93 Difference]: Finished difference Result 46121 states and 146874 transitions. [2019-12-07 13:35:44,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 13:35:44,743 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2019-12-07 13:35:44,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:44,811 INFO L225 Difference]: With dead ends: 46121 [2019-12-07 13:35:44,811 INFO L226 Difference]: Without dead ends: 46121 [2019-12-07 13:35:44,811 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:35:45,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46121 states. [2019-12-07 13:35:45,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46121 to 34461. [2019-12-07 13:35:45,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34461 states. [2019-12-07 13:35:45,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34461 states to 34461 states and 111236 transitions. [2019-12-07 13:35:45,461 INFO L78 Accepts]: Start accepts. Automaton has 34461 states and 111236 transitions. Word has length 22 [2019-12-07 13:35:45,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:45,461 INFO L462 AbstractCegarLoop]: Abstraction has 34461 states and 111236 transitions. [2019-12-07 13:35:45,461 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:35:45,462 INFO L276 IsEmpty]: Start isEmpty. Operand 34461 states and 111236 transitions. [2019-12-07 13:35:45,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:35:45,466 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:45,466 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:45,466 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:45,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:45,467 INFO L82 PathProgramCache]: Analyzing trace with hash 1937934737, now seen corresponding path program 2 times [2019-12-07 13:35:45,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:45,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1683081746] [2019-12-07 13:35:45,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:45,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:45,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:45,577 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1683081746] [2019-12-07 13:35:45,577 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:45,577 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:35:45,577 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1363924616] [2019-12-07 13:35:45,577 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:35:45,577 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:45,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:35:45,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:35:45,578 INFO L87 Difference]: Start difference. First operand 34461 states and 111236 transitions. Second operand 7 states. [2019-12-07 13:35:46,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:46,299 INFO L93 Difference]: Finished difference Result 48718 states and 155229 transitions. [2019-12-07 13:35:46,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:35:46,300 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2019-12-07 13:35:46,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:46,369 INFO L225 Difference]: With dead ends: 48718 [2019-12-07 13:35:46,369 INFO L226 Difference]: Without dead ends: 48711 [2019-12-07 13:35:46,369 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:35:46,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48711 states. [2019-12-07 13:35:47,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48711 to 34062. [2019-12-07 13:35:47,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34062 states. [2019-12-07 13:35:47,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34062 states to 34062 states and 109807 transitions. [2019-12-07 13:35:47,211 INFO L78 Accepts]: Start accepts. Automaton has 34062 states and 109807 transitions. Word has length 22 [2019-12-07 13:35:47,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:47,211 INFO L462 AbstractCegarLoop]: Abstraction has 34062 states and 109807 transitions. [2019-12-07 13:35:47,211 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:35:47,211 INFO L276 IsEmpty]: Start isEmpty. Operand 34062 states and 109807 transitions. [2019-12-07 13:35:47,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 13:35:47,219 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:47,219 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:47,219 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:47,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:47,219 INFO L82 PathProgramCache]: Analyzing trace with hash -2019660134, now seen corresponding path program 1 times [2019-12-07 13:35:47,220 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:47,220 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1917308164] [2019-12-07 13:35:47,220 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:47,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:47,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:47,343 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1917308164] [2019-12-07 13:35:47,343 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:47,343 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:35:47,344 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [662931601] [2019-12-07 13:35:47,344 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:35:47,344 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:47,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:35:47,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:35:47,344 INFO L87 Difference]: Start difference. First operand 34062 states and 109807 transitions. Second operand 7 states. [2019-12-07 13:35:47,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:47,952 INFO L93 Difference]: Finished difference Result 48290 states and 152432 transitions. [2019-12-07 13:35:47,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 13:35:47,953 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2019-12-07 13:35:47,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:48,020 INFO L225 Difference]: With dead ends: 48290 [2019-12-07 13:35:48,020 INFO L226 Difference]: Without dead ends: 48277 [2019-12-07 13:35:48,021 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:35:48,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48277 states. [2019-12-07 13:35:48,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48277 to 39783. [2019-12-07 13:35:48,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39783 states. [2019-12-07 13:35:48,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39783 states to 39783 states and 127707 transitions. [2019-12-07 13:35:48,723 INFO L78 Accepts]: Start accepts. Automaton has 39783 states and 127707 transitions. Word has length 25 [2019-12-07 13:35:48,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:48,723 INFO L462 AbstractCegarLoop]: Abstraction has 39783 states and 127707 transitions. [2019-12-07 13:35:48,723 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:35:48,723 INFO L276 IsEmpty]: Start isEmpty. Operand 39783 states and 127707 transitions. [2019-12-07 13:35:48,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:35:48,733 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:48,733 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:48,733 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:48,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:48,733 INFO L82 PathProgramCache]: Analyzing trace with hash -1429942457, now seen corresponding path program 1 times [2019-12-07 13:35:48,733 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:48,734 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2080414663] [2019-12-07 13:35:48,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:48,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:48,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:48,754 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2080414663] [2019-12-07 13:35:48,754 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:48,754 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:35:48,754 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1107145991] [2019-12-07 13:35:48,754 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:35:48,754 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:48,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:35:48,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:35:48,755 INFO L87 Difference]: Start difference. First operand 39783 states and 127707 transitions. Second operand 3 states. [2019-12-07 13:35:48,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:48,926 INFO L93 Difference]: Finished difference Result 56828 states and 180763 transitions. [2019-12-07 13:35:48,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:35:48,927 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 13:35:48,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:49,009 INFO L225 Difference]: With dead ends: 56828 [2019-12-07 13:35:49,009 INFO L226 Difference]: Without dead ends: 56828 [2019-12-07 13:35:49,009 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:35:49,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56828 states. [2019-12-07 13:35:49,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56828 to 42213. [2019-12-07 13:35:49,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42213 states. [2019-12-07 13:35:49,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42213 states to 42213 states and 134977 transitions. [2019-12-07 13:35:49,785 INFO L78 Accepts]: Start accepts. Automaton has 42213 states and 134977 transitions. Word has length 27 [2019-12-07 13:35:49,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:49,786 INFO L462 AbstractCegarLoop]: Abstraction has 42213 states and 134977 transitions. [2019-12-07 13:35:49,786 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:35:49,786 INFO L276 IsEmpty]: Start isEmpty. Operand 42213 states and 134977 transitions. [2019-12-07 13:35:49,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:35:49,796 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:49,796 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:49,796 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:49,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:49,796 INFO L82 PathProgramCache]: Analyzing trace with hash -535275942, now seen corresponding path program 1 times [2019-12-07 13:35:49,797 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:49,797 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [926252341] [2019-12-07 13:35:49,797 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:49,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:49,816 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:49,816 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [926252341] [2019-12-07 13:35:49,816 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:49,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:35:49,816 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1748833078] [2019-12-07 13:35:49,816 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:35:49,817 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:49,817 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:35:49,817 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:35:49,817 INFO L87 Difference]: Start difference. First operand 42213 states and 134977 transitions. Second operand 3 states. [2019-12-07 13:35:50,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:50,002 INFO L93 Difference]: Finished difference Result 62192 states and 195354 transitions. [2019-12-07 13:35:50,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:35:50,003 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 13:35:50,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:50,094 INFO L225 Difference]: With dead ends: 62192 [2019-12-07 13:35:50,094 INFO L226 Difference]: Without dead ends: 62192 [2019-12-07 13:35:50,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:35:50,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62192 states. [2019-12-07 13:35:50,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62192 to 47577. [2019-12-07 13:35:50,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47577 states. [2019-12-07 13:35:50,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47577 states to 47577 states and 149568 transitions. [2019-12-07 13:35:50,983 INFO L78 Accepts]: Start accepts. Automaton has 47577 states and 149568 transitions. Word has length 27 [2019-12-07 13:35:50,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:50,984 INFO L462 AbstractCegarLoop]: Abstraction has 47577 states and 149568 transitions. [2019-12-07 13:35:50,984 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:35:50,984 INFO L276 IsEmpty]: Start isEmpty. Operand 47577 states and 149568 transitions. [2019-12-07 13:35:50,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:35:50,995 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:50,995 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:50,995 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:50,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:50,996 INFO L82 PathProgramCache]: Analyzing trace with hash 1457952739, now seen corresponding path program 1 times [2019-12-07 13:35:50,996 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:50,996 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1639056227] [2019-12-07 13:35:50,996 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:51,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:51,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:51,060 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1639056227] [2019-12-07 13:35:51,060 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:51,060 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:35:51,060 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1426861506] [2019-12-07 13:35:51,061 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:35:51,061 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:51,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:35:51,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:35:51,061 INFO L87 Difference]: Start difference. First operand 47577 states and 149568 transitions. Second operand 6 states. [2019-12-07 13:35:51,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:51,587 INFO L93 Difference]: Finished difference Result 89520 states and 280825 transitions. [2019-12-07 13:35:51,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:35:51,588 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 13:35:51,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:51,718 INFO L225 Difference]: With dead ends: 89520 [2019-12-07 13:35:51,719 INFO L226 Difference]: Without dead ends: 89501 [2019-12-07 13:35:51,719 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:35:52,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89501 states. [2019-12-07 13:35:52,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89501 to 51874. [2019-12-07 13:35:52,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51874 states. [2019-12-07 13:35:52,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51874 states to 51874 states and 162863 transitions. [2019-12-07 13:35:52,842 INFO L78 Accepts]: Start accepts. Automaton has 51874 states and 162863 transitions. Word has length 27 [2019-12-07 13:35:52,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:52,842 INFO L462 AbstractCegarLoop]: Abstraction has 51874 states and 162863 transitions. [2019-12-07 13:35:52,842 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:35:52,842 INFO L276 IsEmpty]: Start isEmpty. Operand 51874 states and 162863 transitions. [2019-12-07 13:35:52,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 13:35:52,856 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:52,856 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:52,857 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:52,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:52,857 INFO L82 PathProgramCache]: Analyzing trace with hash -665356316, now seen corresponding path program 1 times [2019-12-07 13:35:52,857 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:52,857 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158247617] [2019-12-07 13:35:52,857 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:52,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:52,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:52,897 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158247617] [2019-12-07 13:35:52,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:52,897 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:35:52,897 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1284550791] [2019-12-07 13:35:52,897 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:35:52,898 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:52,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:35:52,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:35:52,898 INFO L87 Difference]: Start difference. First operand 51874 states and 162863 transitions. Second operand 5 states. [2019-12-07 13:35:53,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:53,402 INFO L93 Difference]: Finished difference Result 71552 states and 222411 transitions. [2019-12-07 13:35:53,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:35:53,403 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 13:35:53,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:53,509 INFO L225 Difference]: With dead ends: 71552 [2019-12-07 13:35:53,509 INFO L226 Difference]: Without dead ends: 71552 [2019-12-07 13:35:53,509 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:35:53,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71552 states. [2019-12-07 13:35:54,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71552 to 62220. [2019-12-07 13:35:54,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62220 states. [2019-12-07 13:35:54,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62220 states to 62220 states and 195059 transitions. [2019-12-07 13:35:54,657 INFO L78 Accepts]: Start accepts. Automaton has 62220 states and 195059 transitions. Word has length 28 [2019-12-07 13:35:54,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:54,658 INFO L462 AbstractCegarLoop]: Abstraction has 62220 states and 195059 transitions. [2019-12-07 13:35:54,658 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:35:54,658 INFO L276 IsEmpty]: Start isEmpty. Operand 62220 states and 195059 transitions. [2019-12-07 13:35:54,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 13:35:54,679 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:54,679 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:54,679 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:54,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:54,679 INFO L82 PathProgramCache]: Analyzing trace with hash 294567066, now seen corresponding path program 1 times [2019-12-07 13:35:54,680 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:54,680 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577942429] [2019-12-07 13:35:54,680 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:54,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:54,726 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:54,726 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1577942429] [2019-12-07 13:35:54,726 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:54,726 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:35:54,726 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2036185396] [2019-12-07 13:35:54,727 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:35:54,727 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:54,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:35:54,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:35:54,727 INFO L87 Difference]: Start difference. First operand 62220 states and 195059 transitions. Second operand 5 states. [2019-12-07 13:35:54,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:54,931 INFO L93 Difference]: Finished difference Result 63493 states and 198752 transitions. [2019-12-07 13:35:54,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:35:54,931 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 13:35:54,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:55,015 INFO L225 Difference]: With dead ends: 63493 [2019-12-07 13:35:55,015 INFO L226 Difference]: Without dead ends: 63493 [2019-12-07 13:35:55,016 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:35:55,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63493 states. [2019-12-07 13:35:55,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63493 to 63493. [2019-12-07 13:35:55,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63493 states. [2019-12-07 13:35:55,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63493 states to 63493 states and 198752 transitions. [2019-12-07 13:35:55,988 INFO L78 Accepts]: Start accepts. Automaton has 63493 states and 198752 transitions. Word has length 28 [2019-12-07 13:35:55,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:55,988 INFO L462 AbstractCegarLoop]: Abstraction has 63493 states and 198752 transitions. [2019-12-07 13:35:55,988 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:35:55,989 INFO L276 IsEmpty]: Start isEmpty. Operand 63493 states and 198752 transitions. [2019-12-07 13:35:56,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 13:35:56,006 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:56,007 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:56,007 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:56,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:56,007 INFO L82 PathProgramCache]: Analyzing trace with hash 1921906081, now seen corresponding path program 1 times [2019-12-07 13:35:56,007 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:56,007 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1956123273] [2019-12-07 13:35:56,007 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:56,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:56,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:56,053 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1956123273] [2019-12-07 13:35:56,053 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:56,053 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:35:56,053 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1188064562] [2019-12-07 13:35:56,053 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:35:56,053 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:56,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:35:56,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:35:56,054 INFO L87 Difference]: Start difference. First operand 63493 states and 198752 transitions. Second operand 4 states. [2019-12-07 13:35:56,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:56,379 INFO L93 Difference]: Finished difference Result 115299 states and 360421 transitions. [2019-12-07 13:35:56,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:35:56,380 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 13:35:56,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:56,540 INFO L225 Difference]: With dead ends: 115299 [2019-12-07 13:35:56,540 INFO L226 Difference]: Without dead ends: 100920 [2019-12-07 13:35:56,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:35:56,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100920 states. [2019-12-07 13:35:58,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100920 to 99483. [2019-12-07 13:35:58,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99483 states. [2019-12-07 13:35:58,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99483 states to 99483 states and 310689 transitions. [2019-12-07 13:35:58,298 INFO L78 Accepts]: Start accepts. Automaton has 99483 states and 310689 transitions. Word has length 29 [2019-12-07 13:35:58,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:58,298 INFO L462 AbstractCegarLoop]: Abstraction has 99483 states and 310689 transitions. [2019-12-07 13:35:58,298 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:35:58,298 INFO L276 IsEmpty]: Start isEmpty. Operand 99483 states and 310689 transitions. [2019-12-07 13:35:58,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 13:35:58,332 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:58,332 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:58,332 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:58,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:58,332 INFO L82 PathProgramCache]: Analyzing trace with hash -408172822, now seen corresponding path program 1 times [2019-12-07 13:35:58,333 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:35:58,333 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945657293] [2019-12-07 13:35:58,333 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:58,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:58,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:58,395 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945657293] [2019-12-07 13:35:58,395 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:58,395 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:35:58,395 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1253492984] [2019-12-07 13:35:58,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:35:58,395 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:35:58,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:35:58,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:35:58,395 INFO L87 Difference]: Start difference. First operand 99483 states and 310689 transitions. Second operand 6 states. [2019-12-07 13:35:59,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:59,249 INFO L93 Difference]: Finished difference Result 143247 states and 442200 transitions. [2019-12-07 13:35:59,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:35:59,250 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2019-12-07 13:35:59,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:59,476 INFO L225 Difference]: With dead ends: 143247 [2019-12-07 13:35:59,477 INFO L226 Difference]: Without dead ends: 143225 [2019-12-07 13:35:59,477 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:35:59,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143225 states. [2019-12-07 13:36:01,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143225 to 100278. [2019-12-07 13:36:01,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100278 states. [2019-12-07 13:36:01,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100278 states to 100278 states and 313064 transitions. [2019-12-07 13:36:01,531 INFO L78 Accepts]: Start accepts. Automaton has 100278 states and 313064 transitions. Word has length 29 [2019-12-07 13:36:01,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:01,531 INFO L462 AbstractCegarLoop]: Abstraction has 100278 states and 313064 transitions. [2019-12-07 13:36:01,531 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:36:01,531 INFO L276 IsEmpty]: Start isEmpty. Operand 100278 states and 313064 transitions. [2019-12-07 13:36:01,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 13:36:01,572 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:01,573 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:01,573 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:01,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:01,573 INFO L82 PathProgramCache]: Analyzing trace with hash -58977604, now seen corresponding path program 1 times [2019-12-07 13:36:01,573 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:01,573 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [409815722] [2019-12-07 13:36:01,574 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:01,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:01,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:01,632 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [409815722] [2019-12-07 13:36:01,632 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:01,633 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:36:01,633 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324510387] [2019-12-07 13:36:01,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:36:01,633 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:01,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:36:01,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:01,634 INFO L87 Difference]: Start difference. First operand 100278 states and 313064 transitions. Second operand 4 states. [2019-12-07 13:36:02,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:02,210 INFO L93 Difference]: Finished difference Result 137798 states and 431145 transitions. [2019-12-07 13:36:02,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:36:02,211 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 13:36:02,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:02,291 INFO L225 Difference]: With dead ends: 137798 [2019-12-07 13:36:02,291 INFO L226 Difference]: Without dead ends: 53813 [2019-12-07 13:36:02,291 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:02,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53813 states. [2019-12-07 13:36:03,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53813 to 50530. [2019-12-07 13:36:03,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50530 states. [2019-12-07 13:36:03,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50530 states to 50530 states and 156132 transitions. [2019-12-07 13:36:03,120 INFO L78 Accepts]: Start accepts. Automaton has 50530 states and 156132 transitions. Word has length 30 [2019-12-07 13:36:03,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:03,121 INFO L462 AbstractCegarLoop]: Abstraction has 50530 states and 156132 transitions. [2019-12-07 13:36:03,121 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:36:03,121 INFO L276 IsEmpty]: Start isEmpty. Operand 50530 states and 156132 transitions. [2019-12-07 13:36:03,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 13:36:03,136 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:03,136 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:03,136 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:03,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:03,137 INFO L82 PathProgramCache]: Analyzing trace with hash -1385438307, now seen corresponding path program 1 times [2019-12-07 13:36:03,137 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:03,137 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2043941120] [2019-12-07 13:36:03,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:03,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:03,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:03,178 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2043941120] [2019-12-07 13:36:03,178 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:03,178 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:36:03,178 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [972796166] [2019-12-07 13:36:03,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:03,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:03,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:03,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:03,179 INFO L87 Difference]: Start difference. First operand 50530 states and 156132 transitions. Second operand 3 states. [2019-12-07 13:36:03,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:03,319 INFO L93 Difference]: Finished difference Result 50530 states and 154569 transitions. [2019-12-07 13:36:03,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:03,319 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2019-12-07 13:36:03,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:03,395 INFO L225 Difference]: With dead ends: 50530 [2019-12-07 13:36:03,396 INFO L226 Difference]: Without dead ends: 50530 [2019-12-07 13:36:03,396 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:03,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50530 states. [2019-12-07 13:36:04,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50530 to 49985. [2019-12-07 13:36:04,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49985 states. [2019-12-07 13:36:04,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49985 states to 49985 states and 153009 transitions. [2019-12-07 13:36:04,171 INFO L78 Accepts]: Start accepts. Automaton has 49985 states and 153009 transitions. Word has length 30 [2019-12-07 13:36:04,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:04,171 INFO L462 AbstractCegarLoop]: Abstraction has 49985 states and 153009 transitions. [2019-12-07 13:36:04,171 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:04,171 INFO L276 IsEmpty]: Start isEmpty. Operand 49985 states and 153009 transitions. [2019-12-07 13:36:04,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 13:36:04,187 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:04,187 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:04,187 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:04,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:04,187 INFO L82 PathProgramCache]: Analyzing trace with hash 313779856, now seen corresponding path program 1 times [2019-12-07 13:36:04,188 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:04,188 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1877581299] [2019-12-07 13:36:04,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:04,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:04,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:04,214 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1877581299] [2019-12-07 13:36:04,214 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:04,214 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:36:04,214 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [841999561] [2019-12-07 13:36:04,214 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:36:04,214 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:04,215 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:36:04,215 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:04,215 INFO L87 Difference]: Start difference. First operand 49985 states and 153009 transitions. Second operand 4 states. [2019-12-07 13:36:04,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:04,274 INFO L93 Difference]: Finished difference Result 22329 states and 64167 transitions. [2019-12-07 13:36:04,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:36:04,275 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 13:36:04,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:04,296 INFO L225 Difference]: With dead ends: 22329 [2019-12-07 13:36:04,296 INFO L226 Difference]: Without dead ends: 22329 [2019-12-07 13:36:04,297 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:04,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22329 states. [2019-12-07 13:36:04,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22329 to 21091. [2019-12-07 13:36:04,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21091 states. [2019-12-07 13:36:04,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21091 states to 21091 states and 60906 transitions. [2019-12-07 13:36:04,579 INFO L78 Accepts]: Start accepts. Automaton has 21091 states and 60906 transitions. Word has length 31 [2019-12-07 13:36:04,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:04,579 INFO L462 AbstractCegarLoop]: Abstraction has 21091 states and 60906 transitions. [2019-12-07 13:36:04,579 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:36:04,579 INFO L276 IsEmpty]: Start isEmpty. Operand 21091 states and 60906 transitions. [2019-12-07 13:36:04,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 13:36:04,592 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:04,592 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:04,592 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:04,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:04,592 INFO L82 PathProgramCache]: Analyzing trace with hash 1705939963, now seen corresponding path program 1 times [2019-12-07 13:36:04,592 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:04,592 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048896544] [2019-12-07 13:36:04,592 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:04,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:04,667 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:04,667 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1048896544] [2019-12-07 13:36:04,668 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:04,668 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:36:04,668 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1675986226] [2019-12-07 13:36:04,668 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:36:04,668 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:04,668 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:36:04,668 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:36:04,668 INFO L87 Difference]: Start difference. First operand 21091 states and 60906 transitions. Second operand 7 states. [2019-12-07 13:36:05,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:05,362 INFO L93 Difference]: Finished difference Result 39056 states and 110521 transitions. [2019-12-07 13:36:05,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:36:05,363 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 13:36:05,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:05,402 INFO L225 Difference]: With dead ends: 39056 [2019-12-07 13:36:05,402 INFO L226 Difference]: Without dead ends: 39056 [2019-12-07 13:36:05,403 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:36:05,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39056 states. [2019-12-07 13:36:05,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39056 to 22425. [2019-12-07 13:36:05,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22425 states. [2019-12-07 13:36:05,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22425 states to 22425 states and 64662 transitions. [2019-12-07 13:36:05,809 INFO L78 Accepts]: Start accepts. Automaton has 22425 states and 64662 transitions. Word has length 33 [2019-12-07 13:36:05,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:05,809 INFO L462 AbstractCegarLoop]: Abstraction has 22425 states and 64662 transitions. [2019-12-07 13:36:05,809 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:36:05,809 INFO L276 IsEmpty]: Start isEmpty. Operand 22425 states and 64662 transitions. [2019-12-07 13:36:05,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 13:36:05,821 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:05,822 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:05,822 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:05,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:05,822 INFO L82 PathProgramCache]: Analyzing trace with hash 1567643153, now seen corresponding path program 2 times [2019-12-07 13:36:05,822 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:05,822 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1493792235] [2019-12-07 13:36:05,822 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:05,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:05,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:05,906 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1493792235] [2019-12-07 13:36:05,906 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:05,906 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:36:05,906 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161356567] [2019-12-07 13:36:05,906 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 13:36:05,906 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:05,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 13:36:05,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:36:05,907 INFO L87 Difference]: Start difference. First operand 22425 states and 64662 transitions. Second operand 8 states. [2019-12-07 13:36:06,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:06,893 INFO L93 Difference]: Finished difference Result 47586 states and 133231 transitions. [2019-12-07 13:36:06,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 13:36:06,893 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 13:36:06,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:06,942 INFO L225 Difference]: With dead ends: 47586 [2019-12-07 13:36:06,942 INFO L226 Difference]: Without dead ends: 47586 [2019-12-07 13:36:06,943 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 13:36:07,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47586 states. [2019-12-07 13:36:07,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47586 to 22039. [2019-12-07 13:36:07,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22039 states. [2019-12-07 13:36:07,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22039 states to 22039 states and 63546 transitions. [2019-12-07 13:36:07,411 INFO L78 Accepts]: Start accepts. Automaton has 22039 states and 63546 transitions. Word has length 33 [2019-12-07 13:36:07,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:07,411 INFO L462 AbstractCegarLoop]: Abstraction has 22039 states and 63546 transitions. [2019-12-07 13:36:07,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 13:36:07,411 INFO L276 IsEmpty]: Start isEmpty. Operand 22039 states and 63546 transitions. [2019-12-07 13:36:07,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 13:36:07,425 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:07,425 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:07,425 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:07,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:07,426 INFO L82 PathProgramCache]: Analyzing trace with hash 1684348162, now seen corresponding path program 1 times [2019-12-07 13:36:07,426 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:07,426 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [560024740] [2019-12-07 13:36:07,426 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:07,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:07,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:07,510 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [560024740] [2019-12-07 13:36:07,510 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:07,510 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:36:07,510 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [898180570] [2019-12-07 13:36:07,511 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:36:07,511 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:07,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:36:07,511 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:36:07,511 INFO L87 Difference]: Start difference. First operand 22039 states and 63546 transitions. Second operand 7 states. [2019-12-07 13:36:08,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:08,291 INFO L93 Difference]: Finished difference Result 37163 states and 104784 transitions. [2019-12-07 13:36:08,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:36:08,291 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 35 [2019-12-07 13:36:08,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:08,326 INFO L225 Difference]: With dead ends: 37163 [2019-12-07 13:36:08,326 INFO L226 Difference]: Without dead ends: 37163 [2019-12-07 13:36:08,327 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:36:08,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37163 states. [2019-12-07 13:36:08,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37163 to 21701. [2019-12-07 13:36:08,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21701 states. [2019-12-07 13:36:08,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21701 states to 21701 states and 62573 transitions. [2019-12-07 13:36:08,717 INFO L78 Accepts]: Start accepts. Automaton has 21701 states and 62573 transitions. Word has length 35 [2019-12-07 13:36:08,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:08,717 INFO L462 AbstractCegarLoop]: Abstraction has 21701 states and 62573 transitions. [2019-12-07 13:36:08,717 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:36:08,717 INFO L276 IsEmpty]: Start isEmpty. Operand 21701 states and 62573 transitions. [2019-12-07 13:36:08,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 13:36:08,731 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:08,731 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:08,731 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:08,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:08,731 INFO L82 PathProgramCache]: Analyzing trace with hash -480848370, now seen corresponding path program 2 times [2019-12-07 13:36:08,731 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:08,731 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749956133] [2019-12-07 13:36:08,731 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:08,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:08,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:08,846 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1749956133] [2019-12-07 13:36:08,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:08,846 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:36:08,846 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [510592551] [2019-12-07 13:36:08,846 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 13:36:08,847 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:08,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 13:36:08,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:36:08,847 INFO L87 Difference]: Start difference. First operand 21701 states and 62573 transitions. Second operand 9 states. [2019-12-07 13:36:09,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:09,856 INFO L93 Difference]: Finished difference Result 46848 states and 130319 transitions. [2019-12-07 13:36:09,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 13:36:09,856 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 35 [2019-12-07 13:36:09,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:09,902 INFO L225 Difference]: With dead ends: 46848 [2019-12-07 13:36:09,902 INFO L226 Difference]: Without dead ends: 46848 [2019-12-07 13:36:09,903 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=284, Unknown=0, NotChecked=0, Total=380 [2019-12-07 13:36:10,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46848 states. [2019-12-07 13:36:10,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46848 to 21371. [2019-12-07 13:36:10,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21371 states. [2019-12-07 13:36:10,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21371 states to 21371 states and 61580 transitions. [2019-12-07 13:36:10,352 INFO L78 Accepts]: Start accepts. Automaton has 21371 states and 61580 transitions. Word has length 35 [2019-12-07 13:36:10,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:10,352 INFO L462 AbstractCegarLoop]: Abstraction has 21371 states and 61580 transitions. [2019-12-07 13:36:10,352 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 13:36:10,352 INFO L276 IsEmpty]: Start isEmpty. Operand 21371 states and 61580 transitions. [2019-12-07 13:36:10,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 13:36:10,365 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:10,365 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:10,365 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:10,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:10,365 INFO L82 PathProgramCache]: Analyzing trace with hash 1086264592, now seen corresponding path program 3 times [2019-12-07 13:36:10,365 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:10,365 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [140821626] [2019-12-07 13:36:10,365 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:10,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:10,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:10,487 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [140821626] [2019-12-07 13:36:10,487 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:10,487 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:36:10,487 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624283352] [2019-12-07 13:36:10,488 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:36:10,488 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:10,488 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:36:10,488 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:36:10,488 INFO L87 Difference]: Start difference. First operand 21371 states and 61580 transitions. Second operand 10 states. [2019-12-07 13:36:11,194 WARN L192 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 21 [2019-12-07 13:36:12,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:12,905 INFO L93 Difference]: Finished difference Result 39635 states and 111341 transitions. [2019-12-07 13:36:12,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 13:36:12,905 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 35 [2019-12-07 13:36:12,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:12,948 INFO L225 Difference]: With dead ends: 39635 [2019-12-07 13:36:12,949 INFO L226 Difference]: Without dead ends: 39635 [2019-12-07 13:36:12,949 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=156, Invalid=494, Unknown=0, NotChecked=0, Total=650 [2019-12-07 13:36:13,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39635 states. [2019-12-07 13:36:13,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39635 to 20857. [2019-12-07 13:36:13,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20857 states. [2019-12-07 13:36:13,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20857 states to 20857 states and 60130 transitions. [2019-12-07 13:36:13,358 INFO L78 Accepts]: Start accepts. Automaton has 20857 states and 60130 transitions. Word has length 35 [2019-12-07 13:36:13,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:13,359 INFO L462 AbstractCegarLoop]: Abstraction has 20857 states and 60130 transitions. [2019-12-07 13:36:13,359 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:36:13,359 INFO L276 IsEmpty]: Start isEmpty. Operand 20857 states and 60130 transitions. [2019-12-07 13:36:13,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:36:13,374 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:13,374 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:13,374 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:13,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:13,375 INFO L82 PathProgramCache]: Analyzing trace with hash 1495667795, now seen corresponding path program 1 times [2019-12-07 13:36:13,375 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:13,375 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1193850618] [2019-12-07 13:36:13,375 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:13,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:13,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:13,411 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1193850618] [2019-12-07 13:36:13,411 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:13,411 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:36:13,411 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [693035853] [2019-12-07 13:36:13,412 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:36:13,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:13,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:36:13,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:13,412 INFO L87 Difference]: Start difference. First operand 20857 states and 60130 transitions. Second operand 5 states. [2019-12-07 13:36:13,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:13,476 INFO L93 Difference]: Finished difference Result 19610 states and 57324 transitions. [2019-12-07 13:36:13,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:36:13,476 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 13:36:13,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:13,494 INFO L225 Difference]: With dead ends: 19610 [2019-12-07 13:36:13,495 INFO L226 Difference]: Without dead ends: 17808 [2019-12-07 13:36:13,495 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:13,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17808 states. [2019-12-07 13:36:13,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17808 to 16807. [2019-12-07 13:36:13,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16807 states. [2019-12-07 13:36:13,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16807 states to 16807 states and 50403 transitions. [2019-12-07 13:36:13,739 INFO L78 Accepts]: Start accepts. Automaton has 16807 states and 50403 transitions. Word has length 41 [2019-12-07 13:36:13,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:13,739 INFO L462 AbstractCegarLoop]: Abstraction has 16807 states and 50403 transitions. [2019-12-07 13:36:13,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:36:13,739 INFO L276 IsEmpty]: Start isEmpty. Operand 16807 states and 50403 transitions. [2019-12-07 13:36:13,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:36:13,753 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:13,753 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:13,753 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:13,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:13,753 INFO L82 PathProgramCache]: Analyzing trace with hash 123999106, now seen corresponding path program 1 times [2019-12-07 13:36:13,754 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:13,754 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742475114] [2019-12-07 13:36:13,754 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:13,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:13,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:13,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742475114] [2019-12-07 13:36:13,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:13,819 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:36:13,819 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [529534691] [2019-12-07 13:36:13,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:36:13,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:13,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:36:13,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:36:13,820 INFO L87 Difference]: Start difference. First operand 16807 states and 50403 transitions. Second operand 7 states. [2019-12-07 13:36:14,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:14,689 INFO L93 Difference]: Finished difference Result 33625 states and 99060 transitions. [2019-12-07 13:36:14,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 13:36:14,689 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 13:36:14,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:14,724 INFO L225 Difference]: With dead ends: 33625 [2019-12-07 13:36:14,724 INFO L226 Difference]: Without dead ends: 33625 [2019-12-07 13:36:14,725 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:36:14,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33625 states. [2019-12-07 13:36:15,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33625 to 17457. [2019-12-07 13:36:15,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17457 states. [2019-12-07 13:36:15,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17457 states to 17457 states and 52397 transitions. [2019-12-07 13:36:15,083 INFO L78 Accepts]: Start accepts. Automaton has 17457 states and 52397 transitions. Word has length 65 [2019-12-07 13:36:15,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:15,084 INFO L462 AbstractCegarLoop]: Abstraction has 17457 states and 52397 transitions. [2019-12-07 13:36:15,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:36:15,084 INFO L276 IsEmpty]: Start isEmpty. Operand 17457 states and 52397 transitions. [2019-12-07 13:36:15,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:36:15,098 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:15,098 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:15,098 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:15,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:15,099 INFO L82 PathProgramCache]: Analyzing trace with hash -1726252574, now seen corresponding path program 2 times [2019-12-07 13:36:15,099 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:15,099 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217707114] [2019-12-07 13:36:15,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:15,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:15,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:15,153 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1217707114] [2019-12-07 13:36:15,154 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:15,154 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:36:15,154 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635134991] [2019-12-07 13:36:15,154 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:36:15,154 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:15,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:36:15,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:36:15,154 INFO L87 Difference]: Start difference. First operand 17457 states and 52397 transitions. Second operand 6 states. [2019-12-07 13:36:15,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:15,515 INFO L93 Difference]: Finished difference Result 21025 states and 62400 transitions. [2019-12-07 13:36:15,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 13:36:15,516 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 13:36:15,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:15,536 INFO L225 Difference]: With dead ends: 21025 [2019-12-07 13:36:15,536 INFO L226 Difference]: Without dead ends: 21025 [2019-12-07 13:36:15,536 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:36:15,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21025 states. [2019-12-07 13:36:15,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21025 to 17728. [2019-12-07 13:36:15,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17728 states. [2019-12-07 13:36:15,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17728 states to 17728 states and 53226 transitions. [2019-12-07 13:36:15,801 INFO L78 Accepts]: Start accepts. Automaton has 17728 states and 53226 transitions. Word has length 65 [2019-12-07 13:36:15,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:15,802 INFO L462 AbstractCegarLoop]: Abstraction has 17728 states and 53226 transitions. [2019-12-07 13:36:15,802 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:36:15,802 INFO L276 IsEmpty]: Start isEmpty. Operand 17728 states and 53226 transitions. [2019-12-07 13:36:15,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:36:15,816 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:15,816 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:15,816 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:15,817 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:15,817 INFO L82 PathProgramCache]: Analyzing trace with hash 1692724544, now seen corresponding path program 3 times [2019-12-07 13:36:15,817 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:15,817 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892298779] [2019-12-07 13:36:15,817 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:15,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:15,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:15,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1892298779] [2019-12-07 13:36:15,858 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:15,858 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:36:15,859 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1740303660] [2019-12-07 13:36:15,859 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:36:15,859 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:15,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:36:15,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:15,859 INFO L87 Difference]: Start difference. First operand 17728 states and 53226 transitions. Second operand 5 states. [2019-12-07 13:36:16,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:16,074 INFO L93 Difference]: Finished difference Result 19533 states and 58206 transitions. [2019-12-07 13:36:16,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:36:16,075 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 13:36:16,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:16,093 INFO L225 Difference]: With dead ends: 19533 [2019-12-07 13:36:16,093 INFO L226 Difference]: Without dead ends: 19533 [2019-12-07 13:36:16,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:36:16,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19533 states. [2019-12-07 13:36:16,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19533 to 17932. [2019-12-07 13:36:16,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17932 states. [2019-12-07 13:36:16,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17932 states to 17932 states and 53837 transitions. [2019-12-07 13:36:16,380 INFO L78 Accepts]: Start accepts. Automaton has 17932 states and 53837 transitions. Word has length 65 [2019-12-07 13:36:16,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:16,381 INFO L462 AbstractCegarLoop]: Abstraction has 17932 states and 53837 transitions. [2019-12-07 13:36:16,381 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:36:16,381 INFO L276 IsEmpty]: Start isEmpty. Operand 17932 states and 53837 transitions. [2019-12-07 13:36:16,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:36:16,395 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:16,395 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:16,395 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:16,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:16,395 INFO L82 PathProgramCache]: Analyzing trace with hash -1880310140, now seen corresponding path program 4 times [2019-12-07 13:36:16,395 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:16,395 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1932621245] [2019-12-07 13:36:16,396 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:16,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:16,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:16,455 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1932621245] [2019-12-07 13:36:16,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:16,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:36:16,455 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1421716111] [2019-12-07 13:36:16,456 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:36:16,456 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:16,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:36:16,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:36:16,456 INFO L87 Difference]: Start difference. First operand 17932 states and 53837 transitions. Second operand 7 states. [2019-12-07 13:36:16,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:16,928 INFO L93 Difference]: Finished difference Result 34866 states and 102868 transitions. [2019-12-07 13:36:16,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 13:36:16,928 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 13:36:16,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:16,965 INFO L225 Difference]: With dead ends: 34866 [2019-12-07 13:36:16,965 INFO L226 Difference]: Without dead ends: 34866 [2019-12-07 13:36:16,966 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:36:17,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34866 states. [2019-12-07 13:36:17,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34866 to 18916. [2019-12-07 13:36:17,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18916 states. [2019-12-07 13:36:17,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18916 states to 18916 states and 56760 transitions. [2019-12-07 13:36:17,342 INFO L78 Accepts]: Start accepts. Automaton has 18916 states and 56760 transitions. Word has length 65 [2019-12-07 13:36:17,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:17,343 INFO L462 AbstractCegarLoop]: Abstraction has 18916 states and 56760 transitions. [2019-12-07 13:36:17,343 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:36:17,343 INFO L276 IsEmpty]: Start isEmpty. Operand 18916 states and 56760 transitions. [2019-12-07 13:36:17,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:36:17,358 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:17,358 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:17,358 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:17,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:17,359 INFO L82 PathProgramCache]: Analyzing trace with hash -1513643164, now seen corresponding path program 5 times [2019-12-07 13:36:17,359 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:17,359 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492153355] [2019-12-07 13:36:17,359 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:17,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:17,417 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:17,417 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492153355] [2019-12-07 13:36:17,417 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:17,417 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:36:17,417 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [583717973] [2019-12-07 13:36:17,417 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:36:17,417 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:17,418 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:36:17,418 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:36:17,418 INFO L87 Difference]: Start difference. First operand 18916 states and 56760 transitions. Second operand 6 states. [2019-12-07 13:36:17,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:17,841 INFO L93 Difference]: Finished difference Result 34910 states and 102930 transitions. [2019-12-07 13:36:17,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 13:36:17,842 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 13:36:17,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:17,880 INFO L225 Difference]: With dead ends: 34910 [2019-12-07 13:36:17,880 INFO L226 Difference]: Without dead ends: 34910 [2019-12-07 13:36:17,880 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:36:17,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34910 states. [2019-12-07 13:36:18,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34910 to 21739. [2019-12-07 13:36:18,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21739 states. [2019-12-07 13:36:18,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21739 states to 21739 states and 65519 transitions. [2019-12-07 13:36:18,275 INFO L78 Accepts]: Start accepts. Automaton has 21739 states and 65519 transitions. Word has length 65 [2019-12-07 13:36:18,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:18,275 INFO L462 AbstractCegarLoop]: Abstraction has 21739 states and 65519 transitions. [2019-12-07 13:36:18,276 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:36:18,276 INFO L276 IsEmpty]: Start isEmpty. Operand 21739 states and 65519 transitions. [2019-12-07 13:36:18,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:36:18,293 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:18,293 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:18,293 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:18,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:18,293 INFO L82 PathProgramCache]: Analyzing trace with hash 412816842, now seen corresponding path program 6 times [2019-12-07 13:36:18,293 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:18,293 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1710287147] [2019-12-07 13:36:18,293 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:18,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:18,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:18,343 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1710287147] [2019-12-07 13:36:18,343 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:18,344 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:36:18,344 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1342433507] [2019-12-07 13:36:18,344 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:36:18,344 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:18,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:36:18,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:36:18,344 INFO L87 Difference]: Start difference. First operand 21739 states and 65519 transitions. Second operand 6 states. [2019-12-07 13:36:18,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:18,609 INFO L93 Difference]: Finished difference Result 23759 states and 70973 transitions. [2019-12-07 13:36:18,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 13:36:18,610 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 13:36:18,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:18,633 INFO L225 Difference]: With dead ends: 23759 [2019-12-07 13:36:18,633 INFO L226 Difference]: Without dead ends: 23759 [2019-12-07 13:36:18,633 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:36:18,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23759 states. [2019-12-07 13:36:18,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23759 to 21969. [2019-12-07 13:36:18,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21969 states. [2019-12-07 13:36:18,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21969 states to 21969 states and 66172 transitions. [2019-12-07 13:36:18,945 INFO L78 Accepts]: Start accepts. Automaton has 21969 states and 66172 transitions. Word has length 65 [2019-12-07 13:36:18,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:18,945 INFO L462 AbstractCegarLoop]: Abstraction has 21969 states and 66172 transitions. [2019-12-07 13:36:18,945 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:36:18,945 INFO L276 IsEmpty]: Start isEmpty. Operand 21969 states and 66172 transitions. [2019-12-07 13:36:18,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:36:18,962 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:18,962 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:18,962 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:18,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:18,963 INFO L82 PathProgramCache]: Analyzing trace with hash -270198330, now seen corresponding path program 7 times [2019-12-07 13:36:18,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:18,963 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [14091112] [2019-12-07 13:36:18,963 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:18,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:19,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:19,013 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [14091112] [2019-12-07 13:36:19,013 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:19,013 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:36:19,013 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [976276669] [2019-12-07 13:36:19,014 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:36:19,014 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:19,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:36:19,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:36:19,014 INFO L87 Difference]: Start difference. First operand 21969 states and 66172 transitions. Second operand 7 states. [2019-12-07 13:36:20,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:20,582 INFO L93 Difference]: Finished difference Result 35221 states and 103655 transitions. [2019-12-07 13:36:20,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 13:36:20,583 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 13:36:20,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:20,637 INFO L225 Difference]: With dead ends: 35221 [2019-12-07 13:36:20,638 INFO L226 Difference]: Without dead ends: 35221 [2019-12-07 13:36:20,638 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:36:20,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35221 states. [2019-12-07 13:36:21,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35221 to 20093. [2019-12-07 13:36:21,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20093 states. [2019-12-07 13:36:21,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20093 states to 20093 states and 60431 transitions. [2019-12-07 13:36:21,040 INFO L78 Accepts]: Start accepts. Automaton has 20093 states and 60431 transitions. Word has length 65 [2019-12-07 13:36:21,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:21,040 INFO L462 AbstractCegarLoop]: Abstraction has 20093 states and 60431 transitions. [2019-12-07 13:36:21,040 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:36:21,040 INFO L276 IsEmpty]: Start isEmpty. Operand 20093 states and 60431 transitions. [2019-12-07 13:36:21,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:36:21,057 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:21,058 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:21,058 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:21,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:21,058 INFO L82 PathProgramCache]: Analyzing trace with hash -1073066530, now seen corresponding path program 8 times [2019-12-07 13:36:21,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:21,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591173517] [2019-12-07 13:36:21,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:21,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:21,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:21,138 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591173517] [2019-12-07 13:36:21,138 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:21,138 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:36:21,138 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [427163124] [2019-12-07 13:36:21,138 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 13:36:21,138 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:21,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 13:36:21,139 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:36:21,139 INFO L87 Difference]: Start difference. First operand 20093 states and 60431 transitions. Second operand 9 states. [2019-12-07 13:36:23,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:23,027 INFO L93 Difference]: Finished difference Result 103819 states and 305512 transitions. [2019-12-07 13:36:23,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 13:36:23,027 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 65 [2019-12-07 13:36:23,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:23,137 INFO L225 Difference]: With dead ends: 103819 [2019-12-07 13:36:23,137 INFO L226 Difference]: Without dead ends: 92657 [2019-12-07 13:36:23,137 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=151, Invalid=499, Unknown=0, NotChecked=0, Total=650 [2019-12-07 13:36:23,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92657 states. [2019-12-07 13:36:23,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92657 to 21741. [2019-12-07 13:36:23,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21741 states. [2019-12-07 13:36:23,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21741 states to 21741 states and 65416 transitions. [2019-12-07 13:36:23,956 INFO L78 Accepts]: Start accepts. Automaton has 21741 states and 65416 transitions. Word has length 65 [2019-12-07 13:36:23,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:23,956 INFO L462 AbstractCegarLoop]: Abstraction has 21741 states and 65416 transitions. [2019-12-07 13:36:23,956 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 13:36:23,957 INFO L276 IsEmpty]: Start isEmpty. Operand 21741 states and 65416 transitions. [2019-12-07 13:36:23,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:36:23,976 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:23,976 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:23,977 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:23,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:23,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1592654570, now seen corresponding path program 9 times [2019-12-07 13:36:23,977 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:23,977 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1871485511] [2019-12-07 13:36:23,977 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:23,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:24,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:24,187 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1871485511] [2019-12-07 13:36:24,187 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:24,187 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 13:36:24,187 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [713512321] [2019-12-07 13:36:24,188 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 13:36:24,188 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:24,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 13:36:24,188 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2019-12-07 13:36:24,188 INFO L87 Difference]: Start difference. First operand 21741 states and 65416 transitions. Second operand 14 states. [2019-12-07 13:36:24,747 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 29 [2019-12-07 13:36:25,698 WARN L192 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 27 [2019-12-07 13:36:26,223 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 21 [2019-12-07 13:36:27,083 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 22 [2019-12-07 13:36:31,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:31,457 INFO L93 Difference]: Finished difference Result 53388 states and 155028 transitions. [2019-12-07 13:36:31,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-12-07 13:36:31,457 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 65 [2019-12-07 13:36:31,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:31,522 INFO L225 Difference]: With dead ends: 53388 [2019-12-07 13:36:31,522 INFO L226 Difference]: Without dead ends: 53388 [2019-12-07 13:36:31,523 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 583 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=410, Invalid=1752, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 13:36:31,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53388 states. [2019-12-07 13:36:32,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53388 to 21268. [2019-12-07 13:36:32,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21268 states. [2019-12-07 13:36:32,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21268 states to 21268 states and 63220 transitions. [2019-12-07 13:36:32,093 INFO L78 Accepts]: Start accepts. Automaton has 21268 states and 63220 transitions. Word has length 65 [2019-12-07 13:36:32,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:32,094 INFO L462 AbstractCegarLoop]: Abstraction has 21268 states and 63220 transitions. [2019-12-07 13:36:32,094 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 13:36:32,094 INFO L276 IsEmpty]: Start isEmpty. Operand 21268 states and 63220 transitions. [2019-12-07 13:36:32,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:36:32,112 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:32,112 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:32,112 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:32,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:32,112 INFO L82 PathProgramCache]: Analyzing trace with hash -1152601156, now seen corresponding path program 10 times [2019-12-07 13:36:32,112 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:32,113 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254312962] [2019-12-07 13:36:32,113 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:32,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:32,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:32,194 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254312962] [2019-12-07 13:36:32,194 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:32,194 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:36:32,194 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653349803] [2019-12-07 13:36:32,194 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 13:36:32,195 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:32,195 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 13:36:32,195 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:36:32,195 INFO L87 Difference]: Start difference. First operand 21268 states and 63220 transitions. Second operand 9 states. [2019-12-07 13:36:33,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:33,777 INFO L93 Difference]: Finished difference Result 126418 states and 367272 transitions. [2019-12-07 13:36:33,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 13:36:33,778 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 65 [2019-12-07 13:36:33,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:33,880 INFO L225 Difference]: With dead ends: 126418 [2019-12-07 13:36:33,880 INFO L226 Difference]: Without dead ends: 88618 [2019-12-07 13:36:33,881 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 635 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=421, Invalid=1559, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 13:36:34,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88618 states. [2019-12-07 13:36:34,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88618 to 22994. [2019-12-07 13:36:34,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22994 states. [2019-12-07 13:36:34,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22994 states to 22994 states and 68105 transitions. [2019-12-07 13:36:34,679 INFO L78 Accepts]: Start accepts. Automaton has 22994 states and 68105 transitions. Word has length 65 [2019-12-07 13:36:34,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:34,680 INFO L462 AbstractCegarLoop]: Abstraction has 22994 states and 68105 transitions. [2019-12-07 13:36:34,680 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 13:36:34,680 INFO L276 IsEmpty]: Start isEmpty. Operand 22994 states and 68105 transitions. [2019-12-07 13:36:34,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:36:34,700 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:34,701 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:34,701 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:34,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:34,701 INFO L82 PathProgramCache]: Analyzing trace with hash -1532167548, now seen corresponding path program 11 times [2019-12-07 13:36:34,701 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:34,701 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1297749772] [2019-12-07 13:36:34,701 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:34,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:34,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:34,755 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1297749772] [2019-12-07 13:36:34,755 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:34,755 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:36:34,755 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520438779] [2019-12-07 13:36:34,755 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:36:34,755 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:34,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:36:34,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:34,755 INFO L87 Difference]: Start difference. First operand 22994 states and 68105 transitions. Second operand 4 states. [2019-12-07 13:36:34,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:34,849 INFO L93 Difference]: Finished difference Result 26923 states and 79396 transitions. [2019-12-07 13:36:34,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:34,850 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2019-12-07 13:36:34,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:34,883 INFO L225 Difference]: With dead ends: 26923 [2019-12-07 13:36:34,883 INFO L226 Difference]: Without dead ends: 26923 [2019-12-07 13:36:34,883 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:34,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26923 states. [2019-12-07 13:36:35,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26923 to 21992. [2019-12-07 13:36:35,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21992 states. [2019-12-07 13:36:35,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21992 states to 21992 states and 65179 transitions. [2019-12-07 13:36:35,228 INFO L78 Accepts]: Start accepts. Automaton has 21992 states and 65179 transitions. Word has length 65 [2019-12-07 13:36:35,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:35,228 INFO L462 AbstractCegarLoop]: Abstraction has 21992 states and 65179 transitions. [2019-12-07 13:36:35,228 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:36:35,228 INFO L276 IsEmpty]: Start isEmpty. Operand 21992 states and 65179 transitions. [2019-12-07 13:36:35,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:36:35,248 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:35,248 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:35,248 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:35,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:35,249 INFO L82 PathProgramCache]: Analyzing trace with hash -1362331982, now seen corresponding path program 1 times [2019-12-07 13:36:35,249 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:35,249 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47461089] [2019-12-07 13:36:35,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:35,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:35,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:35,285 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47461089] [2019-12-07 13:36:35,285 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:35,285 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:36:35,285 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400651980] [2019-12-07 13:36:35,286 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:35,286 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:36:35,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:35,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:35,286 INFO L87 Difference]: Start difference. First operand 21992 states and 65179 transitions. Second operand 3 states. [2019-12-07 13:36:35,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:35,337 INFO L93 Difference]: Finished difference Result 21992 states and 65178 transitions. [2019-12-07 13:36:35,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:35,337 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 13:36:35,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:35,360 INFO L225 Difference]: With dead ends: 21992 [2019-12-07 13:36:35,360 INFO L226 Difference]: Without dead ends: 21992 [2019-12-07 13:36:35,360 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:35,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21992 states. [2019-12-07 13:36:35,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21992 to 14650. [2019-12-07 13:36:35,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14650 states. [2019-12-07 13:36:35,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14650 states to 14650 states and 43966 transitions. [2019-12-07 13:36:35,616 INFO L78 Accepts]: Start accepts. Automaton has 14650 states and 43966 transitions. Word has length 66 [2019-12-07 13:36:35,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:35,617 INFO L462 AbstractCegarLoop]: Abstraction has 14650 states and 43966 transitions. [2019-12-07 13:36:35,617 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:35,617 INFO L276 IsEmpty]: Start isEmpty. Operand 14650 states and 43966 transitions. [2019-12-07 13:36:35,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:36:35,630 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:35,630 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:35,630 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:35,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:35,630 INFO L82 PathProgramCache]: Analyzing trace with hash 1790496915, now seen corresponding path program 1 times [2019-12-07 13:36:35,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:36:35,630 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1571490190] [2019-12-07 13:36:35,630 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:35,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:36:35,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:36:35,711 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 13:36:35,712 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:36:35,714 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_89| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= v_~y~0_33 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1001~0.base_51|)) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1001~0.base_51| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1001~0.base_51|) |v_ULTIMATE.start_main_~#t1001~0.offset_32| 0))) (= v_~main$tmp_guard1~0_50 0) (= 0 v_~a$read_delayed_var~0.base_8) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1001~0.base_51|) (= v_~a$mem_tmp~0_19 0) (= v_~a$r_buff1_thd3~0_279 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= |v_#valid_87| (store .cse0 |v_ULTIMATE.start_main_~#t1001~0.base_51| 1)) (= v_~a$r_buff0_thd3~0_364 0) (= v_~z~0_14 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1001~0.base_51| 4)) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~weak$$choice0~0_15) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 |v_#NULL.base_4|) (= 0 |v_ULTIMATE.start_main_~#t1001~0.offset_32|) (= 0 v_~__unbuffered_p1_EAX~0_57) (= 0 v_~a$w_buff1_used~0_506) (= v_~a$r_buff1_thd0~0_160 0) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= v_~a$flush_delayed~0_30 0) (= 0 v_~x~0_130) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~weak$$choice2~0_108 0) (= v_~a~0_163 0) (= v_~__unbuffered_p2_EBX~0_61 0) (= 0 v_~__unbuffered_p2_EAX~0_52) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_89|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_~#t1002~0.base=|v_ULTIMATE.start_main_~#t1002~0.base_39|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ULTIMATE.start_main_~#t1003~0.offset=|v_ULTIMATE.start_main_~#t1003~0.offset_20|, ~a~0=v_~a~0_163, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_57, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_52, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_61, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_130, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_19, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ULTIMATE.start_main_~#t1003~0.base=|v_ULTIMATE.start_main_~#t1003~0.base_28|, ~y~0=v_~y~0_33, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_~#t1001~0.base=|v_ULTIMATE.start_main_~#t1001~0.base_51|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ULTIMATE.start_main_~#t1002~0.offset=|v_ULTIMATE.start_main_~#t1002~0.offset_19|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t1001~0.offset=|v_ULTIMATE.start_main_~#t1001~0.offset_32|, ~a$flush_delayed~0=v_~a$flush_delayed~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, #valid=|v_#valid_87|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_14, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_~#t1002~0.base, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t1003~0.offset, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t1003~0.base, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_~#t1001~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t1002~0.offset, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t1001~0.offset, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 13:36:35,715 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~a$r_buff0_thd2~0_In620891655 ~a$r_buff1_thd2~0_Out620891655) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In620891655)) (= ~x~0_Out620891655 1) (= ~a$r_buff0_thd0~0_In620891655 ~a$r_buff1_thd0~0_Out620891655) (= ~a$r_buff1_thd1~0_Out620891655 ~a$r_buff0_thd1~0_In620891655) (= ~a$r_buff1_thd3~0_Out620891655 ~a$r_buff0_thd3~0_In620891655) (= 1 ~a$r_buff0_thd1~0_Out620891655)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In620891655, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In620891655, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In620891655, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In620891655, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In620891655} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out620891655, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out620891655, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out620891655, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out620891655, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In620891655, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In620891655, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In620891655, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out620891655, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In620891655, ~x~0=~x~0_Out620891655} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 13:36:35,715 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1002~0.base_9|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t1002~0.base_9|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1002~0.base_9| 4) |v_#length_15|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1002~0.base_9|) (= |v_ULTIMATE.start_main_~#t1002~0.offset_7| 0) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1002~0.base_9| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1002~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1002~0.base_9|) |v_ULTIMATE.start_main_~#t1002~0.offset_7| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1002~0.offset=|v_ULTIMATE.start_main_~#t1002~0.offset_7|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1002~0.base=|v_ULTIMATE.start_main_~#t1002~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1002~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1002~0.base] because there is no mapped edge [2019-12-07 13:36:35,716 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1003~0.base_9| 1) |v_#valid_32|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1003~0.base_9|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1003~0.base_9| 4)) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1003~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1003~0.base_9|) |v_ULTIMATE.start_main_~#t1003~0.offset_8| 2)) |v_#memory_int_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1003~0.base_9|)) (= |v_ULTIMATE.start_main_~#t1003~0.offset_8| 0) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1003~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1003~0.offset=|v_ULTIMATE.start_main_~#t1003~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1003~0.base=|v_ULTIMATE.start_main_~#t1003~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1003~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1003~0.base, #length] because there is no mapped edge [2019-12-07 13:36:35,716 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out1317342285| |P1Thread1of1ForFork2_#t~ite10_Out1317342285|)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In1317342285 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In1317342285 256) 0))) (or (and .cse0 (= ~a$w_buff1~0_In1317342285 |P1Thread1of1ForFork2_#t~ite9_Out1317342285|) (not .cse1) (not .cse2)) (and .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out1317342285| ~a~0_In1317342285) (or .cse1 .cse2)))) InVars {~a~0=~a~0_In1317342285, ~a$w_buff1~0=~a$w_buff1~0_In1317342285, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1317342285, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1317342285} OutVars{~a~0=~a~0_In1317342285, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1317342285|, ~a$w_buff1~0=~a$w_buff1~0_In1317342285, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1317342285, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1317342285|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1317342285} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:36:35,718 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1020446592 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In1020446592 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1020446592| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out1020446592| ~a$w_buff0_used~0_In1020446592)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1020446592, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1020446592} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1020446592, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1020446592, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1020446592|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:36:35,718 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In-57381 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-57381 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-57381 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-57381 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-57381|)) (and (= ~a$w_buff1_used~0_In-57381 |P1Thread1of1ForFork2_#t~ite12_Out-57381|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-57381, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-57381, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-57381, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-57381} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-57381, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-57381, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-57381, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-57381|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-57381} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:36:35,719 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1862954145 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite21_Out-1862954145| |P2Thread1of1ForFork0_#t~ite20_Out-1862954145|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1862954145 256)))) (or (and (= (mod ~a$r_buff1_thd3~0_In-1862954145 256) 0) .cse1) (and (= 0 (mod ~a$w_buff1_used~0_In-1862954145 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-1862954145 256) 0))) (= |P2Thread1of1ForFork0_#t~ite20_Out-1862954145| ~a$w_buff0~0_In-1862954145)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-1862954145| ~a$w_buff0~0_In-1862954145) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In-1862954145| |P2Thread1of1ForFork0_#t~ite20_Out-1862954145|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1862954145, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1862954145|, ~weak$$choice2~0=~weak$$choice2~0_In-1862954145} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1862954145|, ~a$w_buff0~0=~a$w_buff0~0_In-1862954145, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1862954145|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145, ~weak$$choice2~0=~weak$$choice2~0_In-1862954145} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 13:36:35,719 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-1301826551 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1301826551 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out-1301826551| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1301826551| ~a$r_buff0_thd2~0_In-1301826551)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1301826551, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1301826551} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1301826551, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1301826551, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1301826551|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:36:35,720 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In-1658241603 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In-1658241603 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-1658241603 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1658241603 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-1658241603| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-1658241603| ~a$r_buff1_thd2~0_In-1658241603) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1658241603, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1658241603, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1658241603, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1658241603} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1658241603, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1658241603, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1658241603, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1658241603, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1658241603|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:36:35,720 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:36:35,720 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1439427895 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1439427895 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In1439427895 256)) .cse1) (and (= 0 (mod ~a$w_buff1_used~0_In1439427895 256)) .cse1) (= (mod ~a$w_buff0_used~0_In1439427895 256) 0))) (= |P2Thread1of1ForFork0_#t~ite24_Out1439427895| |P2Thread1of1ForFork0_#t~ite23_Out1439427895|) (= |P2Thread1of1ForFork0_#t~ite23_Out1439427895| ~a$w_buff1~0_In1439427895)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite24_Out1439427895| ~a$w_buff1~0_In1439427895) (= |P2Thread1of1ForFork0_#t~ite23_In1439427895| |P2Thread1of1ForFork0_#t~ite23_Out1439427895|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In1439427895, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1439427895|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1439427895, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1439427895, ~weak$$choice2~0=~weak$$choice2~0_In1439427895} OutVars{~a$w_buff1~0=~a$w_buff1~0_In1439427895, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1439427895|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1439427895|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1439427895, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1439427895, ~weak$$choice2~0=~weak$$choice2~0_In1439427895} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 13:36:35,721 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1841604176 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out1841604176| |P2Thread1of1ForFork0_#t~ite26_Out1841604176|) (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1841604176 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In1841604176 256)) (and .cse0 (= (mod ~a$r_buff1_thd3~0_In1841604176 256) 0)) (and .cse0 (= (mod ~a$w_buff1_used~0_In1841604176 256) 0)))) .cse1 (= ~a$w_buff0_used~0_In1841604176 |P2Thread1of1ForFork0_#t~ite26_Out1841604176|)) (and (= |P2Thread1of1ForFork0_#t~ite26_In1841604176| |P2Thread1of1ForFork0_#t~ite26_Out1841604176|) (= |P2Thread1of1ForFork0_#t~ite27_Out1841604176| ~a$w_buff0_used~0_In1841604176) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1841604176|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176, ~weak$$choice2~0=~weak$$choice2~0_In1841604176} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1841604176|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1841604176|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176, ~weak$$choice2~0=~weak$$choice2~0_In1841604176} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 13:36:35,721 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:36:35,722 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 13:36:35,723 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In1613066688 256))) (.cse0 (= (mod ~a$r_buff1_thd3~0_In1613066688 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1613066688| ~a~0_In1613066688)) (and (= ~a$w_buff1~0_In1613066688 |P2Thread1of1ForFork0_#t~ite38_Out1613066688|) (not .cse1) (not .cse0)))) InVars {~a~0=~a~0_In1613066688, ~a$w_buff1~0=~a$w_buff1~0_In1613066688, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1613066688, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1613066688} OutVars{~a~0=~a~0_In1613066688, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1613066688|, ~a$w_buff1~0=~a$w_buff1~0_In1613066688, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1613066688, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1613066688} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:36:35,723 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:36:35,723 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1037615922 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1037615922 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1037615922 |P2Thread1of1ForFork0_#t~ite40_Out1037615922|)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1037615922|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1037615922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1037615922} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1037615922|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1037615922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1037615922} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:36:35,723 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-673286039 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-673286039 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-673286039|)) (and (= ~a$w_buff0_used~0_In-673286039 |P0Thread1of1ForFork1_#t~ite5_Out-673286039|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-673286039, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-673286039} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-673286039|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-673286039, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-673286039} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:36:35,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In944408639 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In944408639 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In944408639 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In944408639 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out944408639|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~a$w_buff1_used~0_In944408639 |P0Thread1of1ForFork1_#t~ite6_Out944408639|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In944408639, ~a$w_buff0_used~0=~a$w_buff0_used~0_In944408639, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In944408639, ~a$w_buff1_used~0=~a$w_buff1_used~0_In944408639} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out944408639|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In944408639, ~a$w_buff0_used~0=~a$w_buff0_used~0_In944408639, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In944408639, ~a$w_buff1_used~0=~a$w_buff1_used~0_In944408639} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:36:35,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1385948428 256))) (.cse1 (= ~a$r_buff0_thd1~0_In-1385948428 ~a$r_buff0_thd1~0_Out-1385948428)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-1385948428 256) 0))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= 0 ~a$r_buff0_thd1~0_Out-1385948428)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1385948428, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1385948428} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1385948428|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1385948428, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1385948428} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:36:35,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In-731638623 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-731638623 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-731638623 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-731638623 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-731638623|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-731638623| ~a$r_buff1_thd1~0_In-731638623) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-731638623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-731638623, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-731638623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-731638623} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-731638623|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-731638623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-731638623, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-731638623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-731638623} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:36:35,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:36:35,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In-1640813530 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd3~0_In-1640813530 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1640813530 256))) (.cse0 (= (mod ~a$r_buff1_thd3~0_In-1640813530 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out-1640813530| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite41_Out-1640813530| ~a$w_buff1_used~0_In-1640813530)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1640813530, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1640813530, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1640813530, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1640813530} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1640813530, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1640813530, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1640813530, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1640813530, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1640813530|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:36:35,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1688922213 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-1688922213 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1688922213|)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1688922213| ~a$r_buff0_thd3~0_In-1688922213) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1688922213, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1688922213} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1688922213, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1688922213, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1688922213|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:36:35,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1171671138 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1171671138 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In1171671138 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1171671138 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd3~0_In1171671138 |P2Thread1of1ForFork0_#t~ite43_Out1171671138|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out1171671138|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1171671138, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1171671138, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1171671138, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1171671138} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1171671138|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1171671138, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1171671138, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1171671138, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1171671138} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:36:35,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:36:35,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:36:35,726 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite48_Out-878094269| |ULTIMATE.start_main_#t~ite47_Out-878094269|)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-878094269 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-878094269 256)))) (or (and (not .cse0) (not .cse1) .cse2 (= ~a$w_buff1~0_In-878094269 |ULTIMATE.start_main_#t~ite47_Out-878094269|)) (and (= ~a~0_In-878094269 |ULTIMATE.start_main_#t~ite47_Out-878094269|) .cse2 (or .cse0 .cse1)))) InVars {~a~0=~a~0_In-878094269, ~a$w_buff1~0=~a$w_buff1~0_In-878094269, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-878094269, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-878094269} OutVars{~a~0=~a~0_In-878094269, ~a$w_buff1~0=~a$w_buff1~0_In-878094269, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-878094269|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-878094269, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-878094269|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-878094269} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:36:35,726 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-2053818157 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-2053818157 256) 0))) (or (and (= ~a$w_buff0_used~0_In-2053818157 |ULTIMATE.start_main_#t~ite49_Out-2053818157|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-2053818157|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2053818157, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2053818157} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-2053818157, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2053818157|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2053818157} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:36:35,727 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In-1292961328 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1292961328 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-1292961328 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1292961328 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-1292961328|)) (and (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-1292961328 |ULTIMATE.start_main_#t~ite50_Out-1292961328|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1292961328, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1292961328, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1292961328, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1292961328} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1292961328|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1292961328, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1292961328, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1292961328, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1292961328} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:36:35,727 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In453921203 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In453921203 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In453921203 |ULTIMATE.start_main_#t~ite51_Out453921203|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out453921203|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In453921203, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In453921203} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out453921203|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In453921203, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In453921203} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:36:35,727 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In619333657 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In619333657 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In619333657 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In619333657 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out619333657| ~a$r_buff1_thd0~0_In619333657)) (and (= |ULTIMATE.start_main_#t~ite52_Out619333657| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In619333657, ~a$w_buff0_used~0=~a$w_buff0_used~0_In619333657, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In619333657, ~a$w_buff1_used~0=~a$w_buff1_used~0_In619333657} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out619333657|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In619333657, ~a$w_buff0_used~0=~a$w_buff0_used~0_In619333657, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In619333657, ~a$w_buff1_used~0=~a$w_buff1_used~0_In619333657} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:36:35,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_24) (= v_~x~0_77 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:36:35,791 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:36:35 BasicIcfg [2019-12-07 13:36:35,791 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:36:35,791 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:36:35,791 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:36:35,791 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:36:35,792 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:35:11" (3/4) ... [2019-12-07 13:36:35,794 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:36:35,794 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_89| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= v_~y~0_33 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1001~0.base_51|)) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1001~0.base_51| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1001~0.base_51|) |v_ULTIMATE.start_main_~#t1001~0.offset_32| 0))) (= v_~main$tmp_guard1~0_50 0) (= 0 v_~a$read_delayed_var~0.base_8) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1001~0.base_51|) (= v_~a$mem_tmp~0_19 0) (= v_~a$r_buff1_thd3~0_279 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= |v_#valid_87| (store .cse0 |v_ULTIMATE.start_main_~#t1001~0.base_51| 1)) (= v_~a$r_buff0_thd3~0_364 0) (= v_~z~0_14 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1001~0.base_51| 4)) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~weak$$choice0~0_15) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 |v_#NULL.base_4|) (= 0 |v_ULTIMATE.start_main_~#t1001~0.offset_32|) (= 0 v_~__unbuffered_p1_EAX~0_57) (= 0 v_~a$w_buff1_used~0_506) (= v_~a$r_buff1_thd0~0_160 0) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= v_~a$flush_delayed~0_30 0) (= 0 v_~x~0_130) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~weak$$choice2~0_108 0) (= v_~a~0_163 0) (= v_~__unbuffered_p2_EBX~0_61 0) (= 0 v_~__unbuffered_p2_EAX~0_52) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_89|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_~#t1002~0.base=|v_ULTIMATE.start_main_~#t1002~0.base_39|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ULTIMATE.start_main_~#t1003~0.offset=|v_ULTIMATE.start_main_~#t1003~0.offset_20|, ~a~0=v_~a~0_163, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_57, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_52, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_61, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_130, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_19, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ULTIMATE.start_main_~#t1003~0.base=|v_ULTIMATE.start_main_~#t1003~0.base_28|, ~y~0=v_~y~0_33, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_~#t1001~0.base=|v_ULTIMATE.start_main_~#t1001~0.base_51|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ULTIMATE.start_main_~#t1002~0.offset=|v_ULTIMATE.start_main_~#t1002~0.offset_19|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t1001~0.offset=|v_ULTIMATE.start_main_~#t1001~0.offset_32|, ~a$flush_delayed~0=v_~a$flush_delayed~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, #valid=|v_#valid_87|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_14, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_~#t1002~0.base, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t1003~0.offset, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t1003~0.base, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_~#t1001~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t1002~0.offset, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t1001~0.offset, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 13:36:35,795 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~a$r_buff0_thd2~0_In620891655 ~a$r_buff1_thd2~0_Out620891655) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In620891655)) (= ~x~0_Out620891655 1) (= ~a$r_buff0_thd0~0_In620891655 ~a$r_buff1_thd0~0_Out620891655) (= ~a$r_buff1_thd1~0_Out620891655 ~a$r_buff0_thd1~0_In620891655) (= ~a$r_buff1_thd3~0_Out620891655 ~a$r_buff0_thd3~0_In620891655) (= 1 ~a$r_buff0_thd1~0_Out620891655)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In620891655, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In620891655, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In620891655, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In620891655, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In620891655} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out620891655, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out620891655, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out620891655, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out620891655, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In620891655, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In620891655, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In620891655, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out620891655, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In620891655, ~x~0=~x~0_Out620891655} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 13:36:35,795 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1002~0.base_9|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t1002~0.base_9|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1002~0.base_9| 4) |v_#length_15|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1002~0.base_9|) (= |v_ULTIMATE.start_main_~#t1002~0.offset_7| 0) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1002~0.base_9| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1002~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1002~0.base_9|) |v_ULTIMATE.start_main_~#t1002~0.offset_7| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1002~0.offset=|v_ULTIMATE.start_main_~#t1002~0.offset_7|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1002~0.base=|v_ULTIMATE.start_main_~#t1002~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1002~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1002~0.base] because there is no mapped edge [2019-12-07 13:36:35,796 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1003~0.base_9| 1) |v_#valid_32|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1003~0.base_9|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1003~0.base_9| 4)) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1003~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1003~0.base_9|) |v_ULTIMATE.start_main_~#t1003~0.offset_8| 2)) |v_#memory_int_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1003~0.base_9|)) (= |v_ULTIMATE.start_main_~#t1003~0.offset_8| 0) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1003~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1003~0.offset=|v_ULTIMATE.start_main_~#t1003~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1003~0.base=|v_ULTIMATE.start_main_~#t1003~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1003~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1003~0.base, #length] because there is no mapped edge [2019-12-07 13:36:35,796 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out1317342285| |P1Thread1of1ForFork2_#t~ite10_Out1317342285|)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In1317342285 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In1317342285 256) 0))) (or (and .cse0 (= ~a$w_buff1~0_In1317342285 |P1Thread1of1ForFork2_#t~ite9_Out1317342285|) (not .cse1) (not .cse2)) (and .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out1317342285| ~a~0_In1317342285) (or .cse1 .cse2)))) InVars {~a~0=~a~0_In1317342285, ~a$w_buff1~0=~a$w_buff1~0_In1317342285, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1317342285, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1317342285} OutVars{~a~0=~a~0_In1317342285, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1317342285|, ~a$w_buff1~0=~a$w_buff1~0_In1317342285, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1317342285, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1317342285|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1317342285} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:36:35,797 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1020446592 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In1020446592 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1020446592| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out1020446592| ~a$w_buff0_used~0_In1020446592)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1020446592, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1020446592} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1020446592, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1020446592, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1020446592|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:36:35,798 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In-57381 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-57381 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-57381 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-57381 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-57381|)) (and (= ~a$w_buff1_used~0_In-57381 |P1Thread1of1ForFork2_#t~ite12_Out-57381|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-57381, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-57381, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-57381, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-57381} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-57381, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-57381, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-57381, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-57381|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-57381} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:36:35,798 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1862954145 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite21_Out-1862954145| |P2Thread1of1ForFork0_#t~ite20_Out-1862954145|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1862954145 256)))) (or (and (= (mod ~a$r_buff1_thd3~0_In-1862954145 256) 0) .cse1) (and (= 0 (mod ~a$w_buff1_used~0_In-1862954145 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-1862954145 256) 0))) (= |P2Thread1of1ForFork0_#t~ite20_Out-1862954145| ~a$w_buff0~0_In-1862954145)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-1862954145| ~a$w_buff0~0_In-1862954145) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In-1862954145| |P2Thread1of1ForFork0_#t~ite20_Out-1862954145|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1862954145, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1862954145|, ~weak$$choice2~0=~weak$$choice2~0_In-1862954145} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1862954145|, ~a$w_buff0~0=~a$w_buff0~0_In-1862954145, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1862954145|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145, ~weak$$choice2~0=~weak$$choice2~0_In-1862954145} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 13:36:35,799 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-1301826551 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1301826551 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out-1301826551| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1301826551| ~a$r_buff0_thd2~0_In-1301826551)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1301826551, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1301826551} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1301826551, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1301826551, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1301826551|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:36:35,799 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In-1658241603 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In-1658241603 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-1658241603 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1658241603 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-1658241603| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-1658241603| ~a$r_buff1_thd2~0_In-1658241603) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1658241603, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1658241603, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1658241603, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1658241603} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1658241603, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1658241603, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1658241603, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1658241603, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1658241603|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:36:35,799 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:36:35,800 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1439427895 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1439427895 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In1439427895 256)) .cse1) (and (= 0 (mod ~a$w_buff1_used~0_In1439427895 256)) .cse1) (= (mod ~a$w_buff0_used~0_In1439427895 256) 0))) (= |P2Thread1of1ForFork0_#t~ite24_Out1439427895| |P2Thread1of1ForFork0_#t~ite23_Out1439427895|) (= |P2Thread1of1ForFork0_#t~ite23_Out1439427895| ~a$w_buff1~0_In1439427895)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite24_Out1439427895| ~a$w_buff1~0_In1439427895) (= |P2Thread1of1ForFork0_#t~ite23_In1439427895| |P2Thread1of1ForFork0_#t~ite23_Out1439427895|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In1439427895, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1439427895|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1439427895, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1439427895, ~weak$$choice2~0=~weak$$choice2~0_In1439427895} OutVars{~a$w_buff1~0=~a$w_buff1~0_In1439427895, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1439427895|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1439427895|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1439427895, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1439427895, ~weak$$choice2~0=~weak$$choice2~0_In1439427895} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 13:36:35,800 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1841604176 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out1841604176| |P2Thread1of1ForFork0_#t~ite26_Out1841604176|) (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1841604176 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In1841604176 256)) (and .cse0 (= (mod ~a$r_buff1_thd3~0_In1841604176 256) 0)) (and .cse0 (= (mod ~a$w_buff1_used~0_In1841604176 256) 0)))) .cse1 (= ~a$w_buff0_used~0_In1841604176 |P2Thread1of1ForFork0_#t~ite26_Out1841604176|)) (and (= |P2Thread1of1ForFork0_#t~ite26_In1841604176| |P2Thread1of1ForFork0_#t~ite26_Out1841604176|) (= |P2Thread1of1ForFork0_#t~ite27_Out1841604176| ~a$w_buff0_used~0_In1841604176) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1841604176|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176, ~weak$$choice2~0=~weak$$choice2~0_In1841604176} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1841604176|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1841604176|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176, ~weak$$choice2~0=~weak$$choice2~0_In1841604176} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 13:36:35,801 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:36:35,802 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 13:36:35,802 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In1613066688 256))) (.cse0 (= (mod ~a$r_buff1_thd3~0_In1613066688 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1613066688| ~a~0_In1613066688)) (and (= ~a$w_buff1~0_In1613066688 |P2Thread1of1ForFork0_#t~ite38_Out1613066688|) (not .cse1) (not .cse0)))) InVars {~a~0=~a~0_In1613066688, ~a$w_buff1~0=~a$w_buff1~0_In1613066688, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1613066688, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1613066688} OutVars{~a~0=~a~0_In1613066688, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1613066688|, ~a$w_buff1~0=~a$w_buff1~0_In1613066688, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1613066688, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1613066688} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:36:35,803 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:36:35,803 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1037615922 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1037615922 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1037615922 |P2Thread1of1ForFork0_#t~ite40_Out1037615922|)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1037615922|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1037615922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1037615922} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1037615922|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1037615922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1037615922} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:36:35,803 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-673286039 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-673286039 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-673286039|)) (and (= ~a$w_buff0_used~0_In-673286039 |P0Thread1of1ForFork1_#t~ite5_Out-673286039|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-673286039, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-673286039} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-673286039|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-673286039, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-673286039} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:36:35,803 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In944408639 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In944408639 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In944408639 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In944408639 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out944408639|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~a$w_buff1_used~0_In944408639 |P0Thread1of1ForFork1_#t~ite6_Out944408639|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In944408639, ~a$w_buff0_used~0=~a$w_buff0_used~0_In944408639, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In944408639, ~a$w_buff1_used~0=~a$w_buff1_used~0_In944408639} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out944408639|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In944408639, ~a$w_buff0_used~0=~a$w_buff0_used~0_In944408639, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In944408639, ~a$w_buff1_used~0=~a$w_buff1_used~0_In944408639} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:36:35,804 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1385948428 256))) (.cse1 (= ~a$r_buff0_thd1~0_In-1385948428 ~a$r_buff0_thd1~0_Out-1385948428)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-1385948428 256) 0))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= 0 ~a$r_buff0_thd1~0_Out-1385948428)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1385948428, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1385948428} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1385948428|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1385948428, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1385948428} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:36:35,804 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In-731638623 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-731638623 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-731638623 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-731638623 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-731638623|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-731638623| ~a$r_buff1_thd1~0_In-731638623) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-731638623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-731638623, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-731638623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-731638623} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-731638623|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-731638623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-731638623, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-731638623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-731638623} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:36:35,804 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:36:35,804 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In-1640813530 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd3~0_In-1640813530 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1640813530 256))) (.cse0 (= (mod ~a$r_buff1_thd3~0_In-1640813530 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out-1640813530| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite41_Out-1640813530| ~a$w_buff1_used~0_In-1640813530)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1640813530, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1640813530, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1640813530, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1640813530} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1640813530, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1640813530, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1640813530, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1640813530, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1640813530|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:36:35,805 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1688922213 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-1688922213 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1688922213|)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1688922213| ~a$r_buff0_thd3~0_In-1688922213) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1688922213, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1688922213} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1688922213, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1688922213, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1688922213|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:36:35,805 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1171671138 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1171671138 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In1171671138 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1171671138 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd3~0_In1171671138 |P2Thread1of1ForFork0_#t~ite43_Out1171671138|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out1171671138|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1171671138, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1171671138, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1171671138, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1171671138} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1171671138|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1171671138, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1171671138, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1171671138, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1171671138} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:36:35,805 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:36:35,805 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:36:35,806 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite48_Out-878094269| |ULTIMATE.start_main_#t~ite47_Out-878094269|)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-878094269 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-878094269 256)))) (or (and (not .cse0) (not .cse1) .cse2 (= ~a$w_buff1~0_In-878094269 |ULTIMATE.start_main_#t~ite47_Out-878094269|)) (and (= ~a~0_In-878094269 |ULTIMATE.start_main_#t~ite47_Out-878094269|) .cse2 (or .cse0 .cse1)))) InVars {~a~0=~a~0_In-878094269, ~a$w_buff1~0=~a$w_buff1~0_In-878094269, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-878094269, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-878094269} OutVars{~a~0=~a~0_In-878094269, ~a$w_buff1~0=~a$w_buff1~0_In-878094269, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-878094269|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-878094269, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-878094269|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-878094269} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:36:35,806 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-2053818157 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-2053818157 256) 0))) (or (and (= ~a$w_buff0_used~0_In-2053818157 |ULTIMATE.start_main_#t~ite49_Out-2053818157|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-2053818157|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2053818157, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2053818157} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-2053818157, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2053818157|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2053818157} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:36:35,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In-1292961328 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1292961328 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-1292961328 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1292961328 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-1292961328|)) (and (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-1292961328 |ULTIMATE.start_main_#t~ite50_Out-1292961328|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1292961328, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1292961328, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1292961328, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1292961328} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1292961328|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1292961328, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1292961328, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1292961328, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1292961328} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:36:35,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In453921203 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In453921203 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In453921203 |ULTIMATE.start_main_#t~ite51_Out453921203|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out453921203|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In453921203, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In453921203} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out453921203|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In453921203, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In453921203} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:36:35,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In619333657 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In619333657 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In619333657 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In619333657 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out619333657| ~a$r_buff1_thd0~0_In619333657)) (and (= |ULTIMATE.start_main_#t~ite52_Out619333657| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In619333657, ~a$w_buff0_used~0=~a$w_buff0_used~0_In619333657, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In619333657, ~a$w_buff1_used~0=~a$w_buff1_used~0_In619333657} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out619333657|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In619333657, ~a$w_buff0_used~0=~a$w_buff0_used~0_In619333657, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In619333657, ~a$w_buff1_used~0=~a$w_buff1_used~0_In619333657} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:36:35,808 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_24) (= v_~x~0_77 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:36:35,865 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_184578b6-9059-47ec-9256-ebf47ce4265f/bin/uautomizer/witness.graphml [2019-12-07 13:36:35,865 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:36:35,866 INFO L168 Benchmark]: Toolchain (without parser) took 85632.57 ms. Allocated memory was 1.0 GB in the beginning and 5.8 GB in the end (delta: 4.8 GB). Free memory was 937.2 MB in the beginning and 1.3 GB in the end (delta: -349.6 MB). Peak memory consumption was 4.5 GB. Max. memory is 11.5 GB. [2019-12-07 13:36:35,867 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:36:35,867 INFO L168 Benchmark]: CACSL2BoogieTranslator took 403.55 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.2 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -135.3 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. [2019-12-07 13:36:35,867 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.14 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:36:35,868 INFO L168 Benchmark]: Boogie Preprocessor took 26.80 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:36:35,868 INFO L168 Benchmark]: RCFGBuilder took 411.87 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 13:36:35,868 INFO L168 Benchmark]: TraceAbstraction took 84675.78 ms. Allocated memory was 1.1 GB in the beginning and 5.8 GB in the end (delta: 4.7 GB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -300.4 MB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 13:36:35,868 INFO L168 Benchmark]: Witness Printer took 74.14 ms. Allocated memory is still 5.8 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 20.2 MB). Peak memory consumption was 20.2 MB. Max. memory is 11.5 GB. [2019-12-07 13:36:35,870 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 403.55 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.2 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -135.3 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.14 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.80 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 411.87 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 84675.78 ms. Allocated memory was 1.1 GB in the beginning and 5.8 GB in the end (delta: 4.7 GB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -300.4 MB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. * Witness Printer took 74.14 ms. Allocated memory is still 5.8 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 20.2 MB). Peak memory consumption was 20.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 100 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 33 ChoiceCompositions, 7286 VarBasedMoverChecksPositive, 247 VarBasedMoverChecksNegative, 37 SemBasedMoverChecksPositive, 286 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 87212 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L830] FCALL, FORK 0 pthread_create(&t1001, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L733] 1 a$w_buff1 = a$w_buff0 [L734] 1 a$w_buff0 = 1 [L735] 1 a$w_buff1_used = a$w_buff0_used [L736] 1 a$w_buff0_used = (_Bool)1 [L832] FCALL, FORK 0 pthread_create(&t1002, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L762] 2 x = 2 [L765] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L768] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L768] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L834] FCALL, FORK 0 pthread_create(&t1003, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L782] 3 y = 1 [L785] 3 z = 1 [L788] 3 __unbuffered_p2_EAX = z [L791] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L792] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L793] 3 a$flush_delayed = weak$$choice2 [L794] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L795] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L795] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L769] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L796] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L770] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L771] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L748] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L797] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L798] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L799] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L799] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L801] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L802] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L748] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L807] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L749] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L750] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L808] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L809] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L810] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L840] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L840] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L841] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L842] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L843] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 84.5s, OverallIterations: 36, TraceHistogramMax: 1, AutomataDifference: 33.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7855 SDtfs, 11569 SDslu, 23151 SDs, 0 SdLazy, 17690 SolverSat, 769 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 14.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 462 GetRequests, 81 SyntacticMatches, 38 SemanticMatches, 343 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1976 ImplicationChecksByTransitivity, 5.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=137801occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 32.9s AutomataMinimizationTime, 35 MinimizatonAttempts, 529631 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 1458 NumberOfCodeBlocks, 1458 NumberOfCodeBlocksAsserted, 36 NumberOfCheckSat, 1356 ConstructedInterpolants, 0 QuantifiedInterpolants, 340978 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 35 InterpolantComputations, 35 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...