./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix038_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix038_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a915a003cada48d1fa52e765b0fadd5bb0232a79 .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:26:44,566 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:26:44,567 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:26:44,575 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:26:44,575 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:26:44,576 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:26:44,577 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:26:44,578 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:26:44,580 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:26:44,581 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:26:44,581 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:26:44,582 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:26:44,582 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:26:44,583 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:26:44,584 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:26:44,584 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:26:44,585 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:26:44,586 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:26:44,587 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:26:44,588 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:26:44,590 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:26:44,590 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:26:44,591 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:26:44,591 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:26:44,593 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:26:44,593 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:26:44,593 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:26:44,594 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:26:44,594 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:26:44,595 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:26:44,595 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:26:44,596 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:26:44,596 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:26:44,597 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:26:44,598 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:26:44,598 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:26:44,598 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:26:44,599 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:26:44,599 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:26:44,600 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:26:44,600 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:26:44,601 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 15:26:44,613 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:26:44,614 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:26:44,614 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 15:26:44,615 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 15:26:44,615 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 15:26:44,615 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:26:44,615 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:26:44,615 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:26:44,616 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:26:44,616 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:26:44,616 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:26:44,616 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:26:44,616 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:26:44,616 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:26:44,617 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:26:44,617 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:26:44,617 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:26:44,617 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:26:44,617 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 15:26:44,618 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:26:44,618 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:26:44,618 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:26:44,618 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:26:44,618 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:26:44,619 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:26:44,619 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 15:26:44,619 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:26:44,619 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:26:44,619 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:26:44,619 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a915a003cada48d1fa52e765b0fadd5bb0232a79 [2019-12-07 15:26:44,718 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:26:44,727 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:26:44,729 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:26:44,730 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:26:44,730 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:26:44,731 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix038_pso.oepc.i [2019-12-07 15:26:44,769 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/data/50ef74fa3/21465d1aed12445b8242876a92d4c428/FLAG56bac39e3 [2019-12-07 15:26:45,227 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:26:45,228 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/sv-benchmarks/c/pthread-wmm/mix038_pso.oepc.i [2019-12-07 15:26:45,239 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/data/50ef74fa3/21465d1aed12445b8242876a92d4c428/FLAG56bac39e3 [2019-12-07 15:26:45,248 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/data/50ef74fa3/21465d1aed12445b8242876a92d4c428 [2019-12-07 15:26:45,250 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:26:45,251 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:26:45,252 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:26:45,252 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:26:45,254 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:26:45,254 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:26:45" (1/1) ... [2019-12-07 15:26:45,256 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45, skipping insertion in model container [2019-12-07 15:26:45,256 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:26:45" (1/1) ... [2019-12-07 15:26:45,261 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:26:45,290 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:26:45,533 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:26:45,541 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:26:45,586 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:26:45,633 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:26:45,634 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45 WrapperNode [2019-12-07 15:26:45,634 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:26:45,634 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:26:45,634 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:26:45,634 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:26:45,640 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45" (1/1) ... [2019-12-07 15:26:45,654 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45" (1/1) ... [2019-12-07 15:26:45,673 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:26:45,674 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:26:45,674 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:26:45,674 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:26:45,680 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45" (1/1) ... [2019-12-07 15:26:45,681 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45" (1/1) ... [2019-12-07 15:26:45,684 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45" (1/1) ... [2019-12-07 15:26:45,684 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45" (1/1) ... [2019-12-07 15:26:45,691 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45" (1/1) ... [2019-12-07 15:26:45,694 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45" (1/1) ... [2019-12-07 15:26:45,697 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45" (1/1) ... [2019-12-07 15:26:45,700 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:26:45,701 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:26:45,701 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:26:45,701 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:26:45,701 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:26:45,742 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:26:45,742 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:26:45,742 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:26:45,743 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:26:45,743 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:26:45,743 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:26:45,743 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:26:45,743 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:26:45,743 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:26:45,743 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:26:45,743 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:26:45,743 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:26:45,743 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:26:45,744 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:26:46,129 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:26:46,129 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:26:46,130 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:26:46 BoogieIcfgContainer [2019-12-07 15:26:46,130 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:26:46,130 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:26:46,130 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:26:46,132 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:26:46,132 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:26:45" (1/3) ... [2019-12-07 15:26:46,133 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22097cef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:26:46, skipping insertion in model container [2019-12-07 15:26:46,133 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:26:45" (2/3) ... [2019-12-07 15:26:46,133 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22097cef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:26:46, skipping insertion in model container [2019-12-07 15:26:46,133 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:26:46" (3/3) ... [2019-12-07 15:26:46,135 INFO L109 eAbstractionObserver]: Analyzing ICFG mix038_pso.oepc.i [2019-12-07 15:26:46,141 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:26:46,141 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:26:46,146 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:26:46,146 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:26:46,172 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,172 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,173 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,173 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,173 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,173 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,173 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,173 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,177 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,177 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,178 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,178 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,178 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,178 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,178 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,182 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,182 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,182 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,182 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,182 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,184 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,184 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,197 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,197 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,197 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,197 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,197 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,197 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,197 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,197 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,197 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,198 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,198 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,198 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,198 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:26:46,209 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 15:26:46,223 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:26:46,223 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:26:46,223 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:26:46,223 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:26:46,223 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:26:46,223 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:26:46,223 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:26:46,223 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:26:46,236 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 15:26:46,237 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 15:26:46,303 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 15:26:46,303 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:26:46,314 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:26:46,330 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 15:26:46,369 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 15:26:46,370 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:26:46,376 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:26:46,393 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 15:26:46,393 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:26:49,410 WARN L192 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 15:26:49,622 WARN L192 SmtUtils]: Spent 194.00 ms on a formula simplification that was a NOOP. DAG size: 81 [2019-12-07 15:26:49,780 WARN L192 SmtUtils]: Spent 157.00 ms on a formula simplification that was a NOOP. DAG size: 81 [2019-12-07 15:26:49,950 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 15:26:50,040 INFO L206 etLargeBlockEncoding]: Checked pairs total: 87212 [2019-12-07 15:26:50,040 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 15:26:50,042 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 15:27:01,831 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 15:27:01,832 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 15:27:01,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 15:27:01,836 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:27:01,836 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 15:27:01,836 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:27:01,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:27:01,840 INFO L82 PathProgramCache]: Analyzing trace with hash 919766, now seen corresponding path program 1 times [2019-12-07 15:27:01,846 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:27:01,846 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057591624] [2019-12-07 15:27:01,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:27:01,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:27:01,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:27:01,974 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1057591624] [2019-12-07 15:27:01,975 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:27:01,975 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:27:01,976 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795476135] [2019-12-07 15:27:01,978 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:27:01,979 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:27:01,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:27:01,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:27:01,989 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 15:27:02,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:27:02,774 INFO L93 Difference]: Finished difference Result 101544 states and 430594 transitions. [2019-12-07 15:27:02,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:27:02,776 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 15:27:02,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:27:03,186 INFO L225 Difference]: With dead ends: 101544 [2019-12-07 15:27:03,187 INFO L226 Difference]: Without dead ends: 95304 [2019-12-07 15:27:03,187 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:27:06,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95304 states. [2019-12-07 15:27:07,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95304 to 95304. [2019-12-07 15:27:07,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95304 states. [2019-12-07 15:27:07,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95304 states to 95304 states and 403554 transitions. [2019-12-07 15:27:07,916 INFO L78 Accepts]: Start accepts. Automaton has 95304 states and 403554 transitions. Word has length 3 [2019-12-07 15:27:07,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:27:07,916 INFO L462 AbstractCegarLoop]: Abstraction has 95304 states and 403554 transitions. [2019-12-07 15:27:07,916 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:27:07,916 INFO L276 IsEmpty]: Start isEmpty. Operand 95304 states and 403554 transitions. [2019-12-07 15:27:07,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:27:07,919 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:27:07,920 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:27:07,920 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:27:07,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:27:07,920 INFO L82 PathProgramCache]: Analyzing trace with hash -1982627867, now seen corresponding path program 1 times [2019-12-07 15:27:07,920 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:27:07,920 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361579840] [2019-12-07 15:27:07,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:27:07,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:27:07,980 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:27:07,981 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361579840] [2019-12-07 15:27:07,981 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:27:07,981 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:27:07,981 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721723513] [2019-12-07 15:27:07,982 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:27:07,982 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:27:07,982 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:27:07,982 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:27:07,982 INFO L87 Difference]: Start difference. First operand 95304 states and 403554 transitions. Second operand 4 states. [2019-12-07 15:27:10,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:27:10,240 INFO L93 Difference]: Finished difference Result 152040 states and 617140 transitions. [2019-12-07 15:27:10,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:27:10,241 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 15:27:10,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:27:10,625 INFO L225 Difference]: With dead ends: 152040 [2019-12-07 15:27:10,625 INFO L226 Difference]: Without dead ends: 151991 [2019-12-07 15:27:10,626 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:27:14,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151991 states. [2019-12-07 15:27:16,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151991 to 137801. [2019-12-07 15:27:16,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137801 states. [2019-12-07 15:27:17,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137801 states to 137801 states and 566928 transitions. [2019-12-07 15:27:17,043 INFO L78 Accepts]: Start accepts. Automaton has 137801 states and 566928 transitions. Word has length 11 [2019-12-07 15:27:17,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:27:17,044 INFO L462 AbstractCegarLoop]: Abstraction has 137801 states and 566928 transitions. [2019-12-07 15:27:17,044 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:27:17,044 INFO L276 IsEmpty]: Start isEmpty. Operand 137801 states and 566928 transitions. [2019-12-07 15:27:17,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:27:17,048 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:27:17,048 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:27:17,049 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:27:17,049 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:27:17,049 INFO L82 PathProgramCache]: Analyzing trace with hash -1673757482, now seen corresponding path program 1 times [2019-12-07 15:27:17,049 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:27:17,049 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1992123183] [2019-12-07 15:27:17,049 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:27:17,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:27:17,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:27:17,099 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1992123183] [2019-12-07 15:27:17,099 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:27:17,099 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:27:17,099 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1929078209] [2019-12-07 15:27:17,100 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:27:17,100 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:27:17,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:27:17,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:27:17,100 INFO L87 Difference]: Start difference. First operand 137801 states and 566928 transitions. Second operand 4 states. [2019-12-07 15:27:18,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:27:18,432 INFO L93 Difference]: Finished difference Result 197752 states and 794963 transitions. [2019-12-07 15:27:18,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:27:18,432 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 15:27:18,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:27:18,967 INFO L225 Difference]: With dead ends: 197752 [2019-12-07 15:27:18,967 INFO L226 Difference]: Without dead ends: 197696 [2019-12-07 15:27:18,968 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:27:25,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197696 states. [2019-12-07 15:27:27,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197696 to 164675. [2019-12-07 15:27:27,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164675 states. [2019-12-07 15:27:28,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164675 states to 164675 states and 674105 transitions. [2019-12-07 15:27:28,262 INFO L78 Accepts]: Start accepts. Automaton has 164675 states and 674105 transitions. Word has length 13 [2019-12-07 15:27:28,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:27:28,263 INFO L462 AbstractCegarLoop]: Abstraction has 164675 states and 674105 transitions. [2019-12-07 15:27:28,263 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:27:28,263 INFO L276 IsEmpty]: Start isEmpty. Operand 164675 states and 674105 transitions. [2019-12-07 15:27:28,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:27:28,269 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:27:28,269 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:27:28,269 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:27:28,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:27:28,270 INFO L82 PathProgramCache]: Analyzing trace with hash 841711145, now seen corresponding path program 1 times [2019-12-07 15:27:28,270 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:27:28,270 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [883894028] [2019-12-07 15:27:28,270 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:27:28,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:27:28,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:27:28,325 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [883894028] [2019-12-07 15:27:28,325 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:27:28,325 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:27:28,326 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1572550296] [2019-12-07 15:27:28,326 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:27:28,326 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:27:28,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:27:28,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:27:28,326 INFO L87 Difference]: Start difference. First operand 164675 states and 674105 transitions. Second operand 4 states. [2019-12-07 15:27:29,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:27:29,310 INFO L93 Difference]: Finished difference Result 202675 states and 826980 transitions. [2019-12-07 15:27:29,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:27:29,310 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 15:27:29,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:27:29,845 INFO L225 Difference]: With dead ends: 202675 [2019-12-07 15:27:29,845 INFO L226 Difference]: Without dead ends: 202675 [2019-12-07 15:27:29,845 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:27:34,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202675 states. [2019-12-07 15:27:39,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202675 to 172880. [2019-12-07 15:27:39,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172880 states. [2019-12-07 15:27:39,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172880 states to 172880 states and 708759 transitions. [2019-12-07 15:27:39,887 INFO L78 Accepts]: Start accepts. Automaton has 172880 states and 708759 transitions. Word has length 16 [2019-12-07 15:27:39,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:27:39,887 INFO L462 AbstractCegarLoop]: Abstraction has 172880 states and 708759 transitions. [2019-12-07 15:27:39,887 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:27:39,888 INFO L276 IsEmpty]: Start isEmpty. Operand 172880 states and 708759 transitions. [2019-12-07 15:27:39,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:27:39,904 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:27:39,904 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:27:39,905 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:27:39,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:27:39,905 INFO L82 PathProgramCache]: Analyzing trace with hash -118269295, now seen corresponding path program 1 times [2019-12-07 15:27:39,905 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:27:39,905 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [892952937] [2019-12-07 15:27:39,905 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:27:39,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:27:39,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:27:39,976 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [892952937] [2019-12-07 15:27:39,977 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:27:39,977 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:27:39,977 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2010564750] [2019-12-07 15:27:39,977 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:27:39,977 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:27:39,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:27:39,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:27:39,978 INFO L87 Difference]: Start difference. First operand 172880 states and 708759 transitions. Second operand 3 states. [2019-12-07 15:27:41,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:27:41,651 INFO L93 Difference]: Finished difference Result 309307 states and 1259353 transitions. [2019-12-07 15:27:41,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:27:41,651 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:27:41,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:27:42,320 INFO L225 Difference]: With dead ends: 309307 [2019-12-07 15:27:42,320 INFO L226 Difference]: Without dead ends: 274877 [2019-12-07 15:27:42,320 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:27:48,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274877 states. [2019-12-07 15:27:54,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274877 to 263353. [2019-12-07 15:27:54,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263353 states. [2019-12-07 15:27:55,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263353 states to 263353 states and 1079819 transitions. [2019-12-07 15:27:55,140 INFO L78 Accepts]: Start accepts. Automaton has 263353 states and 1079819 transitions. Word has length 18 [2019-12-07 15:27:55,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:27:55,141 INFO L462 AbstractCegarLoop]: Abstraction has 263353 states and 1079819 transitions. [2019-12-07 15:27:55,141 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:27:55,141 INFO L276 IsEmpty]: Start isEmpty. Operand 263353 states and 1079819 transitions. [2019-12-07 15:27:55,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 15:27:55,161 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:27:55,161 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:27:55,161 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:27:55,161 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:27:55,161 INFO L82 PathProgramCache]: Analyzing trace with hash 1108465109, now seen corresponding path program 1 times [2019-12-07 15:27:55,162 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:27:55,162 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [673936086] [2019-12-07 15:27:55,162 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:27:55,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:27:55,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:27:55,188 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [673936086] [2019-12-07 15:27:55,188 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:27:55,188 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:27:55,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2015940619] [2019-12-07 15:27:55,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:27:55,189 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:27:55,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:27:55,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:27:55,190 INFO L87 Difference]: Start difference. First operand 263353 states and 1079819 transitions. Second operand 3 states. [2019-12-07 15:27:55,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:27:55,762 INFO L93 Difference]: Finished difference Result 51911 states and 168157 transitions. [2019-12-07 15:27:55,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:27:55,762 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 15:27:55,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:27:55,841 INFO L225 Difference]: With dead ends: 51911 [2019-12-07 15:27:55,841 INFO L226 Difference]: Without dead ends: 51911 [2019-12-07 15:27:55,842 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:27:56,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51911 states. [2019-12-07 15:27:56,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51911 to 51811. [2019-12-07 15:27:56,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51811 states. [2019-12-07 15:27:56,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51811 states to 51811 states and 167877 transitions. [2019-12-07 15:27:56,659 INFO L78 Accepts]: Start accepts. Automaton has 51811 states and 167877 transitions. Word has length 19 [2019-12-07 15:27:56,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:27:56,659 INFO L462 AbstractCegarLoop]: Abstraction has 51811 states and 167877 transitions. [2019-12-07 15:27:56,659 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:27:56,659 INFO L276 IsEmpty]: Start isEmpty. Operand 51811 states and 167877 transitions. [2019-12-07 15:27:56,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:27:56,667 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:27:56,667 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:27:56,667 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:27:56,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:27:56,668 INFO L82 PathProgramCache]: Analyzing trace with hash 361242897, now seen corresponding path program 1 times [2019-12-07 15:27:56,668 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:27:56,668 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404413141] [2019-12-07 15:27:56,668 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:27:56,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:27:56,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:27:56,721 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [404413141] [2019-12-07 15:27:56,721 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:27:56,721 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:27:56,721 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [827290118] [2019-12-07 15:27:56,722 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:27:56,722 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:27:56,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:27:56,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:27:56,722 INFO L87 Difference]: Start difference. First operand 51811 states and 167877 transitions. Second operand 5 states. [2019-12-07 15:27:57,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:27:57,153 INFO L93 Difference]: Finished difference Result 65602 states and 209403 transitions. [2019-12-07 15:27:57,154 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:27:57,154 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 15:27:57,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:27:57,250 INFO L225 Difference]: With dead ends: 65602 [2019-12-07 15:27:57,251 INFO L226 Difference]: Without dead ends: 65595 [2019-12-07 15:27:57,251 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:27:57,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65595 states. [2019-12-07 15:27:58,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65595 to 51694. [2019-12-07 15:27:58,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51694 states. [2019-12-07 15:27:58,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51694 states to 51694 states and 167365 transitions. [2019-12-07 15:27:58,219 INFO L78 Accepts]: Start accepts. Automaton has 51694 states and 167365 transitions. Word has length 22 [2019-12-07 15:27:58,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:27:58,220 INFO L462 AbstractCegarLoop]: Abstraction has 51694 states and 167365 transitions. [2019-12-07 15:27:58,220 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:27:58,220 INFO L276 IsEmpty]: Start isEmpty. Operand 51694 states and 167365 transitions. [2019-12-07 15:27:58,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 15:27:58,234 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:27:58,234 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:27:58,234 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:27:58,234 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:27:58,234 INFO L82 PathProgramCache]: Analyzing trace with hash -2019660134, now seen corresponding path program 1 times [2019-12-07 15:27:58,234 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:27:58,234 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1036363643] [2019-12-07 15:27:58,235 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:27:58,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:27:58,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:27:58,278 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1036363643] [2019-12-07 15:27:58,278 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:27:58,279 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:27:58,279 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [379280972] [2019-12-07 15:27:58,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:27:58,279 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:27:58,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:27:58,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:27:58,279 INFO L87 Difference]: Start difference. First operand 51694 states and 167365 transitions. Second operand 5 states. [2019-12-07 15:27:58,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:27:58,698 INFO L93 Difference]: Finished difference Result 71401 states and 226365 transitions. [2019-12-07 15:27:58,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:27:58,699 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 15:27:58,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:27:58,802 INFO L225 Difference]: With dead ends: 71401 [2019-12-07 15:27:58,803 INFO L226 Difference]: Without dead ends: 71388 [2019-12-07 15:27:58,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:27:59,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71388 states. [2019-12-07 15:28:00,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71388 to 60868. [2019-12-07 15:28:00,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60868 states. [2019-12-07 15:28:00,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60868 states to 60868 states and 195652 transitions. [2019-12-07 15:28:00,220 INFO L78 Accepts]: Start accepts. Automaton has 60868 states and 195652 transitions. Word has length 25 [2019-12-07 15:28:00,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:00,221 INFO L462 AbstractCegarLoop]: Abstraction has 60868 states and 195652 transitions. [2019-12-07 15:28:00,221 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:28:00,221 INFO L276 IsEmpty]: Start isEmpty. Operand 60868 states and 195652 transitions. [2019-12-07 15:28:00,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:28:00,240 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:00,240 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:00,241 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:00,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:00,241 INFO L82 PathProgramCache]: Analyzing trace with hash -1429942457, now seen corresponding path program 1 times [2019-12-07 15:28:00,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:00,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [838224019] [2019-12-07 15:28:00,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:00,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:00,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:00,266 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [838224019] [2019-12-07 15:28:00,267 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:00,267 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:28:00,267 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1663688201] [2019-12-07 15:28:00,267 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:00,267 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:00,267 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:00,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:00,267 INFO L87 Difference]: Start difference. First operand 60868 states and 195652 transitions. Second operand 3 states. [2019-12-07 15:28:00,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:00,493 INFO L93 Difference]: Finished difference Result 80284 states and 254848 transitions. [2019-12-07 15:28:00,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:00,493 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 15:28:00,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:00,618 INFO L225 Difference]: With dead ends: 80284 [2019-12-07 15:28:00,618 INFO L226 Difference]: Without dead ends: 80284 [2019-12-07 15:28:00,619 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:00,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80284 states. [2019-12-07 15:28:01,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80284 to 65302. [2019-12-07 15:28:01,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65302 states. [2019-12-07 15:28:01,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65302 states to 65302 states and 208924 transitions. [2019-12-07 15:28:01,789 INFO L78 Accepts]: Start accepts. Automaton has 65302 states and 208924 transitions. Word has length 27 [2019-12-07 15:28:01,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:01,789 INFO L462 AbstractCegarLoop]: Abstraction has 65302 states and 208924 transitions. [2019-12-07 15:28:01,790 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:01,790 INFO L276 IsEmpty]: Start isEmpty. Operand 65302 states and 208924 transitions. [2019-12-07 15:28:01,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:28:01,810 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:01,810 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:01,810 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:01,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:01,810 INFO L82 PathProgramCache]: Analyzing trace with hash -535275942, now seen corresponding path program 1 times [2019-12-07 15:28:01,810 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:01,810 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1504446158] [2019-12-07 15:28:01,810 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:01,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:01,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:01,832 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1504446158] [2019-12-07 15:28:01,832 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:01,832 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:28:01,832 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777734894] [2019-12-07 15:28:01,832 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:01,832 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:01,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:01,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:01,833 INFO L87 Difference]: Start difference. First operand 65302 states and 208924 transitions. Second operand 3 states. [2019-12-07 15:28:02,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:02,083 INFO L93 Difference]: Finished difference Result 90430 states and 282613 transitions. [2019-12-07 15:28:02,083 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:02,083 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 15:28:02,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:02,212 INFO L225 Difference]: With dead ends: 90430 [2019-12-07 15:28:02,212 INFO L226 Difference]: Without dead ends: 90430 [2019-12-07 15:28:02,212 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:02,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90430 states. [2019-12-07 15:28:03,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90430 to 75448. [2019-12-07 15:28:03,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75448 states. [2019-12-07 15:28:03,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75448 states to 75448 states and 236689 transitions. [2019-12-07 15:28:03,545 INFO L78 Accepts]: Start accepts. Automaton has 75448 states and 236689 transitions. Word has length 27 [2019-12-07 15:28:03,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:03,545 INFO L462 AbstractCegarLoop]: Abstraction has 75448 states and 236689 transitions. [2019-12-07 15:28:03,545 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:03,545 INFO L276 IsEmpty]: Start isEmpty. Operand 75448 states and 236689 transitions. [2019-12-07 15:28:03,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:28:03,565 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:03,565 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:03,565 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:03,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:03,566 INFO L82 PathProgramCache]: Analyzing trace with hash 1457952739, now seen corresponding path program 1 times [2019-12-07 15:28:03,566 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:03,566 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [582966072] [2019-12-07 15:28:03,566 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:03,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:03,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:03,613 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [582966072] [2019-12-07 15:28:03,613 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:03,613 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:28:03,613 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1647328006] [2019-12-07 15:28:03,613 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:28:03,613 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:03,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:28:03,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:28:03,614 INFO L87 Difference]: Start difference. First operand 75448 states and 236689 transitions. Second operand 6 states. [2019-12-07 15:28:04,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:04,313 INFO L93 Difference]: Finished difference Result 129797 states and 405370 transitions. [2019-12-07 15:28:04,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:28:04,314 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 15:28:04,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:04,514 INFO L225 Difference]: With dead ends: 129797 [2019-12-07 15:28:04,514 INFO L226 Difference]: Without dead ends: 129778 [2019-12-07 15:28:04,514 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:28:04,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129778 states. [2019-12-07 15:28:06,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129778 to 80541. [2019-12-07 15:28:06,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80541 states. [2019-12-07 15:28:06,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80541 states to 80541 states and 252181 transitions. [2019-12-07 15:28:06,227 INFO L78 Accepts]: Start accepts. Automaton has 80541 states and 252181 transitions. Word has length 27 [2019-12-07 15:28:06,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:06,227 INFO L462 AbstractCegarLoop]: Abstraction has 80541 states and 252181 transitions. [2019-12-07 15:28:06,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:28:06,227 INFO L276 IsEmpty]: Start isEmpty. Operand 80541 states and 252181 transitions. [2019-12-07 15:28:06,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 15:28:06,247 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:06,247 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:06,247 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:06,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:06,247 INFO L82 PathProgramCache]: Analyzing trace with hash 294567066, now seen corresponding path program 1 times [2019-12-07 15:28:06,247 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:06,248 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [333276008] [2019-12-07 15:28:06,248 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:06,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:06,292 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:06,293 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [333276008] [2019-12-07 15:28:06,293 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:06,293 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:28:06,293 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [709085791] [2019-12-07 15:28:06,293 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:28:06,293 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:06,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:28:06,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:28:06,294 INFO L87 Difference]: Start difference. First operand 80541 states and 252181 transitions. Second operand 6 states. [2019-12-07 15:28:06,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:06,961 INFO L93 Difference]: Finished difference Result 119363 states and 369720 transitions. [2019-12-07 15:28:06,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:28:06,961 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 15:28:06,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:07,148 INFO L225 Difference]: With dead ends: 119363 [2019-12-07 15:28:07,148 INFO L226 Difference]: Without dead ends: 119341 [2019-12-07 15:28:07,148 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:28:07,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119341 states. [2019-12-07 15:28:08,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119341 to 80674. [2019-12-07 15:28:08,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80674 states. [2019-12-07 15:28:08,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80674 states to 80674 states and 252465 transitions. [2019-12-07 15:28:08,809 INFO L78 Accepts]: Start accepts. Automaton has 80674 states and 252465 transitions. Word has length 28 [2019-12-07 15:28:08,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:08,809 INFO L462 AbstractCegarLoop]: Abstraction has 80674 states and 252465 transitions. [2019-12-07 15:28:08,809 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:28:08,809 INFO L276 IsEmpty]: Start isEmpty. Operand 80674 states and 252465 transitions. [2019-12-07 15:28:08,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 15:28:08,831 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:08,831 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:08,832 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:08,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:08,832 INFO L82 PathProgramCache]: Analyzing trace with hash -463851336, now seen corresponding path program 1 times [2019-12-07 15:28:08,832 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:08,832 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1189272492] [2019-12-07 15:28:08,832 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:08,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:08,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:08,869 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1189272492] [2019-12-07 15:28:08,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:08,869 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:28:08,869 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [747915914] [2019-12-07 15:28:08,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:08,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:08,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:08,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:08,870 INFO L87 Difference]: Start difference. First operand 80674 states and 252465 transitions. Second operand 3 states. [2019-12-07 15:28:09,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:09,164 INFO L93 Difference]: Finished difference Result 80674 states and 250125 transitions. [2019-12-07 15:28:09,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:09,165 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 15:28:09,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:09,281 INFO L225 Difference]: With dead ends: 80674 [2019-12-07 15:28:09,281 INFO L226 Difference]: Without dead ends: 80674 [2019-12-07 15:28:09,282 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:09,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80674 states. [2019-12-07 15:28:10,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80674 to 75958. [2019-12-07 15:28:10,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75958 states. [2019-12-07 15:28:10,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75958 states to 75958 states and 236009 transitions. [2019-12-07 15:28:10,488 INFO L78 Accepts]: Start accepts. Automaton has 75958 states and 236009 transitions. Word has length 29 [2019-12-07 15:28:10,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:10,489 INFO L462 AbstractCegarLoop]: Abstraction has 75958 states and 236009 transitions. [2019-12-07 15:28:10,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:10,489 INFO L276 IsEmpty]: Start isEmpty. Operand 75958 states and 236009 transitions. [2019-12-07 15:28:10,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 15:28:10,511 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:10,511 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:10,512 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:10,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:10,512 INFO L82 PathProgramCache]: Analyzing trace with hash -421374131, now seen corresponding path program 1 times [2019-12-07 15:28:10,512 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:10,512 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1819834303] [2019-12-07 15:28:10,512 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:10,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:10,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:10,539 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1819834303] [2019-12-07 15:28:10,539 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:10,539 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:28:10,539 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [23132881] [2019-12-07 15:28:10,540 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:28:10,540 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:10,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:28:10,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:28:10,540 INFO L87 Difference]: Start difference. First operand 75958 states and 236009 transitions. Second operand 4 states. [2019-12-07 15:28:10,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:10,624 INFO L93 Difference]: Finished difference Result 28899 states and 85907 transitions. [2019-12-07 15:28:10,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:28:10,625 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 15:28:10,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:10,659 INFO L225 Difference]: With dead ends: 28899 [2019-12-07 15:28:10,660 INFO L226 Difference]: Without dead ends: 28899 [2019-12-07 15:28:10,660 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:28:10,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28899 states. [2019-12-07 15:28:11,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28899 to 26912. [2019-12-07 15:28:11,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26912 states. [2019-12-07 15:28:11,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26912 states to 26912 states and 80087 transitions. [2019-12-07 15:28:11,050 INFO L78 Accepts]: Start accepts. Automaton has 26912 states and 80087 transitions. Word has length 30 [2019-12-07 15:28:11,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:11,051 INFO L462 AbstractCegarLoop]: Abstraction has 26912 states and 80087 transitions. [2019-12-07 15:28:11,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:28:11,051 INFO L276 IsEmpty]: Start isEmpty. Operand 26912 states and 80087 transitions. [2019-12-07 15:28:11,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:28:11,069 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:11,069 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:11,070 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:11,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:11,070 INFO L82 PathProgramCache]: Analyzing trace with hash 1705939963, now seen corresponding path program 1 times [2019-12-07 15:28:11,070 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:11,070 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1299976871] [2019-12-07 15:28:11,070 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:11,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:11,118 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:11,118 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1299976871] [2019-12-07 15:28:11,119 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:11,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:28:11,119 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [558456518] [2019-12-07 15:28:11,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:28:11,119 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:11,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:28:11,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:28:11,119 INFO L87 Difference]: Start difference. First operand 26912 states and 80087 transitions. Second operand 7 states. [2019-12-07 15:28:11,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:11,847 INFO L93 Difference]: Finished difference Result 47416 states and 139179 transitions. [2019-12-07 15:28:11,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:28:11,847 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 15:28:11,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:11,899 INFO L225 Difference]: With dead ends: 47416 [2019-12-07 15:28:11,900 INFO L226 Difference]: Without dead ends: 47416 [2019-12-07 15:28:11,900 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:28:12,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47416 states. [2019-12-07 15:28:12,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47416 to 27213. [2019-12-07 15:28:12,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27213 states. [2019-12-07 15:28:12,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27213 states to 27213 states and 81027 transitions. [2019-12-07 15:28:12,502 INFO L78 Accepts]: Start accepts. Automaton has 27213 states and 81027 transitions. Word has length 33 [2019-12-07 15:28:12,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:12,502 INFO L462 AbstractCegarLoop]: Abstraction has 27213 states and 81027 transitions. [2019-12-07 15:28:12,502 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:28:12,502 INFO L276 IsEmpty]: Start isEmpty. Operand 27213 states and 81027 transitions. [2019-12-07 15:28:12,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:28:12,519 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:12,519 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:12,519 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:12,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:12,519 INFO L82 PathProgramCache]: Analyzing trace with hash 1567643153, now seen corresponding path program 2 times [2019-12-07 15:28:12,519 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:12,519 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [562429692] [2019-12-07 15:28:12,519 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:12,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:12,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:12,583 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [562429692] [2019-12-07 15:28:12,583 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:12,583 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:28:12,583 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [233415446] [2019-12-07 15:28:12,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:28:12,583 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:12,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:28:12,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:28:12,584 INFO L87 Difference]: Start difference. First operand 27213 states and 81027 transitions. Second operand 8 states. [2019-12-07 15:28:13,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:13,592 INFO L93 Difference]: Finished difference Result 56831 states and 164928 transitions. [2019-12-07 15:28:13,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 15:28:13,592 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 15:28:13,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:13,659 INFO L225 Difference]: With dead ends: 56831 [2019-12-07 15:28:13,659 INFO L226 Difference]: Without dead ends: 56831 [2019-12-07 15:28:13,660 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:28:13,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56831 states. [2019-12-07 15:28:14,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56831 to 27049. [2019-12-07 15:28:14,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27049 states. [2019-12-07 15:28:14,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27049 states to 27049 states and 80523 transitions. [2019-12-07 15:28:14,257 INFO L78 Accepts]: Start accepts. Automaton has 27049 states and 80523 transitions. Word has length 33 [2019-12-07 15:28:14,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:14,258 INFO L462 AbstractCegarLoop]: Abstraction has 27049 states and 80523 transitions. [2019-12-07 15:28:14,258 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:28:14,258 INFO L276 IsEmpty]: Start isEmpty. Operand 27049 states and 80523 transitions. [2019-12-07 15:28:14,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 15:28:14,278 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:14,278 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:14,278 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:14,278 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:14,278 INFO L82 PathProgramCache]: Analyzing trace with hash -607763582, now seen corresponding path program 1 times [2019-12-07 15:28:14,278 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:14,278 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963865172] [2019-12-07 15:28:14,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:14,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:14,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:14,346 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [963865172] [2019-12-07 15:28:14,346 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:14,346 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:28:14,347 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [597318606] [2019-12-07 15:28:14,347 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:28:14,347 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:14,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:28:14,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:28:14,347 INFO L87 Difference]: Start difference. First operand 27049 states and 80523 transitions. Second operand 7 states. [2019-12-07 15:28:15,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:15,098 INFO L93 Difference]: Finished difference Result 42823 states and 124960 transitions. [2019-12-07 15:28:15,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:28:15,099 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 15:28:15,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:15,145 INFO L225 Difference]: With dead ends: 42823 [2019-12-07 15:28:15,145 INFO L226 Difference]: Without dead ends: 42823 [2019-12-07 15:28:15,146 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:28:15,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42823 states. [2019-12-07 15:28:15,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42823 to 26846. [2019-12-07 15:28:15,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26846 states. [2019-12-07 15:28:15,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26846 states to 26846 states and 79921 transitions. [2019-12-07 15:28:15,653 INFO L78 Accepts]: Start accepts. Automaton has 26846 states and 79921 transitions. Word has length 34 [2019-12-07 15:28:15,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:15,653 INFO L462 AbstractCegarLoop]: Abstraction has 26846 states and 79921 transitions. [2019-12-07 15:28:15,654 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:28:15,654 INFO L276 IsEmpty]: Start isEmpty. Operand 26846 states and 79921 transitions. [2019-12-07 15:28:15,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 15:28:15,673 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:15,673 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:15,673 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:15,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:15,673 INFO L82 PathProgramCache]: Analyzing trace with hash 846412022, now seen corresponding path program 2 times [2019-12-07 15:28:15,673 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:15,674 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [934218205] [2019-12-07 15:28:15,674 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:15,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:15,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:15,729 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [934218205] [2019-12-07 15:28:15,729 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:15,729 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:28:15,729 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767281108] [2019-12-07 15:28:15,730 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:28:15,730 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:15,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:28:15,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:28:15,730 INFO L87 Difference]: Start difference. First operand 26846 states and 79921 transitions. Second operand 7 states. [2019-12-07 15:28:16,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:16,523 INFO L93 Difference]: Finished difference Result 51851 states and 149636 transitions. [2019-12-07 15:28:16,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 15:28:16,523 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 15:28:16,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:16,584 INFO L225 Difference]: With dead ends: 51851 [2019-12-07 15:28:16,585 INFO L226 Difference]: Without dead ends: 51851 [2019-12-07 15:28:16,585 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:28:16,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51851 states. [2019-12-07 15:28:17,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51851 to 26692. [2019-12-07 15:28:17,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26692 states. [2019-12-07 15:28:17,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26692 states to 26692 states and 79453 transitions. [2019-12-07 15:28:17,145 INFO L78 Accepts]: Start accepts. Automaton has 26692 states and 79453 transitions. Word has length 34 [2019-12-07 15:28:17,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:17,145 INFO L462 AbstractCegarLoop]: Abstraction has 26692 states and 79453 transitions. [2019-12-07 15:28:17,146 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:28:17,146 INFO L276 IsEmpty]: Start isEmpty. Operand 26692 states and 79453 transitions. [2019-12-07 15:28:17,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 15:28:17,165 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:17,166 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:17,166 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:17,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:17,166 INFO L82 PathProgramCache]: Analyzing trace with hash -211414604, now seen corresponding path program 3 times [2019-12-07 15:28:17,166 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:17,166 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1228892329] [2019-12-07 15:28:17,166 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:17,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:17,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:17,282 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1228892329] [2019-12-07 15:28:17,282 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:17,282 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:28:17,282 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1620260518] [2019-12-07 15:28:17,282 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:28:17,282 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:17,283 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:28:17,283 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:28:17,283 INFO L87 Difference]: Start difference. First operand 26692 states and 79453 transitions. Second operand 8 states. [2019-12-07 15:28:18,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:18,351 INFO L93 Difference]: Finished difference Result 47758 states and 137658 transitions. [2019-12-07 15:28:18,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 15:28:18,352 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 15:28:18,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:18,408 INFO L225 Difference]: With dead ends: 47758 [2019-12-07 15:28:18,408 INFO L226 Difference]: Without dead ends: 47758 [2019-12-07 15:28:18,408 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:28:18,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47758 states. [2019-12-07 15:28:18,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47758 to 26391. [2019-12-07 15:28:18,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26391 states. [2019-12-07 15:28:18,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26391 states to 26391 states and 78570 transitions. [2019-12-07 15:28:18,952 INFO L78 Accepts]: Start accepts. Automaton has 26391 states and 78570 transitions. Word has length 34 [2019-12-07 15:28:18,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:18,953 INFO L462 AbstractCegarLoop]: Abstraction has 26391 states and 78570 transitions. [2019-12-07 15:28:18,953 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:28:18,953 INFO L276 IsEmpty]: Start isEmpty. Operand 26391 states and 78570 transitions. [2019-12-07 15:28:18,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:28:18,974 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:18,975 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:18,975 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:18,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:18,975 INFO L82 PathProgramCache]: Analyzing trace with hash 1177680358, now seen corresponding path program 1 times [2019-12-07 15:28:18,975 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:18,975 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2097995098] [2019-12-07 15:28:18,975 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:18,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:19,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:19,025 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2097995098] [2019-12-07 15:28:19,025 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:19,025 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:28:19,025 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1970972758] [2019-12-07 15:28:19,026 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:28:19,026 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:19,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:28:19,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:28:19,026 INFO L87 Difference]: Start difference. First operand 26391 states and 78570 transitions. Second operand 5 states. [2019-12-07 15:28:19,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:19,440 INFO L93 Difference]: Finished difference Result 39354 states and 116020 transitions. [2019-12-07 15:28:19,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:28:19,440 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 15:28:19,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:19,483 INFO L225 Difference]: With dead ends: 39354 [2019-12-07 15:28:19,484 INFO L226 Difference]: Without dead ends: 39354 [2019-12-07 15:28:19,484 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:28:19,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39354 states. [2019-12-07 15:28:19,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39354 to 32205. [2019-12-07 15:28:19,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32205 states. [2019-12-07 15:28:20,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32205 states to 32205 states and 95877 transitions. [2019-12-07 15:28:20,002 INFO L78 Accepts]: Start accepts. Automaton has 32205 states and 95877 transitions. Word has length 40 [2019-12-07 15:28:20,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:20,003 INFO L462 AbstractCegarLoop]: Abstraction has 32205 states and 95877 transitions. [2019-12-07 15:28:20,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:28:20,003 INFO L276 IsEmpty]: Start isEmpty. Operand 32205 states and 95877 transitions. [2019-12-07 15:28:20,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:28:20,032 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:20,032 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:20,032 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:20,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:20,033 INFO L82 PathProgramCache]: Analyzing trace with hash -1523304982, now seen corresponding path program 2 times [2019-12-07 15:28:20,033 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:20,033 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [507364810] [2019-12-07 15:28:20,033 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:20,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:20,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:20,085 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [507364810] [2019-12-07 15:28:20,086 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:20,086 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:28:20,086 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1498424875] [2019-12-07 15:28:20,086 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:28:20,086 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:20,086 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:28:20,087 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:28:20,087 INFO L87 Difference]: Start difference. First operand 32205 states and 95877 transitions. Second operand 4 states. [2019-12-07 15:28:20,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:20,176 INFO L93 Difference]: Finished difference Result 32568 states and 97042 transitions. [2019-12-07 15:28:20,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:28:20,177 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 40 [2019-12-07 15:28:20,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:20,214 INFO L225 Difference]: With dead ends: 32568 [2019-12-07 15:28:20,214 INFO L226 Difference]: Without dead ends: 32568 [2019-12-07 15:28:20,215 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:28:20,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32568 states. [2019-12-07 15:28:20,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32568 to 31462. [2019-12-07 15:28:20,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31462 states. [2019-12-07 15:28:20,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31462 states to 31462 states and 93718 transitions. [2019-12-07 15:28:20,674 INFO L78 Accepts]: Start accepts. Automaton has 31462 states and 93718 transitions. Word has length 40 [2019-12-07 15:28:20,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:20,674 INFO L462 AbstractCegarLoop]: Abstraction has 31462 states and 93718 transitions. [2019-12-07 15:28:20,674 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:28:20,674 INFO L276 IsEmpty]: Start isEmpty. Operand 31462 states and 93718 transitions. [2019-12-07 15:28:20,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 15:28:20,703 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:20,703 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:20,703 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:20,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:20,704 INFO L82 PathProgramCache]: Analyzing trace with hash -1023563343, now seen corresponding path program 1 times [2019-12-07 15:28:20,704 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:20,704 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [231723032] [2019-12-07 15:28:20,704 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:20,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:20,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:20,730 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [231723032] [2019-12-07 15:28:20,730 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:20,730 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:28:20,730 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [573643421] [2019-12-07 15:28:20,731 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:20,731 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:20,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:20,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:20,731 INFO L87 Difference]: Start difference. First operand 31462 states and 93718 transitions. Second operand 3 states. [2019-12-07 15:28:20,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:20,795 INFO L93 Difference]: Finished difference Result 25983 states and 76359 transitions. [2019-12-07 15:28:20,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:20,796 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 15:28:20,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:20,828 INFO L225 Difference]: With dead ends: 25983 [2019-12-07 15:28:20,828 INFO L226 Difference]: Without dead ends: 25983 [2019-12-07 15:28:20,828 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:20,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25983 states. [2019-12-07 15:28:21,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25983 to 25624. [2019-12-07 15:28:21,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25624 states. [2019-12-07 15:28:21,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25624 states to 25624 states and 75369 transitions. [2019-12-07 15:28:21,273 INFO L78 Accepts]: Start accepts. Automaton has 25624 states and 75369 transitions. Word has length 41 [2019-12-07 15:28:21,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:21,273 INFO L462 AbstractCegarLoop]: Abstraction has 25624 states and 75369 transitions. [2019-12-07 15:28:21,273 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:21,273 INFO L276 IsEmpty]: Start isEmpty. Operand 25624 states and 75369 transitions. [2019-12-07 15:28:21,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 15:28:21,293 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:21,293 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:21,293 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:21,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:21,293 INFO L82 PathProgramCache]: Analyzing trace with hash -1399805170, now seen corresponding path program 1 times [2019-12-07 15:28:21,294 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:21,294 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1620060586] [2019-12-07 15:28:21,294 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:21,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:21,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:21,336 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1620060586] [2019-12-07 15:28:21,336 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:21,336 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:28:21,336 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826014248] [2019-12-07 15:28:21,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:28:21,336 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:21,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:28:21,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:28:21,337 INFO L87 Difference]: Start difference. First operand 25624 states and 75369 transitions. Second operand 5 states. [2019-12-07 15:28:21,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:21,403 INFO L93 Difference]: Finished difference Result 23389 states and 70580 transitions. [2019-12-07 15:28:21,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:28:21,403 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 15:28:21,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:21,427 INFO L225 Difference]: With dead ends: 23389 [2019-12-07 15:28:21,427 INFO L226 Difference]: Without dead ends: 22869 [2019-12-07 15:28:21,427 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:28:21,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22869 states. [2019-12-07 15:28:21,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22869 to 12836. [2019-12-07 15:28:21,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12836 states. [2019-12-07 15:28:21,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12836 states to 12836 states and 38942 transitions. [2019-12-07 15:28:21,673 INFO L78 Accepts]: Start accepts. Automaton has 12836 states and 38942 transitions. Word has length 42 [2019-12-07 15:28:21,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:21,673 INFO L462 AbstractCegarLoop]: Abstraction has 12836 states and 38942 transitions. [2019-12-07 15:28:21,673 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:28:21,673 INFO L276 IsEmpty]: Start isEmpty. Operand 12836 states and 38942 transitions. [2019-12-07 15:28:21,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:28:21,685 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:21,685 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:21,685 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:21,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:21,685 INFO L82 PathProgramCache]: Analyzing trace with hash 622120387, now seen corresponding path program 1 times [2019-12-07 15:28:21,685 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:21,686 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425992500] [2019-12-07 15:28:21,686 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:21,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:21,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:21,723 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1425992500] [2019-12-07 15:28:21,723 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:21,723 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:28:21,723 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [813042834] [2019-12-07 15:28:21,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:21,724 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:21,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:21,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:21,724 INFO L87 Difference]: Start difference. First operand 12836 states and 38942 transitions. Second operand 3 states. [2019-12-07 15:28:21,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:21,787 INFO L93 Difference]: Finished difference Result 15078 states and 45760 transitions. [2019-12-07 15:28:21,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:21,788 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:28:21,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:21,803 INFO L225 Difference]: With dead ends: 15078 [2019-12-07 15:28:21,803 INFO L226 Difference]: Without dead ends: 15078 [2019-12-07 15:28:21,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:21,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15078 states. [2019-12-07 15:28:21,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15078 to 12485. [2019-12-07 15:28:21,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12485 states. [2019-12-07 15:28:22,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12485 states to 12485 states and 38087 transitions. [2019-12-07 15:28:22,001 INFO L78 Accepts]: Start accepts. Automaton has 12485 states and 38087 transitions. Word has length 66 [2019-12-07 15:28:22,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:22,001 INFO L462 AbstractCegarLoop]: Abstraction has 12485 states and 38087 transitions. [2019-12-07 15:28:22,002 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:22,002 INFO L276 IsEmpty]: Start isEmpty. Operand 12485 states and 38087 transitions. [2019-12-07 15:28:22,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:28:22,013 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:22,013 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:22,013 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:22,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:22,014 INFO L82 PathProgramCache]: Analyzing trace with hash -586454608, now seen corresponding path program 1 times [2019-12-07 15:28:22,014 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:22,014 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [710796818] [2019-12-07 15:28:22,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:22,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:22,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:22,043 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [710796818] [2019-12-07 15:28:22,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:22,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:28:22,043 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1196239113] [2019-12-07 15:28:22,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:22,043 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:22,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:22,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:22,043 INFO L87 Difference]: Start difference. First operand 12485 states and 38087 transitions. Second operand 3 states. [2019-12-07 15:28:22,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:22,153 INFO L93 Difference]: Finished difference Result 17738 states and 54373 transitions. [2019-12-07 15:28:22,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:22,153 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 15:28:22,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:22,172 INFO L225 Difference]: With dead ends: 17738 [2019-12-07 15:28:22,172 INFO L226 Difference]: Without dead ends: 17738 [2019-12-07 15:28:22,172 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:22,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17738 states. [2019-12-07 15:28:22,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17738 to 12758. [2019-12-07 15:28:22,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12758 states. [2019-12-07 15:28:22,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12758 states to 12758 states and 38986 transitions. [2019-12-07 15:28:22,384 INFO L78 Accepts]: Start accepts. Automaton has 12758 states and 38986 transitions. Word has length 67 [2019-12-07 15:28:22,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:22,384 INFO L462 AbstractCegarLoop]: Abstraction has 12758 states and 38986 transitions. [2019-12-07 15:28:22,384 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:22,384 INFO L276 IsEmpty]: Start isEmpty. Operand 12758 states and 38986 transitions. [2019-12-07 15:28:22,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:28:22,396 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:22,396 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:22,396 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:22,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:22,396 INFO L82 PathProgramCache]: Analyzing trace with hash -1786041058, now seen corresponding path program 1 times [2019-12-07 15:28:22,397 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:22,397 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1694231776] [2019-12-07 15:28:22,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:22,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:22,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:22,473 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1694231776] [2019-12-07 15:28:22,473 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:22,473 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 15:28:22,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [611825874] [2019-12-07 15:28:22,474 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:28:22,474 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:22,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:28:22,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:28:22,474 INFO L87 Difference]: Start difference. First operand 12758 states and 38986 transitions. Second operand 7 states. [2019-12-07 15:28:23,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:23,345 INFO L93 Difference]: Finished difference Result 28547 states and 84946 transitions. [2019-12-07 15:28:23,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 15:28:23,346 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 15:28:23,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:23,376 INFO L225 Difference]: With dead ends: 28547 [2019-12-07 15:28:23,377 INFO L226 Difference]: Without dead ends: 28547 [2019-12-07 15:28:23,377 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 13 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:28:23,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28547 states. [2019-12-07 15:28:23,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28547 to 15970. [2019-12-07 15:28:23,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15970 states. [2019-12-07 15:28:23,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15970 states to 15970 states and 48813 transitions. [2019-12-07 15:28:23,686 INFO L78 Accepts]: Start accepts. Automaton has 15970 states and 48813 transitions. Word has length 67 [2019-12-07 15:28:23,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:23,686 INFO L462 AbstractCegarLoop]: Abstraction has 15970 states and 48813 transitions. [2019-12-07 15:28:23,686 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:28:23,686 INFO L276 IsEmpty]: Start isEmpty. Operand 15970 states and 48813 transitions. [2019-12-07 15:28:23,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:28:23,700 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:23,700 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:23,700 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:23,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:23,701 INFO L82 PathProgramCache]: Analyzing trace with hash 1398756383, now seen corresponding path program 1 times [2019-12-07 15:28:23,701 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:23,701 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648850459] [2019-12-07 15:28:23,701 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:23,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:23,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:23,797 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648850459] [2019-12-07 15:28:23,797 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:23,797 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:28:23,797 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613173425] [2019-12-07 15:28:23,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 15:28:23,798 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:23,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 15:28:23,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:28:23,798 INFO L87 Difference]: Start difference. First operand 15970 states and 48813 transitions. Second operand 9 states. [2019-12-07 15:28:25,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:25,209 INFO L93 Difference]: Finished difference Result 126976 states and 381903 transitions. [2019-12-07 15:28:25,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 15:28:25,209 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 15:28:25,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:25,367 INFO L225 Difference]: With dead ends: 126976 [2019-12-07 15:28:25,368 INFO L226 Difference]: Without dead ends: 121962 [2019-12-07 15:28:25,368 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 549 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=369, Invalid=1353, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 15:28:25,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121962 states. [2019-12-07 15:28:26,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121962 to 17271. [2019-12-07 15:28:26,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17271 states. [2019-12-07 15:28:26,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17271 states to 17271 states and 53046 transitions. [2019-12-07 15:28:26,362 INFO L78 Accepts]: Start accepts. Automaton has 17271 states and 53046 transitions. Word has length 67 [2019-12-07 15:28:26,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:26,362 INFO L462 AbstractCegarLoop]: Abstraction has 17271 states and 53046 transitions. [2019-12-07 15:28:26,362 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 15:28:26,362 INFO L276 IsEmpty]: Start isEmpty. Operand 17271 states and 53046 transitions. [2019-12-07 15:28:26,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:28:26,377 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:26,377 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:26,378 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:26,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:26,378 INFO L82 PathProgramCache]: Analyzing trace with hash -95777668, now seen corresponding path program 2 times [2019-12-07 15:28:26,378 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:26,378 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266443461] [2019-12-07 15:28:26,378 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:26,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:26,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:26,415 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1266443461] [2019-12-07 15:28:26,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:26,416 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:28:26,416 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899808203] [2019-12-07 15:28:26,416 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:28:26,416 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:26,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:28:26,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:28:26,416 INFO L87 Difference]: Start difference. First operand 17271 states and 53046 transitions. Second operand 4 states. [2019-12-07 15:28:26,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:26,493 INFO L93 Difference]: Finished difference Result 17119 states and 52405 transitions. [2019-12-07 15:28:26,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:28:26,493 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 15:28:26,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:26,511 INFO L225 Difference]: With dead ends: 17119 [2019-12-07 15:28:26,511 INFO L226 Difference]: Without dead ends: 17119 [2019-12-07 15:28:26,511 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:28:26,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17119 states. [2019-12-07 15:28:26,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17119 to 15507. [2019-12-07 15:28:26,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15507 states. [2019-12-07 15:28:26,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15507 states to 15507 states and 47326 transitions. [2019-12-07 15:28:26,737 INFO L78 Accepts]: Start accepts. Automaton has 15507 states and 47326 transitions. Word has length 67 [2019-12-07 15:28:26,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:26,737 INFO L462 AbstractCegarLoop]: Abstraction has 15507 states and 47326 transitions. [2019-12-07 15:28:26,737 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:28:26,737 INFO L276 IsEmpty]: Start isEmpty. Operand 15507 states and 47326 transitions. [2019-12-07 15:28:26,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:28:26,750 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:26,750 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:26,750 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:26,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:26,750 INFO L82 PathProgramCache]: Analyzing trace with hash 579351643, now seen corresponding path program 2 times [2019-12-07 15:28:26,750 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:26,750 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130045589] [2019-12-07 15:28:26,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:26,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:26,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:26,836 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [130045589] [2019-12-07 15:28:26,836 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:26,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:28:26,837 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1417470897] [2019-12-07 15:28:26,837 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 15:28:26,837 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:26,837 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 15:28:26,837 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:28:26,837 INFO L87 Difference]: Start difference. First operand 15507 states and 47326 transitions. Second operand 9 states. [2019-12-07 15:28:28,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:28,352 INFO L93 Difference]: Finished difference Result 122785 states and 365108 transitions. [2019-12-07 15:28:28,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 15:28:28,352 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 15:28:28,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:28,456 INFO L225 Difference]: With dead ends: 122785 [2019-12-07 15:28:28,456 INFO L226 Difference]: Without dead ends: 88205 [2019-12-07 15:28:28,457 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 636 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=421, Invalid=1559, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 15:28:28,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88205 states. [2019-12-07 15:28:29,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88205 to 17420. [2019-12-07 15:28:29,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17420 states. [2019-12-07 15:28:29,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17420 states to 17420 states and 53017 transitions. [2019-12-07 15:28:29,173 INFO L78 Accepts]: Start accepts. Automaton has 17420 states and 53017 transitions. Word has length 67 [2019-12-07 15:28:29,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:29,173 INFO L462 AbstractCegarLoop]: Abstraction has 17420 states and 53017 transitions. [2019-12-07 15:28:29,173 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 15:28:29,173 INFO L276 IsEmpty]: Start isEmpty. Operand 17420 states and 53017 transitions. [2019-12-07 15:28:29,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:28:29,189 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:29,189 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:29,189 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:29,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:29,190 INFO L82 PathProgramCache]: Analyzing trace with hash 1790496915, now seen corresponding path program 3 times [2019-12-07 15:28:29,190 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:29,190 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [169052952] [2019-12-07 15:28:29,190 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:29,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:28:29,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:28:29,276 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:28:29,276 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:28:29,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_89| 0 0))) (and (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1007~0.base_51|)) (= v_~main$tmp_guard0~0_31 0) (= v_~y~0_33 0) (= v_~main$tmp_guard1~0_50 0) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$mem_tmp~0_19 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1007~0.base_51| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1007~0.base_51|) |v_ULTIMATE.start_main_~#t1007~0.offset_32| 0)) |v_#memory_int_21|) (= v_~a$r_buff1_thd3~0_279 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$r_buff0_thd3~0_364 0) (= v_~z~0_14 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1007~0.base_51|) (< 0 |v_#StackHeapBarrier_17|) (= |v_ULTIMATE.start_main_~#t1007~0.offset_32| 0) (= 0 v_~weak$$choice0~0_15) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p1_EAX~0_57) (= 0 v_~a$w_buff1_used~0_506) (= (store .cse0 |v_ULTIMATE.start_main_~#t1007~0.base_51| 1) |v_#valid_87|) (= v_~a$r_buff1_thd0~0_160 0) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= v_~a$flush_delayed~0_30 0) (= 0 v_~x~0_130) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~weak$$choice2~0_108 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1007~0.base_51| 4)) (= v_~a~0_163 0) (= v_~__unbuffered_p2_EBX~0_61 0) (= 0 v_~__unbuffered_p2_EAX~0_52) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_89|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_163, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ULTIMATE.start_main_~#t1008~0.offset=|v_ULTIMATE.start_main_~#t1008~0.offset_19|, ULTIMATE.start_main_~#t1008~0.base=|v_ULTIMATE.start_main_~#t1008~0.base_39|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_57, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_52, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_61, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_130, ULTIMATE.start_main_~#t1007~0.offset=|v_ULTIMATE.start_main_~#t1007~0.offset_32|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ULTIMATE.start_main_~#t1009~0.base=|v_ULTIMATE.start_main_~#t1009~0.base_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_19, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_33, ULTIMATE.start_main_~#t1009~0.offset=|v_ULTIMATE.start_main_~#t1009~0.offset_20|, ULTIMATE.start_main_~#t1007~0.base=|v_ULTIMATE.start_main_~#t1007~0.base_51|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, #valid=|v_#valid_87|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_14, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t1008~0.offset, ULTIMATE.start_main_~#t1008~0.base, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1007~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ULTIMATE.start_main_~#t1009~0.base, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t1009~0.offset, ULTIMATE.start_main_~#t1007~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:28:29,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~a$r_buff1_thd3~0_Out-278990392 ~a$r_buff0_thd3~0_In-278990392) (= 1 ~x~0_Out-278990392) (= 1 ~a$r_buff0_thd1~0_Out-278990392) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-278990392 0)) (= ~a$r_buff0_thd0~0_In-278990392 ~a$r_buff1_thd0~0_Out-278990392) (= ~a$r_buff1_thd2~0_Out-278990392 ~a$r_buff0_thd2~0_In-278990392) (= ~a$r_buff1_thd1~0_Out-278990392 ~a$r_buff0_thd1~0_In-278990392)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-278990392, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-278990392, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-278990392, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-278990392, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-278990392} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-278990392, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-278990392, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-278990392, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-278990392, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-278990392, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-278990392, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-278990392, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-278990392, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-278990392, ~x~0=~x~0_Out-278990392} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 15:28:29,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1008~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1008~0.offset_7| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1008~0.base_9|)) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1008~0.base_9|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1008~0.base_9| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1008~0.base_9|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1008~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1008~0.base_9|) |v_ULTIMATE.start_main_~#t1008~0.offset_7| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1008~0.offset=|v_ULTIMATE.start_main_~#t1008~0.offset_7|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1008~0.base=|v_ULTIMATE.start_main_~#t1008~0.base_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1008~0.offset, ULTIMATE.start_main_~#t1008~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 15:28:29,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1009~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1009~0.offset_8| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1009~0.base_9|)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1009~0.base_9| 4)) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1009~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1009~0.base_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1009~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1009~0.base_9|) |v_ULTIMATE.start_main_~#t1009~0.offset_8| 2)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1009~0.offset=|v_ULTIMATE.start_main_~#t1009~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1009~0.base=|v_ULTIMATE.start_main_~#t1009~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1009~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1009~0.base, #length] because there is no mapped edge [2019-12-07 15:28:29,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In1161010058 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1161010058 256) 0)) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1161010058| |P1Thread1of1ForFork2_#t~ite10_Out1161010058|))) (or (and (not .cse0) (not .cse1) .cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1161010058| ~a$w_buff1~0_In1161010058)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out1161010058| ~a~0_In1161010058) .cse2))) InVars {~a~0=~a~0_In1161010058, ~a$w_buff1~0=~a$w_buff1~0_In1161010058, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1161010058, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1161010058} OutVars{~a~0=~a~0_In1161010058, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1161010058|, ~a$w_buff1~0=~a$w_buff1~0_In1161010058, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1161010058, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1161010058|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1161010058} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:28:29,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1546873193 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1546873193 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1546873193| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out1546873193| ~a$w_buff0_used~0_In1546873193)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1546873193, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1546873193} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1546873193, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1546873193, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1546873193|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:28:29,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-155777321 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-155777321 256))) (.cse3 (= (mod ~a$r_buff1_thd2~0_In-155777321 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-155777321 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-155777321|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-155777321 |P1Thread1of1ForFork2_#t~ite12_Out-155777321|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-155777321, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-155777321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-155777321, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-155777321} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-155777321, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-155777321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-155777321, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-155777321|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-155777321} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:28:29,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1232627745 256)))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-1232627745 256)))) (or (= (mod ~a$w_buff0_used~0_In-1232627745 256) 0) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1232627745 256))) (and (= (mod ~a$w_buff1_used~0_In-1232627745 256) 0) .cse0))) (= |P2Thread1of1ForFork0_#t~ite20_Out-1232627745| ~a$w_buff0~0_In-1232627745) .cse1 (= |P2Thread1of1ForFork0_#t~ite21_Out-1232627745| |P2Thread1of1ForFork0_#t~ite20_Out-1232627745|)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite21_Out-1232627745| ~a$w_buff0~0_In-1232627745) (= |P2Thread1of1ForFork0_#t~ite20_In-1232627745| |P2Thread1of1ForFork0_#t~ite20_Out-1232627745|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1232627745, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1232627745, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1232627745, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1232627745, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1232627745, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1232627745|, ~weak$$choice2~0=~weak$$choice2~0_In-1232627745} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1232627745|, ~a$w_buff0~0=~a$w_buff0~0_In-1232627745, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1232627745, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1232627745, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1232627745, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1232627745|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1232627745, ~weak$$choice2~0=~weak$$choice2~0_In-1232627745} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:28:29,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd2~0_In-1788256005 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1788256005 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1788256005| ~a$r_buff0_thd2~0_In-1788256005)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out-1788256005| 0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1788256005, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1788256005} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1788256005, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1788256005, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1788256005|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:28:29,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= (mod ~a$r_buff0_thd2~0_In-1846830626 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1846830626 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1846830626 256))) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1846830626 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1846830626|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-1846830626| ~a$r_buff1_thd2~0_In-1846830626) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1846830626, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1846830626, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1846830626, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1846830626} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1846830626, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1846830626, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1846830626, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1846830626, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1846830626|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:28:29,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:28:29,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1212282134 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_In-1212282134| |P2Thread1of1ForFork0_#t~ite23_Out-1212282134|) (not .cse0) (= ~a$w_buff1~0_In-1212282134 |P2Thread1of1ForFork0_#t~ite24_Out-1212282134|)) (and (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1212282134 256) 0))) (or (and .cse1 (= (mod ~a$w_buff1_used~0_In-1212282134 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In-1212282134 256)) (and (= (mod ~a$r_buff1_thd3~0_In-1212282134 256) 0) .cse1))) (= ~a$w_buff1~0_In-1212282134 |P2Thread1of1ForFork0_#t~ite23_Out-1212282134|) (= |P2Thread1of1ForFork0_#t~ite24_Out-1212282134| |P2Thread1of1ForFork0_#t~ite23_Out-1212282134|) .cse0))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-1212282134, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-1212282134|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1212282134, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1212282134, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1212282134, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1212282134, ~weak$$choice2~0=~weak$$choice2~0_In-1212282134} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-1212282134, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-1212282134|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-1212282134|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1212282134, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1212282134, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1212282134, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1212282134, ~weak$$choice2~0=~weak$$choice2~0_In-1212282134} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 15:28:29,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1341677112 256)))) (or (and (= ~a$w_buff0_used~0_In-1341677112 |P2Thread1of1ForFork0_#t~ite27_Out-1341677112|) (= |P2Thread1of1ForFork0_#t~ite26_In-1341677112| |P2Thread1of1ForFork0_#t~ite26_Out-1341677112|) (not .cse0)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1341677112| |P2Thread1of1ForFork0_#t~ite26_Out-1341677112|) (= ~a$w_buff0_used~0_In-1341677112 |P2Thread1of1ForFork0_#t~ite26_Out-1341677112|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1341677112 256) 0))) (or (and .cse1 (= (mod ~a$w_buff1_used~0_In-1341677112 256) 0)) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1341677112 256))) (= (mod ~a$w_buff0_used~0_In-1341677112 256) 0)))))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1341677112|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112, ~weak$$choice2~0=~weak$$choice2~0_In-1341677112} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1341677112|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1341677112|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112, ~weak$$choice2~0=~weak$$choice2~0_In-1341677112} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:28:29,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:28:29,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 15:28:29,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In250590756 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In250590756 256) 0))) (or (and (= ~a~0_In250590756 |P2Thread1of1ForFork0_#t~ite38_Out250590756|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= ~a$w_buff1~0_In250590756 |P2Thread1of1ForFork0_#t~ite38_Out250590756|)))) InVars {~a~0=~a~0_In250590756, ~a$w_buff1~0=~a$w_buff1~0_In250590756, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In250590756, ~a$w_buff1_used~0=~a$w_buff1_used~0_In250590756} OutVars{~a~0=~a~0_In250590756, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out250590756|, ~a$w_buff1~0=~a$w_buff1~0_In250590756, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In250590756, ~a$w_buff1_used~0=~a$w_buff1_used~0_In250590756} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:28:29,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:28:29,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In953774427 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In953774427 256) 0))) (or (and (= ~a$w_buff0_used~0_In953774427 |P2Thread1of1ForFork0_#t~ite40_Out953774427|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out953774427|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In953774427, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In953774427} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out953774427|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In953774427, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In953774427} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:28:29,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In31237751 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd1~0_In31237751 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In31237751 |P0Thread1of1ForFork1_#t~ite5_Out31237751|)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out31237751| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In31237751, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In31237751} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out31237751|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In31237751, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In31237751} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:28:29,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In1837628313 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1837628313 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1837628313 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In1837628313 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out1837628313| 0)) (and (= ~a$w_buff1_used~0_In1837628313 |P0Thread1of1ForFork1_#t~ite6_Out1837628313|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1837628313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1837628313, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1837628313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1837628313} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1837628313|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1837628313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1837628313, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1837628313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1837628313} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:28:29,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In-861499675 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_Out-861499675 ~a$r_buff0_thd1~0_In-861499675)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-861499675 256)))) (or (and .cse0 .cse1) (and (= ~a$r_buff0_thd1~0_Out-861499675 0) (not .cse0) (not .cse2)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-861499675, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-861499675} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-861499675|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-861499675, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-861499675} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:28:29,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-545007716 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In-545007716 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd1~0_In-545007716 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-545007716 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-545007716| ~a$r_buff1_thd1~0_In-545007716) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-545007716|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-545007716, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-545007716, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-545007716, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-545007716} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-545007716|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-545007716, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-545007716, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-545007716, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-545007716} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:28:29,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:28:29,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1212673435 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1212673435 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In1212673435 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In1212673435 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out1212673435| ~a$w_buff1_used~0_In1212673435) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out1212673435| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1212673435, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1212673435, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1212673435, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1212673435} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1212673435, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1212673435, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1212673435, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1212673435, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1212673435|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:28:29,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1886192205 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-1886192205 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1886192205| ~a$r_buff0_thd3~0_In-1886192205) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1886192205| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1886192205, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1886192205} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1886192205, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1886192205, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1886192205|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:28:29,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In1162303304 256))) (.cse3 (= (mod ~a$r_buff1_thd3~0_In1162303304 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1162303304 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1162303304 256)))) (or (and (= ~a$r_buff1_thd3~0_In1162303304 |P2Thread1of1ForFork0_#t~ite43_Out1162303304|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out1162303304| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1162303304, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1162303304, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1162303304, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1162303304} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1162303304|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1162303304, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1162303304, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1162303304, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1162303304} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:28:29,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:28:29,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:28:29,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-166969420 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-166969420 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out-166969420| |ULTIMATE.start_main_#t~ite48_Out-166969420|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~a$w_buff1~0_In-166969420 |ULTIMATE.start_main_#t~ite47_Out-166969420|)) (and (= |ULTIMATE.start_main_#t~ite47_Out-166969420| ~a~0_In-166969420) (or .cse0 .cse1) .cse2))) InVars {~a~0=~a~0_In-166969420, ~a$w_buff1~0=~a$w_buff1~0_In-166969420, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-166969420, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-166969420} OutVars{~a~0=~a~0_In-166969420, ~a$w_buff1~0=~a$w_buff1~0_In-166969420, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-166969420|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-166969420, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-166969420|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-166969420} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:28:29,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1608075832 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1608075832 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1608075832| ~a$w_buff0_used~0_In-1608075832)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-1608075832| 0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1608075832, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1608075832} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1608075832, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1608075832|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1608075832} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:28:29,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In1668612968 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1668612968 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1668612968 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd0~0_In1668612968 256) 0))) (or (and (= ~a$w_buff1_used~0_In1668612968 |ULTIMATE.start_main_#t~ite50_Out1668612968|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1668612968|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1668612968, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1668612968, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1668612968, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1668612968} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1668612968|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1668612968, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1668612968, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1668612968, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1668612968} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:28:29,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-172604652 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-172604652 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out-172604652| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In-172604652 |ULTIMATE.start_main_#t~ite51_Out-172604652|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-172604652, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-172604652} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-172604652|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-172604652, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-172604652} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:28:29,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1969687305 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1969687305 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1969687305 256))) (.cse3 (= (mod ~a$r_buff0_thd0~0_In-1969687305 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd0~0_In-1969687305 |ULTIMATE.start_main_#t~ite52_Out-1969687305|)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-1969687305|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1969687305, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1969687305, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1969687305, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1969687305} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1969687305|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1969687305, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1969687305, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1969687305, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1969687305} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:28:29,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_24) (= v_~x~0_77 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:28:29,346 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:28:29 BasicIcfg [2019-12-07 15:28:29,346 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:28:29,346 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:28:29,346 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:28:29,346 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:28:29,347 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:26:46" (3/4) ... [2019-12-07 15:28:29,348 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:28:29,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_89| 0 0))) (and (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1007~0.base_51|)) (= v_~main$tmp_guard0~0_31 0) (= v_~y~0_33 0) (= v_~main$tmp_guard1~0_50 0) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$mem_tmp~0_19 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1007~0.base_51| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1007~0.base_51|) |v_ULTIMATE.start_main_~#t1007~0.offset_32| 0)) |v_#memory_int_21|) (= v_~a$r_buff1_thd3~0_279 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$r_buff0_thd3~0_364 0) (= v_~z~0_14 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1007~0.base_51|) (< 0 |v_#StackHeapBarrier_17|) (= |v_ULTIMATE.start_main_~#t1007~0.offset_32| 0) (= 0 v_~weak$$choice0~0_15) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p1_EAX~0_57) (= 0 v_~a$w_buff1_used~0_506) (= (store .cse0 |v_ULTIMATE.start_main_~#t1007~0.base_51| 1) |v_#valid_87|) (= v_~a$r_buff1_thd0~0_160 0) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= v_~a$flush_delayed~0_30 0) (= 0 v_~x~0_130) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~weak$$choice2~0_108 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1007~0.base_51| 4)) (= v_~a~0_163 0) (= v_~__unbuffered_p2_EBX~0_61 0) (= 0 v_~__unbuffered_p2_EAX~0_52) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_89|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_163, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ULTIMATE.start_main_~#t1008~0.offset=|v_ULTIMATE.start_main_~#t1008~0.offset_19|, ULTIMATE.start_main_~#t1008~0.base=|v_ULTIMATE.start_main_~#t1008~0.base_39|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_57, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_52, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_61, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_130, ULTIMATE.start_main_~#t1007~0.offset=|v_ULTIMATE.start_main_~#t1007~0.offset_32|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ULTIMATE.start_main_~#t1009~0.base=|v_ULTIMATE.start_main_~#t1009~0.base_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_19, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_33, ULTIMATE.start_main_~#t1009~0.offset=|v_ULTIMATE.start_main_~#t1009~0.offset_20|, ULTIMATE.start_main_~#t1007~0.base=|v_ULTIMATE.start_main_~#t1007~0.base_51|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, #valid=|v_#valid_87|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_14, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t1008~0.offset, ULTIMATE.start_main_~#t1008~0.base, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1007~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ULTIMATE.start_main_~#t1009~0.base, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t1009~0.offset, ULTIMATE.start_main_~#t1007~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:28:29,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~a$r_buff1_thd3~0_Out-278990392 ~a$r_buff0_thd3~0_In-278990392) (= 1 ~x~0_Out-278990392) (= 1 ~a$r_buff0_thd1~0_Out-278990392) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-278990392 0)) (= ~a$r_buff0_thd0~0_In-278990392 ~a$r_buff1_thd0~0_Out-278990392) (= ~a$r_buff1_thd2~0_Out-278990392 ~a$r_buff0_thd2~0_In-278990392) (= ~a$r_buff1_thd1~0_Out-278990392 ~a$r_buff0_thd1~0_In-278990392)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-278990392, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-278990392, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-278990392, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-278990392, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-278990392} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-278990392, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-278990392, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-278990392, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-278990392, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-278990392, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-278990392, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-278990392, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-278990392, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-278990392, ~x~0=~x~0_Out-278990392} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 15:28:29,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1008~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1008~0.offset_7| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1008~0.base_9|)) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1008~0.base_9|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1008~0.base_9| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1008~0.base_9|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1008~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1008~0.base_9|) |v_ULTIMATE.start_main_~#t1008~0.offset_7| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1008~0.offset=|v_ULTIMATE.start_main_~#t1008~0.offset_7|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1008~0.base=|v_ULTIMATE.start_main_~#t1008~0.base_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1008~0.offset, ULTIMATE.start_main_~#t1008~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 15:28:29,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1009~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1009~0.offset_8| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1009~0.base_9|)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1009~0.base_9| 4)) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1009~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1009~0.base_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1009~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1009~0.base_9|) |v_ULTIMATE.start_main_~#t1009~0.offset_8| 2)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1009~0.offset=|v_ULTIMATE.start_main_~#t1009~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1009~0.base=|v_ULTIMATE.start_main_~#t1009~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1009~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1009~0.base, #length] because there is no mapped edge [2019-12-07 15:28:29,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In1161010058 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1161010058 256) 0)) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1161010058| |P1Thread1of1ForFork2_#t~ite10_Out1161010058|))) (or (and (not .cse0) (not .cse1) .cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1161010058| ~a$w_buff1~0_In1161010058)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out1161010058| ~a~0_In1161010058) .cse2))) InVars {~a~0=~a~0_In1161010058, ~a$w_buff1~0=~a$w_buff1~0_In1161010058, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1161010058, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1161010058} OutVars{~a~0=~a~0_In1161010058, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1161010058|, ~a$w_buff1~0=~a$w_buff1~0_In1161010058, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1161010058, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1161010058|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1161010058} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:28:29,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1546873193 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1546873193 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1546873193| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out1546873193| ~a$w_buff0_used~0_In1546873193)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1546873193, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1546873193} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1546873193, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1546873193, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1546873193|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:28:29,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-155777321 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-155777321 256))) (.cse3 (= (mod ~a$r_buff1_thd2~0_In-155777321 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-155777321 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-155777321|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-155777321 |P1Thread1of1ForFork2_#t~ite12_Out-155777321|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-155777321, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-155777321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-155777321, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-155777321} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-155777321, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-155777321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-155777321, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-155777321|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-155777321} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:28:29,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1232627745 256)))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-1232627745 256)))) (or (= (mod ~a$w_buff0_used~0_In-1232627745 256) 0) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1232627745 256))) (and (= (mod ~a$w_buff1_used~0_In-1232627745 256) 0) .cse0))) (= |P2Thread1of1ForFork0_#t~ite20_Out-1232627745| ~a$w_buff0~0_In-1232627745) .cse1 (= |P2Thread1of1ForFork0_#t~ite21_Out-1232627745| |P2Thread1of1ForFork0_#t~ite20_Out-1232627745|)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite21_Out-1232627745| ~a$w_buff0~0_In-1232627745) (= |P2Thread1of1ForFork0_#t~ite20_In-1232627745| |P2Thread1of1ForFork0_#t~ite20_Out-1232627745|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1232627745, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1232627745, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1232627745, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1232627745, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1232627745, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1232627745|, ~weak$$choice2~0=~weak$$choice2~0_In-1232627745} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1232627745|, ~a$w_buff0~0=~a$w_buff0~0_In-1232627745, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1232627745, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1232627745, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1232627745, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1232627745|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1232627745, ~weak$$choice2~0=~weak$$choice2~0_In-1232627745} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:28:29,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd2~0_In-1788256005 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1788256005 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1788256005| ~a$r_buff0_thd2~0_In-1788256005)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out-1788256005| 0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1788256005, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1788256005} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1788256005, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1788256005, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1788256005|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:28:29,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= (mod ~a$r_buff0_thd2~0_In-1846830626 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1846830626 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1846830626 256))) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1846830626 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1846830626|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-1846830626| ~a$r_buff1_thd2~0_In-1846830626) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1846830626, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1846830626, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1846830626, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1846830626} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1846830626, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1846830626, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1846830626, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1846830626, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1846830626|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:28:29,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:28:29,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1212282134 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_In-1212282134| |P2Thread1of1ForFork0_#t~ite23_Out-1212282134|) (not .cse0) (= ~a$w_buff1~0_In-1212282134 |P2Thread1of1ForFork0_#t~ite24_Out-1212282134|)) (and (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1212282134 256) 0))) (or (and .cse1 (= (mod ~a$w_buff1_used~0_In-1212282134 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In-1212282134 256)) (and (= (mod ~a$r_buff1_thd3~0_In-1212282134 256) 0) .cse1))) (= ~a$w_buff1~0_In-1212282134 |P2Thread1of1ForFork0_#t~ite23_Out-1212282134|) (= |P2Thread1of1ForFork0_#t~ite24_Out-1212282134| |P2Thread1of1ForFork0_#t~ite23_Out-1212282134|) .cse0))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-1212282134, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-1212282134|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1212282134, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1212282134, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1212282134, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1212282134, ~weak$$choice2~0=~weak$$choice2~0_In-1212282134} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-1212282134, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-1212282134|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-1212282134|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1212282134, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1212282134, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1212282134, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1212282134, ~weak$$choice2~0=~weak$$choice2~0_In-1212282134} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 15:28:29,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1341677112 256)))) (or (and (= ~a$w_buff0_used~0_In-1341677112 |P2Thread1of1ForFork0_#t~ite27_Out-1341677112|) (= |P2Thread1of1ForFork0_#t~ite26_In-1341677112| |P2Thread1of1ForFork0_#t~ite26_Out-1341677112|) (not .cse0)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1341677112| |P2Thread1of1ForFork0_#t~ite26_Out-1341677112|) (= ~a$w_buff0_used~0_In-1341677112 |P2Thread1of1ForFork0_#t~ite26_Out-1341677112|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1341677112 256) 0))) (or (and .cse1 (= (mod ~a$w_buff1_used~0_In-1341677112 256) 0)) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1341677112 256))) (= (mod ~a$w_buff0_used~0_In-1341677112 256) 0)))))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1341677112|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112, ~weak$$choice2~0=~weak$$choice2~0_In-1341677112} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1341677112|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1341677112|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112, ~weak$$choice2~0=~weak$$choice2~0_In-1341677112} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:28:29,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:28:29,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 15:28:29,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In250590756 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In250590756 256) 0))) (or (and (= ~a~0_In250590756 |P2Thread1of1ForFork0_#t~ite38_Out250590756|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= ~a$w_buff1~0_In250590756 |P2Thread1of1ForFork0_#t~ite38_Out250590756|)))) InVars {~a~0=~a~0_In250590756, ~a$w_buff1~0=~a$w_buff1~0_In250590756, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In250590756, ~a$w_buff1_used~0=~a$w_buff1_used~0_In250590756} OutVars{~a~0=~a~0_In250590756, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out250590756|, ~a$w_buff1~0=~a$w_buff1~0_In250590756, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In250590756, ~a$w_buff1_used~0=~a$w_buff1_used~0_In250590756} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:28:29,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:28:29,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In953774427 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In953774427 256) 0))) (or (and (= ~a$w_buff0_used~0_In953774427 |P2Thread1of1ForFork0_#t~ite40_Out953774427|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out953774427|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In953774427, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In953774427} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out953774427|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In953774427, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In953774427} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:28:29,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In31237751 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd1~0_In31237751 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In31237751 |P0Thread1of1ForFork1_#t~ite5_Out31237751|)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out31237751| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In31237751, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In31237751} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out31237751|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In31237751, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In31237751} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:28:29,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In1837628313 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1837628313 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1837628313 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In1837628313 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out1837628313| 0)) (and (= ~a$w_buff1_used~0_In1837628313 |P0Thread1of1ForFork1_#t~ite6_Out1837628313|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1837628313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1837628313, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1837628313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1837628313} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1837628313|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1837628313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1837628313, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1837628313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1837628313} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:28:29,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In-861499675 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_Out-861499675 ~a$r_buff0_thd1~0_In-861499675)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-861499675 256)))) (or (and .cse0 .cse1) (and (= ~a$r_buff0_thd1~0_Out-861499675 0) (not .cse0) (not .cse2)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-861499675, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-861499675} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-861499675|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-861499675, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-861499675} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:28:29,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-545007716 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In-545007716 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd1~0_In-545007716 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-545007716 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-545007716| ~a$r_buff1_thd1~0_In-545007716) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-545007716|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-545007716, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-545007716, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-545007716, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-545007716} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-545007716|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-545007716, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-545007716, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-545007716, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-545007716} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:28:29,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:28:29,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1212673435 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1212673435 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In1212673435 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In1212673435 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out1212673435| ~a$w_buff1_used~0_In1212673435) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out1212673435| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1212673435, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1212673435, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1212673435, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1212673435} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1212673435, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1212673435, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1212673435, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1212673435, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1212673435|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:28:29,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1886192205 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-1886192205 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1886192205| ~a$r_buff0_thd3~0_In-1886192205) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1886192205| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1886192205, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1886192205} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1886192205, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1886192205, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1886192205|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:28:29,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In1162303304 256))) (.cse3 (= (mod ~a$r_buff1_thd3~0_In1162303304 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1162303304 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1162303304 256)))) (or (and (= ~a$r_buff1_thd3~0_In1162303304 |P2Thread1of1ForFork0_#t~ite43_Out1162303304|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out1162303304| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1162303304, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1162303304, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1162303304, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1162303304} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1162303304|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1162303304, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1162303304, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1162303304, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1162303304} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:28:29,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:28:29,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:28:29,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-166969420 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-166969420 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out-166969420| |ULTIMATE.start_main_#t~ite48_Out-166969420|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~a$w_buff1~0_In-166969420 |ULTIMATE.start_main_#t~ite47_Out-166969420|)) (and (= |ULTIMATE.start_main_#t~ite47_Out-166969420| ~a~0_In-166969420) (or .cse0 .cse1) .cse2))) InVars {~a~0=~a~0_In-166969420, ~a$w_buff1~0=~a$w_buff1~0_In-166969420, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-166969420, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-166969420} OutVars{~a~0=~a~0_In-166969420, ~a$w_buff1~0=~a$w_buff1~0_In-166969420, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-166969420|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-166969420, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-166969420|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-166969420} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:28:29,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1608075832 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1608075832 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1608075832| ~a$w_buff0_used~0_In-1608075832)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-1608075832| 0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1608075832, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1608075832} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1608075832, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1608075832|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1608075832} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:28:29,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In1668612968 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1668612968 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1668612968 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd0~0_In1668612968 256) 0))) (or (and (= ~a$w_buff1_used~0_In1668612968 |ULTIMATE.start_main_#t~ite50_Out1668612968|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1668612968|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1668612968, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1668612968, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1668612968, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1668612968} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1668612968|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1668612968, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1668612968, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1668612968, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1668612968} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:28:29,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-172604652 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-172604652 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out-172604652| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In-172604652 |ULTIMATE.start_main_#t~ite51_Out-172604652|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-172604652, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-172604652} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-172604652|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-172604652, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-172604652} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:28:29,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1969687305 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1969687305 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1969687305 256))) (.cse3 (= (mod ~a$r_buff0_thd0~0_In-1969687305 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd0~0_In-1969687305 |ULTIMATE.start_main_#t~ite52_Out-1969687305|)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-1969687305|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1969687305, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1969687305, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1969687305, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1969687305} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1969687305|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1969687305, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1969687305, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1969687305, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1969687305} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:28:29,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_24) (= v_~x~0_77 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:28:29,415 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_de3d2782-b1bb-4b2b-aee3-215513bf812c/bin/uautomizer/witness.graphml [2019-12-07 15:28:29,415 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:28:29,416 INFO L168 Benchmark]: Toolchain (without parser) took 104164.94 ms. Allocated memory was 1.0 GB in the beginning and 7.6 GB in the end (delta: 6.5 GB). Free memory was 938.2 MB in the beginning and 3.0 GB in the end (delta: -2.1 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 15:28:29,416 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:28:29,416 INFO L168 Benchmark]: CACSL2BoogieTranslator took 382.42 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 118.0 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -147.3 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. [2019-12-07 15:28:29,416 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:28:29,416 INFO L168 Benchmark]: Boogie Preprocessor took 26.73 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:28:29,417 INFO L168 Benchmark]: RCFGBuilder took 429.29 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:28:29,417 INFO L168 Benchmark]: TraceAbstraction took 103215.69 ms. Allocated memory was 1.1 GB in the beginning and 7.6 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 3.1 GB in the end (delta: -2.1 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 15:28:29,417 INFO L168 Benchmark]: Witness Printer took 68.51 ms. Allocated memory is still 7.6 GB. Free memory was 3.1 GB in the beginning and 3.0 GB in the end (delta: 81.0 MB). Peak memory consumption was 81.0 MB. Max. memory is 11.5 GB. [2019-12-07 15:28:29,418 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 382.42 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 118.0 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -147.3 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.73 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 429.29 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 103215.69 ms. Allocated memory was 1.1 GB in the beginning and 7.6 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 3.1 GB in the end (delta: -2.1 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. * Witness Printer took 68.51 ms. Allocated memory is still 7.6 GB. Free memory was 3.1 GB in the beginning and 3.0 GB in the end (delta: 81.0 MB). Peak memory consumption was 81.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.8s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 100 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 33 ChoiceCompositions, 7286 VarBasedMoverChecksPositive, 247 VarBasedMoverChecksNegative, 37 SemBasedMoverChecksPositive, 286 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 87212 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L830] FCALL, FORK 0 pthread_create(&t1007, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L733] 1 a$w_buff1 = a$w_buff0 [L734] 1 a$w_buff0 = 1 [L735] 1 a$w_buff1_used = a$w_buff0_used [L736] 1 a$w_buff0_used = (_Bool)1 [L832] FCALL, FORK 0 pthread_create(&t1008, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L762] 2 x = 2 [L765] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L768] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L768] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L834] FCALL, FORK 0 pthread_create(&t1009, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L782] 3 y = 1 [L785] 3 z = 1 [L788] 3 __unbuffered_p2_EAX = z [L791] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L792] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L793] 3 a$flush_delayed = weak$$choice2 [L794] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L795] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L795] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L769] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L796] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L770] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L771] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L748] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L797] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L798] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L799] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L799] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L801] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L802] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L748] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L807] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L749] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L750] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L808] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L809] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L810] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L840] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L840] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L841] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L842] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L843] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 103.0s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 24.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6307 SDtfs, 8892 SDslu, 14737 SDs, 0 SdLazy, 9889 SolverSat, 584 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 325 GetRequests, 54 SyntacticMatches, 15 SemanticMatches, 256 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1722 ImplicationChecksByTransitivity, 2.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=263353occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 61.0s AutomataMinimizationTime, 29 MinimizatonAttempts, 565995 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 1094 NumberOfCodeBlocks, 1094 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 998 ConstructedInterpolants, 0 QuantifiedInterpolants, 208113 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...