./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix038_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix038_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d7cb8982ef8fcbc6dd237835e3a4e45e7338e5b9 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:58:22,738 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:58:22,739 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:58:22,747 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:58:22,747 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:58:22,748 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:58:22,749 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:58:22,750 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:58:22,751 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:58:22,752 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:58:22,752 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:58:22,753 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:58:22,753 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:58:22,754 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:58:22,755 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:58:22,756 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:58:22,756 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:58:22,757 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:58:22,758 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:58:22,759 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:58:22,760 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:58:22,761 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:58:22,762 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:58:22,762 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:58:22,764 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:58:22,764 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:58:22,764 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:58:22,765 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:58:22,765 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:58:22,766 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:58:22,766 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:58:22,766 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:58:22,767 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:58:22,767 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:58:22,768 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:58:22,768 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:58:22,768 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:58:22,768 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:58:22,768 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:58:22,769 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:58:22,769 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:58:22,770 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 13:58:22,779 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:58:22,779 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:58:22,780 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 13:58:22,780 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 13:58:22,780 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 13:58:22,780 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:58:22,780 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:58:22,780 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:58:22,780 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:58:22,780 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:58:22,781 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:58:22,781 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:58:22,781 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:58:22,781 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:58:22,781 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:58:22,781 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:58:22,781 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:58:22,781 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:58:22,781 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 13:58:22,781 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:58:22,782 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:58:22,782 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:58:22,782 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:58:22,782 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:58:22,782 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:58:22,782 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 13:58:22,782 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:58:22,782 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:58:22,783 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:58:22,783 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d7cb8982ef8fcbc6dd237835e3a4e45e7338e5b9 [2019-12-07 13:58:22,882 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:58:22,891 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:58:22,893 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:58:22,894 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:58:22,894 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:58:22,895 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix038_rmo.oepc.i [2019-12-07 13:58:22,934 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/data/d354e4f51/bd68f02dfae649efa59ba16b9cdcce55/FLAGf712fca35 [2019-12-07 13:58:23,375 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:58:23,376 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/sv-benchmarks/c/pthread-wmm/mix038_rmo.oepc.i [2019-12-07 13:58:23,387 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/data/d354e4f51/bd68f02dfae649efa59ba16b9cdcce55/FLAGf712fca35 [2019-12-07 13:58:23,724 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/data/d354e4f51/bd68f02dfae649efa59ba16b9cdcce55 [2019-12-07 13:58:23,727 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:58:23,728 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:58:23,729 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:58:23,729 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:58:23,732 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:58:23,732 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:58:23" (1/1) ... [2019-12-07 13:58:23,735 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7030ab51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:23, skipping insertion in model container [2019-12-07 13:58:23,735 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:58:23" (1/1) ... [2019-12-07 13:58:23,741 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:58:23,781 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:58:24,055 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:58:24,063 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:58:24,109 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:58:24,157 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:58:24,157 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24 WrapperNode [2019-12-07 13:58:24,157 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:58:24,158 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:58:24,158 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:58:24,158 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:58:24,164 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24" (1/1) ... [2019-12-07 13:58:24,177 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24" (1/1) ... [2019-12-07 13:58:24,195 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:58:24,195 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:58:24,195 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:58:24,195 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:58:24,201 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24" (1/1) ... [2019-12-07 13:58:24,201 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24" (1/1) ... [2019-12-07 13:58:24,205 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24" (1/1) ... [2019-12-07 13:58:24,205 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24" (1/1) ... [2019-12-07 13:58:24,212 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24" (1/1) ... [2019-12-07 13:58:24,215 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24" (1/1) ... [2019-12-07 13:58:24,217 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24" (1/1) ... [2019-12-07 13:58:24,220 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:58:24,220 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:58:24,221 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:58:24,221 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:58:24,221 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:58:24,260 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:58:24,260 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:58:24,260 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:58:24,260 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:58:24,260 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:58:24,260 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:58:24,261 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:58:24,261 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:58:24,261 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:58:24,261 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:58:24,261 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:58:24,261 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:58:24,261 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:58:24,262 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:58:24,622 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:58:24,622 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:58:24,623 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:58:24 BoogieIcfgContainer [2019-12-07 13:58:24,623 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:58:24,624 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:58:24,624 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:58:24,626 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:58:24,626 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:58:23" (1/3) ... [2019-12-07 13:58:24,626 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4173cc5d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:58:24, skipping insertion in model container [2019-12-07 13:58:24,627 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:58:24" (2/3) ... [2019-12-07 13:58:24,627 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4173cc5d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:58:24, skipping insertion in model container [2019-12-07 13:58:24,627 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:58:24" (3/3) ... [2019-12-07 13:58:24,628 INFO L109 eAbstractionObserver]: Analyzing ICFG mix038_rmo.oepc.i [2019-12-07 13:58:24,635 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:58:24,635 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:58:24,640 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:58:24,641 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:58:24,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,670 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,670 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,670 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,671 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,671 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,675 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,675 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,680 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,680 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,681 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,681 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:58:24,706 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 13:58:24,719 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:58:24,719 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:58:24,719 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:58:24,720 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:58:24,720 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:58:24,720 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:58:24,720 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:58:24,720 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:58:24,732 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 13:58:24,733 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 13:58:24,796 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 13:58:24,796 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:58:24,806 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:58:24,823 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 13:58:24,854 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 13:58:24,854 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:58:24,860 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:58:24,875 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 13:58:24,876 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:58:27,821 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 13:58:28,140 WARN L192 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 13:58:28,228 INFO L206 etLargeBlockEncoding]: Checked pairs total: 87212 [2019-12-07 13:58:28,228 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 13:58:28,231 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 13:58:39,824 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 13:58:39,825 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 13:58:39,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 13:58:39,829 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:58:39,829 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 13:58:39,829 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:58:39,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:58:39,833 INFO L82 PathProgramCache]: Analyzing trace with hash 919766, now seen corresponding path program 1 times [2019-12-07 13:58:39,838 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:58:39,839 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870018726] [2019-12-07 13:58:39,839 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:58:39,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:58:39,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:58:39,982 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [870018726] [2019-12-07 13:58:39,983 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:58:39,983 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:58:39,984 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1411151172] [2019-12-07 13:58:39,987 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:58:39,987 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:58:39,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:58:39,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:58:39,997 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 13:58:40,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:58:40,714 INFO L93 Difference]: Finished difference Result 101544 states and 430594 transitions. [2019-12-07 13:58:40,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:58:40,716 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 13:58:40,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:58:41,125 INFO L225 Difference]: With dead ends: 101544 [2019-12-07 13:58:41,125 INFO L226 Difference]: Without dead ends: 95304 [2019-12-07 13:58:41,126 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:58:44,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95304 states. [2019-12-07 13:58:45,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95304 to 95304. [2019-12-07 13:58:45,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95304 states. [2019-12-07 13:58:45,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95304 states to 95304 states and 403554 transitions. [2019-12-07 13:58:45,816 INFO L78 Accepts]: Start accepts. Automaton has 95304 states and 403554 transitions. Word has length 3 [2019-12-07 13:58:45,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:58:45,816 INFO L462 AbstractCegarLoop]: Abstraction has 95304 states and 403554 transitions. [2019-12-07 13:58:45,816 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:58:45,816 INFO L276 IsEmpty]: Start isEmpty. Operand 95304 states and 403554 transitions. [2019-12-07 13:58:45,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:58:45,819 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:58:45,819 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:58:45,820 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:58:45,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:58:45,820 INFO L82 PathProgramCache]: Analyzing trace with hash -1982627867, now seen corresponding path program 1 times [2019-12-07 13:58:45,820 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:58:45,820 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1789542983] [2019-12-07 13:58:45,820 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:58:45,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:58:45,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:58:45,879 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1789542983] [2019-12-07 13:58:45,879 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:58:45,879 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:58:45,879 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146148567] [2019-12-07 13:58:45,880 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:58:45,880 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:58:45,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:58:45,881 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:58:45,881 INFO L87 Difference]: Start difference. First operand 95304 states and 403554 transitions. Second operand 4 states. [2019-12-07 13:58:48,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:58:48,273 INFO L93 Difference]: Finished difference Result 152040 states and 617140 transitions. [2019-12-07 13:58:48,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:58:48,274 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:58:48,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:58:48,653 INFO L225 Difference]: With dead ends: 152040 [2019-12-07 13:58:48,654 INFO L226 Difference]: Without dead ends: 151991 [2019-12-07 13:58:48,654 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:58:52,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151991 states. [2019-12-07 13:58:54,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151991 to 137801. [2019-12-07 13:58:54,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137801 states. [2019-12-07 13:58:55,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137801 states to 137801 states and 566928 transitions. [2019-12-07 13:58:55,052 INFO L78 Accepts]: Start accepts. Automaton has 137801 states and 566928 transitions. Word has length 11 [2019-12-07 13:58:55,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:58:55,052 INFO L462 AbstractCegarLoop]: Abstraction has 137801 states and 566928 transitions. [2019-12-07 13:58:55,052 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:58:55,052 INFO L276 IsEmpty]: Start isEmpty. Operand 137801 states and 566928 transitions. [2019-12-07 13:58:55,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:58:55,059 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:58:55,059 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:58:55,059 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:58:55,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:58:55,059 INFO L82 PathProgramCache]: Analyzing trace with hash -1673757482, now seen corresponding path program 1 times [2019-12-07 13:58:55,059 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:58:55,060 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053913693] [2019-12-07 13:58:55,060 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:58:55,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:58:55,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:58:55,120 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2053913693] [2019-12-07 13:58:55,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:58:55,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:58:55,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [325135357] [2019-12-07 13:58:55,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:58:55,121 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:58:55,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:58:55,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:58:55,122 INFO L87 Difference]: Start difference. First operand 137801 states and 566928 transitions. Second operand 4 states. [2019-12-07 13:58:56,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:58:56,122 INFO L93 Difference]: Finished difference Result 197752 states and 794963 transitions. [2019-12-07 13:58:56,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:58:56,123 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 13:58:56,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:58:56,623 INFO L225 Difference]: With dead ends: 197752 [2019-12-07 13:58:56,623 INFO L226 Difference]: Without dead ends: 197696 [2019-12-07 13:58:56,624 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:59:03,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197696 states. [2019-12-07 13:59:05,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197696 to 164675. [2019-12-07 13:59:05,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164675 states. [2019-12-07 13:59:05,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164675 states to 164675 states and 674105 transitions. [2019-12-07 13:59:05,771 INFO L78 Accepts]: Start accepts. Automaton has 164675 states and 674105 transitions. Word has length 13 [2019-12-07 13:59:05,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:59:05,772 INFO L462 AbstractCegarLoop]: Abstraction has 164675 states and 674105 transitions. [2019-12-07 13:59:05,772 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:59:05,772 INFO L276 IsEmpty]: Start isEmpty. Operand 164675 states and 674105 transitions. [2019-12-07 13:59:05,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:59:05,778 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:59:05,778 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:59:05,779 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:59:05,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:59:05,779 INFO L82 PathProgramCache]: Analyzing trace with hash 841711145, now seen corresponding path program 1 times [2019-12-07 13:59:05,779 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:59:05,779 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478355072] [2019-12-07 13:59:05,779 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:59:05,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:59:05,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:59:05,821 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478355072] [2019-12-07 13:59:05,821 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:59:05,821 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:59:05,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1526107189] [2019-12-07 13:59:05,822 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:59:05,822 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:59:05,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:59:05,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:59:05,822 INFO L87 Difference]: Start difference. First operand 164675 states and 674105 transitions. Second operand 4 states. [2019-12-07 13:59:07,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:59:07,262 INFO L93 Difference]: Finished difference Result 202675 states and 826980 transitions. [2019-12-07 13:59:07,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:59:07,263 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 13:59:07,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:59:07,769 INFO L225 Difference]: With dead ends: 202675 [2019-12-07 13:59:07,769 INFO L226 Difference]: Without dead ends: 202675 [2019-12-07 13:59:07,770 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:59:12,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202675 states. [2019-12-07 13:59:16,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202675 to 172880. [2019-12-07 13:59:16,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172880 states. [2019-12-07 13:59:17,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172880 states to 172880 states and 708759 transitions. [2019-12-07 13:59:17,481 INFO L78 Accepts]: Start accepts. Automaton has 172880 states and 708759 transitions. Word has length 16 [2019-12-07 13:59:17,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:59:17,481 INFO L462 AbstractCegarLoop]: Abstraction has 172880 states and 708759 transitions. [2019-12-07 13:59:17,481 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:59:17,481 INFO L276 IsEmpty]: Start isEmpty. Operand 172880 states and 708759 transitions. [2019-12-07 13:59:17,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 13:59:17,497 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:59:17,497 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:59:17,497 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:59:17,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:59:17,498 INFO L82 PathProgramCache]: Analyzing trace with hash -118269295, now seen corresponding path program 1 times [2019-12-07 13:59:17,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:59:17,498 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725800249] [2019-12-07 13:59:17,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:59:17,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:59:17,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:59:17,568 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725800249] [2019-12-07 13:59:17,568 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:59:17,568 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:59:17,568 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1306626587] [2019-12-07 13:59:17,568 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:59:17,568 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:59:17,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:59:17,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:59:17,569 INFO L87 Difference]: Start difference. First operand 172880 states and 708759 transitions. Second operand 3 states. [2019-12-07 13:59:19,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:59:19,184 INFO L93 Difference]: Finished difference Result 309307 states and 1259353 transitions. [2019-12-07 13:59:19,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:59:19,185 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 13:59:19,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:59:19,863 INFO L225 Difference]: With dead ends: 309307 [2019-12-07 13:59:19,863 INFO L226 Difference]: Without dead ends: 274877 [2019-12-07 13:59:19,864 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:59:25,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274877 states. [2019-12-07 13:59:31,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274877 to 263353. [2019-12-07 13:59:31,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263353 states. [2019-12-07 13:59:32,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263353 states to 263353 states and 1079819 transitions. [2019-12-07 13:59:32,863 INFO L78 Accepts]: Start accepts. Automaton has 263353 states and 1079819 transitions. Word has length 18 [2019-12-07 13:59:32,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:59:32,864 INFO L462 AbstractCegarLoop]: Abstraction has 263353 states and 1079819 transitions. [2019-12-07 13:59:32,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:59:32,864 INFO L276 IsEmpty]: Start isEmpty. Operand 263353 states and 1079819 transitions. [2019-12-07 13:59:32,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:59:32,883 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:59:32,884 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:59:32,884 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:59:32,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:59:32,884 INFO L82 PathProgramCache]: Analyzing trace with hash 1108465109, now seen corresponding path program 1 times [2019-12-07 13:59:32,884 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:59:32,884 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568457188] [2019-12-07 13:59:32,884 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:59:32,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:59:32,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:59:32,934 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1568457188] [2019-12-07 13:59:32,934 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:59:32,934 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:59:32,935 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1817612109] [2019-12-07 13:59:32,935 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:59:32,935 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:59:32,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:59:32,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:59:32,936 INFO L87 Difference]: Start difference. First operand 263353 states and 1079819 transitions. Second operand 4 states. [2019-12-07 13:59:34,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:59:34,079 INFO L93 Difference]: Finished difference Result 273771 states and 1111706 transitions. [2019-12-07 13:59:34,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:59:34,080 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 13:59:34,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:59:34,765 INFO L225 Difference]: With dead ends: 273771 [2019-12-07 13:59:34,765 INFO L226 Difference]: Without dead ends: 273771 [2019-12-07 13:59:34,766 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:59:40,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273771 states. [2019-12-07 13:59:47,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273771 to 260248. [2019-12-07 13:59:47,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260248 states. [2019-12-07 13:59:48,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260248 states to 260248 states and 1067976 transitions. [2019-12-07 13:59:48,296 INFO L78 Accepts]: Start accepts. Automaton has 260248 states and 1067976 transitions. Word has length 19 [2019-12-07 13:59:48,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:59:48,296 INFO L462 AbstractCegarLoop]: Abstraction has 260248 states and 1067976 transitions. [2019-12-07 13:59:48,296 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:59:48,296 INFO L276 IsEmpty]: Start isEmpty. Operand 260248 states and 1067976 transitions. [2019-12-07 13:59:48,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:59:48,313 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:59:48,313 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:59:48,313 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:59:48,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:59:48,313 INFO L82 PathProgramCache]: Analyzing trace with hash -430896444, now seen corresponding path program 1 times [2019-12-07 13:59:48,313 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:59:48,313 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1494630414] [2019-12-07 13:59:48,313 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:59:48,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:59:48,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:59:48,355 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1494630414] [2019-12-07 13:59:48,355 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:59:48,355 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:59:48,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [200328572] [2019-12-07 13:59:48,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:59:48,355 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:59:48,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:59:48,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:59:48,356 INFO L87 Difference]: Start difference. First operand 260248 states and 1067976 transitions. Second operand 4 states. [2019-12-07 13:59:49,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:59:49,977 INFO L93 Difference]: Finished difference Result 272869 states and 1108690 transitions. [2019-12-07 13:59:49,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:59:49,978 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 13:59:49,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:59:50,628 INFO L225 Difference]: With dead ends: 272869 [2019-12-07 13:59:50,628 INFO L226 Difference]: Without dead ends: 272869 [2019-12-07 13:59:50,629 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:59:56,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272869 states. [2019-12-07 13:59:59,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272869 to 260064. [2019-12-07 13:59:59,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260064 states. [2019-12-07 14:00:00,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260064 states to 260064 states and 1067236 transitions. [2019-12-07 14:00:00,582 INFO L78 Accepts]: Start accepts. Automaton has 260064 states and 1067236 transitions. Word has length 19 [2019-12-07 14:00:00,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:00,582 INFO L462 AbstractCegarLoop]: Abstraction has 260064 states and 1067236 transitions. [2019-12-07 14:00:00,582 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:00:00,583 INFO L276 IsEmpty]: Start isEmpty. Operand 260064 states and 1067236 transitions. [2019-12-07 14:00:00,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:00:00,600 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:00,600 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:00,600 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:00,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:00,600 INFO L82 PathProgramCache]: Analyzing trace with hash -2120254288, now seen corresponding path program 1 times [2019-12-07 14:00:00,601 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:00,601 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [671264574] [2019-12-07 14:00:00,601 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:00,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:00,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:00,638 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [671264574] [2019-12-07 14:00:00,638 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:00,638 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:00:00,638 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706315057] [2019-12-07 14:00:00,638 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:00:00,638 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:00,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:00:00,639 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:00:00,639 INFO L87 Difference]: Start difference. First operand 260064 states and 1067236 transitions. Second operand 5 states. [2019-12-07 14:00:02,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:02,960 INFO L93 Difference]: Finished difference Result 370203 states and 1490927 transitions. [2019-12-07 14:00:02,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:00:02,960 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:00:02,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:07,333 INFO L225 Difference]: With dead ends: 370203 [2019-12-07 14:00:07,334 INFO L226 Difference]: Without dead ends: 370112 [2019-12-07 14:00:07,334 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:00:13,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370112 states. [2019-12-07 14:00:17,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370112 to 277479. [2019-12-07 14:00:17,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277479 states. [2019-12-07 14:00:18,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277479 states to 277479 states and 1137649 transitions. [2019-12-07 14:00:18,934 INFO L78 Accepts]: Start accepts. Automaton has 277479 states and 1137649 transitions. Word has length 19 [2019-12-07 14:00:18,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:18,935 INFO L462 AbstractCegarLoop]: Abstraction has 277479 states and 1137649 transitions. [2019-12-07 14:00:18,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:00:18,935 INFO L276 IsEmpty]: Start isEmpty. Operand 277479 states and 1137649 transitions. [2019-12-07 14:00:18,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 14:00:18,956 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:18,956 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:18,956 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:18,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:18,957 INFO L82 PathProgramCache]: Analyzing trace with hash 1127256632, now seen corresponding path program 1 times [2019-12-07 14:00:18,957 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:18,957 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1550414853] [2019-12-07 14:00:18,957 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:18,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:18,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:18,996 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1550414853] [2019-12-07 14:00:18,996 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:18,996 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:00:18,996 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965689170] [2019-12-07 14:00:18,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:00:18,997 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:18,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:00:18,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:00:18,997 INFO L87 Difference]: Start difference. First operand 277479 states and 1137649 transitions. Second operand 4 states. [2019-12-07 14:00:21,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:21,125 INFO L93 Difference]: Finished difference Result 386447 states and 1577428 transitions. [2019-12-07 14:00:21,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:00:21,126 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 14:00:21,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:21,557 INFO L225 Difference]: With dead ends: 386447 [2019-12-07 14:00:21,558 INFO L226 Difference]: Without dead ends: 181302 [2019-12-07 14:00:21,558 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:00:25,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181302 states. [2019-12-07 14:00:28,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181302 to 162447. [2019-12-07 14:00:28,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162447 states. [2019-12-07 14:00:28,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162447 states to 162447 states and 655302 transitions. [2019-12-07 14:00:28,640 INFO L78 Accepts]: Start accepts. Automaton has 162447 states and 655302 transitions. Word has length 20 [2019-12-07 14:00:28,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:28,640 INFO L462 AbstractCegarLoop]: Abstraction has 162447 states and 655302 transitions. [2019-12-07 14:00:28,640 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:00:28,640 INFO L276 IsEmpty]: Start isEmpty. Operand 162447 states and 655302 transitions. [2019-12-07 14:00:28,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 14:00:28,653 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:28,653 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:28,653 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:28,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:28,653 INFO L82 PathProgramCache]: Analyzing trace with hash -1056835584, now seen corresponding path program 1 times [2019-12-07 14:00:28,654 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:28,654 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [618438679] [2019-12-07 14:00:28,654 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:28,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:28,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:28,678 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [618438679] [2019-12-07 14:00:28,679 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:28,679 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:00:28,679 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [437360628] [2019-12-07 14:00:28,679 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:00:28,679 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:28,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:00:28,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:28,680 INFO L87 Difference]: Start difference. First operand 162447 states and 655302 transitions. Second operand 3 states. [2019-12-07 14:00:29,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:29,629 INFO L93 Difference]: Finished difference Result 162447 states and 648417 transitions. [2019-12-07 14:00:29,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:00:29,630 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 14:00:29,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:29,998 INFO L225 Difference]: With dead ends: 162447 [2019-12-07 14:00:29,998 INFO L226 Difference]: Without dead ends: 162447 [2019-12-07 14:00:29,998 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:35,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162447 states. [2019-12-07 14:00:37,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162447 to 161359. [2019-12-07 14:00:37,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161359 states. [2019-12-07 14:00:38,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161359 states to 161359 states and 644479 transitions. [2019-12-07 14:00:38,276 INFO L78 Accepts]: Start accepts. Automaton has 161359 states and 644479 transitions. Word has length 20 [2019-12-07 14:00:38,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:38,276 INFO L462 AbstractCegarLoop]: Abstraction has 161359 states and 644479 transitions. [2019-12-07 14:00:38,276 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:00:38,276 INFO L276 IsEmpty]: Start isEmpty. Operand 161359 states and 644479 transitions. [2019-12-07 14:00:38,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 14:00:38,288 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:38,288 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:38,288 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:38,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:38,289 INFO L82 PathProgramCache]: Analyzing trace with hash -1271597393, now seen corresponding path program 1 times [2019-12-07 14:00:38,289 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:38,289 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1640267349] [2019-12-07 14:00:38,289 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:38,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:38,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:38,309 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1640267349] [2019-12-07 14:00:38,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:38,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:00:38,309 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [60828002] [2019-12-07 14:00:38,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:00:38,310 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:38,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:00:38,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:38,310 INFO L87 Difference]: Start difference. First operand 161359 states and 644479 transitions. Second operand 3 states. [2019-12-07 14:00:38,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:38,390 INFO L93 Difference]: Finished difference Result 28824 states and 90951 transitions. [2019-12-07 14:00:38,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:00:38,390 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 14:00:38,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:38,430 INFO L225 Difference]: With dead ends: 28824 [2019-12-07 14:00:38,430 INFO L226 Difference]: Without dead ends: 28824 [2019-12-07 14:00:38,430 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:38,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28824 states. [2019-12-07 14:00:38,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28824 to 28824. [2019-12-07 14:00:38,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28824 states. [2019-12-07 14:00:38,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28824 states to 28824 states and 90951 transitions. [2019-12-07 14:00:38,894 INFO L78 Accepts]: Start accepts. Automaton has 28824 states and 90951 transitions. Word has length 20 [2019-12-07 14:00:38,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:38,895 INFO L462 AbstractCegarLoop]: Abstraction has 28824 states and 90951 transitions. [2019-12-07 14:00:38,895 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:00:38,895 INFO L276 IsEmpty]: Start isEmpty. Operand 28824 states and 90951 transitions. [2019-12-07 14:00:38,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:00:38,898 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:38,898 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:38,899 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:38,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:38,899 INFO L82 PathProgramCache]: Analyzing trace with hash 361242897, now seen corresponding path program 1 times [2019-12-07 14:00:38,899 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:38,899 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1825196466] [2019-12-07 14:00:38,899 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:38,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:38,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:38,941 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1825196466] [2019-12-07 14:00:38,942 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:38,942 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:00:38,942 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1785895276] [2019-12-07 14:00:38,942 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:00:38,942 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:38,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:00:38,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:00:38,943 INFO L87 Difference]: Start difference. First operand 28824 states and 90951 transitions. Second operand 5 states. [2019-12-07 14:00:39,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:39,278 INFO L93 Difference]: Finished difference Result 37518 states and 116113 transitions. [2019-12-07 14:00:39,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:00:39,279 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 14:00:39,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:39,324 INFO L225 Difference]: With dead ends: 37518 [2019-12-07 14:00:39,324 INFO L226 Difference]: Without dead ends: 37511 [2019-12-07 14:00:39,324 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:00:39,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37511 states. [2019-12-07 14:00:40,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37511 to 29382. [2019-12-07 14:00:40,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29382 states. [2019-12-07 14:00:40,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29382 states to 29382 states and 92630 transitions. [2019-12-07 14:00:40,127 INFO L78 Accepts]: Start accepts. Automaton has 29382 states and 92630 transitions. Word has length 22 [2019-12-07 14:00:40,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:40,127 INFO L462 AbstractCegarLoop]: Abstraction has 29382 states and 92630 transitions. [2019-12-07 14:00:40,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:00:40,128 INFO L276 IsEmpty]: Start isEmpty. Operand 29382 states and 92630 transitions. [2019-12-07 14:00:40,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:00:40,133 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:40,133 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:40,133 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:40,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:40,134 INFO L82 PathProgramCache]: Analyzing trace with hash -1429942457, now seen corresponding path program 1 times [2019-12-07 14:00:40,134 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:40,134 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538941168] [2019-12-07 14:00:40,134 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:40,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:40,159 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:40,159 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [538941168] [2019-12-07 14:00:40,159 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:40,159 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:00:40,159 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441085675] [2019-12-07 14:00:40,159 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:00:40,159 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:40,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:00:40,160 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:40,160 INFO L87 Difference]: Start difference. First operand 29382 states and 92630 transitions. Second operand 3 states. [2019-12-07 14:00:40,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:40,283 INFO L93 Difference]: Finished difference Result 43358 states and 134685 transitions. [2019-12-07 14:00:40,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:00:40,284 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 14:00:40,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:40,343 INFO L225 Difference]: With dead ends: 43358 [2019-12-07 14:00:40,343 INFO L226 Difference]: Without dead ends: 43358 [2019-12-07 14:00:40,343 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:40,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43358 states. [2019-12-07 14:00:40,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43358 to 31380. [2019-12-07 14:00:40,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31380 states. [2019-12-07 14:00:40,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31380 states to 31380 states and 98434 transitions. [2019-12-07 14:00:40,941 INFO L78 Accepts]: Start accepts. Automaton has 31380 states and 98434 transitions. Word has length 27 [2019-12-07 14:00:40,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:40,941 INFO L462 AbstractCegarLoop]: Abstraction has 31380 states and 98434 transitions. [2019-12-07 14:00:40,941 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:00:40,941 INFO L276 IsEmpty]: Start isEmpty. Operand 31380 states and 98434 transitions. [2019-12-07 14:00:40,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:00:40,947 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:40,947 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:40,947 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:40,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:40,948 INFO L82 PathProgramCache]: Analyzing trace with hash -535275942, now seen corresponding path program 1 times [2019-12-07 14:00:40,948 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:40,948 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6760946] [2019-12-07 14:00:40,948 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:40,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:40,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:40,968 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [6760946] [2019-12-07 14:00:40,969 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:40,969 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:00:40,969 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [544949812] [2019-12-07 14:00:40,969 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:00:40,969 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:40,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:00:40,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:40,970 INFO L87 Difference]: Start difference. First operand 31380 states and 98434 transitions. Second operand 3 states. [2019-12-07 14:00:41,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:41,097 INFO L93 Difference]: Finished difference Result 46215 states and 141881 transitions. [2019-12-07 14:00:41,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:00:41,097 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 14:00:41,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:41,149 INFO L225 Difference]: With dead ends: 46215 [2019-12-07 14:00:41,149 INFO L226 Difference]: Without dead ends: 46215 [2019-12-07 14:00:41,149 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:41,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46215 states. [2019-12-07 14:00:41,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46215 to 34237. [2019-12-07 14:00:41,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34237 states. [2019-12-07 14:00:42,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34237 states to 34237 states and 105630 transitions. [2019-12-07 14:00:42,060 INFO L78 Accepts]: Start accepts. Automaton has 34237 states and 105630 transitions. Word has length 27 [2019-12-07 14:00:42,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:42,060 INFO L462 AbstractCegarLoop]: Abstraction has 34237 states and 105630 transitions. [2019-12-07 14:00:42,060 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:00:42,060 INFO L276 IsEmpty]: Start isEmpty. Operand 34237 states and 105630 transitions. [2019-12-07 14:00:42,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:00:42,066 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:42,066 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:42,066 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:42,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:42,067 INFO L82 PathProgramCache]: Analyzing trace with hash 1457952739, now seen corresponding path program 1 times [2019-12-07 14:00:42,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:42,067 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471272437] [2019-12-07 14:00:42,067 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:42,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:42,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:42,115 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1471272437] [2019-12-07 14:00:42,116 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:42,116 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:00:42,116 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1599352004] [2019-12-07 14:00:42,116 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:00:42,116 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:42,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:00:42,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:00:42,117 INFO L87 Difference]: Start difference. First operand 34237 states and 105630 transitions. Second operand 6 states. [2019-12-07 14:00:42,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:42,577 INFO L93 Difference]: Finished difference Result 69019 states and 211072 transitions. [2019-12-07 14:00:42,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:00:42,578 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 14:00:42,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:42,670 INFO L225 Difference]: With dead ends: 69019 [2019-12-07 14:00:42,671 INFO L226 Difference]: Without dead ends: 69000 [2019-12-07 14:00:42,671 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:00:42,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69000 states. [2019-12-07 14:00:43,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69000 to 36171. [2019-12-07 14:00:43,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36171 states. [2019-12-07 14:00:43,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36171 states to 36171 states and 111218 transitions. [2019-12-07 14:00:43,464 INFO L78 Accepts]: Start accepts. Automaton has 36171 states and 111218 transitions. Word has length 27 [2019-12-07 14:00:43,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:43,465 INFO L462 AbstractCegarLoop]: Abstraction has 36171 states and 111218 transitions. [2019-12-07 14:00:43,465 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:00:43,465 INFO L276 IsEmpty]: Start isEmpty. Operand 36171 states and 111218 transitions. [2019-12-07 14:00:43,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 14:00:43,472 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:43,472 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:43,472 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:43,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:43,472 INFO L82 PathProgramCache]: Analyzing trace with hash 294567066, now seen corresponding path program 1 times [2019-12-07 14:00:43,473 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:43,473 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [23978611] [2019-12-07 14:00:43,473 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:43,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:43,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:43,513 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [23978611] [2019-12-07 14:00:43,513 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:43,513 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:00:43,513 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2120046423] [2019-12-07 14:00:43,514 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:00:43,514 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:43,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:00:43,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:00:43,514 INFO L87 Difference]: Start difference. First operand 36171 states and 111218 transitions. Second operand 6 states. [2019-12-07 14:00:43,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:43,994 INFO L93 Difference]: Finished difference Result 63835 states and 193725 transitions. [2019-12-07 14:00:43,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:00:43,995 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 14:00:43,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:44,085 INFO L225 Difference]: With dead ends: 63835 [2019-12-07 14:00:44,085 INFO L226 Difference]: Without dead ends: 63813 [2019-12-07 14:00:44,085 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:00:44,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63813 states. [2019-12-07 14:00:44,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63813 to 35770. [2019-12-07 14:00:44,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35770 states. [2019-12-07 14:00:44,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35770 states to 35770 states and 109828 transitions. [2019-12-07 14:00:44,893 INFO L78 Accepts]: Start accepts. Automaton has 35770 states and 109828 transitions. Word has length 28 [2019-12-07 14:00:44,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:44,893 INFO L462 AbstractCegarLoop]: Abstraction has 35770 states and 109828 transitions. [2019-12-07 14:00:44,893 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:00:44,893 INFO L276 IsEmpty]: Start isEmpty. Operand 35770 states and 109828 transitions. [2019-12-07 14:00:44,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 14:00:44,903 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:44,903 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:44,903 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:44,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:44,903 INFO L82 PathProgramCache]: Analyzing trace with hash 313779856, now seen corresponding path program 1 times [2019-12-07 14:00:44,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:44,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1378098929] [2019-12-07 14:00:44,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:44,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:44,928 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:44,928 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1378098929] [2019-12-07 14:00:44,928 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:44,929 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:00:44,929 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [16159565] [2019-12-07 14:00:44,929 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:00:44,929 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:44,929 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:00:44,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:00:44,929 INFO L87 Difference]: Start difference. First operand 35770 states and 109828 transitions. Second operand 4 states. [2019-12-07 14:00:44,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:44,974 INFO L93 Difference]: Finished difference Result 13519 states and 39529 transitions. [2019-12-07 14:00:44,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:00:44,974 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 14:00:44,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:44,989 INFO L225 Difference]: With dead ends: 13519 [2019-12-07 14:00:44,989 INFO L226 Difference]: Without dead ends: 13519 [2019-12-07 14:00:44,989 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:00:45,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13519 states. [2019-12-07 14:00:45,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13519 to 13032. [2019-12-07 14:00:45,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13032 states. [2019-12-07 14:00:45,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13032 states to 13032 states and 38452 transitions. [2019-12-07 14:00:45,163 INFO L78 Accepts]: Start accepts. Automaton has 13032 states and 38452 transitions. Word has length 31 [2019-12-07 14:00:45,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:45,164 INFO L462 AbstractCegarLoop]: Abstraction has 13032 states and 38452 transitions. [2019-12-07 14:00:45,164 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:00:45,164 INFO L276 IsEmpty]: Start isEmpty. Operand 13032 states and 38452 transitions. [2019-12-07 14:00:45,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 14:00:45,172 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:45,172 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:45,172 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:45,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:45,172 INFO L82 PathProgramCache]: Analyzing trace with hash 1705939963, now seen corresponding path program 1 times [2019-12-07 14:00:45,172 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:45,172 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405532285] [2019-12-07 14:00:45,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:45,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:45,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:45,230 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1405532285] [2019-12-07 14:00:45,230 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:45,230 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:00:45,230 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1484624149] [2019-12-07 14:00:45,230 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:00:45,231 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:45,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:00:45,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:00:45,231 INFO L87 Difference]: Start difference. First operand 13032 states and 38452 transitions. Second operand 7 states. [2019-12-07 14:00:45,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:45,833 INFO L93 Difference]: Finished difference Result 26126 states and 75703 transitions. [2019-12-07 14:00:45,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 14:00:45,833 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 14:00:45,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:45,861 INFO L225 Difference]: With dead ends: 26126 [2019-12-07 14:00:45,861 INFO L226 Difference]: Without dead ends: 26126 [2019-12-07 14:00:45,861 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:00:45,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26126 states. [2019-12-07 14:00:46,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26126 to 13219. [2019-12-07 14:00:46,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13219 states. [2019-12-07 14:00:46,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13219 states to 13219 states and 39027 transitions. [2019-12-07 14:00:46,123 INFO L78 Accepts]: Start accepts. Automaton has 13219 states and 39027 transitions. Word has length 33 [2019-12-07 14:00:46,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:46,124 INFO L462 AbstractCegarLoop]: Abstraction has 13219 states and 39027 transitions. [2019-12-07 14:00:46,124 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:00:46,124 INFO L276 IsEmpty]: Start isEmpty. Operand 13219 states and 39027 transitions. [2019-12-07 14:00:46,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 14:00:46,133 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:46,133 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:46,133 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:46,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:46,133 INFO L82 PathProgramCache]: Analyzing trace with hash 1567643153, now seen corresponding path program 2 times [2019-12-07 14:00:46,133 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:46,134 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [354545547] [2019-12-07 14:00:46,134 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:46,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:46,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:46,189 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [354545547] [2019-12-07 14:00:46,189 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:46,190 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:00:46,190 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [43055901] [2019-12-07 14:00:46,190 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 14:00:46,190 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:46,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 14:00:46,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 14:00:46,190 INFO L87 Difference]: Start difference. First operand 13219 states and 39027 transitions. Second operand 8 states. [2019-12-07 14:00:47,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:47,559 INFO L93 Difference]: Finished difference Result 31050 states and 88811 transitions. [2019-12-07 14:00:47,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 14:00:47,560 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 14:00:47,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:47,611 INFO L225 Difference]: With dead ends: 31050 [2019-12-07 14:00:47,611 INFO L226 Difference]: Without dead ends: 31050 [2019-12-07 14:00:47,611 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 154 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 14:00:47,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31050 states. [2019-12-07 14:00:47,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31050 to 13148. [2019-12-07 14:00:47,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13148 states. [2019-12-07 14:00:47,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13148 states to 13148 states and 38816 transitions. [2019-12-07 14:00:47,906 INFO L78 Accepts]: Start accepts. Automaton has 13148 states and 38816 transitions. Word has length 33 [2019-12-07 14:00:47,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:47,906 INFO L462 AbstractCegarLoop]: Abstraction has 13148 states and 38816 transitions. [2019-12-07 14:00:47,906 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 14:00:47,906 INFO L276 IsEmpty]: Start isEmpty. Operand 13148 states and 38816 transitions. [2019-12-07 14:00:47,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 14:00:47,915 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:47,915 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:47,915 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:47,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:47,915 INFO L82 PathProgramCache]: Analyzing trace with hash -607763582, now seen corresponding path program 1 times [2019-12-07 14:00:47,915 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:47,915 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [973703576] [2019-12-07 14:00:47,916 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:47,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:47,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:47,981 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [973703576] [2019-12-07 14:00:47,981 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:47,981 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:00:47,981 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1560978458] [2019-12-07 14:00:47,981 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:00:47,981 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:47,982 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:00:47,982 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:00:47,982 INFO L87 Difference]: Start difference. First operand 13148 states and 38816 transitions. Second operand 7 states. [2019-12-07 14:00:48,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:48,670 INFO L93 Difference]: Finished difference Result 23830 states and 68685 transitions. [2019-12-07 14:00:48,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 14:00:48,670 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 14:00:48,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:48,692 INFO L225 Difference]: With dead ends: 23830 [2019-12-07 14:00:48,693 INFO L226 Difference]: Without dead ends: 23830 [2019-12-07 14:00:48,693 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:00:48,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23830 states. [2019-12-07 14:00:48,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23830 to 12984. [2019-12-07 14:00:48,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12984 states. [2019-12-07 14:00:48,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12984 states to 12984 states and 38320 transitions. [2019-12-07 14:00:48,949 INFO L78 Accepts]: Start accepts. Automaton has 12984 states and 38320 transitions. Word has length 34 [2019-12-07 14:00:48,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:48,949 INFO L462 AbstractCegarLoop]: Abstraction has 12984 states and 38320 transitions. [2019-12-07 14:00:48,949 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:00:48,949 INFO L276 IsEmpty]: Start isEmpty. Operand 12984 states and 38320 transitions. [2019-12-07 14:00:48,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 14:00:48,958 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:48,958 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:48,958 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:48,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:48,958 INFO L82 PathProgramCache]: Analyzing trace with hash 846412022, now seen corresponding path program 2 times [2019-12-07 14:00:48,958 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:48,958 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742274728] [2019-12-07 14:00:48,958 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:48,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:49,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:49,021 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [742274728] [2019-12-07 14:00:49,021 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:49,021 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:00:49,021 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2022526449] [2019-12-07 14:00:49,021 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:00:49,022 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:49,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:00:49,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:00:49,022 INFO L87 Difference]: Start difference. First operand 12984 states and 38320 transitions. Second operand 7 states. [2019-12-07 14:00:49,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:49,750 INFO L93 Difference]: Finished difference Result 29012 states and 82077 transitions. [2019-12-07 14:00:49,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 14:00:49,750 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 14:00:49,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:49,780 INFO L225 Difference]: With dead ends: 29012 [2019-12-07 14:00:49,780 INFO L226 Difference]: Without dead ends: 29012 [2019-12-07 14:00:49,780 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 14:00:49,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29012 states. [2019-12-07 14:00:50,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29012 to 12914. [2019-12-07 14:00:50,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12914 states. [2019-12-07 14:00:50,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12914 states to 12914 states and 38106 transitions. [2019-12-07 14:00:50,064 INFO L78 Accepts]: Start accepts. Automaton has 12914 states and 38106 transitions. Word has length 34 [2019-12-07 14:00:50,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:50,064 INFO L462 AbstractCegarLoop]: Abstraction has 12914 states and 38106 transitions. [2019-12-07 14:00:50,064 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:00:50,065 INFO L276 IsEmpty]: Start isEmpty. Operand 12914 states and 38106 transitions. [2019-12-07 14:00:50,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 14:00:50,072 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:50,072 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:50,072 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:50,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:50,072 INFO L82 PathProgramCache]: Analyzing trace with hash -211414604, now seen corresponding path program 3 times [2019-12-07 14:00:50,072 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:50,073 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1045152853] [2019-12-07 14:00:50,073 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:50,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:50,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:50,137 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1045152853] [2019-12-07 14:00:50,138 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:50,138 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:00:50,138 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1310408566] [2019-12-07 14:00:50,138 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 14:00:50,138 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:50,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 14:00:50,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 14:00:50,138 INFO L87 Difference]: Start difference. First operand 12914 states and 38106 transitions. Second operand 8 states. [2019-12-07 14:00:51,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:51,001 INFO L93 Difference]: Finished difference Result 26611 states and 75621 transitions. [2019-12-07 14:00:51,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 14:00:51,002 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 14:00:51,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:51,029 INFO L225 Difference]: With dead ends: 26611 [2019-12-07 14:00:51,029 INFO L226 Difference]: Without dead ends: 26611 [2019-12-07 14:00:51,030 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 150 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 14:00:51,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26611 states. [2019-12-07 14:00:51,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26611 to 12672. [2019-12-07 14:00:51,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12672 states. [2019-12-07 14:00:51,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12672 states to 12672 states and 37416 transitions. [2019-12-07 14:00:51,290 INFO L78 Accepts]: Start accepts. Automaton has 12672 states and 37416 transitions. Word has length 34 [2019-12-07 14:00:51,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:51,290 INFO L462 AbstractCegarLoop]: Abstraction has 12672 states and 37416 transitions. [2019-12-07 14:00:51,290 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 14:00:51,290 INFO L276 IsEmpty]: Start isEmpty. Operand 12672 states and 37416 transitions. [2019-12-07 14:00:51,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:00:51,300 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:51,300 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:51,300 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:51,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:51,300 INFO L82 PathProgramCache]: Analyzing trace with hash 1677421997, now seen corresponding path program 1 times [2019-12-07 14:00:51,300 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:51,300 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [513237155] [2019-12-07 14:00:51,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:51,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:51,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:51,324 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [513237155] [2019-12-07 14:00:51,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:51,324 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:00:51,324 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1220918568] [2019-12-07 14:00:51,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:00:51,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:51,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:00:51,325 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:51,325 INFO L87 Difference]: Start difference. First operand 12672 states and 37416 transitions. Second operand 3 states. [2019-12-07 14:00:51,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:51,360 INFO L93 Difference]: Finished difference Result 12672 states and 36780 transitions. [2019-12-07 14:00:51,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:00:51,361 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 14:00:51,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:51,373 INFO L225 Difference]: With dead ends: 12672 [2019-12-07 14:00:51,374 INFO L226 Difference]: Without dead ends: 12672 [2019-12-07 14:00:51,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:51,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12672 states. [2019-12-07 14:00:51,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12672 to 12410. [2019-12-07 14:00:51,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12410 states. [2019-12-07 14:00:51,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12410 states to 12410 states and 36059 transitions. [2019-12-07 14:00:51,542 INFO L78 Accepts]: Start accepts. Automaton has 12410 states and 36059 transitions. Word has length 41 [2019-12-07 14:00:51,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:51,542 INFO L462 AbstractCegarLoop]: Abstraction has 12410 states and 36059 transitions. [2019-12-07 14:00:51,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:00:51,542 INFO L276 IsEmpty]: Start isEmpty. Operand 12410 states and 36059 transitions. [2019-12-07 14:00:51,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 14:00:51,551 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:51,551 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:51,551 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:51,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:51,552 INFO L82 PathProgramCache]: Analyzing trace with hash -1399805170, now seen corresponding path program 1 times [2019-12-07 14:00:51,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:51,552 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [539150885] [2019-12-07 14:00:51,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:51,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:51,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:51,593 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [539150885] [2019-12-07 14:00:51,593 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:51,593 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:00:51,593 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2012319166] [2019-12-07 14:00:51,593 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:00:51,593 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:51,593 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:00:51,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:00:51,594 INFO L87 Difference]: Start difference. First operand 12410 states and 36059 transitions. Second operand 5 states. [2019-12-07 14:00:51,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:51,633 INFO L93 Difference]: Finished difference Result 11343 states and 33779 transitions. [2019-12-07 14:00:51,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:00:51,633 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 14:00:51,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:51,642 INFO L225 Difference]: With dead ends: 11343 [2019-12-07 14:00:51,643 INFO L226 Difference]: Without dead ends: 9787 [2019-12-07 14:00:51,643 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:00:51,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9787 states. [2019-12-07 14:00:51,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9787 to 9787. [2019-12-07 14:00:51,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9787 states. [2019-12-07 14:00:51,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9787 states to 9787 states and 30036 transitions. [2019-12-07 14:00:51,775 INFO L78 Accepts]: Start accepts. Automaton has 9787 states and 30036 transitions. Word has length 42 [2019-12-07 14:00:51,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:51,775 INFO L462 AbstractCegarLoop]: Abstraction has 9787 states and 30036 transitions. [2019-12-07 14:00:51,775 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:00:51,776 INFO L276 IsEmpty]: Start isEmpty. Operand 9787 states and 30036 transitions. [2019-12-07 14:00:51,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:00:51,783 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:51,783 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:51,783 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:51,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:51,783 INFO L82 PathProgramCache]: Analyzing trace with hash 622120387, now seen corresponding path program 1 times [2019-12-07 14:00:51,784 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:51,784 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941024012] [2019-12-07 14:00:51,784 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:51,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:51,816 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:51,816 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941024012] [2019-12-07 14:00:51,816 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:51,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:00:51,816 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [56777488] [2019-12-07 14:00:51,816 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:00:51,817 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:51,817 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:00:51,817 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:51,817 INFO L87 Difference]: Start difference. First operand 9787 states and 30036 transitions. Second operand 3 states. [2019-12-07 14:00:51,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:51,869 INFO L93 Difference]: Finished difference Result 11999 states and 36749 transitions. [2019-12-07 14:00:51,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:00:51,870 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 14:00:51,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:51,881 INFO L225 Difference]: With dead ends: 11999 [2019-12-07 14:00:51,881 INFO L226 Difference]: Without dead ends: 11999 [2019-12-07 14:00:51,881 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:51,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11999 states. [2019-12-07 14:00:52,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11999 to 9449. [2019-12-07 14:00:52,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9449 states. [2019-12-07 14:00:52,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9449 states to 9449 states and 29216 transitions. [2019-12-07 14:00:52,049 INFO L78 Accepts]: Start accepts. Automaton has 9449 states and 29216 transitions. Word has length 66 [2019-12-07 14:00:52,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:52,049 INFO L462 AbstractCegarLoop]: Abstraction has 9449 states and 29216 transitions. [2019-12-07 14:00:52,049 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:00:52,049 INFO L276 IsEmpty]: Start isEmpty. Operand 9449 states and 29216 transitions. [2019-12-07 14:00:52,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:00:52,056 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:52,056 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:52,056 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:52,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:52,056 INFO L82 PathProgramCache]: Analyzing trace with hash -586454608, now seen corresponding path program 1 times [2019-12-07 14:00:52,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:52,057 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2119165444] [2019-12-07 14:00:52,057 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:52,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:52,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:52,081 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2119165444] [2019-12-07 14:00:52,082 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:52,082 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:00:52,082 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1616545168] [2019-12-07 14:00:52,082 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:00:52,082 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:52,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:00:52,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:52,082 INFO L87 Difference]: Start difference. First operand 9449 states and 29216 transitions. Second operand 3 states. [2019-12-07 14:00:52,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:52,184 INFO L93 Difference]: Finished difference Result 13600 states and 42235 transitions. [2019-12-07 14:00:52,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:00:52,184 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 14:00:52,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:52,198 INFO L225 Difference]: With dead ends: 13600 [2019-12-07 14:00:52,198 INFO L226 Difference]: Without dead ends: 13600 [2019-12-07 14:00:52,198 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:00:52,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13600 states. [2019-12-07 14:00:52,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13600 to 9705. [2019-12-07 14:00:52,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9705 states. [2019-12-07 14:00:52,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9705 states to 9705 states and 30072 transitions. [2019-12-07 14:00:52,357 INFO L78 Accepts]: Start accepts. Automaton has 9705 states and 30072 transitions. Word has length 67 [2019-12-07 14:00:52,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:52,357 INFO L462 AbstractCegarLoop]: Abstraction has 9705 states and 30072 transitions. [2019-12-07 14:00:52,357 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:00:52,357 INFO L276 IsEmpty]: Start isEmpty. Operand 9705 states and 30072 transitions. [2019-12-07 14:00:52,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:00:52,365 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:52,365 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:52,365 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:52,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:52,365 INFO L82 PathProgramCache]: Analyzing trace with hash -1786041058, now seen corresponding path program 1 times [2019-12-07 14:00:52,365 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:52,365 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399662028] [2019-12-07 14:00:52,365 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:52,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:52,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:52,442 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1399662028] [2019-12-07 14:00:52,442 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:52,442 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:00:52,442 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1526351144] [2019-12-07 14:00:52,442 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:00:52,442 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:52,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:00:52,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:00:52,442 INFO L87 Difference]: Start difference. First operand 9705 states and 30072 transitions. Second operand 7 states. [2019-12-07 14:00:53,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:53,311 INFO L93 Difference]: Finished difference Result 24574 states and 73343 transitions. [2019-12-07 14:00:53,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 14:00:53,311 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 14:00:53,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:53,338 INFO L225 Difference]: With dead ends: 24574 [2019-12-07 14:00:53,338 INFO L226 Difference]: Without dead ends: 24574 [2019-12-07 14:00:53,339 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 13 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 14:00:53,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24574 states. [2019-12-07 14:00:53,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24574 to 13242. [2019-12-07 14:00:53,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13242 states. [2019-12-07 14:00:53,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13242 states to 13242 states and 40631 transitions. [2019-12-07 14:00:53,596 INFO L78 Accepts]: Start accepts. Automaton has 13242 states and 40631 transitions. Word has length 67 [2019-12-07 14:00:53,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:53,596 INFO L462 AbstractCegarLoop]: Abstraction has 13242 states and 40631 transitions. [2019-12-07 14:00:53,596 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:00:53,596 INFO L276 IsEmpty]: Start isEmpty. Operand 13242 states and 40631 transitions. [2019-12-07 14:00:53,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:00:53,608 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:53,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:53,609 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:53,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:53,609 INFO L82 PathProgramCache]: Analyzing trace with hash 1398756383, now seen corresponding path program 1 times [2019-12-07 14:00:53,609 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:53,609 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680715828] [2019-12-07 14:00:53,609 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:53,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:53,687 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:53,687 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680715828] [2019-12-07 14:00:53,687 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:53,687 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 14:00:53,688 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1461913163] [2019-12-07 14:00:53,688 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 14:00:53,688 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:53,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 14:00:53,688 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:00:53,688 INFO L87 Difference]: Start difference. First operand 13242 states and 40631 transitions. Second operand 9 states. [2019-12-07 14:00:54,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:54,388 INFO L93 Difference]: Finished difference Result 70905 states and 212477 transitions. [2019-12-07 14:00:54,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 14:00:54,389 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 14:00:54,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:54,466 INFO L225 Difference]: With dead ends: 70905 [2019-12-07 14:00:54,466 INFO L226 Difference]: Without dead ends: 66675 [2019-12-07 14:00:54,466 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=151, Invalid=499, Unknown=0, NotChecked=0, Total=650 [2019-12-07 14:00:54,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66675 states. [2019-12-07 14:00:54,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66675 to 14339. [2019-12-07 14:00:54,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14339 states. [2019-12-07 14:00:55,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14339 states to 14339 states and 44194 transitions. [2019-12-07 14:00:55,003 INFO L78 Accepts]: Start accepts. Automaton has 14339 states and 44194 transitions. Word has length 67 [2019-12-07 14:00:55,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:55,004 INFO L462 AbstractCegarLoop]: Abstraction has 14339 states and 44194 transitions. [2019-12-07 14:00:55,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 14:00:55,004 INFO L276 IsEmpty]: Start isEmpty. Operand 14339 states and 44194 transitions. [2019-12-07 14:00:55,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:00:55,017 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:55,017 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:55,017 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:55,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:55,018 INFO L82 PathProgramCache]: Analyzing trace with hash -95777668, now seen corresponding path program 2 times [2019-12-07 14:00:55,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:55,018 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1505468185] [2019-12-07 14:00:55,018 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:55,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:55,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:55,056 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1505468185] [2019-12-07 14:00:55,056 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:55,056 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:00:55,056 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2053642762] [2019-12-07 14:00:55,056 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:00:55,056 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:55,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:00:55,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:00:55,057 INFO L87 Difference]: Start difference. First operand 14339 states and 44194 transitions. Second operand 4 states. [2019-12-07 14:00:55,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:55,134 INFO L93 Difference]: Finished difference Result 14195 states and 43585 transitions. [2019-12-07 14:00:55,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:00:55,135 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 14:00:55,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:55,150 INFO L225 Difference]: With dead ends: 14195 [2019-12-07 14:00:55,150 INFO L226 Difference]: Without dead ends: 14195 [2019-12-07 14:00:55,150 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:00:55,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14195 states. [2019-12-07 14:00:55,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14195 to 12698. [2019-12-07 14:00:55,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12698 states. [2019-12-07 14:00:55,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12698 states to 12698 states and 38843 transitions. [2019-12-07 14:00:55,342 INFO L78 Accepts]: Start accepts. Automaton has 12698 states and 38843 transitions. Word has length 67 [2019-12-07 14:00:55,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:55,342 INFO L462 AbstractCegarLoop]: Abstraction has 12698 states and 38843 transitions. [2019-12-07 14:00:55,342 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:00:55,342 INFO L276 IsEmpty]: Start isEmpty. Operand 12698 states and 38843 transitions. [2019-12-07 14:00:55,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:00:55,353 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:55,353 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:55,353 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:55,353 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:55,353 INFO L82 PathProgramCache]: Analyzing trace with hash 579351643, now seen corresponding path program 2 times [2019-12-07 14:00:55,353 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:55,353 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1521523530] [2019-12-07 14:00:55,353 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:55,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:00:55,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:00:55,420 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1521523530] [2019-12-07 14:00:55,420 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:00:55,420 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 14:00:55,420 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1644623175] [2019-12-07 14:00:55,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 14:00:55,420 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:00:55,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 14:00:55,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:00:55,421 INFO L87 Difference]: Start difference. First operand 12698 states and 38843 transitions. Second operand 9 states. [2019-12-07 14:00:56,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:00:56,554 INFO L93 Difference]: Finished difference Result 70186 states and 206980 transitions. [2019-12-07 14:00:56,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 14:00:56,555 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 14:00:56,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:00:56,605 INFO L225 Difference]: With dead ends: 70186 [2019-12-07 14:00:56,605 INFO L226 Difference]: Without dead ends: 48969 [2019-12-07 14:00:56,606 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 340 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=291, Invalid=969, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 14:00:56,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48969 states. [2019-12-07 14:00:57,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48969 to 14149. [2019-12-07 14:00:57,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14149 states. [2019-12-07 14:00:57,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14149 states to 14149 states and 43203 transitions. [2019-12-07 14:00:57,029 INFO L78 Accepts]: Start accepts. Automaton has 14149 states and 43203 transitions. Word has length 67 [2019-12-07 14:00:57,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:00:57,029 INFO L462 AbstractCegarLoop]: Abstraction has 14149 states and 43203 transitions. [2019-12-07 14:00:57,029 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 14:00:57,029 INFO L276 IsEmpty]: Start isEmpty. Operand 14149 states and 43203 transitions. [2019-12-07 14:00:57,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:00:57,042 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:00:57,042 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:00:57,042 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:00:57,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:00:57,043 INFO L82 PathProgramCache]: Analyzing trace with hash 1790496915, now seen corresponding path program 3 times [2019-12-07 14:00:57,043 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:00:57,043 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [983443941] [2019-12-07 14:00:57,043 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:00:57,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:00:57,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:00:57,142 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:00:57,143 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:00:57,145 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_89| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= v_~y~0_33 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1013~0.base_51|) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1013~0.base_51| 4) |v_#length_25|) (= v_~main$tmp_guard1~0_50 0) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$mem_tmp~0_19 0) (= v_~a$r_buff1_thd3~0_279 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$r_buff0_thd3~0_364 0) (= v_~z~0_14 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1013~0.base_51| 1) |v_#valid_87|) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~weak$$choice0~0_15) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p1_EAX~0_57) (= 0 v_~a$w_buff1_used~0_506) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1013~0.base_51| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1013~0.base_51|) |v_ULTIMATE.start_main_~#t1013~0.offset_32| 0)) |v_#memory_int_21|) (= |v_ULTIMATE.start_main_~#t1013~0.offset_32| 0) (= v_~a$r_buff1_thd0~0_160 0) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= v_~a$flush_delayed~0_30 0) (= 0 v_~x~0_130) (= (select .cse0 |v_ULTIMATE.start_main_~#t1013~0.base_51|) 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~weak$$choice2~0_108 0) (= v_~a~0_163 0) (= v_~__unbuffered_p2_EBX~0_61 0) (= 0 v_~__unbuffered_p2_EAX~0_52) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_89|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t1014~0.base=|v_ULTIMATE.start_main_~#t1014~0.base_39|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_163, ULTIMATE.start_main_~#t1013~0.offset=|v_ULTIMATE.start_main_~#t1013~0.offset_32|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_57, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_52, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_61, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ULTIMATE.start_main_~#t1015~0.offset=|v_ULTIMATE.start_main_~#t1015~0.offset_20|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_130, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ULTIMATE.start_main_~#t1014~0.offset=|v_ULTIMATE.start_main_~#t1014~0.offset_19|, ULTIMATE.start_main_~#t1015~0.base=|v_ULTIMATE.start_main_~#t1015~0.base_28|, ~a$mem_tmp~0=v_~a$mem_tmp~0_19, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_33, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, #valid=|v_#valid_87|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_14, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8, ULTIMATE.start_main_~#t1013~0.base=|v_ULTIMATE.start_main_~#t1013~0.base_51|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1014~0.base, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_~#t1013~0.offset, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ULTIMATE.start_main_~#t1015~0.offset, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1014~0.offset, ULTIMATE.start_main_~#t1015~0.base, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t1013~0.base] because there is no mapped edge [2019-12-07 14:00:57,146 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~x~0_Out-1100143245 1) (= ~a$r_buff0_thd0~0_In-1100143245 ~a$r_buff1_thd0~0_Out-1100143245) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1100143245 0)) (= ~a$r_buff1_thd2~0_Out-1100143245 ~a$r_buff0_thd2~0_In-1100143245) (= ~a$r_buff0_thd1~0_Out-1100143245 1) (= ~a$r_buff0_thd1~0_In-1100143245 ~a$r_buff1_thd1~0_Out-1100143245) (= ~a$r_buff1_thd3~0_Out-1100143245 ~a$r_buff0_thd3~0_In-1100143245)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1100143245, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1100143245, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1100143245, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-1100143245, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-1100143245, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-1100143245, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-1100143245, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1100143245, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1100143245, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1100143245, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245, ~x~0=~x~0_Out-1100143245} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 14:00:57,146 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1014~0.base_9| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1014~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1014~0.base_9|) |v_ULTIMATE.start_main_~#t1014~0.offset_7| 1)) |v_#memory_int_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1014~0.base_9| 4)) (= |v_ULTIMATE.start_main_~#t1014~0.offset_7| 0) (not (= |v_ULTIMATE.start_main_~#t1014~0.base_9| 0)) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1014~0.base_9|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1014~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t1014~0.base=|v_ULTIMATE.start_main_~#t1014~0.base_9|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1014~0.offset=|v_ULTIMATE.start_main_~#t1014~0.offset_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t1014~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1014~0.offset] because there is no mapped edge [2019-12-07 14:00:57,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1015~0.base_9| 4) |v_#length_13|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1015~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1015~0.base_9|) |v_ULTIMATE.start_main_~#t1015~0.offset_8| 2))) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1015~0.base_9|) (not (= |v_ULTIMATE.start_main_~#t1015~0.base_9| 0)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1015~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1015~0.offset_8| 0) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1015~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1015~0.base=|v_ULTIMATE.start_main_~#t1015~0.base_9|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1015~0.offset=|v_ULTIMATE.start_main_~#t1015~0.offset_8|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1015~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1015~0.offset, #length] because there is no mapped edge [2019-12-07 14:00:57,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In1188977082 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In1188977082 256) 0)) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1188977082| |P1Thread1of1ForFork2_#t~ite10_Out1188977082|))) (or (and (not .cse0) (= ~a$w_buff1~0_In1188977082 |P1Thread1of1ForFork2_#t~ite9_Out1188977082|) (not .cse1) .cse2) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out1188977082| ~a~0_In1188977082) .cse2))) InVars {~a~0=~a~0_In1188977082, ~a$w_buff1~0=~a$w_buff1~0_In1188977082, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1188977082, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1188977082} OutVars{~a~0=~a~0_In1188977082, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1188977082|, ~a$w_buff1~0=~a$w_buff1~0_In1188977082, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1188977082, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1188977082|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1188977082} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 14:00:57,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1871253811 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1871253811 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1871253811| ~a$w_buff0_used~0_In1871253811) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1871253811| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1871253811, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1871253811} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1871253811, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1871253811, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1871253811|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 14:00:57,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1406836432 256))) (.cse1 (= (mod ~a$r_buff0_thd2~0_In1406836432 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1406836432 256))) (.cse2 (= (mod ~a$r_buff1_thd2~0_In1406836432 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1406836432|)) (and (= ~a$w_buff1_used~0_In1406836432 |P1Thread1of1ForFork2_#t~ite12_Out1406836432|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1406836432, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1406836432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1406836432, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1406836432} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1406836432, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1406836432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1406836432, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1406836432|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1406836432} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 14:00:57,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1268407862 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_In1268407862| |P2Thread1of1ForFork0_#t~ite20_Out1268407862|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out1268407862| ~a$w_buff0~0_In1268407862)) (and (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1268407862 256) 0))) (or (and (= (mod ~a$r_buff1_thd3~0_In1268407862 256) 0) .cse1) (and (= (mod ~a$w_buff1_used~0_In1268407862 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In1268407862 256) 0))) (= |P2Thread1of1ForFork0_#t~ite20_Out1268407862| |P2Thread1of1ForFork0_#t~ite21_Out1268407862|) (= |P2Thread1of1ForFork0_#t~ite20_Out1268407862| ~a$w_buff0~0_In1268407862) .cse0))) InVars {~a$w_buff0~0=~a$w_buff0~0_In1268407862, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1268407862, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1268407862, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1268407862, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1268407862, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1268407862|, ~weak$$choice2~0=~weak$$choice2~0_In1268407862} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1268407862|, ~a$w_buff0~0=~a$w_buff0~0_In1268407862, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1268407862, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1268407862, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1268407862, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1268407862|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1268407862, ~weak$$choice2~0=~weak$$choice2~0_In1268407862} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 14:00:57,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-321097437 256))) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-321097437 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-321097437| ~a$r_buff0_thd2~0_In-321097437)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-321097437| 0) (not .cse0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-321097437, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-321097437} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-321097437, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-321097437, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-321097437|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 14:00:57,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In1968944687 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1968944687 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In1968944687 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In1968944687 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1968944687| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1968944687| ~a$r_buff1_thd2~0_In1968944687) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1968944687, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1968944687, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1968944687, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1968944687} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1968944687, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1968944687, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1968944687, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1968944687, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1968944687|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 14:00:57,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:00:57,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2133123573 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In2133123573| |P2Thread1of1ForFork0_#t~ite23_Out2133123573|) (= ~a$w_buff1~0_In2133123573 |P2Thread1of1ForFork0_#t~ite24_Out2133123573|)) (and (= |P2Thread1of1ForFork0_#t~ite23_Out2133123573| |P2Thread1of1ForFork0_#t~ite24_Out2133123573|) .cse0 (= |P2Thread1of1ForFork0_#t~ite23_Out2133123573| ~a$w_buff1~0_In2133123573) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In2133123573 256)))) (or (= (mod ~a$w_buff0_used~0_In2133123573 256) 0) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In2133123573 256) 0)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In2133123573 256)))))))) InVars {~a$w_buff1~0=~a$w_buff1~0_In2133123573, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In2133123573|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2133123573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2133123573, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573, ~weak$$choice2~0=~weak$$choice2~0_In2133123573} OutVars{~a$w_buff1~0=~a$w_buff1~0_In2133123573, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out2133123573|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out2133123573|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2133123573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2133123573, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573, ~weak$$choice2~0=~weak$$choice2~0_In2133123573} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 14:00:57,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-183389922 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out-183389922| ~a$w_buff0_used~0_In-183389922) (= |P2Thread1of1ForFork0_#t~ite26_In-183389922| |P2Thread1of1ForFork0_#t~ite26_Out-183389922|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-183389922| |P2Thread1of1ForFork0_#t~ite26_Out-183389922|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-183389922 256) 0))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-183389922 256))) (and .cse1 (= (mod ~a$w_buff1_used~0_In-183389922 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In-183389922 256)))) .cse0 (= ~a$w_buff0_used~0_In-183389922 |P2Thread1of1ForFork0_#t~ite26_Out-183389922|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-183389922|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922, ~weak$$choice2~0=~weak$$choice2~0_In-183389922} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-183389922|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-183389922|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922, ~weak$$choice2~0=~weak$$choice2~0_In-183389922} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 14:00:57,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:00:57,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 14:00:57,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In639891994 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In639891994 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out639891994| ~a$w_buff1~0_In639891994) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out639891994| ~a~0_In639891994)))) InVars {~a~0=~a~0_In639891994, ~a$w_buff1~0=~a$w_buff1~0_In639891994, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In639891994, ~a$w_buff1_used~0=~a$w_buff1_used~0_In639891994} OutVars{~a~0=~a~0_In639891994, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out639891994|, ~a$w_buff1~0=~a$w_buff1~0_In639891994, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In639891994, ~a$w_buff1_used~0=~a$w_buff1_used~0_In639891994} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:00:57,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:00:57,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1897187168 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1897187168 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1897187168|)) (and (= ~a$w_buff0_used~0_In1897187168 |P2Thread1of1ForFork0_#t~ite40_Out1897187168|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1897187168, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1897187168} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1897187168|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1897187168, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1897187168} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 14:00:57,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-506376711 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In-506376711 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out-506376711| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In-506376711 |P0Thread1of1ForFork1_#t~ite5_Out-506376711|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-506376711, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-506376711} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-506376711|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-506376711, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-506376711} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 14:00:57,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1849536852 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd1~0_In-1849536852 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-1849536852 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1849536852 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite6_Out-1849536852| ~a$w_buff1_used~0_In-1849536852) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P0Thread1of1ForFork1_#t~ite6_Out-1849536852| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1849536852, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1849536852, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1849536852, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1849536852} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1849536852|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1849536852, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1849536852, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1849536852, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1849536852} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 14:00:57,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In-2086885833 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_In-2086885833 ~a$r_buff0_thd1~0_Out-2086885833)) (.cse1 (= (mod ~a$w_buff0_used~0_In-2086885833 256) 0))) (or (and (not .cse0) (not .cse1) (= ~a$r_buff0_thd1~0_Out-2086885833 0)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2086885833, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2086885833} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-2086885833|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2086885833, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-2086885833} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:00:57,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-500243088 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-500243088 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In-500243088 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-500243088 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-500243088|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~a$r_buff1_thd1~0_In-500243088 |P0Thread1of1ForFork1_#t~ite8_Out-500243088|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-500243088, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-500243088, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-500243088, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-500243088} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-500243088|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-500243088, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-500243088, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-500243088, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-500243088} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 14:00:57,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:00:57,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In47703202 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In47703202 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In47703202 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In47703202 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out47703202|)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out47703202| ~a$w_buff1_used~0_In47703202) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In47703202, ~a$w_buff0_used~0=~a$w_buff0_used~0_In47703202, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In47703202, ~a$w_buff1_used~0=~a$w_buff1_used~0_In47703202} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In47703202, ~a$w_buff0_used~0=~a$w_buff0_used~0_In47703202, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In47703202, ~a$w_buff1_used~0=~a$w_buff1_used~0_In47703202, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out47703202|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 14:00:57,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-490417550 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-490417550 256) 0))) (or (and (= ~a$r_buff0_thd3~0_In-490417550 |P2Thread1of1ForFork0_#t~ite42_Out-490417550|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-490417550|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-490417550, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-490417550} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-490417550, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-490417550, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-490417550|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 14:00:57,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-806249820 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-806249820 256))) (.cse1 (= (mod ~a$r_buff1_thd3~0_In-806249820 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-806249820 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-806249820| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite43_Out-806249820| ~a$r_buff1_thd3~0_In-806249820)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-806249820, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-806249820, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-806249820, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-806249820} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-806249820|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-806249820, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-806249820, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-806249820, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-806249820} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 14:00:57,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:00:57,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:00:57,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In1585376299 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out1585376299| |ULTIMATE.start_main_#t~ite47_Out1585376299|)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1585376299 256)))) (or (and (or .cse0 .cse1) .cse2 (= ~a~0_In1585376299 |ULTIMATE.start_main_#t~ite47_Out1585376299|)) (and (= ~a$w_buff1~0_In1585376299 |ULTIMATE.start_main_#t~ite47_Out1585376299|) (not .cse0) .cse2 (not .cse1)))) InVars {~a~0=~a~0_In1585376299, ~a$w_buff1~0=~a$w_buff1~0_In1585376299, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1585376299, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1585376299} OutVars{~a~0=~a~0_In1585376299, ~a$w_buff1~0=~a$w_buff1~0_In1585376299, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1585376299|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1585376299, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1585376299|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1585376299} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:00:57,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-77230483 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-77230483 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-77230483| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-77230483| ~a$w_buff0_used~0_In-77230483)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-77230483, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-77230483} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-77230483, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-77230483|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-77230483} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 14:00:57,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In16403676 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In16403676 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In16403676 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In16403676 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out16403676|)) (and (= ~a$w_buff1_used~0_In16403676 |ULTIMATE.start_main_#t~ite50_Out16403676|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In16403676, ~a$w_buff0_used~0=~a$w_buff0_used~0_In16403676, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In16403676, ~a$w_buff1_used~0=~a$w_buff1_used~0_In16403676} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out16403676|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In16403676, ~a$w_buff0_used~0=~a$w_buff0_used~0_In16403676, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In16403676, ~a$w_buff1_used~0=~a$w_buff1_used~0_In16403676} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 14:00:57,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In2074315130 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In2074315130 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In2074315130 |ULTIMATE.start_main_#t~ite51_Out2074315130|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out2074315130|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2074315130, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2074315130} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out2074315130|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2074315130, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2074315130} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 14:00:57,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In-1651944602 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1651944602 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-1651944602 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1651944602 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-1651944602| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite52_Out-1651944602| ~a$r_buff1_thd0~0_In-1651944602) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1651944602, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1651944602, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1651944602, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1651944602} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1651944602|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1651944602, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1651944602, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1651944602, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1651944602} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 14:00:57,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_24) (= v_~x~0_77 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:00:57,211 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:00:57 BasicIcfg [2019-12-07 14:00:57,211 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:00:57,211 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:00:57,211 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:00:57,211 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:00:57,212 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:58:24" (3/4) ... [2019-12-07 14:00:57,213 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:00:57,213 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_89| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= v_~y~0_33 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1013~0.base_51|) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1013~0.base_51| 4) |v_#length_25|) (= v_~main$tmp_guard1~0_50 0) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$mem_tmp~0_19 0) (= v_~a$r_buff1_thd3~0_279 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$r_buff0_thd3~0_364 0) (= v_~z~0_14 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1013~0.base_51| 1) |v_#valid_87|) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~weak$$choice0~0_15) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p1_EAX~0_57) (= 0 v_~a$w_buff1_used~0_506) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1013~0.base_51| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1013~0.base_51|) |v_ULTIMATE.start_main_~#t1013~0.offset_32| 0)) |v_#memory_int_21|) (= |v_ULTIMATE.start_main_~#t1013~0.offset_32| 0) (= v_~a$r_buff1_thd0~0_160 0) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= v_~a$flush_delayed~0_30 0) (= 0 v_~x~0_130) (= (select .cse0 |v_ULTIMATE.start_main_~#t1013~0.base_51|) 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~weak$$choice2~0_108 0) (= v_~a~0_163 0) (= v_~__unbuffered_p2_EBX~0_61 0) (= 0 v_~__unbuffered_p2_EAX~0_52) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_89|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t1014~0.base=|v_ULTIMATE.start_main_~#t1014~0.base_39|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_163, ULTIMATE.start_main_~#t1013~0.offset=|v_ULTIMATE.start_main_~#t1013~0.offset_32|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_57, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_52, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_61, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ULTIMATE.start_main_~#t1015~0.offset=|v_ULTIMATE.start_main_~#t1015~0.offset_20|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_130, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ULTIMATE.start_main_~#t1014~0.offset=|v_ULTIMATE.start_main_~#t1014~0.offset_19|, ULTIMATE.start_main_~#t1015~0.base=|v_ULTIMATE.start_main_~#t1015~0.base_28|, ~a$mem_tmp~0=v_~a$mem_tmp~0_19, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_33, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, #valid=|v_#valid_87|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_14, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8, ULTIMATE.start_main_~#t1013~0.base=|v_ULTIMATE.start_main_~#t1013~0.base_51|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1014~0.base, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_~#t1013~0.offset, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ULTIMATE.start_main_~#t1015~0.offset, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1014~0.offset, ULTIMATE.start_main_~#t1015~0.base, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t1013~0.base] because there is no mapped edge [2019-12-07 14:00:57,214 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~x~0_Out-1100143245 1) (= ~a$r_buff0_thd0~0_In-1100143245 ~a$r_buff1_thd0~0_Out-1100143245) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1100143245 0)) (= ~a$r_buff1_thd2~0_Out-1100143245 ~a$r_buff0_thd2~0_In-1100143245) (= ~a$r_buff0_thd1~0_Out-1100143245 1) (= ~a$r_buff0_thd1~0_In-1100143245 ~a$r_buff1_thd1~0_Out-1100143245) (= ~a$r_buff1_thd3~0_Out-1100143245 ~a$r_buff0_thd3~0_In-1100143245)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1100143245, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1100143245, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1100143245, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-1100143245, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-1100143245, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-1100143245, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-1100143245, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1100143245, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1100143245, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1100143245, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245, ~x~0=~x~0_Out-1100143245} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 14:00:57,214 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1014~0.base_9| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1014~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1014~0.base_9|) |v_ULTIMATE.start_main_~#t1014~0.offset_7| 1)) |v_#memory_int_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1014~0.base_9| 4)) (= |v_ULTIMATE.start_main_~#t1014~0.offset_7| 0) (not (= |v_ULTIMATE.start_main_~#t1014~0.base_9| 0)) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1014~0.base_9|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1014~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t1014~0.base=|v_ULTIMATE.start_main_~#t1014~0.base_9|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1014~0.offset=|v_ULTIMATE.start_main_~#t1014~0.offset_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t1014~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1014~0.offset] because there is no mapped edge [2019-12-07 14:00:57,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1015~0.base_9| 4) |v_#length_13|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1015~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1015~0.base_9|) |v_ULTIMATE.start_main_~#t1015~0.offset_8| 2))) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1015~0.base_9|) (not (= |v_ULTIMATE.start_main_~#t1015~0.base_9| 0)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1015~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1015~0.offset_8| 0) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1015~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1015~0.base=|v_ULTIMATE.start_main_~#t1015~0.base_9|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1015~0.offset=|v_ULTIMATE.start_main_~#t1015~0.offset_8|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1015~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1015~0.offset, #length] because there is no mapped edge [2019-12-07 14:00:57,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In1188977082 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In1188977082 256) 0)) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1188977082| |P1Thread1of1ForFork2_#t~ite10_Out1188977082|))) (or (and (not .cse0) (= ~a$w_buff1~0_In1188977082 |P1Thread1of1ForFork2_#t~ite9_Out1188977082|) (not .cse1) .cse2) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out1188977082| ~a~0_In1188977082) .cse2))) InVars {~a~0=~a~0_In1188977082, ~a$w_buff1~0=~a$w_buff1~0_In1188977082, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1188977082, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1188977082} OutVars{~a~0=~a~0_In1188977082, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1188977082|, ~a$w_buff1~0=~a$w_buff1~0_In1188977082, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1188977082, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1188977082|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1188977082} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 14:00:57,217 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1871253811 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1871253811 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1871253811| ~a$w_buff0_used~0_In1871253811) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1871253811| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1871253811, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1871253811} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1871253811, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1871253811, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1871253811|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 14:00:57,217 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1406836432 256))) (.cse1 (= (mod ~a$r_buff0_thd2~0_In1406836432 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1406836432 256))) (.cse2 (= (mod ~a$r_buff1_thd2~0_In1406836432 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1406836432|)) (and (= ~a$w_buff1_used~0_In1406836432 |P1Thread1of1ForFork2_#t~ite12_Out1406836432|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1406836432, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1406836432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1406836432, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1406836432} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1406836432, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1406836432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1406836432, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1406836432|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1406836432} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 14:00:57,217 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1268407862 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_In1268407862| |P2Thread1of1ForFork0_#t~ite20_Out1268407862|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out1268407862| ~a$w_buff0~0_In1268407862)) (and (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1268407862 256) 0))) (or (and (= (mod ~a$r_buff1_thd3~0_In1268407862 256) 0) .cse1) (and (= (mod ~a$w_buff1_used~0_In1268407862 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In1268407862 256) 0))) (= |P2Thread1of1ForFork0_#t~ite20_Out1268407862| |P2Thread1of1ForFork0_#t~ite21_Out1268407862|) (= |P2Thread1of1ForFork0_#t~ite20_Out1268407862| ~a$w_buff0~0_In1268407862) .cse0))) InVars {~a$w_buff0~0=~a$w_buff0~0_In1268407862, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1268407862, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1268407862, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1268407862, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1268407862, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1268407862|, ~weak$$choice2~0=~weak$$choice2~0_In1268407862} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1268407862|, ~a$w_buff0~0=~a$w_buff0~0_In1268407862, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1268407862, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1268407862, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1268407862, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1268407862|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1268407862, ~weak$$choice2~0=~weak$$choice2~0_In1268407862} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 14:00:57,218 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-321097437 256))) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-321097437 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-321097437| ~a$r_buff0_thd2~0_In-321097437)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-321097437| 0) (not .cse0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-321097437, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-321097437} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-321097437, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-321097437, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-321097437|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 14:00:57,218 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In1968944687 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1968944687 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In1968944687 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In1968944687 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1968944687| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1968944687| ~a$r_buff1_thd2~0_In1968944687) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1968944687, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1968944687, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1968944687, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1968944687} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1968944687, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1968944687, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1968944687, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1968944687, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1968944687|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 14:00:57,218 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:00:57,219 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2133123573 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In2133123573| |P2Thread1of1ForFork0_#t~ite23_Out2133123573|) (= ~a$w_buff1~0_In2133123573 |P2Thread1of1ForFork0_#t~ite24_Out2133123573|)) (and (= |P2Thread1of1ForFork0_#t~ite23_Out2133123573| |P2Thread1of1ForFork0_#t~ite24_Out2133123573|) .cse0 (= |P2Thread1of1ForFork0_#t~ite23_Out2133123573| ~a$w_buff1~0_In2133123573) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In2133123573 256)))) (or (= (mod ~a$w_buff0_used~0_In2133123573 256) 0) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In2133123573 256) 0)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In2133123573 256)))))))) InVars {~a$w_buff1~0=~a$w_buff1~0_In2133123573, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In2133123573|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2133123573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2133123573, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573, ~weak$$choice2~0=~weak$$choice2~0_In2133123573} OutVars{~a$w_buff1~0=~a$w_buff1~0_In2133123573, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out2133123573|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out2133123573|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2133123573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2133123573, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573, ~weak$$choice2~0=~weak$$choice2~0_In2133123573} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 14:00:57,219 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-183389922 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out-183389922| ~a$w_buff0_used~0_In-183389922) (= |P2Thread1of1ForFork0_#t~ite26_In-183389922| |P2Thread1of1ForFork0_#t~ite26_Out-183389922|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-183389922| |P2Thread1of1ForFork0_#t~ite26_Out-183389922|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-183389922 256) 0))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-183389922 256))) (and .cse1 (= (mod ~a$w_buff1_used~0_In-183389922 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In-183389922 256)))) .cse0 (= ~a$w_buff0_used~0_In-183389922 |P2Thread1of1ForFork0_#t~ite26_Out-183389922|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-183389922|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922, ~weak$$choice2~0=~weak$$choice2~0_In-183389922} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-183389922|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-183389922|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922, ~weak$$choice2~0=~weak$$choice2~0_In-183389922} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 14:00:57,220 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:00:57,221 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 14:00:57,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In639891994 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In639891994 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out639891994| ~a$w_buff1~0_In639891994) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out639891994| ~a~0_In639891994)))) InVars {~a~0=~a~0_In639891994, ~a$w_buff1~0=~a$w_buff1~0_In639891994, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In639891994, ~a$w_buff1_used~0=~a$w_buff1_used~0_In639891994} OutVars{~a~0=~a~0_In639891994, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out639891994|, ~a$w_buff1~0=~a$w_buff1~0_In639891994, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In639891994, ~a$w_buff1_used~0=~a$w_buff1_used~0_In639891994} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:00:57,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:00:57,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1897187168 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1897187168 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1897187168|)) (and (= ~a$w_buff0_used~0_In1897187168 |P2Thread1of1ForFork0_#t~ite40_Out1897187168|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1897187168, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1897187168} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1897187168|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1897187168, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1897187168} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 14:00:57,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-506376711 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In-506376711 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out-506376711| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In-506376711 |P0Thread1of1ForFork1_#t~ite5_Out-506376711|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-506376711, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-506376711} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-506376711|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-506376711, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-506376711} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 14:00:57,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1849536852 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd1~0_In-1849536852 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-1849536852 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1849536852 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite6_Out-1849536852| ~a$w_buff1_used~0_In-1849536852) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P0Thread1of1ForFork1_#t~ite6_Out-1849536852| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1849536852, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1849536852, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1849536852, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1849536852} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1849536852|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1849536852, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1849536852, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1849536852, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1849536852} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 14:00:57,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In-2086885833 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_In-2086885833 ~a$r_buff0_thd1~0_Out-2086885833)) (.cse1 (= (mod ~a$w_buff0_used~0_In-2086885833 256) 0))) (or (and (not .cse0) (not .cse1) (= ~a$r_buff0_thd1~0_Out-2086885833 0)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2086885833, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2086885833} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-2086885833|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2086885833, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-2086885833} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:00:57,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-500243088 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-500243088 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In-500243088 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-500243088 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-500243088|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~a$r_buff1_thd1~0_In-500243088 |P0Thread1of1ForFork1_#t~ite8_Out-500243088|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-500243088, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-500243088, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-500243088, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-500243088} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-500243088|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-500243088, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-500243088, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-500243088, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-500243088} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 14:00:57,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:00:57,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In47703202 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In47703202 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In47703202 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In47703202 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out47703202|)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out47703202| ~a$w_buff1_used~0_In47703202) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In47703202, ~a$w_buff0_used~0=~a$w_buff0_used~0_In47703202, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In47703202, ~a$w_buff1_used~0=~a$w_buff1_used~0_In47703202} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In47703202, ~a$w_buff0_used~0=~a$w_buff0_used~0_In47703202, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In47703202, ~a$w_buff1_used~0=~a$w_buff1_used~0_In47703202, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out47703202|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 14:00:57,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-490417550 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-490417550 256) 0))) (or (and (= ~a$r_buff0_thd3~0_In-490417550 |P2Thread1of1ForFork0_#t~ite42_Out-490417550|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-490417550|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-490417550, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-490417550} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-490417550, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-490417550, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-490417550|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 14:00:57,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-806249820 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-806249820 256))) (.cse1 (= (mod ~a$r_buff1_thd3~0_In-806249820 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-806249820 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-806249820| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite43_Out-806249820| ~a$r_buff1_thd3~0_In-806249820)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-806249820, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-806249820, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-806249820, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-806249820} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-806249820|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-806249820, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-806249820, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-806249820, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-806249820} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 14:00:57,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:00:57,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:00:57,225 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In1585376299 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out1585376299| |ULTIMATE.start_main_#t~ite47_Out1585376299|)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1585376299 256)))) (or (and (or .cse0 .cse1) .cse2 (= ~a~0_In1585376299 |ULTIMATE.start_main_#t~ite47_Out1585376299|)) (and (= ~a$w_buff1~0_In1585376299 |ULTIMATE.start_main_#t~ite47_Out1585376299|) (not .cse0) .cse2 (not .cse1)))) InVars {~a~0=~a~0_In1585376299, ~a$w_buff1~0=~a$w_buff1~0_In1585376299, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1585376299, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1585376299} OutVars{~a~0=~a~0_In1585376299, ~a$w_buff1~0=~a$w_buff1~0_In1585376299, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1585376299|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1585376299, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1585376299|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1585376299} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:00:57,225 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-77230483 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-77230483 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-77230483| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-77230483| ~a$w_buff0_used~0_In-77230483)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-77230483, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-77230483} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-77230483, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-77230483|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-77230483} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 14:00:57,225 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In16403676 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In16403676 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In16403676 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In16403676 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out16403676|)) (and (= ~a$w_buff1_used~0_In16403676 |ULTIMATE.start_main_#t~ite50_Out16403676|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In16403676, ~a$w_buff0_used~0=~a$w_buff0_used~0_In16403676, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In16403676, ~a$w_buff1_used~0=~a$w_buff1_used~0_In16403676} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out16403676|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In16403676, ~a$w_buff0_used~0=~a$w_buff0_used~0_In16403676, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In16403676, ~a$w_buff1_used~0=~a$w_buff1_used~0_In16403676} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 14:00:57,226 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In2074315130 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In2074315130 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In2074315130 |ULTIMATE.start_main_#t~ite51_Out2074315130|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out2074315130|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2074315130, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2074315130} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out2074315130|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2074315130, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2074315130} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 14:00:57,226 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In-1651944602 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1651944602 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-1651944602 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1651944602 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-1651944602| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite52_Out-1651944602| ~a$r_buff1_thd0~0_In-1651944602) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1651944602, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1651944602, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1651944602, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1651944602} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1651944602|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1651944602, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1651944602, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1651944602, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1651944602} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 14:00:57,226 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_24) (= v_~x~0_77 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:00:57,280 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_5906780b-9ab6-44cf-bbda-77fc30e695d9/bin/uautomizer/witness.graphml [2019-12-07 14:00:57,280 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:00:57,281 INFO L168 Benchmark]: Toolchain (without parser) took 153553.55 ms. Allocated memory was 1.0 GB in the beginning and 8.2 GB in the end (delta: 7.2 GB). Free memory was 934.0 MB in the beginning and 5.5 GB in the end (delta: -4.5 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2019-12-07 14:00:57,281 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:00:57,282 INFO L168 Benchmark]: CACSL2BoogieTranslator took 428.97 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.8 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -126.2 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:00:57,282 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:00:57,282 INFO L168 Benchmark]: Boogie Preprocessor took 25.36 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:00:57,282 INFO L168 Benchmark]: RCFGBuilder took 402.40 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 999.4 MB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. [2019-12-07 14:00:57,283 INFO L168 Benchmark]: TraceAbstraction took 152587.09 ms. Allocated memory was 1.1 GB in the beginning and 8.2 GB in the end (delta: 7.1 GB). Free memory was 994.0 MB in the beginning and 5.5 GB in the end (delta: -4.5 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2019-12-07 14:00:57,283 INFO L168 Benchmark]: Witness Printer took 69.24 ms. Allocated memory is still 8.2 GB. Free memory was 5.5 GB in the beginning and 5.5 GB in the end (delta: 41.9 MB). Peak memory consumption was 41.9 MB. Max. memory is 11.5 GB. [2019-12-07 14:00:57,284 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 428.97 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.8 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -126.2 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.36 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 402.40 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 999.4 MB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 152587.09 ms. Allocated memory was 1.1 GB in the beginning and 8.2 GB in the end (delta: 7.1 GB). Free memory was 994.0 MB in the beginning and 5.5 GB in the end (delta: -4.5 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. * Witness Printer took 69.24 ms. Allocated memory is still 8.2 GB. Free memory was 5.5 GB in the beginning and 5.5 GB in the end (delta: 41.9 MB). Peak memory consumption was 41.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 100 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 33 ChoiceCompositions, 7286 VarBasedMoverChecksPositive, 247 VarBasedMoverChecksNegative, 37 SemBasedMoverChecksPositive, 286 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 87212 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L830] FCALL, FORK 0 pthread_create(&t1013, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L733] 1 a$w_buff1 = a$w_buff0 [L734] 1 a$w_buff0 = 1 [L735] 1 a$w_buff1_used = a$w_buff0_used [L736] 1 a$w_buff0_used = (_Bool)1 [L832] FCALL, FORK 0 pthread_create(&t1014, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L762] 2 x = 2 [L765] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L768] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L768] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L834] FCALL, FORK 0 pthread_create(&t1015, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L782] 3 y = 1 [L785] 3 z = 1 [L788] 3 __unbuffered_p2_EAX = z [L791] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L792] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L793] 3 a$flush_delayed = weak$$choice2 [L794] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L795] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L795] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L769] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L796] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L770] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L771] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L748] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L797] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L798] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L799] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L799] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L801] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L802] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L748] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L807] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L749] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L750] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L808] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L809] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L810] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L840] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L840] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L841] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L842] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L843] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 152.4s, OverallIterations: 31, TraceHistogramMax: 1, AutomataDifference: 34.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5887 SDtfs, 8377 SDslu, 13639 SDs, 0 SdLazy, 8616 SolverSat, 501 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 300 GetRequests, 50 SyntacticMatches, 18 SemanticMatches, 232 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1031 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=277479occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 101.3s AutomataMinimizationTime, 30 MinimizatonAttempts, 499262 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 1059 NumberOfCodeBlocks, 1059 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 962 ConstructedInterpolants, 0 QuantifiedInterpolants, 138929 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...