./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix041_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix041_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ef37f6e42a6b5b21facb2aecbfff2cdd2e29a7ec ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:30:47,796 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:30:47,797 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:30:47,805 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:30:47,805 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:30:47,806 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:30:47,806 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:30:47,808 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:30:47,809 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:30:47,810 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:30:47,810 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:30:47,811 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:30:47,811 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:30:47,812 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:30:47,813 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:30:47,813 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:30:47,814 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:30:47,815 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:30:47,816 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:30:47,817 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:30:47,819 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:30:47,819 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:30:47,820 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:30:47,821 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:30:47,822 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:30:47,823 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:30:47,823 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:30:47,823 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:30:47,823 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:30:47,824 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:30:47,824 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:30:47,825 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:30:47,825 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:30:47,826 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:30:47,827 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:30:47,827 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:30:47,827 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:30:47,827 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:30:47,828 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:30:47,828 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:30:47,829 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:30:47,829 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:30:47,842 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:30:47,842 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:30:47,843 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:30:47,844 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:30:47,844 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:30:47,844 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:30:47,844 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:30:47,844 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:30:47,845 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:30:47,845 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:30:47,845 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:30:47,845 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:30:47,845 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:30:47,845 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:30:47,846 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:30:47,846 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:30:47,846 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:30:47,846 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:30:47,846 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:30:47,847 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:30:47,847 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:30:47,847 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:30:47,847 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:30:47,847 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:30:47,848 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:30:47,848 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:30:47,848 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:30:47,848 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:30:47,848 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:30:47,848 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ef37f6e42a6b5b21facb2aecbfff2cdd2e29a7ec [2019-12-07 17:30:47,950 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:30:47,959 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:30:47,962 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:30:47,963 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:30:47,964 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:30:47,964 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix041_rmo.opt.i [2019-12-07 17:30:48,010 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/data/9080fdfd6/5450181d618747c8a642029667818d89/FLAGbbcec56c2 [2019-12-07 17:30:48,414 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:30:48,414 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/sv-benchmarks/c/pthread-wmm/mix041_rmo.opt.i [2019-12-07 17:30:48,424 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/data/9080fdfd6/5450181d618747c8a642029667818d89/FLAGbbcec56c2 [2019-12-07 17:30:48,783 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/data/9080fdfd6/5450181d618747c8a642029667818d89 [2019-12-07 17:30:48,785 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:30:48,786 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:30:48,787 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:30:48,787 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:30:48,789 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:30:48,790 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:30:48" (1/1) ... [2019-12-07 17:30:48,791 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@296938c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:48, skipping insertion in model container [2019-12-07 17:30:48,792 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:30:48" (1/1) ... [2019-12-07 17:30:48,796 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:30:48,825 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:30:49,091 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:30:49,100 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:30:49,148 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:30:49,196 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:30:49,197 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49 WrapperNode [2019-12-07 17:30:49,197 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:30:49,197 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:30:49,197 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:30:49,197 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:30:49,203 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49" (1/1) ... [2019-12-07 17:30:49,215 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49" (1/1) ... [2019-12-07 17:30:49,236 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:30:49,236 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:30:49,236 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:30:49,237 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:30:49,243 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49" (1/1) ... [2019-12-07 17:30:49,243 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49" (1/1) ... [2019-12-07 17:30:49,246 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49" (1/1) ... [2019-12-07 17:30:49,246 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49" (1/1) ... [2019-12-07 17:30:49,253 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49" (1/1) ... [2019-12-07 17:30:49,255 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49" (1/1) ... [2019-12-07 17:30:49,258 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49" (1/1) ... [2019-12-07 17:30:49,261 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:30:49,261 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:30:49,261 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:30:49,261 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:30:49,262 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:30:49,300 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:30:49,300 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:30:49,301 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:30:49,301 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:30:49,301 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:30:49,301 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:30:49,301 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:30:49,301 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:30:49,301 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:30:49,301 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:30:49,301 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:30:49,302 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:30:49,645 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:30:49,645 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:30:49,646 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:30:49 BoogieIcfgContainer [2019-12-07 17:30:49,646 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:30:49,647 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:30:49,647 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:30:49,649 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:30:49,649 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:30:48" (1/3) ... [2019-12-07 17:30:49,649 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@27bd5a37 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:30:49, skipping insertion in model container [2019-12-07 17:30:49,650 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:49" (2/3) ... [2019-12-07 17:30:49,650 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@27bd5a37 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:30:49, skipping insertion in model container [2019-12-07 17:30:49,650 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:30:49" (3/3) ... [2019-12-07 17:30:49,651 INFO L109 eAbstractionObserver]: Analyzing ICFG mix041_rmo.opt.i [2019-12-07 17:30:49,657 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:30:49,657 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:30:49,663 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:30:49,663 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:30:49,687 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,687 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,687 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,687 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,687 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,691 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,691 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,691 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,692 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,692 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,692 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,697 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,697 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,697 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:49,707 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 17:30:49,720 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:30:49,720 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:30:49,720 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:30:49,720 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:30:49,720 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:30:49,720 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:30:49,720 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:30:49,720 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:30:49,731 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 148 places, 182 transitions [2019-12-07 17:30:49,732 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-12-07 17:30:49,782 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-12-07 17:30:49,782 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:30:49,794 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 463 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 17:30:49,805 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 148 places, 182 transitions [2019-12-07 17:30:49,827 INFO L134 PetriNetUnfolder]: 41/180 cut-off events. [2019-12-07 17:30:49,827 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:30:49,830 INFO L76 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 180 events. 41/180 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 463 event pairs. 6/143 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 17:30:49,838 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-12-07 17:30:49,839 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:30:52,321 WARN L192 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-12-07 17:30:52,411 INFO L206 etLargeBlockEncoding]: Checked pairs total: 45620 [2019-12-07 17:30:52,411 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-12-07 17:30:52,414 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 77 places, 88 transitions [2019-12-07 17:30:52,716 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8218 states. [2019-12-07 17:30:52,717 INFO L276 IsEmpty]: Start isEmpty. Operand 8218 states. [2019-12-07 17:30:52,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 17:30:52,722 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:52,723 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 17:30:52,723 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:52,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:52,727 INFO L82 PathProgramCache]: Analyzing trace with hash 699456563, now seen corresponding path program 1 times [2019-12-07 17:30:52,734 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:52,734 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2035997566] [2019-12-07 17:30:52,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:52,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:52,903 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:52,904 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2035997566] [2019-12-07 17:30:52,904 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:52,904 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:30:52,905 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [382669767] [2019-12-07 17:30:52,908 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:30:52,908 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:52,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:30:52,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:52,920 INFO L87 Difference]: Start difference. First operand 8218 states. Second operand 3 states. [2019-12-07 17:30:53,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:53,131 INFO L93 Difference]: Finished difference Result 8170 states and 26597 transitions. [2019-12-07 17:30:53,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:30:53,132 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 17:30:53,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:53,189 INFO L225 Difference]: With dead ends: 8170 [2019-12-07 17:30:53,190 INFO L226 Difference]: Without dead ends: 8001 [2019-12-07 17:30:53,190 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:53,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8001 states. [2019-12-07 17:30:53,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8001 to 8001. [2019-12-07 17:30:53,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8001 states. [2019-12-07 17:30:53,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8001 states to 8001 states and 26077 transitions. [2019-12-07 17:30:53,444 INFO L78 Accepts]: Start accepts. Automaton has 8001 states and 26077 transitions. Word has length 5 [2019-12-07 17:30:53,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:53,445 INFO L462 AbstractCegarLoop]: Abstraction has 8001 states and 26077 transitions. [2019-12-07 17:30:53,445 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:30:53,445 INFO L276 IsEmpty]: Start isEmpty. Operand 8001 states and 26077 transitions. [2019-12-07 17:30:53,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:30:53,446 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:53,446 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:53,447 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:53,447 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:53,447 INFO L82 PathProgramCache]: Analyzing trace with hash 336736415, now seen corresponding path program 1 times [2019-12-07 17:30:53,447 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:53,447 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538677555] [2019-12-07 17:30:53,447 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:53,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:53,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:53,518 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [538677555] [2019-12-07 17:30:53,518 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:53,518 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:30:53,518 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1685343358] [2019-12-07 17:30:53,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:30:53,520 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:53,520 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:30:53,520 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:30:53,520 INFO L87 Difference]: Start difference. First operand 8001 states and 26077 transitions. Second operand 4 states. [2019-12-07 17:30:53,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:53,774 INFO L93 Difference]: Finished difference Result 12769 states and 39815 transitions. [2019-12-07 17:30:53,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:30:53,775 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:30:53,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:53,835 INFO L225 Difference]: With dead ends: 12769 [2019-12-07 17:30:53,835 INFO L226 Difference]: Without dead ends: 12762 [2019-12-07 17:30:53,835 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:30:53,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12762 states. [2019-12-07 17:30:54,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12762 to 11253. [2019-12-07 17:30:54,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11253 states. [2019-12-07 17:30:54,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11253 states to 11253 states and 35607 transitions. [2019-12-07 17:30:54,152 INFO L78 Accepts]: Start accepts. Automaton has 11253 states and 35607 transitions. Word has length 11 [2019-12-07 17:30:54,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:54,153 INFO L462 AbstractCegarLoop]: Abstraction has 11253 states and 35607 transitions. [2019-12-07 17:30:54,153 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:30:54,153 INFO L276 IsEmpty]: Start isEmpty. Operand 11253 states and 35607 transitions. [2019-12-07 17:30:54,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:30:54,155 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:54,155 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:54,156 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:54,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:54,156 INFO L82 PathProgramCache]: Analyzing trace with hash 1460182026, now seen corresponding path program 1 times [2019-12-07 17:30:54,156 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:54,156 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1798025206] [2019-12-07 17:30:54,156 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:54,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:54,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:54,223 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1798025206] [2019-12-07 17:30:54,223 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:54,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:30:54,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041543565] [2019-12-07 17:30:54,224 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:30:54,224 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:54,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:30:54,224 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:30:54,224 INFO L87 Difference]: Start difference. First operand 11253 states and 35607 transitions. Second operand 4 states. [2019-12-07 17:30:54,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:54,365 INFO L93 Difference]: Finished difference Result 14137 states and 44209 transitions. [2019-12-07 17:30:54,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:30:54,365 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:30:54,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:54,392 INFO L225 Difference]: With dead ends: 14137 [2019-12-07 17:30:54,392 INFO L226 Difference]: Without dead ends: 14137 [2019-12-07 17:30:54,393 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:30:54,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14137 states. [2019-12-07 17:30:54,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14137 to 12459. [2019-12-07 17:30:54,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12459 states. [2019-12-07 17:30:54,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12459 states to 12459 states and 39325 transitions. [2019-12-07 17:30:54,633 INFO L78 Accepts]: Start accepts. Automaton has 12459 states and 39325 transitions. Word has length 11 [2019-12-07 17:30:54,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:54,633 INFO L462 AbstractCegarLoop]: Abstraction has 12459 states and 39325 transitions. [2019-12-07 17:30:54,634 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:30:54,634 INFO L276 IsEmpty]: Start isEmpty. Operand 12459 states and 39325 transitions. [2019-12-07 17:30:54,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 17:30:54,637 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:54,637 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:54,637 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:54,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:54,638 INFO L82 PathProgramCache]: Analyzing trace with hash 289140598, now seen corresponding path program 1 times [2019-12-07 17:30:54,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:54,638 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312042228] [2019-12-07 17:30:54,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:54,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:54,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:54,689 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312042228] [2019-12-07 17:30:54,689 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:54,689 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:30:54,689 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2052737384] [2019-12-07 17:30:54,690 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:30:54,690 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:54,690 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:30:54,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:30:54,690 INFO L87 Difference]: Start difference. First operand 12459 states and 39325 transitions. Second operand 4 states. [2019-12-07 17:30:54,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:54,717 INFO L93 Difference]: Finished difference Result 1887 states and 4356 transitions. [2019-12-07 17:30:54,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:30:54,717 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2019-12-07 17:30:54,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:54,722 INFO L225 Difference]: With dead ends: 1887 [2019-12-07 17:30:54,722 INFO L226 Difference]: Without dead ends: 1601 [2019-12-07 17:30:54,723 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:30:54,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1601 states. [2019-12-07 17:30:54,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1601 to 1601. [2019-12-07 17:30:54,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1601 states. [2019-12-07 17:30:54,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1601 states to 1601 states and 3565 transitions. [2019-12-07 17:30:54,746 INFO L78 Accepts]: Start accepts. Automaton has 1601 states and 3565 transitions. Word has length 17 [2019-12-07 17:30:54,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:54,746 INFO L462 AbstractCegarLoop]: Abstraction has 1601 states and 3565 transitions. [2019-12-07 17:30:54,746 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:30:54,747 INFO L276 IsEmpty]: Start isEmpty. Operand 1601 states and 3565 transitions. [2019-12-07 17:30:54,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 17:30:54,748 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:54,748 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:54,748 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:54,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:54,748 INFO L82 PathProgramCache]: Analyzing trace with hash 1717219497, now seen corresponding path program 1 times [2019-12-07 17:30:54,749 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:54,749 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716351092] [2019-12-07 17:30:54,749 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:54,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:54,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:54,820 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716351092] [2019-12-07 17:30:54,821 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:54,821 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:30:54,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681212550] [2019-12-07 17:30:54,821 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:30:54,821 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:54,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:30:54,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:30:54,821 INFO L87 Difference]: Start difference. First operand 1601 states and 3565 transitions. Second operand 5 states. [2019-12-07 17:30:54,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:54,851 INFO L93 Difference]: Finished difference Result 401 states and 747 transitions. [2019-12-07 17:30:54,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:30:54,852 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2019-12-07 17:30:54,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:54,852 INFO L225 Difference]: With dead ends: 401 [2019-12-07 17:30:54,852 INFO L226 Difference]: Without dead ends: 355 [2019-12-07 17:30:54,853 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:30:54,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2019-12-07 17:30:54,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 320. [2019-12-07 17:30:54,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 320 states. [2019-12-07 17:30:54,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 320 states and 592 transitions. [2019-12-07 17:30:54,856 INFO L78 Accepts]: Start accepts. Automaton has 320 states and 592 transitions. Word has length 23 [2019-12-07 17:30:54,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:54,856 INFO L462 AbstractCegarLoop]: Abstraction has 320 states and 592 transitions. [2019-12-07 17:30:54,857 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:30:54,857 INFO L276 IsEmpty]: Start isEmpty. Operand 320 states and 592 transitions. [2019-12-07 17:30:54,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 17:30:54,858 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:54,858 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:54,858 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:54,858 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:54,858 INFO L82 PathProgramCache]: Analyzing trace with hash -1915125863, now seen corresponding path program 1 times [2019-12-07 17:30:54,858 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:54,858 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748614705] [2019-12-07 17:30:54,858 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:54,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:54,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:54,903 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748614705] [2019-12-07 17:30:54,903 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:54,903 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:30:54,903 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1676372578] [2019-12-07 17:30:54,903 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:30:54,904 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:54,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:30:54,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:54,904 INFO L87 Difference]: Start difference. First operand 320 states and 592 transitions. Second operand 3 states. [2019-12-07 17:30:54,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:54,937 INFO L93 Difference]: Finished difference Result 331 states and 607 transitions. [2019-12-07 17:30:54,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:30:54,938 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 17:30:54,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:54,938 INFO L225 Difference]: With dead ends: 331 [2019-12-07 17:30:54,938 INFO L226 Difference]: Without dead ends: 331 [2019-12-07 17:30:54,939 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:54,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2019-12-07 17:30:54,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 327. [2019-12-07 17:30:54,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2019-12-07 17:30:54,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 603 transitions. [2019-12-07 17:30:54,942 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 603 transitions. Word has length 52 [2019-12-07 17:30:54,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:54,943 INFO L462 AbstractCegarLoop]: Abstraction has 327 states and 603 transitions. [2019-12-07 17:30:54,943 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:30:54,943 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 603 transitions. [2019-12-07 17:30:54,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 17:30:54,944 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:54,944 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:54,944 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:54,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:54,945 INFO L82 PathProgramCache]: Analyzing trace with hash 1804822393, now seen corresponding path program 1 times [2019-12-07 17:30:54,945 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:54,945 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1944559570] [2019-12-07 17:30:54,945 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:54,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:55,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:55,007 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1944559570] [2019-12-07 17:30:55,007 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:55,008 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:30:55,008 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1117258049] [2019-12-07 17:30:55,008 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:30:55,008 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:55,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:30:55,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:55,008 INFO L87 Difference]: Start difference. First operand 327 states and 603 transitions. Second operand 3 states. [2019-12-07 17:30:55,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:55,019 INFO L93 Difference]: Finished difference Result 327 states and 590 transitions. [2019-12-07 17:30:55,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:30:55,020 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 17:30:55,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:55,020 INFO L225 Difference]: With dead ends: 327 [2019-12-07 17:30:55,020 INFO L226 Difference]: Without dead ends: 327 [2019-12-07 17:30:55,021 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:55,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2019-12-07 17:30:55,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 327. [2019-12-07 17:30:55,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2019-12-07 17:30:55,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 590 transitions. [2019-12-07 17:30:55,024 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 590 transitions. Word has length 52 [2019-12-07 17:30:55,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:55,024 INFO L462 AbstractCegarLoop]: Abstraction has 327 states and 590 transitions. [2019-12-07 17:30:55,025 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:30:55,025 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 590 transitions. [2019-12-07 17:30:55,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 17:30:55,026 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:55,026 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:55,026 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:55,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:55,026 INFO L82 PathProgramCache]: Analyzing trace with hash 1986059885, now seen corresponding path program 1 times [2019-12-07 17:30:55,026 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:55,027 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209593317] [2019-12-07 17:30:55,027 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:55,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:55,095 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:55,095 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209593317] [2019-12-07 17:30:55,095 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:55,095 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:30:55,095 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2115576806] [2019-12-07 17:30:55,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:30:55,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:55,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:30:55,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:30:55,096 INFO L87 Difference]: Start difference. First operand 327 states and 590 transitions. Second operand 5 states. [2019-12-07 17:30:55,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:55,220 INFO L93 Difference]: Finished difference Result 458 states and 824 transitions. [2019-12-07 17:30:55,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:30:55,220 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-12-07 17:30:55,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:55,221 INFO L225 Difference]: With dead ends: 458 [2019-12-07 17:30:55,221 INFO L226 Difference]: Without dead ends: 458 [2019-12-07 17:30:55,221 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:30:55,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458 states. [2019-12-07 17:30:55,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458 to 362. [2019-12-07 17:30:55,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 362 states. [2019-12-07 17:30:55,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 657 transitions. [2019-12-07 17:30:55,226 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 657 transitions. Word has length 53 [2019-12-07 17:30:55,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:55,226 INFO L462 AbstractCegarLoop]: Abstraction has 362 states and 657 transitions. [2019-12-07 17:30:55,226 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:30:55,226 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 657 transitions. [2019-12-07 17:30:55,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 17:30:55,227 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:55,227 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:55,227 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:55,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:55,228 INFO L82 PathProgramCache]: Analyzing trace with hash -2130042739, now seen corresponding path program 2 times [2019-12-07 17:30:55,228 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:55,228 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350610345] [2019-12-07 17:30:55,228 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:55,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:55,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:55,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350610345] [2019-12-07 17:30:55,424 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:55,424 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:30:55,424 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [449195865] [2019-12-07 17:30:55,424 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:30:55,424 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:55,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:30:55,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:30:55,425 INFO L87 Difference]: Start difference. First operand 362 states and 657 transitions. Second operand 7 states. [2019-12-07 17:30:55,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:55,559 INFO L93 Difference]: Finished difference Result 501 states and 898 transitions. [2019-12-07 17:30:55,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:30:55,559 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2019-12-07 17:30:55,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:55,559 INFO L225 Difference]: With dead ends: 501 [2019-12-07 17:30:55,560 INFO L226 Difference]: Without dead ends: 501 [2019-12-07 17:30:55,560 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:30:55,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 501 states. [2019-12-07 17:30:55,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 501 to 376. [2019-12-07 17:30:55,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 376 states. [2019-12-07 17:30:55,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 376 states to 376 states and 683 transitions. [2019-12-07 17:30:55,563 INFO L78 Accepts]: Start accepts. Automaton has 376 states and 683 transitions. Word has length 53 [2019-12-07 17:30:55,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:55,564 INFO L462 AbstractCegarLoop]: Abstraction has 376 states and 683 transitions. [2019-12-07 17:30:55,564 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:30:55,564 INFO L276 IsEmpty]: Start isEmpty. Operand 376 states and 683 transitions. [2019-12-07 17:30:55,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 17:30:55,564 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:55,565 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:55,565 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:55,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:55,565 INFO L82 PathProgramCache]: Analyzing trace with hash -1191623101, now seen corresponding path program 3 times [2019-12-07 17:30:55,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:55,565 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1956190744] [2019-12-07 17:30:55,565 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:55,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:55,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:55,820 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1956190744] [2019-12-07 17:30:55,820 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:55,820 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 17:30:55,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1241007272] [2019-12-07 17:30:55,821 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:30:55,821 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:55,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:30:55,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:30:55,821 INFO L87 Difference]: Start difference. First operand 376 states and 683 transitions. Second operand 12 states. [2019-12-07 17:30:56,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:56,364 INFO L93 Difference]: Finished difference Result 568 states and 1000 transitions. [2019-12-07 17:30:56,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 17:30:56,364 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 53 [2019-12-07 17:30:56,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:56,365 INFO L225 Difference]: With dead ends: 568 [2019-12-07 17:30:56,365 INFO L226 Difference]: Without dead ends: 568 [2019-12-07 17:30:56,366 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=114, Invalid=348, Unknown=0, NotChecked=0, Total=462 [2019-12-07 17:30:56,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 568 states. [2019-12-07 17:30:56,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 568 to 362. [2019-12-07 17:30:56,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 362 states. [2019-12-07 17:30:56,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 647 transitions. [2019-12-07 17:30:56,369 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 647 transitions. Word has length 53 [2019-12-07 17:30:56,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:56,370 INFO L462 AbstractCegarLoop]: Abstraction has 362 states and 647 transitions. [2019-12-07 17:30:56,370 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:30:56,370 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 647 transitions. [2019-12-07 17:30:56,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 17:30:56,370 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:56,371 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:56,371 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:56,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:56,371 INFO L82 PathProgramCache]: Analyzing trace with hash -424695835, now seen corresponding path program 4 times [2019-12-07 17:30:56,371 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:56,371 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [995261362] [2019-12-07 17:30:56,371 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:56,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:56,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:56,419 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [995261362] [2019-12-07 17:30:56,420 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:56,420 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:30:56,420 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1763619182] [2019-12-07 17:30:56,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:30:56,420 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:56,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:30:56,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:56,420 INFO L87 Difference]: Start difference. First operand 362 states and 647 transitions. Second operand 3 states. [2019-12-07 17:30:56,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:56,447 INFO L93 Difference]: Finished difference Result 361 states and 645 transitions. [2019-12-07 17:30:56,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:30:56,447 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 17:30:56,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:56,448 INFO L225 Difference]: With dead ends: 361 [2019-12-07 17:30:56,448 INFO L226 Difference]: Without dead ends: 361 [2019-12-07 17:30:56,448 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:30:56,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 361 states. [2019-12-07 17:30:56,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 361 to 272. [2019-12-07 17:30:56,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 272 states. [2019-12-07 17:30:56,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 272 states to 272 states and 486 transitions. [2019-12-07 17:30:56,451 INFO L78 Accepts]: Start accepts. Automaton has 272 states and 486 transitions. Word has length 53 [2019-12-07 17:30:56,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:56,451 INFO L462 AbstractCegarLoop]: Abstraction has 272 states and 486 transitions. [2019-12-07 17:30:56,451 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:30:56,451 INFO L276 IsEmpty]: Start isEmpty. Operand 272 states and 486 transitions. [2019-12-07 17:30:56,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 17:30:56,452 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:56,452 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:56,452 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:56,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:56,452 INFO L82 PathProgramCache]: Analyzing trace with hash -752439480, now seen corresponding path program 1 times [2019-12-07 17:30:56,453 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:56,453 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446709339] [2019-12-07 17:30:56,453 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:56,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:30:56,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:30:56,616 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [446709339] [2019-12-07 17:30:56,616 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:30:56,616 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 17:30:56,616 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835872781] [2019-12-07 17:30:56,616 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:30:56,616 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:30:56,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:30:56,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:30:56,617 INFO L87 Difference]: Start difference. First operand 272 states and 486 transitions. Second operand 12 states. [2019-12-07 17:30:57,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:30:57,021 INFO L93 Difference]: Finished difference Result 620 states and 1056 transitions. [2019-12-07 17:30:57,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:30:57,022 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2019-12-07 17:30:57,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:30:57,022 INFO L225 Difference]: With dead ends: 620 [2019-12-07 17:30:57,022 INFO L226 Difference]: Without dead ends: 206 [2019-12-07 17:30:57,023 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=427, Unknown=0, NotChecked=0, Total=600 [2019-12-07 17:30:57,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2019-12-07 17:30:57,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 182. [2019-12-07 17:30:57,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2019-12-07 17:30:57,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 304 transitions. [2019-12-07 17:30:57,024 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 304 transitions. Word has length 54 [2019-12-07 17:30:57,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:30:57,025 INFO L462 AbstractCegarLoop]: Abstraction has 182 states and 304 transitions. [2019-12-07 17:30:57,025 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:30:57,025 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 304 transitions. [2019-12-07 17:30:57,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 17:30:57,025 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:30:57,025 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:30:57,025 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:30:57,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:30:57,025 INFO L82 PathProgramCache]: Analyzing trace with hash 516281010, now seen corresponding path program 2 times [2019-12-07 17:30:57,026 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:30:57,026 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268915348] [2019-12-07 17:30:57,026 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:30:57,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:30:57,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:30:57,106 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:30:57,107 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:30:57,109 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] ULTIMATE.startENTRY-->L789: Formula: (let ((.cse0 (store |v_#valid_46| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x$read_delayed_var~0.offset_6) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1099~0.base_20| 4)) (= 0 v_~x$r_buff1_thd2~0_157) (= (select .cse0 |v_ULTIMATE.start_main_~#t1099~0.base_20|) 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1099~0.base_20|) (= 0 v_~weak$$choice0~0_14) (= |v_#NULL.offset_6| 0) (= v_~x$mem_tmp~0_21 0) (= 0 v_~x$w_buff0~0_235) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~x$w_buff1~0_175) (= 0 v_~x$w_buff1_used~0_360) (= v_~weak$$choice2~0_113 0) (= 0 v_~x$read_delayed~0_5) (= 0 v_~x$r_buff0_thd2~0_211) (= v_~main$tmp_guard1~0_26 0) (= v_~x$r_buff0_thd0~0_331 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1099~0.base_20| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1099~0.base_20|) |v_ULTIMATE.start_main_~#t1099~0.offset_15| 0)) |v_#memory_int_17|) (= v_~x$r_buff1_thd0~0_268 0) (= v_~__unbuffered_p1_EAX~0_126 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~x$r_buff1_thd1~0_198 0) (= 0 v_~__unbuffered_cnt~0_64) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p1_EBX~0_126) (= |v_#valid_44| (store .cse0 |v_ULTIMATE.start_main_~#t1099~0.base_20| 1)) (= 0 v_~x$w_buff0_used~0_638) (= 0 |v_ULTIMATE.start_main_~#t1099~0.offset_15|) (= 0 v_~x~0_158) (= v_~x$flush_delayed~0_38 0) (= v_~z~0_80 0) (= v_~y~0_115 0) (= v_~x$r_buff0_thd1~0_118 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_235, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_45|, ~x$flush_delayed~0=v_~x$flush_delayed~0_38, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_30|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_198, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_34|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_~#t1100~0.base=|v_ULTIMATE.start_main_~#t1100~0.base_17|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_38|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_35|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_126, #length=|v_#length_17|, ULTIMATE.start_main_~#t1099~0.base=|v_ULTIMATE.start_main_~#t1099~0.base_20|, ULTIMATE.start_main_~#t1099~0.offset=|v_ULTIMATE.start_main_~#t1099~0.offset_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_331, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_35|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_28|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ~x$w_buff1~0=v_~x$w_buff1~0_175, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_24|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_360, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_157, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_29|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_30|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_27|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_28|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64, ~x~0=v_~x~0_158, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_118, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_26|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_45|, ~x$mem_tmp~0=v_~x$mem_tmp~0_21, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_26|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_46|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_36|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_26|, ULTIMATE.start_main_~#t1100~0.offset=|v_ULTIMATE.start_main_~#t1100~0.offset_14|, ~y~0=v_~y~0_115, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_126, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_34|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_24|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_34|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_31|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_268, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_211, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_35|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_638, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_16|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_17|, ~z~0=v_~z~0_80, ~weak$$choice2~0=v_~weak$$choice2~0_113, ~x$read_delayed~0=v_~x$read_delayed~0_5} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_~#t1100~0.base, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, #length, ULTIMATE.start_main_~#t1099~0.base, ULTIMATE.start_main_~#t1099~0.offset, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1100~0.offset, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 17:30:57,110 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L789-1-->L791: Formula: (and (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1100~0.base_11|)) (= (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1100~0.base_11| 1) |v_#valid_23|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1100~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1100~0.base_11|) |v_ULTIMATE.start_main_~#t1100~0.offset_10| 1)) |v_#memory_int_11|) (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t1100~0.base_11| 4)) (= 0 |v_ULTIMATE.start_main_~#t1100~0.offset_10|) (not (= |v_ULTIMATE.start_main_~#t1100~0.base_11| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1100~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_12|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, ULTIMATE.start_main_~#t1100~0.offset=|v_ULTIMATE.start_main_~#t1100~0.offset_10|, #length=|v_#length_11|, ULTIMATE.start_main_~#t1100~0.base=|v_ULTIMATE.start_main_~#t1100~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1100~0.offset, #length, ULTIMATE.start_main_~#t1100~0.base] because there is no mapped edge [2019-12-07 17:30:57,110 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [588] [588] P1ENTRY-->L4-3: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_5 |v_P1Thread1of1ForFork1_#in~arg.base_7|) (= 1 v_~x$w_buff0_used~0_78) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_78 256))) (not (= (mod v_~x$w_buff1_used~0_47 256) 0)))) 1 0)) (= |v_P1Thread1of1ForFork1_#in~arg.offset_7| v_P1Thread1of1ForFork1_~arg.offset_5) (= 2 v_~x$w_buff0~0_19) (= v_~x$w_buff0~0_20 v_~x$w_buff1~0_15) (= v_~x$w_buff1_used~0_47 v_~x$w_buff0_used~0_79) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 0)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_79} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7, ~x$w_buff0~0=v_~x$w_buff0~0_19, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_5, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_5, ~x$w_buff1~0=v_~x$w_buff1~0_15, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_47, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_78} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 17:30:57,111 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L732-2-->L732-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out602253436| |P0Thread1of1ForFork0_#t~ite3_Out602253436|)) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In602253436 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In602253436 256)))) (or (and (= ~x$w_buff1~0_In602253436 |P0Thread1of1ForFork0_#t~ite3_Out602253436|) (not .cse0) .cse1 (not .cse2)) (and .cse1 (or .cse0 .cse2) (= ~x~0_In602253436 |P0Thread1of1ForFork0_#t~ite3_Out602253436|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In602253436, ~x$w_buff1_used~0=~x$w_buff1_used~0_In602253436, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In602253436, ~x~0=~x~0_In602253436} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out602253436|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out602253436|, ~x$w_buff1~0=~x$w_buff1~0_In602253436, ~x$w_buff1_used~0=~x$w_buff1_used~0_In602253436, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In602253436, ~x~0=~x~0_In602253436} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 17:30:57,111 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L733-->L733-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1749043420 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1749043420 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1749043420| ~x$w_buff0_used~0_In1749043420) (or .cse0 .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1749043420| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1749043420, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1749043420} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1749043420|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1749043420, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1749043420} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:30:57,111 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L734-->L734-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In-1065303700 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1065303700 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-1065303700 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1065303700 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1065303700| ~x$w_buff1_used~0_In-1065303700) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1065303700|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1065303700, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1065303700, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1065303700, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1065303700} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1065303700|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1065303700, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1065303700, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1065303700, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1065303700} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:30:57,112 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L735-->L735-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-2016231628 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2016231628 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-2016231628|) (not .cse1)) (and (= ~x$r_buff0_thd1~0_In-2016231628 |P0Thread1of1ForFork0_#t~ite7_Out-2016231628|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2016231628, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2016231628} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2016231628, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-2016231628|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2016231628} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 17:30:57,112 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L736-->L736-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In64867829 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In64867829 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In64867829 256))) (.cse0 (= (mod ~x$r_buff1_thd1~0_In64867829 256) 0))) (or (and (= ~x$r_buff1_thd1~0_In64867829 |P0Thread1of1ForFork0_#t~ite8_Out64867829|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out64867829|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In64867829, ~x$w_buff1_used~0=~x$w_buff1_used~0_In64867829, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In64867829, ~x$w_buff0_used~0=~x$w_buff0_used~0_In64867829} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In64867829, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out64867829|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In64867829, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In64867829, ~x$w_buff0_used~0=~x$w_buff0_used~0_In64867829} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:30:57,112 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L736-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_144 |v_P0Thread1of1ForFork0_#t~ite8_34|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_33|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_144} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 17:30:57,112 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In1998737284 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1998737284 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out1998737284| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out1998737284| ~x$w_buff0_used~0_In1998737284)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1998737284, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1998737284} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1998737284|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1998737284, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1998737284} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:30:57,113 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In727123842 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In727123842 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In727123842 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In727123842 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In727123842 |P1Thread1of1ForFork1_#t~ite12_Out727123842|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out727123842|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In727123842, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In727123842, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In727123842, ~x$w_buff0_used~0=~x$w_buff0_used~0_In727123842} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In727123842, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In727123842, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out727123842|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In727123842, ~x$w_buff0_used~0=~x$w_buff0_used~0_In727123842} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:30:57,113 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L769-->L770: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In318404578 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In318404578 256))) (.cse1 (= ~x$r_buff0_thd2~0_In318404578 ~x$r_buff0_thd2~0_Out318404578))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= 0 ~x$r_buff0_thd2~0_Out318404578)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In318404578, ~x$w_buff0_used~0=~x$w_buff0_used~0_In318404578} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out318404578|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out318404578, ~x$w_buff0_used~0=~x$w_buff0_used~0_In318404578} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 17:30:57,113 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1651534270 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1651534270 256))) (.cse2 (= (mod ~x$r_buff1_thd2~0_In-1651534270 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1651534270 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1651534270| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd2~0_In-1651534270 |P1Thread1of1ForFork1_#t~ite14_Out-1651534270|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1651534270, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1651534270, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1651534270, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1651534270} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1651534270, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1651534270, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1651534270, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1651534270|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1651534270} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:30:57,113 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_134 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_134, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:30:57,113 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L795-->L797-2: Formula: (and (or (= (mod v_~x$r_buff0_thd0~0_128 256) 0) (= 0 (mod v_~x$w_buff0_used~0_232 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_232} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_232} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:30:57,113 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L797-2-->L797-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In483793041 256))) (.cse0 (= (mod ~x$r_buff1_thd0~0_In483793041 256) 0))) (or (and (= ~x$w_buff1~0_In483793041 |ULTIMATE.start_main_#t~ite17_Out483793041|) (not .cse0) (not .cse1)) (and (= ~x~0_In483793041 |ULTIMATE.start_main_#t~ite17_Out483793041|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In483793041, ~x$w_buff1_used~0=~x$w_buff1_used~0_In483793041, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In483793041, ~x~0=~x~0_In483793041} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out483793041|, ~x$w_buff1~0=~x$w_buff1~0_In483793041, ~x$w_buff1_used~0=~x$w_buff1_used~0_In483793041, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In483793041, ~x~0=~x~0_In483793041} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 17:30:57,114 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L797-4-->L798: Formula: (= v_~x~0_43 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_7|, ~x~0=v_~x~0_43} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-12-07 17:30:57,114 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [664] [664] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In380246515 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In380246515 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out380246515| 0) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In380246515 |ULTIMATE.start_main_#t~ite19_Out380246515|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In380246515, ~x$w_buff0_used~0=~x$w_buff0_used~0_In380246515} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In380246515, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out380246515|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In380246515} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:30:57,114 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L799-->L799-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd0~0_In123815999 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In123815999 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In123815999 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In123815999 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite20_Out123815999|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~x$w_buff1_used~0_In123815999 |ULTIMATE.start_main_#t~ite20_Out123815999|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In123815999, ~x$w_buff1_used~0=~x$w_buff1_used~0_In123815999, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In123815999, ~x$w_buff0_used~0=~x$w_buff0_used~0_In123815999} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In123815999, ~x$w_buff1_used~0=~x$w_buff1_used~0_In123815999, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out123815999|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In123815999, ~x$w_buff0_used~0=~x$w_buff0_used~0_In123815999} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:30:57,114 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1253482144 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1253482144 256)))) (or (and (= ~x$r_buff0_thd0~0_In-1253482144 |ULTIMATE.start_main_#t~ite21_Out-1253482144|) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite21_Out-1253482144| 0) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1253482144, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1253482144} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1253482144, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1253482144|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1253482144} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:30:57,114 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In771284310 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In771284310 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In771284310 256))) (.cse3 (= (mod ~x$r_buff0_thd0~0_In771284310 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out771284310|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite22_Out771284310| ~x$r_buff1_thd0~0_In771284310)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In771284310, ~x$w_buff1_used~0=~x$w_buff1_used~0_In771284310, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In771284310, ~x$w_buff0_used~0=~x$w_buff0_used~0_In771284310} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In771284310, ~x$w_buff1_used~0=~x$w_buff1_used~0_In771284310, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In771284310, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out771284310|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In771284310} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:30:57,115 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L810-->L810-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1391314622 256)))) (or (and (= |ULTIMATE.start_main_#t~ite31_Out1391314622| |ULTIMATE.start_main_#t~ite32_Out1391314622|) .cse0 (= |ULTIMATE.start_main_#t~ite31_Out1391314622| ~x$w_buff1~0_In1391314622) (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In1391314622 256) 0))) (or (and (= 0 (mod ~x$r_buff1_thd0~0_In1391314622 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In1391314622 256)) (and (= 0 (mod ~x$w_buff1_used~0_In1391314622 256)) .cse1)))) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite32_Out1391314622| ~x$w_buff1~0_In1391314622) (= |ULTIMATE.start_main_#t~ite31_In1391314622| |ULTIMATE.start_main_#t~ite31_Out1391314622|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1391314622, ~x$w_buff1~0=~x$w_buff1~0_In1391314622, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1391314622, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1391314622, ~weak$$choice2~0=~weak$$choice2~0_In1391314622, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In1391314622|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1391314622} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1391314622, ~x$w_buff1~0=~x$w_buff1~0_In1391314622, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1391314622, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out1391314622|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1391314622, ~weak$$choice2~0=~weak$$choice2~0_In1391314622, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out1391314622|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1391314622} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 17:30:57,116 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L812-->L812-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1765427987 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite37_In-1765427987| |ULTIMATE.start_main_#t~ite37_Out-1765427987|) (= |ULTIMATE.start_main_#t~ite38_Out-1765427987| ~x$w_buff1_used~0_In-1765427987)) (and (= |ULTIMATE.start_main_#t~ite37_Out-1765427987| ~x$w_buff1_used~0_In-1765427987) (= |ULTIMATE.start_main_#t~ite38_Out-1765427987| |ULTIMATE.start_main_#t~ite37_Out-1765427987|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1765427987 256)))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-1765427987 256))) (= (mod ~x$w_buff0_used~0_In-1765427987 256) 0) (and (= 0 (mod ~x$w_buff1_used~0_In-1765427987 256)) .cse1))) .cse0))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1765427987, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1765427987, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In-1765427987|, ~weak$$choice2~0=~weak$$choice2~0_In-1765427987, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1765427987, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1765427987} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1765427987, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1765427987, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-1765427987|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-1765427987|, ~weak$$choice2~0=~weak$$choice2~0_In-1765427987, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1765427987, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1765427987} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 17:30:57,116 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [602] [602] L813-->L814: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~x$r_buff0_thd0~0_85 v_~x$r_buff0_thd0~0_84)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_85, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_84, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_6|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_10|, ~weak$$choice2~0=v_~weak$$choice2~0_24} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 17:30:57,117 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L816-->L819-1: Formula: (and (= v_~x$mem_tmp~0_16 v_~x~0_122) (not (= 0 (mod v_~x$flush_delayed~0_31 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~x$flush_delayed~0_30 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_31, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_16} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_30, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_16, ~x~0=v_~x~0_122, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_27|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:30:57,117 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L819-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:30:57,162 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:30:57 BasicIcfg [2019-12-07 17:30:57,162 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:30:57,162 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:30:57,162 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:30:57,162 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:30:57,163 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:30:49" (3/4) ... [2019-12-07 17:30:57,164 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:30:57,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] ULTIMATE.startENTRY-->L789: Formula: (let ((.cse0 (store |v_#valid_46| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= 0 v_~x$read_delayed_var~0.offset_6) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1099~0.base_20| 4)) (= 0 v_~x$r_buff1_thd2~0_157) (= (select .cse0 |v_ULTIMATE.start_main_~#t1099~0.base_20|) 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1099~0.base_20|) (= 0 v_~weak$$choice0~0_14) (= |v_#NULL.offset_6| 0) (= v_~x$mem_tmp~0_21 0) (= 0 v_~x$w_buff0~0_235) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~x$w_buff1~0_175) (= 0 v_~x$w_buff1_used~0_360) (= v_~weak$$choice2~0_113 0) (= 0 v_~x$read_delayed~0_5) (= 0 v_~x$r_buff0_thd2~0_211) (= v_~main$tmp_guard1~0_26 0) (= v_~x$r_buff0_thd0~0_331 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1099~0.base_20| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1099~0.base_20|) |v_ULTIMATE.start_main_~#t1099~0.offset_15| 0)) |v_#memory_int_17|) (= v_~x$r_buff1_thd0~0_268 0) (= v_~__unbuffered_p1_EAX~0_126 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~x$r_buff1_thd1~0_198 0) (= 0 v_~__unbuffered_cnt~0_64) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p1_EBX~0_126) (= |v_#valid_44| (store .cse0 |v_ULTIMATE.start_main_~#t1099~0.base_20| 1)) (= 0 v_~x$w_buff0_used~0_638) (= 0 |v_ULTIMATE.start_main_~#t1099~0.offset_15|) (= 0 v_~x~0_158) (= v_~x$flush_delayed~0_38 0) (= v_~z~0_80 0) (= v_~y~0_115 0) (= v_~x$r_buff0_thd1~0_118 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_235, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_45|, ~x$flush_delayed~0=v_~x$flush_delayed~0_38, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_30|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_198, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_34|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_~#t1100~0.base=|v_ULTIMATE.start_main_~#t1100~0.base_17|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_38|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_35|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_126, #length=|v_#length_17|, ULTIMATE.start_main_~#t1099~0.base=|v_ULTIMATE.start_main_~#t1099~0.base_20|, ULTIMATE.start_main_~#t1099~0.offset=|v_ULTIMATE.start_main_~#t1099~0.offset_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_331, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_35|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_28|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ~x$w_buff1~0=v_~x$w_buff1~0_175, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_24|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_360, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_157, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_29|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_30|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_27|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_28|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64, ~x~0=v_~x~0_158, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_118, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_26|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_45|, ~x$mem_tmp~0=v_~x$mem_tmp~0_21, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_26|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_46|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_36|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_26|, ULTIMATE.start_main_~#t1100~0.offset=|v_ULTIMATE.start_main_~#t1100~0.offset_14|, ~y~0=v_~y~0_115, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_126, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_34|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_24|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_34|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_31|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_268, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_211, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_35|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_638, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_16|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_17|, ~z~0=v_~z~0_80, ~weak$$choice2~0=v_~weak$$choice2~0_113, ~x$read_delayed~0=v_~x$read_delayed~0_5} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_~#t1100~0.base, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p1_EAX~0, #length, ULTIMATE.start_main_~#t1099~0.base, ULTIMATE.start_main_~#t1099~0.offset, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1100~0.offset, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 17:30:57,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L789-1-->L791: Formula: (and (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t1100~0.base_11|)) (= (store |v_#valid_24| |v_ULTIMATE.start_main_~#t1100~0.base_11| 1) |v_#valid_23|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1100~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1100~0.base_11|) |v_ULTIMATE.start_main_~#t1100~0.offset_10| 1)) |v_#memory_int_11|) (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t1100~0.base_11| 4)) (= 0 |v_ULTIMATE.start_main_~#t1100~0.offset_10|) (not (= |v_ULTIMATE.start_main_~#t1100~0.base_11| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1100~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_24|, #memory_int=|v_#memory_int_12|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, ULTIMATE.start_main_~#t1100~0.offset=|v_ULTIMATE.start_main_~#t1100~0.offset_10|, #length=|v_#length_11|, ULTIMATE.start_main_~#t1100~0.base=|v_ULTIMATE.start_main_~#t1100~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1100~0.offset, #length, ULTIMATE.start_main_~#t1100~0.base] because there is no mapped edge [2019-12-07 17:30:57,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [588] [588] P1ENTRY-->L4-3: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_5 |v_P1Thread1of1ForFork1_#in~arg.base_7|) (= 1 v_~x$w_buff0_used~0_78) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_78 256))) (not (= (mod v_~x$w_buff1_used~0_47 256) 0)))) 1 0)) (= |v_P1Thread1of1ForFork1_#in~arg.offset_7| v_P1Thread1of1ForFork1_~arg.offset_5) (= 2 v_~x$w_buff0~0_19) (= v_~x$w_buff0~0_20 v_~x$w_buff1~0_15) (= v_~x$w_buff1_used~0_47 v_~x$w_buff0_used~0_79) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 0)) (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7 |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_79} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_7, ~x$w_buff0~0=v_~x$w_buff0~0_19, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_5, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_5|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_5, ~x$w_buff1~0=v_~x$w_buff1~0_15, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_7|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_7|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_47, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_78} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 17:30:57,196 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L732-2-->L732-5: Formula: (let ((.cse1 (= |P0Thread1of1ForFork0_#t~ite4_Out602253436| |P0Thread1of1ForFork0_#t~ite3_Out602253436|)) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In602253436 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In602253436 256)))) (or (and (= ~x$w_buff1~0_In602253436 |P0Thread1of1ForFork0_#t~ite3_Out602253436|) (not .cse0) .cse1 (not .cse2)) (and .cse1 (or .cse0 .cse2) (= ~x~0_In602253436 |P0Thread1of1ForFork0_#t~ite3_Out602253436|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In602253436, ~x$w_buff1_used~0=~x$w_buff1_used~0_In602253436, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In602253436, ~x~0=~x~0_In602253436} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out602253436|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out602253436|, ~x$w_buff1~0=~x$w_buff1~0_In602253436, ~x$w_buff1_used~0=~x$w_buff1_used~0_In602253436, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In602253436, ~x~0=~x~0_In602253436} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 17:30:57,196 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L733-->L733-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1749043420 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1749043420 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1749043420| ~x$w_buff0_used~0_In1749043420) (or .cse0 .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1749043420| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1749043420, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1749043420} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1749043420|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1749043420, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1749043420} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:30:57,197 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L734-->L734-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In-1065303700 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1065303700 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-1065303700 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1065303700 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1065303700| ~x$w_buff1_used~0_In-1065303700) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1065303700|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1065303700, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1065303700, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1065303700, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1065303700} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1065303700|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1065303700, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1065303700, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1065303700, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1065303700} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:30:57,197 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L735-->L735-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-2016231628 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2016231628 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-2016231628|) (not .cse1)) (and (= ~x$r_buff0_thd1~0_In-2016231628 |P0Thread1of1ForFork0_#t~ite7_Out-2016231628|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2016231628, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2016231628} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2016231628, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-2016231628|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2016231628} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 17:30:57,197 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L736-->L736-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In64867829 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In64867829 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In64867829 256))) (.cse0 (= (mod ~x$r_buff1_thd1~0_In64867829 256) 0))) (or (and (= ~x$r_buff1_thd1~0_In64867829 |P0Thread1of1ForFork0_#t~ite8_Out64867829|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out64867829|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In64867829, ~x$w_buff1_used~0=~x$w_buff1_used~0_In64867829, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In64867829, ~x$w_buff0_used~0=~x$w_buff0_used~0_In64867829} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In64867829, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out64867829|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In64867829, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In64867829, ~x$w_buff0_used~0=~x$w_buff0_used~0_In64867829} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:30:57,198 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L736-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_144 |v_P0Thread1of1ForFork0_#t~ite8_34|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_33|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_144} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 17:30:57,198 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In1998737284 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1998737284 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out1998737284| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out1998737284| ~x$w_buff0_used~0_In1998737284)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1998737284, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1998737284} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1998737284|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1998737284, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1998737284} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:30:57,198 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In727123842 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In727123842 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In727123842 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In727123842 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In727123842 |P1Thread1of1ForFork1_#t~ite12_Out727123842|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out727123842|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In727123842, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In727123842, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In727123842, ~x$w_buff0_used~0=~x$w_buff0_used~0_In727123842} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In727123842, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In727123842, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out727123842|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In727123842, ~x$w_buff0_used~0=~x$w_buff0_used~0_In727123842} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:30:57,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L769-->L770: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In318404578 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In318404578 256))) (.cse1 (= ~x$r_buff0_thd2~0_In318404578 ~x$r_buff0_thd2~0_Out318404578))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= 0 ~x$r_buff0_thd2~0_Out318404578)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In318404578, ~x$w_buff0_used~0=~x$w_buff0_used~0_In318404578} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out318404578|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out318404578, ~x$w_buff0_used~0=~x$w_buff0_used~0_In318404578} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 17:30:57,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1651534270 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1651534270 256))) (.cse2 (= (mod ~x$r_buff1_thd2~0_In-1651534270 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1651534270 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1651534270| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd2~0_In-1651534270 |P1Thread1of1ForFork1_#t~ite14_Out-1651534270|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1651534270, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1651534270, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1651534270, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1651534270} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1651534270, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1651534270, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1651534270, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1651534270|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1651534270} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:30:57,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_134 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_134, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:30:57,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L795-->L797-2: Formula: (and (or (= (mod v_~x$r_buff0_thd0~0_128 256) 0) (= 0 (mod v_~x$w_buff0_used~0_232 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_232} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_232} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:30:57,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L797-2-->L797-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In483793041 256))) (.cse0 (= (mod ~x$r_buff1_thd0~0_In483793041 256) 0))) (or (and (= ~x$w_buff1~0_In483793041 |ULTIMATE.start_main_#t~ite17_Out483793041|) (not .cse0) (not .cse1)) (and (= ~x~0_In483793041 |ULTIMATE.start_main_#t~ite17_Out483793041|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In483793041, ~x$w_buff1_used~0=~x$w_buff1_used~0_In483793041, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In483793041, ~x~0=~x~0_In483793041} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out483793041|, ~x$w_buff1~0=~x$w_buff1~0_In483793041, ~x$w_buff1_used~0=~x$w_buff1_used~0_In483793041, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In483793041, ~x~0=~x~0_In483793041} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 17:30:57,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L797-4-->L798: Formula: (= v_~x~0_43 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_7|, ~x~0=v_~x~0_43} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-12-07 17:30:57,200 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [664] [664] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In380246515 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In380246515 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out380246515| 0) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In380246515 |ULTIMATE.start_main_#t~ite19_Out380246515|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In380246515, ~x$w_buff0_used~0=~x$w_buff0_used~0_In380246515} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In380246515, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out380246515|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In380246515} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:30:57,200 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L799-->L799-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd0~0_In123815999 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In123815999 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In123815999 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In123815999 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite20_Out123815999|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~x$w_buff1_used~0_In123815999 |ULTIMATE.start_main_#t~ite20_Out123815999|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In123815999, ~x$w_buff1_used~0=~x$w_buff1_used~0_In123815999, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In123815999, ~x$w_buff0_used~0=~x$w_buff0_used~0_In123815999} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In123815999, ~x$w_buff1_used~0=~x$w_buff1_used~0_In123815999, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out123815999|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In123815999, ~x$w_buff0_used~0=~x$w_buff0_used~0_In123815999} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:30:57,200 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1253482144 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1253482144 256)))) (or (and (= ~x$r_buff0_thd0~0_In-1253482144 |ULTIMATE.start_main_#t~ite21_Out-1253482144|) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite21_Out-1253482144| 0) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1253482144, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1253482144} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1253482144, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1253482144|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1253482144} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:30:57,201 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In771284310 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In771284310 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In771284310 256))) (.cse3 (= (mod ~x$r_buff0_thd0~0_In771284310 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out771284310|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite22_Out771284310| ~x$r_buff1_thd0~0_In771284310)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In771284310, ~x$w_buff1_used~0=~x$w_buff1_used~0_In771284310, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In771284310, ~x$w_buff0_used~0=~x$w_buff0_used~0_In771284310} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In771284310, ~x$w_buff1_used~0=~x$w_buff1_used~0_In771284310, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In771284310, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out771284310|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In771284310} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:30:57,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L810-->L810-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1391314622 256)))) (or (and (= |ULTIMATE.start_main_#t~ite31_Out1391314622| |ULTIMATE.start_main_#t~ite32_Out1391314622|) .cse0 (= |ULTIMATE.start_main_#t~ite31_Out1391314622| ~x$w_buff1~0_In1391314622) (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In1391314622 256) 0))) (or (and (= 0 (mod ~x$r_buff1_thd0~0_In1391314622 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In1391314622 256)) (and (= 0 (mod ~x$w_buff1_used~0_In1391314622 256)) .cse1)))) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite32_Out1391314622| ~x$w_buff1~0_In1391314622) (= |ULTIMATE.start_main_#t~ite31_In1391314622| |ULTIMATE.start_main_#t~ite31_Out1391314622|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1391314622, ~x$w_buff1~0=~x$w_buff1~0_In1391314622, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1391314622, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1391314622, ~weak$$choice2~0=~weak$$choice2~0_In1391314622, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In1391314622|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1391314622} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1391314622, ~x$w_buff1~0=~x$w_buff1~0_In1391314622, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1391314622, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out1391314622|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1391314622, ~weak$$choice2~0=~weak$$choice2~0_In1391314622, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out1391314622|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1391314622} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 17:30:57,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L812-->L812-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1765427987 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite37_In-1765427987| |ULTIMATE.start_main_#t~ite37_Out-1765427987|) (= |ULTIMATE.start_main_#t~ite38_Out-1765427987| ~x$w_buff1_used~0_In-1765427987)) (and (= |ULTIMATE.start_main_#t~ite37_Out-1765427987| ~x$w_buff1_used~0_In-1765427987) (= |ULTIMATE.start_main_#t~ite38_Out-1765427987| |ULTIMATE.start_main_#t~ite37_Out-1765427987|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1765427987 256)))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-1765427987 256))) (= (mod ~x$w_buff0_used~0_In-1765427987 256) 0) (and (= 0 (mod ~x$w_buff1_used~0_In-1765427987 256)) .cse1))) .cse0))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1765427987, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1765427987, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In-1765427987|, ~weak$$choice2~0=~weak$$choice2~0_In-1765427987, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1765427987, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1765427987} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1765427987, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1765427987, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-1765427987|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-1765427987|, ~weak$$choice2~0=~weak$$choice2~0_In-1765427987, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1765427987, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1765427987} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 17:30:57,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [602] [602] L813-->L814: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~x$r_buff0_thd0~0_85 v_~x$r_buff0_thd0~0_84)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_85, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_84, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_6|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_10|, ~weak$$choice2~0=v_~weak$$choice2~0_24} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 17:30:57,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L816-->L819-1: Formula: (and (= v_~x$mem_tmp~0_16 v_~x~0_122) (not (= 0 (mod v_~x$flush_delayed~0_31 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~x$flush_delayed~0_30 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_31, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_16} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_30, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_16, ~x~0=v_~x~0_122, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_27|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:30:57,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L819-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:30:57,269 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_09399560-db29-4f07-a28f-dd03fd922631/bin/uautomizer/witness.graphml [2019-12-07 17:30:57,269 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:30:57,271 INFO L168 Benchmark]: Toolchain (without parser) took 8484.50 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 455.1 MB). Free memory was 938.2 MB in the beginning and 1.3 GB in the end (delta: -401.8 MB). Peak memory consumption was 426.5 MB. Max. memory is 11.5 GB. [2019-12-07 17:30:57,271 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:30:57,272 INFO L168 Benchmark]: CACSL2BoogieTranslator took 410.24 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 110.6 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -144.5 MB). Peak memory consumption was 23.6 MB. Max. memory is 11.5 GB. [2019-12-07 17:30:57,272 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:30:57,272 INFO L168 Benchmark]: Boogie Preprocessor took 24.41 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:30:57,272 INFO L168 Benchmark]: RCFGBuilder took 385.04 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.7 MB). Peak memory consumption was 48.7 MB. Max. memory is 11.5 GB. [2019-12-07 17:30:57,273 INFO L168 Benchmark]: TraceAbstraction took 7514.90 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 163.6 MB). Free memory was 1.0 GB in the beginning and 785.8 MB in the end (delta: 242.7 MB). Peak memory consumption was 406.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:30:57,273 INFO L168 Benchmark]: Witness Printer took 107.56 ms. Allocated memory was 1.3 GB in the beginning and 1.5 GB in the end (delta: 180.9 MB). Free memory was 785.8 MB in the beginning and 1.3 GB in the end (delta: -554.1 MB). Peak memory consumption was 8.2 kB. Max. memory is 11.5 GB. [2019-12-07 17:30:57,275 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 410.24 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 110.6 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -144.5 MB). Peak memory consumption was 23.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.41 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 385.04 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.7 MB). Peak memory consumption was 48.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 7514.90 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 163.6 MB). Free memory was 1.0 GB in the beginning and 785.8 MB in the end (delta: 242.7 MB). Peak memory consumption was 406.3 MB. Max. memory is 11.5 GB. * Witness Printer took 107.56 ms. Allocated memory was 1.3 GB in the beginning and 1.5 GB in the end (delta: 180.9 MB). Free memory was 785.8 MB in the beginning and 1.3 GB in the end (delta: -554.1 MB). Peak memory consumption was 8.2 kB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.6s, 148 ProgramPointsBefore, 77 ProgramPointsAfterwards, 182 TransitionsBefore, 88 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 40 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 31 ConcurrentYvCompositions, 26 ChoiceCompositions, 3874 VarBasedMoverChecksPositive, 189 VarBasedMoverChecksNegative, 57 SemBasedMoverChecksPositive, 186 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 45620 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L789] FCALL, FORK 0 pthread_create(&t1099, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L791] FCALL, FORK 0 pthread_create(&t1100, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L751] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L752] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L753] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L754] 2 x$r_buff0_thd2 = (_Bool)1 [L757] 2 y = 1 [L760] 2 __unbuffered_p1_EAX = y [L763] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L726] 1 z = 1 [L729] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L732] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L766] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L733] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L734] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L735] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L766] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L767] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L768] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L793] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L798] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L799] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L800] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L801] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L804] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L805] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L806] 0 x$flush_delayed = weak$$choice2 [L807] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L808] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L809] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L809] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L810] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L811] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L811] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L812] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L814] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L814] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L815] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 142 locations, 2 error locations. Result: UNSAFE, OverallTime: 7.3s, OverallIterations: 13, TraceHistogramMax: 1, AutomataDifference: 2.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1165 SDtfs, 1129 SDslu, 2571 SDs, 0 SdLazy, 1652 SolverSat, 92 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 100 GetRequests, 15 SyntacticMatches, 13 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 174 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=12459occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.8s AutomataMinimizationTime, 12 MinimizatonAttempts, 3766 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 491 NumberOfCodeBlocks, 491 NumberOfCodeBlocksAsserted, 13 NumberOfCheckSat, 425 ConstructedInterpolants, 0 QuantifiedInterpolants, 79223 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 12 InterpolantComputations, 12 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...