./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix042_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix042_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bd875f2ecd70c82c6ac3f2be5a164fc8b3e12425 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:31:25,275 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:31:25,276 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:31:25,284 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:31:25,284 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:31:25,285 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:31:25,286 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:31:25,287 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:31:25,288 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:31:25,289 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:31:25,290 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:31:25,290 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:31:25,291 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:31:25,291 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:31:25,292 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:31:25,293 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:31:25,293 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:31:25,294 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:31:25,295 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:31:25,297 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:31:25,298 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:31:25,298 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:31:25,299 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:31:25,299 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:31:25,301 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:31:25,301 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:31:25,301 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:31:25,302 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:31:25,302 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:31:25,303 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:31:25,303 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:31:25,303 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:31:25,304 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:31:25,304 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:31:25,305 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:31:25,305 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:31:25,305 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:31:25,305 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:31:25,305 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:31:25,306 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:31:25,306 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:31:25,307 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:31:25,316 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:31:25,316 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:31:25,316 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:31:25,316 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:31:25,317 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:31:25,317 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:31:25,317 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:31:25,317 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:31:25,317 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:31:25,317 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:31:25,317 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:31:25,317 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:31:25,317 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:31:25,318 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:31:25,318 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:31:25,318 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:31:25,318 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:31:25,318 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:31:25,318 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:31:25,318 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:31:25,318 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:31:25,318 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:31:25,319 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:31:25,319 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:31:25,319 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:31:25,319 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:31:25,319 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:31:25,319 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:31:25,319 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:31:25,319 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bd875f2ecd70c82c6ac3f2be5a164fc8b3e12425 [2019-12-07 18:31:25,421 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:31:25,432 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:31:25,434 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:31:25,436 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:31:25,436 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:31:25,437 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix042_power.oepc.i [2019-12-07 18:31:25,481 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/data/84adc1ca5/3795d4435a6445b187a7a420a138cd0b/FLAG72e6bb891 [2019-12-07 18:31:25,933 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:31:25,933 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/sv-benchmarks/c/pthread-wmm/mix042_power.oepc.i [2019-12-07 18:31:25,945 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/data/84adc1ca5/3795d4435a6445b187a7a420a138cd0b/FLAG72e6bb891 [2019-12-07 18:31:25,956 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/data/84adc1ca5/3795d4435a6445b187a7a420a138cd0b [2019-12-07 18:31:25,958 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:31:25,960 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:31:25,961 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:31:25,961 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:31:25,963 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:31:25,964 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:31:25" (1/1) ... [2019-12-07 18:31:25,966 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c8002ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:25, skipping insertion in model container [2019-12-07 18:31:25,966 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:31:25" (1/1) ... [2019-12-07 18:31:25,971 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:31:26,009 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:31:26,254 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:31:26,262 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:31:26,307 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:31:26,353 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:31:26,354 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26 WrapperNode [2019-12-07 18:31:26,354 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:31:26,354 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:31:26,354 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:31:26,355 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:31:26,360 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26" (1/1) ... [2019-12-07 18:31:26,374 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26" (1/1) ... [2019-12-07 18:31:26,393 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:31:26,394 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:31:26,394 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:31:26,394 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:31:26,400 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26" (1/1) ... [2019-12-07 18:31:26,401 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26" (1/1) ... [2019-12-07 18:31:26,404 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26" (1/1) ... [2019-12-07 18:31:26,404 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26" (1/1) ... [2019-12-07 18:31:26,412 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26" (1/1) ... [2019-12-07 18:31:26,414 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26" (1/1) ... [2019-12-07 18:31:26,417 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26" (1/1) ... [2019-12-07 18:31:26,420 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:31:26,421 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:31:26,421 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:31:26,421 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:31:26,422 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:31:26,465 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:31:26,465 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:31:26,466 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:31:26,466 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:31:26,466 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:31:26,466 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:31:26,466 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:31:26,466 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:31:26,466 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:31:26,466 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:31:26,466 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:31:26,466 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:31:26,466 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:31:26,467 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:31:26,836 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:31:26,837 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:31:26,838 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:31:26 BoogieIcfgContainer [2019-12-07 18:31:26,838 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:31:26,838 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:31:26,838 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:31:26,840 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:31:26,840 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:31:25" (1/3) ... [2019-12-07 18:31:26,841 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d819049 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:31:26, skipping insertion in model container [2019-12-07 18:31:26,841 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:31:26" (2/3) ... [2019-12-07 18:31:26,841 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d819049 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:31:26, skipping insertion in model container [2019-12-07 18:31:26,841 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:31:26" (3/3) ... [2019-12-07 18:31:26,842 INFO L109 eAbstractionObserver]: Analyzing ICFG mix042_power.oepc.i [2019-12-07 18:31:26,849 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:31:26,849 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:31:26,853 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:31:26,854 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:31:26,879 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,880 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,880 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,880 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,880 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,880 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,880 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,880 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,881 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,881 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,881 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,881 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,881 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,881 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,881 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,881 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,882 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,882 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,882 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,882 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,882 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,882 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,882 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,882 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,882 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,882 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,883 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,883 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,883 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,883 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,883 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,883 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,883 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,883 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,884 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,884 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,884 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,884 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,884 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,884 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,884 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,884 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,885 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,885 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,885 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,885 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,885 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,885 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,885 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,885 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,885 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,886 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,886 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,886 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,886 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,886 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,886 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,886 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,886 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,887 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,887 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,887 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,887 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,887 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,888 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,888 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,888 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,888 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,888 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,888 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,888 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,888 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,888 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,889 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,889 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,889 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,889 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,889 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,889 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,889 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,889 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,889 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,890 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,890 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,890 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,890 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,890 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,890 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,890 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,890 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,890 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,891 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,891 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,891 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,891 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,891 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,891 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,891 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,891 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,891 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,892 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,892 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,892 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,892 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,892 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,892 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,892 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,892 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,892 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,892 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,893 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,893 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,893 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,893 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,893 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,893 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,893 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,893 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,893 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,893 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,894 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,894 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,894 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,894 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,894 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,894 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,894 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,894 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,894 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,894 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,895 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,895 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,895 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,895 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,895 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,895 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,895 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,895 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,895 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,896 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,896 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,896 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,896 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,896 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,896 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,896 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,896 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,896 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,896 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,897 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,897 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,897 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,897 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,897 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,897 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,897 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,897 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,897 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,897 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,897 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,898 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,898 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,898 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,898 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,898 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,898 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,898 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,898 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,898 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,898 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,899 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:31:26,910 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:31:26,923 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:31:26,923 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:31:26,923 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:31:26,923 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:31:26,923 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:31:26,923 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:31:26,923 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:31:26,923 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:31:26,934 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 18:31:26,936 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 18:31:27,001 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 18:31:27,002 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:31:27,012 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:31:27,033 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 18:31:27,068 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 18:31:27,068 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:31:27,073 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:31:27,089 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:31:27,090 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:31:30,091 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 18:31:30,418 WARN L192 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 18:31:30,508 INFO L206 etLargeBlockEncoding]: Checked pairs total: 87212 [2019-12-07 18:31:30,509 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 18:31:30,511 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 18:31:42,735 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 18:31:42,737 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 18:31:42,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:31:42,741 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:31:42,741 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:31:42,742 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:31:42,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:31:42,746 INFO L82 PathProgramCache]: Analyzing trace with hash 919766, now seen corresponding path program 1 times [2019-12-07 18:31:42,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:31:42,752 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1652452539] [2019-12-07 18:31:42,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:31:42,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:31:42,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:31:42,881 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1652452539] [2019-12-07 18:31:42,882 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:31:42,882 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:31:42,883 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1734320050] [2019-12-07 18:31:42,886 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:31:42,887 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:31:42,896 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:31:42,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:31:42,898 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 18:31:43,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:31:43,560 INFO L93 Difference]: Finished difference Result 101544 states and 430594 transitions. [2019-12-07 18:31:43,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:31:43,561 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:31:43,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:31:43,978 INFO L225 Difference]: With dead ends: 101544 [2019-12-07 18:31:43,978 INFO L226 Difference]: Without dead ends: 95304 [2019-12-07 18:31:43,979 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:31:47,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95304 states. [2019-12-07 18:31:48,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95304 to 95304. [2019-12-07 18:31:48,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95304 states. [2019-12-07 18:31:50,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95304 states to 95304 states and 403554 transitions. [2019-12-07 18:31:50,754 INFO L78 Accepts]: Start accepts. Automaton has 95304 states and 403554 transitions. Word has length 3 [2019-12-07 18:31:50,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:31:50,754 INFO L462 AbstractCegarLoop]: Abstraction has 95304 states and 403554 transitions. [2019-12-07 18:31:50,754 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:31:50,754 INFO L276 IsEmpty]: Start isEmpty. Operand 95304 states and 403554 transitions. [2019-12-07 18:31:50,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:31:50,758 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:31:50,758 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:31:50,758 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:31:50,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:31:50,758 INFO L82 PathProgramCache]: Analyzing trace with hash -1982627867, now seen corresponding path program 1 times [2019-12-07 18:31:50,758 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:31:50,758 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589442760] [2019-12-07 18:31:50,759 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:31:50,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:31:50,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:31:50,817 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589442760] [2019-12-07 18:31:50,817 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:31:50,817 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:31:50,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1115538922] [2019-12-07 18:31:50,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:31:50,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:31:50,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:31:50,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:31:50,819 INFO L87 Difference]: Start difference. First operand 95304 states and 403554 transitions. Second operand 4 states. [2019-12-07 18:31:51,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:31:51,683 INFO L93 Difference]: Finished difference Result 152040 states and 617140 transitions. [2019-12-07 18:31:51,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:31:51,684 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:31:51,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:31:52,071 INFO L225 Difference]: With dead ends: 152040 [2019-12-07 18:31:52,071 INFO L226 Difference]: Without dead ends: 151991 [2019-12-07 18:31:52,071 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:31:56,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151991 states. [2019-12-07 18:31:58,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151991 to 137801. [2019-12-07 18:31:58,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137801 states. [2019-12-07 18:31:58,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137801 states to 137801 states and 566928 transitions. [2019-12-07 18:31:58,737 INFO L78 Accepts]: Start accepts. Automaton has 137801 states and 566928 transitions. Word has length 11 [2019-12-07 18:31:58,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:31:58,738 INFO L462 AbstractCegarLoop]: Abstraction has 137801 states and 566928 transitions. [2019-12-07 18:31:58,738 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:31:58,738 INFO L276 IsEmpty]: Start isEmpty. Operand 137801 states and 566928 transitions. [2019-12-07 18:31:58,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:31:58,743 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:31:58,743 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:31:58,743 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:31:58,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:31:58,744 INFO L82 PathProgramCache]: Analyzing trace with hash -1673757482, now seen corresponding path program 1 times [2019-12-07 18:31:58,744 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:31:58,744 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577527107] [2019-12-07 18:31:58,744 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:31:58,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:31:58,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:31:58,795 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1577527107] [2019-12-07 18:31:58,795 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:31:58,795 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:31:58,795 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [311653499] [2019-12-07 18:31:58,795 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:31:58,796 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:31:58,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:31:58,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:31:58,796 INFO L87 Difference]: Start difference. First operand 137801 states and 566928 transitions. Second operand 4 states. [2019-12-07 18:32:00,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:00,122 INFO L93 Difference]: Finished difference Result 197752 states and 794963 transitions. [2019-12-07 18:32:00,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:32:00,124 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:32:00,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:00,619 INFO L225 Difference]: With dead ends: 197752 [2019-12-07 18:32:00,619 INFO L226 Difference]: Without dead ends: 197696 [2019-12-07 18:32:00,619 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:07,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197696 states. [2019-12-07 18:32:09,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197696 to 164675. [2019-12-07 18:32:09,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164675 states. [2019-12-07 18:32:10,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164675 states to 164675 states and 674105 transitions. [2019-12-07 18:32:10,067 INFO L78 Accepts]: Start accepts. Automaton has 164675 states and 674105 transitions. Word has length 13 [2019-12-07 18:32:10,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:10,067 INFO L462 AbstractCegarLoop]: Abstraction has 164675 states and 674105 transitions. [2019-12-07 18:32:10,067 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:32:10,068 INFO L276 IsEmpty]: Start isEmpty. Operand 164675 states and 674105 transitions. [2019-12-07 18:32:10,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:32:10,074 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:10,074 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:10,074 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:10,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:10,075 INFO L82 PathProgramCache]: Analyzing trace with hash 841711145, now seen corresponding path program 1 times [2019-12-07 18:32:10,075 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:10,075 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032993752] [2019-12-07 18:32:10,075 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:10,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:10,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:10,129 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1032993752] [2019-12-07 18:32:10,129 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:10,129 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:32:10,130 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [878497265] [2019-12-07 18:32:10,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:32:10,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:10,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:32:10,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:32:10,131 INFO L87 Difference]: Start difference. First operand 164675 states and 674105 transitions. Second operand 4 states. [2019-12-07 18:32:11,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:11,166 INFO L93 Difference]: Finished difference Result 202675 states and 826980 transitions. [2019-12-07 18:32:11,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:32:11,167 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 18:32:11,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:11,704 INFO L225 Difference]: With dead ends: 202675 [2019-12-07 18:32:11,705 INFO L226 Difference]: Without dead ends: 202675 [2019-12-07 18:32:11,705 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:16,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202675 states. [2019-12-07 18:32:21,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202675 to 172880. [2019-12-07 18:32:21,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172880 states. [2019-12-07 18:32:21,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172880 states to 172880 states and 708759 transitions. [2019-12-07 18:32:21,864 INFO L78 Accepts]: Start accepts. Automaton has 172880 states and 708759 transitions. Word has length 16 [2019-12-07 18:32:21,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:21,865 INFO L462 AbstractCegarLoop]: Abstraction has 172880 states and 708759 transitions. [2019-12-07 18:32:21,865 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:32:21,865 INFO L276 IsEmpty]: Start isEmpty. Operand 172880 states and 708759 transitions. [2019-12-07 18:32:21,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:32:21,881 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:21,881 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:21,881 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:21,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:21,882 INFO L82 PathProgramCache]: Analyzing trace with hash -118269295, now seen corresponding path program 1 times [2019-12-07 18:32:21,882 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:21,882 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [995955248] [2019-12-07 18:32:21,882 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:21,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:21,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:21,922 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [995955248] [2019-12-07 18:32:21,923 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:21,923 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:32:21,923 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [863334346] [2019-12-07 18:32:21,923 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:21,923 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:21,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:21,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:21,923 INFO L87 Difference]: Start difference. First operand 172880 states and 708759 transitions. Second operand 3 states. [2019-12-07 18:32:22,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:22,031 INFO L93 Difference]: Finished difference Result 34553 states and 111512 transitions. [2019-12-07 18:32:22,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:22,031 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:32:22,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:22,080 INFO L225 Difference]: With dead ends: 34553 [2019-12-07 18:32:22,081 INFO L226 Difference]: Without dead ends: 34553 [2019-12-07 18:32:22,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:22,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34553 states. [2019-12-07 18:32:22,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34553 to 34473. [2019-12-07 18:32:22,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34473 states. [2019-12-07 18:32:22,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34473 states to 34473 states and 111272 transitions. [2019-12-07 18:32:22,641 INFO L78 Accepts]: Start accepts. Automaton has 34473 states and 111272 transitions. Word has length 18 [2019-12-07 18:32:22,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:22,641 INFO L462 AbstractCegarLoop]: Abstraction has 34473 states and 111272 transitions. [2019-12-07 18:32:22,641 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:22,641 INFO L276 IsEmpty]: Start isEmpty. Operand 34473 states and 111272 transitions. [2019-12-07 18:32:22,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:32:22,646 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:22,646 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:22,646 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:22,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:22,647 INFO L82 PathProgramCache]: Analyzing trace with hash 361242897, now seen corresponding path program 1 times [2019-12-07 18:32:22,647 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:22,647 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [555724130] [2019-12-07 18:32:22,647 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:22,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:22,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:22,696 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [555724130] [2019-12-07 18:32:22,696 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:22,697 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:32:22,697 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [77192905] [2019-12-07 18:32:22,697 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:32:22,697 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:22,697 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:32:22,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:22,698 INFO L87 Difference]: Start difference. First operand 34473 states and 111272 transitions. Second operand 5 states. [2019-12-07 18:32:23,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:23,096 INFO L93 Difference]: Finished difference Result 44779 states and 142105 transitions. [2019-12-07 18:32:23,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:32:23,096 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:32:23,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:23,154 INFO L225 Difference]: With dead ends: 44779 [2019-12-07 18:32:23,154 INFO L226 Difference]: Without dead ends: 44772 [2019-12-07 18:32:23,154 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:32:23,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44772 states. [2019-12-07 18:32:24,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44772 to 34062. [2019-12-07 18:32:24,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34062 states. [2019-12-07 18:32:24,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34062 states to 34062 states and 109831 transitions. [2019-12-07 18:32:24,111 INFO L78 Accepts]: Start accepts. Automaton has 34062 states and 109831 transitions. Word has length 22 [2019-12-07 18:32:24,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:24,111 INFO L462 AbstractCegarLoop]: Abstraction has 34062 states and 109831 transitions. [2019-12-07 18:32:24,111 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:32:24,111 INFO L276 IsEmpty]: Start isEmpty. Operand 34062 states and 109831 transitions. [2019-12-07 18:32:24,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:32:24,118 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:24,118 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:24,119 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:24,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:24,119 INFO L82 PathProgramCache]: Analyzing trace with hash -2019660134, now seen corresponding path program 1 times [2019-12-07 18:32:24,119 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:24,119 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662327407] [2019-12-07 18:32:24,119 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:24,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:24,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:24,171 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [662327407] [2019-12-07 18:32:24,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:24,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:32:24,171 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899476004] [2019-12-07 18:32:24,172 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:32:24,172 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:24,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:32:24,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:24,172 INFO L87 Difference]: Start difference. First operand 34062 states and 109831 transitions. Second operand 5 states. [2019-12-07 18:32:24,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:24,542 INFO L93 Difference]: Finished difference Result 48290 states and 152456 transitions. [2019-12-07 18:32:24,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:32:24,542 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:32:24,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:24,606 INFO L225 Difference]: With dead ends: 48290 [2019-12-07 18:32:24,606 INFO L226 Difference]: Without dead ends: 48277 [2019-12-07 18:32:24,606 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:32:24,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48277 states. [2019-12-07 18:32:25,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48277 to 39783. [2019-12-07 18:32:25,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39783 states. [2019-12-07 18:32:25,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39783 states to 39783 states and 127731 transitions. [2019-12-07 18:32:25,319 INFO L78 Accepts]: Start accepts. Automaton has 39783 states and 127731 transitions. Word has length 25 [2019-12-07 18:32:25,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:25,319 INFO L462 AbstractCegarLoop]: Abstraction has 39783 states and 127731 transitions. [2019-12-07 18:32:25,319 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:32:25,319 INFO L276 IsEmpty]: Start isEmpty. Operand 39783 states and 127731 transitions. [2019-12-07 18:32:25,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:32:25,330 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:25,330 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:25,330 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:25,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:25,330 INFO L82 PathProgramCache]: Analyzing trace with hash -1429942457, now seen corresponding path program 1 times [2019-12-07 18:32:25,330 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:25,330 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378926110] [2019-12-07 18:32:25,331 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:25,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:25,359 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:25,360 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [378926110] [2019-12-07 18:32:25,360 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:25,360 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:32:25,360 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [185692453] [2019-12-07 18:32:25,361 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:25,361 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:25,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:25,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:25,361 INFO L87 Difference]: Start difference. First operand 39783 states and 127731 transitions. Second operand 3 states. [2019-12-07 18:32:25,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:25,530 INFO L93 Difference]: Finished difference Result 56828 states and 180787 transitions. [2019-12-07 18:32:25,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:25,530 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 18:32:25,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:25,613 INFO L225 Difference]: With dead ends: 56828 [2019-12-07 18:32:25,614 INFO L226 Difference]: Without dead ends: 56828 [2019-12-07 18:32:25,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:25,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56828 states. [2019-12-07 18:32:26,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56828 to 42213. [2019-12-07 18:32:26,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42213 states. [2019-12-07 18:32:26,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42213 states to 42213 states and 135001 transitions. [2019-12-07 18:32:26,408 INFO L78 Accepts]: Start accepts. Automaton has 42213 states and 135001 transitions. Word has length 27 [2019-12-07 18:32:26,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:26,408 INFO L462 AbstractCegarLoop]: Abstraction has 42213 states and 135001 transitions. [2019-12-07 18:32:26,409 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:26,409 INFO L276 IsEmpty]: Start isEmpty. Operand 42213 states and 135001 transitions. [2019-12-07 18:32:26,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:32:26,419 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:26,419 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:26,420 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:26,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:26,420 INFO L82 PathProgramCache]: Analyzing trace with hash -535275942, now seen corresponding path program 1 times [2019-12-07 18:32:26,420 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:26,420 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1444151836] [2019-12-07 18:32:26,420 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:26,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:26,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:26,447 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1444151836] [2019-12-07 18:32:26,447 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:26,448 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:32:26,448 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2114734827] [2019-12-07 18:32:26,448 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:26,448 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:26,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:26,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:26,449 INFO L87 Difference]: Start difference. First operand 42213 states and 135001 transitions. Second operand 3 states. [2019-12-07 18:32:26,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:26,643 INFO L93 Difference]: Finished difference Result 62192 states and 195378 transitions. [2019-12-07 18:32:26,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:26,643 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 18:32:26,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:26,738 INFO L225 Difference]: With dead ends: 62192 [2019-12-07 18:32:26,738 INFO L226 Difference]: Without dead ends: 62192 [2019-12-07 18:32:26,738 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:26,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62192 states. [2019-12-07 18:32:27,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62192 to 47577. [2019-12-07 18:32:27,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47577 states. [2019-12-07 18:32:27,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47577 states to 47577 states and 149592 transitions. [2019-12-07 18:32:27,599 INFO L78 Accepts]: Start accepts. Automaton has 47577 states and 149592 transitions. Word has length 27 [2019-12-07 18:32:27,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:27,600 INFO L462 AbstractCegarLoop]: Abstraction has 47577 states and 149592 transitions. [2019-12-07 18:32:27,600 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:27,600 INFO L276 IsEmpty]: Start isEmpty. Operand 47577 states and 149592 transitions. [2019-12-07 18:32:27,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:32:27,612 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:27,612 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:27,612 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:27,613 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:27,613 INFO L82 PathProgramCache]: Analyzing trace with hash 1457952739, now seen corresponding path program 1 times [2019-12-07 18:32:27,613 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:27,613 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809610160] [2019-12-07 18:32:27,613 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:27,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:27,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:27,660 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809610160] [2019-12-07 18:32:27,660 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:27,660 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:32:27,660 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055284866] [2019-12-07 18:32:27,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:32:27,660 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:27,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:32:27,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:32:27,661 INFO L87 Difference]: Start difference. First operand 47577 states and 149592 transitions. Second operand 6 states. [2019-12-07 18:32:28,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:28,512 INFO L93 Difference]: Finished difference Result 89520 states and 280849 transitions. [2019-12-07 18:32:28,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:32:28,513 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:32:28,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:28,638 INFO L225 Difference]: With dead ends: 89520 [2019-12-07 18:32:28,638 INFO L226 Difference]: Without dead ends: 89501 [2019-12-07 18:32:28,638 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:32:28,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89501 states. [2019-12-07 18:32:29,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89501 to 51874. [2019-12-07 18:32:29,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51874 states. [2019-12-07 18:32:29,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51874 states to 51874 states and 162887 transitions. [2019-12-07 18:32:29,764 INFO L78 Accepts]: Start accepts. Automaton has 51874 states and 162887 transitions. Word has length 27 [2019-12-07 18:32:29,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:29,764 INFO L462 AbstractCegarLoop]: Abstraction has 51874 states and 162887 transitions. [2019-12-07 18:32:29,764 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:32:29,764 INFO L276 IsEmpty]: Start isEmpty. Operand 51874 states and 162887 transitions. [2019-12-07 18:32:29,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:32:29,779 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:29,780 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:29,780 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:29,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:29,780 INFO L82 PathProgramCache]: Analyzing trace with hash -665356316, now seen corresponding path program 1 times [2019-12-07 18:32:29,780 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:29,781 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1080426837] [2019-12-07 18:32:29,781 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:29,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:29,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:29,815 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1080426837] [2019-12-07 18:32:29,815 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:29,815 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:32:29,815 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1480917983] [2019-12-07 18:32:29,816 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:29,816 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:29,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:29,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:29,816 INFO L87 Difference]: Start difference. First operand 51874 states and 162887 transitions. Second operand 3 states. [2019-12-07 18:32:29,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:29,962 INFO L93 Difference]: Finished difference Result 51874 states and 161406 transitions. [2019-12-07 18:32:29,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:29,963 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-12-07 18:32:29,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:30,036 INFO L225 Difference]: With dead ends: 51874 [2019-12-07 18:32:30,036 INFO L226 Difference]: Without dead ends: 51874 [2019-12-07 18:32:30,036 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:30,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51874 states. [2019-12-07 18:32:30,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51874 to 48204. [2019-12-07 18:32:30,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48204 states. [2019-12-07 18:32:30,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48204 states to 48204 states and 150328 transitions. [2019-12-07 18:32:30,802 INFO L78 Accepts]: Start accepts. Automaton has 48204 states and 150328 transitions. Word has length 28 [2019-12-07 18:32:30,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:30,802 INFO L462 AbstractCegarLoop]: Abstraction has 48204 states and 150328 transitions. [2019-12-07 18:32:30,802 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:30,802 INFO L276 IsEmpty]: Start isEmpty. Operand 48204 states and 150328 transitions. [2019-12-07 18:32:30,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:32:30,816 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:30,816 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:30,816 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:30,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:30,816 INFO L82 PathProgramCache]: Analyzing trace with hash 294567066, now seen corresponding path program 1 times [2019-12-07 18:32:30,816 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:30,816 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220653384] [2019-12-07 18:32:30,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:30,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:30,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:30,872 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220653384] [2019-12-07 18:32:30,872 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:30,872 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:32:30,872 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094169625] [2019-12-07 18:32:30,873 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:32:30,873 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:30,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:32:30,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:32:30,873 INFO L87 Difference]: Start difference. First operand 48204 states and 150328 transitions. Second operand 6 states. [2019-12-07 18:32:31,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:31,682 INFO L93 Difference]: Finished difference Result 80185 states and 248466 transitions. [2019-12-07 18:32:31,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:32:31,683 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 18:32:31,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:31,786 INFO L225 Difference]: With dead ends: 80185 [2019-12-07 18:32:31,786 INFO L226 Difference]: Without dead ends: 80163 [2019-12-07 18:32:31,787 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:32:32,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80163 states. [2019-12-07 18:32:32,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80163 to 47866. [2019-12-07 18:32:32,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47866 states. [2019-12-07 18:32:32,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47866 states to 47866 states and 149201 transitions. [2019-12-07 18:32:32,764 INFO L78 Accepts]: Start accepts. Automaton has 47866 states and 149201 transitions. Word has length 28 [2019-12-07 18:32:32,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:32,764 INFO L462 AbstractCegarLoop]: Abstraction has 47866 states and 149201 transitions. [2019-12-07 18:32:32,764 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:32:32,764 INFO L276 IsEmpty]: Start isEmpty. Operand 47866 states and 149201 transitions. [2019-12-07 18:32:32,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:32:32,776 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:32,776 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:32,777 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:32,777 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:32,777 INFO L82 PathProgramCache]: Analyzing trace with hash 1921906081, now seen corresponding path program 1 times [2019-12-07 18:32:32,777 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:32,777 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359944905] [2019-12-07 18:32:32,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:32,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:32,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:32,815 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359944905] [2019-12-07 18:32:32,816 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:32,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:32:32,816 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1596787808] [2019-12-07 18:32:32,816 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:32:32,816 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:32,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:32:32,817 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:32:32,817 INFO L87 Difference]: Start difference. First operand 47866 states and 149201 transitions. Second operand 4 states. [2019-12-07 18:32:32,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:32,873 INFO L93 Difference]: Finished difference Result 18096 states and 53924 transitions. [2019-12-07 18:32:32,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:32:32,873 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 18:32:32,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:32,892 INFO L225 Difference]: With dead ends: 18096 [2019-12-07 18:32:32,892 INFO L226 Difference]: Without dead ends: 18096 [2019-12-07 18:32:32,892 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:32:32,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18096 states. [2019-12-07 18:32:33,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18096 to 17074. [2019-12-07 18:32:33,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17074 states. [2019-12-07 18:32:33,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17074 states to 17074 states and 50906 transitions. [2019-12-07 18:32:33,130 INFO L78 Accepts]: Start accepts. Automaton has 17074 states and 50906 transitions. Word has length 29 [2019-12-07 18:32:33,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:33,130 INFO L462 AbstractCegarLoop]: Abstraction has 17074 states and 50906 transitions. [2019-12-07 18:32:33,130 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:32:33,130 INFO L276 IsEmpty]: Start isEmpty. Operand 17074 states and 50906 transitions. [2019-12-07 18:32:33,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:32:33,141 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:33,141 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:33,142 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:33,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:33,142 INFO L82 PathProgramCache]: Analyzing trace with hash 1705939963, now seen corresponding path program 1 times [2019-12-07 18:32:33,142 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:33,142 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763208199] [2019-12-07 18:32:33,142 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:33,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:33,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:33,201 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1763208199] [2019-12-07 18:32:33,201 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:33,201 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:32:33,202 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259225545] [2019-12-07 18:32:33,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:32:33,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:33,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:32:33,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:32:33,203 INFO L87 Difference]: Start difference. First operand 17074 states and 50906 transitions. Second operand 7 states. [2019-12-07 18:32:33,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:33,938 INFO L93 Difference]: Finished difference Result 33514 states and 98654 transitions. [2019-12-07 18:32:33,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:32:33,939 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:32:33,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:33,975 INFO L225 Difference]: With dead ends: 33514 [2019-12-07 18:32:33,975 INFO L226 Difference]: Without dead ends: 33514 [2019-12-07 18:32:33,976 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:32:34,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33514 states. [2019-12-07 18:32:34,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33514 to 17423. [2019-12-07 18:32:34,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17423 states. [2019-12-07 18:32:34,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17423 states to 17423 states and 51988 transitions. [2019-12-07 18:32:34,324 INFO L78 Accepts]: Start accepts. Automaton has 17423 states and 51988 transitions. Word has length 33 [2019-12-07 18:32:34,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:34,324 INFO L462 AbstractCegarLoop]: Abstraction has 17423 states and 51988 transitions. [2019-12-07 18:32:34,325 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:32:34,325 INFO L276 IsEmpty]: Start isEmpty. Operand 17423 states and 51988 transitions. [2019-12-07 18:32:34,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:32:34,336 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:34,337 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:34,337 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:34,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:34,337 INFO L82 PathProgramCache]: Analyzing trace with hash 1567643153, now seen corresponding path program 2 times [2019-12-07 18:32:34,337 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:34,337 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1443638721] [2019-12-07 18:32:34,337 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:34,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:34,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:34,392 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1443638721] [2019-12-07 18:32:34,392 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:34,392 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:32:34,393 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [586592698] [2019-12-07 18:32:34,393 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:32:34,393 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:34,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:32:34,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:32:34,393 INFO L87 Difference]: Start difference. First operand 17423 states and 51988 transitions. Second operand 8 states. [2019-12-07 18:32:35,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:35,351 INFO L93 Difference]: Finished difference Result 40747 states and 118586 transitions. [2019-12-07 18:32:35,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 18:32:35,351 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 18:32:35,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:35,396 INFO L225 Difference]: With dead ends: 40747 [2019-12-07 18:32:35,396 INFO L226 Difference]: Without dead ends: 40747 [2019-12-07 18:32:35,396 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 18:32:35,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40747 states. [2019-12-07 18:32:36,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40747 to 17298. [2019-12-07 18:32:36,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17298 states. [2019-12-07 18:32:36,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17298 states to 17298 states and 51603 transitions. [2019-12-07 18:32:36,030 INFO L78 Accepts]: Start accepts. Automaton has 17298 states and 51603 transitions. Word has length 33 [2019-12-07 18:32:36,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:36,030 INFO L462 AbstractCegarLoop]: Abstraction has 17298 states and 51603 transitions. [2019-12-07 18:32:36,030 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:32:36,031 INFO L276 IsEmpty]: Start isEmpty. Operand 17298 states and 51603 transitions. [2019-12-07 18:32:36,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:32:36,043 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:36,043 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:36,043 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:36,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:36,044 INFO L82 PathProgramCache]: Analyzing trace with hash -607763582, now seen corresponding path program 1 times [2019-12-07 18:32:36,044 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:36,044 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57968625] [2019-12-07 18:32:36,044 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:36,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:36,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:36,103 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [57968625] [2019-12-07 18:32:36,103 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:36,103 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:32:36,103 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1030690813] [2019-12-07 18:32:36,104 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:32:36,104 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:36,104 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:32:36,104 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:32:36,104 INFO L87 Difference]: Start difference. First operand 17298 states and 51603 transitions. Second operand 7 states. [2019-12-07 18:32:36,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:36,875 INFO L93 Difference]: Finished difference Result 30926 states and 90668 transitions. [2019-12-07 18:32:36,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:32:36,876 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 18:32:36,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:36,910 INFO L225 Difference]: With dead ends: 30926 [2019-12-07 18:32:36,910 INFO L226 Difference]: Without dead ends: 30926 [2019-12-07 18:32:36,911 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:32:37,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30926 states. [2019-12-07 18:32:37,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30926 to 17051. [2019-12-07 18:32:37,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17051 states. [2019-12-07 18:32:37,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17051 states to 17051 states and 50867 transitions. [2019-12-07 18:32:37,238 INFO L78 Accepts]: Start accepts. Automaton has 17051 states and 50867 transitions. Word has length 34 [2019-12-07 18:32:37,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:37,238 INFO L462 AbstractCegarLoop]: Abstraction has 17051 states and 50867 transitions. [2019-12-07 18:32:37,238 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:32:37,238 INFO L276 IsEmpty]: Start isEmpty. Operand 17051 states and 50867 transitions. [2019-12-07 18:32:37,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:32:37,254 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:37,254 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:37,254 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:37,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:37,254 INFO L82 PathProgramCache]: Analyzing trace with hash 846412022, now seen corresponding path program 2 times [2019-12-07 18:32:37,254 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:37,254 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [566507300] [2019-12-07 18:32:37,255 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:37,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:37,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:37,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [566507300] [2019-12-07 18:32:37,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:37,318 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:32:37,318 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1684878477] [2019-12-07 18:32:37,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:32:37,318 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:37,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:32:37,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:32:37,319 INFO L87 Difference]: Start difference. First operand 17051 states and 50867 transitions. Second operand 7 states. [2019-12-07 18:32:38,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:38,047 INFO L93 Difference]: Finished difference Result 39351 states and 114139 transitions. [2019-12-07 18:32:38,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 18:32:38,047 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 18:32:38,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:38,090 INFO L225 Difference]: With dead ends: 39351 [2019-12-07 18:32:38,090 INFO L226 Difference]: Without dead ends: 39351 [2019-12-07 18:32:38,090 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:32:38,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39351 states. [2019-12-07 18:32:38,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39351 to 16932. [2019-12-07 18:32:38,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16932 states. [2019-12-07 18:32:38,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16932 states to 16932 states and 50506 transitions. [2019-12-07 18:32:38,475 INFO L78 Accepts]: Start accepts. Automaton has 16932 states and 50506 transitions. Word has length 34 [2019-12-07 18:32:38,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:38,475 INFO L462 AbstractCegarLoop]: Abstraction has 16932 states and 50506 transitions. [2019-12-07 18:32:38,475 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:32:38,475 INFO L276 IsEmpty]: Start isEmpty. Operand 16932 states and 50506 transitions. [2019-12-07 18:32:38,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:32:38,487 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:38,487 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:38,487 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:38,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:38,488 INFO L82 PathProgramCache]: Analyzing trace with hash -211414604, now seen corresponding path program 3 times [2019-12-07 18:32:38,488 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:38,488 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [688340259] [2019-12-07 18:32:38,488 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:38,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:38,546 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:38,546 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [688340259] [2019-12-07 18:32:38,546 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:38,546 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:32:38,547 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [801210831] [2019-12-07 18:32:38,547 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:32:38,547 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:38,547 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:32:38,547 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:32:38,547 INFO L87 Difference]: Start difference. First operand 16932 states and 50506 transitions. Second operand 8 states. [2019-12-07 18:32:39,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:39,433 INFO L93 Difference]: Finished difference Result 35716 states and 103443 transitions. [2019-12-07 18:32:39,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 18:32:39,433 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 18:32:39,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:39,471 INFO L225 Difference]: With dead ends: 35716 [2019-12-07 18:32:39,472 INFO L226 Difference]: Without dead ends: 35716 [2019-12-07 18:32:39,472 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 18:32:39,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35716 states. [2019-12-07 18:32:39,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35716 to 16581. [2019-12-07 18:32:39,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16581 states. [2019-12-07 18:32:39,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16581 states to 16581 states and 49469 transitions. [2019-12-07 18:32:39,880 INFO L78 Accepts]: Start accepts. Automaton has 16581 states and 49469 transitions. Word has length 34 [2019-12-07 18:32:39,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:39,880 INFO L462 AbstractCegarLoop]: Abstraction has 16581 states and 49469 transitions. [2019-12-07 18:32:39,880 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:32:39,880 INFO L276 IsEmpty]: Start isEmpty. Operand 16581 states and 49469 transitions. [2019-12-07 18:32:39,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:32:39,892 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:39,892 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:39,892 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:39,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:39,893 INFO L82 PathProgramCache]: Analyzing trace with hash 1177680358, now seen corresponding path program 1 times [2019-12-07 18:32:39,893 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:39,893 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2018226417] [2019-12-07 18:32:39,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:39,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:39,928 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:39,928 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2018226417] [2019-12-07 18:32:39,928 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:39,928 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:32:39,928 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1415495942] [2019-12-07 18:32:39,929 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:32:39,929 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:39,929 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:32:39,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:39,929 INFO L87 Difference]: Start difference. First operand 16581 states and 49469 transitions. Second operand 5 states. [2019-12-07 18:32:39,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:39,981 INFO L93 Difference]: Finished difference Result 15128 states and 46343 transitions. [2019-12-07 18:32:39,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:32:39,981 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 18:32:39,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:39,997 INFO L225 Difference]: With dead ends: 15128 [2019-12-07 18:32:39,997 INFO L226 Difference]: Without dead ends: 15128 [2019-12-07 18:32:39,997 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:40,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15128 states. [2019-12-07 18:32:40,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15128 to 13649. [2019-12-07 18:32:40,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13649 states. [2019-12-07 18:32:40,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13649 states to 13649 states and 42069 transitions. [2019-12-07 18:32:40,202 INFO L78 Accepts]: Start accepts. Automaton has 13649 states and 42069 transitions. Word has length 40 [2019-12-07 18:32:40,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:40,202 INFO L462 AbstractCegarLoop]: Abstraction has 13649 states and 42069 transitions. [2019-12-07 18:32:40,202 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:32:40,202 INFO L276 IsEmpty]: Start isEmpty. Operand 13649 states and 42069 transitions. [2019-12-07 18:32:40,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:32:40,215 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:40,215 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:40,215 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:40,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:40,215 INFO L82 PathProgramCache]: Analyzing trace with hash 1926849378, now seen corresponding path program 1 times [2019-12-07 18:32:40,215 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:40,215 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1897311730] [2019-12-07 18:32:40,215 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:40,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:40,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:40,259 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1897311730] [2019-12-07 18:32:40,259 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:40,259 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:32:40,259 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102079941] [2019-12-07 18:32:40,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:40,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:40,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:40,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:40,260 INFO L87 Difference]: Start difference. First operand 13649 states and 42069 transitions. Second operand 3 states. [2019-12-07 18:32:40,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:40,339 INFO L93 Difference]: Finished difference Result 16510 states and 50908 transitions. [2019-12-07 18:32:40,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:40,339 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:32:40,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:40,358 INFO L225 Difference]: With dead ends: 16510 [2019-12-07 18:32:40,358 INFO L226 Difference]: Without dead ends: 16510 [2019-12-07 18:32:40,358 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:40,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16510 states. [2019-12-07 18:32:40,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16510 to 13552. [2019-12-07 18:32:40,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13552 states. [2019-12-07 18:32:40,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13552 states to 13552 states and 42056 transitions. [2019-12-07 18:32:40,568 INFO L78 Accepts]: Start accepts. Automaton has 13552 states and 42056 transitions. Word has length 65 [2019-12-07 18:32:40,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:40,569 INFO L462 AbstractCegarLoop]: Abstraction has 13552 states and 42056 transitions. [2019-12-07 18:32:40,569 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:40,569 INFO L276 IsEmpty]: Start isEmpty. Operand 13552 states and 42056 transitions. [2019-12-07 18:32:40,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:32:40,580 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:40,580 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:40,580 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:40,580 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:40,580 INFO L82 PathProgramCache]: Analyzing trace with hash 1205438449, now seen corresponding path program 1 times [2019-12-07 18:32:40,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:40,581 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753687897] [2019-12-07 18:32:40,581 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:40,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:40,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:40,615 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1753687897] [2019-12-07 18:32:40,615 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:40,615 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:32:40,615 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1209235536] [2019-12-07 18:32:40,615 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:40,616 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:40,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:40,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:40,616 INFO L87 Difference]: Start difference. First operand 13552 states and 42056 transitions. Second operand 3 states. [2019-12-07 18:32:40,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:40,742 INFO L93 Difference]: Finished difference Result 18996 states and 59257 transitions. [2019-12-07 18:32:40,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:40,743 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:32:40,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:40,764 INFO L225 Difference]: With dead ends: 18996 [2019-12-07 18:32:40,764 INFO L226 Difference]: Without dead ends: 18996 [2019-12-07 18:32:40,764 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:40,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18996 states. [2019-12-07 18:32:40,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18996 to 13864. [2019-12-07 18:32:40,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13864 states. [2019-12-07 18:32:40,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13864 states to 13864 states and 43146 transitions. [2019-12-07 18:32:40,994 INFO L78 Accepts]: Start accepts. Automaton has 13864 states and 43146 transitions. Word has length 66 [2019-12-07 18:32:40,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:40,995 INFO L462 AbstractCegarLoop]: Abstraction has 13864 states and 43146 transitions. [2019-12-07 18:32:40,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:40,995 INFO L276 IsEmpty]: Start isEmpty. Operand 13864 states and 43146 transitions. [2019-12-07 18:32:41,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:32:41,007 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:41,008 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:41,008 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:41,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:41,008 INFO L82 PathProgramCache]: Analyzing trace with hash 5851999, now seen corresponding path program 1 times [2019-12-07 18:32:41,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:41,008 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000327938] [2019-12-07 18:32:41,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:41,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:41,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:41,049 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000327938] [2019-12-07 18:32:41,050 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:41,050 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:32:41,050 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264616013] [2019-12-07 18:32:41,050 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:32:41,050 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:41,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:32:41,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:32:41,050 INFO L87 Difference]: Start difference. First operand 13864 states and 43146 transitions. Second operand 4 states. [2019-12-07 18:32:41,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:41,118 INFO L93 Difference]: Finished difference Result 13692 states and 42463 transitions. [2019-12-07 18:32:41,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:32:41,118 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 18:32:41,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:41,133 INFO L225 Difference]: With dead ends: 13692 [2019-12-07 18:32:41,133 INFO L226 Difference]: Without dead ends: 13692 [2019-12-07 18:32:41,133 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:41,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13692 states. [2019-12-07 18:32:41,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13692 to 12357. [2019-12-07 18:32:41,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12357 states. [2019-12-07 18:32:41,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12357 states to 12357 states and 38098 transitions. [2019-12-07 18:32:41,319 INFO L78 Accepts]: Start accepts. Automaton has 12357 states and 38098 transitions. Word has length 66 [2019-12-07 18:32:41,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:41,319 INFO L462 AbstractCegarLoop]: Abstraction has 12357 states and 38098 transitions. [2019-12-07 18:32:41,319 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:32:41,319 INFO L276 IsEmpty]: Start isEmpty. Operand 12357 states and 38098 transitions. [2019-12-07 18:32:41,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:32:41,330 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:41,330 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:41,331 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:41,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:41,331 INFO L82 PathProgramCache]: Analyzing trace with hash -1104317856, now seen corresponding path program 1 times [2019-12-07 18:32:41,331 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:41,331 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1298886672] [2019-12-07 18:32:41,331 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:41,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:41,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:41,411 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1298886672] [2019-12-07 18:32:41,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:41,412 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:32:41,412 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1512662219] [2019-12-07 18:32:41,412 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:32:41,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:41,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:32:41,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:32:41,413 INFO L87 Difference]: Start difference. First operand 12357 states and 38098 transitions. Second operand 9 states. [2019-12-07 18:32:42,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:42,112 INFO L93 Difference]: Finished difference Result 65147 states and 197465 transitions. [2019-12-07 18:32:42,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 18:32:42,112 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 18:32:42,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:42,184 INFO L225 Difference]: With dead ends: 65147 [2019-12-07 18:32:42,184 INFO L226 Difference]: Without dead ends: 60681 [2019-12-07 18:32:42,184 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=151, Invalid=499, Unknown=0, NotChecked=0, Total=650 [2019-12-07 18:32:42,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60681 states. [2019-12-07 18:32:42,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60681 to 13577. [2019-12-07 18:32:42,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13577 states. [2019-12-07 18:32:42,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13577 states to 13577 states and 42202 transitions. [2019-12-07 18:32:42,688 INFO L78 Accepts]: Start accepts. Automaton has 13577 states and 42202 transitions. Word has length 66 [2019-12-07 18:32:42,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:42,689 INFO L462 AbstractCegarLoop]: Abstraction has 13577 states and 42202 transitions. [2019-12-07 18:32:42,689 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:32:42,689 INFO L276 IsEmpty]: Start isEmpty. Operand 13577 states and 42202 transitions. [2019-12-07 18:32:42,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:32:42,702 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:42,702 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:42,702 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:42,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:42,703 INFO L82 PathProgramCache]: Analyzing trace with hash -1923722596, now seen corresponding path program 2 times [2019-12-07 18:32:42,703 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:42,703 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1036102274] [2019-12-07 18:32:42,703 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:42,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:42,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:42,752 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1036102274] [2019-12-07 18:32:42,752 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:42,752 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:32:42,752 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [118835476] [2019-12-07 18:32:42,753 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:42,753 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:42,753 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:42,753 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:42,753 INFO L87 Difference]: Start difference. First operand 13577 states and 42202 transitions. Second operand 3 states. [2019-12-07 18:32:42,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:42,795 INFO L93 Difference]: Finished difference Result 13577 states and 41461 transitions. [2019-12-07 18:32:42,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:42,795 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:32:42,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:42,810 INFO L225 Difference]: With dead ends: 13577 [2019-12-07 18:32:42,810 INFO L226 Difference]: Without dead ends: 13577 [2019-12-07 18:32:42,810 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:42,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13577 states. [2019-12-07 18:32:42,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13577 to 13107. [2019-12-07 18:32:42,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13107 states. [2019-12-07 18:32:43,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13107 states to 13107 states and 40115 transitions. [2019-12-07 18:32:43,011 INFO L78 Accepts]: Start accepts. Automaton has 13107 states and 40115 transitions. Word has length 66 [2019-12-07 18:32:43,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:43,011 INFO L462 AbstractCegarLoop]: Abstraction has 13107 states and 40115 transitions. [2019-12-07 18:32:43,011 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:43,011 INFO L276 IsEmpty]: Start isEmpty. Operand 13107 states and 40115 transitions. [2019-12-07 18:32:43,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:32:43,022 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:43,022 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:43,022 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:43,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:43,022 INFO L82 PathProgramCache]: Analyzing trace with hash 579351643, now seen corresponding path program 1 times [2019-12-07 18:32:43,023 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:43,023 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [572292813] [2019-12-07 18:32:43,023 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:43,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:43,118 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:43,118 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [572292813] [2019-12-07 18:32:43,118 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:43,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:32:43,119 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122430575] [2019-12-07 18:32:43,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:32:43,119 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:43,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:32:43,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:32:43,120 INFO L87 Difference]: Start difference. First operand 13107 states and 40115 transitions. Second operand 9 states. [2019-12-07 18:32:44,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:44,681 INFO L93 Difference]: Finished difference Result 109477 states and 326783 transitions. [2019-12-07 18:32:44,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 18:32:44,682 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 18:32:44,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:44,766 INFO L225 Difference]: With dead ends: 109477 [2019-12-07 18:32:44,766 INFO L226 Difference]: Without dead ends: 70841 [2019-12-07 18:32:44,767 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 637 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=421, Invalid=1559, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 18:32:44,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70841 states. [2019-12-07 18:32:45,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70841 to 14740. [2019-12-07 18:32:45,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14740 states. [2019-12-07 18:32:45,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14740 states to 14740 states and 45009 transitions. [2019-12-07 18:32:45,346 INFO L78 Accepts]: Start accepts. Automaton has 14740 states and 45009 transitions. Word has length 67 [2019-12-07 18:32:45,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:45,346 INFO L462 AbstractCegarLoop]: Abstraction has 14740 states and 45009 transitions. [2019-12-07 18:32:45,346 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:32:45,346 INFO L276 IsEmpty]: Start isEmpty. Operand 14740 states and 45009 transitions. [2019-12-07 18:32:45,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:32:45,360 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:45,360 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:45,360 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:45,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:45,361 INFO L82 PathProgramCache]: Analyzing trace with hash 1790496915, now seen corresponding path program 2 times [2019-12-07 18:32:45,361 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:45,361 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [173099098] [2019-12-07 18:32:45,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:45,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:32:45,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:32:45,454 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:32:45,454 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:32:45,457 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_93| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= 0 |v_ULTIMATE.start_main_~#t1105~0.offset_34|) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$r_buff1_thd3~0_279 0) (= v_~a$flush_delayed~0_36 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$mem_tmp~0_25 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1105~0.base_55|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1105~0.base_55| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1105~0.base_55|) |v_ULTIMATE.start_main_~#t1105~0.offset_34| 0)) |v_#memory_int_21|) (= v_~a$r_buff0_thd3~0_364 0) (= v_~__unbuffered_p2_EBX~0_67 0) (= v_~y~0_75 0) (= v_~a~0_169 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard1~0_56 0) (= 0 v_~a$w_buff1~0_224) (= |v_#valid_91| (store .cse0 |v_ULTIMATE.start_main_~#t1105~0.base_55| 1)) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 v_~weak$$choice0~0_21) (= 0 |v_#NULL.base_4|) (= 0 v_~a$w_buff1_used~0_506) (= 0 v_~__unbuffered_p2_EAX~0_61) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1105~0.base_55| 4) |v_#length_25|) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= 0 v_~__unbuffered_p0_EAX~0_116) (= v_~z~0_20 0) (= v_~a$read_delayed_var~0.offset_8 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1105~0.base_55|) 0) (= v_~x~0_91 0) (= v_~weak$$choice2~0_114 0) (= v_~a$r_buff1_thd0~0_166 0) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_93|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t1107~0.offset=|v_ULTIMATE.start_main_~#t1107~0.offset_20|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_169, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_105|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_116, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_61, ULTIMATE.start_main_~#t1106~0.base=|v_ULTIMATE.start_main_~#t1106~0.base_41|, ULTIMATE.start_main_~#t1105~0.base=|v_ULTIMATE.start_main_~#t1105~0.base_55|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_67, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_21, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ULTIMATE.start_main_~#t1105~0.offset=|v_ULTIMATE.start_main_~#t1105~0.offset_34|, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_166, ULTIMATE.start_main_~#t1106~0.offset=|v_ULTIMATE.start_main_~#t1106~0.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_91, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_56, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ULTIMATE.start_main_~#t1107~0.base=|v_ULTIMATE.start_main_~#t1107~0.base_28|, ~a$mem_tmp~0=v_~a$mem_tmp~0_25, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_75, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_36, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_37|, #valid=|v_#valid_91|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1107~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1106~0.base, ULTIMATE.start_main_~#t1105~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1105~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t1106~0.offset, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1107~0.base, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:32:45,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995)) (= ~__unbuffered_p0_EAX~0_Out-548638995 ~x~0_In-548638995) (= ~a$r_buff1_thd0~0_Out-548638995 ~a$r_buff0_thd0~0_In-548638995) (= ~a$r_buff0_thd1~0_In-548638995 ~a$r_buff1_thd1~0_Out-548638995) (= ~a$r_buff0_thd2~0_In-548638995 ~a$r_buff1_thd2~0_Out-548638995) (= ~a$r_buff1_thd3~0_Out-548638995 ~a$r_buff0_thd3~0_In-548638995) (= ~a$r_buff0_thd1~0_Out-548638995 1)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-548638995, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-548638995, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-548638995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-548638995, ~x~0=~x~0_In-548638995} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-548638995, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-548638995, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-548638995, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-548638995, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-548638995, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-548638995, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-548638995, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-548638995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-548638995, ~x~0=~x~0_In-548638995} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:32:45,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1106~0.base_9| 1)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1106~0.base_9| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t1106~0.base_9|)) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1106~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1106~0.base_9|) |v_ULTIMATE.start_main_~#t1106~0.offset_7| 1))) (= |v_ULTIMATE.start_main_~#t1106~0.offset_7| 0) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1106~0.base_9|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1106~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1106~0.offset=|v_ULTIMATE.start_main_~#t1106~0.offset_7|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1106~0.base=|v_ULTIMATE.start_main_~#t1106~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1106~0.offset, #length, ULTIMATE.start_main_~#t1106~0.base] because there is no mapped edge [2019-12-07 18:32:45,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= |v_ULTIMATE.start_main_~#t1107~0.offset_8| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1107~0.base_9|)) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1107~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1107~0.base_9|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1107~0.base_9| 4) |v_#length_13|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1107~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1107~0.base_9|) |v_ULTIMATE.start_main_~#t1107~0.offset_8| 2))) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1107~0.base_9| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1107~0.offset=|v_ULTIMATE.start_main_~#t1107~0.offset_8|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1107~0.base=|v_ULTIMATE.start_main_~#t1107~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1107~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1107~0.base] because there is no mapped edge [2019-12-07 18:32:45,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-905989814| |P1Thread1of1ForFork2_#t~ite10_Out-905989814|)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-905989814 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-905989814 256)))) (or (and .cse0 (or .cse1 .cse2) (= |P1Thread1of1ForFork2_#t~ite9_Out-905989814| ~a~0_In-905989814)) (and .cse0 (not .cse1) (= ~a$w_buff1~0_In-905989814 |P1Thread1of1ForFork2_#t~ite9_Out-905989814|) (not .cse2)))) InVars {~a~0=~a~0_In-905989814, ~a$w_buff1~0=~a$w_buff1~0_In-905989814, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-905989814, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-905989814} OutVars{~a~0=~a~0_In-905989814, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-905989814|, ~a$w_buff1~0=~a$w_buff1~0_In-905989814, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-905989814, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-905989814|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-905989814} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:32:45,461 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1287159371 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1287159371 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-1287159371| ~a$w_buff0_used~0_In-1287159371) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-1287159371| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1287159371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1287159371} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1287159371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1287159371, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1287159371|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:32:45,461 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In-2145004758 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-2145004758 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-2145004758 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-2145004758 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-2145004758| ~a$w_buff1_used~0_In-2145004758) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite12_Out-2145004758| 0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2145004758, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2145004758, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2145004758, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2145004758} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2145004758, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2145004758, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2145004758, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2145004758|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2145004758} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:32:45,461 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1960997991 256)))) (or (and (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-1960997991 256) 0))) (or (= (mod ~a$w_buff0_used~0_In-1960997991 256) 0) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1960997991 256))) (and (= (mod ~a$w_buff1_used~0_In-1960997991 256) 0) .cse0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite20_Out-1960997991| ~a$w_buff0~0_In-1960997991) (= |P2Thread1of1ForFork0_#t~ite21_Out-1960997991| |P2Thread1of1ForFork0_#t~ite20_Out-1960997991|)) (and (= |P2Thread1of1ForFork0_#t~ite20_In-1960997991| |P2Thread1of1ForFork0_#t~ite20_Out-1960997991|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite21_Out-1960997991| ~a$w_buff0~0_In-1960997991)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1960997991, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1960997991, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1960997991, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1960997991, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1960997991, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1960997991|, ~weak$$choice2~0=~weak$$choice2~0_In-1960997991} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1960997991|, ~a$w_buff0~0=~a$w_buff0~0_In-1960997991, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1960997991, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1960997991, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1960997991, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1960997991|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1960997991, ~weak$$choice2~0=~weak$$choice2~0_In-1960997991} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:32:45,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1307443379 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1307443379 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1307443379| 0)) (and (= ~a$r_buff0_thd2~0_In-1307443379 |P1Thread1of1ForFork2_#t~ite13_Out-1307443379|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1307443379, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1307443379} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1307443379, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1307443379, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1307443379|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:32:45,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In1303960835 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1303960835 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1303960835 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd2~0_In1303960835 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1303960835| ~a$r_buff1_thd2~0_In1303960835) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out1303960835| 0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1303960835, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1303960835, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1303960835, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1303960835} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1303960835, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1303960835, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1303960835, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1303960835, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1303960835|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:32:45,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:32:45,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1749654929 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite24_Out-1749654929| |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|) .cse0 (= ~a$w_buff1~0_In-1749654929 |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1749654929 256) 0))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-1749654929 256) 0)) (and (= 0 (mod ~a$w_buff1_used~0_In-1749654929 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-1749654929 256) 0)))) (and (= ~a$w_buff1~0_In-1749654929 |P2Thread1of1ForFork0_#t~ite24_Out-1749654929|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In-1749654929| |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-1749654929, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-1749654929|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1749654929, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1749654929, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1749654929, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1749654929, ~weak$$choice2~0=~weak$$choice2~0_In-1749654929} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-1749654929, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-1749654929|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-1749654929|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1749654929, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1749654929, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1749654929, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1749654929, ~weak$$choice2~0=~weak$$choice2~0_In-1749654929} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 18:32:45,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1679472426 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In-1679472426| |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|) (not .cse0) (= ~a$w_buff0_used~0_In-1679472426 |P2Thread1of1ForFork0_#t~ite27_Out-1679472426|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1679472426| |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1679472426 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-1679472426 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-1679472426 256)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-1679472426 256) 0)))) (= ~a$w_buff0_used~0_In-1679472426 |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1679472426|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1679472426, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1679472426, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1679472426, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1679472426, ~weak$$choice2~0=~weak$$choice2~0_In-1679472426} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1679472426|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1679472426|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1679472426, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1679472426, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1679472426, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1679472426, ~weak$$choice2~0=~weak$$choice2~0_In-1679472426} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:32:45,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:32:45,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:32:45,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1927994934 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1927994934 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1927994934| ~a$w_buff1~0_In-1927994934)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1927994934| ~a~0_In-1927994934) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In-1927994934, ~a$w_buff1~0=~a$w_buff1~0_In-1927994934, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1927994934, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1927994934} OutVars{~a~0=~a~0_In-1927994934, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1927994934|, ~a$w_buff1~0=~a$w_buff1~0_In-1927994934, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1927994934, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1927994934} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:32:45,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:32:45,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1240341953 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1240341953 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1240341953 |P2Thread1of1ForFork0_#t~ite40_Out1240341953|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1240341953|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1240341953, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1240341953} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1240341953|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1240341953, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1240341953} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:32:45,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In476677661 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In476677661 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In476677661 |P0Thread1of1ForFork1_#t~ite5_Out476677661|)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out476677661|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In476677661, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In476677661} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out476677661|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In476677661, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In476677661} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:32:45,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In152115573 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In152115573 256))) (.cse2 (= (mod ~a$r_buff0_thd1~0_In152115573 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In152115573 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out152115573| ~a$w_buff1_used~0_In152115573) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out152115573| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In152115573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In152115573, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In152115573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In152115573} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out152115573|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In152115573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In152115573, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In152115573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In152115573} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:32:45,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_Out-1934197455 ~a$r_buff0_thd1~0_In-1934197455)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1934197455 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1934197455 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (= ~a$r_buff0_thd1~0_Out-1934197455 0) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1934197455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1934197455} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1934197455|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1934197455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1934197455} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:32:45,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1875042691 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In1875042691 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1875042691 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1875042691 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1875042691| 0)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1875042691| ~a$r_buff1_thd1~0_In1875042691) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1875042691, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1875042691, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1875042691, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1875042691} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1875042691|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1875042691, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1875042691, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1875042691, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1875042691} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:32:45,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:32:45,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-1687069109 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1687069109 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1687069109 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1687069109 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1687069109| ~a$w_buff1_used~0_In-1687069109) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite41_Out-1687069109| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1687069109, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687069109, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1687069109, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1687069109} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1687069109, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687069109, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1687069109, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1687069109, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1687069109|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:32:45,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1405999605 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1405999605 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1405999605| ~a$r_buff0_thd3~0_In-1405999605) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1405999605|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1405999605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1405999605} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1405999605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1405999605, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1405999605|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:32:45,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In207228181 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In207228181 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd3~0_In207228181 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In207228181 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out207228181| ~a$r_buff1_thd3~0_In207228181) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out207228181| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In207228181, ~a$w_buff0_used~0=~a$w_buff0_used~0_In207228181, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In207228181, ~a$w_buff1_used~0=~a$w_buff1_used~0_In207228181} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out207228181|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In207228181, ~a$w_buff0_used~0=~a$w_buff0_used~0_In207228181, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In207228181, ~a$w_buff1_used~0=~a$w_buff1_used~0_In207228181} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:32:45,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:32:45,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:32:45,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In1008716173 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1008716173 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite47_Out1008716173| |ULTIMATE.start_main_#t~ite48_Out1008716173|))) (or (and .cse0 (not .cse1) (not .cse2) (= ~a$w_buff1~0_In1008716173 |ULTIMATE.start_main_#t~ite47_Out1008716173|)) (and (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1008716173| ~a~0_In1008716173) .cse0))) InVars {~a~0=~a~0_In1008716173, ~a$w_buff1~0=~a$w_buff1~0_In1008716173, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1008716173, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1008716173} OutVars{~a~0=~a~0_In1008716173, ~a$w_buff1~0=~a$w_buff1~0_In1008716173, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1008716173|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1008716173, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1008716173|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1008716173} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:32:45,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-2139516670 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-2139516670 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-2139516670|) (not .cse1)) (and (= ~a$w_buff0_used~0_In-2139516670 |ULTIMATE.start_main_#t~ite49_Out-2139516670|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2139516670, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2139516670} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-2139516670, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2139516670|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2139516670} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:32:45,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In39316293 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In39316293 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In39316293 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In39316293 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out39316293| 0)) (and (= |ULTIMATE.start_main_#t~ite50_Out39316293| ~a$w_buff1_used~0_In39316293) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In39316293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In39316293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In39316293, ~a$w_buff1_used~0=~a$w_buff1_used~0_In39316293} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out39316293|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In39316293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In39316293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In39316293, ~a$w_buff1_used~0=~a$w_buff1_used~0_In39316293} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:32:45,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-7524266 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-7524266 256)))) (or (and (= ~a$r_buff0_thd0~0_In-7524266 |ULTIMATE.start_main_#t~ite51_Out-7524266|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-7524266| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-7524266, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7524266} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-7524266|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-7524266, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7524266} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:32:45,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In1921792433 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1921792433 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1921792433 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1921792433 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd0~0_In1921792433 |ULTIMATE.start_main_#t~ite52_Out1921792433|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out1921792433|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1921792433, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1921792433, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921792433, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1921792433} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1921792433|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1921792433, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1921792433, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921792433, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1921792433} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:32:45,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~main$tmp_guard1~0_19 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_66) (= v_~__unbuffered_p2_EBX~0_30 0) (= v_~y~0_31 2) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:32:45,526 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:32:45 BasicIcfg [2019-12-07 18:32:45,526 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:32:45,526 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:32:45,526 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:32:45,526 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:32:45,526 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:31:26" (3/4) ... [2019-12-07 18:32:45,528 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:32:45,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_93| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= 0 |v_ULTIMATE.start_main_~#t1105~0.offset_34|) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$r_buff1_thd3~0_279 0) (= v_~a$flush_delayed~0_36 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$mem_tmp~0_25 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1105~0.base_55|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1105~0.base_55| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1105~0.base_55|) |v_ULTIMATE.start_main_~#t1105~0.offset_34| 0)) |v_#memory_int_21|) (= v_~a$r_buff0_thd3~0_364 0) (= v_~__unbuffered_p2_EBX~0_67 0) (= v_~y~0_75 0) (= v_~a~0_169 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard1~0_56 0) (= 0 v_~a$w_buff1~0_224) (= |v_#valid_91| (store .cse0 |v_ULTIMATE.start_main_~#t1105~0.base_55| 1)) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 v_~weak$$choice0~0_21) (= 0 |v_#NULL.base_4|) (= 0 v_~a$w_buff1_used~0_506) (= 0 v_~__unbuffered_p2_EAX~0_61) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1105~0.base_55| 4) |v_#length_25|) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= 0 v_~__unbuffered_p0_EAX~0_116) (= v_~z~0_20 0) (= v_~a$read_delayed_var~0.offset_8 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1105~0.base_55|) 0) (= v_~x~0_91 0) (= v_~weak$$choice2~0_114 0) (= v_~a$r_buff1_thd0~0_166 0) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_93|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t1107~0.offset=|v_ULTIMATE.start_main_~#t1107~0.offset_20|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_169, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_105|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_116, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_61, ULTIMATE.start_main_~#t1106~0.base=|v_ULTIMATE.start_main_~#t1106~0.base_41|, ULTIMATE.start_main_~#t1105~0.base=|v_ULTIMATE.start_main_~#t1105~0.base_55|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_67, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_21, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ULTIMATE.start_main_~#t1105~0.offset=|v_ULTIMATE.start_main_~#t1105~0.offset_34|, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_166, ULTIMATE.start_main_~#t1106~0.offset=|v_ULTIMATE.start_main_~#t1106~0.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_91, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_56, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ULTIMATE.start_main_~#t1107~0.base=|v_ULTIMATE.start_main_~#t1107~0.base_28|, ~a$mem_tmp~0=v_~a$mem_tmp~0_25, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_75, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_36, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_37|, #valid=|v_#valid_91|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1107~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1106~0.base, ULTIMATE.start_main_~#t1105~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1105~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t1106~0.offset, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1107~0.base, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:32:45,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995)) (= ~__unbuffered_p0_EAX~0_Out-548638995 ~x~0_In-548638995) (= ~a$r_buff1_thd0~0_Out-548638995 ~a$r_buff0_thd0~0_In-548638995) (= ~a$r_buff0_thd1~0_In-548638995 ~a$r_buff1_thd1~0_Out-548638995) (= ~a$r_buff0_thd2~0_In-548638995 ~a$r_buff1_thd2~0_Out-548638995) (= ~a$r_buff1_thd3~0_Out-548638995 ~a$r_buff0_thd3~0_In-548638995) (= ~a$r_buff0_thd1~0_Out-548638995 1)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-548638995, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-548638995, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-548638995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-548638995, ~x~0=~x~0_In-548638995} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-548638995, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-548638995, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-548638995, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-548638995, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-548638995, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-548638995, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-548638995, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-548638995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-548638995, ~x~0=~x~0_In-548638995} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:32:45,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1106~0.base_9| 1)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1106~0.base_9| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t1106~0.base_9|)) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1106~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1106~0.base_9|) |v_ULTIMATE.start_main_~#t1106~0.offset_7| 1))) (= |v_ULTIMATE.start_main_~#t1106~0.offset_7| 0) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1106~0.base_9|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1106~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1106~0.offset=|v_ULTIMATE.start_main_~#t1106~0.offset_7|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1106~0.base=|v_ULTIMATE.start_main_~#t1106~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1106~0.offset, #length, ULTIMATE.start_main_~#t1106~0.base] because there is no mapped edge [2019-12-07 18:32:45,530 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= |v_ULTIMATE.start_main_~#t1107~0.offset_8| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1107~0.base_9|)) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1107~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1107~0.base_9|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1107~0.base_9| 4) |v_#length_13|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1107~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1107~0.base_9|) |v_ULTIMATE.start_main_~#t1107~0.offset_8| 2))) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1107~0.base_9| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1107~0.offset=|v_ULTIMATE.start_main_~#t1107~0.offset_8|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1107~0.base=|v_ULTIMATE.start_main_~#t1107~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1107~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1107~0.base] because there is no mapped edge [2019-12-07 18:32:45,530 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-905989814| |P1Thread1of1ForFork2_#t~ite10_Out-905989814|)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-905989814 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-905989814 256)))) (or (and .cse0 (or .cse1 .cse2) (= |P1Thread1of1ForFork2_#t~ite9_Out-905989814| ~a~0_In-905989814)) (and .cse0 (not .cse1) (= ~a$w_buff1~0_In-905989814 |P1Thread1of1ForFork2_#t~ite9_Out-905989814|) (not .cse2)))) InVars {~a~0=~a~0_In-905989814, ~a$w_buff1~0=~a$w_buff1~0_In-905989814, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-905989814, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-905989814} OutVars{~a~0=~a~0_In-905989814, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-905989814|, ~a$w_buff1~0=~a$w_buff1~0_In-905989814, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-905989814, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-905989814|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-905989814} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:32:45,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1287159371 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1287159371 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-1287159371| ~a$w_buff0_used~0_In-1287159371) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-1287159371| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1287159371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1287159371} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1287159371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1287159371, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1287159371|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:32:45,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In-2145004758 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-2145004758 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-2145004758 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-2145004758 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-2145004758| ~a$w_buff1_used~0_In-2145004758) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite12_Out-2145004758| 0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2145004758, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2145004758, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2145004758, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2145004758} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2145004758, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2145004758, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2145004758, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2145004758|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2145004758} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:32:45,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1960997991 256)))) (or (and (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-1960997991 256) 0))) (or (= (mod ~a$w_buff0_used~0_In-1960997991 256) 0) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1960997991 256))) (and (= (mod ~a$w_buff1_used~0_In-1960997991 256) 0) .cse0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite20_Out-1960997991| ~a$w_buff0~0_In-1960997991) (= |P2Thread1of1ForFork0_#t~ite21_Out-1960997991| |P2Thread1of1ForFork0_#t~ite20_Out-1960997991|)) (and (= |P2Thread1of1ForFork0_#t~ite20_In-1960997991| |P2Thread1of1ForFork0_#t~ite20_Out-1960997991|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite21_Out-1960997991| ~a$w_buff0~0_In-1960997991)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1960997991, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1960997991, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1960997991, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1960997991, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1960997991, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1960997991|, ~weak$$choice2~0=~weak$$choice2~0_In-1960997991} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1960997991|, ~a$w_buff0~0=~a$w_buff0~0_In-1960997991, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1960997991, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1960997991, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1960997991, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1960997991|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1960997991, ~weak$$choice2~0=~weak$$choice2~0_In-1960997991} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:32:45,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1307443379 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1307443379 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1307443379| 0)) (and (= ~a$r_buff0_thd2~0_In-1307443379 |P1Thread1of1ForFork2_#t~ite13_Out-1307443379|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1307443379, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1307443379} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1307443379, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1307443379, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1307443379|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:32:45,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In1303960835 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1303960835 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1303960835 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd2~0_In1303960835 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1303960835| ~a$r_buff1_thd2~0_In1303960835) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out1303960835| 0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1303960835, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1303960835, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1303960835, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1303960835} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1303960835, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1303960835, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1303960835, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1303960835, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1303960835|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:32:45,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:32:45,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1749654929 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite24_Out-1749654929| |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|) .cse0 (= ~a$w_buff1~0_In-1749654929 |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1749654929 256) 0))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-1749654929 256) 0)) (and (= 0 (mod ~a$w_buff1_used~0_In-1749654929 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-1749654929 256) 0)))) (and (= ~a$w_buff1~0_In-1749654929 |P2Thread1of1ForFork0_#t~ite24_Out-1749654929|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In-1749654929| |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-1749654929, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-1749654929|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1749654929, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1749654929, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1749654929, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1749654929, ~weak$$choice2~0=~weak$$choice2~0_In-1749654929} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-1749654929, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-1749654929|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-1749654929|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1749654929, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1749654929, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1749654929, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1749654929, ~weak$$choice2~0=~weak$$choice2~0_In-1749654929} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 18:32:45,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1679472426 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In-1679472426| |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|) (not .cse0) (= ~a$w_buff0_used~0_In-1679472426 |P2Thread1of1ForFork0_#t~ite27_Out-1679472426|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1679472426| |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1679472426 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-1679472426 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-1679472426 256)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-1679472426 256) 0)))) (= ~a$w_buff0_used~0_In-1679472426 |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1679472426|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1679472426, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1679472426, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1679472426, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1679472426, ~weak$$choice2~0=~weak$$choice2~0_In-1679472426} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1679472426|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1679472426|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1679472426, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1679472426, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1679472426, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1679472426, ~weak$$choice2~0=~weak$$choice2~0_In-1679472426} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:32:45,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:32:45,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:32:45,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1927994934 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1927994934 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1927994934| ~a$w_buff1~0_In-1927994934)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1927994934| ~a~0_In-1927994934) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In-1927994934, ~a$w_buff1~0=~a$w_buff1~0_In-1927994934, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1927994934, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1927994934} OutVars{~a~0=~a~0_In-1927994934, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1927994934|, ~a$w_buff1~0=~a$w_buff1~0_In-1927994934, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1927994934, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1927994934} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:32:45,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:32:45,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1240341953 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1240341953 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1240341953 |P2Thread1of1ForFork0_#t~ite40_Out1240341953|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1240341953|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1240341953, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1240341953} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1240341953|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1240341953, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1240341953} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:32:45,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In476677661 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In476677661 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In476677661 |P0Thread1of1ForFork1_#t~ite5_Out476677661|)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out476677661|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In476677661, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In476677661} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out476677661|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In476677661, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In476677661} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:32:45,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In152115573 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In152115573 256))) (.cse2 (= (mod ~a$r_buff0_thd1~0_In152115573 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In152115573 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out152115573| ~a$w_buff1_used~0_In152115573) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out152115573| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In152115573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In152115573, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In152115573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In152115573} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out152115573|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In152115573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In152115573, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In152115573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In152115573} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:32:45,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_Out-1934197455 ~a$r_buff0_thd1~0_In-1934197455)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1934197455 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1934197455 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (= ~a$r_buff0_thd1~0_Out-1934197455 0) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1934197455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1934197455} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1934197455|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1934197455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1934197455} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:32:45,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1875042691 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In1875042691 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1875042691 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1875042691 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1875042691| 0)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1875042691| ~a$r_buff1_thd1~0_In1875042691) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1875042691, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1875042691, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1875042691, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1875042691} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1875042691|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1875042691, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1875042691, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1875042691, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1875042691} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:32:45,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:32:45,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-1687069109 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1687069109 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1687069109 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1687069109 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1687069109| ~a$w_buff1_used~0_In-1687069109) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite41_Out-1687069109| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1687069109, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687069109, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1687069109, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1687069109} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1687069109, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687069109, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1687069109, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1687069109, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1687069109|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:32:45,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1405999605 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1405999605 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1405999605| ~a$r_buff0_thd3~0_In-1405999605) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1405999605|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1405999605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1405999605} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1405999605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1405999605, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1405999605|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:32:45,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In207228181 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In207228181 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd3~0_In207228181 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In207228181 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out207228181| ~a$r_buff1_thd3~0_In207228181) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out207228181| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In207228181, ~a$w_buff0_used~0=~a$w_buff0_used~0_In207228181, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In207228181, ~a$w_buff1_used~0=~a$w_buff1_used~0_In207228181} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out207228181|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In207228181, ~a$w_buff0_used~0=~a$w_buff0_used~0_In207228181, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In207228181, ~a$w_buff1_used~0=~a$w_buff1_used~0_In207228181} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:32:45,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:32:45,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:32:45,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In1008716173 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1008716173 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite47_Out1008716173| |ULTIMATE.start_main_#t~ite48_Out1008716173|))) (or (and .cse0 (not .cse1) (not .cse2) (= ~a$w_buff1~0_In1008716173 |ULTIMATE.start_main_#t~ite47_Out1008716173|)) (and (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1008716173| ~a~0_In1008716173) .cse0))) InVars {~a~0=~a~0_In1008716173, ~a$w_buff1~0=~a$w_buff1~0_In1008716173, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1008716173, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1008716173} OutVars{~a~0=~a~0_In1008716173, ~a$w_buff1~0=~a$w_buff1~0_In1008716173, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1008716173|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1008716173, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1008716173|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1008716173} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:32:45,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-2139516670 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-2139516670 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-2139516670|) (not .cse1)) (and (= ~a$w_buff0_used~0_In-2139516670 |ULTIMATE.start_main_#t~ite49_Out-2139516670|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2139516670, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2139516670} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-2139516670, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2139516670|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2139516670} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:32:45,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In39316293 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In39316293 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In39316293 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In39316293 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out39316293| 0)) (and (= |ULTIMATE.start_main_#t~ite50_Out39316293| ~a$w_buff1_used~0_In39316293) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In39316293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In39316293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In39316293, ~a$w_buff1_used~0=~a$w_buff1_used~0_In39316293} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out39316293|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In39316293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In39316293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In39316293, ~a$w_buff1_used~0=~a$w_buff1_used~0_In39316293} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:32:45,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-7524266 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-7524266 256)))) (or (and (= ~a$r_buff0_thd0~0_In-7524266 |ULTIMATE.start_main_#t~ite51_Out-7524266|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-7524266| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-7524266, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7524266} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-7524266|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-7524266, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7524266} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:32:45,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In1921792433 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1921792433 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1921792433 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1921792433 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd0~0_In1921792433 |ULTIMATE.start_main_#t~ite52_Out1921792433|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out1921792433|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1921792433, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1921792433, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921792433, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1921792433} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1921792433|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1921792433, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1921792433, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921792433, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1921792433} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:32:45,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~main$tmp_guard1~0_19 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_66) (= v_~__unbuffered_p2_EBX~0_30 0) (= v_~y~0_31 2) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:32:45,597 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_2a2a3c21-538b-4f73-adf0-7ae1c17de585/bin/uautomizer/witness.graphml [2019-12-07 18:32:45,597 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:32:45,598 INFO L168 Benchmark]: Toolchain (without parser) took 79638.49 ms. Allocated memory was 1.0 GB in the beginning and 6.6 GB in the end (delta: 5.6 GB). Free memory was 937.1 MB in the beginning and 3.2 GB in the end (delta: -2.3 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. [2019-12-07 18:32:45,598 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:32:45,599 INFO L168 Benchmark]: CACSL2BoogieTranslator took 393.51 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 91.8 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -122.4 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:32:45,599 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.28 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:32:45,599 INFO L168 Benchmark]: Boogie Preprocessor took 26.82 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:32:45,599 INFO L168 Benchmark]: RCFGBuilder took 416.86 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 997.8 MB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:32:45,600 INFO L168 Benchmark]: TraceAbstraction took 78687.51 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 992.5 MB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. [2019-12-07 18:32:45,600 INFO L168 Benchmark]: Witness Printer took 70.88 ms. Allocated memory is still 6.6 GB. Free memory was 3.3 GB in the beginning and 3.2 GB in the end (delta: 44.7 MB). Peak memory consumption was 44.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:32:45,601 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 393.51 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 91.8 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -122.4 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.28 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.82 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 416.86 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 997.8 MB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 78687.51 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 992.5 MB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. * Witness Printer took 70.88 ms. Allocated memory is still 6.6 GB. Free memory was 3.3 GB in the beginning and 3.2 GB in the end (delta: 44.7 MB). Peak memory consumption was 44.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 100 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 33 ChoiceCompositions, 7302 VarBasedMoverChecksPositive, 250 VarBasedMoverChecksNegative, 40 SemBasedMoverChecksPositive, 286 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 87212 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L830] FCALL, FORK 0 pthread_create(&t1105, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L733] 1 a$w_buff1 = a$w_buff0 [L734] 1 a$w_buff0 = 1 [L735] 1 a$w_buff1_used = a$w_buff0_used [L736] 1 a$w_buff0_used = (_Bool)1 [L832] FCALL, FORK 0 pthread_create(&t1106, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L762] 2 x = 1 [L765] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L768] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L768] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L834] FCALL, FORK 0 pthread_create(&t1107, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L782] 3 y = 2 [L785] 3 z = 1 [L788] 3 __unbuffered_p2_EAX = z [L791] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L792] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L793] 3 a$flush_delayed = weak$$choice2 [L794] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L795] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L795] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L769] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L796] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L770] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L771] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L748] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L797] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L798] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L799] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=1] [L799] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=1] [L801] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L802] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L748] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L807] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L749] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L750] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L808] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L809] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L810] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L840] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L840] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L841] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L842] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L843] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 78.5s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 16.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5340 SDtfs, 7836 SDslu, 12730 SDs, 0 SdLazy, 7999 SolverSat, 503 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 265 GetRequests, 36 SyntacticMatches, 13 SemanticMatches, 216 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1280 ImplicationChecksByTransitivity, 1.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=172880occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 44.2s AutomataMinimizationTime, 25 MinimizatonAttempts, 409684 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 945 NumberOfCodeBlocks, 945 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 853 ConstructedInterpolants, 0 QuantifiedInterpolants, 144606 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...