./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix042_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix042_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 846662d2a7b38e490c5ddfd459f634297670fb88 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:40:34,721 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:40:34,723 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:40:34,730 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:40:34,731 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:40:34,731 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:40:34,732 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:40:34,734 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:40:34,735 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:40:34,735 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:40:34,736 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:40:34,737 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:40:34,737 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:40:34,738 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:40:34,738 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:40:34,739 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:40:34,740 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:40:34,741 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:40:34,742 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:40:34,744 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:40:34,745 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:40:34,746 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:40:34,746 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:40:34,747 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:40:34,749 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:40:34,749 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:40:34,749 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:40:34,750 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:40:34,750 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:40:34,751 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:40:34,751 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:40:34,751 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:40:34,752 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:40:34,752 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:40:34,753 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:40:34,753 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:40:34,753 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:40:34,753 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:40:34,753 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:40:34,754 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:40:34,754 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:40:34,755 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 11:40:34,764 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:40:34,764 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:40:34,765 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 11:40:34,765 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 11:40:34,765 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 11:40:34,765 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:40:34,766 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:40:34,766 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:40:34,766 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:40:34,766 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:40:34,766 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:40:34,766 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:40:34,766 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:40:34,766 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:40:34,767 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:40:34,767 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:40:34,767 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:40:34,767 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:40:34,767 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 11:40:34,767 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:40:34,767 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:40:34,768 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:40:34,768 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:40:34,768 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:40:34,768 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:40:34,768 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 11:40:34,768 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:40:34,768 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:40:34,769 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:40:34,769 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 846662d2a7b38e490c5ddfd459f634297670fb88 [2019-12-07 11:40:34,874 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:40:34,884 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:40:34,887 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:40:34,888 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:40:34,888 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:40:34,888 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix042_power.opt.i [2019-12-07 11:40:34,925 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/data/19b715bb4/52a9b2aa8fef47b385cb07507776c177/FLAG31863ed46 [2019-12-07 11:40:35,419 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:40:35,420 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/sv-benchmarks/c/pthread-wmm/mix042_power.opt.i [2019-12-07 11:40:35,431 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/data/19b715bb4/52a9b2aa8fef47b385cb07507776c177/FLAG31863ed46 [2019-12-07 11:40:35,441 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/data/19b715bb4/52a9b2aa8fef47b385cb07507776c177 [2019-12-07 11:40:35,442 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:40:35,443 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:40:35,444 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:40:35,444 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:40:35,446 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:40:35,447 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:40:35" (1/1) ... [2019-12-07 11:40:35,449 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5d638311 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35, skipping insertion in model container [2019-12-07 11:40:35,449 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:40:35" (1/1) ... [2019-12-07 11:40:35,454 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:40:35,483 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:40:35,726 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:40:35,734 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:40:35,778 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:40:35,824 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:40:35,824 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35 WrapperNode [2019-12-07 11:40:35,824 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:40:35,825 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:40:35,825 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:40:35,825 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:40:35,831 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35" (1/1) ... [2019-12-07 11:40:35,843 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35" (1/1) ... [2019-12-07 11:40:35,868 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:40:35,868 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:40:35,868 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:40:35,868 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:40:35,875 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35" (1/1) ... [2019-12-07 11:40:35,875 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35" (1/1) ... [2019-12-07 11:40:35,878 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35" (1/1) ... [2019-12-07 11:40:35,879 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35" (1/1) ... [2019-12-07 11:40:35,885 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35" (1/1) ... [2019-12-07 11:40:35,888 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35" (1/1) ... [2019-12-07 11:40:35,891 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35" (1/1) ... [2019-12-07 11:40:35,894 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:40:35,894 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:40:35,894 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:40:35,894 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:40:35,895 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:40:35,939 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:40:35,939 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:40:35,939 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:40:35,939 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:40:35,939 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:40:35,940 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:40:35,940 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:40:35,940 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:40:35,940 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 11:40:35,940 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 11:40:35,940 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:40:35,940 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:40:35,940 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:40:35,941 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:40:36,280 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:40:36,280 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:40:36,281 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:40:36 BoogieIcfgContainer [2019-12-07 11:40:36,281 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:40:36,281 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:40:36,281 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:40:36,283 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:40:36,283 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:40:35" (1/3) ... [2019-12-07 11:40:36,284 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7954463a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:40:36, skipping insertion in model container [2019-12-07 11:40:36,284 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:40:35" (2/3) ... [2019-12-07 11:40:36,284 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7954463a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:40:36, skipping insertion in model container [2019-12-07 11:40:36,284 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:40:36" (3/3) ... [2019-12-07 11:40:36,285 INFO L109 eAbstractionObserver]: Analyzing ICFG mix042_power.opt.i [2019-12-07 11:40:36,291 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:40:36,291 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:40:36,296 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:40:36,296 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:40:36,318 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,318 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,318 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,319 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,319 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,319 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,319 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,319 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,319 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,320 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,320 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,320 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,320 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,320 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,320 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,320 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,320 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,321 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,322 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,322 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,322 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,322 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,322 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,322 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,322 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,322 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,323 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,323 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,323 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,323 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,324 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,324 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,324 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,324 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,324 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,324 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:40:36,340 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 11:40:36,353 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:40:36,353 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:40:36,353 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:40:36,353 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:40:36,354 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:40:36,354 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:40:36,354 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:40:36,354 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:40:36,365 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 165 places, 196 transitions [2019-12-07 11:40:36,366 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-12-07 11:40:36,424 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-12-07 11:40:36,424 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:40:36,433 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 476 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 11:40:36,443 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-12-07 11:40:36,468 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-12-07 11:40:36,468 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:40:36,473 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 476 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 11:40:36,485 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-12-07 11:40:36,485 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:40:39,269 WARN L192 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 11:40:39,353 INFO L206 etLargeBlockEncoding]: Checked pairs total: 50142 [2019-12-07 11:40:39,353 INFO L214 etLargeBlockEncoding]: Total number of compositions: 117 [2019-12-07 11:40:39,356 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 86 transitions [2019-12-07 11:40:39,952 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 14254 states. [2019-12-07 11:40:39,954 INFO L276 IsEmpty]: Start isEmpty. Operand 14254 states. [2019-12-07 11:40:39,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 11:40:39,958 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:39,959 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:39,959 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:39,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:39,963 INFO L82 PathProgramCache]: Analyzing trace with hash -632784469, now seen corresponding path program 1 times [2019-12-07 11:40:39,968 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:39,969 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [766456833] [2019-12-07 11:40:39,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:40,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:40,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:40,115 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [766456833] [2019-12-07 11:40:40,116 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:40,116 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:40:40,117 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [930049099] [2019-12-07 11:40:40,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:40:40,120 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:40,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:40:40,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:40,130 INFO L87 Difference]: Start difference. First operand 14254 states. Second operand 3 states. [2019-12-07 11:40:40,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:40,362 INFO L93 Difference]: Finished difference Result 14182 states and 53160 transitions. [2019-12-07 11:40:40,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:40:40,363 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 11:40:40,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:40,466 INFO L225 Difference]: With dead ends: 14182 [2019-12-07 11:40:40,466 INFO L226 Difference]: Without dead ends: 13870 [2019-12-07 11:40:40,467 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:40,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13870 states. [2019-12-07 11:40:40,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13870 to 13870. [2019-12-07 11:40:40,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13870 states. [2019-12-07 11:40:40,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13870 states to 13870 states and 52042 transitions. [2019-12-07 11:40:40,968 INFO L78 Accepts]: Start accepts. Automaton has 13870 states and 52042 transitions. Word has length 7 [2019-12-07 11:40:40,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:40,969 INFO L462 AbstractCegarLoop]: Abstraction has 13870 states and 52042 transitions. [2019-12-07 11:40:40,969 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:40:40,969 INFO L276 IsEmpty]: Start isEmpty. Operand 13870 states and 52042 transitions. [2019-12-07 11:40:40,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:40:40,973 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:40,974 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:40,974 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:40,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:40,974 INFO L82 PathProgramCache]: Analyzing trace with hash -1056225825, now seen corresponding path program 1 times [2019-12-07 11:40:40,974 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:40,975 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112493781] [2019-12-07 11:40:40,975 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:41,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:41,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:41,053 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1112493781] [2019-12-07 11:40:41,053 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:41,053 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:40:41,053 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1242280716] [2019-12-07 11:40:41,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:40:41,054 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:41,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:40:41,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:40:41,055 INFO L87 Difference]: Start difference. First operand 13870 states and 52042 transitions. Second operand 4 states. [2019-12-07 11:40:41,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:41,323 INFO L93 Difference]: Finished difference Result 19034 states and 69248 transitions. [2019-12-07 11:40:41,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:40:41,324 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:40:41,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:41,417 INFO L225 Difference]: With dead ends: 19034 [2019-12-07 11:40:41,417 INFO L226 Difference]: Without dead ends: 19034 [2019-12-07 11:40:41,417 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:41,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19034 states. [2019-12-07 11:40:41,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19034 to 18800. [2019-12-07 11:40:41,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18800 states. [2019-12-07 11:40:41,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18800 states to 18800 states and 68487 transitions. [2019-12-07 11:40:41,914 INFO L78 Accepts]: Start accepts. Automaton has 18800 states and 68487 transitions. Word has length 13 [2019-12-07 11:40:41,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:41,914 INFO L462 AbstractCegarLoop]: Abstraction has 18800 states and 68487 transitions. [2019-12-07 11:40:41,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:40:41,914 INFO L276 IsEmpty]: Start isEmpty. Operand 18800 states and 68487 transitions. [2019-12-07 11:40:41,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:40:41,918 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:41,918 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:41,918 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:41,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:41,919 INFO L82 PathProgramCache]: Analyzing trace with hash 746093816, now seen corresponding path program 1 times [2019-12-07 11:40:41,919 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:41,919 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826682651] [2019-12-07 11:40:41,919 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:41,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:41,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:41,979 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1826682651] [2019-12-07 11:40:41,979 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:41,979 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:40:41,979 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [589865075] [2019-12-07 11:40:41,980 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:40:41,980 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:41,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:40:41,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:40:41,980 INFO L87 Difference]: Start difference. First operand 18800 states and 68487 transitions. Second operand 4 states. [2019-12-07 11:40:42,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:42,251 INFO L93 Difference]: Finished difference Result 27022 states and 96312 transitions. [2019-12-07 11:40:42,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:40:42,252 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:40:42,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:42,306 INFO L225 Difference]: With dead ends: 27022 [2019-12-07 11:40:42,307 INFO L226 Difference]: Without dead ends: 27008 [2019-12-07 11:40:42,307 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:42,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27008 states. [2019-12-07 11:40:42,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27008 to 22366. [2019-12-07 11:40:42,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22366 states. [2019-12-07 11:40:42,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22366 states to 22366 states and 80994 transitions. [2019-12-07 11:40:42,826 INFO L78 Accepts]: Start accepts. Automaton has 22366 states and 80994 transitions. Word has length 13 [2019-12-07 11:40:42,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:42,826 INFO L462 AbstractCegarLoop]: Abstraction has 22366 states and 80994 transitions. [2019-12-07 11:40:42,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:40:42,827 INFO L276 IsEmpty]: Start isEmpty. Operand 22366 states and 80994 transitions. [2019-12-07 11:40:42,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:40:42,831 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:42,831 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:42,831 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:42,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:42,831 INFO L82 PathProgramCache]: Analyzing trace with hash -1347005908, now seen corresponding path program 1 times [2019-12-07 11:40:42,831 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:42,832 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [964953373] [2019-12-07 11:40:42,832 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:42,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:42,888 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:42,889 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [964953373] [2019-12-07 11:40:42,889 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:42,889 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:40:42,889 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508274951] [2019-12-07 11:40:42,889 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:40:42,889 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:42,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:40:42,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:42,890 INFO L87 Difference]: Start difference. First operand 22366 states and 80994 transitions. Second operand 5 states. [2019-12-07 11:40:43,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:43,230 INFO L93 Difference]: Finished difference Result 30132 states and 106959 transitions. [2019-12-07 11:40:43,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:40:43,230 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 11:40:43,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:43,295 INFO L225 Difference]: With dead ends: 30132 [2019-12-07 11:40:43,295 INFO L226 Difference]: Without dead ends: 30118 [2019-12-07 11:40:43,295 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:40:43,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30118 states. [2019-12-07 11:40:43,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30118 to 22270. [2019-12-07 11:40:43,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22270 states. [2019-12-07 11:40:43,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22270 states to 22270 states and 80486 transitions. [2019-12-07 11:40:43,842 INFO L78 Accepts]: Start accepts. Automaton has 22270 states and 80486 transitions. Word has length 19 [2019-12-07 11:40:43,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:43,842 INFO L462 AbstractCegarLoop]: Abstraction has 22270 states and 80486 transitions. [2019-12-07 11:40:43,842 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:40:43,842 INFO L276 IsEmpty]: Start isEmpty. Operand 22270 states and 80486 transitions. [2019-12-07 11:40:43,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 11:40:43,858 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:43,858 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:43,859 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:43,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:43,859 INFO L82 PathProgramCache]: Analyzing trace with hash 1614023153, now seen corresponding path program 1 times [2019-12-07 11:40:43,859 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:43,859 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1518484913] [2019-12-07 11:40:43,859 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:43,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:43,918 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:43,918 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1518484913] [2019-12-07 11:40:43,918 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:43,918 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:40:43,919 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1641720826] [2019-12-07 11:40:43,919 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:40:43,919 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:43,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:40:43,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:40:43,919 INFO L87 Difference]: Start difference. First operand 22270 states and 80486 transitions. Second operand 6 states. [2019-12-07 11:40:44,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:44,228 INFO L93 Difference]: Finished difference Result 32606 states and 115328 transitions. [2019-12-07 11:40:44,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:40:44,229 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 11:40:44,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:44,281 INFO L225 Difference]: With dead ends: 32606 [2019-12-07 11:40:44,282 INFO L226 Difference]: Without dead ends: 32574 [2019-12-07 11:40:44,282 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:40:44,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32574 states. [2019-12-07 11:40:44,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32574 to 28036. [2019-12-07 11:40:44,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28036 states. [2019-12-07 11:40:44,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28036 states to 28036 states and 100001 transitions. [2019-12-07 11:40:44,843 INFO L78 Accepts]: Start accepts. Automaton has 28036 states and 100001 transitions. Word has length 27 [2019-12-07 11:40:44,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:44,843 INFO L462 AbstractCegarLoop]: Abstraction has 28036 states and 100001 transitions. [2019-12-07 11:40:44,843 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:40:44,843 INFO L276 IsEmpty]: Start isEmpty. Operand 28036 states and 100001 transitions. [2019-12-07 11:40:44,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 11:40:44,867 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:44,868 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:44,868 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:44,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:44,868 INFO L82 PathProgramCache]: Analyzing trace with hash 1188296037, now seen corresponding path program 1 times [2019-12-07 11:40:44,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:44,868 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625424230] [2019-12-07 11:40:44,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:44,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:44,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:44,899 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [625424230] [2019-12-07 11:40:44,899 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:44,899 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:40:44,899 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54738306] [2019-12-07 11:40:44,900 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:40:44,900 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:44,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:40:44,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:44,900 INFO L87 Difference]: Start difference. First operand 28036 states and 100001 transitions. Second operand 3 states. [2019-12-07 11:40:45,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:45,048 INFO L93 Difference]: Finished difference Result 35568 states and 127677 transitions. [2019-12-07 11:40:45,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:40:45,049 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-12-07 11:40:45,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:45,111 INFO L225 Difference]: With dead ends: 35568 [2019-12-07 11:40:45,111 INFO L226 Difference]: Without dead ends: 35568 [2019-12-07 11:40:45,111 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:45,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35568 states. [2019-12-07 11:40:45,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35568 to 31188. [2019-12-07 11:40:45,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31188 states. [2019-12-07 11:40:45,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31188 states to 31188 states and 112337 transitions. [2019-12-07 11:40:45,812 INFO L78 Accepts]: Start accepts. Automaton has 31188 states and 112337 transitions. Word has length 33 [2019-12-07 11:40:45,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:45,812 INFO L462 AbstractCegarLoop]: Abstraction has 31188 states and 112337 transitions. [2019-12-07 11:40:45,812 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:40:45,812 INFO L276 IsEmpty]: Start isEmpty. Operand 31188 states and 112337 transitions. [2019-12-07 11:40:45,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 11:40:45,836 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:45,837 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:45,837 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:45,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:45,837 INFO L82 PathProgramCache]: Analyzing trace with hash -1536973783, now seen corresponding path program 1 times [2019-12-07 11:40:45,837 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:45,837 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661755616] [2019-12-07 11:40:45,837 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:45,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:45,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:45,885 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661755616] [2019-12-07 11:40:45,885 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:45,885 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:40:45,885 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1965748816] [2019-12-07 11:40:45,886 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:40:45,886 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:45,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:40:45,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:45,886 INFO L87 Difference]: Start difference. First operand 31188 states and 112337 transitions. Second operand 3 states. [2019-12-07 11:40:46,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:46,014 INFO L93 Difference]: Finished difference Result 31188 states and 112001 transitions. [2019-12-07 11:40:46,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:40:46,014 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-12-07 11:40:46,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:46,070 INFO L225 Difference]: With dead ends: 31188 [2019-12-07 11:40:46,070 INFO L226 Difference]: Without dead ends: 31188 [2019-12-07 11:40:46,070 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:46,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31188 states. [2019-12-07 11:40:46,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31188 to 31188. [2019-12-07 11:40:46,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31188 states. [2019-12-07 11:40:46,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31188 states to 31188 states and 112001 transitions. [2019-12-07 11:40:46,592 INFO L78 Accepts]: Start accepts. Automaton has 31188 states and 112001 transitions. Word has length 33 [2019-12-07 11:40:46,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:46,593 INFO L462 AbstractCegarLoop]: Abstraction has 31188 states and 112001 transitions. [2019-12-07 11:40:46,593 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:40:46,593 INFO L276 IsEmpty]: Start isEmpty. Operand 31188 states and 112001 transitions. [2019-12-07 11:40:46,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 11:40:46,617 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:46,617 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:46,617 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:46,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:46,617 INFO L82 PathProgramCache]: Analyzing trace with hash 1315717310, now seen corresponding path program 1 times [2019-12-07 11:40:46,618 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:46,618 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276561094] [2019-12-07 11:40:46,618 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:46,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:46,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:46,689 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1276561094] [2019-12-07 11:40:46,690 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:46,690 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:40:46,690 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1856600675] [2019-12-07 11:40:46,690 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:40:46,690 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:46,690 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:40:46,691 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:40:46,691 INFO L87 Difference]: Start difference. First operand 31188 states and 112001 transitions. Second operand 7 states. [2019-12-07 11:40:47,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:47,383 INFO L93 Difference]: Finished difference Result 41802 states and 147366 transitions. [2019-12-07 11:40:47,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 11:40:47,383 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 11:40:47,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:47,451 INFO L225 Difference]: With dead ends: 41802 [2019-12-07 11:40:47,451 INFO L226 Difference]: Without dead ends: 41750 [2019-12-07 11:40:47,452 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 11:40:47,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41750 states. [2019-12-07 11:40:47,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41750 to 27846. [2019-12-07 11:40:47,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27846 states. [2019-12-07 11:40:48,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27846 states to 27846 states and 100646 transitions. [2019-12-07 11:40:48,029 INFO L78 Accepts]: Start accepts. Automaton has 27846 states and 100646 transitions. Word has length 33 [2019-12-07 11:40:48,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:48,029 INFO L462 AbstractCegarLoop]: Abstraction has 27846 states and 100646 transitions. [2019-12-07 11:40:48,029 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:40:48,030 INFO L276 IsEmpty]: Start isEmpty. Operand 27846 states and 100646 transitions. [2019-12-07 11:40:48,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 11:40:48,050 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:48,050 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:48,050 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:48,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:48,050 INFO L82 PathProgramCache]: Analyzing trace with hash 2103492564, now seen corresponding path program 1 times [2019-12-07 11:40:48,051 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:48,051 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680351221] [2019-12-07 11:40:48,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:48,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:48,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:48,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680351221] [2019-12-07 11:40:48,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:48,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:40:48,101 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [40568120] [2019-12-07 11:40:48,101 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:40:48,101 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:48,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:40:48,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:40:48,102 INFO L87 Difference]: Start difference. First operand 27846 states and 100646 transitions. Second operand 4 states. [2019-12-07 11:40:48,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:48,168 INFO L93 Difference]: Finished difference Result 16488 states and 51363 transitions. [2019-12-07 11:40:48,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:40:48,168 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2019-12-07 11:40:48,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:48,187 INFO L225 Difference]: With dead ends: 16488 [2019-12-07 11:40:48,187 INFO L226 Difference]: Without dead ends: 15958 [2019-12-07 11:40:48,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:48,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15958 states. [2019-12-07 11:40:48,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15958 to 15958. [2019-12-07 11:40:48,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15958 states. [2019-12-07 11:40:48,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15958 states to 15958 states and 49857 transitions. [2019-12-07 11:40:48,414 INFO L78 Accepts]: Start accepts. Automaton has 15958 states and 49857 transitions. Word has length 33 [2019-12-07 11:40:48,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:48,415 INFO L462 AbstractCegarLoop]: Abstraction has 15958 states and 49857 transitions. [2019-12-07 11:40:48,415 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:40:48,415 INFO L276 IsEmpty]: Start isEmpty. Operand 15958 states and 49857 transitions. [2019-12-07 11:40:48,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 11:40:48,422 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:48,422 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:48,422 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:48,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:48,423 INFO L82 PathProgramCache]: Analyzing trace with hash -308537285, now seen corresponding path program 1 times [2019-12-07 11:40:48,423 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:48,423 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [339906187] [2019-12-07 11:40:48,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:48,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:48,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:48,475 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [339906187] [2019-12-07 11:40:48,476 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:48,476 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:40:48,476 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1377897574] [2019-12-07 11:40:48,476 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:40:48,476 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:48,476 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:40:48,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:48,476 INFO L87 Difference]: Start difference. First operand 15958 states and 49857 transitions. Second operand 5 states. [2019-12-07 11:40:48,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:48,509 INFO L93 Difference]: Finished difference Result 2712 states and 6343 transitions. [2019-12-07 11:40:48,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:40:48,509 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-12-07 11:40:48,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:48,511 INFO L225 Difference]: With dead ends: 2712 [2019-12-07 11:40:48,511 INFO L226 Difference]: Without dead ends: 2403 [2019-12-07 11:40:48,511 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:40:48,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2403 states. [2019-12-07 11:40:48,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2403 to 2403. [2019-12-07 11:40:48,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2403 states. [2019-12-07 11:40:48,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2403 states to 2403 states and 5482 transitions. [2019-12-07 11:40:48,531 INFO L78 Accepts]: Start accepts. Automaton has 2403 states and 5482 transitions. Word has length 34 [2019-12-07 11:40:48,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:48,531 INFO L462 AbstractCegarLoop]: Abstraction has 2403 states and 5482 transitions. [2019-12-07 11:40:48,531 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:40:48,531 INFO L276 IsEmpty]: Start isEmpty. Operand 2403 states and 5482 transitions. [2019-12-07 11:40:48,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 11:40:48,533 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:48,533 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:48,533 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:48,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:48,533 INFO L82 PathProgramCache]: Analyzing trace with hash 682662632, now seen corresponding path program 1 times [2019-12-07 11:40:48,533 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:48,533 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [515098837] [2019-12-07 11:40:48,533 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:48,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:48,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:48,591 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [515098837] [2019-12-07 11:40:48,591 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:48,591 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:40:48,591 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079747117] [2019-12-07 11:40:48,592 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:40:48,592 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:48,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:40:48,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:40:48,592 INFO L87 Difference]: Start difference. First operand 2403 states and 5482 transitions. Second operand 6 states. [2019-12-07 11:40:48,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:48,630 INFO L93 Difference]: Finished difference Result 708 states and 1600 transitions. [2019-12-07 11:40:48,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:40:48,630 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2019-12-07 11:40:48,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:48,631 INFO L225 Difference]: With dead ends: 708 [2019-12-07 11:40:48,631 INFO L226 Difference]: Without dead ends: 662 [2019-12-07 11:40:48,631 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:40:48,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 662 states. [2019-12-07 11:40:48,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 662 to 606. [2019-12-07 11:40:48,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 606 states. [2019-12-07 11:40:48,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 1378 transitions. [2019-12-07 11:40:48,636 INFO L78 Accepts]: Start accepts. Automaton has 606 states and 1378 transitions. Word has length 45 [2019-12-07 11:40:48,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:48,637 INFO L462 AbstractCegarLoop]: Abstraction has 606 states and 1378 transitions. [2019-12-07 11:40:48,637 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:40:48,637 INFO L276 IsEmpty]: Start isEmpty. Operand 606 states and 1378 transitions. [2019-12-07 11:40:48,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:40:48,637 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:48,637 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:48,637 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:48,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:48,638 INFO L82 PathProgramCache]: Analyzing trace with hash 1345831558, now seen corresponding path program 1 times [2019-12-07 11:40:48,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:48,638 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356670021] [2019-12-07 11:40:48,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:48,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:48,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:48,688 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356670021] [2019-12-07 11:40:48,688 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:48,688 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:40:48,689 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1793686891] [2019-12-07 11:40:48,689 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:40:48,689 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:48,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:40:48,689 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:48,689 INFO L87 Difference]: Start difference. First operand 606 states and 1378 transitions. Second operand 5 states. [2019-12-07 11:40:48,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:48,800 INFO L93 Difference]: Finished difference Result 877 states and 2007 transitions. [2019-12-07 11:40:48,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:40:48,801 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-12-07 11:40:48,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:48,801 INFO L225 Difference]: With dead ends: 877 [2019-12-07 11:40:48,801 INFO L226 Difference]: Without dead ends: 877 [2019-12-07 11:40:48,802 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:40:48,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 877 states. [2019-12-07 11:40:48,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 877 to 642. [2019-12-07 11:40:48,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 642 states. [2019-12-07 11:40:48,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 642 states to 642 states and 1470 transitions. [2019-12-07 11:40:48,808 INFO L78 Accepts]: Start accepts. Automaton has 642 states and 1470 transitions. Word has length 56 [2019-12-07 11:40:48,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:48,808 INFO L462 AbstractCegarLoop]: Abstraction has 642 states and 1470 transitions. [2019-12-07 11:40:48,808 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:40:48,808 INFO L276 IsEmpty]: Start isEmpty. Operand 642 states and 1470 transitions. [2019-12-07 11:40:48,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:40:48,809 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:48,809 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:48,809 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:48,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:48,809 INFO L82 PathProgramCache]: Analyzing trace with hash 1993080434, now seen corresponding path program 2 times [2019-12-07 11:40:48,809 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:48,810 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [81475194] [2019-12-07 11:40:48,810 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:48,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:48,854 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:48,855 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [81475194] [2019-12-07 11:40:48,855 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:48,855 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:40:48,855 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [408183525] [2019-12-07 11:40:48,855 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:40:48,856 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:48,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:40:48,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:48,856 INFO L87 Difference]: Start difference. First operand 642 states and 1470 transitions. Second operand 3 states. [2019-12-07 11:40:48,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:48,865 INFO L93 Difference]: Finished difference Result 642 states and 1440 transitions. [2019-12-07 11:40:48,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:40:48,866 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 11:40:48,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:48,866 INFO L225 Difference]: With dead ends: 642 [2019-12-07 11:40:48,866 INFO L226 Difference]: Without dead ends: 642 [2019-12-07 11:40:48,867 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:48,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 642 states. [2019-12-07 11:40:48,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 642 to 606. [2019-12-07 11:40:48,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 606 states. [2019-12-07 11:40:48,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 1354 transitions. [2019-12-07 11:40:48,872 INFO L78 Accepts]: Start accepts. Automaton has 606 states and 1354 transitions. Word has length 56 [2019-12-07 11:40:48,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:48,872 INFO L462 AbstractCegarLoop]: Abstraction has 606 states and 1354 transitions. [2019-12-07 11:40:48,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:40:48,872 INFO L276 IsEmpty]: Start isEmpty. Operand 606 states and 1354 transitions. [2019-12-07 11:40:48,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 11:40:48,873 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:48,873 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:48,873 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:48,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:48,873 INFO L82 PathProgramCache]: Analyzing trace with hash 2052620165, now seen corresponding path program 1 times [2019-12-07 11:40:48,874 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:48,874 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742321255] [2019-12-07 11:40:48,874 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:48,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:49,044 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:49,045 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742321255] [2019-12-07 11:40:49,045 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:49,045 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 11:40:49,045 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [449500190] [2019-12-07 11:40:49,045 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 11:40:49,045 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:49,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 11:40:49,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:40:49,046 INFO L87 Difference]: Start difference. First operand 606 states and 1354 transitions. Second operand 12 states. [2019-12-07 11:40:49,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:49,500 INFO L93 Difference]: Finished difference Result 1230 states and 2440 transitions. [2019-12-07 11:40:49,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 11:40:49,501 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 57 [2019-12-07 11:40:49,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:49,501 INFO L225 Difference]: With dead ends: 1230 [2019-12-07 11:40:49,501 INFO L226 Difference]: Without dead ends: 610 [2019-12-07 11:40:49,502 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=427, Unknown=0, NotChecked=0, Total=600 [2019-12-07 11:40:49,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 610 states. [2019-12-07 11:40:49,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 610 to 544. [2019-12-07 11:40:49,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 544 states. [2019-12-07 11:40:49,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 544 states to 544 states and 1175 transitions. [2019-12-07 11:40:49,506 INFO L78 Accepts]: Start accepts. Automaton has 544 states and 1175 transitions. Word has length 57 [2019-12-07 11:40:49,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:49,506 INFO L462 AbstractCegarLoop]: Abstraction has 544 states and 1175 transitions. [2019-12-07 11:40:49,506 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 11:40:49,506 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 1175 transitions. [2019-12-07 11:40:49,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 11:40:49,507 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:49,507 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:49,507 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:49,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:49,507 INFO L82 PathProgramCache]: Analyzing trace with hash -892812541, now seen corresponding path program 2 times [2019-12-07 11:40:49,507 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:49,507 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [109409175] [2019-12-07 11:40:49,507 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:49,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:49,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:49,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [109409175] [2019-12-07 11:40:49,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:49,699 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 11:40:49,699 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1379222374] [2019-12-07 11:40:49,699 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 11:40:49,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:49,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 11:40:49,700 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:40:49,700 INFO L87 Difference]: Start difference. First operand 544 states and 1175 transitions. Second operand 13 states. [2019-12-07 11:40:49,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:49,934 INFO L93 Difference]: Finished difference Result 852 states and 1845 transitions. [2019-12-07 11:40:49,934 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 11:40:49,934 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2019-12-07 11:40:49,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:49,935 INFO L225 Difference]: With dead ends: 852 [2019-12-07 11:40:49,935 INFO L226 Difference]: Without dead ends: 822 [2019-12-07 11:40:49,936 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=372, Unknown=0, NotChecked=0, Total=462 [2019-12-07 11:40:49,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 822 states. [2019-12-07 11:40:49,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 822 to 748. [2019-12-07 11:40:49,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 748 states. [2019-12-07 11:40:49,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 748 states to 748 states and 1628 transitions. [2019-12-07 11:40:49,942 INFO L78 Accepts]: Start accepts. Automaton has 748 states and 1628 transitions. Word has length 57 [2019-12-07 11:40:49,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:49,942 INFO L462 AbstractCegarLoop]: Abstraction has 748 states and 1628 transitions. [2019-12-07 11:40:49,943 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 11:40:49,943 INFO L276 IsEmpty]: Start isEmpty. Operand 748 states and 1628 transitions. [2019-12-07 11:40:49,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 11:40:49,943 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:49,944 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:49,944 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:49,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:49,944 INFO L82 PathProgramCache]: Analyzing trace with hash 729108355, now seen corresponding path program 3 times [2019-12-07 11:40:49,944 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:49,944 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560445905] [2019-12-07 11:40:49,944 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:49,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:40:49,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:40:50,028 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 11:40:50,028 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:40:50,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_56| 0 0))) (and (= v_~y$w_buff0_used~0_565 0) (= v_~y$w_buff1_used~0_304 0) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff0_thd0~0_292 0) (= 0 v_~weak$$choice2~0_82) (= 0 v_~y$read_delayed_var~0.offset_8) (= 0 v_~__unbuffered_cnt~0_94) (= 0 v_~y$r_buff1_thd3~0_89) (= v_~y$read_delayed~0_8 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1108~0.base_27| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1108~0.base_27|) |v_ULTIMATE.start_main_~#t1108~0.offset_21| 0)) |v_#memory_int_15|) (= 0 v_~y$r_buff1_thd2~0_113) (= v_~main$tmp_guard1~0_30 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1108~0.base_27| 1) |v_#valid_54|) (= v_~x~0_51 0) (= v_~y$w_buff1~0_136 0) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1108~0.base_27| 4)) (= 0 v_~y$r_buff0_thd2~0_108) (< 0 |v_#StackHeapBarrier_14|) (= v_~y$r_buff0_thd1~0_41 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1108~0.base_27|)) (= v_~a~0_57 0) (= v_~y$mem_tmp~0_17 0) (= v_~z~0_41 0) (= 0 v_~y$r_buff1_thd1~0_40) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~y~0_123 0) (= v_~y$r_buff1_thd0~0_196 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff0_thd3~0_130) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_54) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 0 v_~weak$$choice0~0_13) (= |v_ULTIMATE.start_main_~#t1108~0.offset_21| 0) (= 0 |v_#NULL.base_5|) (= 0 v_~y$flush_delayed~0_34) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1108~0.base_27|) (= 0 v_~y$w_buff0~0_162))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_35|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_50|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_57, ~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_89, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_41, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, ULTIMATE.start_main_~#t1109~0.base=|v_ULTIMATE.start_main_~#t1109~0.base_26|, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_54, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_116|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_33|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_25|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_136, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_196, ~x~0=v_~x~0_51, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_565, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_49|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_27|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_27|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_40, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_28|, ULTIMATE.start_main_~#t1108~0.offset=|v_ULTIMATE.start_main_~#t1108~0.offset_21|, ULTIMATE.start_main_~#t1110~0.base=|v_ULTIMATE.start_main_~#t1110~0.base_21|, ~y$w_buff0~0=v_~y$w_buff0~0_162, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_130, ULTIMATE.start_main_~#t1110~0.offset=|v_ULTIMATE.start_main_~#t1110~0.offset_16|, ~y~0=v_~y~0_123, ULTIMATE.start_main_~#t1108~0.base=|v_ULTIMATE.start_main_~#t1108~0.base_27|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_32|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_~#t1109~0.offset=|v_ULTIMATE.start_main_~#t1109~0.offset_20|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_196|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_28|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_110|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_113, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_26|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_292, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_41, ~weak$$choice2~0=v_~weak$$choice2~0_82, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ULTIMATE.start_main_~#t1109~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1108~0.offset, ULTIMATE.start_main_~#t1110~0.base, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t1110~0.offset, ~y~0, ULTIMATE.start_main_~#t1108~0.base, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_~#t1109~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 11:40:50,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L812-1-->L814: Formula: (and (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1109~0.base_9| 4) |v_#length_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1109~0.base_9|) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1109~0.base_9| 1) |v_#valid_27|) (= |v_ULTIMATE.start_main_~#t1109~0.offset_8| 0) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1109~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1109~0.base_9|) |v_ULTIMATE.start_main_~#t1109~0.offset_8| 1))) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1109~0.base_9|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t1109~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1109~0.offset=|v_ULTIMATE.start_main_~#t1109~0.offset_8|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, ULTIMATE.start_main_~#t1109~0.base=|v_ULTIMATE.start_main_~#t1109~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1109~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1109~0.base, #length] because there is no mapped edge [2019-12-07 11:40:50,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L816: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1110~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1110~0.base_10|) |v_ULTIMATE.start_main_~#t1110~0.offset_10| 2)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t1110~0.base_10| 0)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1110~0.base_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1110~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t1110~0.offset_10|) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1110~0.base_10|) 0) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1110~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1110~0.base=|v_ULTIMATE.start_main_~#t1110~0.base_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1110~0.offset=|v_ULTIMATE.start_main_~#t1110~0.offset_10|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1110~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1110~0.offset, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 11:40:50,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L4-->L789: Formula: (and (= ~y$r_buff1_thd1~0_Out-1706038656 ~y$r_buff0_thd1~0_In-1706038656) (= ~y$r_buff0_thd3~0_In-1706038656 ~y$r_buff1_thd3~0_Out-1706038656) (= ~__unbuffered_p2_EBX~0_Out-1706038656 ~a~0_In-1706038656) (= ~y$r_buff1_thd2~0_Out-1706038656 ~y$r_buff0_thd2~0_In-1706038656) (= ~__unbuffered_p2_EAX~0_Out-1706038656 ~z~0_Out-1706038656) (= 1 ~y$r_buff0_thd3~0_Out-1706038656) (not (= 0 P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1706038656)) (= 1 ~z~0_Out-1706038656) (= ~y$r_buff1_thd0~0_Out-1706038656 ~y$r_buff0_thd0~0_In-1706038656)) InVars {~a~0=~a~0_In-1706038656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1706038656, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1706038656, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1706038656, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1706038656, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1706038656} OutVars{~__unbuffered_p2_EBX~0=~__unbuffered_p2_EBX~0_Out-1706038656, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1706038656, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_Out-1706038656, ~a~0=~a~0_In-1706038656, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_Out-1706038656, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_Out-1706038656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1706038656, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1706038656, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1706038656, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1706038656, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_Out-1706038656, ~z~0=~z~0_Out-1706038656, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_Out-1706038656} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 11:40:50,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_8 |v_P0Thread1of1ForFork2_#in~arg.base_10|) (= v_~a~0_22 1) (= v_~x~0_29 v_~__unbuffered_p0_EAX~0_17) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_P0Thread1of1ForFork2_~arg.offset_8 |v_P0Thread1of1ForFork2_#in~arg.offset_10|) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, ~x~0=v_~x~0_29} OutVars{~a~0=v_~a~0_22, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_8, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_29, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_8} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 11:40:50,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L754-2-->L754-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In867550460 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In867550460 256) 0)) (.cse2 (= |P1Thread1of1ForFork0_#t~ite4_Out867550460| |P1Thread1of1ForFork0_#t~ite3_Out867550460|))) (or (and (or .cse0 .cse1) .cse2 (= ~y~0_In867550460 |P1Thread1of1ForFork0_#t~ite3_Out867550460|)) (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In867550460 |P1Thread1of1ForFork0_#t~ite3_Out867550460|) .cse2))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In867550460, ~y$w_buff1~0=~y$w_buff1~0_In867550460, ~y~0=~y~0_In867550460, ~y$w_buff1_used~0=~y$w_buff1_used~0_In867550460} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In867550460, ~y$w_buff1~0=~y$w_buff1~0_In867550460, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out867550460|, ~y~0=~y~0_In867550460, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out867550460|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In867550460} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 11:40:50,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In395290989 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In395290989 256)))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite11_Out395290989|) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite11_Out395290989| ~y$w_buff0_used~0_In395290989) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In395290989, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In395290989} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In395290989, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out395290989|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In395290989} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:40:50,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L791-->L791-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In1052906208 256))) (.cse2 (= (mod ~y$r_buff1_thd3~0_In1052906208 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1052906208 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In1052906208 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1052906208 |P2Thread1of1ForFork1_#t~ite12_Out1052906208|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork1_#t~ite12_Out1052906208|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1052906208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1052906208, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1052906208, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1052906208} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1052906208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1052906208, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1052906208, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out1052906208|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1052906208} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:40:50,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L792-->L793: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In837372039 256))) (.cse0 (= ~y$r_buff0_thd3~0_In837372039 ~y$r_buff0_thd3~0_Out837372039)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In837372039 256)))) (or (and .cse0 .cse1) (and (not .cse2) (= ~y$r_buff0_thd3~0_Out837372039 0) (not .cse1)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In837372039, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In837372039} OutVars{P2Thread1of1ForFork1_#t~ite13=|P2Thread1of1ForFork1_#t~ite13_Out837372039|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In837372039, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out837372039} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite13, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 11:40:50,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L793-->L793-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In-410413367 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-410413367 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-410413367 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-410413367 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite14_Out-410413367| ~y$r_buff1_thd3~0_In-410413367) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork1_#t~ite14_Out-410413367|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-410413367, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-410413367, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-410413367, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-410413367} OutVars{P2Thread1of1ForFork1_#t~ite14=|P2Thread1of1ForFork1_#t~ite14_Out-410413367|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-410413367, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-410413367, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-410413367, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-410413367} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:40:50,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L793-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_59 1) v_~__unbuffered_cnt~0_58) (= |v_P2Thread1of1ForFork1_#t~ite14_34| v_~y$r_buff1_thd3~0_55) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59} OutVars{P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_33|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_55, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 11:40:50,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-665162685 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-665162685 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite5_Out-665162685| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite5_Out-665162685| ~y$w_buff0_used~0_In-665162685) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-665162685, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-665162685} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-665162685, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-665162685, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out-665162685|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:40:50,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-553574573 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-553574573 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In-553574573 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd2~0_In-553574573 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite6_Out-553574573| ~y$w_buff1_used~0_In-553574573) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork0_#t~ite6_Out-553574573| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-553574573, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-553574573, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-553574573, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-553574573} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-553574573, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-553574573, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-553574573, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out-553574573|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-553574573} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:40:50,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L757-->L757-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-947984530 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-947984530 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite7_Out-947984530| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite7_Out-947984530| ~y$r_buff0_thd2~0_In-947984530) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-947984530, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-947984530} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-947984530, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-947984530, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out-947984530|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 11:40:50,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In1062571790 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In1062571790 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In1062571790 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1062571790 256) 0))) (or (and (= ~y$r_buff1_thd2~0_In1062571790 |P1Thread1of1ForFork0_#t~ite8_Out1062571790|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite8_Out1062571790|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1062571790, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1062571790, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1062571790, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1062571790} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1062571790, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1062571790, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1062571790, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out1062571790|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1062571790} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:40:50,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= v_~y$r_buff1_thd2~0_82 |v_P1Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_36|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_82, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_35|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 11:40:50,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L820-->L822-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_253 256)) (= (mod v_~y$r_buff0_thd0~0_142 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:40:50,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L822-2-->L822-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite19_Out-1940725855| |ULTIMATE.start_main_#t~ite18_Out-1940725855|)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1940725855 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-1940725855 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite18_Out-1940725855| ~y$w_buff1~0_In-1940725855) (not .cse0) .cse1 (not .cse2)) (and (= |ULTIMATE.start_main_#t~ite18_Out-1940725855| ~y~0_In-1940725855) .cse1 (or .cse2 .cse0)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1940725855, ~y~0=~y~0_In-1940725855, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1940725855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1940725855} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1940725855, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1940725855|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1940725855|, ~y~0=~y~0_In-1940725855, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1940725855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1940725855} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 11:40:50,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In908085915 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In908085915 256)))) (or (and (= ~y$w_buff0_used~0_In908085915 |ULTIMATE.start_main_#t~ite20_Out908085915|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out908085915|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In908085915, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In908085915} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In908085915, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In908085915, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out908085915|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 11:40:50,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L824-->L824-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In1234727491 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1234727491 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1234727491 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1234727491 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1234727491 |ULTIMATE.start_main_#t~ite21_Out1234727491|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |ULTIMATE.start_main_#t~ite21_Out1234727491|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1234727491, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1234727491, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1234727491, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1234727491} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1234727491, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1234727491, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1234727491|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1234727491, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1234727491} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 11:40:50,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L825-->L825-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-2035307960 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-2035307960 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite22_Out-2035307960|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$r_buff0_thd0~0_In-2035307960 |ULTIMATE.start_main_#t~ite22_Out-2035307960|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2035307960, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2035307960} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2035307960, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2035307960, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-2035307960|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 11:40:50,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L826-->L826-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-603496134 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-603496134 256))) (.cse3 (= (mod ~y$r_buff1_thd0~0_In-603496134 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-603496134 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite23_Out-603496134|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In-603496134 |ULTIMATE.start_main_#t~ite23_Out-603496134|) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-603496134, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-603496134, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-603496134, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-603496134} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-603496134, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-603496134, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-603496134, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-603496134|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-603496134} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 11:40:50,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2135673693 256)))) (or (and (= ~y$w_buff0~0_In-2135673693 |ULTIMATE.start_main_#t~ite29_Out-2135673693|) (= |ULTIMATE.start_main_#t~ite29_Out-2135673693| |ULTIMATE.start_main_#t~ite30_Out-2135673693|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-2135673693 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In-2135673693 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In-2135673693 256) 0) (and (= (mod ~y$r_buff1_thd0~0_In-2135673693 256) 0) .cse1)))) (and (= ~y$w_buff0~0_In-2135673693 |ULTIMATE.start_main_#t~ite30_Out-2135673693|) (not .cse0) (= |ULTIMATE.start_main_#t~ite29_In-2135673693| |ULTIMATE.start_main_#t~ite29_Out-2135673693|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2135673693, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-2135673693|, ~y$w_buff0~0=~y$w_buff0~0_In-2135673693, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2135673693, ~weak$$choice2~0=~weak$$choice2~0_In-2135673693, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2135673693, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2135673693} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-2135673693|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2135673693, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-2135673693|, ~y$w_buff0~0=~y$w_buff0~0_In-2135673693, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2135673693, ~weak$$choice2~0=~weak$$choice2~0_In-2135673693, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2135673693, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2135673693} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 11:40:50,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L836-->L836-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2131318104 256)))) (or (and (= |ULTIMATE.start_main_#t~ite35_Out-2131318104| ~y$w_buff0_used~0_In-2131318104) (= |ULTIMATE.start_main_#t~ite36_Out-2131318104| |ULTIMATE.start_main_#t~ite35_Out-2131318104|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-2131318104 256)))) (or (and (= (mod ~y$w_buff1_used~0_In-2131318104 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In-2131318104 256) 0) (and (= 0 (mod ~y$r_buff1_thd0~0_In-2131318104 256)) .cse1)))) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite35_In-2131318104| |ULTIMATE.start_main_#t~ite35_Out-2131318104|) (= |ULTIMATE.start_main_#t~ite36_Out-2131318104| ~y$w_buff0_used~0_In-2131318104)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2131318104, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2131318104, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-2131318104|, ~weak$$choice2~0=~weak$$choice2~0_In-2131318104, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2131318104, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2131318104} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2131318104, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2131318104, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-2131318104|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-2131318104|, ~weak$$choice2~0=~weak$$choice2~0_In-2131318104, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2131318104, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2131318104} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 11:40:50,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L837-->L837-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1089160880 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1089160880 256) 0))) (or (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-1089160880 256))) (and (= 0 (mod ~y$w_buff1_used~0_In-1089160880 256)) .cse0) (= 0 (mod ~y$w_buff0_used~0_In-1089160880 256)))) (= |ULTIMATE.start_main_#t~ite38_Out-1089160880| ~y$w_buff1_used~0_In-1089160880) .cse1 (= |ULTIMATE.start_main_#t~ite39_Out-1089160880| |ULTIMATE.start_main_#t~ite38_Out-1089160880|)) (and (= |ULTIMATE.start_main_#t~ite39_Out-1089160880| ~y$w_buff1_used~0_In-1089160880) (not .cse1) (= |ULTIMATE.start_main_#t~ite38_In-1089160880| |ULTIMATE.start_main_#t~ite38_Out-1089160880|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1089160880, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1089160880, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-1089160880|, ~weak$$choice2~0=~weak$$choice2~0_In-1089160880, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1089160880, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1089160880} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1089160880, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1089160880|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1089160880, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-1089160880|, ~weak$$choice2~0=~weak$$choice2~0_In-1089160880, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1089160880, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1089160880} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 11:40:50,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L838-->L839: Formula: (and (not (= (mod v_~weak$$choice2~0_22 256) 0)) (= v_~y$r_buff0_thd0~0_108 v_~y$r_buff0_thd0~0_107)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_22} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 11:40:50,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L839-->L839-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1839037300 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite45_Out-1839037300| ~y$r_buff1_thd0~0_In-1839037300) (= |ULTIMATE.start_main_#t~ite44_In-1839037300| |ULTIMATE.start_main_#t~ite44_Out-1839037300|)) (and (= ~y$r_buff1_thd0~0_In-1839037300 |ULTIMATE.start_main_#t~ite44_Out-1839037300|) (= |ULTIMATE.start_main_#t~ite45_Out-1839037300| |ULTIMATE.start_main_#t~ite44_Out-1839037300|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1839037300 256)))) (or (= (mod ~y$w_buff0_used~0_In-1839037300 256) 0) (and (= (mod ~y$r_buff1_thd0~0_In-1839037300 256) 0) .cse1) (and .cse1 (= (mod ~y$w_buff1_used~0_In-1839037300 256) 0))))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1839037300, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1839037300, ~weak$$choice2~0=~weak$$choice2~0_In-1839037300, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1839037300, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1839037300, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In-1839037300|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1839037300, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1839037300, ~weak$$choice2~0=~weak$$choice2~0_In-1839037300, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1839037300, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1839037300|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1839037300|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1839037300} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 11:40:50,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L841-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_27) (= v_~y~0_103 v_~y$mem_tmp~0_13) (not (= 0 (mod v_~y$flush_delayed~0_28 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:40:50,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 11:40:50,102 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:40:50 BasicIcfg [2019-12-07 11:40:50,102 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:40:50,103 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:40:50,103 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:40:50,103 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:40:50,103 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:40:36" (3/4) ... [2019-12-07 11:40:50,105 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:40:50,106 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_56| 0 0))) (and (= v_~y$w_buff0_used~0_565 0) (= v_~y$w_buff1_used~0_304 0) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff0_thd0~0_292 0) (= 0 v_~weak$$choice2~0_82) (= 0 v_~y$read_delayed_var~0.offset_8) (= 0 v_~__unbuffered_cnt~0_94) (= 0 v_~y$r_buff1_thd3~0_89) (= v_~y$read_delayed~0_8 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1108~0.base_27| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1108~0.base_27|) |v_ULTIMATE.start_main_~#t1108~0.offset_21| 0)) |v_#memory_int_15|) (= 0 v_~y$r_buff1_thd2~0_113) (= v_~main$tmp_guard1~0_30 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1108~0.base_27| 1) |v_#valid_54|) (= v_~x~0_51 0) (= v_~y$w_buff1~0_136 0) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1108~0.base_27| 4)) (= 0 v_~y$r_buff0_thd2~0_108) (< 0 |v_#StackHeapBarrier_14|) (= v_~y$r_buff0_thd1~0_41 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1108~0.base_27|)) (= v_~a~0_57 0) (= v_~y$mem_tmp~0_17 0) (= v_~z~0_41 0) (= 0 v_~y$r_buff1_thd1~0_40) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~y~0_123 0) (= v_~y$r_buff1_thd0~0_196 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff0_thd3~0_130) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_54) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 0 v_~weak$$choice0~0_13) (= |v_ULTIMATE.start_main_~#t1108~0.offset_21| 0) (= 0 |v_#NULL.base_5|) (= 0 v_~y$flush_delayed~0_34) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1108~0.base_27|) (= 0 v_~y$w_buff0~0_162))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_35|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_50|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_57, ~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_89, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_41, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, ULTIMATE.start_main_~#t1109~0.base=|v_ULTIMATE.start_main_~#t1109~0.base_26|, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_54, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_116|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_33|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_25|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_136, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_196, ~x~0=v_~x~0_51, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_565, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_49|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_27|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_27|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_40, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_28|, ULTIMATE.start_main_~#t1108~0.offset=|v_ULTIMATE.start_main_~#t1108~0.offset_21|, ULTIMATE.start_main_~#t1110~0.base=|v_ULTIMATE.start_main_~#t1110~0.base_21|, ~y$w_buff0~0=v_~y$w_buff0~0_162, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_130, ULTIMATE.start_main_~#t1110~0.offset=|v_ULTIMATE.start_main_~#t1110~0.offset_16|, ~y~0=v_~y~0_123, ULTIMATE.start_main_~#t1108~0.base=|v_ULTIMATE.start_main_~#t1108~0.base_27|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_32|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_~#t1109~0.offset=|v_ULTIMATE.start_main_~#t1109~0.offset_20|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_196|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_28|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_110|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_113, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_26|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_292, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_41, ~weak$$choice2~0=v_~weak$$choice2~0_82, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ULTIMATE.start_main_~#t1109~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1108~0.offset, ULTIMATE.start_main_~#t1110~0.base, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t1110~0.offset, ~y~0, ULTIMATE.start_main_~#t1108~0.base, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_~#t1109~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 11:40:50,106 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L812-1-->L814: Formula: (and (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1109~0.base_9| 4) |v_#length_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1109~0.base_9|) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1109~0.base_9| 1) |v_#valid_27|) (= |v_ULTIMATE.start_main_~#t1109~0.offset_8| 0) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1109~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1109~0.base_9|) |v_ULTIMATE.start_main_~#t1109~0.offset_8| 1))) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1109~0.base_9|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t1109~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1109~0.offset=|v_ULTIMATE.start_main_~#t1109~0.offset_8|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, ULTIMATE.start_main_~#t1109~0.base=|v_ULTIMATE.start_main_~#t1109~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1109~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1109~0.base, #length] because there is no mapped edge [2019-12-07 11:40:50,106 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L816: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1110~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1110~0.base_10|) |v_ULTIMATE.start_main_~#t1110~0.offset_10| 2)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t1110~0.base_10| 0)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1110~0.base_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1110~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t1110~0.offset_10|) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1110~0.base_10|) 0) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1110~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1110~0.base=|v_ULTIMATE.start_main_~#t1110~0.base_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1110~0.offset=|v_ULTIMATE.start_main_~#t1110~0.offset_10|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1110~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1110~0.offset, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 11:40:50,107 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L4-->L789: Formula: (and (= ~y$r_buff1_thd1~0_Out-1706038656 ~y$r_buff0_thd1~0_In-1706038656) (= ~y$r_buff0_thd3~0_In-1706038656 ~y$r_buff1_thd3~0_Out-1706038656) (= ~__unbuffered_p2_EBX~0_Out-1706038656 ~a~0_In-1706038656) (= ~y$r_buff1_thd2~0_Out-1706038656 ~y$r_buff0_thd2~0_In-1706038656) (= ~__unbuffered_p2_EAX~0_Out-1706038656 ~z~0_Out-1706038656) (= 1 ~y$r_buff0_thd3~0_Out-1706038656) (not (= 0 P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1706038656)) (= 1 ~z~0_Out-1706038656) (= ~y$r_buff1_thd0~0_Out-1706038656 ~y$r_buff0_thd0~0_In-1706038656)) InVars {~a~0=~a~0_In-1706038656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1706038656, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1706038656, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1706038656, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1706038656, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1706038656} OutVars{~__unbuffered_p2_EBX~0=~__unbuffered_p2_EBX~0_Out-1706038656, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1706038656, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_Out-1706038656, ~a~0=~a~0_In-1706038656, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_Out-1706038656, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_Out-1706038656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1706038656, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1706038656, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1706038656, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1706038656, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_Out-1706038656, ~z~0=~z~0_Out-1706038656, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_Out-1706038656} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 11:40:50,107 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_8 |v_P0Thread1of1ForFork2_#in~arg.base_10|) (= v_~a~0_22 1) (= v_~x~0_29 v_~__unbuffered_p0_EAX~0_17) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_P0Thread1of1ForFork2_~arg.offset_8 |v_P0Thread1of1ForFork2_#in~arg.offset_10|) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, ~x~0=v_~x~0_29} OutVars{~a~0=v_~a~0_22, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_8, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_29, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_8} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 11:40:50,108 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L754-2-->L754-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In867550460 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In867550460 256) 0)) (.cse2 (= |P1Thread1of1ForFork0_#t~ite4_Out867550460| |P1Thread1of1ForFork0_#t~ite3_Out867550460|))) (or (and (or .cse0 .cse1) .cse2 (= ~y~0_In867550460 |P1Thread1of1ForFork0_#t~ite3_Out867550460|)) (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In867550460 |P1Thread1of1ForFork0_#t~ite3_Out867550460|) .cse2))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In867550460, ~y$w_buff1~0=~y$w_buff1~0_In867550460, ~y~0=~y~0_In867550460, ~y$w_buff1_used~0=~y$w_buff1_used~0_In867550460} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In867550460, ~y$w_buff1~0=~y$w_buff1~0_In867550460, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out867550460|, ~y~0=~y~0_In867550460, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out867550460|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In867550460} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 11:40:50,109 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In395290989 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In395290989 256)))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite11_Out395290989|) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite11_Out395290989| ~y$w_buff0_used~0_In395290989) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In395290989, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In395290989} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In395290989, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out395290989|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In395290989} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:40:50,109 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L791-->L791-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In1052906208 256))) (.cse2 (= (mod ~y$r_buff1_thd3~0_In1052906208 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1052906208 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In1052906208 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1052906208 |P2Thread1of1ForFork1_#t~ite12_Out1052906208|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork1_#t~ite12_Out1052906208|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1052906208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1052906208, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1052906208, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1052906208} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1052906208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1052906208, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1052906208, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out1052906208|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1052906208} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:40:50,110 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L792-->L793: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In837372039 256))) (.cse0 (= ~y$r_buff0_thd3~0_In837372039 ~y$r_buff0_thd3~0_Out837372039)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In837372039 256)))) (or (and .cse0 .cse1) (and (not .cse2) (= ~y$r_buff0_thd3~0_Out837372039 0) (not .cse1)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In837372039, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In837372039} OutVars{P2Thread1of1ForFork1_#t~ite13=|P2Thread1of1ForFork1_#t~ite13_Out837372039|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In837372039, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out837372039} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite13, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 11:40:50,110 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L793-->L793-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In-410413367 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-410413367 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-410413367 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-410413367 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite14_Out-410413367| ~y$r_buff1_thd3~0_In-410413367) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork1_#t~ite14_Out-410413367|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-410413367, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-410413367, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-410413367, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-410413367} OutVars{P2Thread1of1ForFork1_#t~ite14=|P2Thread1of1ForFork1_#t~ite14_Out-410413367|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-410413367, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-410413367, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-410413367, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-410413367} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:40:50,110 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L793-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_59 1) v_~__unbuffered_cnt~0_58) (= |v_P2Thread1of1ForFork1_#t~ite14_34| v_~y$r_buff1_thd3~0_55) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59} OutVars{P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_33|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_55, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 11:40:50,110 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-665162685 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-665162685 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite5_Out-665162685| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite5_Out-665162685| ~y$w_buff0_used~0_In-665162685) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-665162685, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-665162685} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-665162685, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-665162685, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out-665162685|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:40:50,111 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-553574573 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-553574573 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In-553574573 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd2~0_In-553574573 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite6_Out-553574573| ~y$w_buff1_used~0_In-553574573) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork0_#t~ite6_Out-553574573| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-553574573, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-553574573, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-553574573, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-553574573} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-553574573, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-553574573, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-553574573, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out-553574573|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-553574573} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:40:50,111 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L757-->L757-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-947984530 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-947984530 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite7_Out-947984530| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite7_Out-947984530| ~y$r_buff0_thd2~0_In-947984530) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-947984530, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-947984530} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-947984530, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-947984530, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out-947984530|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 11:40:50,111 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In1062571790 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In1062571790 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In1062571790 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1062571790 256) 0))) (or (and (= ~y$r_buff1_thd2~0_In1062571790 |P1Thread1of1ForFork0_#t~ite8_Out1062571790|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite8_Out1062571790|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1062571790, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1062571790, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1062571790, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1062571790} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1062571790, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1062571790, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1062571790, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out1062571790|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1062571790} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:40:50,111 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= v_~y$r_buff1_thd2~0_82 |v_P1Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_36|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_82, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_35|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 11:40:50,112 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L820-->L822-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_253 256)) (= (mod v_~y$r_buff0_thd0~0_142 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:40:50,112 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L822-2-->L822-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite19_Out-1940725855| |ULTIMATE.start_main_#t~ite18_Out-1940725855|)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1940725855 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-1940725855 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite18_Out-1940725855| ~y$w_buff1~0_In-1940725855) (not .cse0) .cse1 (not .cse2)) (and (= |ULTIMATE.start_main_#t~ite18_Out-1940725855| ~y~0_In-1940725855) .cse1 (or .cse2 .cse0)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1940725855, ~y~0=~y~0_In-1940725855, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1940725855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1940725855} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1940725855, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1940725855|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1940725855|, ~y~0=~y~0_In-1940725855, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1940725855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1940725855} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 11:40:50,112 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In908085915 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In908085915 256)))) (or (and (= ~y$w_buff0_used~0_In908085915 |ULTIMATE.start_main_#t~ite20_Out908085915|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out908085915|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In908085915, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In908085915} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In908085915, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In908085915, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out908085915|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 11:40:50,112 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L824-->L824-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In1234727491 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1234727491 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1234727491 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1234727491 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1234727491 |ULTIMATE.start_main_#t~ite21_Out1234727491|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |ULTIMATE.start_main_#t~ite21_Out1234727491|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1234727491, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1234727491, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1234727491, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1234727491} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1234727491, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1234727491, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1234727491|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1234727491, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1234727491} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 11:40:50,112 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L825-->L825-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-2035307960 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-2035307960 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite22_Out-2035307960|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$r_buff0_thd0~0_In-2035307960 |ULTIMATE.start_main_#t~ite22_Out-2035307960|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2035307960, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2035307960} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2035307960, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2035307960, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-2035307960|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 11:40:50,113 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L826-->L826-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-603496134 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-603496134 256))) (.cse3 (= (mod ~y$r_buff1_thd0~0_In-603496134 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-603496134 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite23_Out-603496134|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In-603496134 |ULTIMATE.start_main_#t~ite23_Out-603496134|) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-603496134, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-603496134, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-603496134, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-603496134} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-603496134, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-603496134, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-603496134, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-603496134|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-603496134} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 11:40:50,113 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2135673693 256)))) (or (and (= ~y$w_buff0~0_In-2135673693 |ULTIMATE.start_main_#t~ite29_Out-2135673693|) (= |ULTIMATE.start_main_#t~ite29_Out-2135673693| |ULTIMATE.start_main_#t~ite30_Out-2135673693|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-2135673693 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In-2135673693 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In-2135673693 256) 0) (and (= (mod ~y$r_buff1_thd0~0_In-2135673693 256) 0) .cse1)))) (and (= ~y$w_buff0~0_In-2135673693 |ULTIMATE.start_main_#t~ite30_Out-2135673693|) (not .cse0) (= |ULTIMATE.start_main_#t~ite29_In-2135673693| |ULTIMATE.start_main_#t~ite29_Out-2135673693|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2135673693, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-2135673693|, ~y$w_buff0~0=~y$w_buff0~0_In-2135673693, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2135673693, ~weak$$choice2~0=~weak$$choice2~0_In-2135673693, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2135673693, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2135673693} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-2135673693|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2135673693, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-2135673693|, ~y$w_buff0~0=~y$w_buff0~0_In-2135673693, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2135673693, ~weak$$choice2~0=~weak$$choice2~0_In-2135673693, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2135673693, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2135673693} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 11:40:50,114 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L836-->L836-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2131318104 256)))) (or (and (= |ULTIMATE.start_main_#t~ite35_Out-2131318104| ~y$w_buff0_used~0_In-2131318104) (= |ULTIMATE.start_main_#t~ite36_Out-2131318104| |ULTIMATE.start_main_#t~ite35_Out-2131318104|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-2131318104 256)))) (or (and (= (mod ~y$w_buff1_used~0_In-2131318104 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In-2131318104 256) 0) (and (= 0 (mod ~y$r_buff1_thd0~0_In-2131318104 256)) .cse1)))) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite35_In-2131318104| |ULTIMATE.start_main_#t~ite35_Out-2131318104|) (= |ULTIMATE.start_main_#t~ite36_Out-2131318104| ~y$w_buff0_used~0_In-2131318104)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2131318104, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2131318104, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-2131318104|, ~weak$$choice2~0=~weak$$choice2~0_In-2131318104, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2131318104, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2131318104} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2131318104, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2131318104, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-2131318104|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-2131318104|, ~weak$$choice2~0=~weak$$choice2~0_In-2131318104, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2131318104, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2131318104} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 11:40:50,115 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L837-->L837-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1089160880 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-1089160880 256) 0))) (or (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-1089160880 256))) (and (= 0 (mod ~y$w_buff1_used~0_In-1089160880 256)) .cse0) (= 0 (mod ~y$w_buff0_used~0_In-1089160880 256)))) (= |ULTIMATE.start_main_#t~ite38_Out-1089160880| ~y$w_buff1_used~0_In-1089160880) .cse1 (= |ULTIMATE.start_main_#t~ite39_Out-1089160880| |ULTIMATE.start_main_#t~ite38_Out-1089160880|)) (and (= |ULTIMATE.start_main_#t~ite39_Out-1089160880| ~y$w_buff1_used~0_In-1089160880) (not .cse1) (= |ULTIMATE.start_main_#t~ite38_In-1089160880| |ULTIMATE.start_main_#t~ite38_Out-1089160880|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1089160880, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1089160880, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-1089160880|, ~weak$$choice2~0=~weak$$choice2~0_In-1089160880, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1089160880, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1089160880} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1089160880, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1089160880|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1089160880, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-1089160880|, ~weak$$choice2~0=~weak$$choice2~0_In-1089160880, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1089160880, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1089160880} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 11:40:50,115 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L838-->L839: Formula: (and (not (= (mod v_~weak$$choice2~0_22 256) 0)) (= v_~y$r_buff0_thd0~0_108 v_~y$r_buff0_thd0~0_107)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_22} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 11:40:50,115 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L839-->L839-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1839037300 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite45_Out-1839037300| ~y$r_buff1_thd0~0_In-1839037300) (= |ULTIMATE.start_main_#t~ite44_In-1839037300| |ULTIMATE.start_main_#t~ite44_Out-1839037300|)) (and (= ~y$r_buff1_thd0~0_In-1839037300 |ULTIMATE.start_main_#t~ite44_Out-1839037300|) (= |ULTIMATE.start_main_#t~ite45_Out-1839037300| |ULTIMATE.start_main_#t~ite44_Out-1839037300|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1839037300 256)))) (or (= (mod ~y$w_buff0_used~0_In-1839037300 256) 0) (and (= (mod ~y$r_buff1_thd0~0_In-1839037300 256) 0) .cse1) (and .cse1 (= (mod ~y$w_buff1_used~0_In-1839037300 256) 0))))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1839037300, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1839037300, ~weak$$choice2~0=~weak$$choice2~0_In-1839037300, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1839037300, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1839037300, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In-1839037300|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1839037300, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1839037300, ~weak$$choice2~0=~weak$$choice2~0_In-1839037300, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1839037300, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1839037300|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1839037300|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1839037300} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 11:40:50,115 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L841-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_27) (= v_~y~0_103 v_~y$mem_tmp~0_13) (not (= 0 (mod v_~y$flush_delayed~0_28 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:40:50,115 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 11:40:50,165 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_49686961-f462-47b8-bf4d-e23b9966de36/bin/uautomizer/witness.graphml [2019-12-07 11:40:50,165 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:40:50,166 INFO L168 Benchmark]: Toolchain (without parser) took 14723.11 ms. Allocated memory was 1.0 GB in the beginning and 2.1 GB in the end (delta: 1.1 GB). Free memory was 940.6 MB in the beginning and 1.5 GB in the end (delta: -607.5 MB). Peak memory consumption was 453.6 MB. Max. memory is 11.5 GB. [2019-12-07 11:40:50,167 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:40:50,167 INFO L168 Benchmark]: CACSL2BoogieTranslator took 380.61 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 84.9 MB). Free memory was 940.6 MB in the beginning and 1.1 GB in the end (delta: -112.0 MB). Peak memory consumption was 22.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:40:50,167 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.24 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 11:40:50,168 INFO L168 Benchmark]: Boogie Preprocessor took 25.77 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 11:40:50,168 INFO L168 Benchmark]: RCFGBuilder took 386.49 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 992.5 MB in the end (delta: 54.8 MB). Peak memory consumption was 54.8 MB. Max. memory is 11.5 GB. [2019-12-07 11:40:50,168 INFO L168 Benchmark]: TraceAbstraction took 13821.26 ms. Allocated memory was 1.1 GB in the beginning and 2.1 GB in the end (delta: 976.2 MB). Free memory was 992.5 MB in the beginning and 1.6 GB in the end (delta: -583.0 MB). Peak memory consumption was 393.3 MB. Max. memory is 11.5 GB. [2019-12-07 11:40:50,168 INFO L168 Benchmark]: Witness Printer took 62.67 ms. Allocated memory is still 2.1 GB. Free memory was 1.6 GB in the beginning and 1.5 GB in the end (delta: 27.3 MB). Peak memory consumption was 27.3 MB. Max. memory is 11.5 GB. [2019-12-07 11:40:50,170 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 380.61 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 84.9 MB). Free memory was 940.6 MB in the beginning and 1.1 GB in the end (delta: -112.0 MB). Peak memory consumption was 22.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.24 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.77 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 386.49 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 992.5 MB in the end (delta: 54.8 MB). Peak memory consumption was 54.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13821.26 ms. Allocated memory was 1.1 GB in the beginning and 2.1 GB in the end (delta: 976.2 MB). Free memory was 992.5 MB in the beginning and 1.6 GB in the end (delta: -583.0 MB). Peak memory consumption was 393.3 MB. Max. memory is 11.5 GB. * Witness Printer took 62.67 ms. Allocated memory is still 2.1 GB. Free memory was 1.6 GB in the beginning and 1.5 GB in the end (delta: 27.3 MB). Peak memory consumption was 27.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.9s, 165 ProgramPointsBefore, 79 ProgramPointsAfterwards, 196 TransitionsBefore, 86 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 38 ConcurrentYvCompositions, 28 ChoiceCompositions, 4263 VarBasedMoverChecksPositive, 162 VarBasedMoverChecksNegative, 17 SemBasedMoverChecksPositive, 192 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 50142 CheckedPairsTotal, 117 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L812] FCALL, FORK 0 pthread_create(&t1108, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1109, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK 0 pthread_create(&t1110, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L768] 3 y$w_buff1 = y$w_buff0 [L769] 3 y$w_buff0 = 2 [L770] 3 y$w_buff1_used = y$w_buff0_used [L771] 3 y$w_buff0_used = (_Bool)1 [L789] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 x = 1 [L751] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L789] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L790] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L791] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L818] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L822] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L823] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L824] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L825] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L826] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L829] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L830] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L831] 0 y$flush_delayed = weak$$choice2 [L832] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L833] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L833] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L834] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L835] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L835] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L836] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L837] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L839] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L840] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 156 locations, 2 error locations. Result: UNSAFE, OverallTime: 13.6s, OverallIterations: 16, TraceHistogramMax: 1, AutomataDifference: 3.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1804 SDtfs, 2195 SDslu, 4032 SDs, 0 SdLazy, 2313 SolverSat, 171 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 133 GetRequests, 18 SyntacticMatches, 13 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=31188occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.6s AutomataMinimizationTime, 15 MinimizatonAttempts, 36013 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 573 NumberOfCodeBlocks, 573 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 501 ConstructedInterpolants, 0 QuantifiedInterpolants, 83557 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 15 InterpolantComputations, 15 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...