./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix042_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix042_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9ebd609ae74dce01544f52ff0ae5ec12f4ab21f9 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:31:34,031 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:31:34,032 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:31:34,040 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:31:34,040 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:31:34,041 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:31:34,042 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:31:34,043 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:31:34,044 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:31:34,045 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:31:34,045 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:31:34,046 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:31:34,046 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:31:34,047 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:31:34,048 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:31:34,049 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:31:34,049 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:31:34,050 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:31:34,051 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:31:34,053 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:31:34,054 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:31:34,055 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:31:34,055 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:31:34,056 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:31:34,057 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:31:34,058 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:31:34,058 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:31:34,058 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:31:34,059 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:31:34,059 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:31:34,059 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:31:34,060 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:31:34,060 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:31:34,060 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:31:34,061 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:31:34,061 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:31:34,062 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:31:34,062 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:31:34,062 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:31:34,062 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:31:34,063 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:31:34,063 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 15:31:34,072 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:31:34,072 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:31:34,073 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 15:31:34,073 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 15:31:34,073 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 15:31:34,073 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:31:34,074 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:31:34,074 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:31:34,074 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:31:34,074 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:31:34,074 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:31:34,074 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:31:34,074 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:31:34,074 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:31:34,075 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:31:34,075 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:31:34,075 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:31:34,075 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:31:34,075 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 15:31:34,075 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:31:34,075 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:31:34,075 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:31:34,076 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:31:34,076 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:31:34,076 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:31:34,076 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 15:31:34,076 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:31:34,076 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:31:34,076 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:31:34,076 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9ebd609ae74dce01544f52ff0ae5ec12f4ab21f9 [2019-12-07 15:31:34,179 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:31:34,189 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:31:34,192 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:31:34,193 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:31:34,193 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:31:34,194 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix042_pso.oepc.i [2019-12-07 15:31:34,235 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/data/a954b9f53/9af52869380a4bc09acc429d4b42fadb/FLAGf65a28da8 [2019-12-07 15:31:34,751 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:31:34,752 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/sv-benchmarks/c/pthread-wmm/mix042_pso.oepc.i [2019-12-07 15:31:34,763 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/data/a954b9f53/9af52869380a4bc09acc429d4b42fadb/FLAGf65a28da8 [2019-12-07 15:31:35,267 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/data/a954b9f53/9af52869380a4bc09acc429d4b42fadb [2019-12-07 15:31:35,269 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:31:35,270 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:31:35,271 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:31:35,271 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:31:35,273 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:31:35,274 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:31:35" (1/1) ... [2019-12-07 15:31:35,276 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@756d5c51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35, skipping insertion in model container [2019-12-07 15:31:35,276 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:31:35" (1/1) ... [2019-12-07 15:31:35,282 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:31:35,313 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:31:35,559 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:31:35,567 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:31:35,610 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:31:35,657 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:31:35,658 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35 WrapperNode [2019-12-07 15:31:35,658 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:31:35,658 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:31:35,658 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:31:35,658 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:31:35,664 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35" (1/1) ... [2019-12-07 15:31:35,678 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35" (1/1) ... [2019-12-07 15:31:35,697 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:31:35,697 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:31:35,697 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:31:35,697 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:31:35,704 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35" (1/1) ... [2019-12-07 15:31:35,704 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35" (1/1) ... [2019-12-07 15:31:35,707 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35" (1/1) ... [2019-12-07 15:31:35,708 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35" (1/1) ... [2019-12-07 15:31:35,715 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35" (1/1) ... [2019-12-07 15:31:35,718 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35" (1/1) ... [2019-12-07 15:31:35,720 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35" (1/1) ... [2019-12-07 15:31:35,724 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:31:35,724 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:31:35,724 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:31:35,724 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:31:35,725 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:31:35,767 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:31:35,767 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:31:35,767 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:31:35,767 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:31:35,767 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:31:35,767 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:31:35,768 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:31:35,768 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:31:35,768 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:31:35,768 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:31:35,768 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:31:35,768 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:31:35,768 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:31:35,769 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:31:36,131 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:31:36,131 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:31:36,132 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:31:36 BoogieIcfgContainer [2019-12-07 15:31:36,132 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:31:36,132 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:31:36,133 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:31:36,134 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:31:36,135 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:31:35" (1/3) ... [2019-12-07 15:31:36,135 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ba6ef2b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:31:36, skipping insertion in model container [2019-12-07 15:31:36,135 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:31:35" (2/3) ... [2019-12-07 15:31:36,135 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ba6ef2b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:31:36, skipping insertion in model container [2019-12-07 15:31:36,136 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:31:36" (3/3) ... [2019-12-07 15:31:36,137 INFO L109 eAbstractionObserver]: Analyzing ICFG mix042_pso.oepc.i [2019-12-07 15:31:36,143 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:31:36,143 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:31:36,148 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:31:36,149 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:31:36,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,174 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,174 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,174 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,174 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,175 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,175 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,175 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,176 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,177 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,178 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,178 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,178 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,178 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,178 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,178 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,179 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,179 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,179 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,180 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,181 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,182 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,182 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,182 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,183 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,183 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,183 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,185 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,192 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,193 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:31:36,206 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 15:31:36,218 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:31:36,218 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:31:36,218 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:31:36,218 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:31:36,218 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:31:36,218 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:31:36,218 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:31:36,219 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:31:36,229 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 15:31:36,230 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 15:31:36,288 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 15:31:36,288 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:31:36,299 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:31:36,315 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 15:31:36,346 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 15:31:36,346 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:31:36,351 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:31:36,367 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 15:31:36,368 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:31:39,311 WARN L192 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 15:31:39,635 WARN L192 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 15:31:39,742 INFO L206 etLargeBlockEncoding]: Checked pairs total: 87212 [2019-12-07 15:31:39,742 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 15:31:39,744 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 15:31:51,597 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 15:31:51,598 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 15:31:51,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 15:31:51,602 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:31:51,602 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 15:31:51,602 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:31:51,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:31:51,606 INFO L82 PathProgramCache]: Analyzing trace with hash 919766, now seen corresponding path program 1 times [2019-12-07 15:31:51,611 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:31:51,612 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950587953] [2019-12-07 15:31:51,612 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:31:51,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:31:51,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:31:51,739 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1950587953] [2019-12-07 15:31:51,739 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:31:51,740 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:31:51,740 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1505849419] [2019-12-07 15:31:51,743 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:31:51,743 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:31:51,752 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:31:51,753 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:31:51,754 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 15:31:52,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:31:52,497 INFO L93 Difference]: Finished difference Result 101544 states and 430594 transitions. [2019-12-07 15:31:52,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:31:52,498 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 15:31:52,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:31:52,897 INFO L225 Difference]: With dead ends: 101544 [2019-12-07 15:31:52,897 INFO L226 Difference]: Without dead ends: 95304 [2019-12-07 15:31:52,898 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:31:55,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95304 states. [2019-12-07 15:31:57,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95304 to 95304. [2019-12-07 15:31:57,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95304 states. [2019-12-07 15:31:57,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95304 states to 95304 states and 403554 transitions. [2019-12-07 15:31:57,519 INFO L78 Accepts]: Start accepts. Automaton has 95304 states and 403554 transitions. Word has length 3 [2019-12-07 15:31:57,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:31:57,519 INFO L462 AbstractCegarLoop]: Abstraction has 95304 states and 403554 transitions. [2019-12-07 15:31:57,519 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:31:57,520 INFO L276 IsEmpty]: Start isEmpty. Operand 95304 states and 403554 transitions. [2019-12-07 15:31:57,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:31:57,523 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:31:57,523 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:31:57,523 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:31:57,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:31:57,523 INFO L82 PathProgramCache]: Analyzing trace with hash -1982627867, now seen corresponding path program 1 times [2019-12-07 15:31:57,524 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:31:57,524 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [137407056] [2019-12-07 15:31:57,524 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:31:57,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:31:57,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:31:57,584 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [137407056] [2019-12-07 15:31:57,584 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:31:57,585 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:31:57,585 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1643434878] [2019-12-07 15:31:57,586 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:31:57,586 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:31:57,586 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:31:57,586 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:31:57,586 INFO L87 Difference]: Start difference. First operand 95304 states and 403554 transitions. Second operand 4 states. [2019-12-07 15:32:00,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:32:00,223 INFO L93 Difference]: Finished difference Result 152040 states and 617140 transitions. [2019-12-07 15:32:00,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:32:00,224 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 15:32:00,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:32:00,600 INFO L225 Difference]: With dead ends: 152040 [2019-12-07 15:32:00,600 INFO L226 Difference]: Without dead ends: 151991 [2019-12-07 15:32:00,601 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:32:04,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151991 states. [2019-12-07 15:32:06,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151991 to 137801. [2019-12-07 15:32:06,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137801 states. [2019-12-07 15:32:06,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137801 states to 137801 states and 566928 transitions. [2019-12-07 15:32:06,712 INFO L78 Accepts]: Start accepts. Automaton has 137801 states and 566928 transitions. Word has length 11 [2019-12-07 15:32:06,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:32:06,712 INFO L462 AbstractCegarLoop]: Abstraction has 137801 states and 566928 transitions. [2019-12-07 15:32:06,712 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:32:06,712 INFO L276 IsEmpty]: Start isEmpty. Operand 137801 states and 566928 transitions. [2019-12-07 15:32:06,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:32:06,717 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:32:06,718 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:32:06,718 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:32:06,718 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:32:06,718 INFO L82 PathProgramCache]: Analyzing trace with hash -1673757482, now seen corresponding path program 1 times [2019-12-07 15:32:06,718 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:32:06,718 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1202364196] [2019-12-07 15:32:06,718 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:32:06,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:32:06,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:32:06,770 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1202364196] [2019-12-07 15:32:06,770 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:32:06,770 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:32:06,770 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [340625133] [2019-12-07 15:32:06,770 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:32:06,770 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:32:06,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:32:06,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:32:06,771 INFO L87 Difference]: Start difference. First operand 137801 states and 566928 transitions. Second operand 4 states. [2019-12-07 15:32:07,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:32:07,776 INFO L93 Difference]: Finished difference Result 197752 states and 794963 transitions. [2019-12-07 15:32:07,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:32:07,777 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 15:32:07,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:32:08,287 INFO L225 Difference]: With dead ends: 197752 [2019-12-07 15:32:08,288 INFO L226 Difference]: Without dead ends: 197696 [2019-12-07 15:32:08,288 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:32:12,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197696 states. [2019-12-07 15:32:16,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197696 to 164675. [2019-12-07 15:32:16,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164675 states. [2019-12-07 15:32:17,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164675 states to 164675 states and 674105 transitions. [2019-12-07 15:32:17,317 INFO L78 Accepts]: Start accepts. Automaton has 164675 states and 674105 transitions. Word has length 13 [2019-12-07 15:32:17,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:32:17,318 INFO L462 AbstractCegarLoop]: Abstraction has 164675 states and 674105 transitions. [2019-12-07 15:32:17,318 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:32:17,318 INFO L276 IsEmpty]: Start isEmpty. Operand 164675 states and 674105 transitions. [2019-12-07 15:32:17,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:32:17,325 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:32:17,325 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:32:17,325 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:32:17,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:32:17,326 INFO L82 PathProgramCache]: Analyzing trace with hash 841711145, now seen corresponding path program 1 times [2019-12-07 15:32:17,326 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:32:17,326 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1477510509] [2019-12-07 15:32:17,326 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:32:17,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:32:17,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:32:17,381 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1477510509] [2019-12-07 15:32:17,381 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:32:17,381 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:32:17,381 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [391618816] [2019-12-07 15:32:17,382 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:32:17,382 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:32:17,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:32:17,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:32:17,382 INFO L87 Difference]: Start difference. First operand 164675 states and 674105 transitions. Second operand 4 states. [2019-12-07 15:32:18,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:32:18,400 INFO L93 Difference]: Finished difference Result 202675 states and 826980 transitions. [2019-12-07 15:32:18,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:32:18,400 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 15:32:18,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:32:18,948 INFO L225 Difference]: With dead ends: 202675 [2019-12-07 15:32:18,949 INFO L226 Difference]: Without dead ends: 202675 [2019-12-07 15:32:18,949 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:32:23,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202675 states. [2019-12-07 15:32:27,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202675 to 172880. [2019-12-07 15:32:27,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172880 states. [2019-12-07 15:32:28,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172880 states to 172880 states and 708759 transitions. [2019-12-07 15:32:28,408 INFO L78 Accepts]: Start accepts. Automaton has 172880 states and 708759 transitions. Word has length 16 [2019-12-07 15:32:28,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:32:28,408 INFO L462 AbstractCegarLoop]: Abstraction has 172880 states and 708759 transitions. [2019-12-07 15:32:28,409 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:32:28,409 INFO L276 IsEmpty]: Start isEmpty. Operand 172880 states and 708759 transitions. [2019-12-07 15:32:28,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:32:28,424 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:32:28,425 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:32:28,425 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:32:28,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:32:28,425 INFO L82 PathProgramCache]: Analyzing trace with hash -118269295, now seen corresponding path program 1 times [2019-12-07 15:32:28,425 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:32:28,426 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210212335] [2019-12-07 15:32:28,426 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:32:28,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:32:28,471 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:32:28,471 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210212335] [2019-12-07 15:32:28,471 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:32:28,471 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:32:28,471 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1563570296] [2019-12-07 15:32:28,471 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:32:28,471 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:32:28,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:32:28,472 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:32:28,472 INFO L87 Difference]: Start difference. First operand 172880 states and 708759 transitions. Second operand 3 states. [2019-12-07 15:32:29,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:32:29,193 INFO L93 Difference]: Finished difference Result 172880 states and 701423 transitions. [2019-12-07 15:32:29,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:32:29,194 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:32:29,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:32:30,057 INFO L225 Difference]: With dead ends: 172880 [2019-12-07 15:32:30,057 INFO L226 Difference]: Without dead ends: 172880 [2019-12-07 15:32:30,058 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:32:33,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172880 states. [2019-12-07 15:32:36,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172880 to 169888. [2019-12-07 15:32:36,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169888 states. [2019-12-07 15:32:36,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169888 states to 169888 states and 690365 transitions. [2019-12-07 15:32:36,684 INFO L78 Accepts]: Start accepts. Automaton has 169888 states and 690365 transitions. Word has length 18 [2019-12-07 15:32:36,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:32:36,685 INFO L462 AbstractCegarLoop]: Abstraction has 169888 states and 690365 transitions. [2019-12-07 15:32:36,685 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:32:36,685 INFO L276 IsEmpty]: Start isEmpty. Operand 169888 states and 690365 transitions. [2019-12-07 15:32:36,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:32:36,695 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:32:36,695 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:32:36,696 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:32:36,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:32:36,696 INFO L82 PathProgramCache]: Analyzing trace with hash -1648132992, now seen corresponding path program 1 times [2019-12-07 15:32:36,696 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:32:36,696 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374161250] [2019-12-07 15:32:36,696 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:32:36,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:32:36,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:32:36,755 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374161250] [2019-12-07 15:32:36,756 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:32:36,756 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:32:36,756 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2126405618] [2019-12-07 15:32:36,756 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:32:36,756 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:32:36,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:32:36,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:32:36,757 INFO L87 Difference]: Start difference. First operand 169888 states and 690365 transitions. Second operand 3 states. [2019-12-07 15:32:38,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:32:38,293 INFO L93 Difference]: Finished difference Result 304647 states and 1231111 transitions. [2019-12-07 15:32:38,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:32:38,294 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:32:38,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:32:38,974 INFO L225 Difference]: With dead ends: 304647 [2019-12-07 15:32:38,974 INFO L226 Difference]: Without dead ends: 274692 [2019-12-07 15:32:38,975 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:32:43,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274692 states. [2019-12-07 15:32:50,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274692 to 263687. [2019-12-07 15:32:50,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263687 states. [2019-12-07 15:32:51,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263687 states to 263687 states and 1073672 transitions. [2019-12-07 15:32:51,584 INFO L78 Accepts]: Start accepts. Automaton has 263687 states and 1073672 transitions. Word has length 18 [2019-12-07 15:32:51,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:32:51,584 INFO L462 AbstractCegarLoop]: Abstraction has 263687 states and 1073672 transitions. [2019-12-07 15:32:51,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:32:51,585 INFO L276 IsEmpty]: Start isEmpty. Operand 263687 states and 1073672 transitions. [2019-12-07 15:32:51,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 15:32:51,602 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:32:51,602 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:32:51,602 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:32:51,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:32:51,602 INFO L82 PathProgramCache]: Analyzing trace with hash -2120254288, now seen corresponding path program 1 times [2019-12-07 15:32:51,602 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:32:51,602 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843072050] [2019-12-07 15:32:51,602 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:32:51,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:32:51,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:32:51,650 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [843072050] [2019-12-07 15:32:51,650 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:32:51,650 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:32:51,650 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1884776296] [2019-12-07 15:32:51,650 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:32:51,650 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:32:51,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:32:51,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:32:51,651 INFO L87 Difference]: Start difference. First operand 263687 states and 1073672 transitions. Second operand 5 states. [2019-12-07 15:32:54,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:32:54,043 INFO L93 Difference]: Finished difference Result 373599 states and 1495536 transitions. [2019-12-07 15:32:54,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:32:54,044 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 15:32:54,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:32:54,912 INFO L225 Difference]: With dead ends: 373599 [2019-12-07 15:32:54,912 INFO L226 Difference]: Without dead ends: 373508 [2019-12-07 15:32:54,912 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:33:03,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 373508 states. [2019-12-07 15:33:07,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 373508 to 280739. [2019-12-07 15:33:07,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 280739 states. [2019-12-07 15:33:08,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280739 states to 280739 states and 1142715 transitions. [2019-12-07 15:33:08,902 INFO L78 Accepts]: Start accepts. Automaton has 280739 states and 1142715 transitions. Word has length 19 [2019-12-07 15:33:08,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:08,902 INFO L462 AbstractCegarLoop]: Abstraction has 280739 states and 1142715 transitions. [2019-12-07 15:33:08,902 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:33:08,903 INFO L276 IsEmpty]: Start isEmpty. Operand 280739 states and 1142715 transitions. [2019-12-07 15:33:08,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 15:33:08,922 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:08,922 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:08,922 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:08,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:08,922 INFO L82 PathProgramCache]: Analyzing trace with hash -1816797933, now seen corresponding path program 1 times [2019-12-07 15:33:08,923 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:08,923 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1527363060] [2019-12-07 15:33:08,923 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:08,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:08,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:08,949 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1527363060] [2019-12-07 15:33:08,949 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:08,949 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:33:08,950 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1781412606] [2019-12-07 15:33:08,950 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:33:08,950 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:08,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:33:08,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:08,950 INFO L87 Difference]: Start difference. First operand 280739 states and 1142715 transitions. Second operand 3 states. [2019-12-07 15:33:09,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:09,113 INFO L93 Difference]: Finished difference Result 53665 states and 173016 transitions. [2019-12-07 15:33:09,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:33:09,114 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 15:33:09,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:09,195 INFO L225 Difference]: With dead ends: 53665 [2019-12-07 15:33:09,195 INFO L226 Difference]: Without dead ends: 53665 [2019-12-07 15:33:09,196 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:09,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53665 states. [2019-12-07 15:33:09,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53665 to 53665. [2019-12-07 15:33:09,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53665 states. [2019-12-07 15:33:10,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53665 states to 53665 states and 173016 transitions. [2019-12-07 15:33:10,438 INFO L78 Accepts]: Start accepts. Automaton has 53665 states and 173016 transitions. Word has length 19 [2019-12-07 15:33:10,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:10,438 INFO L462 AbstractCegarLoop]: Abstraction has 53665 states and 173016 transitions. [2019-12-07 15:33:10,438 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:33:10,438 INFO L276 IsEmpty]: Start isEmpty. Operand 53665 states and 173016 transitions. [2019-12-07 15:33:10,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:33:10,445 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:10,446 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:10,446 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:10,446 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:10,446 INFO L82 PathProgramCache]: Analyzing trace with hash 361242897, now seen corresponding path program 1 times [2019-12-07 15:33:10,446 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:10,446 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502597149] [2019-12-07 15:33:10,446 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:10,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:10,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:10,486 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502597149] [2019-12-07 15:33:10,487 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:10,487 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:33:10,487 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899687377] [2019-12-07 15:33:10,487 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:33:10,487 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:10,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:33:10,488 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:33:10,488 INFO L87 Difference]: Start difference. First operand 53665 states and 173016 transitions. Second operand 5 states. [2019-12-07 15:33:10,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:10,942 INFO L93 Difference]: Finished difference Result 69238 states and 220186 transitions. [2019-12-07 15:33:10,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:33:10,943 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 15:33:10,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:11,043 INFO L225 Difference]: With dead ends: 69238 [2019-12-07 15:33:11,043 INFO L226 Difference]: Without dead ends: 69231 [2019-12-07 15:33:11,043 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:33:11,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69231 states. [2019-12-07 15:33:11,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69231 to 55440. [2019-12-07 15:33:11,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55440 states. [2019-12-07 15:33:12,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55440 states to 55440 states and 178240 transitions. [2019-12-07 15:33:12,005 INFO L78 Accepts]: Start accepts. Automaton has 55440 states and 178240 transitions. Word has length 22 [2019-12-07 15:33:12,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:12,005 INFO L462 AbstractCegarLoop]: Abstraction has 55440 states and 178240 transitions. [2019-12-07 15:33:12,005 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:33:12,005 INFO L276 IsEmpty]: Start isEmpty. Operand 55440 states and 178240 transitions. [2019-12-07 15:33:12,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:33:12,024 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:12,024 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:12,024 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:12,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:12,025 INFO L82 PathProgramCache]: Analyzing trace with hash -1429942457, now seen corresponding path program 1 times [2019-12-07 15:33:12,025 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:12,025 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086331984] [2019-12-07 15:33:12,025 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:12,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:12,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:12,055 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2086331984] [2019-12-07 15:33:12,055 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:12,055 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:33:12,055 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1193449464] [2019-12-07 15:33:12,055 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:33:12,055 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:12,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:33:12,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:12,056 INFO L87 Difference]: Start difference. First operand 55440 states and 178240 transitions. Second operand 3 states. [2019-12-07 15:33:12,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:12,267 INFO L93 Difference]: Finished difference Result 74468 states and 236258 transitions. [2019-12-07 15:33:12,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:33:12,268 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 15:33:12,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:12,377 INFO L225 Difference]: With dead ends: 74468 [2019-12-07 15:33:12,377 INFO L226 Difference]: Without dead ends: 74468 [2019-12-07 15:33:12,377 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:12,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74468 states. [2019-12-07 15:33:13,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74468 to 59666. [2019-12-07 15:33:13,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59666 states. [2019-12-07 15:33:13,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59666 states to 59666 states and 190794 transitions. [2019-12-07 15:33:13,800 INFO L78 Accepts]: Start accepts. Automaton has 59666 states and 190794 transitions. Word has length 27 [2019-12-07 15:33:13,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:13,801 INFO L462 AbstractCegarLoop]: Abstraction has 59666 states and 190794 transitions. [2019-12-07 15:33:13,801 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:33:13,801 INFO L276 IsEmpty]: Start isEmpty. Operand 59666 states and 190794 transitions. [2019-12-07 15:33:13,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:33:13,820 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:13,820 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:13,820 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:13,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:13,821 INFO L82 PathProgramCache]: Analyzing trace with hash -535275942, now seen corresponding path program 1 times [2019-12-07 15:33:13,821 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:13,821 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209771149] [2019-12-07 15:33:13,821 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:13,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:13,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:13,841 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [209771149] [2019-12-07 15:33:13,842 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:13,842 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:33:13,842 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127902116] [2019-12-07 15:33:13,842 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:33:13,842 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:13,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:33:13,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:13,843 INFO L87 Difference]: Start difference. First operand 59666 states and 190794 transitions. Second operand 3 states. [2019-12-07 15:33:14,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:14,072 INFO L93 Difference]: Finished difference Result 82364 states and 257344 transitions. [2019-12-07 15:33:14,073 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:33:14,073 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 15:33:14,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:14,193 INFO L225 Difference]: With dead ends: 82364 [2019-12-07 15:33:14,193 INFO L226 Difference]: Without dead ends: 82364 [2019-12-07 15:33:14,194 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:14,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82364 states. [2019-12-07 15:33:15,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82364 to 67562. [2019-12-07 15:33:15,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67562 states. [2019-12-07 15:33:15,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67562 states to 67562 states and 211880 transitions. [2019-12-07 15:33:15,453 INFO L78 Accepts]: Start accepts. Automaton has 67562 states and 211880 transitions. Word has length 27 [2019-12-07 15:33:15,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:15,453 INFO L462 AbstractCegarLoop]: Abstraction has 67562 states and 211880 transitions. [2019-12-07 15:33:15,453 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:33:15,453 INFO L276 IsEmpty]: Start isEmpty. Operand 67562 states and 211880 transitions. [2019-12-07 15:33:15,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:33:15,470 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:15,470 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:15,471 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:15,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:15,471 INFO L82 PathProgramCache]: Analyzing trace with hash 1457952739, now seen corresponding path program 1 times [2019-12-07 15:33:15,471 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:15,471 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025591226] [2019-12-07 15:33:15,471 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:15,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:15,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:15,517 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025591226] [2019-12-07 15:33:15,517 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:15,517 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:33:15,517 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1298354621] [2019-12-07 15:33:15,518 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:33:15,518 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:15,518 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:33:15,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:33:15,518 INFO L87 Difference]: Start difference. First operand 67562 states and 211880 transitions. Second operand 6 states. [2019-12-07 15:33:16,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:16,108 INFO L93 Difference]: Finished difference Result 119840 states and 373608 transitions. [2019-12-07 15:33:16,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:33:16,108 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 15:33:16,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:16,298 INFO L225 Difference]: With dead ends: 119840 [2019-12-07 15:33:16,299 INFO L226 Difference]: Without dead ends: 119821 [2019-12-07 15:33:16,299 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:33:16,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119821 states. [2019-12-07 15:33:17,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119821 to 70154. [2019-12-07 15:33:17,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70154 states. [2019-12-07 15:33:17,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70154 states to 70154 states and 219653 transitions. [2019-12-07 15:33:17,926 INFO L78 Accepts]: Start accepts. Automaton has 70154 states and 219653 transitions. Word has length 27 [2019-12-07 15:33:17,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:17,927 INFO L462 AbstractCegarLoop]: Abstraction has 70154 states and 219653 transitions. [2019-12-07 15:33:17,927 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:33:17,927 INFO L276 IsEmpty]: Start isEmpty. Operand 70154 states and 219653 transitions. [2019-12-07 15:33:17,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 15:33:17,943 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:17,943 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:17,943 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:17,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:17,943 INFO L82 PathProgramCache]: Analyzing trace with hash 294567066, now seen corresponding path program 1 times [2019-12-07 15:33:17,943 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:17,943 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541135815] [2019-12-07 15:33:17,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:17,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:17,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:17,999 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541135815] [2019-12-07 15:33:17,999 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:17,999 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:33:18,000 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [63533756] [2019-12-07 15:33:18,000 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:33:18,000 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:18,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:33:18,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:33:18,001 INFO L87 Difference]: Start difference. First operand 70154 states and 219653 transitions. Second operand 6 states. [2019-12-07 15:33:18,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:18,628 INFO L93 Difference]: Finished difference Result 108380 states and 335584 transitions. [2019-12-07 15:33:18,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:33:18,629 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 15:33:18,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:18,800 INFO L225 Difference]: With dead ends: 108380 [2019-12-07 15:33:18,800 INFO L226 Difference]: Without dead ends: 108358 [2019-12-07 15:33:18,801 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:33:19,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108358 states. [2019-12-07 15:33:20,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108358 to 69924. [2019-12-07 15:33:20,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69924 states. [2019-12-07 15:33:20,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69924 states to 69924 states and 218886 transitions. [2019-12-07 15:33:20,177 INFO L78 Accepts]: Start accepts. Automaton has 69924 states and 218886 transitions. Word has length 28 [2019-12-07 15:33:20,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:20,177 INFO L462 AbstractCegarLoop]: Abstraction has 69924 states and 218886 transitions. [2019-12-07 15:33:20,177 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:33:20,177 INFO L276 IsEmpty]: Start isEmpty. Operand 69924 states and 218886 transitions. [2019-12-07 15:33:20,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 15:33:20,196 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:20,196 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:20,196 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:20,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:20,197 INFO L82 PathProgramCache]: Analyzing trace with hash 1921906081, now seen corresponding path program 1 times [2019-12-07 15:33:20,197 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:20,197 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114860351] [2019-12-07 15:33:20,197 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:20,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:20,378 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:20,379 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114860351] [2019-12-07 15:33:20,379 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:20,379 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:33:20,379 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [615351852] [2019-12-07 15:33:20,379 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:33:20,380 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:20,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:33:20,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:33:20,380 INFO L87 Difference]: Start difference. First operand 69924 states and 218886 transitions. Second operand 4 states. [2019-12-07 15:33:20,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:20,467 INFO L93 Difference]: Finished difference Result 26930 states and 80863 transitions. [2019-12-07 15:33:20,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:33:20,467 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 15:33:20,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:20,500 INFO L225 Difference]: With dead ends: 26930 [2019-12-07 15:33:20,500 INFO L226 Difference]: Without dead ends: 26930 [2019-12-07 15:33:20,501 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:33:20,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26930 states. [2019-12-07 15:33:20,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26930 to 24571. [2019-12-07 15:33:20,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24571 states. [2019-12-07 15:33:20,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24571 states to 24571 states and 73801 transitions. [2019-12-07 15:33:20,854 INFO L78 Accepts]: Start accepts. Automaton has 24571 states and 73801 transitions. Word has length 29 [2019-12-07 15:33:20,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:20,854 INFO L462 AbstractCegarLoop]: Abstraction has 24571 states and 73801 transitions. [2019-12-07 15:33:20,854 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:33:20,854 INFO L276 IsEmpty]: Start isEmpty. Operand 24571 states and 73801 transitions. [2019-12-07 15:33:20,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:33:20,873 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:20,873 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:20,873 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:20,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:20,873 INFO L82 PathProgramCache]: Analyzing trace with hash 1705939963, now seen corresponding path program 1 times [2019-12-07 15:33:20,873 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:20,874 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1352154227] [2019-12-07 15:33:20,874 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:20,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:20,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:20,926 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1352154227] [2019-12-07 15:33:20,926 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:20,926 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:33:20,926 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034765513] [2019-12-07 15:33:20,926 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:33:20,926 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:20,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:33:20,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:33:20,927 INFO L87 Difference]: Start difference. First operand 24571 states and 73801 transitions. Second operand 7 states. [2019-12-07 15:33:21,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:21,656 INFO L93 Difference]: Finished difference Result 45162 states and 133533 transitions. [2019-12-07 15:33:21,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:33:21,656 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 15:33:21,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:21,704 INFO L225 Difference]: With dead ends: 45162 [2019-12-07 15:33:21,704 INFO L226 Difference]: Without dead ends: 45162 [2019-12-07 15:33:21,704 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:33:21,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45162 states. [2019-12-07 15:33:22,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45162 to 25135. [2019-12-07 15:33:22,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25135 states. [2019-12-07 15:33:22,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25135 states to 25135 states and 75533 transitions. [2019-12-07 15:33:22,198 INFO L78 Accepts]: Start accepts. Automaton has 25135 states and 75533 transitions. Word has length 33 [2019-12-07 15:33:22,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:22,198 INFO L462 AbstractCegarLoop]: Abstraction has 25135 states and 75533 transitions. [2019-12-07 15:33:22,199 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:33:22,199 INFO L276 IsEmpty]: Start isEmpty. Operand 25135 states and 75533 transitions. [2019-12-07 15:33:22,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:33:22,216 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:22,217 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:22,217 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:22,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:22,217 INFO L82 PathProgramCache]: Analyzing trace with hash 1567643153, now seen corresponding path program 2 times [2019-12-07 15:33:22,217 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:22,217 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [925083754] [2019-12-07 15:33:22,217 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:22,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:22,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:22,284 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [925083754] [2019-12-07 15:33:22,284 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:22,284 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:33:22,284 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1908339734] [2019-12-07 15:33:22,285 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:33:22,285 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:22,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:33:22,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:33:22,285 INFO L87 Difference]: Start difference. First operand 25135 states and 75533 transitions. Second operand 8 states. [2019-12-07 15:33:23,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:23,317 INFO L93 Difference]: Finished difference Result 54325 states and 158963 transitions. [2019-12-07 15:33:23,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 15:33:23,317 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 15:33:23,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:23,383 INFO L225 Difference]: With dead ends: 54325 [2019-12-07 15:33:23,383 INFO L226 Difference]: Without dead ends: 54325 [2019-12-07 15:33:23,383 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 154 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:33:23,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54325 states. [2019-12-07 15:33:23,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54325 to 24978. [2019-12-07 15:33:23,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24978 states. [2019-12-07 15:33:23,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24978 states to 24978 states and 75056 transitions. [2019-12-07 15:33:23,985 INFO L78 Accepts]: Start accepts. Automaton has 24978 states and 75056 transitions. Word has length 33 [2019-12-07 15:33:23,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:23,986 INFO L462 AbstractCegarLoop]: Abstraction has 24978 states and 75056 transitions. [2019-12-07 15:33:23,986 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:33:23,986 INFO L276 IsEmpty]: Start isEmpty. Operand 24978 states and 75056 transitions. [2019-12-07 15:33:24,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 15:33:24,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:24,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:24,005 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:24,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:24,005 INFO L82 PathProgramCache]: Analyzing trace with hash -607763582, now seen corresponding path program 1 times [2019-12-07 15:33:24,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:24,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [451492783] [2019-12-07 15:33:24,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:24,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:24,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:24,068 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [451492783] [2019-12-07 15:33:24,068 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:24,068 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:33:24,068 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [674927324] [2019-12-07 15:33:24,069 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:33:24,069 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:24,069 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:33:24,069 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:33:24,069 INFO L87 Difference]: Start difference. First operand 24978 states and 75056 transitions. Second operand 7 states. [2019-12-07 15:33:24,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:24,865 INFO L93 Difference]: Finished difference Result 40661 states and 119586 transitions. [2019-12-07 15:33:24,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:33:24,866 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 15:33:24,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:24,911 INFO L225 Difference]: With dead ends: 40661 [2019-12-07 15:33:24,912 INFO L226 Difference]: Without dead ends: 40661 [2019-12-07 15:33:24,912 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:33:25,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40661 states. [2019-12-07 15:33:25,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40661 to 24403. [2019-12-07 15:33:25,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24403 states. [2019-12-07 15:33:25,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24403 states to 24403 states and 73369 transitions. [2019-12-07 15:33:25,367 INFO L78 Accepts]: Start accepts. Automaton has 24403 states and 73369 transitions. Word has length 34 [2019-12-07 15:33:25,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:25,367 INFO L462 AbstractCegarLoop]: Abstraction has 24403 states and 73369 transitions. [2019-12-07 15:33:25,367 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:33:25,367 INFO L276 IsEmpty]: Start isEmpty. Operand 24403 states and 73369 transitions. [2019-12-07 15:33:25,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 15:33:25,385 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:25,385 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:25,385 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:25,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:25,385 INFO L82 PathProgramCache]: Analyzing trace with hash 846412022, now seen corresponding path program 2 times [2019-12-07 15:33:25,385 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:25,386 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [960232834] [2019-12-07 15:33:25,386 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:25,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:25,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:25,469 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [960232834] [2019-12-07 15:33:25,469 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:25,469 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:33:25,469 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [873374751] [2019-12-07 15:33:25,470 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:33:25,470 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:25,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:33:25,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:33:25,470 INFO L87 Difference]: Start difference. First operand 24403 states and 73369 transitions. Second operand 8 states. [2019-12-07 15:33:26,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:26,323 INFO L93 Difference]: Finished difference Result 49838 states and 145015 transitions. [2019-12-07 15:33:26,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 15:33:26,323 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 15:33:26,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:26,380 INFO L225 Difference]: With dead ends: 49838 [2019-12-07 15:33:26,381 INFO L226 Difference]: Without dead ends: 49838 [2019-12-07 15:33:26,381 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:33:26,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49838 states. [2019-12-07 15:33:26,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49838 to 24249. [2019-12-07 15:33:26,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24249 states. [2019-12-07 15:33:26,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24249 states to 24249 states and 72901 transitions. [2019-12-07 15:33:26,880 INFO L78 Accepts]: Start accepts. Automaton has 24249 states and 72901 transitions. Word has length 34 [2019-12-07 15:33:26,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:26,881 INFO L462 AbstractCegarLoop]: Abstraction has 24249 states and 72901 transitions. [2019-12-07 15:33:26,881 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:33:26,881 INFO L276 IsEmpty]: Start isEmpty. Operand 24249 states and 72901 transitions. [2019-12-07 15:33:26,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 15:33:26,898 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:26,898 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:26,898 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:26,898 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:26,898 INFO L82 PathProgramCache]: Analyzing trace with hash -211414604, now seen corresponding path program 3 times [2019-12-07 15:33:26,898 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:26,899 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502100336] [2019-12-07 15:33:26,899 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:26,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:26,970 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:26,970 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502100336] [2019-12-07 15:33:26,970 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:26,970 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:33:26,970 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [931002707] [2019-12-07 15:33:26,971 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:33:26,971 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:26,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:33:26,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:33:26,971 INFO L87 Difference]: Start difference. First operand 24249 states and 72901 transitions. Second operand 8 states. [2019-12-07 15:33:28,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:28,546 INFO L93 Difference]: Finished difference Result 45486 states and 132356 transitions. [2019-12-07 15:33:28,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 15:33:28,546 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 15:33:28,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:28,596 INFO L225 Difference]: With dead ends: 45486 [2019-12-07 15:33:28,596 INFO L226 Difference]: Without dead ends: 45486 [2019-12-07 15:33:28,596 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 150 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:33:28,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45486 states. [2019-12-07 15:33:29,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45486 to 23886. [2019-12-07 15:33:29,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23886 states. [2019-12-07 15:33:29,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23886 states to 23886 states and 71829 transitions. [2019-12-07 15:33:29,075 INFO L78 Accepts]: Start accepts. Automaton has 23886 states and 71829 transitions. Word has length 34 [2019-12-07 15:33:29,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:29,075 INFO L462 AbstractCegarLoop]: Abstraction has 23886 states and 71829 transitions. [2019-12-07 15:33:29,075 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:33:29,075 INFO L276 IsEmpty]: Start isEmpty. Operand 23886 states and 71829 transitions. [2019-12-07 15:33:29,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:33:29,096 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:29,096 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:29,096 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:29,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:29,096 INFO L82 PathProgramCache]: Analyzing trace with hash -1251540864, now seen corresponding path program 1 times [2019-12-07 15:33:29,097 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:29,097 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [99712872] [2019-12-07 15:33:29,097 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:29,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:29,140 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:29,140 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [99712872] [2019-12-07 15:33:29,140 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:29,140 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:33:29,141 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2009799112] [2019-12-07 15:33:29,141 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:33:29,141 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:29,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:33:29,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:33:29,141 INFO L87 Difference]: Start difference. First operand 23886 states and 71829 transitions. Second operand 5 states. [2019-12-07 15:33:29,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:29,551 INFO L93 Difference]: Finished difference Result 36694 states and 109013 transitions. [2019-12-07 15:33:29,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:33:29,552 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 15:33:29,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:29,593 INFO L225 Difference]: With dead ends: 36694 [2019-12-07 15:33:29,593 INFO L226 Difference]: Without dead ends: 36694 [2019-12-07 15:33:29,594 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:33:29,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36694 states. [2019-12-07 15:33:30,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36694 to 30041. [2019-12-07 15:33:30,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30041 states. [2019-12-07 15:33:30,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30041 states to 30041 states and 90135 transitions. [2019-12-07 15:33:30,070 INFO L78 Accepts]: Start accepts. Automaton has 30041 states and 90135 transitions. Word has length 40 [2019-12-07 15:33:30,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:30,070 INFO L462 AbstractCegarLoop]: Abstraction has 30041 states and 90135 transitions. [2019-12-07 15:33:30,070 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:33:30,070 INFO L276 IsEmpty]: Start isEmpty. Operand 30041 states and 90135 transitions. [2019-12-07 15:33:30,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:33:30,098 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:30,098 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:30,098 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:30,098 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:30,098 INFO L82 PathProgramCache]: Analyzing trace with hash 342441092, now seen corresponding path program 2 times [2019-12-07 15:33:30,098 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:30,099 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1498656271] [2019-12-07 15:33:30,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:30,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:30,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:30,129 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1498656271] [2019-12-07 15:33:30,129 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:30,129 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:33:30,129 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [916872407] [2019-12-07 15:33:30,129 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:33:30,129 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:30,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:33:30,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:30,130 INFO L87 Difference]: Start difference. First operand 30041 states and 90135 transitions. Second operand 3 states. [2019-12-07 15:33:30,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:30,183 INFO L93 Difference]: Finished difference Result 23886 states and 70781 transitions. [2019-12-07 15:33:30,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:33:30,184 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 15:33:30,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:30,208 INFO L225 Difference]: With dead ends: 23886 [2019-12-07 15:33:30,208 INFO L226 Difference]: Without dead ends: 23886 [2019-12-07 15:33:30,208 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:30,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23886 states. [2019-12-07 15:33:30,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23886 to 23761. [2019-12-07 15:33:30,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23761 states. [2019-12-07 15:33:30,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23761 states to 23761 states and 70432 transitions. [2019-12-07 15:33:30,506 INFO L78 Accepts]: Start accepts. Automaton has 23761 states and 70432 transitions. Word has length 40 [2019-12-07 15:33:30,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:30,506 INFO L462 AbstractCegarLoop]: Abstraction has 23761 states and 70432 transitions. [2019-12-07 15:33:30,506 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:33:30,506 INFO L276 IsEmpty]: Start isEmpty. Operand 23761 states and 70432 transitions. [2019-12-07 15:33:30,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 15:33:30,525 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:30,525 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:30,525 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:30,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:30,525 INFO L82 PathProgramCache]: Analyzing trace with hash -1767188213, now seen corresponding path program 1 times [2019-12-07 15:33:30,526 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:30,526 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1545741400] [2019-12-07 15:33:30,526 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:30,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:30,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:30,556 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1545741400] [2019-12-07 15:33:30,556 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:30,556 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:33:30,557 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1843901062] [2019-12-07 15:33:30,557 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:33:30,557 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:30,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:33:30,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:33:30,557 INFO L87 Difference]: Start difference. First operand 23761 states and 70432 transitions. Second operand 5 states. [2019-12-07 15:33:30,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:30,617 INFO L93 Difference]: Finished difference Result 21791 states and 66183 transitions. [2019-12-07 15:33:30,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:33:30,617 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 15:33:30,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:30,640 INFO L225 Difference]: With dead ends: 21791 [2019-12-07 15:33:30,640 INFO L226 Difference]: Without dead ends: 21581 [2019-12-07 15:33:30,641 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:33:30,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21581 states. [2019-12-07 15:33:30,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21581 to 13199. [2019-12-07 15:33:30,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13199 states. [2019-12-07 15:33:30,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13199 states to 13199 states and 40035 transitions. [2019-12-07 15:33:30,914 INFO L78 Accepts]: Start accepts. Automaton has 13199 states and 40035 transitions. Word has length 41 [2019-12-07 15:33:30,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:30,914 INFO L462 AbstractCegarLoop]: Abstraction has 13199 states and 40035 transitions. [2019-12-07 15:33:30,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:33:30,914 INFO L276 IsEmpty]: Start isEmpty. Operand 13199 states and 40035 transitions. [2019-12-07 15:33:30,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:33:30,926 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:30,926 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:30,926 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:30,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:30,926 INFO L82 PathProgramCache]: Analyzing trace with hash 622120387, now seen corresponding path program 1 times [2019-12-07 15:33:30,926 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:30,926 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1372697729] [2019-12-07 15:33:30,927 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:30,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:30,965 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:30,965 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1372697729] [2019-12-07 15:33:30,965 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:30,965 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:33:30,965 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1451272846] [2019-12-07 15:33:30,966 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:33:30,966 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:30,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:33:30,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:30,966 INFO L87 Difference]: Start difference. First operand 13199 states and 40035 transitions. Second operand 3 states. [2019-12-07 15:33:31,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:31,026 INFO L93 Difference]: Finished difference Result 15717 states and 47676 transitions. [2019-12-07 15:33:31,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:33:31,027 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:33:31,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:31,043 INFO L225 Difference]: With dead ends: 15717 [2019-12-07 15:33:31,043 INFO L226 Difference]: Without dead ends: 15717 [2019-12-07 15:33:31,043 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:31,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15717 states. [2019-12-07 15:33:31,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15717 to 12944. [2019-12-07 15:33:31,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12944 states. [2019-12-07 15:33:31,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12944 states to 12944 states and 39501 transitions. [2019-12-07 15:33:31,235 INFO L78 Accepts]: Start accepts. Automaton has 12944 states and 39501 transitions. Word has length 66 [2019-12-07 15:33:31,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:31,235 INFO L462 AbstractCegarLoop]: Abstraction has 12944 states and 39501 transitions. [2019-12-07 15:33:31,235 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:33:31,236 INFO L276 IsEmpty]: Start isEmpty. Operand 12944 states and 39501 transitions. [2019-12-07 15:33:31,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:33:31,247 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:31,247 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:31,247 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:31,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:31,247 INFO L82 PathProgramCache]: Analyzing trace with hash -586454608, now seen corresponding path program 1 times [2019-12-07 15:33:31,248 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:31,248 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2043823970] [2019-12-07 15:33:31,248 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:31,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:31,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:31,276 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2043823970] [2019-12-07 15:33:31,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:31,276 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:33:31,276 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [962228563] [2019-12-07 15:33:31,276 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:33:31,276 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:31,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:33:31,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:31,277 INFO L87 Difference]: Start difference. First operand 12944 states and 39501 transitions. Second operand 3 states. [2019-12-07 15:33:31,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:31,393 INFO L93 Difference]: Finished difference Result 18293 states and 56085 transitions. [2019-12-07 15:33:31,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:33:31,393 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 15:33:31,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:31,412 INFO L225 Difference]: With dead ends: 18293 [2019-12-07 15:33:31,412 INFO L226 Difference]: Without dead ends: 18293 [2019-12-07 15:33:31,413 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:33:31,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18293 states. [2019-12-07 15:33:31,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18293 to 13223. [2019-12-07 15:33:31,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13223 states. [2019-12-07 15:33:31,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13223 states to 13223 states and 40419 transitions. [2019-12-07 15:33:31,623 INFO L78 Accepts]: Start accepts. Automaton has 13223 states and 40419 transitions. Word has length 67 [2019-12-07 15:33:31,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:31,623 INFO L462 AbstractCegarLoop]: Abstraction has 13223 states and 40419 transitions. [2019-12-07 15:33:31,623 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:33:31,623 INFO L276 IsEmpty]: Start isEmpty. Operand 13223 states and 40419 transitions. [2019-12-07 15:33:31,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:33:31,636 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:31,636 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:31,636 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:31,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:31,636 INFO L82 PathProgramCache]: Analyzing trace with hash -1786041058, now seen corresponding path program 1 times [2019-12-07 15:33:31,636 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:31,636 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853028993] [2019-12-07 15:33:31,637 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:31,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:31,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:31,711 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1853028993] [2019-12-07 15:33:31,712 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:31,712 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 15:33:31,712 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698733277] [2019-12-07 15:33:31,712 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:33:31,712 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:31,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:33:31,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:33:31,712 INFO L87 Difference]: Start difference. First operand 13223 states and 40419 transitions. Second operand 7 states. [2019-12-07 15:33:32,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:32,614 INFO L93 Difference]: Finished difference Result 29118 states and 86644 transitions. [2019-12-07 15:33:32,614 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 15:33:32,614 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 15:33:32,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:32,646 INFO L225 Difference]: With dead ends: 29118 [2019-12-07 15:33:32,646 INFO L226 Difference]: Without dead ends: 29118 [2019-12-07 15:33:32,646 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 13 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:33:32,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29118 states. [2019-12-07 15:33:32,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29118 to 16414. [2019-12-07 15:33:32,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16414 states. [2019-12-07 15:33:32,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16414 states to 16414 states and 50164 transitions. [2019-12-07 15:33:32,950 INFO L78 Accepts]: Start accepts. Automaton has 16414 states and 50164 transitions. Word has length 67 [2019-12-07 15:33:32,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:32,950 INFO L462 AbstractCegarLoop]: Abstraction has 16414 states and 50164 transitions. [2019-12-07 15:33:32,950 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:33:32,950 INFO L276 IsEmpty]: Start isEmpty. Operand 16414 states and 50164 transitions. [2019-12-07 15:33:32,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:33:32,964 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:32,964 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:32,965 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:32,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:32,965 INFO L82 PathProgramCache]: Analyzing trace with hash 1398756383, now seen corresponding path program 1 times [2019-12-07 15:33:32,965 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:32,965 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [838430635] [2019-12-07 15:33:32,966 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:32,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:33,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:33,072 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [838430635] [2019-12-07 15:33:33,072 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:33,072 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:33:33,072 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [340109514] [2019-12-07 15:33:33,073 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 15:33:33,073 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:33,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 15:33:33,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:33:33,073 INFO L87 Difference]: Start difference. First operand 16414 states and 50164 transitions. Second operand 9 states. [2019-12-07 15:33:35,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:35,116 INFO L93 Difference]: Finished difference Result 124823 states and 375278 transitions. [2019-12-07 15:33:35,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 15:33:35,117 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 15:33:35,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:35,379 INFO L225 Difference]: With dead ends: 124823 [2019-12-07 15:33:35,379 INFO L226 Difference]: Without dead ends: 119809 [2019-12-07 15:33:35,380 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 553 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=369, Invalid=1353, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 15:33:35,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119809 states. [2019-12-07 15:33:36,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119809 to 17715. [2019-12-07 15:33:36,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17715 states. [2019-12-07 15:33:36,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17715 states to 17715 states and 54389 transitions. [2019-12-07 15:33:36,184 INFO L78 Accepts]: Start accepts. Automaton has 17715 states and 54389 transitions. Word has length 67 [2019-12-07 15:33:36,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:36,184 INFO L462 AbstractCegarLoop]: Abstraction has 17715 states and 54389 transitions. [2019-12-07 15:33:36,184 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 15:33:36,184 INFO L276 IsEmpty]: Start isEmpty. Operand 17715 states and 54389 transitions. [2019-12-07 15:33:36,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:33:36,200 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:36,200 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:36,200 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:36,201 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:36,201 INFO L82 PathProgramCache]: Analyzing trace with hash -95777668, now seen corresponding path program 2 times [2019-12-07 15:33:36,201 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:36,201 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57727827] [2019-12-07 15:33:36,201 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:36,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:36,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:36,243 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [57727827] [2019-12-07 15:33:36,243 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:36,243 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:33:36,243 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1457118117] [2019-12-07 15:33:36,243 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:33:36,244 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:36,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:33:36,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:33:36,244 INFO L87 Difference]: Start difference. First operand 17715 states and 54389 transitions. Second operand 4 states. [2019-12-07 15:33:36,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:36,328 INFO L93 Difference]: Finished difference Result 17554 states and 53724 transitions. [2019-12-07 15:33:36,328 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:33:36,328 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 15:33:36,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:36,353 INFO L225 Difference]: With dead ends: 17554 [2019-12-07 15:33:36,353 INFO L226 Difference]: Without dead ends: 17554 [2019-12-07 15:33:36,353 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:33:36,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17554 states. [2019-12-07 15:33:36,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17554 to 15891. [2019-12-07 15:33:36,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15891 states. [2019-12-07 15:33:36,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15891 states to 15891 states and 48501 transitions. [2019-12-07 15:33:36,590 INFO L78 Accepts]: Start accepts. Automaton has 15891 states and 48501 transitions. Word has length 67 [2019-12-07 15:33:36,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:36,590 INFO L462 AbstractCegarLoop]: Abstraction has 15891 states and 48501 transitions. [2019-12-07 15:33:36,590 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:33:36,590 INFO L276 IsEmpty]: Start isEmpty. Operand 15891 states and 48501 transitions. [2019-12-07 15:33:36,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:33:36,605 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:36,605 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:36,605 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:36,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:36,605 INFO L82 PathProgramCache]: Analyzing trace with hash 579351643, now seen corresponding path program 2 times [2019-12-07 15:33:36,606 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:36,606 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660662725] [2019-12-07 15:33:36,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:36,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:33:36,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:33:36,684 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1660662725] [2019-12-07 15:33:36,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:33:36,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:33:36,684 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441744759] [2019-12-07 15:33:36,684 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 15:33:36,684 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:33:36,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 15:33:36,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:33:36,685 INFO L87 Difference]: Start difference. First operand 15891 states and 48501 transitions. Second operand 9 states. [2019-12-07 15:33:37,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:33:37,596 INFO L93 Difference]: Finished difference Result 78716 states and 232408 transitions. [2019-12-07 15:33:37,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 15:33:37,596 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 15:33:37,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:33:37,663 INFO L225 Difference]: With dead ends: 78716 [2019-12-07 15:33:37,663 INFO L226 Difference]: Without dead ends: 55865 [2019-12-07 15:33:37,664 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 340 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=291, Invalid=969, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 15:33:37,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55865 states. [2019-12-07 15:33:38,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55865 to 17804. [2019-12-07 15:33:38,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17804 states. [2019-12-07 15:33:38,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17804 states to 17804 states and 54209 transitions. [2019-12-07 15:33:38,153 INFO L78 Accepts]: Start accepts. Automaton has 17804 states and 54209 transitions. Word has length 67 [2019-12-07 15:33:38,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:33:38,153 INFO L462 AbstractCegarLoop]: Abstraction has 17804 states and 54209 transitions. [2019-12-07 15:33:38,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 15:33:38,154 INFO L276 IsEmpty]: Start isEmpty. Operand 17804 states and 54209 transitions. [2019-12-07 15:33:38,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:33:38,170 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:33:38,170 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:33:38,170 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:33:38,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:33:38,170 INFO L82 PathProgramCache]: Analyzing trace with hash 1790496915, now seen corresponding path program 3 times [2019-12-07 15:33:38,170 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:33:38,170 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [758174244] [2019-12-07 15:33:38,170 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:33:38,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:33:38,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:33:38,246 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:33:38,246 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:33:38,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_93| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$r_buff1_thd3~0_279 0) (= v_~a$flush_delayed~0_36 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$mem_tmp~0_25 0) (= v_~a$r_buff0_thd3~0_364 0) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1111~0.base_55| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1111~0.base_55|) |v_ULTIMATE.start_main_~#t1111~0.offset_34| 0))) (= v_~__unbuffered_p2_EBX~0_67 0) (= v_~y~0_75 0) (= v_~a~0_169 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard1~0_56 0) (= 0 |v_ULTIMATE.start_main_~#t1111~0.offset_34|) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 v_~weak$$choice0~0_21) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1111~0.base_55|) (= 0 |v_#NULL.base_4|) (= 0 v_~a$w_buff1_used~0_506) (= 0 v_~__unbuffered_p2_EAX~0_61) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1111~0.base_55| 4) |v_#length_25|) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1111~0.base_55|)) (= 0 v_~__unbuffered_p0_EAX~0_116) (= v_~z~0_20 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~x~0_91 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1111~0.base_55| 1) |v_#valid_91|) (= v_~weak$$choice2~0_114 0) (= v_~a$r_buff1_thd0~0_166 0) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_93|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t1112~0.base=|v_ULTIMATE.start_main_~#t1112~0.base_41|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_169, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_105|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_116, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_61, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_67, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_21, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_166, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_91, ULTIMATE.start_main_~#t1111~0.base=|v_ULTIMATE.start_main_~#t1111~0.base_55|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_56, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_25, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ULTIMATE.start_main_~#t1113~0.offset=|v_ULTIMATE.start_main_~#t1113~0.offset_20|, ~y~0=v_~y~0_75, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ULTIMATE.start_main_~#t1112~0.offset=|v_ULTIMATE.start_main_~#t1112~0.offset_19|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, ULTIMATE.start_main_~#t1113~0.base=|v_ULTIMATE.start_main_~#t1113~0.base_28|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t1111~0.offset=|v_ULTIMATE.start_main_~#t1111~0.offset_34|, ~a$flush_delayed~0=v_~a$flush_delayed~0_36, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_37|, #valid=|v_#valid_91|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1112~0.base, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1111~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t1113~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ULTIMATE.start_main_~#t1112~0.offset, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1113~0.base, #NULL.base, ULTIMATE.start_main_~#t1111~0.offset, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:33:38,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~a$r_buff0_thd1~0_Out474041249 1) (= ~a$r_buff1_thd3~0_Out474041249 ~a$r_buff0_thd3~0_In474041249) (= ~a$r_buff1_thd1~0_Out474041249 ~a$r_buff0_thd1~0_In474041249) (= ~x~0_In474041249 ~__unbuffered_p0_EAX~0_Out474041249) (= ~a$r_buff1_thd2~0_Out474041249 ~a$r_buff0_thd2~0_In474041249) (= ~a$r_buff0_thd0~0_In474041249 ~a$r_buff1_thd0~0_Out474041249) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In474041249 0))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In474041249, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In474041249, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In474041249, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In474041249, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In474041249, ~x~0=~x~0_In474041249} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out474041249, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out474041249, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out474041249, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out474041249, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out474041249, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In474041249, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In474041249, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In474041249, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out474041249, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In474041249, ~x~0=~x~0_In474041249} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:33:38,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1112~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1112~0.base_9|) |v_ULTIMATE.start_main_~#t1112~0.offset_7| 1)) |v_#memory_int_11|) (= 0 |v_ULTIMATE.start_main_~#t1112~0.offset_7|) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1112~0.base_9| 1)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1112~0.base_9| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1112~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1112~0.base_9|)) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1112~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t1112~0.base=|v_ULTIMATE.start_main_~#t1112~0.base_9|, ULTIMATE.start_main_~#t1112~0.offset=|v_ULTIMATE.start_main_~#t1112~0.offset_7|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t1112~0.base, ULTIMATE.start_main_~#t1112~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 15:33:38,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1113~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1113~0.base_9|) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1113~0.base_9| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1113~0.base_9|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1113~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1113~0.base_9|) |v_ULTIMATE.start_main_~#t1113~0.offset_8| 2))) (= |v_ULTIMATE.start_main_~#t1113~0.offset_8| 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1113~0.base_9| 4) |v_#length_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1113~0.offset=|v_ULTIMATE.start_main_~#t1113~0.offset_8|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1113~0.base=|v_ULTIMATE.start_main_~#t1113~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1113~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1113~0.base] because there is no mapped edge [2019-12-07 15:33:38,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out-730729717| |P1Thread1of1ForFork2_#t~ite10_Out-730729717|)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-730729717 256))) (.cse2 (= (mod ~a$r_buff1_thd2~0_In-730729717 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= ~a$w_buff1~0_In-730729717 |P1Thread1of1ForFork2_#t~ite9_Out-730729717|)) (and .cse1 (or .cse0 .cse2) (= |P1Thread1of1ForFork2_#t~ite9_Out-730729717| ~a~0_In-730729717)))) InVars {~a~0=~a~0_In-730729717, ~a$w_buff1~0=~a$w_buff1~0_In-730729717, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-730729717, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-730729717} OutVars{~a~0=~a~0_In-730729717, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-730729717|, ~a$w_buff1~0=~a$w_buff1~0_In-730729717, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-730729717, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-730729717|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-730729717} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:33:38,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In444834448 256))) (.cse0 (= (mod ~a$r_buff0_thd2~0_In444834448 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out444834448|) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In444834448 |P1Thread1of1ForFork2_#t~ite11_Out444834448|) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In444834448, ~a$w_buff0_used~0=~a$w_buff0_used~0_In444834448} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In444834448, ~a$w_buff0_used~0=~a$w_buff0_used~0_In444834448, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out444834448|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:33:38,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-653349865 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-653349865 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-653349865 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-653349865 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-653349865 |P1Thread1of1ForFork2_#t~ite12_Out-653349865|) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-653349865| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-653349865, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-653349865, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-653349865, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-653349865} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-653349865, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-653349865, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-653349865, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-653349865|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-653349865} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:33:38,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2116730706 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out-2116730706| |P2Thread1of1ForFork0_#t~ite20_Out-2116730706|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-2116730706 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-2116730706 256)) .cse1) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-2116730706 256))) (= 0 (mod ~a$w_buff0_used~0_In-2116730706 256)))) (= ~a$w_buff0~0_In-2116730706 |P2Thread1of1ForFork0_#t~ite20_Out-2116730706|)) (and (= ~a$w_buff0~0_In-2116730706 |P2Thread1of1ForFork0_#t~ite21_Out-2116730706|) (= |P2Thread1of1ForFork0_#t~ite20_In-2116730706| |P2Thread1of1ForFork0_#t~ite20_Out-2116730706|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-2116730706, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2116730706, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2116730706, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2116730706, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2116730706, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-2116730706|, ~weak$$choice2~0=~weak$$choice2~0_In-2116730706} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-2116730706|, ~a$w_buff0~0=~a$w_buff0~0_In-2116730706, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2116730706, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2116730706, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2116730706, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-2116730706|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2116730706, ~weak$$choice2~0=~weak$$choice2~0_In-2116730706} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:33:38,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In61090595 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In61090595 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out61090595| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out61090595| ~a$r_buff0_thd2~0_In61090595)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In61090595, ~a$w_buff0_used~0=~a$w_buff0_used~0_In61090595} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In61090595, ~a$w_buff0_used~0=~a$w_buff0_used~0_In61090595, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out61090595|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:33:38,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd2~0_In6869676 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In6869676 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In6869676 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In6869676 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out6869676| 0)) (and (or .cse1 .cse0) (= ~a$r_buff1_thd2~0_In6869676 |P1Thread1of1ForFork2_#t~ite14_Out6869676|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In6869676, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In6869676, ~a$w_buff0_used~0=~a$w_buff0_used~0_In6869676, ~a$w_buff1_used~0=~a$w_buff1_used~0_In6869676} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In6869676, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In6869676, ~a$w_buff0_used~0=~a$w_buff0_used~0_In6869676, ~a$w_buff1_used~0=~a$w_buff1_used~0_In6869676, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out6869676|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:33:38,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:33:38,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-190276626 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-190276626 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In-190276626 256)) (and (= 0 (mod ~a$r_buff1_thd3~0_In-190276626 256)) .cse0) (and (= (mod ~a$w_buff1_used~0_In-190276626 256) 0) .cse0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite24_Out-190276626| |P2Thread1of1ForFork0_#t~ite23_Out-190276626|) (= |P2Thread1of1ForFork0_#t~ite23_Out-190276626| ~a$w_buff1~0_In-190276626)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite24_Out-190276626| ~a$w_buff1~0_In-190276626) (= |P2Thread1of1ForFork0_#t~ite23_In-190276626| |P2Thread1of1ForFork0_#t~ite23_Out-190276626|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-190276626, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-190276626|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-190276626, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-190276626, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-190276626, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-190276626, ~weak$$choice2~0=~weak$$choice2~0_In-190276626} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-190276626, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-190276626|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-190276626|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-190276626, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-190276626, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-190276626, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-190276626, ~weak$$choice2~0=~weak$$choice2~0_In-190276626} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 15:33:38,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1068811288 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1068811288| ~a$w_buff0_used~0_In-1068811288) (= |P2Thread1of1ForFork0_#t~ite26_In-1068811288| |P2Thread1of1ForFork0_#t~ite26_Out-1068811288|) (not .cse0)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1068811288| |P2Thread1of1ForFork0_#t~ite26_Out-1068811288|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1068811288 256)))) (or (and .cse1 (= (mod ~a$w_buff1_used~0_In-1068811288 256) 0)) (= (mod ~a$w_buff0_used~0_In-1068811288 256) 0) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1068811288 256))))) (= |P2Thread1of1ForFork0_#t~ite26_Out-1068811288| ~a$w_buff0_used~0_In-1068811288) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1068811288|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1068811288, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1068811288, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1068811288, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1068811288, ~weak$$choice2~0=~weak$$choice2~0_In-1068811288} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1068811288|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1068811288|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1068811288, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1068811288, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1068811288, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1068811288, ~weak$$choice2~0=~weak$$choice2~0_In-1068811288} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:33:38,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:33:38,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 15:33:38,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-688925598 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-688925598 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-688925598| ~a~0_In-688925598) (or .cse0 .cse1)) (and (not .cse0) (= ~a$w_buff1~0_In-688925598 |P2Thread1of1ForFork0_#t~ite38_Out-688925598|) (not .cse1)))) InVars {~a~0=~a~0_In-688925598, ~a$w_buff1~0=~a$w_buff1~0_In-688925598, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-688925598, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688925598} OutVars{~a~0=~a~0_In-688925598, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-688925598|, ~a$w_buff1~0=~a$w_buff1~0_In-688925598, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-688925598, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688925598} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:33:38,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:33:38,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-1651727653 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1651727653 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1651727653| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-1651727653| ~a$w_buff0_used~0_In-1651727653)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1651727653, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1651727653} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1651727653|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1651727653, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1651727653} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:33:38,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In675451775 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In675451775 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In675451775 |P0Thread1of1ForFork1_#t~ite5_Out675451775|)) (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out675451775|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In675451775, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In675451775} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out675451775|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In675451775, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In675451775} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:33:38,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-851168780 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-851168780 256))) (.cse3 (= (mod ~a$r_buff0_thd1~0_In-851168780 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-851168780 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out-851168780| 0)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite6_Out-851168780| ~a$w_buff1_used~0_In-851168780) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-851168780, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-851168780, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-851168780, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-851168780} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-851168780|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-851168780, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-851168780, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-851168780, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-851168780} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:33:38,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-850424394 256))) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-850424394 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_Out-850424394 ~a$r_buff0_thd1~0_In-850424394))) (or (and .cse0 .cse1) (and (= 0 ~a$r_buff0_thd1~0_Out-850424394) (not .cse2) (not .cse0)) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-850424394, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-850424394} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-850424394|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-850424394, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-850424394} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:33:38,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1690178705 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1690178705 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1690178705 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-1690178705 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1690178705| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out-1690178705| ~a$r_buff1_thd1~0_In-1690178705)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1690178705, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1690178705, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1690178705, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1690178705} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1690178705|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1690178705, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1690178705, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1690178705, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1690178705} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:33:38,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:33:38,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd3~0_In-273662092 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-273662092 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-273662092 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-273662092 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-273662092| ~a$w_buff1_used~0_In-273662092) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite41_Out-273662092| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-273662092, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-273662092, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-273662092, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-273662092} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-273662092, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-273662092, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-273662092, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-273662092, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-273662092|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:33:38,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1096231807 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1096231807 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1096231807| ~a$r_buff0_thd3~0_In1096231807)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1096231807|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1096231807, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1096231807} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1096231807, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1096231807, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1096231807|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:33:38,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In2036566732 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In2036566732 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In2036566732 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd3~0_In2036566732 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In2036566732 |P2Thread1of1ForFork0_#t~ite43_Out2036566732|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork0_#t~ite43_Out2036566732| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2036566732, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2036566732, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2036566732, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2036566732} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out2036566732|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2036566732, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2036566732, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2036566732, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2036566732} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:33:38,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:33:38,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:33:38,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-564278137 256))) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-564278137 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out-564278137| |ULTIMATE.start_main_#t~ite47_Out-564278137|))) (or (and (not .cse0) (= ~a$w_buff1~0_In-564278137 |ULTIMATE.start_main_#t~ite47_Out-564278137|) (not .cse1) .cse2) (and (= ~a~0_In-564278137 |ULTIMATE.start_main_#t~ite47_Out-564278137|) (or .cse1 .cse0) .cse2))) InVars {~a~0=~a~0_In-564278137, ~a$w_buff1~0=~a$w_buff1~0_In-564278137, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-564278137, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-564278137} OutVars{~a~0=~a~0_In-564278137, ~a$w_buff1~0=~a$w_buff1~0_In-564278137, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-564278137|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-564278137, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-564278137|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-564278137} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:33:38,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In552227447 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In552227447 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In552227447 |ULTIMATE.start_main_#t~ite49_Out552227447|)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out552227447|) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In552227447, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In552227447} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In552227447, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out552227447|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In552227447} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:33:38,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In1876273682 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1876273682 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In1876273682 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In1876273682 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1876273682|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1876273682 |ULTIMATE.start_main_#t~ite50_Out1876273682|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1876273682, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1876273682, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1876273682, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1876273682} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1876273682|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1876273682, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1876273682, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1876273682, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1876273682} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:33:38,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1780077104 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-1780077104 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In-1780077104 |ULTIMATE.start_main_#t~ite51_Out-1780077104|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-1780077104|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1780077104, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1780077104} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1780077104|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1780077104, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1780077104} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:33:38,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In282135168 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In282135168 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd0~0_In282135168 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In282135168 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out282135168| ~a$r_buff1_thd0~0_In282135168)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out282135168|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In282135168, ~a$w_buff0_used~0=~a$w_buff0_used~0_In282135168, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In282135168, ~a$w_buff1_used~0=~a$w_buff1_used~0_In282135168} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out282135168|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In282135168, ~a$w_buff0_used~0=~a$w_buff0_used~0_In282135168, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In282135168, ~a$w_buff1_used~0=~a$w_buff1_used~0_In282135168} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:33:38,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~main$tmp_guard1~0_19 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_66) (= v_~__unbuffered_p2_EBX~0_30 0) (= v_~y~0_31 2) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:33:38,312 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:33:38 BasicIcfg [2019-12-07 15:33:38,312 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:33:38,312 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:33:38,312 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:33:38,313 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:33:38,313 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:31:36" (3/4) ... [2019-12-07 15:33:38,314 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:33:38,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_93| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$r_buff1_thd3~0_279 0) (= v_~a$flush_delayed~0_36 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$mem_tmp~0_25 0) (= v_~a$r_buff0_thd3~0_364 0) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1111~0.base_55| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1111~0.base_55|) |v_ULTIMATE.start_main_~#t1111~0.offset_34| 0))) (= v_~__unbuffered_p2_EBX~0_67 0) (= v_~y~0_75 0) (= v_~a~0_169 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard1~0_56 0) (= 0 |v_ULTIMATE.start_main_~#t1111~0.offset_34|) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 v_~weak$$choice0~0_21) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1111~0.base_55|) (= 0 |v_#NULL.base_4|) (= 0 v_~a$w_buff1_used~0_506) (= 0 v_~__unbuffered_p2_EAX~0_61) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1111~0.base_55| 4) |v_#length_25|) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1111~0.base_55|)) (= 0 v_~__unbuffered_p0_EAX~0_116) (= v_~z~0_20 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~x~0_91 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1111~0.base_55| 1) |v_#valid_91|) (= v_~weak$$choice2~0_114 0) (= v_~a$r_buff1_thd0~0_166 0) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_93|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t1112~0.base=|v_ULTIMATE.start_main_~#t1112~0.base_41|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_169, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_105|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_116, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_61, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_67, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_21, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_166, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_91, ULTIMATE.start_main_~#t1111~0.base=|v_ULTIMATE.start_main_~#t1111~0.base_55|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_56, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_25, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ULTIMATE.start_main_~#t1113~0.offset=|v_ULTIMATE.start_main_~#t1113~0.offset_20|, ~y~0=v_~y~0_75, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ULTIMATE.start_main_~#t1112~0.offset=|v_ULTIMATE.start_main_~#t1112~0.offset_19|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, ULTIMATE.start_main_~#t1113~0.base=|v_ULTIMATE.start_main_~#t1113~0.base_28|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t1111~0.offset=|v_ULTIMATE.start_main_~#t1111~0.offset_34|, ~a$flush_delayed~0=v_~a$flush_delayed~0_36, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_37|, #valid=|v_#valid_91|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1112~0.base, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1111~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t1113~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ULTIMATE.start_main_~#t1112~0.offset, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1113~0.base, #NULL.base, ULTIMATE.start_main_~#t1111~0.offset, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:33:38,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~a$r_buff0_thd1~0_Out474041249 1) (= ~a$r_buff1_thd3~0_Out474041249 ~a$r_buff0_thd3~0_In474041249) (= ~a$r_buff1_thd1~0_Out474041249 ~a$r_buff0_thd1~0_In474041249) (= ~x~0_In474041249 ~__unbuffered_p0_EAX~0_Out474041249) (= ~a$r_buff1_thd2~0_Out474041249 ~a$r_buff0_thd2~0_In474041249) (= ~a$r_buff0_thd0~0_In474041249 ~a$r_buff1_thd0~0_Out474041249) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In474041249 0))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In474041249, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In474041249, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In474041249, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In474041249, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In474041249, ~x~0=~x~0_In474041249} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out474041249, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out474041249, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out474041249, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out474041249, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out474041249, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In474041249, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In474041249, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In474041249, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out474041249, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In474041249, ~x~0=~x~0_In474041249} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:33:38,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1112~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1112~0.base_9|) |v_ULTIMATE.start_main_~#t1112~0.offset_7| 1)) |v_#memory_int_11|) (= 0 |v_ULTIMATE.start_main_~#t1112~0.offset_7|) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1112~0.base_9| 1)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1112~0.base_9| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1112~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1112~0.base_9|)) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1112~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t1112~0.base=|v_ULTIMATE.start_main_~#t1112~0.base_9|, ULTIMATE.start_main_~#t1112~0.offset=|v_ULTIMATE.start_main_~#t1112~0.offset_7|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t1112~0.base, ULTIMATE.start_main_~#t1112~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 15:33:38,316 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1113~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1113~0.base_9|) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1113~0.base_9| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1113~0.base_9|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1113~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1113~0.base_9|) |v_ULTIMATE.start_main_~#t1113~0.offset_8| 2))) (= |v_ULTIMATE.start_main_~#t1113~0.offset_8| 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1113~0.base_9| 4) |v_#length_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1113~0.offset=|v_ULTIMATE.start_main_~#t1113~0.offset_8|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1113~0.base=|v_ULTIMATE.start_main_~#t1113~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1113~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1113~0.base] because there is no mapped edge [2019-12-07 15:33:38,316 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out-730729717| |P1Thread1of1ForFork2_#t~ite10_Out-730729717|)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-730729717 256))) (.cse2 (= (mod ~a$r_buff1_thd2~0_In-730729717 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= ~a$w_buff1~0_In-730729717 |P1Thread1of1ForFork2_#t~ite9_Out-730729717|)) (and .cse1 (or .cse0 .cse2) (= |P1Thread1of1ForFork2_#t~ite9_Out-730729717| ~a~0_In-730729717)))) InVars {~a~0=~a~0_In-730729717, ~a$w_buff1~0=~a$w_buff1~0_In-730729717, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-730729717, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-730729717} OutVars{~a~0=~a~0_In-730729717, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-730729717|, ~a$w_buff1~0=~a$w_buff1~0_In-730729717, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-730729717, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-730729717|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-730729717} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:33:38,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In444834448 256))) (.cse0 (= (mod ~a$r_buff0_thd2~0_In444834448 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out444834448|) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In444834448 |P1Thread1of1ForFork2_#t~ite11_Out444834448|) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In444834448, ~a$w_buff0_used~0=~a$w_buff0_used~0_In444834448} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In444834448, ~a$w_buff0_used~0=~a$w_buff0_used~0_In444834448, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out444834448|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:33:38,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-653349865 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-653349865 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-653349865 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-653349865 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-653349865 |P1Thread1of1ForFork2_#t~ite12_Out-653349865|) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-653349865| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-653349865, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-653349865, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-653349865, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-653349865} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-653349865, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-653349865, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-653349865, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-653349865|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-653349865} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:33:38,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2116730706 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out-2116730706| |P2Thread1of1ForFork0_#t~ite20_Out-2116730706|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-2116730706 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-2116730706 256)) .cse1) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-2116730706 256))) (= 0 (mod ~a$w_buff0_used~0_In-2116730706 256)))) (= ~a$w_buff0~0_In-2116730706 |P2Thread1of1ForFork0_#t~ite20_Out-2116730706|)) (and (= ~a$w_buff0~0_In-2116730706 |P2Thread1of1ForFork0_#t~ite21_Out-2116730706|) (= |P2Thread1of1ForFork0_#t~ite20_In-2116730706| |P2Thread1of1ForFork0_#t~ite20_Out-2116730706|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-2116730706, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2116730706, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2116730706, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2116730706, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2116730706, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-2116730706|, ~weak$$choice2~0=~weak$$choice2~0_In-2116730706} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-2116730706|, ~a$w_buff0~0=~a$w_buff0~0_In-2116730706, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2116730706, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2116730706, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2116730706, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-2116730706|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2116730706, ~weak$$choice2~0=~weak$$choice2~0_In-2116730706} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:33:38,319 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In61090595 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In61090595 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out61090595| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out61090595| ~a$r_buff0_thd2~0_In61090595)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In61090595, ~a$w_buff0_used~0=~a$w_buff0_used~0_In61090595} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In61090595, ~a$w_buff0_used~0=~a$w_buff0_used~0_In61090595, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out61090595|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:33:38,319 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd2~0_In6869676 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In6869676 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In6869676 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In6869676 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out6869676| 0)) (and (or .cse1 .cse0) (= ~a$r_buff1_thd2~0_In6869676 |P1Thread1of1ForFork2_#t~ite14_Out6869676|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In6869676, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In6869676, ~a$w_buff0_used~0=~a$w_buff0_used~0_In6869676, ~a$w_buff1_used~0=~a$w_buff1_used~0_In6869676} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In6869676, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In6869676, ~a$w_buff0_used~0=~a$w_buff0_used~0_In6869676, ~a$w_buff1_used~0=~a$w_buff1_used~0_In6869676, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out6869676|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:33:38,319 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:33:38,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-190276626 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-190276626 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In-190276626 256)) (and (= 0 (mod ~a$r_buff1_thd3~0_In-190276626 256)) .cse0) (and (= (mod ~a$w_buff1_used~0_In-190276626 256) 0) .cse0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite24_Out-190276626| |P2Thread1of1ForFork0_#t~ite23_Out-190276626|) (= |P2Thread1of1ForFork0_#t~ite23_Out-190276626| ~a$w_buff1~0_In-190276626)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite24_Out-190276626| ~a$w_buff1~0_In-190276626) (= |P2Thread1of1ForFork0_#t~ite23_In-190276626| |P2Thread1of1ForFork0_#t~ite23_Out-190276626|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-190276626, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-190276626|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-190276626, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-190276626, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-190276626, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-190276626, ~weak$$choice2~0=~weak$$choice2~0_In-190276626} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-190276626, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-190276626|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-190276626|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-190276626, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-190276626, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-190276626, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-190276626, ~weak$$choice2~0=~weak$$choice2~0_In-190276626} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 15:33:38,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1068811288 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1068811288| ~a$w_buff0_used~0_In-1068811288) (= |P2Thread1of1ForFork0_#t~ite26_In-1068811288| |P2Thread1of1ForFork0_#t~ite26_Out-1068811288|) (not .cse0)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1068811288| |P2Thread1of1ForFork0_#t~ite26_Out-1068811288|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1068811288 256)))) (or (and .cse1 (= (mod ~a$w_buff1_used~0_In-1068811288 256) 0)) (= (mod ~a$w_buff0_used~0_In-1068811288 256) 0) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1068811288 256))))) (= |P2Thread1of1ForFork0_#t~ite26_Out-1068811288| ~a$w_buff0_used~0_In-1068811288) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1068811288|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1068811288, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1068811288, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1068811288, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1068811288, ~weak$$choice2~0=~weak$$choice2~0_In-1068811288} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1068811288|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1068811288|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1068811288, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1068811288, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1068811288, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1068811288, ~weak$$choice2~0=~weak$$choice2~0_In-1068811288} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:33:38,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:33:38,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 15:33:38,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-688925598 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-688925598 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-688925598| ~a~0_In-688925598) (or .cse0 .cse1)) (and (not .cse0) (= ~a$w_buff1~0_In-688925598 |P2Thread1of1ForFork0_#t~ite38_Out-688925598|) (not .cse1)))) InVars {~a~0=~a~0_In-688925598, ~a$w_buff1~0=~a$w_buff1~0_In-688925598, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-688925598, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688925598} OutVars{~a~0=~a~0_In-688925598, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-688925598|, ~a$w_buff1~0=~a$w_buff1~0_In-688925598, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-688925598, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688925598} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:33:38,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:33:38,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-1651727653 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1651727653 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1651727653| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-1651727653| ~a$w_buff0_used~0_In-1651727653)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1651727653, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1651727653} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1651727653|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1651727653, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1651727653} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:33:38,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In675451775 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In675451775 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In675451775 |P0Thread1of1ForFork1_#t~ite5_Out675451775|)) (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out675451775|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In675451775, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In675451775} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out675451775|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In675451775, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In675451775} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:33:38,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-851168780 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-851168780 256))) (.cse3 (= (mod ~a$r_buff0_thd1~0_In-851168780 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-851168780 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out-851168780| 0)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite6_Out-851168780| ~a$w_buff1_used~0_In-851168780) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-851168780, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-851168780, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-851168780, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-851168780} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-851168780|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-851168780, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-851168780, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-851168780, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-851168780} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:33:38,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-850424394 256))) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-850424394 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_Out-850424394 ~a$r_buff0_thd1~0_In-850424394))) (or (and .cse0 .cse1) (and (= 0 ~a$r_buff0_thd1~0_Out-850424394) (not .cse2) (not .cse0)) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-850424394, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-850424394} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-850424394|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-850424394, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-850424394} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:33:38,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1690178705 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1690178705 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1690178705 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-1690178705 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1690178705| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out-1690178705| ~a$r_buff1_thd1~0_In-1690178705)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1690178705, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1690178705, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1690178705, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1690178705} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1690178705|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1690178705, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1690178705, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1690178705, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1690178705} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:33:38,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:33:38,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd3~0_In-273662092 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-273662092 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-273662092 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-273662092 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-273662092| ~a$w_buff1_used~0_In-273662092) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite41_Out-273662092| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-273662092, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-273662092, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-273662092, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-273662092} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-273662092, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-273662092, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-273662092, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-273662092, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-273662092|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:33:38,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1096231807 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1096231807 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1096231807| ~a$r_buff0_thd3~0_In1096231807)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1096231807|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1096231807, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1096231807} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1096231807, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1096231807, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1096231807|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:33:38,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In2036566732 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In2036566732 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In2036566732 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd3~0_In2036566732 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In2036566732 |P2Thread1of1ForFork0_#t~ite43_Out2036566732|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork0_#t~ite43_Out2036566732| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2036566732, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2036566732, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2036566732, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2036566732} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out2036566732|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2036566732, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2036566732, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2036566732, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2036566732} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:33:38,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:33:38,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:33:38,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-564278137 256))) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-564278137 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out-564278137| |ULTIMATE.start_main_#t~ite47_Out-564278137|))) (or (and (not .cse0) (= ~a$w_buff1~0_In-564278137 |ULTIMATE.start_main_#t~ite47_Out-564278137|) (not .cse1) .cse2) (and (= ~a~0_In-564278137 |ULTIMATE.start_main_#t~ite47_Out-564278137|) (or .cse1 .cse0) .cse2))) InVars {~a~0=~a~0_In-564278137, ~a$w_buff1~0=~a$w_buff1~0_In-564278137, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-564278137, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-564278137} OutVars{~a~0=~a~0_In-564278137, ~a$w_buff1~0=~a$w_buff1~0_In-564278137, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-564278137|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-564278137, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-564278137|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-564278137} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:33:38,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In552227447 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In552227447 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In552227447 |ULTIMATE.start_main_#t~ite49_Out552227447|)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out552227447|) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In552227447, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In552227447} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In552227447, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out552227447|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In552227447} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:33:38,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In1876273682 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1876273682 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In1876273682 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In1876273682 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1876273682|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1876273682 |ULTIMATE.start_main_#t~ite50_Out1876273682|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1876273682, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1876273682, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1876273682, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1876273682} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1876273682|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1876273682, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1876273682, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1876273682, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1876273682} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:33:38,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1780077104 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-1780077104 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In-1780077104 |ULTIMATE.start_main_#t~ite51_Out-1780077104|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-1780077104|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1780077104, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1780077104} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1780077104|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1780077104, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1780077104} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:33:38,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In282135168 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In282135168 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd0~0_In282135168 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In282135168 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out282135168| ~a$r_buff1_thd0~0_In282135168)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out282135168|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In282135168, ~a$w_buff0_used~0=~a$w_buff0_used~0_In282135168, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In282135168, ~a$w_buff1_used~0=~a$w_buff1_used~0_In282135168} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out282135168|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In282135168, ~a$w_buff0_used~0=~a$w_buff0_used~0_In282135168, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In282135168, ~a$w_buff1_used~0=~a$w_buff1_used~0_In282135168} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:33:38,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~main$tmp_guard1~0_19 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_66) (= v_~__unbuffered_p2_EBX~0_30 0) (= v_~y~0_31 2) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:33:38,375 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_3bd20795-f4e1-4f3e-a5f4-3c86913c114c/bin/uautomizer/witness.graphml [2019-12-07 15:33:38,375 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:33:38,376 INFO L168 Benchmark]: Toolchain (without parser) took 123106.82 ms. Allocated memory was 1.0 GB in the beginning and 8.3 GB in the end (delta: 7.3 GB). Free memory was 941.9 MB in the beginning and 2.9 GB in the end (delta: -2.0 GB). Peak memory consumption was 5.3 GB. Max. memory is 11.5 GB. [2019-12-07 15:33:38,377 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:33:38,377 INFO L168 Benchmark]: CACSL2BoogieTranslator took 387.31 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 88.6 MB). Free memory was 941.9 MB in the beginning and 1.1 GB in the end (delta: -113.2 MB). Peak memory consumption was 22.9 MB. Max. memory is 11.5 GB. [2019-12-07 15:33:38,377 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:33:38,377 INFO L168 Benchmark]: Boogie Preprocessor took 26.67 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. [2019-12-07 15:33:38,378 INFO L168 Benchmark]: RCFGBuilder took 407.79 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 994.8 MB in the end (delta: 54.9 MB). Peak memory consumption was 54.9 MB. Max. memory is 11.5 GB. [2019-12-07 15:33:38,378 INFO L168 Benchmark]: TraceAbstraction took 122179.73 ms. Allocated memory was 1.1 GB in the beginning and 8.3 GB in the end (delta: 7.2 GB). Free memory was 994.8 MB in the beginning and 3.0 GB in the end (delta: -2.0 GB). Peak memory consumption was 5.2 GB. Max. memory is 11.5 GB. [2019-12-07 15:33:38,378 INFO L168 Benchmark]: Witness Printer took 63.11 ms. Allocated memory is still 8.3 GB. Free memory was 3.0 GB in the beginning and 2.9 GB in the end (delta: 44.9 MB). Peak memory consumption was 44.9 MB. Max. memory is 11.5 GB. [2019-12-07 15:33:38,379 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 387.31 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 88.6 MB). Free memory was 941.9 MB in the beginning and 1.1 GB in the end (delta: -113.2 MB). Peak memory consumption was 22.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.67 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 407.79 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 994.8 MB in the end (delta: 54.9 MB). Peak memory consumption was 54.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 122179.73 ms. Allocated memory was 1.1 GB in the beginning and 8.3 GB in the end (delta: 7.2 GB). Free memory was 994.8 MB in the beginning and 3.0 GB in the end (delta: -2.0 GB). Peak memory consumption was 5.2 GB. Max. memory is 11.5 GB. * Witness Printer took 63.11 ms. Allocated memory is still 8.3 GB. Free memory was 3.0 GB in the beginning and 2.9 GB in the end (delta: 44.9 MB). Peak memory consumption was 44.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 100 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 33 ChoiceCompositions, 7302 VarBasedMoverChecksPositive, 250 VarBasedMoverChecksNegative, 40 SemBasedMoverChecksPositive, 286 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 87212 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L830] FCALL, FORK 0 pthread_create(&t1111, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L733] 1 a$w_buff1 = a$w_buff0 [L734] 1 a$w_buff0 = 1 [L735] 1 a$w_buff1_used = a$w_buff0_used [L736] 1 a$w_buff0_used = (_Bool)1 [L832] FCALL, FORK 0 pthread_create(&t1112, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L762] 2 x = 1 [L765] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L768] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L768] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L834] FCALL, FORK 0 pthread_create(&t1113, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L782] 3 y = 2 [L785] 3 z = 1 [L788] 3 __unbuffered_p2_EAX = z [L791] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L792] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L793] 3 a$flush_delayed = weak$$choice2 [L794] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L795] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L795] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L769] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L796] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L770] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L771] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L748] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L797] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L798] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L799] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=1] [L799] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=1] [L801] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L802] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L748] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L807] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L749] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L750] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L808] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L809] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L810] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L840] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L840] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L841] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L842] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L843] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 122.0s, OverallIterations: 29, TraceHistogramMax: 1, AutomataDifference: 27.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6099 SDtfs, 8474 SDslu, 14451 SDs, 0 SdLazy, 9567 SolverSat, 536 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 318 GetRequests, 51 SyntacticMatches, 20 SemanticMatches, 247 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1432 ImplicationChecksByTransitivity, 2.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=280739occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 76.4s AutomataMinimizationTime, 28 MinimizatonAttempts, 607973 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 1034 NumberOfCodeBlocks, 1034 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 939 ConstructedInterpolants, 0 QuantifiedInterpolants, 154770 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...