./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix042_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix042_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8ba18814273e9fa6e2b9e83c155fdee60908de39 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:44:07,013 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:44:07,014 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:44:07,022 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:44:07,022 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:44:07,023 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:44:07,024 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:44:07,025 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:44:07,026 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:44:07,027 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:44:07,027 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:44:07,028 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:44:07,028 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:44:07,029 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:44:07,030 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:44:07,031 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:44:07,031 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:44:07,032 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:44:07,033 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:44:07,035 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:44:07,036 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:44:07,036 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:44:07,037 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:44:07,038 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:44:07,039 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:44:07,040 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:44:07,040 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:44:07,040 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:44:07,040 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:44:07,041 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:44:07,041 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:44:07,042 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:44:07,042 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:44:07,042 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:44:07,043 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:44:07,043 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:44:07,043 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:44:07,044 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:44:07,044 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:44:07,044 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:44:07,045 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:44:07,045 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:44:07,054 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:44:07,054 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:44:07,055 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:44:07,055 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:44:07,055 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:44:07,055 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:44:07,056 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:44:07,056 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:44:07,056 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:44:07,056 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:44:07,056 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:44:07,056 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:44:07,056 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:44:07,056 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:44:07,056 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:44:07,056 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:44:07,057 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:44:07,057 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:44:07,057 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:44:07,057 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:44:07,057 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:44:07,057 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:44:07,057 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:44:07,057 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:44:07,058 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:44:07,058 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:44:07,058 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:44:07,058 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:44:07,058 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:44:07,058 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8ba18814273e9fa6e2b9e83c155fdee60908de39 [2019-12-07 12:44:07,160 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:44:07,168 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:44:07,171 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:44:07,172 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:44:07,172 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:44:07,173 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix042_rmo.oepc.i [2019-12-07 12:44:07,210 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/data/d48d823d5/859a9167fb904e8db4fe9c33b7a08ff8/FLAG75afb5186 [2019-12-07 12:44:07,617 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:44:07,618 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/sv-benchmarks/c/pthread-wmm/mix042_rmo.oepc.i [2019-12-07 12:44:07,630 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/data/d48d823d5/859a9167fb904e8db4fe9c33b7a08ff8/FLAG75afb5186 [2019-12-07 12:44:07,641 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/data/d48d823d5/859a9167fb904e8db4fe9c33b7a08ff8 [2019-12-07 12:44:07,643 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:44:07,643 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:44:07,644 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:44:07,644 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:44:07,646 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:44:07,647 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:44:07" (1/1) ... [2019-12-07 12:44:07,649 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c8002ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:07, skipping insertion in model container [2019-12-07 12:44:07,649 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:44:07" (1/1) ... [2019-12-07 12:44:07,654 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:44:07,683 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:44:07,948 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:44:07,956 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:44:07,998 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:44:08,043 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:44:08,044 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08 WrapperNode [2019-12-07 12:44:08,044 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:44:08,044 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:44:08,044 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:44:08,045 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:44:08,051 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08" (1/1) ... [2019-12-07 12:44:08,064 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08" (1/1) ... [2019-12-07 12:44:08,084 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:44:08,084 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:44:08,084 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:44:08,084 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:44:08,091 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08" (1/1) ... [2019-12-07 12:44:08,091 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08" (1/1) ... [2019-12-07 12:44:08,094 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08" (1/1) ... [2019-12-07 12:44:08,095 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08" (1/1) ... [2019-12-07 12:44:08,102 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08" (1/1) ... [2019-12-07 12:44:08,105 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08" (1/1) ... [2019-12-07 12:44:08,107 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08" (1/1) ... [2019-12-07 12:44:08,111 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:44:08,111 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:44:08,111 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:44:08,111 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:44:08,112 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:44:08,152 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:44:08,153 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:44:08,153 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:44:08,153 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:44:08,153 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:44:08,153 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:44:08,153 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:44:08,153 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:44:08,154 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:44:08,154 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:44:08,154 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:44:08,154 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:44:08,154 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:44:08,156 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:44:08,523 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:44:08,523 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:44:08,524 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:44:08 BoogieIcfgContainer [2019-12-07 12:44:08,524 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:44:08,525 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:44:08,525 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:44:08,527 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:44:08,527 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:44:07" (1/3) ... [2019-12-07 12:44:08,528 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d819049 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:44:08, skipping insertion in model container [2019-12-07 12:44:08,528 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:44:08" (2/3) ... [2019-12-07 12:44:08,529 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d819049 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:44:08, skipping insertion in model container [2019-12-07 12:44:08,529 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:44:08" (3/3) ... [2019-12-07 12:44:08,530 INFO L109 eAbstractionObserver]: Analyzing ICFG mix042_rmo.oepc.i [2019-12-07 12:44:08,537 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:44:08,538 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:44:08,542 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:44:08,543 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:44:08,568 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,568 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,569 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,569 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,569 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,569 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,569 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,569 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,570 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,570 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,570 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,570 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,570 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,573 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,573 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,573 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,573 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,574 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,574 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,574 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,574 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,574 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,575 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,575 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,575 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,575 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,575 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,576 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,576 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,576 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,576 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,576 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,576 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,577 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,577 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,577 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,577 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,577 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,578 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,578 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,578 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,578 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,578 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,578 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,579 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,579 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,579 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,580 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,580 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,580 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,580 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,580 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,581 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,581 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,581 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,581 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,581 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,581 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,582 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,582 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,582 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,582 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,582 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,582 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,583 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,583 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,583 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,583 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,583 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,583 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,584 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,584 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,584 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,584 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,584 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,584 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,585 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,585 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,585 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,585 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,585 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,585 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,586 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,586 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,586 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,586 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,586 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,586 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,587 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,587 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,587 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,587 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,587 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,587 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,588 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,588 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,588 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,588 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,588 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,588 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,588 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,589 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,590 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,591 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,592 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,593 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,594 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,595 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,596 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,597 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,598 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:44:08,610 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:44:08,623 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:44:08,623 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:44:08,623 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:44:08,623 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:44:08,624 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:44:08,624 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:44:08,624 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:44:08,624 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:44:08,634 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 12:44:08,635 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 12:44:08,699 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 12:44:08,699 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:44:08,710 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:44:08,726 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 12:44:08,754 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 12:44:08,755 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:44:08,760 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:44:08,776 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 12:44:08,777 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:44:11,887 WARN L192 SmtUtils]: Spent 274.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 12:44:12,018 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification that was a NOOP. DAG size: 81 [2019-12-07 12:44:12,135 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification that was a NOOP. DAG size: 81 [2019-12-07 12:44:12,507 WARN L192 SmtUtils]: Spent 342.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 12:44:12,691 WARN L192 SmtUtils]: Spent 181.00 ms on a formula simplification that was a NOOP. DAG size: 89 [2019-12-07 12:44:12,723 INFO L206 etLargeBlockEncoding]: Checked pairs total: 87212 [2019-12-07 12:44:12,723 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 12:44:12,726 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 12:44:24,906 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 12:44:24,908 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 12:44:24,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 12:44:24,911 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:44:24,912 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 12:44:24,912 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:44:24,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:44:24,916 INFO L82 PathProgramCache]: Analyzing trace with hash 919766, now seen corresponding path program 1 times [2019-12-07 12:44:24,921 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:44:24,921 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [247374101] [2019-12-07 12:44:24,921 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:44:25,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:44:25,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:44:25,056 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [247374101] [2019-12-07 12:44:25,057 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:44:25,057 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:44:25,057 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1670366430] [2019-12-07 12:44:25,060 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:44:25,060 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:44:25,069 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:44:25,069 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:44:25,071 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 12:44:25,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:44:25,916 INFO L93 Difference]: Finished difference Result 101544 states and 430594 transitions. [2019-12-07 12:44:25,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:44:25,917 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 12:44:25,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:44:26,340 INFO L225 Difference]: With dead ends: 101544 [2019-12-07 12:44:26,341 INFO L226 Difference]: Without dead ends: 95304 [2019-12-07 12:44:26,342 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:44:29,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95304 states. [2019-12-07 12:44:30,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95304 to 95304. [2019-12-07 12:44:30,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95304 states. [2019-12-07 12:44:31,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95304 states to 95304 states and 403554 transitions. [2019-12-07 12:44:31,133 INFO L78 Accepts]: Start accepts. Automaton has 95304 states and 403554 transitions. Word has length 3 [2019-12-07 12:44:31,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:44:31,133 INFO L462 AbstractCegarLoop]: Abstraction has 95304 states and 403554 transitions. [2019-12-07 12:44:31,133 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:44:31,133 INFO L276 IsEmpty]: Start isEmpty. Operand 95304 states and 403554 transitions. [2019-12-07 12:44:31,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:44:31,138 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:44:31,138 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:44:31,138 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:44:31,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:44:31,139 INFO L82 PathProgramCache]: Analyzing trace with hash -1982627867, now seen corresponding path program 1 times [2019-12-07 12:44:31,139 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:44:31,139 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046373411] [2019-12-07 12:44:31,139 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:44:31,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:44:31,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:44:31,204 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046373411] [2019-12-07 12:44:31,204 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:44:31,204 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:44:31,204 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1718621734] [2019-12-07 12:44:31,205 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:44:31,205 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:44:31,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:44:31,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:44:31,205 INFO L87 Difference]: Start difference. First operand 95304 states and 403554 transitions. Second operand 4 states. [2019-12-07 12:44:33,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:44:33,720 INFO L93 Difference]: Finished difference Result 152040 states and 617140 transitions. [2019-12-07 12:44:33,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:44:33,720 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:44:33,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:44:34,130 INFO L225 Difference]: With dead ends: 152040 [2019-12-07 12:44:34,130 INFO L226 Difference]: Without dead ends: 151991 [2019-12-07 12:44:34,131 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:44:38,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151991 states. [2019-12-07 12:44:40,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151991 to 137801. [2019-12-07 12:44:40,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137801 states. [2019-12-07 12:44:40,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137801 states to 137801 states and 566928 transitions. [2019-12-07 12:44:40,617 INFO L78 Accepts]: Start accepts. Automaton has 137801 states and 566928 transitions. Word has length 11 [2019-12-07 12:44:40,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:44:40,618 INFO L462 AbstractCegarLoop]: Abstraction has 137801 states and 566928 transitions. [2019-12-07 12:44:40,618 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:44:40,618 INFO L276 IsEmpty]: Start isEmpty. Operand 137801 states and 566928 transitions. [2019-12-07 12:44:40,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:44:40,623 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:44:40,623 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:44:40,623 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:44:40,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:44:40,623 INFO L82 PathProgramCache]: Analyzing trace with hash -1673757482, now seen corresponding path program 1 times [2019-12-07 12:44:40,623 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:44:40,623 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126805155] [2019-12-07 12:44:40,624 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:44:40,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:44:40,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:44:40,686 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2126805155] [2019-12-07 12:44:40,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:44:40,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:44:40,686 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1388861964] [2019-12-07 12:44:40,686 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:44:40,686 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:44:40,687 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:44:40,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:44:40,687 INFO L87 Difference]: Start difference. First operand 137801 states and 566928 transitions. Second operand 4 states. [2019-12-07 12:44:42,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:44:42,106 INFO L93 Difference]: Finished difference Result 197752 states and 794963 transitions. [2019-12-07 12:44:42,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:44:42,106 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:44:42,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:44:42,622 INFO L225 Difference]: With dead ends: 197752 [2019-12-07 12:44:42,622 INFO L226 Difference]: Without dead ends: 197696 [2019-12-07 12:44:42,622 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:44:49,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197696 states. [2019-12-07 12:44:51,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197696 to 164675. [2019-12-07 12:44:51,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164675 states. [2019-12-07 12:44:52,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164675 states to 164675 states and 674105 transitions. [2019-12-07 12:44:52,183 INFO L78 Accepts]: Start accepts. Automaton has 164675 states and 674105 transitions. Word has length 13 [2019-12-07 12:44:52,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:44:52,184 INFO L462 AbstractCegarLoop]: Abstraction has 164675 states and 674105 transitions. [2019-12-07 12:44:52,184 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:44:52,184 INFO L276 IsEmpty]: Start isEmpty. Operand 164675 states and 674105 transitions. [2019-12-07 12:44:52,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:44:52,191 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:44:52,191 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:44:52,191 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:44:52,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:44:52,191 INFO L82 PathProgramCache]: Analyzing trace with hash 841711145, now seen corresponding path program 1 times [2019-12-07 12:44:52,192 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:44:52,192 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945233432] [2019-12-07 12:44:52,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:44:52,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:44:52,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:44:52,239 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945233432] [2019-12-07 12:44:52,239 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:44:52,239 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:44:52,239 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [504853251] [2019-12-07 12:44:52,240 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:44:52,240 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:44:52,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:44:52,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:44:52,240 INFO L87 Difference]: Start difference. First operand 164675 states and 674105 transitions. Second operand 4 states. [2019-12-07 12:44:53,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:44:53,274 INFO L93 Difference]: Finished difference Result 202675 states and 826980 transitions. [2019-12-07 12:44:53,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:44:53,275 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 12:44:53,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:44:53,820 INFO L225 Difference]: With dead ends: 202675 [2019-12-07 12:44:53,820 INFO L226 Difference]: Without dead ends: 202675 [2019-12-07 12:44:53,821 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:44:58,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202675 states. [2019-12-07 12:45:03,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202675 to 172880. [2019-12-07 12:45:03,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172880 states. [2019-12-07 12:45:04,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172880 states to 172880 states and 708759 transitions. [2019-12-07 12:45:04,007 INFO L78 Accepts]: Start accepts. Automaton has 172880 states and 708759 transitions. Word has length 16 [2019-12-07 12:45:04,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:04,008 INFO L462 AbstractCegarLoop]: Abstraction has 172880 states and 708759 transitions. [2019-12-07 12:45:04,008 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:45:04,008 INFO L276 IsEmpty]: Start isEmpty. Operand 172880 states and 708759 transitions. [2019-12-07 12:45:04,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:45:04,020 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:04,020 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:04,021 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:04,021 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:04,021 INFO L82 PathProgramCache]: Analyzing trace with hash -118269295, now seen corresponding path program 1 times [2019-12-07 12:45:04,021 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:04,021 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [525013594] [2019-12-07 12:45:04,021 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:04,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:04,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:04,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [525013594] [2019-12-07 12:45:04,051 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:04,051 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:45:04,051 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1233641596] [2019-12-07 12:45:04,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:45:04,052 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:04,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:45:04,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:04,052 INFO L87 Difference]: Start difference. First operand 172880 states and 708759 transitions. Second operand 3 states. [2019-12-07 12:45:04,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:04,160 INFO L93 Difference]: Finished difference Result 34553 states and 111512 transitions. [2019-12-07 12:45:04,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:45:04,161 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:45:04,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:04,210 INFO L225 Difference]: With dead ends: 34553 [2019-12-07 12:45:04,210 INFO L226 Difference]: Without dead ends: 34553 [2019-12-07 12:45:04,211 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:04,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34553 states. [2019-12-07 12:45:04,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34553 to 34473. [2019-12-07 12:45:04,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34473 states. [2019-12-07 12:45:04,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34473 states to 34473 states and 111272 transitions. [2019-12-07 12:45:04,783 INFO L78 Accepts]: Start accepts. Automaton has 34473 states and 111272 transitions. Word has length 18 [2019-12-07 12:45:04,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:04,783 INFO L462 AbstractCegarLoop]: Abstraction has 34473 states and 111272 transitions. [2019-12-07 12:45:04,783 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:45:04,783 INFO L276 IsEmpty]: Start isEmpty. Operand 34473 states and 111272 transitions. [2019-12-07 12:45:04,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:45:04,789 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:04,789 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:04,789 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:04,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:04,789 INFO L82 PathProgramCache]: Analyzing trace with hash 361242897, now seen corresponding path program 1 times [2019-12-07 12:45:04,789 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:04,789 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1421715132] [2019-12-07 12:45:04,789 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:04,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:04,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:04,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1421715132] [2019-12-07 12:45:04,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:04,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:45:04,837 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1420397876] [2019-12-07 12:45:04,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:45:04,838 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:04,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:45:04,838 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:45:04,838 INFO L87 Difference]: Start difference. First operand 34473 states and 111272 transitions. Second operand 5 states. [2019-12-07 12:45:05,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:05,250 INFO L93 Difference]: Finished difference Result 44779 states and 142105 transitions. [2019-12-07 12:45:05,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:45:05,251 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:45:05,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:05,310 INFO L225 Difference]: With dead ends: 44779 [2019-12-07 12:45:05,310 INFO L226 Difference]: Without dead ends: 44772 [2019-12-07 12:45:05,311 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:45:05,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44772 states. [2019-12-07 12:45:06,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44772 to 34062. [2019-12-07 12:45:06,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34062 states. [2019-12-07 12:45:06,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34062 states to 34062 states and 109831 transitions. [2019-12-07 12:45:06,295 INFO L78 Accepts]: Start accepts. Automaton has 34062 states and 109831 transitions. Word has length 22 [2019-12-07 12:45:06,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:06,295 INFO L462 AbstractCegarLoop]: Abstraction has 34062 states and 109831 transitions. [2019-12-07 12:45:06,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:45:06,295 INFO L276 IsEmpty]: Start isEmpty. Operand 34062 states and 109831 transitions. [2019-12-07 12:45:06,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:45:06,303 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:06,303 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:06,303 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:06,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:06,303 INFO L82 PathProgramCache]: Analyzing trace with hash -2019660134, now seen corresponding path program 1 times [2019-12-07 12:45:06,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:06,303 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [352255363] [2019-12-07 12:45:06,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:06,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:06,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:06,363 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [352255363] [2019-12-07 12:45:06,363 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:06,363 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:45:06,363 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [221909353] [2019-12-07 12:45:06,364 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:45:06,364 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:06,364 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:45:06,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:45:06,364 INFO L87 Difference]: Start difference. First operand 34062 states and 109831 transitions. Second operand 5 states. [2019-12-07 12:45:06,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:06,728 INFO L93 Difference]: Finished difference Result 48290 states and 152456 transitions. [2019-12-07 12:45:06,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:45:06,729 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 12:45:06,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:06,792 INFO L225 Difference]: With dead ends: 48290 [2019-12-07 12:45:06,792 INFO L226 Difference]: Without dead ends: 48277 [2019-12-07 12:45:06,793 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:45:07,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48277 states. [2019-12-07 12:45:07,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48277 to 39783. [2019-12-07 12:45:07,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39783 states. [2019-12-07 12:45:07,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39783 states to 39783 states and 127731 transitions. [2019-12-07 12:45:07,514 INFO L78 Accepts]: Start accepts. Automaton has 39783 states and 127731 transitions. Word has length 25 [2019-12-07 12:45:07,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:07,515 INFO L462 AbstractCegarLoop]: Abstraction has 39783 states and 127731 transitions. [2019-12-07 12:45:07,515 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:45:07,515 INFO L276 IsEmpty]: Start isEmpty. Operand 39783 states and 127731 transitions. [2019-12-07 12:45:07,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:45:07,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:07,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:07,526 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:07,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:07,526 INFO L82 PathProgramCache]: Analyzing trace with hash -1429942457, now seen corresponding path program 1 times [2019-12-07 12:45:07,526 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:07,526 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591943314] [2019-12-07 12:45:07,526 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:07,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:07,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:07,556 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591943314] [2019-12-07 12:45:07,557 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:07,557 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:45:07,557 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1790755217] [2019-12-07 12:45:07,557 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:45:07,557 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:07,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:45:07,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:07,558 INFO L87 Difference]: Start difference. First operand 39783 states and 127731 transitions. Second operand 3 states. [2019-12-07 12:45:07,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:07,724 INFO L93 Difference]: Finished difference Result 56828 states and 180787 transitions. [2019-12-07 12:45:07,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:45:07,725 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 12:45:07,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:07,810 INFO L225 Difference]: With dead ends: 56828 [2019-12-07 12:45:07,810 INFO L226 Difference]: Without dead ends: 56828 [2019-12-07 12:45:07,811 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:08,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56828 states. [2019-12-07 12:45:08,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56828 to 42213. [2019-12-07 12:45:08,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42213 states. [2019-12-07 12:45:08,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42213 states to 42213 states and 135001 transitions. [2019-12-07 12:45:08,604 INFO L78 Accepts]: Start accepts. Automaton has 42213 states and 135001 transitions. Word has length 27 [2019-12-07 12:45:08,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:08,604 INFO L462 AbstractCegarLoop]: Abstraction has 42213 states and 135001 transitions. [2019-12-07 12:45:08,604 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:45:08,604 INFO L276 IsEmpty]: Start isEmpty. Operand 42213 states and 135001 transitions. [2019-12-07 12:45:08,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:45:08,616 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:08,616 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:08,616 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:08,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:08,616 INFO L82 PathProgramCache]: Analyzing trace with hash -535275942, now seen corresponding path program 1 times [2019-12-07 12:45:08,616 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:08,616 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1684716306] [2019-12-07 12:45:08,616 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:08,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:08,638 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:08,638 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1684716306] [2019-12-07 12:45:08,638 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:08,638 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:45:08,638 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889867952] [2019-12-07 12:45:08,638 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:45:08,639 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:08,639 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:45:08,639 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:08,639 INFO L87 Difference]: Start difference. First operand 42213 states and 135001 transitions. Second operand 3 states. [2019-12-07 12:45:08,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:08,820 INFO L93 Difference]: Finished difference Result 62192 states and 195378 transitions. [2019-12-07 12:45:08,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:45:08,821 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 12:45:08,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:08,912 INFO L225 Difference]: With dead ends: 62192 [2019-12-07 12:45:08,913 INFO L226 Difference]: Without dead ends: 62192 [2019-12-07 12:45:08,913 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:09,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62192 states. [2019-12-07 12:45:09,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62192 to 47577. [2019-12-07 12:45:09,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47577 states. [2019-12-07 12:45:10,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47577 states to 47577 states and 149592 transitions. [2019-12-07 12:45:10,044 INFO L78 Accepts]: Start accepts. Automaton has 47577 states and 149592 transitions. Word has length 27 [2019-12-07 12:45:10,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:10,044 INFO L462 AbstractCegarLoop]: Abstraction has 47577 states and 149592 transitions. [2019-12-07 12:45:10,044 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:45:10,045 INFO L276 IsEmpty]: Start isEmpty. Operand 47577 states and 149592 transitions. [2019-12-07 12:45:10,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:45:10,057 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:10,058 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:10,058 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:10,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:10,058 INFO L82 PathProgramCache]: Analyzing trace with hash 1457952739, now seen corresponding path program 1 times [2019-12-07 12:45:10,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:10,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2096890135] [2019-12-07 12:45:10,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:10,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:10,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:10,113 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2096890135] [2019-12-07 12:45:10,113 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:10,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:45:10,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667545296] [2019-12-07 12:45:10,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:45:10,113 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:10,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:45:10,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:45:10,114 INFO L87 Difference]: Start difference. First operand 47577 states and 149592 transitions. Second operand 6 states. [2019-12-07 12:45:10,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:10,661 INFO L93 Difference]: Finished difference Result 89520 states and 280849 transitions. [2019-12-07 12:45:10,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:45:10,661 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 12:45:10,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:10,804 INFO L225 Difference]: With dead ends: 89520 [2019-12-07 12:45:10,804 INFO L226 Difference]: Without dead ends: 89501 [2019-12-07 12:45:10,804 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:45:11,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89501 states. [2019-12-07 12:45:11,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89501 to 51874. [2019-12-07 12:45:11,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51874 states. [2019-12-07 12:45:11,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51874 states to 51874 states and 162887 transitions. [2019-12-07 12:45:11,973 INFO L78 Accepts]: Start accepts. Automaton has 51874 states and 162887 transitions. Word has length 27 [2019-12-07 12:45:11,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:11,973 INFO L462 AbstractCegarLoop]: Abstraction has 51874 states and 162887 transitions. [2019-12-07 12:45:11,973 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:45:11,973 INFO L276 IsEmpty]: Start isEmpty. Operand 51874 states and 162887 transitions. [2019-12-07 12:45:11,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 12:45:11,989 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:11,989 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:11,989 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:11,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:11,989 INFO L82 PathProgramCache]: Analyzing trace with hash -665356316, now seen corresponding path program 1 times [2019-12-07 12:45:11,989 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:11,990 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1990509068] [2019-12-07 12:45:11,990 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:12,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:12,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:12,021 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1990509068] [2019-12-07 12:45:12,021 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:12,021 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:45:12,021 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [278297878] [2019-12-07 12:45:12,021 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:45:12,021 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:12,021 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:45:12,021 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:12,021 INFO L87 Difference]: Start difference. First operand 51874 states and 162887 transitions. Second operand 3 states. [2019-12-07 12:45:12,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:12,165 INFO L93 Difference]: Finished difference Result 51874 states and 161406 transitions. [2019-12-07 12:45:12,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:45:12,166 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-12-07 12:45:12,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:12,241 INFO L225 Difference]: With dead ends: 51874 [2019-12-07 12:45:12,241 INFO L226 Difference]: Without dead ends: 51874 [2019-12-07 12:45:12,241 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:12,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51874 states. [2019-12-07 12:45:12,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51874 to 48204. [2019-12-07 12:45:12,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48204 states. [2019-12-07 12:45:13,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48204 states to 48204 states and 150328 transitions. [2019-12-07 12:45:13,024 INFO L78 Accepts]: Start accepts. Automaton has 48204 states and 150328 transitions. Word has length 28 [2019-12-07 12:45:13,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:13,024 INFO L462 AbstractCegarLoop]: Abstraction has 48204 states and 150328 transitions. [2019-12-07 12:45:13,025 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:45:13,025 INFO L276 IsEmpty]: Start isEmpty. Operand 48204 states and 150328 transitions. [2019-12-07 12:45:13,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 12:45:13,039 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:13,039 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:13,039 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:13,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:13,040 INFO L82 PathProgramCache]: Analyzing trace with hash 294567066, now seen corresponding path program 1 times [2019-12-07 12:45:13,040 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:13,040 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980619066] [2019-12-07 12:45:13,040 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:13,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:13,190 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2019-12-07 12:45:13,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:13,205 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980619066] [2019-12-07 12:45:13,205 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:13,205 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:45:13,205 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1490461616] [2019-12-07 12:45:13,205 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:45:13,205 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:13,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:45:13,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:45:13,205 INFO L87 Difference]: Start difference. First operand 48204 states and 150328 transitions. Second operand 6 states. [2019-12-07 12:45:13,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:13,745 INFO L93 Difference]: Finished difference Result 80185 states and 248466 transitions. [2019-12-07 12:45:13,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:45:13,745 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 12:45:13,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:13,857 INFO L225 Difference]: With dead ends: 80185 [2019-12-07 12:45:13,857 INFO L226 Difference]: Without dead ends: 80163 [2019-12-07 12:45:13,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:45:14,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80163 states. [2019-12-07 12:45:14,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80163 to 47866. [2019-12-07 12:45:14,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47866 states. [2019-12-07 12:45:14,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47866 states to 47866 states and 149201 transitions. [2019-12-07 12:45:14,885 INFO L78 Accepts]: Start accepts. Automaton has 47866 states and 149201 transitions. Word has length 28 [2019-12-07 12:45:14,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:14,885 INFO L462 AbstractCegarLoop]: Abstraction has 47866 states and 149201 transitions. [2019-12-07 12:45:14,885 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:45:14,885 INFO L276 IsEmpty]: Start isEmpty. Operand 47866 states and 149201 transitions. [2019-12-07 12:45:14,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 12:45:14,898 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:14,898 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:14,898 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:14,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:14,899 INFO L82 PathProgramCache]: Analyzing trace with hash 1921906081, now seen corresponding path program 1 times [2019-12-07 12:45:14,899 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:14,899 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248833685] [2019-12-07 12:45:14,899 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:14,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:14,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:14,929 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [248833685] [2019-12-07 12:45:14,929 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:14,929 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:45:14,930 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [594504414] [2019-12-07 12:45:14,930 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:45:14,930 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:14,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:45:14,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:14,931 INFO L87 Difference]: Start difference. First operand 47866 states and 149201 transitions. Second operand 3 states. [2019-12-07 12:45:15,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:15,052 INFO L93 Difference]: Finished difference Result 47815 states and 149049 transitions. [2019-12-07 12:45:15,052 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:45:15,052 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 12:45:15,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:15,114 INFO L225 Difference]: With dead ends: 47815 [2019-12-07 12:45:15,114 INFO L226 Difference]: Without dead ends: 47815 [2019-12-07 12:45:15,115 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:15,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47815 states. [2019-12-07 12:45:15,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47815 to 47815. [2019-12-07 12:45:15,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47815 states. [2019-12-07 12:45:15,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47815 states to 47815 states and 149049 transitions. [2019-12-07 12:45:15,843 INFO L78 Accepts]: Start accepts. Automaton has 47815 states and 149049 transitions. Word has length 29 [2019-12-07 12:45:15,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:15,844 INFO L462 AbstractCegarLoop]: Abstraction has 47815 states and 149049 transitions. [2019-12-07 12:45:15,844 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:45:15,844 INFO L276 IsEmpty]: Start isEmpty. Operand 47815 states and 149049 transitions. [2019-12-07 12:45:15,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 12:45:15,857 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:15,857 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:15,857 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:15,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:15,857 INFO L82 PathProgramCache]: Analyzing trace with hash -58977604, now seen corresponding path program 1 times [2019-12-07 12:45:15,858 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:15,858 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081293983] [2019-12-07 12:45:15,858 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:15,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:15,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:15,885 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1081293983] [2019-12-07 12:45:15,885 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:15,885 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:45:15,885 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1113503474] [2019-12-07 12:45:15,886 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:45:15,886 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:15,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:45:15,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:45:15,886 INFO L87 Difference]: Start difference. First operand 47815 states and 149049 transitions. Second operand 4 states. [2019-12-07 12:45:15,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:15,945 INFO L93 Difference]: Finished difference Result 18094 states and 53920 transitions. [2019-12-07 12:45:15,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:45:15,945 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 12:45:15,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:15,966 INFO L225 Difference]: With dead ends: 18094 [2019-12-07 12:45:15,966 INFO L226 Difference]: Without dead ends: 18094 [2019-12-07 12:45:15,966 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:45:16,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18094 states. [2019-12-07 12:45:16,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18094 to 17072. [2019-12-07 12:45:16,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17072 states. [2019-12-07 12:45:16,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17072 states to 17072 states and 50902 transitions. [2019-12-07 12:45:16,207 INFO L78 Accepts]: Start accepts. Automaton has 17072 states and 50902 transitions. Word has length 30 [2019-12-07 12:45:16,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:16,207 INFO L462 AbstractCegarLoop]: Abstraction has 17072 states and 50902 transitions. [2019-12-07 12:45:16,207 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:45:16,207 INFO L276 IsEmpty]: Start isEmpty. Operand 17072 states and 50902 transitions. [2019-12-07 12:45:16,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 12:45:16,219 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:16,219 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:16,220 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:16,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:16,220 INFO L82 PathProgramCache]: Analyzing trace with hash 1705939963, now seen corresponding path program 1 times [2019-12-07 12:45:16,220 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:16,220 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [411624971] [2019-12-07 12:45:16,220 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:16,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:16,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:16,277 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [411624971] [2019-12-07 12:45:16,277 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:16,277 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:45:16,277 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [394893803] [2019-12-07 12:45:16,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:45:16,278 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:16,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:45:16,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:45:16,278 INFO L87 Difference]: Start difference. First operand 17072 states and 50902 transitions. Second operand 7 states. [2019-12-07 12:45:17,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:17,007 INFO L93 Difference]: Finished difference Result 33512 states and 98650 transitions. [2019-12-07 12:45:17,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 12:45:17,007 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 12:45:17,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:17,044 INFO L225 Difference]: With dead ends: 33512 [2019-12-07 12:45:17,044 INFO L226 Difference]: Without dead ends: 33512 [2019-12-07 12:45:17,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 12:45:17,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33512 states. [2019-12-07 12:45:17,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33512 to 17421. [2019-12-07 12:45:17,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17421 states. [2019-12-07 12:45:17,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17421 states to 17421 states and 51984 transitions. [2019-12-07 12:45:17,411 INFO L78 Accepts]: Start accepts. Automaton has 17421 states and 51984 transitions. Word has length 33 [2019-12-07 12:45:17,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:17,411 INFO L462 AbstractCegarLoop]: Abstraction has 17421 states and 51984 transitions. [2019-12-07 12:45:17,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:45:17,411 INFO L276 IsEmpty]: Start isEmpty. Operand 17421 states and 51984 transitions. [2019-12-07 12:45:17,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 12:45:17,423 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:17,424 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:17,424 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:17,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:17,424 INFO L82 PathProgramCache]: Analyzing trace with hash 1567643153, now seen corresponding path program 2 times [2019-12-07 12:45:17,424 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:17,424 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1629260458] [2019-12-07 12:45:17,424 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:17,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:17,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:17,480 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1629260458] [2019-12-07 12:45:17,481 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:17,481 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:45:17,481 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1230037306] [2019-12-07 12:45:17,481 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 12:45:17,481 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:17,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 12:45:17,481 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 12:45:17,481 INFO L87 Difference]: Start difference. First operand 17421 states and 51984 transitions. Second operand 8 states. [2019-12-07 12:45:18,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:18,495 INFO L93 Difference]: Finished difference Result 40745 states and 118582 transitions. [2019-12-07 12:45:18,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 12:45:18,495 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 12:45:18,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:18,540 INFO L225 Difference]: With dead ends: 40745 [2019-12-07 12:45:18,540 INFO L226 Difference]: Without dead ends: 40745 [2019-12-07 12:45:18,540 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 12:45:18,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40745 states. [2019-12-07 12:45:18,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40745 to 17296. [2019-12-07 12:45:18,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17296 states. [2019-12-07 12:45:18,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17296 states to 17296 states and 51599 transitions. [2019-12-07 12:45:18,937 INFO L78 Accepts]: Start accepts. Automaton has 17296 states and 51599 transitions. Word has length 33 [2019-12-07 12:45:18,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:18,937 INFO L462 AbstractCegarLoop]: Abstraction has 17296 states and 51599 transitions. [2019-12-07 12:45:18,937 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 12:45:18,937 INFO L276 IsEmpty]: Start isEmpty. Operand 17296 states and 51599 transitions. [2019-12-07 12:45:18,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 12:45:18,951 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:18,951 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:18,951 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:18,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:18,952 INFO L82 PathProgramCache]: Analyzing trace with hash -607763582, now seen corresponding path program 1 times [2019-12-07 12:45:18,952 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:18,952 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100567536] [2019-12-07 12:45:18,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:18,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:19,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:19,021 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100567536] [2019-12-07 12:45:19,021 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:19,021 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:45:19,021 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1494942747] [2019-12-07 12:45:19,022 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:45:19,022 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:19,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:45:19,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:45:19,022 INFO L87 Difference]: Start difference. First operand 17296 states and 51599 transitions. Second operand 7 states. [2019-12-07 12:45:19,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:19,727 INFO L93 Difference]: Finished difference Result 30924 states and 90664 transitions. [2019-12-07 12:45:19,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 12:45:19,727 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 12:45:19,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:19,762 INFO L225 Difference]: With dead ends: 30924 [2019-12-07 12:45:19,763 INFO L226 Difference]: Without dead ends: 30924 [2019-12-07 12:45:19,763 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 12:45:19,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30924 states. [2019-12-07 12:45:20,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30924 to 17049. [2019-12-07 12:45:20,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17049 states. [2019-12-07 12:45:20,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17049 states to 17049 states and 50863 transitions. [2019-12-07 12:45:20,103 INFO L78 Accepts]: Start accepts. Automaton has 17049 states and 50863 transitions. Word has length 34 [2019-12-07 12:45:20,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:20,103 INFO L462 AbstractCegarLoop]: Abstraction has 17049 states and 50863 transitions. [2019-12-07 12:45:20,103 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:45:20,104 INFO L276 IsEmpty]: Start isEmpty. Operand 17049 states and 50863 transitions. [2019-12-07 12:45:20,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 12:45:20,116 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:20,116 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:20,116 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:20,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:20,116 INFO L82 PathProgramCache]: Analyzing trace with hash 846412022, now seen corresponding path program 2 times [2019-12-07 12:45:20,117 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:20,117 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038798702] [2019-12-07 12:45:20,117 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:20,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:20,180 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:20,181 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038798702] [2019-12-07 12:45:20,181 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:20,181 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:45:20,181 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [937725164] [2019-12-07 12:45:20,181 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:45:20,181 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:20,181 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:45:20,182 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:45:20,182 INFO L87 Difference]: Start difference. First operand 17049 states and 50863 transitions. Second operand 7 states. [2019-12-07 12:45:20,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:20,890 INFO L93 Difference]: Finished difference Result 39349 states and 114135 transitions. [2019-12-07 12:45:20,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 12:45:20,890 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 12:45:20,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:20,933 INFO L225 Difference]: With dead ends: 39349 [2019-12-07 12:45:20,933 INFO L226 Difference]: Without dead ends: 39349 [2019-12-07 12:45:20,933 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 12:45:21,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39349 states. [2019-12-07 12:45:21,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39349 to 16930. [2019-12-07 12:45:21,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16930 states. [2019-12-07 12:45:21,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16930 states to 16930 states and 50502 transitions. [2019-12-07 12:45:21,317 INFO L78 Accepts]: Start accepts. Automaton has 16930 states and 50502 transitions. Word has length 34 [2019-12-07 12:45:21,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:21,317 INFO L462 AbstractCegarLoop]: Abstraction has 16930 states and 50502 transitions. [2019-12-07 12:45:21,317 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:45:21,317 INFO L276 IsEmpty]: Start isEmpty. Operand 16930 states and 50502 transitions. [2019-12-07 12:45:21,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 12:45:21,330 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:21,330 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:21,330 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:21,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:21,330 INFO L82 PathProgramCache]: Analyzing trace with hash -211414604, now seen corresponding path program 3 times [2019-12-07 12:45:21,330 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:21,330 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107341800] [2019-12-07 12:45:21,331 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:21,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:21,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:21,389 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1107341800] [2019-12-07 12:45:21,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:21,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:45:21,390 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [765514140] [2019-12-07 12:45:21,390 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 12:45:21,390 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:21,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 12:45:21,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 12:45:21,390 INFO L87 Difference]: Start difference. First operand 16930 states and 50502 transitions. Second operand 8 states. [2019-12-07 12:45:22,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:22,279 INFO L93 Difference]: Finished difference Result 35714 states and 103439 transitions. [2019-12-07 12:45:22,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 12:45:22,280 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 12:45:22,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:22,319 INFO L225 Difference]: With dead ends: 35714 [2019-12-07 12:45:22,319 INFO L226 Difference]: Without dead ends: 35714 [2019-12-07 12:45:22,319 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 12:45:22,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35714 states. [2019-12-07 12:45:22,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35714 to 16579. [2019-12-07 12:45:22,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16579 states. [2019-12-07 12:45:22,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16579 states to 16579 states and 49465 transitions. [2019-12-07 12:45:22,697 INFO L78 Accepts]: Start accepts. Automaton has 16579 states and 49465 transitions. Word has length 34 [2019-12-07 12:45:22,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:22,697 INFO L462 AbstractCegarLoop]: Abstraction has 16579 states and 49465 transitions. [2019-12-07 12:45:22,697 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 12:45:22,697 INFO L276 IsEmpty]: Start isEmpty. Operand 16579 states and 49465 transitions. [2019-12-07 12:45:22,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 12:45:22,711 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:22,711 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:22,711 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:22,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:22,711 INFO L82 PathProgramCache]: Analyzing trace with hash 1677421997, now seen corresponding path program 1 times [2019-12-07 12:45:22,711 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:22,712 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [394527844] [2019-12-07 12:45:22,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:22,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:22,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:22,739 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [394527844] [2019-12-07 12:45:22,740 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:22,740 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:45:22,740 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [755833171] [2019-12-07 12:45:22,740 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:45:22,740 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:22,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:45:22,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:22,740 INFO L87 Difference]: Start difference. First operand 16579 states and 49465 transitions. Second operand 3 states. [2019-12-07 12:45:22,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:22,787 INFO L93 Difference]: Finished difference Result 16579 states and 48829 transitions. [2019-12-07 12:45:22,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:45:22,787 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 12:45:22,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:22,805 INFO L225 Difference]: With dead ends: 16579 [2019-12-07 12:45:22,805 INFO L226 Difference]: Without dead ends: 16579 [2019-12-07 12:45:22,805 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:22,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16579 states. [2019-12-07 12:45:23,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16579 to 16329. [2019-12-07 12:45:23,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16329 states. [2019-12-07 12:45:23,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16329 states to 16329 states and 48131 transitions. [2019-12-07 12:45:23,030 INFO L78 Accepts]: Start accepts. Automaton has 16329 states and 48131 transitions. Word has length 41 [2019-12-07 12:45:23,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:23,030 INFO L462 AbstractCegarLoop]: Abstraction has 16329 states and 48131 transitions. [2019-12-07 12:45:23,030 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:45:23,030 INFO L276 IsEmpty]: Start isEmpty. Operand 16329 states and 48131 transitions. [2019-12-07 12:45:23,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 12:45:23,044 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:23,044 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:23,044 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:23,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:23,044 INFO L82 PathProgramCache]: Analyzing trace with hash -1399805170, now seen corresponding path program 1 times [2019-12-07 12:45:23,044 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:23,044 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1365926446] [2019-12-07 12:45:23,044 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:23,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:23,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:23,082 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1365926446] [2019-12-07 12:45:23,082 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:23,082 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:45:23,082 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [848572786] [2019-12-07 12:45:23,082 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:45:23,082 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:23,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:45:23,083 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:45:23,083 INFO L87 Difference]: Start difference. First operand 16329 states and 48131 transitions. Second operand 5 states. [2019-12-07 12:45:23,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:23,131 INFO L93 Difference]: Finished difference Result 14888 states and 45043 transitions. [2019-12-07 12:45:23,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:45:23,131 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 12:45:23,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:23,147 INFO L225 Difference]: With dead ends: 14888 [2019-12-07 12:45:23,147 INFO L226 Difference]: Without dead ends: 14888 [2019-12-07 12:45:23,147 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:45:23,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14888 states. [2019-12-07 12:45:23,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14888 to 13409. [2019-12-07 12:45:23,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13409 states. [2019-12-07 12:45:23,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13409 states to 13409 states and 40769 transitions. [2019-12-07 12:45:23,344 INFO L78 Accepts]: Start accepts. Automaton has 13409 states and 40769 transitions. Word has length 42 [2019-12-07 12:45:23,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:23,344 INFO L462 AbstractCegarLoop]: Abstraction has 13409 states and 40769 transitions. [2019-12-07 12:45:23,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:45:23,344 INFO L276 IsEmpty]: Start isEmpty. Operand 13409 states and 40769 transitions. [2019-12-07 12:45:23,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:45:23,356 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:23,356 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:23,356 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:23,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:23,357 INFO L82 PathProgramCache]: Analyzing trace with hash 622120387, now seen corresponding path program 1 times [2019-12-07 12:45:23,357 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:23,357 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386728026] [2019-12-07 12:45:23,357 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:23,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:23,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:23,392 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [386728026] [2019-12-07 12:45:23,392 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:23,392 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:45:23,392 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1112230065] [2019-12-07 12:45:23,392 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:45:23,392 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:23,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:45:23,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:23,393 INFO L87 Difference]: Start difference. First operand 13409 states and 40769 transitions. Second operand 3 states. [2019-12-07 12:45:23,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:23,455 INFO L93 Difference]: Finished difference Result 16090 states and 48942 transitions. [2019-12-07 12:45:23,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:45:23,456 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:45:23,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:23,473 INFO L225 Difference]: With dead ends: 16090 [2019-12-07 12:45:23,474 INFO L226 Difference]: Without dead ends: 16090 [2019-12-07 12:45:23,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:23,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16090 states. [2019-12-07 12:45:23,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16090 to 13172. [2019-12-07 12:45:23,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13172 states. [2019-12-07 12:45:23,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13172 states to 13172 states and 40294 transitions. [2019-12-07 12:45:23,692 INFO L78 Accepts]: Start accepts. Automaton has 13172 states and 40294 transitions. Word has length 66 [2019-12-07 12:45:23,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:23,692 INFO L462 AbstractCegarLoop]: Abstraction has 13172 states and 40294 transitions. [2019-12-07 12:45:23,692 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:45:23,692 INFO L276 IsEmpty]: Start isEmpty. Operand 13172 states and 40294 transitions. [2019-12-07 12:45:23,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:45:23,704 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:23,705 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:23,705 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:23,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:23,705 INFO L82 PathProgramCache]: Analyzing trace with hash -586454608, now seen corresponding path program 1 times [2019-12-07 12:45:23,705 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:23,705 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [29474761] [2019-12-07 12:45:23,705 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:23,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:23,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:23,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [29474761] [2019-12-07 12:45:23,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:23,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:45:23,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2091703834] [2019-12-07 12:45:23,735 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:45:23,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:23,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:45:23,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:23,735 INFO L87 Difference]: Start difference. First operand 13172 states and 40294 transitions. Second operand 3 states. [2019-12-07 12:45:23,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:23,861 INFO L93 Difference]: Finished difference Result 18616 states and 57195 transitions. [2019-12-07 12:45:23,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:45:23,861 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 12:45:23,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:23,881 INFO L225 Difference]: With dead ends: 18616 [2019-12-07 12:45:23,881 INFO L226 Difference]: Without dead ends: 18616 [2019-12-07 12:45:23,881 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:45:23,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18616 states. [2019-12-07 12:45:24,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18616 to 13484. [2019-12-07 12:45:24,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13484 states. [2019-12-07 12:45:24,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13484 states to 13484 states and 41336 transitions. [2019-12-07 12:45:24,107 INFO L78 Accepts]: Start accepts. Automaton has 13484 states and 41336 transitions. Word has length 67 [2019-12-07 12:45:24,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:24,107 INFO L462 AbstractCegarLoop]: Abstraction has 13484 states and 41336 transitions. [2019-12-07 12:45:24,107 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:45:24,107 INFO L276 IsEmpty]: Start isEmpty. Operand 13484 states and 41336 transitions. [2019-12-07 12:45:24,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:45:24,120 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:24,120 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:24,120 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:24,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:24,120 INFO L82 PathProgramCache]: Analyzing trace with hash -1786041058, now seen corresponding path program 1 times [2019-12-07 12:45:24,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:24,120 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [948679973] [2019-12-07 12:45:24,121 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:24,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:24,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:24,161 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [948679973] [2019-12-07 12:45:24,161 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:24,161 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:45:24,161 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [765932078] [2019-12-07 12:45:24,162 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:45:24,162 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:24,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:45:24,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:45:24,162 INFO L87 Difference]: Start difference. First operand 13484 states and 41336 transitions. Second operand 4 states. [2019-12-07 12:45:24,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:24,236 INFO L93 Difference]: Finished difference Result 13312 states and 40665 transitions. [2019-12-07 12:45:24,236 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:45:24,236 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 12:45:24,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:24,250 INFO L225 Difference]: With dead ends: 13312 [2019-12-07 12:45:24,250 INFO L226 Difference]: Without dead ends: 13312 [2019-12-07 12:45:24,250 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:45:24,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13312 states. [2019-12-07 12:45:24,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13312 to 11957. [2019-12-07 12:45:24,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11957 states. [2019-12-07 12:45:24,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11957 states to 11957 states and 36326 transitions. [2019-12-07 12:45:24,429 INFO L78 Accepts]: Start accepts. Automaton has 11957 states and 36326 transitions. Word has length 67 [2019-12-07 12:45:24,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:24,429 INFO L462 AbstractCegarLoop]: Abstraction has 11957 states and 36326 transitions. [2019-12-07 12:45:24,429 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:45:24,429 INFO L276 IsEmpty]: Start isEmpty. Operand 11957 states and 36326 transitions. [2019-12-07 12:45:24,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:45:24,440 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:24,440 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:24,440 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:24,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:24,440 INFO L82 PathProgramCache]: Analyzing trace with hash 1398756383, now seen corresponding path program 1 times [2019-12-07 12:45:24,440 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:24,440 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846923546] [2019-12-07 12:45:24,441 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:24,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:24,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:24,544 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1846923546] [2019-12-07 12:45:24,544 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:24,544 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:45:24,544 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [169733602] [2019-12-07 12:45:24,544 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 12:45:24,544 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:24,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 12:45:24,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:45:24,544 INFO L87 Difference]: Start difference. First operand 11957 states and 36326 transitions. Second operand 9 states. [2019-12-07 12:45:25,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:25,949 INFO L93 Difference]: Finished difference Result 107580 states and 322291 transitions. [2019-12-07 12:45:25,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 12:45:25,949 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 12:45:25,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:26,053 INFO L225 Difference]: With dead ends: 107580 [2019-12-07 12:45:26,053 INFO L226 Difference]: Without dead ends: 87002 [2019-12-07 12:45:26,054 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 553 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=369, Invalid=1353, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 12:45:26,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87002 states. [2019-12-07 12:45:26,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87002 to 12938. [2019-12-07 12:45:26,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12938 states. [2019-12-07 12:45:26,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12938 states to 12938 states and 39543 transitions. [2019-12-07 12:45:26,738 INFO L78 Accepts]: Start accepts. Automaton has 12938 states and 39543 transitions. Word has length 67 [2019-12-07 12:45:26,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:26,738 INFO L462 AbstractCegarLoop]: Abstraction has 12938 states and 39543 transitions. [2019-12-07 12:45:26,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 12:45:26,739 INFO L276 IsEmpty]: Start isEmpty. Operand 12938 states and 39543 transitions. [2019-12-07 12:45:26,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:45:26,751 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:26,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:26,751 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:26,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:26,751 INFO L82 PathProgramCache]: Analyzing trace with hash 579351643, now seen corresponding path program 2 times [2019-12-07 12:45:26,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:26,751 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1663090197] [2019-12-07 12:45:26,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:26,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:45:26,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:45:26,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1663090197] [2019-12-07 12:45:26,858 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:45:26,858 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:45:26,858 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [891089124] [2019-12-07 12:45:26,859 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 12:45:26,859 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:45:26,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 12:45:26,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:45:26,859 INFO L87 Difference]: Start difference. First operand 12938 states and 39543 transitions. Second operand 9 states. [2019-12-07 12:45:28,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:45:28,396 INFO L93 Difference]: Finished difference Result 99097 states and 296377 transitions. [2019-12-07 12:45:28,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 12:45:28,396 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 12:45:28,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:45:28,486 INFO L225 Difference]: With dead ends: 99097 [2019-12-07 12:45:28,486 INFO L226 Difference]: Without dead ends: 70841 [2019-12-07 12:45:28,487 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 637 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=421, Invalid=1559, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 12:45:28,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70841 states. [2019-12-07 12:45:29,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70841 to 14740. [2019-12-07 12:45:29,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14740 states. [2019-12-07 12:45:29,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14740 states to 14740 states and 45009 transitions. [2019-12-07 12:45:29,086 INFO L78 Accepts]: Start accepts. Automaton has 14740 states and 45009 transitions. Word has length 67 [2019-12-07 12:45:29,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:45:29,086 INFO L462 AbstractCegarLoop]: Abstraction has 14740 states and 45009 transitions. [2019-12-07 12:45:29,086 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 12:45:29,087 INFO L276 IsEmpty]: Start isEmpty. Operand 14740 states and 45009 transitions. [2019-12-07 12:45:29,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:45:29,100 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:45:29,100 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:45:29,100 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:45:29,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:45:29,101 INFO L82 PathProgramCache]: Analyzing trace with hash 1790496915, now seen corresponding path program 3 times [2019-12-07 12:45:29,101 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:45:29,101 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662648486] [2019-12-07 12:45:29,101 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:45:29,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:45:29,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:45:29,212 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:45:29,212 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:45:29,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_93| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1117~0.base_55|) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$r_buff1_thd3~0_279 0) (= v_~a$flush_delayed~0_36 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$mem_tmp~0_25 0) (= v_~a$r_buff0_thd3~0_364 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1117~0.base_55| 1) |v_#valid_91|) (= v_~__unbuffered_p2_EBX~0_67 0) (= v_~y~0_75 0) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1117~0.base_55| 4) |v_#length_25|) (= v_~a~0_169 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard1~0_56 0) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 v_~weak$$choice0~0_21) (= |v_ULTIMATE.start_main_~#t1117~0.offset_34| 0) (= 0 |v_#NULL.base_4|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1117~0.base_55|) 0) (= 0 v_~a$w_buff1_used~0_506) (= 0 v_~__unbuffered_p2_EAX~0_61) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= 0 v_~__unbuffered_p0_EAX~0_116) (= v_~z~0_20 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~x~0_91 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1117~0.base_55| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1117~0.base_55|) |v_ULTIMATE.start_main_~#t1117~0.offset_34| 0)) |v_#memory_int_21|) (= v_~weak$$choice2~0_114 0) (= v_~a$r_buff1_thd0~0_166 0) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_93|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t1118~0.base=|v_ULTIMATE.start_main_~#t1118~0.base_41|, ULTIMATE.start_main_~#t1117~0.offset=|v_ULTIMATE.start_main_~#t1117~0.offset_34|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_169, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_105|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_116, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_61, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_67, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ULTIMATE.start_main_~#t1117~0.base=|v_ULTIMATE.start_main_~#t1117~0.base_55|, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_21, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_166, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_91, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_56, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_25, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ULTIMATE.start_main_~#t1118~0.offset=|v_ULTIMATE.start_main_~#t1118~0.offset_19|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_75, ULTIMATE.start_main_~#t1119~0.offset=|v_ULTIMATE.start_main_~#t1119~0.offset_20|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_36, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_37|, #valid=|v_#valid_91|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ULTIMATE.start_main_~#t1119~0.base=|v_ULTIMATE.start_main_~#t1119~0.base_28|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1118~0.base, ULTIMATE.start_main_~#t1117~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ULTIMATE.start_main_~#t1117~0.base, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t1118~0.offset, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t1119~0.offset, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ULTIMATE.start_main_~#t1119~0.base, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 12:45:29,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995)) (= ~__unbuffered_p0_EAX~0_Out-548638995 ~x~0_In-548638995) (= ~a$r_buff1_thd0~0_Out-548638995 ~a$r_buff0_thd0~0_In-548638995) (= ~a$r_buff0_thd1~0_In-548638995 ~a$r_buff1_thd1~0_Out-548638995) (= ~a$r_buff0_thd2~0_In-548638995 ~a$r_buff1_thd2~0_Out-548638995) (= ~a$r_buff1_thd3~0_Out-548638995 ~a$r_buff0_thd3~0_In-548638995) (= ~a$r_buff0_thd1~0_Out-548638995 1)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-548638995, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-548638995, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-548638995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-548638995, ~x~0=~x~0_In-548638995} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-548638995, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-548638995, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-548638995, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-548638995, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-548638995, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-548638995, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-548638995, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-548638995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-548638995, ~x~0=~x~0_In-548638995} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:45:29,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1118~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1118~0.base_9|) |v_ULTIMATE.start_main_~#t1118~0.offset_7| 1))) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1118~0.base_9|) (not (= |v_ULTIMATE.start_main_~#t1118~0.base_9| 0)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1118~0.base_9| 4) |v_#length_15|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1118~0.base_9| 1) |v_#valid_34|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1118~0.base_9|)) (= |v_ULTIMATE.start_main_~#t1118~0.offset_7| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1118~0.base=|v_ULTIMATE.start_main_~#t1118~0.base_9|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1118~0.offset=|v_ULTIMATE.start_main_~#t1118~0.offset_7|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1118~0.base, ULTIMATE.start_main_~#t1118~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 12:45:29,218 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= |v_ULTIMATE.start_main_~#t1119~0.offset_8| 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1119~0.base_9| 4)) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1119~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1119~0.base_9|) |v_ULTIMATE.start_main_~#t1119~0.offset_8| 2)) |v_#memory_int_9|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1119~0.base_9|) (not (= |v_ULTIMATE.start_main_~#t1119~0.base_9| 0)) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1119~0.base_9|)) (= (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1119~0.base_9| 1) |v_#valid_32|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1119~0.offset=|v_ULTIMATE.start_main_~#t1119~0.offset_8|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1119~0.base=|v_ULTIMATE.start_main_~#t1119~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1119~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1119~0.base] because there is no mapped edge [2019-12-07 12:45:29,218 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-905989814| |P1Thread1of1ForFork2_#t~ite10_Out-905989814|)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-905989814 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-905989814 256)))) (or (and .cse0 (or .cse1 .cse2) (= |P1Thread1of1ForFork2_#t~ite9_Out-905989814| ~a~0_In-905989814)) (and .cse0 (not .cse1) (= ~a$w_buff1~0_In-905989814 |P1Thread1of1ForFork2_#t~ite9_Out-905989814|) (not .cse2)))) InVars {~a~0=~a~0_In-905989814, ~a$w_buff1~0=~a$w_buff1~0_In-905989814, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-905989814, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-905989814} OutVars{~a~0=~a~0_In-905989814, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-905989814|, ~a$w_buff1~0=~a$w_buff1~0_In-905989814, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-905989814, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-905989814|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-905989814} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 12:45:29,221 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1287159371 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1287159371 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-1287159371| ~a$w_buff0_used~0_In-1287159371) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-1287159371| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1287159371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1287159371} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1287159371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1287159371, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1287159371|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 12:45:29,221 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In-2145004758 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-2145004758 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-2145004758 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-2145004758 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-2145004758| ~a$w_buff1_used~0_In-2145004758) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite12_Out-2145004758| 0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2145004758, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2145004758, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2145004758, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2145004758} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2145004758, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2145004758, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2145004758, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2145004758|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2145004758} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 12:45:29,221 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1960997991 256)))) (or (and (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-1960997991 256) 0))) (or (= (mod ~a$w_buff0_used~0_In-1960997991 256) 0) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1960997991 256))) (and (= (mod ~a$w_buff1_used~0_In-1960997991 256) 0) .cse0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite20_Out-1960997991| ~a$w_buff0~0_In-1960997991) (= |P2Thread1of1ForFork0_#t~ite21_Out-1960997991| |P2Thread1of1ForFork0_#t~ite20_Out-1960997991|)) (and (= |P2Thread1of1ForFork0_#t~ite20_In-1960997991| |P2Thread1of1ForFork0_#t~ite20_Out-1960997991|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite21_Out-1960997991| ~a$w_buff0~0_In-1960997991)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1960997991, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1960997991, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1960997991, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1960997991, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1960997991, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1960997991|, ~weak$$choice2~0=~weak$$choice2~0_In-1960997991} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1960997991|, ~a$w_buff0~0=~a$w_buff0~0_In-1960997991, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1960997991, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1960997991, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1960997991, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1960997991|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1960997991, ~weak$$choice2~0=~weak$$choice2~0_In-1960997991} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 12:45:29,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1307443379 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1307443379 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1307443379| 0)) (and (= ~a$r_buff0_thd2~0_In-1307443379 |P1Thread1of1ForFork2_#t~ite13_Out-1307443379|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1307443379, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1307443379} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1307443379, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1307443379, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1307443379|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 12:45:29,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In1303960835 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1303960835 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1303960835 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd2~0_In1303960835 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1303960835| ~a$r_buff1_thd2~0_In1303960835) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out1303960835| 0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1303960835, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1303960835, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1303960835, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1303960835} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1303960835, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1303960835, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1303960835, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1303960835, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1303960835|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 12:45:29,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:45:29,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1749654929 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite24_Out-1749654929| |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|) .cse0 (= ~a$w_buff1~0_In-1749654929 |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1749654929 256) 0))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-1749654929 256) 0)) (and (= 0 (mod ~a$w_buff1_used~0_In-1749654929 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-1749654929 256) 0)))) (and (= ~a$w_buff1~0_In-1749654929 |P2Thread1of1ForFork0_#t~ite24_Out-1749654929|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In-1749654929| |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-1749654929, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-1749654929|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1749654929, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1749654929, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1749654929, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1749654929, ~weak$$choice2~0=~weak$$choice2~0_In-1749654929} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-1749654929, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-1749654929|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-1749654929|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1749654929, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1749654929, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1749654929, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1749654929, ~weak$$choice2~0=~weak$$choice2~0_In-1749654929} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 12:45:29,225 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1679472426 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In-1679472426| |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|) (not .cse0) (= ~a$w_buff0_used~0_In-1679472426 |P2Thread1of1ForFork0_#t~ite27_Out-1679472426|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1679472426| |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1679472426 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-1679472426 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-1679472426 256)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-1679472426 256) 0)))) (= ~a$w_buff0_used~0_In-1679472426 |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1679472426|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1679472426, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1679472426, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1679472426, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1679472426, ~weak$$choice2~0=~weak$$choice2~0_In-1679472426} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1679472426|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1679472426|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1679472426, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1679472426, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1679472426, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1679472426, ~weak$$choice2~0=~weak$$choice2~0_In-1679472426} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 12:45:29,226 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:45:29,228 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 12:45:29,228 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1927994934 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1927994934 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1927994934| ~a$w_buff1~0_In-1927994934)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1927994934| ~a~0_In-1927994934) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In-1927994934, ~a$w_buff1~0=~a$w_buff1~0_In-1927994934, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1927994934, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1927994934} OutVars{~a~0=~a~0_In-1927994934, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1927994934|, ~a$w_buff1~0=~a$w_buff1~0_In-1927994934, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1927994934, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1927994934} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:45:29,229 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:45:29,229 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1240341953 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1240341953 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1240341953 |P2Thread1of1ForFork0_#t~ite40_Out1240341953|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1240341953|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1240341953, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1240341953} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1240341953|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1240341953, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1240341953} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 12:45:29,229 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In476677661 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In476677661 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In476677661 |P0Thread1of1ForFork1_#t~ite5_Out476677661|)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out476677661|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In476677661, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In476677661} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out476677661|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In476677661, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In476677661} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 12:45:29,229 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In152115573 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In152115573 256))) (.cse2 (= (mod ~a$r_buff0_thd1~0_In152115573 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In152115573 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out152115573| ~a$w_buff1_used~0_In152115573) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out152115573| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In152115573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In152115573, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In152115573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In152115573} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out152115573|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In152115573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In152115573, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In152115573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In152115573} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 12:45:29,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_Out-1934197455 ~a$r_buff0_thd1~0_In-1934197455)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1934197455 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1934197455 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (= ~a$r_buff0_thd1~0_Out-1934197455 0) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1934197455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1934197455} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1934197455|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1934197455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1934197455} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:45:29,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1875042691 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In1875042691 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1875042691 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1875042691 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1875042691| 0)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1875042691| ~a$r_buff1_thd1~0_In1875042691) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1875042691, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1875042691, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1875042691, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1875042691} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1875042691|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1875042691, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1875042691, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1875042691, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1875042691} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 12:45:29,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:45:29,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-1687069109 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1687069109 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1687069109 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1687069109 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1687069109| ~a$w_buff1_used~0_In-1687069109) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite41_Out-1687069109| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1687069109, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687069109, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1687069109, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1687069109} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1687069109, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687069109, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1687069109, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1687069109, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1687069109|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 12:45:29,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1405999605 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1405999605 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1405999605| ~a$r_buff0_thd3~0_In-1405999605) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1405999605|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1405999605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1405999605} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1405999605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1405999605, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1405999605|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 12:45:29,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In207228181 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In207228181 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd3~0_In207228181 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In207228181 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out207228181| ~a$r_buff1_thd3~0_In207228181) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out207228181| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In207228181, ~a$w_buff0_used~0=~a$w_buff0_used~0_In207228181, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In207228181, ~a$w_buff1_used~0=~a$w_buff1_used~0_In207228181} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out207228181|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In207228181, ~a$w_buff0_used~0=~a$w_buff0_used~0_In207228181, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In207228181, ~a$w_buff1_used~0=~a$w_buff1_used~0_In207228181} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 12:45:29,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 12:45:29,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:45:29,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In1008716173 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1008716173 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite47_Out1008716173| |ULTIMATE.start_main_#t~ite48_Out1008716173|))) (or (and .cse0 (not .cse1) (not .cse2) (= ~a$w_buff1~0_In1008716173 |ULTIMATE.start_main_#t~ite47_Out1008716173|)) (and (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1008716173| ~a~0_In1008716173) .cse0))) InVars {~a~0=~a~0_In1008716173, ~a$w_buff1~0=~a$w_buff1~0_In1008716173, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1008716173, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1008716173} OutVars{~a~0=~a~0_In1008716173, ~a$w_buff1~0=~a$w_buff1~0_In1008716173, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1008716173|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1008716173, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1008716173|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1008716173} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:45:29,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-2139516670 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-2139516670 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-2139516670|) (not .cse1)) (and (= ~a$w_buff0_used~0_In-2139516670 |ULTIMATE.start_main_#t~ite49_Out-2139516670|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2139516670, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2139516670} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-2139516670, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2139516670|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2139516670} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:45:29,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In39316293 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In39316293 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In39316293 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In39316293 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out39316293| 0)) (and (= |ULTIMATE.start_main_#t~ite50_Out39316293| ~a$w_buff1_used~0_In39316293) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In39316293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In39316293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In39316293, ~a$w_buff1_used~0=~a$w_buff1_used~0_In39316293} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out39316293|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In39316293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In39316293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In39316293, ~a$w_buff1_used~0=~a$w_buff1_used~0_In39316293} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:45:29,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-7524266 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-7524266 256)))) (or (and (= ~a$r_buff0_thd0~0_In-7524266 |ULTIMATE.start_main_#t~ite51_Out-7524266|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-7524266| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-7524266, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7524266} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-7524266|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-7524266, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7524266} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:45:29,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In1921792433 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1921792433 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1921792433 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1921792433 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd0~0_In1921792433 |ULTIMATE.start_main_#t~ite52_Out1921792433|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out1921792433|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1921792433, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1921792433, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921792433, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1921792433} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1921792433|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1921792433, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1921792433, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921792433, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1921792433} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:45:29,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~main$tmp_guard1~0_19 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_66) (= v_~__unbuffered_p2_EBX~0_30 0) (= v_~y~0_31 2) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:45:29,286 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:45:29 BasicIcfg [2019-12-07 12:45:29,286 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:45:29,286 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:45:29,287 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:45:29,287 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:45:29,287 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:44:08" (3/4) ... [2019-12-07 12:45:29,288 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:45:29,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_93| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1117~0.base_55|) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$r_buff1_thd3~0_279 0) (= v_~a$flush_delayed~0_36 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$mem_tmp~0_25 0) (= v_~a$r_buff0_thd3~0_364 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1117~0.base_55| 1) |v_#valid_91|) (= v_~__unbuffered_p2_EBX~0_67 0) (= v_~y~0_75 0) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t1117~0.base_55| 4) |v_#length_25|) (= v_~a~0_169 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard1~0_56 0) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 v_~weak$$choice0~0_21) (= |v_ULTIMATE.start_main_~#t1117~0.offset_34| 0) (= 0 |v_#NULL.base_4|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1117~0.base_55|) 0) (= 0 v_~a$w_buff1_used~0_506) (= 0 v_~__unbuffered_p2_EAX~0_61) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= 0 v_~__unbuffered_p0_EAX~0_116) (= v_~z~0_20 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~x~0_91 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1117~0.base_55| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1117~0.base_55|) |v_ULTIMATE.start_main_~#t1117~0.offset_34| 0)) |v_#memory_int_21|) (= v_~weak$$choice2~0_114 0) (= v_~a$r_buff1_thd0~0_166 0) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_93|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t1118~0.base=|v_ULTIMATE.start_main_~#t1118~0.base_41|, ULTIMATE.start_main_~#t1117~0.offset=|v_ULTIMATE.start_main_~#t1117~0.offset_34|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_169, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_105|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_116, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_61, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_67, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ULTIMATE.start_main_~#t1117~0.base=|v_ULTIMATE.start_main_~#t1117~0.base_55|, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_21, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_166, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_91, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_56, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_25, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ULTIMATE.start_main_~#t1118~0.offset=|v_ULTIMATE.start_main_~#t1118~0.offset_19|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_75, ULTIMATE.start_main_~#t1119~0.offset=|v_ULTIMATE.start_main_~#t1119~0.offset_20|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_36, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_37|, #valid=|v_#valid_91|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ULTIMATE.start_main_~#t1119~0.base=|v_ULTIMATE.start_main_~#t1119~0.base_28|, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1118~0.base, ULTIMATE.start_main_~#t1117~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ULTIMATE.start_main_~#t1117~0.base, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t1118~0.offset, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t1119~0.offset, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ULTIMATE.start_main_~#t1119~0.base, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 12:45:29,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995)) (= ~__unbuffered_p0_EAX~0_Out-548638995 ~x~0_In-548638995) (= ~a$r_buff1_thd0~0_Out-548638995 ~a$r_buff0_thd0~0_In-548638995) (= ~a$r_buff0_thd1~0_In-548638995 ~a$r_buff1_thd1~0_Out-548638995) (= ~a$r_buff0_thd2~0_In-548638995 ~a$r_buff1_thd2~0_Out-548638995) (= ~a$r_buff1_thd3~0_Out-548638995 ~a$r_buff0_thd3~0_In-548638995) (= ~a$r_buff0_thd1~0_Out-548638995 1)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-548638995, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-548638995, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-548638995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-548638995, ~x~0=~x~0_In-548638995} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-548638995, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-548638995, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-548638995, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-548638995, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-548638995, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-548638995, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-548638995, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-548638995, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-548638995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-548638995, ~x~0=~x~0_In-548638995} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:45:29,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1118~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1118~0.base_9|) |v_ULTIMATE.start_main_~#t1118~0.offset_7| 1))) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1118~0.base_9|) (not (= |v_ULTIMATE.start_main_~#t1118~0.base_9| 0)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1118~0.base_9| 4) |v_#length_15|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1118~0.base_9| 1) |v_#valid_34|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1118~0.base_9|)) (= |v_ULTIMATE.start_main_~#t1118~0.offset_7| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1118~0.base=|v_ULTIMATE.start_main_~#t1118~0.base_9|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1118~0.offset=|v_ULTIMATE.start_main_~#t1118~0.offset_7|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1118~0.base, ULTIMATE.start_main_~#t1118~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 12:45:29,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= |v_ULTIMATE.start_main_~#t1119~0.offset_8| 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1119~0.base_9| 4)) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1119~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1119~0.base_9|) |v_ULTIMATE.start_main_~#t1119~0.offset_8| 2)) |v_#memory_int_9|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1119~0.base_9|) (not (= |v_ULTIMATE.start_main_~#t1119~0.base_9| 0)) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1119~0.base_9|)) (= (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1119~0.base_9| 1) |v_#valid_32|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1119~0.offset=|v_ULTIMATE.start_main_~#t1119~0.offset_8|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1119~0.base=|v_ULTIMATE.start_main_~#t1119~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1119~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t1119~0.base] because there is no mapped edge [2019-12-07 12:45:29,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-905989814| |P1Thread1of1ForFork2_#t~ite10_Out-905989814|)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-905989814 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-905989814 256)))) (or (and .cse0 (or .cse1 .cse2) (= |P1Thread1of1ForFork2_#t~ite9_Out-905989814| ~a~0_In-905989814)) (and .cse0 (not .cse1) (= ~a$w_buff1~0_In-905989814 |P1Thread1of1ForFork2_#t~ite9_Out-905989814|) (not .cse2)))) InVars {~a~0=~a~0_In-905989814, ~a$w_buff1~0=~a$w_buff1~0_In-905989814, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-905989814, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-905989814} OutVars{~a~0=~a~0_In-905989814, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-905989814|, ~a$w_buff1~0=~a$w_buff1~0_In-905989814, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-905989814, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-905989814|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-905989814} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 12:45:29,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1287159371 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1287159371 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-1287159371| ~a$w_buff0_used~0_In-1287159371) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-1287159371| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1287159371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1287159371} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1287159371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1287159371, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1287159371|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 12:45:29,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In-2145004758 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-2145004758 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-2145004758 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-2145004758 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-2145004758| ~a$w_buff1_used~0_In-2145004758) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite12_Out-2145004758| 0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2145004758, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2145004758, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2145004758, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2145004758} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2145004758, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2145004758, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2145004758, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2145004758|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2145004758} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 12:45:29,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1960997991 256)))) (or (and (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-1960997991 256) 0))) (or (= (mod ~a$w_buff0_used~0_In-1960997991 256) 0) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1960997991 256))) (and (= (mod ~a$w_buff1_used~0_In-1960997991 256) 0) .cse0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite20_Out-1960997991| ~a$w_buff0~0_In-1960997991) (= |P2Thread1of1ForFork0_#t~ite21_Out-1960997991| |P2Thread1of1ForFork0_#t~ite20_Out-1960997991|)) (and (= |P2Thread1of1ForFork0_#t~ite20_In-1960997991| |P2Thread1of1ForFork0_#t~ite20_Out-1960997991|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite21_Out-1960997991| ~a$w_buff0~0_In-1960997991)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1960997991, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1960997991, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1960997991, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1960997991, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1960997991, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1960997991|, ~weak$$choice2~0=~weak$$choice2~0_In-1960997991} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1960997991|, ~a$w_buff0~0=~a$w_buff0~0_In-1960997991, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1960997991, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1960997991, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1960997991, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1960997991|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1960997991, ~weak$$choice2~0=~weak$$choice2~0_In-1960997991} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 12:45:29,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1307443379 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1307443379 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1307443379| 0)) (and (= ~a$r_buff0_thd2~0_In-1307443379 |P1Thread1of1ForFork2_#t~ite13_Out-1307443379|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1307443379, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1307443379} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1307443379, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1307443379, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1307443379|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 12:45:29,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In1303960835 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1303960835 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1303960835 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd2~0_In1303960835 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1303960835| ~a$r_buff1_thd2~0_In1303960835) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out1303960835| 0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1303960835, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1303960835, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1303960835, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1303960835} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1303960835, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1303960835, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1303960835, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1303960835, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1303960835|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 12:45:29,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:45:29,294 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1749654929 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite24_Out-1749654929| |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|) .cse0 (= ~a$w_buff1~0_In-1749654929 |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1749654929 256) 0))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-1749654929 256) 0)) (and (= 0 (mod ~a$w_buff1_used~0_In-1749654929 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-1749654929 256) 0)))) (and (= ~a$w_buff1~0_In-1749654929 |P2Thread1of1ForFork0_#t~ite24_Out-1749654929|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In-1749654929| |P2Thread1of1ForFork0_#t~ite23_Out-1749654929|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-1749654929, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-1749654929|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1749654929, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1749654929, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1749654929, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1749654929, ~weak$$choice2~0=~weak$$choice2~0_In-1749654929} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-1749654929, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-1749654929|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-1749654929|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1749654929, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1749654929, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1749654929, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1749654929, ~weak$$choice2~0=~weak$$choice2~0_In-1749654929} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 12:45:29,294 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1679472426 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In-1679472426| |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|) (not .cse0) (= ~a$w_buff0_used~0_In-1679472426 |P2Thread1of1ForFork0_#t~ite27_Out-1679472426|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-1679472426| |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1679472426 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-1679472426 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-1679472426 256)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-1679472426 256) 0)))) (= ~a$w_buff0_used~0_In-1679472426 |P2Thread1of1ForFork0_#t~ite26_Out-1679472426|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1679472426|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1679472426, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1679472426, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1679472426, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1679472426, ~weak$$choice2~0=~weak$$choice2~0_In-1679472426} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1679472426|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1679472426|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1679472426, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1679472426, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1679472426, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1679472426, ~weak$$choice2~0=~weak$$choice2~0_In-1679472426} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 12:45:29,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:45:29,296 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 12:45:29,297 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1927994934 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1927994934 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1927994934| ~a$w_buff1~0_In-1927994934)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1927994934| ~a~0_In-1927994934) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In-1927994934, ~a$w_buff1~0=~a$w_buff1~0_In-1927994934, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1927994934, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1927994934} OutVars{~a~0=~a~0_In-1927994934, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1927994934|, ~a$w_buff1~0=~a$w_buff1~0_In-1927994934, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1927994934, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1927994934} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:45:29,297 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:45:29,297 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1240341953 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1240341953 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1240341953 |P2Thread1of1ForFork0_#t~ite40_Out1240341953|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1240341953|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1240341953, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1240341953} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1240341953|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1240341953, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1240341953} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 12:45:29,297 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In476677661 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In476677661 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In476677661 |P0Thread1of1ForFork1_#t~ite5_Out476677661|)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out476677661|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In476677661, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In476677661} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out476677661|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In476677661, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In476677661} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 12:45:29,297 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In152115573 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In152115573 256))) (.cse2 (= (mod ~a$r_buff0_thd1~0_In152115573 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In152115573 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out152115573| ~a$w_buff1_used~0_In152115573) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out152115573| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In152115573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In152115573, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In152115573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In152115573} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out152115573|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In152115573, ~a$w_buff0_used~0=~a$w_buff0_used~0_In152115573, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In152115573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In152115573} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 12:45:29,298 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_Out-1934197455 ~a$r_buff0_thd1~0_In-1934197455)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1934197455 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1934197455 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (= ~a$r_buff0_thd1~0_Out-1934197455 0) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1934197455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1934197455} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1934197455|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1934197455, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1934197455} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:45:29,298 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1875042691 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In1875042691 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1875042691 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1875042691 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1875042691| 0)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1875042691| ~a$r_buff1_thd1~0_In1875042691) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1875042691, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1875042691, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1875042691, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1875042691} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1875042691|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1875042691, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1875042691, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1875042691, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1875042691} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 12:45:29,298 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:45:29,298 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-1687069109 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1687069109 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1687069109 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1687069109 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1687069109| ~a$w_buff1_used~0_In-1687069109) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite41_Out-1687069109| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1687069109, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687069109, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1687069109, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1687069109} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1687069109, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1687069109, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1687069109, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1687069109, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1687069109|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 12:45:29,299 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1405999605 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1405999605 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1405999605| ~a$r_buff0_thd3~0_In-1405999605) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1405999605|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1405999605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1405999605} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1405999605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1405999605, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1405999605|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 12:45:29,299 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In207228181 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In207228181 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd3~0_In207228181 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In207228181 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out207228181| ~a$r_buff1_thd3~0_In207228181) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out207228181| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In207228181, ~a$w_buff0_used~0=~a$w_buff0_used~0_In207228181, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In207228181, ~a$w_buff1_used~0=~a$w_buff1_used~0_In207228181} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out207228181|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In207228181, ~a$w_buff0_used~0=~a$w_buff0_used~0_In207228181, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In207228181, ~a$w_buff1_used~0=~a$w_buff1_used~0_In207228181} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 12:45:29,299 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 12:45:29,299 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:45:29,300 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In1008716173 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1008716173 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite47_Out1008716173| |ULTIMATE.start_main_#t~ite48_Out1008716173|))) (or (and .cse0 (not .cse1) (not .cse2) (= ~a$w_buff1~0_In1008716173 |ULTIMATE.start_main_#t~ite47_Out1008716173|)) (and (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1008716173| ~a~0_In1008716173) .cse0))) InVars {~a~0=~a~0_In1008716173, ~a$w_buff1~0=~a$w_buff1~0_In1008716173, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1008716173, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1008716173} OutVars{~a~0=~a~0_In1008716173, ~a$w_buff1~0=~a$w_buff1~0_In1008716173, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1008716173|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1008716173, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1008716173|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1008716173} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:45:29,300 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-2139516670 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-2139516670 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-2139516670|) (not .cse1)) (and (= ~a$w_buff0_used~0_In-2139516670 |ULTIMATE.start_main_#t~ite49_Out-2139516670|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2139516670, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2139516670} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-2139516670, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2139516670|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2139516670} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:45:29,300 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In39316293 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In39316293 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In39316293 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In39316293 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out39316293| 0)) (and (= |ULTIMATE.start_main_#t~ite50_Out39316293| ~a$w_buff1_used~0_In39316293) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In39316293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In39316293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In39316293, ~a$w_buff1_used~0=~a$w_buff1_used~0_In39316293} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out39316293|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In39316293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In39316293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In39316293, ~a$w_buff1_used~0=~a$w_buff1_used~0_In39316293} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:45:29,301 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-7524266 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-7524266 256)))) (or (and (= ~a$r_buff0_thd0~0_In-7524266 |ULTIMATE.start_main_#t~ite51_Out-7524266|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-7524266| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-7524266, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7524266} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-7524266|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-7524266, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7524266} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:45:29,301 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In1921792433 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1921792433 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1921792433 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1921792433 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd0~0_In1921792433 |ULTIMATE.start_main_#t~ite52_Out1921792433|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out1921792433|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1921792433, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1921792433, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921792433, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1921792433} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1921792433|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1921792433, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1921792433, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921792433, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1921792433} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:45:29,301 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~main$tmp_guard1~0_19 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_66) (= v_~__unbuffered_p2_EBX~0_30 0) (= v_~y~0_31 2) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:45:29,354 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_807b3598-432e-48a1-8f29-fb3bd9bd5c17/bin/uautomizer/witness.graphml [2019-12-07 12:45:29,354 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:45:29,355 INFO L168 Benchmark]: Toolchain (without parser) took 81711.86 ms. Allocated memory was 1.0 GB in the beginning and 6.9 GB in the end (delta: 5.9 GB). Free memory was 939.3 MB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 12:45:29,355 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:45:29,355 INFO L168 Benchmark]: CACSL2BoogieTranslator took 400.12 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 111.1 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -139.5 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 12:45:29,356 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.65 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:45:29,356 INFO L168 Benchmark]: Boogie Preprocessor took 26.74 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:45:29,356 INFO L168 Benchmark]: RCFGBuilder took 413.08 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. [2019-12-07 12:45:29,356 INFO L168 Benchmark]: TraceAbstraction took 80761.51 ms. Allocated memory was 1.1 GB in the beginning and 6.9 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2019-12-07 12:45:29,356 INFO L168 Benchmark]: Witness Printer took 67.71 ms. Allocated memory is still 6.9 GB. Free memory was 3.8 GB in the beginning and 3.8 GB in the end (delta: 60.4 MB). Peak memory consumption was 60.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:45:29,358 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 400.12 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 111.1 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -139.5 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.65 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.74 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 413.08 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 80761.51 ms. Allocated memory was 1.1 GB in the beginning and 6.9 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. * Witness Printer took 67.71 ms. Allocated memory is still 6.9 GB. Free memory was 3.8 GB in the beginning and 3.8 GB in the end (delta: 60.4 MB). Peak memory consumption was 60.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.0s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 100 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 33 ChoiceCompositions, 7302 VarBasedMoverChecksPositive, 250 VarBasedMoverChecksNegative, 40 SemBasedMoverChecksPositive, 286 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 87212 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L830] FCALL, FORK 0 pthread_create(&t1117, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L733] 1 a$w_buff1 = a$w_buff0 [L734] 1 a$w_buff0 = 1 [L735] 1 a$w_buff1_used = a$w_buff0_used [L736] 1 a$w_buff0_used = (_Bool)1 [L832] FCALL, FORK 0 pthread_create(&t1118, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L762] 2 x = 1 [L765] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L768] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L768] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L834] FCALL, FORK 0 pthread_create(&t1119, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L782] 3 y = 2 [L785] 3 z = 1 [L788] 3 __unbuffered_p2_EAX = z [L791] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L792] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L793] 3 a$flush_delayed = weak$$choice2 [L794] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L795] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L795] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L769] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L796] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L770] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L771] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L748] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L797] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L798] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L799] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=1] [L799] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=1] [L801] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L802] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L748] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L807] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L749] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L750] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L808] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L809] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L810] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L840] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L840] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L841] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L842] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L843] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 80.5s, OverallIterations: 27, TraceHistogramMax: 1, AutomataDifference: 18.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5559 SDtfs, 7959 SDslu, 13337 SDs, 0 SdLazy, 8337 SolverSat, 517 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 282 GetRequests, 36 SyntacticMatches, 13 SemanticMatches, 233 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1684 ImplicationChecksByTransitivity, 2.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=172880occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 43.3s AutomataMinimizationTime, 26 MinimizatonAttempts, 436404 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 956 NumberOfCodeBlocks, 956 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 863 ConstructedInterpolants, 0 QuantifiedInterpolants, 168162 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 26 InterpolantComputations, 26 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...