./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix042_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix042_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2efa23eb8a88b71e9d44ed80492b6f5d19134b23 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:30:56,957 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:30:56,958 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:30:56,965 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:30:56,966 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:30:56,966 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:30:56,967 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:30:56,968 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:30:56,970 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:30:56,970 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:30:56,971 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:30:56,972 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:30:56,972 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:30:56,973 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:30:56,973 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:30:56,974 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:30:56,975 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:30:56,976 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:30:56,977 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:30:56,978 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:30:56,980 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:30:56,980 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:30:56,981 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:30:56,981 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:30:56,983 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:30:56,983 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:30:56,983 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:30:56,984 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:30:56,984 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:30:56,985 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:30:56,985 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:30:56,986 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:30:56,986 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:30:56,987 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:30:56,988 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:30:56,988 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:30:56,988 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:30:56,988 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:30:56,989 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:30:56,989 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:30:56,990 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:30:56,990 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:30:57,003 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:30:57,003 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:30:57,004 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:30:57,004 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:30:57,004 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:30:57,004 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:30:57,005 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:30:57,005 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:30:57,005 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:30:57,005 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:30:57,005 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:30:57,005 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:30:57,006 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:30:57,006 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:30:57,006 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:30:57,006 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:30:57,006 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:30:57,007 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:30:57,007 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:30:57,007 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:30:57,007 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:30:57,007 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:30:57,008 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:30:57,008 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:30:57,008 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:30:57,008 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:30:57,008 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:30:57,009 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:30:57,009 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:30:57,009 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2efa23eb8a88b71e9d44ed80492b6f5d19134b23 [2019-12-07 17:30:57,119 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:30:57,127 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:30:57,130 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:30:57,131 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:30:57,131 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:30:57,131 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix042_rmo.opt.i [2019-12-07 17:30:57,169 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/data/071605994/bec6b87b0c634475b59ff31361af9981/FLAG0fba0b95d [2019-12-07 17:30:57,624 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:30:57,625 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/sv-benchmarks/c/pthread-wmm/mix042_rmo.opt.i [2019-12-07 17:30:57,636 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/data/071605994/bec6b87b0c634475b59ff31361af9981/FLAG0fba0b95d [2019-12-07 17:30:57,648 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/data/071605994/bec6b87b0c634475b59ff31361af9981 [2019-12-07 17:30:57,651 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:30:57,652 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:30:57,653 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:30:57,653 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:30:57,656 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:30:57,657 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:30:57" (1/1) ... [2019-12-07 17:30:57,659 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:57, skipping insertion in model container [2019-12-07 17:30:57,659 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:30:57" (1/1) ... [2019-12-07 17:30:57,665 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:30:57,700 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:30:57,945 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:30:57,953 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:30:57,994 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:30:58,040 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:30:58,040 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58 WrapperNode [2019-12-07 17:30:58,040 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:30:58,041 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:30:58,041 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:30:58,041 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:30:58,047 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58" (1/1) ... [2019-12-07 17:30:58,060 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58" (1/1) ... [2019-12-07 17:30:58,082 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:30:58,082 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:30:58,082 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:30:58,082 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:30:58,089 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58" (1/1) ... [2019-12-07 17:30:58,089 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58" (1/1) ... [2019-12-07 17:30:58,092 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58" (1/1) ... [2019-12-07 17:30:58,092 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58" (1/1) ... [2019-12-07 17:30:58,099 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58" (1/1) ... [2019-12-07 17:30:58,102 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58" (1/1) ... [2019-12-07 17:30:58,105 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58" (1/1) ... [2019-12-07 17:30:58,108 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:30:58,108 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:30:58,108 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:30:58,109 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:30:58,109 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:30:58,151 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:30:58,151 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:30:58,151 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:30:58,151 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:30:58,152 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:30:58,152 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:30:58,152 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:30:58,152 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:30:58,152 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:30:58,152 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:30:58,152 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:30:58,152 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:30:58,152 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:30:58,153 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:30:58,503 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:30:58,503 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:30:58,504 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:30:58 BoogieIcfgContainer [2019-12-07 17:30:58,504 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:30:58,504 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:30:58,504 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:30:58,506 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:30:58,506 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:30:57" (1/3) ... [2019-12-07 17:30:58,507 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ca9ef88 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:30:58, skipping insertion in model container [2019-12-07 17:30:58,507 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:30:58" (2/3) ... [2019-12-07 17:30:58,507 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ca9ef88 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:30:58, skipping insertion in model container [2019-12-07 17:30:58,507 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:30:58" (3/3) ... [2019-12-07 17:30:58,508 INFO L109 eAbstractionObserver]: Analyzing ICFG mix042_rmo.opt.i [2019-12-07 17:30:58,514 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:30:58,514 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:30:58,519 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:30:58,519 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:30:58,540 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,541 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,541 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,542 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,542 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,542 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,542 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,542 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,542 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,542 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,542 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,542 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,543 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,544 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,544 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,544 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,544 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,544 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,544 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,544 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,544 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,546 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,546 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,546 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,546 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,546 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,546 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,546 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,546 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,547 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,547 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,547 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,547 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,547 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,547 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,547 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,547 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,547 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,548 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,548 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,548 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,548 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,548 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,548 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,548 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,548 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,548 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,549 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,549 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,549 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,549 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,549 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,549 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,549 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,549 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:30:58,560 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:30:58,573 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:30:58,573 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:30:58,573 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:30:58,573 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:30:58,573 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:30:58,573 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:30:58,573 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:30:58,573 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:30:58,584 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 165 places, 196 transitions [2019-12-07 17:30:58,585 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-12-07 17:30:58,635 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-12-07 17:30:58,635 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:30:58,643 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 476 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:30:58,655 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-12-07 17:30:58,681 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-12-07 17:30:58,682 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:30:58,685 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 476 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:30:58,695 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-12-07 17:30:58,696 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:31:01,378 WARN L192 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 17:31:01,462 INFO L206 etLargeBlockEncoding]: Checked pairs total: 50142 [2019-12-07 17:31:01,462 INFO L214 etLargeBlockEncoding]: Total number of compositions: 117 [2019-12-07 17:31:01,465 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 86 transitions [2019-12-07 17:31:02,063 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 14254 states. [2019-12-07 17:31:02,065 INFO L276 IsEmpty]: Start isEmpty. Operand 14254 states. [2019-12-07 17:31:02,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 17:31:02,069 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:02,070 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:02,070 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:02,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:02,074 INFO L82 PathProgramCache]: Analyzing trace with hash -632784469, now seen corresponding path program 1 times [2019-12-07 17:31:02,079 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:02,080 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [61663857] [2019-12-07 17:31:02,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:02,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:02,235 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:02,236 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [61663857] [2019-12-07 17:31:02,236 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:02,237 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:31:02,237 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2061662690] [2019-12-07 17:31:02,241 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:31:02,242 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:02,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:31:02,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:02,252 INFO L87 Difference]: Start difference. First operand 14254 states. Second operand 3 states. [2019-12-07 17:31:02,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:02,456 INFO L93 Difference]: Finished difference Result 14182 states and 53160 transitions. [2019-12-07 17:31:02,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:31:02,457 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 17:31:02,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:02,571 INFO L225 Difference]: With dead ends: 14182 [2019-12-07 17:31:02,571 INFO L226 Difference]: Without dead ends: 13870 [2019-12-07 17:31:02,572 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:02,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13870 states. [2019-12-07 17:31:02,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13870 to 13870. [2019-12-07 17:31:02,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13870 states. [2019-12-07 17:31:03,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13870 states to 13870 states and 52042 transitions. [2019-12-07 17:31:03,064 INFO L78 Accepts]: Start accepts. Automaton has 13870 states and 52042 transitions. Word has length 7 [2019-12-07 17:31:03,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:03,065 INFO L462 AbstractCegarLoop]: Abstraction has 13870 states and 52042 transitions. [2019-12-07 17:31:03,065 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:31:03,065 INFO L276 IsEmpty]: Start isEmpty. Operand 13870 states and 52042 transitions. [2019-12-07 17:31:03,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:31:03,069 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:03,070 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:03,070 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:03,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:03,070 INFO L82 PathProgramCache]: Analyzing trace with hash -1056225825, now seen corresponding path program 1 times [2019-12-07 17:31:03,070 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:03,071 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1473841451] [2019-12-07 17:31:03,071 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:03,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:03,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:03,149 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1473841451] [2019-12-07 17:31:03,149 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:03,149 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:31:03,149 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1775422252] [2019-12-07 17:31:03,150 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:31:03,150 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:03,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:31:03,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:31:03,151 INFO L87 Difference]: Start difference. First operand 13870 states and 52042 transitions. Second operand 4 states. [2019-12-07 17:31:03,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:03,416 INFO L93 Difference]: Finished difference Result 19034 states and 69248 transitions. [2019-12-07 17:31:03,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:31:03,417 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:31:03,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:03,487 INFO L225 Difference]: With dead ends: 19034 [2019-12-07 17:31:03,487 INFO L226 Difference]: Without dead ends: 19034 [2019-12-07 17:31:03,488 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:31:03,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19034 states. [2019-12-07 17:31:03,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19034 to 18800. [2019-12-07 17:31:03,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18800 states. [2019-12-07 17:31:03,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18800 states to 18800 states and 68487 transitions. [2019-12-07 17:31:03,964 INFO L78 Accepts]: Start accepts. Automaton has 18800 states and 68487 transitions. Word has length 13 [2019-12-07 17:31:03,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:03,964 INFO L462 AbstractCegarLoop]: Abstraction has 18800 states and 68487 transitions. [2019-12-07 17:31:03,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:31:03,965 INFO L276 IsEmpty]: Start isEmpty. Operand 18800 states and 68487 transitions. [2019-12-07 17:31:03,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:31:03,968 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:03,968 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:03,968 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:03,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:03,968 INFO L82 PathProgramCache]: Analyzing trace with hash 746093816, now seen corresponding path program 1 times [2019-12-07 17:31:03,968 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:03,968 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811808347] [2019-12-07 17:31:03,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:03,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:04,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:04,011 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811808347] [2019-12-07 17:31:04,012 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:04,012 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:31:04,012 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1819368327] [2019-12-07 17:31:04,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:31:04,012 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:04,013 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:31:04,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:31:04,013 INFO L87 Difference]: Start difference. First operand 18800 states and 68487 transitions. Second operand 4 states. [2019-12-07 17:31:04,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:04,267 INFO L93 Difference]: Finished difference Result 27022 states and 96312 transitions. [2019-12-07 17:31:04,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:31:04,268 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:31:04,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:04,320 INFO L225 Difference]: With dead ends: 27022 [2019-12-07 17:31:04,320 INFO L226 Difference]: Without dead ends: 27008 [2019-12-07 17:31:04,321 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:31:04,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27008 states. [2019-12-07 17:31:04,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27008 to 22366. [2019-12-07 17:31:04,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22366 states. [2019-12-07 17:31:04,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22366 states to 22366 states and 80994 transitions. [2019-12-07 17:31:04,806 INFO L78 Accepts]: Start accepts. Automaton has 22366 states and 80994 transitions. Word has length 13 [2019-12-07 17:31:04,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:04,806 INFO L462 AbstractCegarLoop]: Abstraction has 22366 states and 80994 transitions. [2019-12-07 17:31:04,806 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:31:04,806 INFO L276 IsEmpty]: Start isEmpty. Operand 22366 states and 80994 transitions. [2019-12-07 17:31:04,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:31:04,810 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:04,811 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:04,811 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:04,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:04,811 INFO L82 PathProgramCache]: Analyzing trace with hash -1347005908, now seen corresponding path program 1 times [2019-12-07 17:31:04,811 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:04,811 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [328985896] [2019-12-07 17:31:04,811 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:04,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:04,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:04,868 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [328985896] [2019-12-07 17:31:04,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:04,869 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:31:04,869 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [915074412] [2019-12-07 17:31:04,869 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:31:04,869 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:04,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:31:04,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:31:04,870 INFO L87 Difference]: Start difference. First operand 22366 states and 80994 transitions. Second operand 5 states. [2019-12-07 17:31:05,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:05,200 INFO L93 Difference]: Finished difference Result 30132 states and 106959 transitions. [2019-12-07 17:31:05,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:31:05,201 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:31:05,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:05,253 INFO L225 Difference]: With dead ends: 30132 [2019-12-07 17:31:05,253 INFO L226 Difference]: Without dead ends: 30118 [2019-12-07 17:31:05,254 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:31:05,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30118 states. [2019-12-07 17:31:05,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30118 to 22270. [2019-12-07 17:31:05,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22270 states. [2019-12-07 17:31:05,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22270 states to 22270 states and 80486 transitions. [2019-12-07 17:31:05,773 INFO L78 Accepts]: Start accepts. Automaton has 22270 states and 80486 transitions. Word has length 19 [2019-12-07 17:31:05,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:05,773 INFO L462 AbstractCegarLoop]: Abstraction has 22270 states and 80486 transitions. [2019-12-07 17:31:05,773 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:31:05,773 INFO L276 IsEmpty]: Start isEmpty. Operand 22270 states and 80486 transitions. [2019-12-07 17:31:05,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:31:05,788 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:05,788 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:05,788 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:05,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:05,788 INFO L82 PathProgramCache]: Analyzing trace with hash 1614023153, now seen corresponding path program 1 times [2019-12-07 17:31:05,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:05,789 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212388163] [2019-12-07 17:31:05,789 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:05,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:05,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:05,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1212388163] [2019-12-07 17:31:05,851 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:05,852 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:31:05,852 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1946474971] [2019-12-07 17:31:05,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:31:05,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:05,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:31:05,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:31:05,853 INFO L87 Difference]: Start difference. First operand 22270 states and 80486 transitions. Second operand 6 states. [2019-12-07 17:31:06,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:06,154 INFO L93 Difference]: Finished difference Result 32606 states and 115328 transitions. [2019-12-07 17:31:06,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:31:06,155 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 17:31:06,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:06,207 INFO L225 Difference]: With dead ends: 32606 [2019-12-07 17:31:06,207 INFO L226 Difference]: Without dead ends: 32574 [2019-12-07 17:31:06,207 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:31:06,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32574 states. [2019-12-07 17:31:06,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32574 to 28036. [2019-12-07 17:31:06,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28036 states. [2019-12-07 17:31:06,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28036 states to 28036 states and 100001 transitions. [2019-12-07 17:31:06,751 INFO L78 Accepts]: Start accepts. Automaton has 28036 states and 100001 transitions. Word has length 27 [2019-12-07 17:31:06,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:06,751 INFO L462 AbstractCegarLoop]: Abstraction has 28036 states and 100001 transitions. [2019-12-07 17:31:06,751 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:31:06,752 INFO L276 IsEmpty]: Start isEmpty. Operand 28036 states and 100001 transitions. [2019-12-07 17:31:06,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:31:06,776 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:06,776 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:06,776 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:06,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:06,776 INFO L82 PathProgramCache]: Analyzing trace with hash 1188296037, now seen corresponding path program 1 times [2019-12-07 17:31:06,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:06,777 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346092680] [2019-12-07 17:31:06,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:06,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:06,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:06,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346092680] [2019-12-07 17:31:06,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:06,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:31:06,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [985374372] [2019-12-07 17:31:06,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:31:06,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:06,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:31:06,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:06,819 INFO L87 Difference]: Start difference. First operand 28036 states and 100001 transitions. Second operand 3 states. [2019-12-07 17:31:06,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:06,988 INFO L93 Difference]: Finished difference Result 35568 states and 127677 transitions. [2019-12-07 17:31:06,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:31:06,988 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-12-07 17:31:06,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:07,050 INFO L225 Difference]: With dead ends: 35568 [2019-12-07 17:31:07,050 INFO L226 Difference]: Without dead ends: 35568 [2019-12-07 17:31:07,050 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:07,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35568 states. [2019-12-07 17:31:07,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35568 to 31188. [2019-12-07 17:31:07,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31188 states. [2019-12-07 17:31:07,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31188 states to 31188 states and 112337 transitions. [2019-12-07 17:31:07,720 INFO L78 Accepts]: Start accepts. Automaton has 31188 states and 112337 transitions. Word has length 33 [2019-12-07 17:31:07,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:07,720 INFO L462 AbstractCegarLoop]: Abstraction has 31188 states and 112337 transitions. [2019-12-07 17:31:07,720 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:31:07,721 INFO L276 IsEmpty]: Start isEmpty. Operand 31188 states and 112337 transitions. [2019-12-07 17:31:07,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:31:07,744 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:07,745 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:07,745 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:07,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:07,745 INFO L82 PathProgramCache]: Analyzing trace with hash -1536973783, now seen corresponding path program 1 times [2019-12-07 17:31:07,745 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:07,745 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1907667253] [2019-12-07 17:31:07,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:07,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:07,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:07,794 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1907667253] [2019-12-07 17:31:07,794 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:07,794 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:31:07,794 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [743667493] [2019-12-07 17:31:07,795 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:31:07,795 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:07,795 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:31:07,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:31:07,795 INFO L87 Difference]: Start difference. First operand 31188 states and 112337 transitions. Second operand 4 states. [2019-12-07 17:31:07,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:07,854 INFO L93 Difference]: Finished difference Result 18039 states and 56038 transitions. [2019-12-07 17:31:07,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:31:07,855 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2019-12-07 17:31:07,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:07,875 INFO L225 Difference]: With dead ends: 18039 [2019-12-07 17:31:07,875 INFO L226 Difference]: Without dead ends: 17509 [2019-12-07 17:31:07,876 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:31:07,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17509 states. [2019-12-07 17:31:08,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17509 to 17509. [2019-12-07 17:31:08,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17509 states. [2019-12-07 17:31:08,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17509 states to 17509 states and 54532 transitions. [2019-12-07 17:31:08,108 INFO L78 Accepts]: Start accepts. Automaton has 17509 states and 54532 transitions. Word has length 33 [2019-12-07 17:31:08,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:08,108 INFO L462 AbstractCegarLoop]: Abstraction has 17509 states and 54532 transitions. [2019-12-07 17:31:08,108 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:31:08,109 INFO L276 IsEmpty]: Start isEmpty. Operand 17509 states and 54532 transitions. [2019-12-07 17:31:08,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:31:08,120 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:08,121 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:08,121 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:08,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:08,121 INFO L82 PathProgramCache]: Analyzing trace with hash 345963664, now seen corresponding path program 1 times [2019-12-07 17:31:08,121 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:08,121 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278424281] [2019-12-07 17:31:08,121 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:08,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:08,166 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:08,166 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278424281] [2019-12-07 17:31:08,167 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:08,167 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:31:08,167 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1088748685] [2019-12-07 17:31:08,167 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:31:08,167 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:08,167 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:31:08,167 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:31:08,167 INFO L87 Difference]: Start difference. First operand 17509 states and 54532 transitions. Second operand 5 states. [2019-12-07 17:31:08,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:08,201 INFO L93 Difference]: Finished difference Result 2582 states and 6108 transitions. [2019-12-07 17:31:08,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:31:08,201 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-12-07 17:31:08,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:08,203 INFO L225 Difference]: With dead ends: 2582 [2019-12-07 17:31:08,203 INFO L226 Difference]: Without dead ends: 2273 [2019-12-07 17:31:08,204 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:31:08,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2273 states. [2019-12-07 17:31:08,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2273 to 2273. [2019-12-07 17:31:08,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2273 states. [2019-12-07 17:31:08,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2273 states to 2273 states and 5247 transitions. [2019-12-07 17:31:08,224 INFO L78 Accepts]: Start accepts. Automaton has 2273 states and 5247 transitions. Word has length 34 [2019-12-07 17:31:08,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:08,224 INFO L462 AbstractCegarLoop]: Abstraction has 2273 states and 5247 transitions. [2019-12-07 17:31:08,224 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:31:08,224 INFO L276 IsEmpty]: Start isEmpty. Operand 2273 states and 5247 transitions. [2019-12-07 17:31:08,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:31:08,226 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:08,226 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:08,227 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:08,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:08,227 INFO L82 PathProgramCache]: Analyzing trace with hash -1654876811, now seen corresponding path program 1 times [2019-12-07 17:31:08,227 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:08,227 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [139407588] [2019-12-07 17:31:08,227 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:08,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:08,294 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:08,295 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [139407588] [2019-12-07 17:31:08,295 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:08,295 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:31:08,295 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656947014] [2019-12-07 17:31:08,295 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:31:08,295 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:08,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:31:08,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:31:08,296 INFO L87 Difference]: Start difference. First operand 2273 states and 5247 transitions. Second operand 7 states. [2019-12-07 17:31:08,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:08,616 INFO L93 Difference]: Finished difference Result 2819 states and 6311 transitions. [2019-12-07 17:31:08,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 17:31:08,617 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2019-12-07 17:31:08,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:08,619 INFO L225 Difference]: With dead ends: 2819 [2019-12-07 17:31:08,619 INFO L226 Difference]: Without dead ends: 2817 [2019-12-07 17:31:08,619 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:31:08,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2817 states. [2019-12-07 17:31:08,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2817 to 2403. [2019-12-07 17:31:08,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2403 states. [2019-12-07 17:31:08,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2403 states to 2403 states and 5508 transitions. [2019-12-07 17:31:08,642 INFO L78 Accepts]: Start accepts. Automaton has 2403 states and 5508 transitions. Word has length 40 [2019-12-07 17:31:08,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:08,642 INFO L462 AbstractCegarLoop]: Abstraction has 2403 states and 5508 transitions. [2019-12-07 17:31:08,642 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:31:08,642 INFO L276 IsEmpty]: Start isEmpty. Operand 2403 states and 5508 transitions. [2019-12-07 17:31:08,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 17:31:08,644 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:08,645 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:08,645 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:08,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:08,645 INFO L82 PathProgramCache]: Analyzing trace with hash 1698133153, now seen corresponding path program 1 times [2019-12-07 17:31:08,645 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:08,645 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1320251902] [2019-12-07 17:31:08,645 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:08,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:08,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:08,693 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1320251902] [2019-12-07 17:31:08,694 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:08,694 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:31:08,694 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [685327660] [2019-12-07 17:31:08,694 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:31:08,694 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:08,694 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:31:08,694 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:31:08,694 INFO L87 Difference]: Start difference. First operand 2403 states and 5508 transitions. Second operand 5 states. [2019-12-07 17:31:08,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:08,979 INFO L93 Difference]: Finished difference Result 3250 states and 7346 transitions. [2019-12-07 17:31:08,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:31:08,979 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-12-07 17:31:08,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:08,981 INFO L225 Difference]: With dead ends: 3250 [2019-12-07 17:31:08,981 INFO L226 Difference]: Without dead ends: 3250 [2019-12-07 17:31:08,982 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:31:08,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3250 states. [2019-12-07 17:31:09,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3250 to 2977. [2019-12-07 17:31:09,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2977 states. [2019-12-07 17:31:09,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2977 states to 2977 states and 6800 transitions. [2019-12-07 17:31:09,006 INFO L78 Accepts]: Start accepts. Automaton has 2977 states and 6800 transitions. Word has length 44 [2019-12-07 17:31:09,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:09,006 INFO L462 AbstractCegarLoop]: Abstraction has 2977 states and 6800 transitions. [2019-12-07 17:31:09,006 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:31:09,006 INFO L276 IsEmpty]: Start isEmpty. Operand 2977 states and 6800 transitions. [2019-12-07 17:31:09,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 17:31:09,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:09,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:09,009 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:09,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:09,009 INFO L82 PathProgramCache]: Analyzing trace with hash 682662632, now seen corresponding path program 1 times [2019-12-07 17:31:09,009 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:09,009 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356470115] [2019-12-07 17:31:09,009 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:09,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:09,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:09,071 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356470115] [2019-12-07 17:31:09,071 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:09,071 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:31:09,071 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1054141987] [2019-12-07 17:31:09,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:31:09,072 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:09,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:31:09,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:31:09,072 INFO L87 Difference]: Start difference. First operand 2977 states and 6800 transitions. Second operand 6 states. [2019-12-07 17:31:09,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:09,114 INFO L93 Difference]: Finished difference Result 999 states and 2272 transitions. [2019-12-07 17:31:09,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:31:09,114 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2019-12-07 17:31:09,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:09,115 INFO L225 Difference]: With dead ends: 999 [2019-12-07 17:31:09,115 INFO L226 Difference]: Without dead ends: 929 [2019-12-07 17:31:09,115 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:31:09,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 929 states. [2019-12-07 17:31:09,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 929 to 799. [2019-12-07 17:31:09,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 799 states. [2019-12-07 17:31:09,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 799 states to 799 states and 1831 transitions. [2019-12-07 17:31:09,122 INFO L78 Accepts]: Start accepts. Automaton has 799 states and 1831 transitions. Word has length 45 [2019-12-07 17:31:09,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:09,122 INFO L462 AbstractCegarLoop]: Abstraction has 799 states and 1831 transitions. [2019-12-07 17:31:09,122 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:31:09,123 INFO L276 IsEmpty]: Start isEmpty. Operand 799 states and 1831 transitions. [2019-12-07 17:31:09,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:31:09,124 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:09,124 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:09,124 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:09,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:09,124 INFO L82 PathProgramCache]: Analyzing trace with hash 1740404695, now seen corresponding path program 1 times [2019-12-07 17:31:09,124 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:09,124 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563125699] [2019-12-07 17:31:09,124 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:09,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:09,164 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:09,164 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563125699] [2019-12-07 17:31:09,164 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:09,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:31:09,164 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [636240198] [2019-12-07 17:31:09,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:31:09,165 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:09,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:31:09,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:09,165 INFO L87 Difference]: Start difference. First operand 799 states and 1831 transitions. Second operand 3 states. [2019-12-07 17:31:09,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:09,194 INFO L93 Difference]: Finished difference Result 799 states and 1830 transitions. [2019-12-07 17:31:09,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:31:09,194 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 17:31:09,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:09,195 INFO L225 Difference]: With dead ends: 799 [2019-12-07 17:31:09,195 INFO L226 Difference]: Without dead ends: 799 [2019-12-07 17:31:09,195 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:09,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 799 states. [2019-12-07 17:31:09,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 799 to 642. [2019-12-07 17:31:09,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 642 states. [2019-12-07 17:31:09,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 642 states to 642 states and 1470 transitions. [2019-12-07 17:31:09,201 INFO L78 Accepts]: Start accepts. Automaton has 642 states and 1470 transitions. Word has length 55 [2019-12-07 17:31:09,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:09,201 INFO L462 AbstractCegarLoop]: Abstraction has 642 states and 1470 transitions. [2019-12-07 17:31:09,201 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:31:09,201 INFO L276 IsEmpty]: Start isEmpty. Operand 642 states and 1470 transitions. [2019-12-07 17:31:09,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:31:09,202 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:09,202 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:09,202 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:09,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:09,202 INFO L82 PathProgramCache]: Analyzing trace with hash 1993080434, now seen corresponding path program 1 times [2019-12-07 17:31:09,202 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:09,202 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1639616712] [2019-12-07 17:31:09,202 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:09,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:09,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:09,242 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1639616712] [2019-12-07 17:31:09,242 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:09,242 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:31:09,242 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [874657699] [2019-12-07 17:31:09,242 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:31:09,243 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:09,243 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:31:09,243 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:09,243 INFO L87 Difference]: Start difference. First operand 642 states and 1470 transitions. Second operand 3 states. [2019-12-07 17:31:09,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:09,253 INFO L93 Difference]: Finished difference Result 642 states and 1440 transitions. [2019-12-07 17:31:09,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:31:09,254 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 17:31:09,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:09,254 INFO L225 Difference]: With dead ends: 642 [2019-12-07 17:31:09,254 INFO L226 Difference]: Without dead ends: 642 [2019-12-07 17:31:09,255 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:31:09,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 642 states. [2019-12-07 17:31:09,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 642 to 606. [2019-12-07 17:31:09,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 606 states. [2019-12-07 17:31:09,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 1354 transitions. [2019-12-07 17:31:09,262 INFO L78 Accepts]: Start accepts. Automaton has 606 states and 1354 transitions. Word has length 56 [2019-12-07 17:31:09,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:09,262 INFO L462 AbstractCegarLoop]: Abstraction has 606 states and 1354 transitions. [2019-12-07 17:31:09,262 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:31:09,263 INFO L276 IsEmpty]: Start isEmpty. Operand 606 states and 1354 transitions. [2019-12-07 17:31:09,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:31:09,264 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:09,264 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:09,264 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:09,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:09,264 INFO L82 PathProgramCache]: Analyzing trace with hash 2052620165, now seen corresponding path program 1 times [2019-12-07 17:31:09,264 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:09,265 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2129820449] [2019-12-07 17:31:09,265 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:09,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:09,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:09,407 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2129820449] [2019-12-07 17:31:09,408 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:09,408 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:31:09,408 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1845547593] [2019-12-07 17:31:09,408 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:31:09,408 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:09,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:31:09,409 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:31:09,409 INFO L87 Difference]: Start difference. First operand 606 states and 1354 transitions. Second operand 7 states. [2019-12-07 17:31:09,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:09,487 INFO L93 Difference]: Finished difference Result 960 states and 2014 transitions. [2019-12-07 17:31:09,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 17:31:09,488 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 57 [2019-12-07 17:31:09,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:09,488 INFO L225 Difference]: With dead ends: 960 [2019-12-07 17:31:09,489 INFO L226 Difference]: Without dead ends: 610 [2019-12-07 17:31:09,489 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:31:09,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 610 states. [2019-12-07 17:31:09,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 610 to 544. [2019-12-07 17:31:09,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 544 states. [2019-12-07 17:31:09,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 544 states to 544 states and 1175 transitions. [2019-12-07 17:31:09,493 INFO L78 Accepts]: Start accepts. Automaton has 544 states and 1175 transitions. Word has length 57 [2019-12-07 17:31:09,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:09,494 INFO L462 AbstractCegarLoop]: Abstraction has 544 states and 1175 transitions. [2019-12-07 17:31:09,494 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:31:09,494 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 1175 transitions. [2019-12-07 17:31:09,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:31:09,495 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:09,495 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:09,495 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:09,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:09,495 INFO L82 PathProgramCache]: Analyzing trace with hash -892812541, now seen corresponding path program 2 times [2019-12-07 17:31:09,495 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:09,495 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1516521150] [2019-12-07 17:31:09,495 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:09,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:09,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:09,874 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1516521150] [2019-12-07 17:31:09,874 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:09,874 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 17:31:09,874 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2061137934] [2019-12-07 17:31:09,875 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 17:31:09,875 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:09,875 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 17:31:09,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=259, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:31:09,875 INFO L87 Difference]: Start difference. First operand 544 states and 1175 transitions. Second operand 18 states. [2019-12-07 17:31:10,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:10,621 INFO L93 Difference]: Finished difference Result 1305 states and 2899 transitions. [2019-12-07 17:31:10,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 17:31:10,621 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 57 [2019-12-07 17:31:10,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:10,622 INFO L225 Difference]: With dead ends: 1305 [2019-12-07 17:31:10,622 INFO L226 Difference]: Without dead ends: 1275 [2019-12-07 17:31:10,622 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 235 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=209, Invalid=1051, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 17:31:10,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1275 states. [2019-12-07 17:31:10,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1275 to 726. [2019-12-07 17:31:10,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 726 states. [2019-12-07 17:31:10,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 726 states to 726 states and 1575 transitions. [2019-12-07 17:31:10,629 INFO L78 Accepts]: Start accepts. Automaton has 726 states and 1575 transitions. Word has length 57 [2019-12-07 17:31:10,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:10,630 INFO L462 AbstractCegarLoop]: Abstraction has 726 states and 1575 transitions. [2019-12-07 17:31:10,630 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 17:31:10,630 INFO L276 IsEmpty]: Start isEmpty. Operand 726 states and 1575 transitions. [2019-12-07 17:31:10,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:31:10,631 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:10,631 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:10,631 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:10,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:10,631 INFO L82 PathProgramCache]: Analyzing trace with hash -495942269, now seen corresponding path program 3 times [2019-12-07 17:31:10,631 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:10,631 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021861495] [2019-12-07 17:31:10,631 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:10,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:10,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:10,825 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2021861495] [2019-12-07 17:31:10,825 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:10,825 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:31:10,826 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710586959] [2019-12-07 17:31:10,826 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:31:10,826 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:10,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:31:10,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:31:10,826 INFO L87 Difference]: Start difference. First operand 726 states and 1575 transitions. Second operand 14 states. [2019-12-07 17:31:11,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:11,235 INFO L93 Difference]: Finished difference Result 1172 states and 2548 transitions. [2019-12-07 17:31:11,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 17:31:11,235 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 57 [2019-12-07 17:31:11,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:11,236 INFO L225 Difference]: With dead ends: 1172 [2019-12-07 17:31:11,236 INFO L226 Difference]: Without dead ends: 1142 [2019-12-07 17:31:11,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=130, Invalid=520, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:31:11,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1142 states. [2019-12-07 17:31:11,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1142 to 786. [2019-12-07 17:31:11,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 786 states. [2019-12-07 17:31:11,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 786 states to 786 states and 1721 transitions. [2019-12-07 17:31:11,244 INFO L78 Accepts]: Start accepts. Automaton has 786 states and 1721 transitions. Word has length 57 [2019-12-07 17:31:11,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:11,244 INFO L462 AbstractCegarLoop]: Abstraction has 786 states and 1721 transitions. [2019-12-07 17:31:11,244 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:31:11,244 INFO L276 IsEmpty]: Start isEmpty. Operand 786 states and 1721 transitions. [2019-12-07 17:31:11,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:31:11,245 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:11,245 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:11,245 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:11,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:11,245 INFO L82 PathProgramCache]: Analyzing trace with hash 60491955, now seen corresponding path program 4 times [2019-12-07 17:31:11,245 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:11,245 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718073250] [2019-12-07 17:31:11,245 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:11,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:31:11,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:31:11,445 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1718073250] [2019-12-07 17:31:11,445 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:31:11,445 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:31:11,445 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1119486787] [2019-12-07 17:31:11,445 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:31:11,445 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:31:11,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:31:11,446 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:31:11,446 INFO L87 Difference]: Start difference. First operand 786 states and 1721 transitions. Second operand 14 states. [2019-12-07 17:31:11,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:31:11,814 INFO L93 Difference]: Finished difference Result 1160 states and 2516 transitions. [2019-12-07 17:31:11,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:31:11,815 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 57 [2019-12-07 17:31:11,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:31:11,816 INFO L225 Difference]: With dead ends: 1160 [2019-12-07 17:31:11,816 INFO L226 Difference]: Without dead ends: 1130 [2019-12-07 17:31:11,816 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=119, Invalid=531, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:31:11,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1130 states. [2019-12-07 17:31:11,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1130 to 782. [2019-12-07 17:31:11,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 782 states. [2019-12-07 17:31:11,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 782 states to 782 states and 1711 transitions. [2019-12-07 17:31:11,823 INFO L78 Accepts]: Start accepts. Automaton has 782 states and 1711 transitions. Word has length 57 [2019-12-07 17:31:11,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:31:11,823 INFO L462 AbstractCegarLoop]: Abstraction has 782 states and 1711 transitions. [2019-12-07 17:31:11,823 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:31:11,823 INFO L276 IsEmpty]: Start isEmpty. Operand 782 states and 1711 transitions. [2019-12-07 17:31:11,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:31:11,824 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:31:11,824 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:31:11,824 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:31:11,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:31:11,825 INFO L82 PathProgramCache]: Analyzing trace with hash 729108355, now seen corresponding path program 5 times [2019-12-07 17:31:11,825 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:31:11,825 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68226290] [2019-12-07 17:31:11,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:31:11,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:31:11,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:31:11,896 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:31:11,896 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:31:11,899 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_56| 0 0))) (and (= v_~y$w_buff0_used~0_565 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1120~0.base_27|) (= v_~y$w_buff1_used~0_304 0) (= 0 |v_ULTIMATE.start_main_~#t1120~0.offset_21|) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff0_thd0~0_292 0) (= 0 v_~weak$$choice2~0_82) (= 0 v_~y$read_delayed_var~0.offset_8) (= 0 v_~__unbuffered_cnt~0_94) (= 0 v_~y$r_buff1_thd3~0_89) (= v_~y$read_delayed~0_8 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1120~0.base_27| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1120~0.base_27|) |v_ULTIMATE.start_main_~#t1120~0.offset_21| 0)) |v_#memory_int_15|) (= 0 v_~y$r_buff1_thd2~0_113) (= v_~main$tmp_guard1~0_30 0) (= v_~x~0_51 0) (= v_~y$w_buff1~0_136 0) (= 0 v_~y$r_buff0_thd2~0_108) (< 0 |v_#StackHeapBarrier_14|) (= v_~y$r_buff0_thd1~0_41 0) (= v_~a~0_57 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1120~0.base_27|) 0) (= v_~y$mem_tmp~0_17 0) (= v_~z~0_41 0) (= 0 v_~y$r_buff1_thd1~0_40) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~y~0_123 0) (= v_~y$r_buff1_thd0~0_196 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff0_thd3~0_130) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1120~0.base_27| 4) |v_#length_19|) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_54) (= (store .cse0 |v_ULTIMATE.start_main_~#t1120~0.base_27| 1) |v_#valid_54|) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 0 v_~weak$$choice0~0_13) (= 0 |v_#NULL.base_5|) (= 0 v_~y$flush_delayed~0_34) (= 0 v_~y$w_buff0~0_162))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, ULTIMATE.start_main_~#t1121~0.base=|v_ULTIMATE.start_main_~#t1121~0.base_26|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_35|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_50|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_57, ~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_89, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_41, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_54, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_116|, ULTIMATE.start_main_~#t1122~0.base=|v_ULTIMATE.start_main_~#t1122~0.base_21|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_33|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_25|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_136, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_196, ~x~0=v_~x~0_51, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_565, ULTIMATE.start_main_~#t1120~0.offset=|v_ULTIMATE.start_main_~#t1120~0.offset_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_49|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_27|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_27|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_40, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_28|, ~y$w_buff0~0=v_~y$w_buff0~0_162, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_130, ~y~0=v_~y~0_123, ULTIMATE.start_main_~#t1122~0.offset=|v_ULTIMATE.start_main_~#t1122~0.offset_16|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_32|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_196|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_28|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_110|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_113, ULTIMATE.start_main_~#t1120~0.base=|v_ULTIMATE.start_main_~#t1120~0.base_27|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_26|, ULTIMATE.start_main_~#t1121~0.offset=|v_ULTIMATE.start_main_~#t1121~0.offset_20|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_292, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_41, ~weak$$choice2~0=v_~weak$$choice2~0_82, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1121~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t1122~0.base, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t1120~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1122~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_~#t1120~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1121~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:31:11,899 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L812-1-->L814: Formula: (and (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1121~0.base_9| 1) |v_#valid_27|) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1121~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1121~0.base_9|) |v_ULTIMATE.start_main_~#t1121~0.offset_8| 1)) |v_#memory_int_9|) (= 0 |v_ULTIMATE.start_main_~#t1121~0.offset_8|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1121~0.base_9| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1121~0.base_9|) (not (= |v_ULTIMATE.start_main_~#t1121~0.base_9| 0)) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1121~0.base_9|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1121~0.offset=|v_ULTIMATE.start_main_~#t1121~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1121~0.base=|v_ULTIMATE.start_main_~#t1121~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1121~0.offset, ULTIMATE.start_main_~#t1121~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 17:31:11,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L816: Formula: (and (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1122~0.base_10| 4) |v_#length_15|) (= 0 |v_ULTIMATE.start_main_~#t1122~0.offset_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1122~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1122~0.base_10|) |v_ULTIMATE.start_main_~#t1122~0.offset_10| 2)) |v_#memory_int_11|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1122~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1122~0.base_10|) (not (= 0 |v_ULTIMATE.start_main_~#t1122~0.base_10|)) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1122~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1122~0.offset=|v_ULTIMATE.start_main_~#t1122~0.offset_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1122~0.base=|v_ULTIMATE.start_main_~#t1122~0.base_10|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1122~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1122~0.base, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 17:31:11,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L4-->L789: Formula: (and (= 1 ~y$r_buff0_thd3~0_Out2121906270) (= ~y$r_buff1_thd0~0_Out2121906270 ~y$r_buff0_thd0~0_In2121906270) (= ~y$r_buff1_thd2~0_Out2121906270 ~y$r_buff0_thd2~0_In2121906270) (= ~y$r_buff0_thd1~0_In2121906270 ~y$r_buff1_thd1~0_Out2121906270) (= 1 ~z~0_Out2121906270) (= ~y$r_buff0_thd3~0_In2121906270 ~y$r_buff1_thd3~0_Out2121906270) (= ~__unbuffered_p2_EAX~0_Out2121906270 ~z~0_Out2121906270) (= ~__unbuffered_p2_EBX~0_Out2121906270 ~a~0_In2121906270) (not (= P2Thread1of1ForFork1___VERIFIER_assert_~expression_In2121906270 0))) InVars {~a~0=~a~0_In2121906270, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2121906270, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2121906270, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2121906270, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In2121906270, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In2121906270} OutVars{~__unbuffered_p2_EBX~0=~__unbuffered_p2_EBX~0_Out2121906270, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In2121906270, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_Out2121906270, ~a~0=~a~0_In2121906270, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_Out2121906270, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_Out2121906270, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out2121906270, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2121906270, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2121906270, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In2121906270, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_Out2121906270, ~z~0=~z~0_Out2121906270, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_Out2121906270} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 17:31:11,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_8 |v_P0Thread1of1ForFork2_#in~arg.base_10|) (= v_~a~0_22 1) (= v_~x~0_29 v_~__unbuffered_p0_EAX~0_17) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_P0Thread1of1ForFork2_~arg.offset_8 |v_P0Thread1of1ForFork2_#in~arg.offset_10|) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, ~x~0=v_~x~0_29} OutVars{~a~0=v_~a~0_22, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_8, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_29, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_8} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 17:31:11,901 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L754-2-->L754-5: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd2~0_In-446389490 256) 0)) (.cse0 (= |P1Thread1of1ForFork0_#t~ite4_Out-446389490| |P1Thread1of1ForFork0_#t~ite3_Out-446389490|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-446389490 256)))) (or (and .cse0 (= |P1Thread1of1ForFork0_#t~ite3_Out-446389490| ~y~0_In-446389490) (or .cse1 .cse2)) (and (not .cse2) .cse0 (= ~y$w_buff1~0_In-446389490 |P1Thread1of1ForFork0_#t~ite3_Out-446389490|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-446389490, ~y$w_buff1~0=~y$w_buff1~0_In-446389490, ~y~0=~y~0_In-446389490, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-446389490} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-446389490, ~y$w_buff1~0=~y$w_buff1~0_In-446389490, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out-446389490|, ~y~0=~y~0_In-446389490, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out-446389490|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-446389490} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 17:31:11,902 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-991344943 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-991344943 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite11_Out-991344943|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-991344943 |P2Thread1of1ForFork1_#t~ite11_Out-991344943|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-991344943, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991344943} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-991344943, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out-991344943|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991344943} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:31:11,902 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-240814308 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-240814308 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-240814308 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-240814308 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite12_Out-240814308| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite12_Out-240814308| ~y$w_buff1_used~0_In-240814308) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-240814308, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-240814308, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-240814308, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-240814308} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-240814308, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-240814308, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-240814308, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out-240814308|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-240814308} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:31:11,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L792-->L793: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1057518784 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd3~0_In1057518784 256) 0)) (.cse0 (= ~y$r_buff0_thd3~0_In1057518784 ~y$r_buff0_thd3~0_Out1057518784))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse1) (= 0 ~y$r_buff0_thd3~0_Out1057518784)) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1057518784, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1057518784} OutVars{P2Thread1of1ForFork1_#t~ite13=|P2Thread1of1ForFork1_#t~ite13_Out1057518784|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1057518784, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out1057518784} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite13, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:31:11,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L793-->L793-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-1789513281 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1789513281 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1789513281 256))) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-1789513281 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite14_Out-1789513281| ~y$r_buff1_thd3~0_In-1789513281)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork1_#t~ite14_Out-1789513281|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1789513281, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1789513281, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1789513281, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1789513281} OutVars{P2Thread1of1ForFork1_#t~ite14=|P2Thread1of1ForFork1_#t~ite14_Out-1789513281|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1789513281, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1789513281, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1789513281, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1789513281} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:31:11,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L793-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_59 1) v_~__unbuffered_cnt~0_58) (= |v_P2Thread1of1ForFork1_#t~ite14_34| v_~y$r_buff1_thd3~0_55) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59} OutVars{P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_33|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_55, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 17:31:11,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L755-->L755-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-601869006 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-601869006 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork0_#t~ite5_Out-601869006|) (not .cse1)) (and (= ~y$w_buff0_used~0_In-601869006 |P1Thread1of1ForFork0_#t~ite5_Out-601869006|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-601869006, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-601869006} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-601869006, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-601869006, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out-601869006|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:31:11,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L756-->L756-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In2100101918 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In2100101918 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In2100101918 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In2100101918 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In2100101918 |P1Thread1of1ForFork0_#t~ite6_Out2100101918|)) (and (= 0 |P1Thread1of1ForFork0_#t~ite6_Out2100101918|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2100101918, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2100101918, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2100101918, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2100101918} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2100101918, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2100101918, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2100101918, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out2100101918|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2100101918} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:31:11,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In360740821 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In360740821 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite7_Out360740821| ~y$r_buff0_thd2~0_In360740821)) (and (= |P1Thread1of1ForFork0_#t~ite7_Out360740821| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In360740821, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In360740821} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In360740821, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In360740821, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out360740821|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 17:31:11,904 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L758-->L758-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd2~0_In1972701826 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1972701826 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In1972701826 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1972701826 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In1972701826 |P1Thread1of1ForFork0_#t~ite8_Out1972701826|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite8_Out1972701826|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1972701826, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1972701826, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1972701826, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1972701826} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1972701826, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1972701826, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1972701826, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out1972701826|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1972701826} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:31:11,904 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= v_~y$r_buff1_thd2~0_82 |v_P1Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_36|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_82, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_35|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 17:31:11,904 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L820-->L822-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_253 256)) (= (mod v_~y$r_buff0_thd0~0_142 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:31:11,904 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L822-2-->L822-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite18_Out1853319182| |ULTIMATE.start_main_#t~ite19_Out1853319182|)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In1853319182 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In1853319182 256) 0))) (or (and (not .cse0) .cse1 (= ~y$w_buff1~0_In1853319182 |ULTIMATE.start_main_#t~ite18_Out1853319182|) (not .cse2)) (and (= |ULTIMATE.start_main_#t~ite18_Out1853319182| ~y~0_In1853319182) .cse1 (or .cse0 .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1853319182, ~y~0=~y~0_In1853319182, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1853319182, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1853319182} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1853319182, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1853319182|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1853319182|, ~y~0=~y~0_In1853319182, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1853319182, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1853319182} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:31:11,904 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-493714996 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-493714996 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-493714996| 0)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-493714996| ~y$w_buff0_used~0_In-493714996)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-493714996, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-493714996} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-493714996, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-493714996, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-493714996|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:31:11,905 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L824-->L824-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In396577605 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In396577605 256))) (.cse0 (= (mod ~y$r_buff1_thd0~0_In396577605 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In396577605 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite21_Out396577605| ~y$w_buff1_used~0_In396577605)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite21_Out396577605| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In396577605, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In396577605, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In396577605, ~y$w_buff1_used~0=~y$w_buff1_used~0_In396577605} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In396577605, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In396577605, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out396577605|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In396577605, ~y$w_buff1_used~0=~y$w_buff1_used~0_In396577605} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:31:11,905 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1588869793 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1588869793 256)))) (or (and (= ~y$r_buff0_thd0~0_In-1588869793 |ULTIMATE.start_main_#t~ite22_Out-1588869793|) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite22_Out-1588869793| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1588869793, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1588869793} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1588869793, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1588869793, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1588869793|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:31:11,905 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L826-->L826-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In1105956825 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1105956825 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1105956825 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1105956825 256)))) (or (and (= |ULTIMATE.start_main_#t~ite23_Out1105956825| ~y$r_buff1_thd0~0_In1105956825) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite23_Out1105956825| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1105956825, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1105956825, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1105956825, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1105956825} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1105956825, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1105956825, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1105956825, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1105956825|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1105956825} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:31:11,906 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1414474075 256)))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite29_Out-1414474075| ~y$w_buff0~0_In-1414474075) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1414474075 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-1414474075 256)) .cse1) (= (mod ~y$w_buff0_used~0_In-1414474075 256) 0) (and (= 0 (mod ~y$r_buff1_thd0~0_In-1414474075 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite29_Out-1414474075| |ULTIMATE.start_main_#t~ite30_Out-1414474075|)) (and (= |ULTIMATE.start_main_#t~ite29_In-1414474075| |ULTIMATE.start_main_#t~ite29_Out-1414474075|) (not .cse0) (= |ULTIMATE.start_main_#t~ite30_Out-1414474075| ~y$w_buff0~0_In-1414474075)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1414474075, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-1414474075|, ~y$w_buff0~0=~y$w_buff0~0_In-1414474075, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1414474075, ~weak$$choice2~0=~weak$$choice2~0_In-1414474075, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1414474075, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1414474075} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-1414474075|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1414474075, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1414474075|, ~y$w_buff0~0=~y$w_buff0~0_In-1414474075, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1414474075, ~weak$$choice2~0=~weak$$choice2~0_In-1414474075, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1414474075, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1414474075} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:31:11,907 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L836-->L836-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In3887102 256) 0))) (or (and (= ~y$w_buff0_used~0_In3887102 |ULTIMATE.start_main_#t~ite35_Out3887102|) (= |ULTIMATE.start_main_#t~ite35_Out3887102| |ULTIMATE.start_main_#t~ite36_Out3887102|) (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In3887102 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In3887102 256)) .cse0) (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In3887102 256))) (= 0 (mod ~y$w_buff0_used~0_In3887102 256)))) .cse1) (and (= ~y$w_buff0_used~0_In3887102 |ULTIMATE.start_main_#t~ite36_Out3887102|) (= |ULTIMATE.start_main_#t~ite35_In3887102| |ULTIMATE.start_main_#t~ite35_Out3887102|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In3887102, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In3887102, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In3887102|, ~weak$$choice2~0=~weak$$choice2~0_In3887102, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In3887102, ~y$w_buff1_used~0=~y$w_buff1_used~0_In3887102} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In3887102, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In3887102, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out3887102|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out3887102|, ~weak$$choice2~0=~weak$$choice2~0_In3887102, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In3887102, ~y$w_buff1_used~0=~y$w_buff1_used~0_In3887102} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 17:31:11,907 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L837-->L837-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1946044710 256)))) (or (and (= |ULTIMATE.start_main_#t~ite38_Out1946044710| |ULTIMATE.start_main_#t~ite39_Out1946044710|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1946044710 256)))) (or (and (= (mod ~y$w_buff1_used~0_In1946044710 256) 0) .cse1) (and (= (mod ~y$r_buff1_thd0~0_In1946044710 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In1946044710 256) 0))) (= |ULTIMATE.start_main_#t~ite38_Out1946044710| ~y$w_buff1_used~0_In1946044710)) (and (= |ULTIMATE.start_main_#t~ite38_In1946044710| |ULTIMATE.start_main_#t~ite38_Out1946044710|) (= |ULTIMATE.start_main_#t~ite39_Out1946044710| ~y$w_buff1_used~0_In1946044710) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1946044710, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1946044710, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1946044710|, ~weak$$choice2~0=~weak$$choice2~0_In1946044710, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1946044710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1946044710} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1946044710, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1946044710|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1946044710, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1946044710|, ~weak$$choice2~0=~weak$$choice2~0_In1946044710, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1946044710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1946044710} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 17:31:11,907 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L838-->L839: Formula: (and (not (= (mod v_~weak$$choice2~0_22 256) 0)) (= v_~y$r_buff0_thd0~0_108 v_~y$r_buff0_thd0~0_107)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_22} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:31:11,908 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L839-->L839-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2008797932 256)))) (or (and .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2008797932 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In2008797932 256)) .cse1) (= (mod ~y$w_buff0_used~0_In2008797932 256) 0) (and (= 0 (mod ~y$r_buff1_thd0~0_In2008797932 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite44_Out2008797932| |ULTIMATE.start_main_#t~ite45_Out2008797932|) (= |ULTIMATE.start_main_#t~ite44_Out2008797932| ~y$r_buff1_thd0~0_In2008797932)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite45_Out2008797932| ~y$r_buff1_thd0~0_In2008797932) (= |ULTIMATE.start_main_#t~ite44_In2008797932| |ULTIMATE.start_main_#t~ite44_Out2008797932|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2008797932, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2008797932, ~weak$$choice2~0=~weak$$choice2~0_In2008797932, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2008797932, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2008797932, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In2008797932|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2008797932, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2008797932, ~weak$$choice2~0=~weak$$choice2~0_In2008797932, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2008797932, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out2008797932|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out2008797932|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2008797932} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 17:31:11,908 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L841-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_27) (= v_~y~0_103 v_~y$mem_tmp~0_13) (not (= 0 (mod v_~y$flush_delayed~0_28 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:31:11,908 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:31:11,969 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:31:11 BasicIcfg [2019-12-07 17:31:11,969 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:31:11,969 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:31:11,970 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:31:11,970 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:31:11,970 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:30:58" (3/4) ... [2019-12-07 17:31:11,972 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:31:11,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_56| 0 0))) (and (= v_~y$w_buff0_used~0_565 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1120~0.base_27|) (= v_~y$w_buff1_used~0_304 0) (= 0 |v_ULTIMATE.start_main_~#t1120~0.offset_21|) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff0_thd0~0_292 0) (= 0 v_~weak$$choice2~0_82) (= 0 v_~y$read_delayed_var~0.offset_8) (= 0 v_~__unbuffered_cnt~0_94) (= 0 v_~y$r_buff1_thd3~0_89) (= v_~y$read_delayed~0_8 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1120~0.base_27| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1120~0.base_27|) |v_ULTIMATE.start_main_~#t1120~0.offset_21| 0)) |v_#memory_int_15|) (= 0 v_~y$r_buff1_thd2~0_113) (= v_~main$tmp_guard1~0_30 0) (= v_~x~0_51 0) (= v_~y$w_buff1~0_136 0) (= 0 v_~y$r_buff0_thd2~0_108) (< 0 |v_#StackHeapBarrier_14|) (= v_~y$r_buff0_thd1~0_41 0) (= v_~a~0_57 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1120~0.base_27|) 0) (= v_~y$mem_tmp~0_17 0) (= v_~z~0_41 0) (= 0 v_~y$r_buff1_thd1~0_40) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~y~0_123 0) (= v_~y$r_buff1_thd0~0_196 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff0_thd3~0_130) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1120~0.base_27| 4) |v_#length_19|) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_54) (= (store .cse0 |v_ULTIMATE.start_main_~#t1120~0.base_27| 1) |v_#valid_54|) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 0 v_~weak$$choice0~0_13) (= 0 |v_#NULL.base_5|) (= 0 v_~y$flush_delayed~0_34) (= 0 v_~y$w_buff0~0_162))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, ULTIMATE.start_main_~#t1121~0.base=|v_ULTIMATE.start_main_~#t1121~0.base_26|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_35|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_50|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_57, ~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_89, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_41, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_54, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_116|, ULTIMATE.start_main_~#t1122~0.base=|v_ULTIMATE.start_main_~#t1122~0.base_21|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_33|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_25|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_136, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_196, ~x~0=v_~x~0_51, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_565, ULTIMATE.start_main_~#t1120~0.offset=|v_ULTIMATE.start_main_~#t1120~0.offset_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_49|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_27|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_27|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_40, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_28|, ~y$w_buff0~0=v_~y$w_buff0~0_162, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_130, ~y~0=v_~y~0_123, ULTIMATE.start_main_~#t1122~0.offset=|v_ULTIMATE.start_main_~#t1122~0.offset_16|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_32|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_196|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_28|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_110|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_113, ULTIMATE.start_main_~#t1120~0.base=|v_ULTIMATE.start_main_~#t1120~0.base_27|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_26|, ULTIMATE.start_main_~#t1121~0.offset=|v_ULTIMATE.start_main_~#t1121~0.offset_20|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_292, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_41, ~weak$$choice2~0=v_~weak$$choice2~0_82, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1121~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t1122~0.base, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t1120~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1122~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_~#t1120~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1121~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:31:11,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L812-1-->L814: Formula: (and (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1121~0.base_9| 1) |v_#valid_27|) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1121~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1121~0.base_9|) |v_ULTIMATE.start_main_~#t1121~0.offset_8| 1)) |v_#memory_int_9|) (= 0 |v_ULTIMATE.start_main_~#t1121~0.offset_8|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1121~0.base_9| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1121~0.base_9|) (not (= |v_ULTIMATE.start_main_~#t1121~0.base_9| 0)) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1121~0.base_9|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1121~0.offset=|v_ULTIMATE.start_main_~#t1121~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1121~0.base=|v_ULTIMATE.start_main_~#t1121~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1121~0.offset, ULTIMATE.start_main_~#t1121~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 17:31:11,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L816: Formula: (and (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1122~0.base_10| 4) |v_#length_15|) (= 0 |v_ULTIMATE.start_main_~#t1122~0.offset_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1122~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1122~0.base_10|) |v_ULTIMATE.start_main_~#t1122~0.offset_10| 2)) |v_#memory_int_11|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1122~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1122~0.base_10|) (not (= 0 |v_ULTIMATE.start_main_~#t1122~0.base_10|)) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1122~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1122~0.offset=|v_ULTIMATE.start_main_~#t1122~0.offset_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1122~0.base=|v_ULTIMATE.start_main_~#t1122~0.base_10|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1122~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1122~0.base, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 17:31:11,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L4-->L789: Formula: (and (= 1 ~y$r_buff0_thd3~0_Out2121906270) (= ~y$r_buff1_thd0~0_Out2121906270 ~y$r_buff0_thd0~0_In2121906270) (= ~y$r_buff1_thd2~0_Out2121906270 ~y$r_buff0_thd2~0_In2121906270) (= ~y$r_buff0_thd1~0_In2121906270 ~y$r_buff1_thd1~0_Out2121906270) (= 1 ~z~0_Out2121906270) (= ~y$r_buff0_thd3~0_In2121906270 ~y$r_buff1_thd3~0_Out2121906270) (= ~__unbuffered_p2_EAX~0_Out2121906270 ~z~0_Out2121906270) (= ~__unbuffered_p2_EBX~0_Out2121906270 ~a~0_In2121906270) (not (= P2Thread1of1ForFork1___VERIFIER_assert_~expression_In2121906270 0))) InVars {~a~0=~a~0_In2121906270, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2121906270, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2121906270, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2121906270, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In2121906270, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In2121906270} OutVars{~__unbuffered_p2_EBX~0=~__unbuffered_p2_EBX~0_Out2121906270, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In2121906270, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_Out2121906270, ~a~0=~a~0_In2121906270, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_Out2121906270, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_Out2121906270, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out2121906270, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2121906270, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2121906270, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In2121906270, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_Out2121906270, ~z~0=~z~0_Out2121906270, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_Out2121906270} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 17:31:11,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_8 |v_P0Thread1of1ForFork2_#in~arg.base_10|) (= v_~a~0_22 1) (= v_~x~0_29 v_~__unbuffered_p0_EAX~0_17) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_P0Thread1of1ForFork2_~arg.offset_8 |v_P0Thread1of1ForFork2_#in~arg.offset_10|) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, ~x~0=v_~x~0_29} OutVars{~a~0=v_~a~0_22, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_8, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_29, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_8} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 17:31:11,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L754-2-->L754-5: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd2~0_In-446389490 256) 0)) (.cse0 (= |P1Thread1of1ForFork0_#t~ite4_Out-446389490| |P1Thread1of1ForFork0_#t~ite3_Out-446389490|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-446389490 256)))) (or (and .cse0 (= |P1Thread1of1ForFork0_#t~ite3_Out-446389490| ~y~0_In-446389490) (or .cse1 .cse2)) (and (not .cse2) .cse0 (= ~y$w_buff1~0_In-446389490 |P1Thread1of1ForFork0_#t~ite3_Out-446389490|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-446389490, ~y$w_buff1~0=~y$w_buff1~0_In-446389490, ~y~0=~y~0_In-446389490, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-446389490} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-446389490, ~y$w_buff1~0=~y$w_buff1~0_In-446389490, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out-446389490|, ~y~0=~y~0_In-446389490, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out-446389490|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-446389490} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 17:31:11,976 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-991344943 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-991344943 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite11_Out-991344943|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-991344943 |P2Thread1of1ForFork1_#t~ite11_Out-991344943|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-991344943, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991344943} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-991344943, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out-991344943|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991344943} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:31:11,976 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L791-->L791-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-240814308 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-240814308 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-240814308 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-240814308 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite12_Out-240814308| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite12_Out-240814308| ~y$w_buff1_used~0_In-240814308) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-240814308, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-240814308, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-240814308, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-240814308} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-240814308, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-240814308, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-240814308, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out-240814308|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-240814308} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:31:11,976 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L792-->L793: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1057518784 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd3~0_In1057518784 256) 0)) (.cse0 (= ~y$r_buff0_thd3~0_In1057518784 ~y$r_buff0_thd3~0_Out1057518784))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse1) (= 0 ~y$r_buff0_thd3~0_Out1057518784)) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1057518784, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1057518784} OutVars{P2Thread1of1ForFork1_#t~ite13=|P2Thread1of1ForFork1_#t~ite13_Out1057518784|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1057518784, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out1057518784} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite13, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:31:11,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L793-->L793-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-1789513281 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1789513281 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1789513281 256))) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-1789513281 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite14_Out-1789513281| ~y$r_buff1_thd3~0_In-1789513281)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork1_#t~ite14_Out-1789513281|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1789513281, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1789513281, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1789513281, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1789513281} OutVars{P2Thread1of1ForFork1_#t~ite14=|P2Thread1of1ForFork1_#t~ite14_Out-1789513281|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1789513281, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1789513281, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1789513281, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1789513281} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:31:11,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L793-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_59 1) v_~__unbuffered_cnt~0_58) (= |v_P2Thread1of1ForFork1_#t~ite14_34| v_~y$r_buff1_thd3~0_55) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59} OutVars{P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_33|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_55, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 17:31:11,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L755-->L755-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-601869006 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-601869006 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork0_#t~ite5_Out-601869006|) (not .cse1)) (and (= ~y$w_buff0_used~0_In-601869006 |P1Thread1of1ForFork0_#t~ite5_Out-601869006|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-601869006, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-601869006} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-601869006, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-601869006, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out-601869006|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:31:11,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L756-->L756-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In2100101918 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In2100101918 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In2100101918 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In2100101918 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In2100101918 |P1Thread1of1ForFork0_#t~ite6_Out2100101918|)) (and (= 0 |P1Thread1of1ForFork0_#t~ite6_Out2100101918|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2100101918, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2100101918, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2100101918, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2100101918} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2100101918, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2100101918, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2100101918, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out2100101918|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2100101918} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:31:11,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In360740821 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In360740821 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite7_Out360740821| ~y$r_buff0_thd2~0_In360740821)) (and (= |P1Thread1of1ForFork0_#t~ite7_Out360740821| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In360740821, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In360740821} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In360740821, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In360740821, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out360740821|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 17:31:11,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L758-->L758-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd2~0_In1972701826 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1972701826 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In1972701826 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1972701826 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In1972701826 |P1Thread1of1ForFork0_#t~ite8_Out1972701826|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite8_Out1972701826|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1972701826, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1972701826, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1972701826, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1972701826} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1972701826, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1972701826, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1972701826, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out1972701826|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1972701826} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:31:11,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= v_~y$r_buff1_thd2~0_82 |v_P1Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_36|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_82, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_35|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 17:31:11,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L820-->L822-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_253 256)) (= (mod v_~y$r_buff0_thd0~0_142 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:31:11,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L822-2-->L822-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite18_Out1853319182| |ULTIMATE.start_main_#t~ite19_Out1853319182|)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In1853319182 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In1853319182 256) 0))) (or (and (not .cse0) .cse1 (= ~y$w_buff1~0_In1853319182 |ULTIMATE.start_main_#t~ite18_Out1853319182|) (not .cse2)) (and (= |ULTIMATE.start_main_#t~ite18_Out1853319182| ~y~0_In1853319182) .cse1 (or .cse0 .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1853319182, ~y~0=~y~0_In1853319182, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1853319182, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1853319182} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1853319182, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1853319182|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1853319182|, ~y~0=~y~0_In1853319182, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1853319182, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1853319182} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:31:11,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-493714996 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-493714996 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-493714996| 0)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out-493714996| ~y$w_buff0_used~0_In-493714996)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-493714996, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-493714996} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-493714996, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-493714996, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-493714996|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:31:11,979 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L824-->L824-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In396577605 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In396577605 256))) (.cse0 (= (mod ~y$r_buff1_thd0~0_In396577605 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In396577605 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite21_Out396577605| ~y$w_buff1_used~0_In396577605)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite21_Out396577605| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In396577605, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In396577605, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In396577605, ~y$w_buff1_used~0=~y$w_buff1_used~0_In396577605} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In396577605, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In396577605, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out396577605|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In396577605, ~y$w_buff1_used~0=~y$w_buff1_used~0_In396577605} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:31:11,979 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1588869793 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1588869793 256)))) (or (and (= ~y$r_buff0_thd0~0_In-1588869793 |ULTIMATE.start_main_#t~ite22_Out-1588869793|) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite22_Out-1588869793| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1588869793, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1588869793} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1588869793, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1588869793, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1588869793|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:31:11,979 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L826-->L826-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In1105956825 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1105956825 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1105956825 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1105956825 256)))) (or (and (= |ULTIMATE.start_main_#t~ite23_Out1105956825| ~y$r_buff1_thd0~0_In1105956825) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite23_Out1105956825| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1105956825, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1105956825, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1105956825, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1105956825} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1105956825, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1105956825, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1105956825, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1105956825|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1105956825} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:31:11,980 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1414474075 256)))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite29_Out-1414474075| ~y$w_buff0~0_In-1414474075) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1414474075 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-1414474075 256)) .cse1) (= (mod ~y$w_buff0_used~0_In-1414474075 256) 0) (and (= 0 (mod ~y$r_buff1_thd0~0_In-1414474075 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite29_Out-1414474075| |ULTIMATE.start_main_#t~ite30_Out-1414474075|)) (and (= |ULTIMATE.start_main_#t~ite29_In-1414474075| |ULTIMATE.start_main_#t~ite29_Out-1414474075|) (not .cse0) (= |ULTIMATE.start_main_#t~ite30_Out-1414474075| ~y$w_buff0~0_In-1414474075)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1414474075, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In-1414474075|, ~y$w_buff0~0=~y$w_buff0~0_In-1414474075, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1414474075, ~weak$$choice2~0=~weak$$choice2~0_In-1414474075, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1414474075, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1414474075} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-1414474075|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1414474075, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1414474075|, ~y$w_buff0~0=~y$w_buff0~0_In-1414474075, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1414474075, ~weak$$choice2~0=~weak$$choice2~0_In-1414474075, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1414474075, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1414474075} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:31:11,981 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L836-->L836-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In3887102 256) 0))) (or (and (= ~y$w_buff0_used~0_In3887102 |ULTIMATE.start_main_#t~ite35_Out3887102|) (= |ULTIMATE.start_main_#t~ite35_Out3887102| |ULTIMATE.start_main_#t~ite36_Out3887102|) (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In3887102 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In3887102 256)) .cse0) (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In3887102 256))) (= 0 (mod ~y$w_buff0_used~0_In3887102 256)))) .cse1) (and (= ~y$w_buff0_used~0_In3887102 |ULTIMATE.start_main_#t~ite36_Out3887102|) (= |ULTIMATE.start_main_#t~ite35_In3887102| |ULTIMATE.start_main_#t~ite35_Out3887102|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In3887102, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In3887102, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In3887102|, ~weak$$choice2~0=~weak$$choice2~0_In3887102, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In3887102, ~y$w_buff1_used~0=~y$w_buff1_used~0_In3887102} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In3887102, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In3887102, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out3887102|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out3887102|, ~weak$$choice2~0=~weak$$choice2~0_In3887102, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In3887102, ~y$w_buff1_used~0=~y$w_buff1_used~0_In3887102} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 17:31:11,981 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L837-->L837-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1946044710 256)))) (or (and (= |ULTIMATE.start_main_#t~ite38_Out1946044710| |ULTIMATE.start_main_#t~ite39_Out1946044710|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1946044710 256)))) (or (and (= (mod ~y$w_buff1_used~0_In1946044710 256) 0) .cse1) (and (= (mod ~y$r_buff1_thd0~0_In1946044710 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In1946044710 256) 0))) (= |ULTIMATE.start_main_#t~ite38_Out1946044710| ~y$w_buff1_used~0_In1946044710)) (and (= |ULTIMATE.start_main_#t~ite38_In1946044710| |ULTIMATE.start_main_#t~ite38_Out1946044710|) (= |ULTIMATE.start_main_#t~ite39_Out1946044710| ~y$w_buff1_used~0_In1946044710) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1946044710, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1946044710, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1946044710|, ~weak$$choice2~0=~weak$$choice2~0_In1946044710, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1946044710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1946044710} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1946044710, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1946044710|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1946044710, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1946044710|, ~weak$$choice2~0=~weak$$choice2~0_In1946044710, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1946044710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1946044710} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 17:31:11,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L838-->L839: Formula: (and (not (= (mod v_~weak$$choice2~0_22 256) 0)) (= v_~y$r_buff0_thd0~0_108 v_~y$r_buff0_thd0~0_107)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_22} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:31:11,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L839-->L839-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2008797932 256)))) (or (and .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2008797932 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In2008797932 256)) .cse1) (= (mod ~y$w_buff0_used~0_In2008797932 256) 0) (and (= 0 (mod ~y$r_buff1_thd0~0_In2008797932 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite44_Out2008797932| |ULTIMATE.start_main_#t~ite45_Out2008797932|) (= |ULTIMATE.start_main_#t~ite44_Out2008797932| ~y$r_buff1_thd0~0_In2008797932)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite45_Out2008797932| ~y$r_buff1_thd0~0_In2008797932) (= |ULTIMATE.start_main_#t~ite44_In2008797932| |ULTIMATE.start_main_#t~ite44_Out2008797932|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2008797932, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2008797932, ~weak$$choice2~0=~weak$$choice2~0_In2008797932, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2008797932, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2008797932, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In2008797932|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2008797932, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2008797932, ~weak$$choice2~0=~weak$$choice2~0_In2008797932, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2008797932, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out2008797932|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out2008797932|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2008797932} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 17:31:11,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L841-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_27) (= v_~y~0_103 v_~y$mem_tmp~0_13) (not (= 0 (mod v_~y$flush_delayed~0_28 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:31:11,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:31:12,042 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_e51bbd0b-a152-4b3a-a1e6-ff9f6cff6c9e/bin/uautomizer/witness.graphml [2019-12-07 17:31:12,042 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:31:12,043 INFO L168 Benchmark]: Toolchain (without parser) took 14391.71 ms. Allocated memory was 1.0 GB in the beginning and 2.1 GB in the end (delta: 1.0 GB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -143.9 MB). Peak memory consumption was 885.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:31:12,044 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:31:12,044 INFO L168 Benchmark]: CACSL2BoogieTranslator took 387.81 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.8 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -133.4 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:31:12,044 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.08 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:31:12,045 INFO L168 Benchmark]: Boogie Preprocessor took 26.05 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:31:12,045 INFO L168 Benchmark]: RCFGBuilder took 395.44 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:31:12,045 INFO L168 Benchmark]: TraceAbstraction took 13464.89 ms. Allocated memory was 1.1 GB in the beginning and 2.1 GB in the end (delta: 925.9 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -99.1 MB). Peak memory consumption was 826.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:31:12,046 INFO L168 Benchmark]: Witness Printer took 72.57 ms. Allocated memory is still 2.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 26.9 MB). Peak memory consumption was 26.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:31:12,048 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 387.81 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.8 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -133.4 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.08 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.05 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 395.44 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13464.89 ms. Allocated memory was 1.1 GB in the beginning and 2.1 GB in the end (delta: 925.9 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -99.1 MB). Peak memory consumption was 826.8 MB. Max. memory is 11.5 GB. * Witness Printer took 72.57 ms. Allocated memory is still 2.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 26.9 MB). Peak memory consumption was 26.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.8s, 165 ProgramPointsBefore, 79 ProgramPointsAfterwards, 196 TransitionsBefore, 86 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 38 ConcurrentYvCompositions, 28 ChoiceCompositions, 4263 VarBasedMoverChecksPositive, 162 VarBasedMoverChecksNegative, 17 SemBasedMoverChecksPositive, 192 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 50142 CheckedPairsTotal, 117 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L812] FCALL, FORK 0 pthread_create(&t1120, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1121, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK 0 pthread_create(&t1122, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L768] 3 y$w_buff1 = y$w_buff0 [L769] 3 y$w_buff0 = 2 [L770] 3 y$w_buff1_used = y$w_buff0_used [L771] 3 y$w_buff0_used = (_Bool)1 [L789] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 x = 1 [L751] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L789] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L790] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L791] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L818] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L822] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L823] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L824] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L825] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L826] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L829] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L830] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L831] 0 y$flush_delayed = weak$$choice2 [L832] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L833] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L833] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L834] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L835] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L835] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L836] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L837] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L839] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L840] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 156 locations, 2 error locations. Result: UNSAFE, OverallTime: 13.3s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 4.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2067 SDtfs, 2367 SDslu, 5693 SDs, 0 SdLazy, 3898 SolverSat, 230 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 177 GetRequests, 21 SyntacticMatches, 12 SemanticMatches, 144 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 460 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=31188occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.5s AutomataMinimizationTime, 17 MinimizatonAttempts, 23971 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 704 NumberOfCodeBlocks, 704 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 630 ConstructedInterpolants, 0 QuantifiedInterpolants, 124318 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...