./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix042_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix042_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9313fcadf4dae974dc0a53eeb69c6f4e87c89134 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:59:49,921 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:59:49,922 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:59:49,930 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:59:49,930 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:59:49,931 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:59:49,932 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:59:49,933 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:59:49,935 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:59:49,935 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:59:49,936 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:59:49,937 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:59:49,937 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:59:49,938 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:59:49,939 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:59:49,939 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:59:49,940 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:59:49,941 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:59:49,942 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:59:49,944 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:59:49,945 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:59:49,946 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:59:49,946 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:59:49,947 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:59:49,949 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:59:49,949 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:59:49,949 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:59:49,950 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:59:49,950 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:59:49,951 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:59:49,951 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:59:49,951 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:59:49,952 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:59:49,952 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:59:49,953 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:59:49,953 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:59:49,954 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:59:49,954 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:59:49,954 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:59:49,954 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:59:49,955 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:59:49,955 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:59:49,964 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:59:49,965 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:59:49,965 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:59:49,966 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:59:49,966 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:59:49,966 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:59:49,966 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:59:49,966 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:59:49,966 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:59:49,966 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:59:49,966 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:59:49,967 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:59:49,967 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:59:49,967 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:59:49,967 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:59:49,967 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:59:49,967 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:59:49,967 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:59:49,968 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:59:49,968 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:59:49,968 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:59:49,968 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:59:49,968 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:59:49,968 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:59:49,968 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:59:49,968 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:59:49,969 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:59:49,969 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:59:49,969 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:59:49,969 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9313fcadf4dae974dc0a53eeb69c6f4e87c89134 [2019-12-07 14:59:50,072 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:59:50,082 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:59:50,084 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:59:50,086 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:59:50,086 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:59:50,087 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix042_tso.oepc.i [2019-12-07 14:59:50,136 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/data/816b4ea7e/2e8fb7c60da94fa5a0e6e9939f3d4bfc/FLAG5f32cb443 [2019-12-07 14:59:50,633 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:59:50,633 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/sv-benchmarks/c/pthread-wmm/mix042_tso.oepc.i [2019-12-07 14:59:50,643 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/data/816b4ea7e/2e8fb7c60da94fa5a0e6e9939f3d4bfc/FLAG5f32cb443 [2019-12-07 14:59:51,157 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/data/816b4ea7e/2e8fb7c60da94fa5a0e6e9939f3d4bfc [2019-12-07 14:59:51,159 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:59:51,160 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:59:51,160 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:59:51,160 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:59:51,163 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:59:51,163 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:59:51" (1/1) ... [2019-12-07 14:59:51,165 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7f87f835 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51, skipping insertion in model container [2019-12-07 14:59:51,165 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:59:51" (1/1) ... [2019-12-07 14:59:51,169 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:59:51,196 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:59:51,472 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:59:51,483 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:59:51,528 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:59:51,582 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:59:51,582 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51 WrapperNode [2019-12-07 14:59:51,582 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:59:51,582 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:59:51,583 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:59:51,583 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:59:51,588 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51" (1/1) ... [2019-12-07 14:59:51,602 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51" (1/1) ... [2019-12-07 14:59:51,620 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:59:51,621 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:59:51,621 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:59:51,621 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:59:51,627 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51" (1/1) ... [2019-12-07 14:59:51,627 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51" (1/1) ... [2019-12-07 14:59:51,631 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51" (1/1) ... [2019-12-07 14:59:51,631 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51" (1/1) ... [2019-12-07 14:59:51,639 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51" (1/1) ... [2019-12-07 14:59:51,642 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51" (1/1) ... [2019-12-07 14:59:51,644 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51" (1/1) ... [2019-12-07 14:59:51,647 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:59:51,648 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:59:51,648 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:59:51,648 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:59:51,648 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:59:51,687 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:59:51,687 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:59:51,688 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:59:51,688 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:59:51,688 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:59:51,688 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:59:51,688 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:59:51,688 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:59:51,688 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:59:51,688 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:59:51,688 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:59:51,688 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:59:51,688 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:59:51,689 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:59:52,053 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:59:52,054 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:59:52,054 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:59:52 BoogieIcfgContainer [2019-12-07 14:59:52,055 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:59:52,055 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:59:52,055 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:59:52,057 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:59:52,057 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:59:51" (1/3) ... [2019-12-07 14:59:52,058 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@66265e7f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:59:52, skipping insertion in model container [2019-12-07 14:59:52,058 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:59:51" (2/3) ... [2019-12-07 14:59:52,058 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@66265e7f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:59:52, skipping insertion in model container [2019-12-07 14:59:52,058 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:59:52" (3/3) ... [2019-12-07 14:59:52,059 INFO L109 eAbstractionObserver]: Analyzing ICFG mix042_tso.oepc.i [2019-12-07 14:59:52,066 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:59:52,066 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:59:52,071 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:59:52,071 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:59:52,096 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,096 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,096 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,097 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,097 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,097 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,097 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,097 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,097 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,098 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,098 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,098 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,098 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,098 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,098 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,098 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,098 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,098 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,099 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,099 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,099 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,099 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,099 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,099 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,099 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,099 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,100 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,100 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,100 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,100 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,100 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,100 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,100 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,100 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,101 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,101 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,101 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,102 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,103 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,103 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,103 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,103 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,103 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,103 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,103 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,103 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,103 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,104 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,104 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,104 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,104 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,105 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,105 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,105 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,105 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,105 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,105 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,105 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,105 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,105 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,105 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,106 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,106 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,106 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,106 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,106 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,106 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,106 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,106 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,106 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,106 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,107 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,107 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,107 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,107 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,107 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,107 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,107 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,107 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,107 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,108 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,108 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,108 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,108 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,108 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,108 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,108 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,108 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,108 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,109 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,109 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,109 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,109 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,109 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,109 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,109 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,109 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,109 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,109 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,109 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,110 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,110 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,110 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,110 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,110 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,110 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,110 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,110 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,110 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,110 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,111 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,111 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,111 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,111 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,111 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,111 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,111 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,111 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,111 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,111 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,112 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,112 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,112 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,112 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,112 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,112 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,112 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,112 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,112 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,112 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,113 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,113 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,113 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,113 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,113 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,113 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,113 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,113 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,113 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,113 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,114 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,114 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,114 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,114 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,114 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,114 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,114 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,114 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,114 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,114 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,115 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,115 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,115 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,115 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,115 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,115 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,115 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,115 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,115 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,115 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,115 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,116 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,116 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,116 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,116 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,116 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,116 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,116 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:59:52,130 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:59:52,145 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:59:52,145 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:59:52,145 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:59:52,145 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:59:52,145 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:59:52,145 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:59:52,145 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:59:52,145 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:59:52,156 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 14:59:52,157 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 14:59:52,226 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 14:59:52,226 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:59:52,235 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:59:52,255 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 14:59:52,290 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 14:59:52,290 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:59:52,297 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:59:52,314 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 14:59:52,315 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:59:55,299 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 14:59:55,628 WARN L192 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 14:59:55,730 INFO L206 etLargeBlockEncoding]: Checked pairs total: 87212 [2019-12-07 14:59:55,730 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 14:59:55,733 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 15:00:07,891 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 15:00:07,892 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 15:00:07,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 15:00:07,897 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:07,897 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 15:00:07,897 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:07,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:07,902 INFO L82 PathProgramCache]: Analyzing trace with hash 919766, now seen corresponding path program 1 times [2019-12-07 15:00:07,907 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:07,907 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535725999] [2019-12-07 15:00:07,907 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:07,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:08,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:08,050 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [535725999] [2019-12-07 15:00:08,051 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:08,051 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:00:08,051 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [716947385] [2019-12-07 15:00:08,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:08,054 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:08,063 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:08,063 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:08,065 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 15:00:08,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:08,859 INFO L93 Difference]: Finished difference Result 101544 states and 430594 transitions. [2019-12-07 15:00:08,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:08,861 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 15:00:08,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:09,395 INFO L225 Difference]: With dead ends: 101544 [2019-12-07 15:00:09,395 INFO L226 Difference]: Without dead ends: 95304 [2019-12-07 15:00:09,396 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:12,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95304 states. [2019-12-07 15:00:14,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95304 to 95304. [2019-12-07 15:00:14,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95304 states. [2019-12-07 15:00:14,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95304 states to 95304 states and 403554 transitions. [2019-12-07 15:00:14,475 INFO L78 Accepts]: Start accepts. Automaton has 95304 states and 403554 transitions. Word has length 3 [2019-12-07 15:00:14,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:14,476 INFO L462 AbstractCegarLoop]: Abstraction has 95304 states and 403554 transitions. [2019-12-07 15:00:14,476 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:14,476 INFO L276 IsEmpty]: Start isEmpty. Operand 95304 states and 403554 transitions. [2019-12-07 15:00:14,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:00:14,479 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:14,479 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:14,479 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:14,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:14,479 INFO L82 PathProgramCache]: Analyzing trace with hash -1982627867, now seen corresponding path program 1 times [2019-12-07 15:00:14,479 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:14,480 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [48131296] [2019-12-07 15:00:14,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:14,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:14,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:14,537 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [48131296] [2019-12-07 15:00:14,538 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:14,538 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:14,538 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [135880408] [2019-12-07 15:00:14,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:00:14,539 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:14,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:00:14,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:00:14,539 INFO L87 Difference]: Start difference. First operand 95304 states and 403554 transitions. Second operand 4 states. [2019-12-07 15:00:17,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:17,144 INFO L93 Difference]: Finished difference Result 152040 states and 617140 transitions. [2019-12-07 15:00:17,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:00:17,144 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 15:00:17,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:17,544 INFO L225 Difference]: With dead ends: 152040 [2019-12-07 15:00:17,544 INFO L226 Difference]: Without dead ends: 151991 [2019-12-07 15:00:17,545 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:00:21,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151991 states. [2019-12-07 15:00:23,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151991 to 137801. [2019-12-07 15:00:23,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137801 states. [2019-12-07 15:00:24,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137801 states to 137801 states and 566928 transitions. [2019-12-07 15:00:24,041 INFO L78 Accepts]: Start accepts. Automaton has 137801 states and 566928 transitions. Word has length 11 [2019-12-07 15:00:24,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:24,041 INFO L462 AbstractCegarLoop]: Abstraction has 137801 states and 566928 transitions. [2019-12-07 15:00:24,041 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:00:24,041 INFO L276 IsEmpty]: Start isEmpty. Operand 137801 states and 566928 transitions. [2019-12-07 15:00:24,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:00:24,045 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:24,046 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:24,046 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:24,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:24,046 INFO L82 PathProgramCache]: Analyzing trace with hash -1673757482, now seen corresponding path program 1 times [2019-12-07 15:00:24,046 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:24,046 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212559018] [2019-12-07 15:00:24,046 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:24,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:24,086 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:24,086 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212559018] [2019-12-07 15:00:24,086 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:24,086 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:24,086 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [565991657] [2019-12-07 15:00:24,087 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:24,087 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:24,087 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:24,087 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:24,087 INFO L87 Difference]: Start difference. First operand 137801 states and 566928 transitions. Second operand 3 states. [2019-12-07 15:00:24,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:24,175 INFO L93 Difference]: Finished difference Result 30915 states and 99823 transitions. [2019-12-07 15:00:24,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:24,176 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 15:00:24,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:24,236 INFO L225 Difference]: With dead ends: 30915 [2019-12-07 15:00:24,236 INFO L226 Difference]: Without dead ends: 30915 [2019-12-07 15:00:24,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:24,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30915 states. [2019-12-07 15:00:24,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30915 to 30915. [2019-12-07 15:00:24,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30915 states. [2019-12-07 15:00:24,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30915 states to 30915 states and 99823 transitions. [2019-12-07 15:00:24,741 INFO L78 Accepts]: Start accepts. Automaton has 30915 states and 99823 transitions. Word has length 13 [2019-12-07 15:00:24,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:24,742 INFO L462 AbstractCegarLoop]: Abstraction has 30915 states and 99823 transitions. [2019-12-07 15:00:24,742 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:24,742 INFO L276 IsEmpty]: Start isEmpty. Operand 30915 states and 99823 transitions. [2019-12-07 15:00:24,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:00:24,744 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:24,744 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:24,744 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:24,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:24,744 INFO L82 PathProgramCache]: Analyzing trace with hash 841711145, now seen corresponding path program 1 times [2019-12-07 15:00:24,744 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:24,744 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1537555021] [2019-12-07 15:00:24,744 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:24,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:24,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:24,797 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1537555021] [2019-12-07 15:00:24,798 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:24,798 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:24,798 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1185989457] [2019-12-07 15:00:24,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:00:24,798 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:24,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:00:24,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:00:24,799 INFO L87 Difference]: Start difference. First operand 30915 states and 99823 transitions. Second operand 4 states. [2019-12-07 15:00:25,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:25,016 INFO L93 Difference]: Finished difference Result 38538 states and 124019 transitions. [2019-12-07 15:00:25,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:00:25,017 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 15:00:25,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:25,071 INFO L225 Difference]: With dead ends: 38538 [2019-12-07 15:00:25,071 INFO L226 Difference]: Without dead ends: 38538 [2019-12-07 15:00:25,072 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:00:25,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38538 states. [2019-12-07 15:00:25,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38538 to 34473. [2019-12-07 15:00:25,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34473 states. [2019-12-07 15:00:25,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34473 states to 34473 states and 111272 transitions. [2019-12-07 15:00:25,651 INFO L78 Accepts]: Start accepts. Automaton has 34473 states and 111272 transitions. Word has length 16 [2019-12-07 15:00:25,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:25,652 INFO L462 AbstractCegarLoop]: Abstraction has 34473 states and 111272 transitions. [2019-12-07 15:00:25,652 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:00:25,652 INFO L276 IsEmpty]: Start isEmpty. Operand 34473 states and 111272 transitions. [2019-12-07 15:00:25,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:00:25,658 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:25,658 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:25,658 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:25,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:25,658 INFO L82 PathProgramCache]: Analyzing trace with hash 361242897, now seen corresponding path program 1 times [2019-12-07 15:00:25,658 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:25,659 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869882375] [2019-12-07 15:00:25,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:25,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:25,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:25,712 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869882375] [2019-12-07 15:00:25,712 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:25,712 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:25,712 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2227772] [2019-12-07 15:00:25,712 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:00:25,712 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:25,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:00:25,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:00:25,713 INFO L87 Difference]: Start difference. First operand 34473 states and 111272 transitions. Second operand 5 states. [2019-12-07 15:00:26,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:26,088 INFO L93 Difference]: Finished difference Result 44779 states and 142105 transitions. [2019-12-07 15:00:26,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:00:26,089 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 15:00:26,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:26,146 INFO L225 Difference]: With dead ends: 44779 [2019-12-07 15:00:26,147 INFO L226 Difference]: Without dead ends: 44772 [2019-12-07 15:00:26,147 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:00:26,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44772 states. [2019-12-07 15:00:26,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44772 to 34062. [2019-12-07 15:00:26,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34062 states. [2019-12-07 15:00:27,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34062 states to 34062 states and 109831 transitions. [2019-12-07 15:00:27,022 INFO L78 Accepts]: Start accepts. Automaton has 34062 states and 109831 transitions. Word has length 22 [2019-12-07 15:00:27,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:27,022 INFO L462 AbstractCegarLoop]: Abstraction has 34062 states and 109831 transitions. [2019-12-07 15:00:27,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:00:27,022 INFO L276 IsEmpty]: Start isEmpty. Operand 34062 states and 109831 transitions. [2019-12-07 15:00:27,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 15:00:27,031 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:27,031 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:27,031 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:27,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:27,031 INFO L82 PathProgramCache]: Analyzing trace with hash -2019660134, now seen corresponding path program 1 times [2019-12-07 15:00:27,032 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:27,032 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [636912907] [2019-12-07 15:00:27,032 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:27,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:27,095 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:27,095 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [636912907] [2019-12-07 15:00:27,096 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:27,096 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:27,096 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198022783] [2019-12-07 15:00:27,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:00:27,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:27,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:00:27,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:00:27,097 INFO L87 Difference]: Start difference. First operand 34062 states and 109831 transitions. Second operand 5 states. [2019-12-07 15:00:27,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:27,460 INFO L93 Difference]: Finished difference Result 48290 states and 152456 transitions. [2019-12-07 15:00:27,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:00:27,460 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 15:00:27,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:27,528 INFO L225 Difference]: With dead ends: 48290 [2019-12-07 15:00:27,529 INFO L226 Difference]: Without dead ends: 48277 [2019-12-07 15:00:27,529 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:00:27,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48277 states. [2019-12-07 15:00:28,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48277 to 39783. [2019-12-07 15:00:28,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39783 states. [2019-12-07 15:00:28,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39783 states to 39783 states and 127731 transitions. [2019-12-07 15:00:28,222 INFO L78 Accepts]: Start accepts. Automaton has 39783 states and 127731 transitions. Word has length 25 [2019-12-07 15:00:28,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:28,223 INFO L462 AbstractCegarLoop]: Abstraction has 39783 states and 127731 transitions. [2019-12-07 15:00:28,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:00:28,223 INFO L276 IsEmpty]: Start isEmpty. Operand 39783 states and 127731 transitions. [2019-12-07 15:00:28,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:00:28,232 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:28,233 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:28,233 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:28,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:28,233 INFO L82 PathProgramCache]: Analyzing trace with hash -1429942457, now seen corresponding path program 1 times [2019-12-07 15:00:28,233 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:28,233 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [938810245] [2019-12-07 15:00:28,233 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:28,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:28,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:28,257 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [938810245] [2019-12-07 15:00:28,257 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:28,257 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:28,257 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [666841290] [2019-12-07 15:00:28,257 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:28,257 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:28,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:28,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:28,258 INFO L87 Difference]: Start difference. First operand 39783 states and 127731 transitions. Second operand 3 states. [2019-12-07 15:00:28,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:28,416 INFO L93 Difference]: Finished difference Result 56828 states and 180787 transitions. [2019-12-07 15:00:28,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:28,417 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 15:00:28,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:28,506 INFO L225 Difference]: With dead ends: 56828 [2019-12-07 15:00:28,506 INFO L226 Difference]: Without dead ends: 56828 [2019-12-07 15:00:28,506 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:28,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56828 states. [2019-12-07 15:00:29,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56828 to 42213. [2019-12-07 15:00:29,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42213 states. [2019-12-07 15:00:29,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42213 states to 42213 states and 135001 transitions. [2019-12-07 15:00:29,270 INFO L78 Accepts]: Start accepts. Automaton has 42213 states and 135001 transitions. Word has length 27 [2019-12-07 15:00:29,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:29,271 INFO L462 AbstractCegarLoop]: Abstraction has 42213 states and 135001 transitions. [2019-12-07 15:00:29,271 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:29,271 INFO L276 IsEmpty]: Start isEmpty. Operand 42213 states and 135001 transitions. [2019-12-07 15:00:29,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:00:29,281 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:29,281 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:29,281 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:29,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:29,281 INFO L82 PathProgramCache]: Analyzing trace with hash -535275942, now seen corresponding path program 1 times [2019-12-07 15:00:29,282 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:29,282 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105618654] [2019-12-07 15:00:29,282 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:29,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:29,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:29,304 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [105618654] [2019-12-07 15:00:29,304 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:29,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:29,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1920525438] [2019-12-07 15:00:29,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:29,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:29,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:29,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:29,305 INFO L87 Difference]: Start difference. First operand 42213 states and 135001 transitions. Second operand 3 states. [2019-12-07 15:00:29,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:29,476 INFO L93 Difference]: Finished difference Result 62192 states and 195378 transitions. [2019-12-07 15:00:29,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:29,477 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 15:00:29,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:29,566 INFO L225 Difference]: With dead ends: 62192 [2019-12-07 15:00:29,567 INFO L226 Difference]: Without dead ends: 62192 [2019-12-07 15:00:29,567 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:29,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62192 states. [2019-12-07 15:00:30,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62192 to 47577. [2019-12-07 15:00:30,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47577 states. [2019-12-07 15:00:30,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47577 states to 47577 states and 149592 transitions. [2019-12-07 15:00:30,624 INFO L78 Accepts]: Start accepts. Automaton has 47577 states and 149592 transitions. Word has length 27 [2019-12-07 15:00:30,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:30,624 INFO L462 AbstractCegarLoop]: Abstraction has 47577 states and 149592 transitions. [2019-12-07 15:00:30,624 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:30,624 INFO L276 IsEmpty]: Start isEmpty. Operand 47577 states and 149592 transitions. [2019-12-07 15:00:30,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:00:30,635 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:30,636 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:30,636 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:30,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:30,636 INFO L82 PathProgramCache]: Analyzing trace with hash 1457952739, now seen corresponding path program 1 times [2019-12-07 15:00:30,636 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:30,636 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [751056631] [2019-12-07 15:00:30,636 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:30,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:30,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:30,684 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [751056631] [2019-12-07 15:00:30,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:30,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:00:30,684 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196625035] [2019-12-07 15:00:30,684 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:00:30,684 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:30,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:00:30,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:00:30,685 INFO L87 Difference]: Start difference. First operand 47577 states and 149592 transitions. Second operand 6 states. [2019-12-07 15:00:31,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:31,210 INFO L93 Difference]: Finished difference Result 89520 states and 280849 transitions. [2019-12-07 15:00:31,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:00:31,211 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 15:00:31,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:31,339 INFO L225 Difference]: With dead ends: 89520 [2019-12-07 15:00:31,339 INFO L226 Difference]: Without dead ends: 89501 [2019-12-07 15:00:31,339 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:00:31,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89501 states. [2019-12-07 15:00:32,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89501 to 51874. [2019-12-07 15:00:32,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51874 states. [2019-12-07 15:00:32,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51874 states to 51874 states and 162887 transitions. [2019-12-07 15:00:32,442 INFO L78 Accepts]: Start accepts. Automaton has 51874 states and 162887 transitions. Word has length 27 [2019-12-07 15:00:32,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:32,442 INFO L462 AbstractCegarLoop]: Abstraction has 51874 states and 162887 transitions. [2019-12-07 15:00:32,442 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:00:32,442 INFO L276 IsEmpty]: Start isEmpty. Operand 51874 states and 162887 transitions. [2019-12-07 15:00:32,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 15:00:32,456 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:32,457 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:32,457 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:32,457 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:32,457 INFO L82 PathProgramCache]: Analyzing trace with hash -665356316, now seen corresponding path program 1 times [2019-12-07 15:00:32,457 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:32,457 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998193564] [2019-12-07 15:00:32,457 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:32,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:32,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:32,502 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998193564] [2019-12-07 15:00:32,503 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:32,503 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:00:32,503 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1795261875] [2019-12-07 15:00:32,503 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:00:32,503 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:32,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:00:32,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:00:32,504 INFO L87 Difference]: Start difference. First operand 51874 states and 162887 transitions. Second operand 5 states. [2019-12-07 15:00:33,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:33,015 INFO L93 Difference]: Finished difference Result 71552 states and 222438 transitions. [2019-12-07 15:00:33,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:00:33,016 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 15:00:33,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:33,123 INFO L225 Difference]: With dead ends: 71552 [2019-12-07 15:00:33,123 INFO L226 Difference]: Without dead ends: 71552 [2019-12-07 15:00:33,123 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:00:33,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71552 states. [2019-12-07 15:00:34,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71552 to 62228. [2019-12-07 15:00:34,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62228 states. [2019-12-07 15:00:34,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62228 states to 62228 states and 195110 transitions. [2019-12-07 15:00:34,164 INFO L78 Accepts]: Start accepts. Automaton has 62228 states and 195110 transitions. Word has length 28 [2019-12-07 15:00:34,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:34,164 INFO L462 AbstractCegarLoop]: Abstraction has 62228 states and 195110 transitions. [2019-12-07 15:00:34,164 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:00:34,164 INFO L276 IsEmpty]: Start isEmpty. Operand 62228 states and 195110 transitions. [2019-12-07 15:00:34,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 15:00:34,185 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:34,185 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:34,185 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:34,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:34,185 INFO L82 PathProgramCache]: Analyzing trace with hash 294567066, now seen corresponding path program 1 times [2019-12-07 15:00:34,185 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:34,186 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264156992] [2019-12-07 15:00:34,186 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:34,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:34,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:34,244 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264156992] [2019-12-07 15:00:34,244 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:34,244 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:00:34,244 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [664190683] [2019-12-07 15:00:34,244 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:00:34,244 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:34,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:00:34,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:00:34,245 INFO L87 Difference]: Start difference. First operand 62228 states and 195110 transitions. Second operand 6 states. [2019-12-07 15:00:34,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:34,941 INFO L93 Difference]: Finished difference Result 100378 states and 313238 transitions. [2019-12-07 15:00:34,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:00:34,942 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 15:00:34,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:35,099 INFO L225 Difference]: With dead ends: 100378 [2019-12-07 15:00:35,099 INFO L226 Difference]: Without dead ends: 100356 [2019-12-07 15:00:35,100 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:00:35,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100356 states. [2019-12-07 15:00:36,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100356 to 62116. [2019-12-07 15:00:36,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62116 states. [2019-12-07 15:00:36,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62116 states to 62116 states and 194655 transitions. [2019-12-07 15:00:36,379 INFO L78 Accepts]: Start accepts. Automaton has 62116 states and 194655 transitions. Word has length 28 [2019-12-07 15:00:36,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:36,379 INFO L462 AbstractCegarLoop]: Abstraction has 62116 states and 194655 transitions. [2019-12-07 15:00:36,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:00:36,379 INFO L276 IsEmpty]: Start isEmpty. Operand 62116 states and 194655 transitions. [2019-12-07 15:00:36,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 15:00:36,398 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:36,398 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:36,399 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:36,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:36,399 INFO L82 PathProgramCache]: Analyzing trace with hash 1921906081, now seen corresponding path program 1 times [2019-12-07 15:00:36,399 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:36,399 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [362024777] [2019-12-07 15:00:36,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:36,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:36,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:36,427 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [362024777] [2019-12-07 15:00:36,428 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:36,428 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:36,428 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [779451666] [2019-12-07 15:00:36,428 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:00:36,428 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:36,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:00:36,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:00:36,429 INFO L87 Difference]: Start difference. First operand 62116 states and 194655 transitions. Second operand 4 states. [2019-12-07 15:00:36,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:36,501 INFO L93 Difference]: Finished difference Result 27259 states and 80638 transitions. [2019-12-07 15:00:36,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:00:36,501 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 15:00:36,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:36,533 INFO L225 Difference]: With dead ends: 27259 [2019-12-07 15:00:36,533 INFO L226 Difference]: Without dead ends: 27259 [2019-12-07 15:00:36,533 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:00:36,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27259 states. [2019-12-07 15:00:36,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27259 to 25340. [2019-12-07 15:00:36,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25340 states. [2019-12-07 15:00:36,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25340 states to 25340 states and 75051 transitions. [2019-12-07 15:00:36,896 INFO L78 Accepts]: Start accepts. Automaton has 25340 states and 75051 transitions. Word has length 29 [2019-12-07 15:00:36,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:36,897 INFO L462 AbstractCegarLoop]: Abstraction has 25340 states and 75051 transitions. [2019-12-07 15:00:36,897 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:00:36,897 INFO L276 IsEmpty]: Start isEmpty. Operand 25340 states and 75051 transitions. [2019-12-07 15:00:36,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:00:36,913 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:36,913 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:36,913 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:36,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:36,913 INFO L82 PathProgramCache]: Analyzing trace with hash 1705939963, now seen corresponding path program 1 times [2019-12-07 15:00:36,913 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:36,914 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925488456] [2019-12-07 15:00:36,914 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:36,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:36,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:36,971 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1925488456] [2019-12-07 15:00:36,971 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:36,971 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:00:36,972 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1591167509] [2019-12-07 15:00:36,972 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:00:36,972 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:36,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:00:36,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:00:36,972 INFO L87 Difference]: Start difference. First operand 25340 states and 75051 transitions. Second operand 7 states. [2019-12-07 15:00:37,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:37,760 INFO L93 Difference]: Finished difference Result 48894 states and 143229 transitions. [2019-12-07 15:00:37,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:00:37,761 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 15:00:37,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:37,812 INFO L225 Difference]: With dead ends: 48894 [2019-12-07 15:00:37,812 INFO L226 Difference]: Without dead ends: 48894 [2019-12-07 15:00:37,812 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:00:37,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48894 states. [2019-12-07 15:00:38,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48894 to 27097. [2019-12-07 15:00:38,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27097 states. [2019-12-07 15:00:38,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27097 states to 27097 states and 80335 transitions. [2019-12-07 15:00:38,343 INFO L78 Accepts]: Start accepts. Automaton has 27097 states and 80335 transitions. Word has length 33 [2019-12-07 15:00:38,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:38,344 INFO L462 AbstractCegarLoop]: Abstraction has 27097 states and 80335 transitions. [2019-12-07 15:00:38,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:00:38,344 INFO L276 IsEmpty]: Start isEmpty. Operand 27097 states and 80335 transitions. [2019-12-07 15:00:38,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:00:38,360 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:38,361 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:38,361 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:38,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:38,361 INFO L82 PathProgramCache]: Analyzing trace with hash 1567643153, now seen corresponding path program 2 times [2019-12-07 15:00:38,361 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:38,361 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [755752701] [2019-12-07 15:00:38,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:38,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:38,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:38,428 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [755752701] [2019-12-07 15:00:38,428 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:38,428 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:00:38,428 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1895185162] [2019-12-07 15:00:38,428 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:00:38,429 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:38,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:00:38,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:00:38,429 INFO L87 Difference]: Start difference. First operand 27097 states and 80335 transitions. Second operand 8 states. [2019-12-07 15:00:39,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:39,416 INFO L93 Difference]: Finished difference Result 59558 states and 172804 transitions. [2019-12-07 15:00:39,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 15:00:39,416 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 15:00:39,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:39,485 INFO L225 Difference]: With dead ends: 59558 [2019-12-07 15:00:39,485 INFO L226 Difference]: Without dead ends: 59558 [2019-12-07 15:00:39,486 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:00:39,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59558 states. [2019-12-07 15:00:40,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59558 to 26677. [2019-12-07 15:00:40,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26677 states. [2019-12-07 15:00:40,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26677 states to 26677 states and 79067 transitions. [2019-12-07 15:00:40,145 INFO L78 Accepts]: Start accepts. Automaton has 26677 states and 79067 transitions. Word has length 33 [2019-12-07 15:00:40,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:40,145 INFO L462 AbstractCegarLoop]: Abstraction has 26677 states and 79067 transitions. [2019-12-07 15:00:40,145 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:00:40,145 INFO L276 IsEmpty]: Start isEmpty. Operand 26677 states and 79067 transitions. [2019-12-07 15:00:40,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 15:00:40,173 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:40,174 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:40,174 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:40,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:40,174 INFO L82 PathProgramCache]: Analyzing trace with hash -607763582, now seen corresponding path program 1 times [2019-12-07 15:00:40,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:40,174 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855723014] [2019-12-07 15:00:40,175 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:40,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:40,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:40,242 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [855723014] [2019-12-07 15:00:40,243 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:40,243 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:00:40,243 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1472147420] [2019-12-07 15:00:40,243 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:00:40,243 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:40,243 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:00:40,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:00:40,244 INFO L87 Difference]: Start difference. First operand 26677 states and 79067 transitions. Second operand 7 states. [2019-12-07 15:00:41,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:41,181 INFO L93 Difference]: Finished difference Result 46210 states and 134901 transitions. [2019-12-07 15:00:41,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:00:41,182 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 15:00:41,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:41,231 INFO L225 Difference]: With dead ends: 46210 [2019-12-07 15:00:41,231 INFO L226 Difference]: Without dead ends: 46210 [2019-12-07 15:00:41,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:00:41,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46210 states. [2019-12-07 15:00:41,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46210 to 26002. [2019-12-07 15:00:41,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26002 states. [2019-12-07 15:00:41,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26002 states to 26002 states and 77049 transitions. [2019-12-07 15:00:41,746 INFO L78 Accepts]: Start accepts. Automaton has 26002 states and 77049 transitions. Word has length 34 [2019-12-07 15:00:41,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:41,746 INFO L462 AbstractCegarLoop]: Abstraction has 26002 states and 77049 transitions. [2019-12-07 15:00:41,746 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:00:41,746 INFO L276 IsEmpty]: Start isEmpty. Operand 26002 states and 77049 transitions. [2019-12-07 15:00:41,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 15:00:41,763 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:41,763 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:41,763 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:41,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:41,763 INFO L82 PathProgramCache]: Analyzing trace with hash 846412022, now seen corresponding path program 2 times [2019-12-07 15:00:41,764 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:41,764 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [336883376] [2019-12-07 15:00:41,764 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:41,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:41,842 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:41,843 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [336883376] [2019-12-07 15:00:41,843 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:41,843 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:00:41,843 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1963419543] [2019-12-07 15:00:41,843 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:00:41,843 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:41,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:00:41,844 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:00:41,844 INFO L87 Difference]: Start difference. First operand 26002 states and 77049 transitions. Second operand 8 states. [2019-12-07 15:00:42,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:42,743 INFO L93 Difference]: Finished difference Result 59306 states and 171456 transitions. [2019-12-07 15:00:42,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 15:00:42,743 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 15:00:42,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:42,808 INFO L225 Difference]: With dead ends: 59306 [2019-12-07 15:00:42,808 INFO L226 Difference]: Without dead ends: 59306 [2019-12-07 15:00:42,809 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:00:42,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59306 states. [2019-12-07 15:00:43,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59306 to 25630. [2019-12-07 15:00:43,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25630 states. [2019-12-07 15:00:43,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25630 states to 25630 states and 75894 transitions. [2019-12-07 15:00:43,396 INFO L78 Accepts]: Start accepts. Automaton has 25630 states and 75894 transitions. Word has length 34 [2019-12-07 15:00:43,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:43,396 INFO L462 AbstractCegarLoop]: Abstraction has 25630 states and 75894 transitions. [2019-12-07 15:00:43,396 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:00:43,396 INFO L276 IsEmpty]: Start isEmpty. Operand 25630 states and 75894 transitions. [2019-12-07 15:00:43,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 15:00:43,412 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:43,412 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:43,412 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:43,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:43,412 INFO L82 PathProgramCache]: Analyzing trace with hash -211414604, now seen corresponding path program 3 times [2019-12-07 15:00:43,413 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:43,413 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1058109492] [2019-12-07 15:00:43,413 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:43,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:43,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:43,501 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1058109492] [2019-12-07 15:00:43,502 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:43,502 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 15:00:43,502 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1692491547] [2019-12-07 15:00:43,502 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 15:00:43,502 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:43,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 15:00:43,502 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:00:43,502 INFO L87 Difference]: Start difference. First operand 25630 states and 75894 transitions. Second operand 9 states. [2019-12-07 15:00:44,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:44,909 INFO L93 Difference]: Finished difference Result 50347 states and 146684 transitions. [2019-12-07 15:00:44,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 15:00:44,910 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2019-12-07 15:00:44,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:44,985 INFO L225 Difference]: With dead ends: 50347 [2019-12-07 15:00:44,985 INFO L226 Difference]: Without dead ends: 50347 [2019-12-07 15:00:44,986 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=129, Invalid=377, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:00:45,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50347 states. [2019-12-07 15:00:45,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50347 to 25312. [2019-12-07 15:00:45,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25312 states. [2019-12-07 15:00:45,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25312 states to 25312 states and 74972 transitions. [2019-12-07 15:00:45,518 INFO L78 Accepts]: Start accepts. Automaton has 25312 states and 74972 transitions. Word has length 34 [2019-12-07 15:00:45,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:45,518 INFO L462 AbstractCegarLoop]: Abstraction has 25312 states and 74972 transitions. [2019-12-07 15:00:45,518 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 15:00:45,518 INFO L276 IsEmpty]: Start isEmpty. Operand 25312 states and 74972 transitions. [2019-12-07 15:00:45,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 15:00:45,537 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:45,537 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:45,537 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:45,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:45,538 INFO L82 PathProgramCache]: Analyzing trace with hash -1053586821, now seen corresponding path program 1 times [2019-12-07 15:00:45,538 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:45,538 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1310959289] [2019-12-07 15:00:45,538 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:45,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:45,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:45,588 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1310959289] [2019-12-07 15:00:45,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:45,589 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:00:45,589 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786353150] [2019-12-07 15:00:45,589 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:00:45,589 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:45,590 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:00:45,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:00:45,590 INFO L87 Difference]: Start difference. First operand 25312 states and 74972 transitions. Second operand 6 states. [2019-12-07 15:00:46,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:46,154 INFO L93 Difference]: Finished difference Result 37218 states and 109312 transitions. [2019-12-07 15:00:46,154 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:00:46,154 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2019-12-07 15:00:46,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:46,194 INFO L225 Difference]: With dead ends: 37218 [2019-12-07 15:00:46,194 INFO L226 Difference]: Without dead ends: 37218 [2019-12-07 15:00:46,194 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:00:46,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37218 states. [2019-12-07 15:00:46,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37218 to 30600. [2019-12-07 15:00:46,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30600 states. [2019-12-07 15:00:46,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30600 states to 30600 states and 91022 transitions. [2019-12-07 15:00:46,668 INFO L78 Accepts]: Start accepts. Automaton has 30600 states and 91022 transitions. Word has length 39 [2019-12-07 15:00:46,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:46,668 INFO L462 AbstractCegarLoop]: Abstraction has 30600 states and 91022 transitions. [2019-12-07 15:00:46,668 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:00:46,668 INFO L276 IsEmpty]: Start isEmpty. Operand 30600 states and 91022 transitions. [2019-12-07 15:00:46,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 15:00:46,694 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:46,694 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:46,694 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:46,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:46,695 INFO L82 PathProgramCache]: Analyzing trace with hash -1317195275, now seen corresponding path program 2 times [2019-12-07 15:00:46,695 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:46,695 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912194753] [2019-12-07 15:00:46,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:46,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:46,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:46,755 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912194753] [2019-12-07 15:00:46,755 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:46,755 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 15:00:46,755 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [997456370] [2019-12-07 15:00:46,755 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:00:46,755 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:46,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:00:46,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:00:46,756 INFO L87 Difference]: Start difference. First operand 30600 states and 91022 transitions. Second operand 7 states. [2019-12-07 15:00:47,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:47,822 INFO L93 Difference]: Finished difference Result 42641 states and 124588 transitions. [2019-12-07 15:00:47,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 15:00:47,822 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2019-12-07 15:00:47,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:47,862 INFO L225 Difference]: With dead ends: 42641 [2019-12-07 15:00:47,862 INFO L226 Difference]: Without dead ends: 42641 [2019-12-07 15:00:47,863 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=64, Invalid=176, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:00:47,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42641 states. [2019-12-07 15:00:48,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42641 to 29031. [2019-12-07 15:00:48,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29031 states. [2019-12-07 15:00:48,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29031 states to 29031 states and 85639 transitions. [2019-12-07 15:00:48,349 INFO L78 Accepts]: Start accepts. Automaton has 29031 states and 85639 transitions. Word has length 39 [2019-12-07 15:00:48,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:48,350 INFO L462 AbstractCegarLoop]: Abstraction has 29031 states and 85639 transitions. [2019-12-07 15:00:48,350 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:00:48,350 INFO L276 IsEmpty]: Start isEmpty. Operand 29031 states and 85639 transitions. [2019-12-07 15:00:48,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:00:48,374 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:48,374 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:48,374 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:48,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:48,374 INFO L82 PathProgramCache]: Analyzing trace with hash -1523304982, now seen corresponding path program 1 times [2019-12-07 15:00:48,375 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:48,375 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757953834] [2019-12-07 15:00:48,375 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:48,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:48,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:48,437 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1757953834] [2019-12-07 15:00:48,437 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:48,437 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:48,438 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804713346] [2019-12-07 15:00:48,438 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:00:48,438 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:48,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:00:48,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:00:48,438 INFO L87 Difference]: Start difference. First operand 29031 states and 85639 transitions. Second operand 4 states. [2019-12-07 15:00:48,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:48,559 INFO L93 Difference]: Finished difference Result 50279 states and 148963 transitions. [2019-12-07 15:00:48,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:00:48,560 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 40 [2019-12-07 15:00:48,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:48,604 INFO L225 Difference]: With dead ends: 50279 [2019-12-07 15:00:48,604 INFO L226 Difference]: Without dead ends: 43372 [2019-12-07 15:00:48,604 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:00:48,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43372 states. [2019-12-07 15:00:49,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43372 to 41597. [2019-12-07 15:00:49,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41597 states. [2019-12-07 15:00:49,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41597 states to 41597 states and 122961 transitions. [2019-12-07 15:00:49,197 INFO L78 Accepts]: Start accepts. Automaton has 41597 states and 122961 transitions. Word has length 40 [2019-12-07 15:00:49,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:49,198 INFO L462 AbstractCegarLoop]: Abstraction has 41597 states and 122961 transitions. [2019-12-07 15:00:49,198 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:00:49,198 INFO L276 IsEmpty]: Start isEmpty. Operand 41597 states and 122961 transitions. [2019-12-07 15:00:49,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 15:00:49,233 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:49,233 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:49,233 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:49,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:49,233 INFO L82 PathProgramCache]: Analyzing trace with hash -1023563343, now seen corresponding path program 1 times [2019-12-07 15:00:49,233 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:49,233 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [81428046] [2019-12-07 15:00:49,233 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:49,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:49,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:49,271 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [81428046] [2019-12-07 15:00:49,271 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:49,271 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:00:49,271 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [421974018] [2019-12-07 15:00:49,271 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:00:49,271 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:49,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:00:49,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:00:49,272 INFO L87 Difference]: Start difference. First operand 41597 states and 122961 transitions. Second operand 5 states. [2019-12-07 15:00:49,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:49,375 INFO L93 Difference]: Finished difference Result 39351 states and 117910 transitions. [2019-12-07 15:00:49,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:00:49,375 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 15:00:49,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:49,417 INFO L225 Difference]: With dead ends: 39351 [2019-12-07 15:00:49,417 INFO L226 Difference]: Without dead ends: 38972 [2019-12-07 15:00:49,417 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:00:49,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38972 states. [2019-12-07 15:00:49,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38972 to 24575. [2019-12-07 15:00:49,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24575 states. [2019-12-07 15:00:49,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24575 states to 24575 states and 73910 transitions. [2019-12-07 15:00:49,830 INFO L78 Accepts]: Start accepts. Automaton has 24575 states and 73910 transitions. Word has length 41 [2019-12-07 15:00:49,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:49,830 INFO L462 AbstractCegarLoop]: Abstraction has 24575 states and 73910 transitions. [2019-12-07 15:00:49,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:00:49,830 INFO L276 IsEmpty]: Start isEmpty. Operand 24575 states and 73910 transitions. [2019-12-07 15:00:49,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 15:00:49,848 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:49,848 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:49,849 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:49,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:49,849 INFO L82 PathProgramCache]: Analyzing trace with hash -652511675, now seen corresponding path program 1 times [2019-12-07 15:00:49,849 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:49,849 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621763981] [2019-12-07 15:00:49,849 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:49,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:49,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:49,917 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621763981] [2019-12-07 15:00:49,917 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:49,917 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 15:00:49,917 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1200556083] [2019-12-07 15:00:49,917 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:00:49,917 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:49,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:00:49,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:00:49,918 INFO L87 Difference]: Start difference. First operand 24575 states and 73910 transitions. Second operand 7 states. [2019-12-07 15:00:50,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:50,861 INFO L93 Difference]: Finished difference Result 50199 states and 149587 transitions. [2019-12-07 15:00:50,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:00:50,861 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 15:00:50,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:50,921 INFO L225 Difference]: With dead ends: 50199 [2019-12-07 15:00:50,921 INFO L226 Difference]: Without dead ends: 50199 [2019-12-07 15:00:50,921 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=93, Invalid=249, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:00:51,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50199 states. [2019-12-07 15:00:51,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50199 to 25480. [2019-12-07 15:00:51,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25480 states. [2019-12-07 15:00:51,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25480 states to 25480 states and 76508 transitions. [2019-12-07 15:00:51,465 INFO L78 Accepts]: Start accepts. Automaton has 25480 states and 76508 transitions. Word has length 64 [2019-12-07 15:00:51,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:51,465 INFO L462 AbstractCegarLoop]: Abstraction has 25480 states and 76508 transitions. [2019-12-07 15:00:51,465 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:00:51,465 INFO L276 IsEmpty]: Start isEmpty. Operand 25480 states and 76508 transitions. [2019-12-07 15:00:51,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 15:00:51,489 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:51,489 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:51,489 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:51,489 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:51,490 INFO L82 PathProgramCache]: Analyzing trace with hash 1927651839, now seen corresponding path program 2 times [2019-12-07 15:00:51,490 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:51,490 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700173550] [2019-12-07 15:00:51,490 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:51,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:51,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:51,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1700173550] [2019-12-07 15:00:51,528 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:51,528 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:51,528 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1999627338] [2019-12-07 15:00:51,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:51,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:51,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:51,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:51,529 INFO L87 Difference]: Start difference. First operand 25480 states and 76508 transitions. Second operand 3 states. [2019-12-07 15:00:51,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:51,623 INFO L93 Difference]: Finished difference Result 31418 states and 94545 transitions. [2019-12-07 15:00:51,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:51,624 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 15:00:51,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:51,659 INFO L225 Difference]: With dead ends: 31418 [2019-12-07 15:00:51,659 INFO L226 Difference]: Without dead ends: 31418 [2019-12-07 15:00:51,659 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:51,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31418 states. [2019-12-07 15:00:52,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31418 to 25201. [2019-12-07 15:00:52,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25201 states. [2019-12-07 15:00:52,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25201 states to 25201 states and 76220 transitions. [2019-12-07 15:00:52,052 INFO L78 Accepts]: Start accepts. Automaton has 25201 states and 76220 transitions. Word has length 64 [2019-12-07 15:00:52,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:52,052 INFO L462 AbstractCegarLoop]: Abstraction has 25201 states and 76220 transitions. [2019-12-07 15:00:52,052 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:52,053 INFO L276 IsEmpty]: Start isEmpty. Operand 25201 states and 76220 transitions. [2019-12-07 15:00:52,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 15:00:52,077 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:52,077 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:52,077 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:52,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:52,077 INFO L82 PathProgramCache]: Analyzing trace with hash 744990568, now seen corresponding path program 1 times [2019-12-07 15:00:52,077 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:52,077 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508070906] [2019-12-07 15:00:52,077 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:52,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:52,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:52,106 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1508070906] [2019-12-07 15:00:52,106 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:52,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:52,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1025680337] [2019-12-07 15:00:52,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:52,107 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:52,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:52,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:52,107 INFO L87 Difference]: Start difference. First operand 25201 states and 76220 transitions. Second operand 3 states. [2019-12-07 15:00:52,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:52,260 INFO L93 Difference]: Finished difference Result 33887 states and 102685 transitions. [2019-12-07 15:00:52,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:52,260 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 15:00:52,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:52,298 INFO L225 Difference]: With dead ends: 33887 [2019-12-07 15:00:52,298 INFO L226 Difference]: Without dead ends: 33887 [2019-12-07 15:00:52,299 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:52,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33887 states. [2019-12-07 15:00:52,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33887 to 25664. [2019-12-07 15:00:52,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25664 states. [2019-12-07 15:00:52,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25664 states to 25664 states and 77792 transitions. [2019-12-07 15:00:52,706 INFO L78 Accepts]: Start accepts. Automaton has 25664 states and 77792 transitions. Word has length 65 [2019-12-07 15:00:52,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:52,706 INFO L462 AbstractCegarLoop]: Abstraction has 25664 states and 77792 transitions. [2019-12-07 15:00:52,706 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:52,706 INFO L276 IsEmpty]: Start isEmpty. Operand 25664 states and 77792 transitions. [2019-12-07 15:00:52,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 15:00:52,731 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:52,731 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:52,732 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:52,732 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:52,732 INFO L82 PathProgramCache]: Analyzing trace with hash 1048787710, now seen corresponding path program 1 times [2019-12-07 15:00:52,732 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:52,732 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2033229544] [2019-12-07 15:00:52,732 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:52,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:52,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:52,804 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2033229544] [2019-12-07 15:00:52,804 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:52,804 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 15:00:52,804 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [636450264] [2019-12-07 15:00:52,805 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:00:52,805 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:52,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:00:52,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:00:52,805 INFO L87 Difference]: Start difference. First operand 25664 states and 77792 transitions. Second operand 7 states. [2019-12-07 15:00:53,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:53,726 INFO L93 Difference]: Finished difference Result 46774 states and 138801 transitions. [2019-12-07 15:00:53,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:00:53,726 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 15:00:53,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:53,775 INFO L225 Difference]: With dead ends: 46774 [2019-12-07 15:00:53,775 INFO L226 Difference]: Without dead ends: 46774 [2019-12-07 15:00:53,775 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 13 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=93, Invalid=249, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:00:53,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46774 states. [2019-12-07 15:00:54,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46774 to 26878. [2019-12-07 15:00:54,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26878 states. [2019-12-07 15:00:54,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26878 states to 26878 states and 81146 transitions. [2019-12-07 15:00:54,309 INFO L78 Accepts]: Start accepts. Automaton has 26878 states and 81146 transitions. Word has length 65 [2019-12-07 15:00:54,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:54,309 INFO L462 AbstractCegarLoop]: Abstraction has 26878 states and 81146 transitions. [2019-12-07 15:00:54,309 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:00:54,309 INFO L276 IsEmpty]: Start isEmpty. Operand 26878 states and 81146 transitions. [2019-12-07 15:00:54,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 15:00:54,334 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:54,334 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:54,334 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:54,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:54,334 INFO L82 PathProgramCache]: Analyzing trace with hash 960640867, now seen corresponding path program 1 times [2019-12-07 15:00:54,334 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:54,335 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210867127] [2019-12-07 15:00:54,335 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:54,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:54,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:54,433 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210867127] [2019-12-07 15:00:54,433 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:54,433 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:00:54,434 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [981196930] [2019-12-07 15:00:54,434 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:00:54,434 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:54,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:00:54,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:00:54,434 INFO L87 Difference]: Start difference. First operand 26878 states and 81146 transitions. Second operand 8 states. [2019-12-07 15:00:55,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:55,485 INFO L93 Difference]: Finished difference Result 55406 states and 165313 transitions. [2019-12-07 15:00:55,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 15:00:55,485 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 65 [2019-12-07 15:00:55,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:55,551 INFO L225 Difference]: With dead ends: 55406 [2019-12-07 15:00:55,551 INFO L226 Difference]: Without dead ends: 55406 [2019-12-07 15:00:55,551 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=309, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:00:55,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55406 states. [2019-12-07 15:00:56,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55406 to 26899. [2019-12-07 15:00:56,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26899 states. [2019-12-07 15:00:56,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26899 states to 26899 states and 81206 transitions. [2019-12-07 15:00:56,151 INFO L78 Accepts]: Start accepts. Automaton has 26899 states and 81206 transitions. Word has length 65 [2019-12-07 15:00:56,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:56,151 INFO L462 AbstractCegarLoop]: Abstraction has 26899 states and 81206 transitions. [2019-12-07 15:00:56,151 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:00:56,151 INFO L276 IsEmpty]: Start isEmpty. Operand 26899 states and 81206 transitions. [2019-12-07 15:00:56,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 15:00:56,176 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:56,176 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:56,177 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:56,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:56,177 INFO L82 PathProgramCache]: Analyzing trace with hash -617736157, now seen corresponding path program 2 times [2019-12-07 15:00:56,177 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:56,177 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774323184] [2019-12-07 15:00:56,177 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:56,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:56,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:56,265 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [774323184] [2019-12-07 15:00:56,265 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:56,265 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:00:56,265 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [112536104] [2019-12-07 15:00:56,265 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 15:00:56,265 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:56,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 15:00:56,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:00:56,266 INFO L87 Difference]: Start difference. First operand 26899 states and 81206 transitions. Second operand 9 states. [2019-12-07 15:00:57,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:57,212 INFO L93 Difference]: Finished difference Result 45826 states and 136986 transitions. [2019-12-07 15:00:57,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 15:00:57,213 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 65 [2019-12-07 15:00:57,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:57,262 INFO L225 Difference]: With dead ends: 45826 [2019-12-07 15:00:57,262 INFO L226 Difference]: Without dead ends: 45826 [2019-12-07 15:00:57,262 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=129, Invalid=377, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:00:57,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45826 states. [2019-12-07 15:00:57,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45826 to 26878. [2019-12-07 15:00:57,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26878 states. [2019-12-07 15:00:57,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26878 states to 26878 states and 81146 transitions. [2019-12-07 15:00:57,805 INFO L78 Accepts]: Start accepts. Automaton has 26878 states and 81146 transitions. Word has length 65 [2019-12-07 15:00:57,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:57,805 INFO L462 AbstractCegarLoop]: Abstraction has 26878 states and 81146 transitions. [2019-12-07 15:00:57,805 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 15:00:57,805 INFO L276 IsEmpty]: Start isEmpty. Operand 26878 states and 81146 transitions. [2019-12-07 15:00:57,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 15:00:57,831 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:57,831 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:57,832 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:57,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:57,832 INFO L82 PathProgramCache]: Analyzing trace with hash 402071018, now seen corresponding path program 2 times [2019-12-07 15:00:57,832 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:57,832 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1764244363] [2019-12-07 15:00:57,832 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:57,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:57,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:57,869 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1764244363] [2019-12-07 15:00:57,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:57,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:57,870 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1170124105] [2019-12-07 15:00:57,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:00:57,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:57,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:00:57,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:00:57,870 INFO L87 Difference]: Start difference. First operand 26878 states and 81146 transitions. Second operand 4 states. [2019-12-07 15:00:57,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:57,976 INFO L93 Difference]: Finished difference Result 26433 states and 79573 transitions. [2019-12-07 15:00:57,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:00:57,976 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2019-12-07 15:00:57,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:58,005 INFO L225 Difference]: With dead ends: 26433 [2019-12-07 15:00:58,005 INFO L226 Difference]: Without dead ends: 26433 [2019-12-07 15:00:58,006 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:00:58,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26433 states. [2019-12-07 15:00:58,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26433 to 24423. [2019-12-07 15:00:58,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24423 states. [2019-12-07 15:00:58,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24423 states to 24423 states and 73021 transitions. [2019-12-07 15:00:58,336 INFO L78 Accepts]: Start accepts. Automaton has 24423 states and 73021 transitions. Word has length 65 [2019-12-07 15:00:58,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:58,336 INFO L462 AbstractCegarLoop]: Abstraction has 24423 states and 73021 transitions. [2019-12-07 15:00:58,336 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:00:58,336 INFO L276 IsEmpty]: Start isEmpty. Operand 24423 states and 73021 transitions. [2019-12-07 15:00:58,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 15:00:58,354 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:58,354 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:58,354 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:58,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:58,355 INFO L82 PathProgramCache]: Analyzing trace with hash -1989045559, now seen corresponding path program 3 times [2019-12-07 15:00:58,355 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:58,355 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1439784697] [2019-12-07 15:00:58,355 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:58,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:58,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:58,391 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1439784697] [2019-12-07 15:00:58,391 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:58,391 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:58,391 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1884383126] [2019-12-07 15:00:58,391 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:58,391 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:58,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:58,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:58,392 INFO L87 Difference]: Start difference. First operand 24423 states and 73021 transitions. Second operand 3 states. [2019-12-07 15:00:58,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:58,441 INFO L93 Difference]: Finished difference Result 24423 states and 73020 transitions. [2019-12-07 15:00:58,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:58,442 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 15:00:58,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:58,465 INFO L225 Difference]: With dead ends: 24423 [2019-12-07 15:00:58,465 INFO L226 Difference]: Without dead ends: 24423 [2019-12-07 15:00:58,466 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:58,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24423 states. [2019-12-07 15:00:58,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24423 to 16699. [2019-12-07 15:00:58,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16699 states. [2019-12-07 15:00:58,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16699 states to 16699 states and 50706 transitions. [2019-12-07 15:00:58,751 INFO L78 Accepts]: Start accepts. Automaton has 16699 states and 50706 transitions. Word has length 65 [2019-12-07 15:00:58,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:58,751 INFO L462 AbstractCegarLoop]: Abstraction has 16699 states and 50706 transitions. [2019-12-07 15:00:58,751 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:58,751 INFO L276 IsEmpty]: Start isEmpty. Operand 16699 states and 50706 transitions. [2019-12-07 15:00:58,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:00:58,765 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:58,765 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:58,765 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:58,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:58,765 INFO L82 PathProgramCache]: Analyzing trace with hash 1587954198, now seen corresponding path program 1 times [2019-12-07 15:00:58,765 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:58,765 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991702176] [2019-12-07 15:00:58,766 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:58,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:58,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:58,888 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991702176] [2019-12-07 15:00:58,888 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:58,888 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:00:58,888 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1665441881] [2019-12-07 15:00:58,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:00:58,888 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:58,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:00:58,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:00:58,888 INFO L87 Difference]: Start difference. First operand 16699 states and 50706 transitions. Second operand 10 states. [2019-12-07 15:01:00,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:01:00,036 INFO L93 Difference]: Finished difference Result 28692 states and 86298 transitions. [2019-12-07 15:01:00,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 15:01:00,037 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 15:01:00,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:01:00,067 INFO L225 Difference]: With dead ends: 28692 [2019-12-07 15:01:00,067 INFO L226 Difference]: Without dead ends: 28692 [2019-12-07 15:01:00,068 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=159, Invalid=543, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:01:00,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28692 states. [2019-12-07 15:01:00,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28692 to 16703. [2019-12-07 15:01:00,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16703 states. [2019-12-07 15:01:00,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16703 states to 16703 states and 50766 transitions. [2019-12-07 15:01:00,389 INFO L78 Accepts]: Start accepts. Automaton has 16703 states and 50766 transitions. Word has length 66 [2019-12-07 15:01:00,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:01:00,389 INFO L462 AbstractCegarLoop]: Abstraction has 16703 states and 50766 transitions. [2019-12-07 15:01:00,389 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:01:00,389 INFO L276 IsEmpty]: Start isEmpty. Operand 16703 states and 50766 transitions. [2019-12-07 15:01:00,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:01:00,402 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:01:00,403 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:01:00,403 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:01:00,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:01:00,403 INFO L82 PathProgramCache]: Analyzing trace with hash -457754788, now seen corresponding path program 2 times [2019-12-07 15:01:00,403 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:01:00,403 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [793773190] [2019-12-07 15:01:00,403 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:01:00,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:01:00,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:01:00,435 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [793773190] [2019-12-07 15:01:00,435 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:01:00,436 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:01:00,436 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [185230679] [2019-12-07 15:01:00,436 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:01:00,436 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:01:00,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:01:00,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:01:00,436 INFO L87 Difference]: Start difference. First operand 16703 states and 50766 transitions. Second operand 3 states. [2019-12-07 15:01:00,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:01:00,474 INFO L93 Difference]: Finished difference Result 15515 states and 46362 transitions. [2019-12-07 15:01:00,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:01:00,474 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:01:00,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:01:00,490 INFO L225 Difference]: With dead ends: 15515 [2019-12-07 15:01:00,490 INFO L226 Difference]: Without dead ends: 15515 [2019-12-07 15:01:00,490 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:01:00,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15515 states. [2019-12-07 15:01:00,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15515 to 14942. [2019-12-07 15:01:00,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14942 states. [2019-12-07 15:01:00,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14942 states to 14942 states and 44726 transitions. [2019-12-07 15:01:00,692 INFO L78 Accepts]: Start accepts. Automaton has 14942 states and 44726 transitions. Word has length 66 [2019-12-07 15:01:00,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:01:00,692 INFO L462 AbstractCegarLoop]: Abstraction has 14942 states and 44726 transitions. [2019-12-07 15:01:00,692 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:01:00,692 INFO L276 IsEmpty]: Start isEmpty. Operand 14942 states and 44726 transitions. [2019-12-07 15:01:00,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:01:00,704 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:01:00,704 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:01:00,704 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:01:00,704 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:01:00,704 INFO L82 PathProgramCache]: Analyzing trace with hash 1398756383, now seen corresponding path program 1 times [2019-12-07 15:01:00,704 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:01:00,704 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [437400466] [2019-12-07 15:01:00,704 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:01:00,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:01:00,798 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:01:00,798 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [437400466] [2019-12-07 15:01:00,799 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:01:00,799 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:01:00,799 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1833767826] [2019-12-07 15:01:00,799 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 15:01:00,799 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:01:00,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 15:01:00,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:01:00,799 INFO L87 Difference]: Start difference. First operand 14942 states and 44726 transitions. Second operand 9 states. [2019-12-07 15:01:02,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:01:02,144 INFO L93 Difference]: Finished difference Result 113070 states and 336562 transitions. [2019-12-07 15:01:02,145 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 15:01:02,145 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 15:01:02,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:01:02,282 INFO L225 Difference]: With dead ends: 113070 [2019-12-07 15:01:02,282 INFO L226 Difference]: Without dead ends: 108056 [2019-12-07 15:01:02,283 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 556 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=369, Invalid=1353, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 15:01:02,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108056 states. [2019-12-07 15:01:03,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108056 to 16290. [2019-12-07 15:01:03,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16290 states. [2019-12-07 15:01:03,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16290 states to 16290 states and 49049 transitions. [2019-12-07 15:01:03,124 INFO L78 Accepts]: Start accepts. Automaton has 16290 states and 49049 transitions. Word has length 67 [2019-12-07 15:01:03,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:01:03,125 INFO L462 AbstractCegarLoop]: Abstraction has 16290 states and 49049 transitions. [2019-12-07 15:01:03,125 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 15:01:03,125 INFO L276 IsEmpty]: Start isEmpty. Operand 16290 states and 49049 transitions. [2019-12-07 15:01:03,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:01:03,139 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:01:03,139 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:01:03,139 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:01:03,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:01:03,139 INFO L82 PathProgramCache]: Analyzing trace with hash 579351643, now seen corresponding path program 2 times [2019-12-07 15:01:03,139 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:01:03,139 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361432846] [2019-12-07 15:01:03,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:01:03,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:01:03,231 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:01:03,231 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361432846] [2019-12-07 15:01:03,231 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:01:03,231 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:01:03,231 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [90430151] [2019-12-07 15:01:03,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 15:01:03,231 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:01:03,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 15:01:03,232 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:01:03,232 INFO L87 Difference]: Start difference. First operand 16290 states and 49049 transitions. Second operand 9 states. [2019-12-07 15:01:04,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:01:04,754 INFO L93 Difference]: Finished difference Result 119197 states and 352428 transitions. [2019-12-07 15:01:04,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 15:01:04,755 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 15:01:04,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:01:04,851 INFO L225 Difference]: With dead ends: 119197 [2019-12-07 15:01:04,851 INFO L226 Difference]: Without dead ends: 83520 [2019-12-07 15:01:04,852 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 639 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=421, Invalid=1559, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 15:01:05,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83520 states. [2019-12-07 15:01:05,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83520 to 18283. [2019-12-07 15:01:05,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18283 states. [2019-12-07 15:01:05,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18283 states to 18283 states and 54999 transitions. [2019-12-07 15:01:05,523 INFO L78 Accepts]: Start accepts. Automaton has 18283 states and 54999 transitions. Word has length 67 [2019-12-07 15:01:05,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:01:05,523 INFO L462 AbstractCegarLoop]: Abstraction has 18283 states and 54999 transitions. [2019-12-07 15:01:05,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 15:01:05,523 INFO L276 IsEmpty]: Start isEmpty. Operand 18283 states and 54999 transitions. [2019-12-07 15:01:05,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:01:05,538 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:01:05,538 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:01:05,539 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:01:05,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:01:05,539 INFO L82 PathProgramCache]: Analyzing trace with hash 1790496915, now seen corresponding path program 3 times [2019-12-07 15:01:05,539 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:01:05,539 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801380296] [2019-12-07 15:01:05,539 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:01:05,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:01:05,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:01:05,624 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:01:05,625 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:01:05,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_93| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1123~0.base_55| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1123~0.base_55|) |v_ULTIMATE.start_main_~#t1123~0.offset_34| 0)) |v_#memory_int_21|) (= 0 v_~a$read_delayed_var~0.base_8) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1123~0.base_55|) (= v_~a$r_buff1_thd3~0_279 0) (= v_~a$flush_delayed~0_36 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$mem_tmp~0_25 0) (= v_~a$r_buff0_thd3~0_364 0) (= v_~__unbuffered_p2_EBX~0_67 0) (= v_~y~0_75 0) (= v_~a~0_169 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard1~0_56 0) (= 0 v_~a$w_buff1~0_224) (= 0 |v_ULTIMATE.start_main_~#t1123~0.offset_34|) (= 0 v_~__unbuffered_cnt~0_98) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1123~0.base_55|)) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 v_~weak$$choice0~0_21) (= 0 |v_#NULL.base_4|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1123~0.base_55| 4)) (= 0 v_~a$w_buff1_used~0_506) (= |v_#valid_91| (store .cse0 |v_ULTIMATE.start_main_~#t1123~0.base_55| 1)) (= 0 v_~__unbuffered_p2_EAX~0_61) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= 0 v_~__unbuffered_p0_EAX~0_116) (= v_~z~0_20 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~x~0_91 0) (= v_~weak$$choice2~0_114 0) (= v_~a$r_buff1_thd0~0_166 0) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_93|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ULTIMATE.start_main_~#t1124~0.offset=|v_ULTIMATE.start_main_~#t1124~0.offset_19|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_169, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_105|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_116, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_61, ULTIMATE.start_main_~#t1124~0.base=|v_ULTIMATE.start_main_~#t1124~0.base_41|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_67, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ULTIMATE.start_main_~#t1123~0.base=|v_ULTIMATE.start_main_~#t1123~0.base_55|, ~weak$$choice0~0=v_~weak$$choice0~0_21, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_166, ULTIMATE.start_main_~#t1125~0.offset=|v_ULTIMATE.start_main_~#t1125~0.offset_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_91, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_56, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_25, ULTIMATE.start_main_~#t1123~0.offset=|v_ULTIMATE.start_main_~#t1123~0.offset_34|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_75, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ULTIMATE.start_main_~#t1125~0.base=|v_ULTIMATE.start_main_~#t1125~0.base_28|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_36, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_37|, #valid=|v_#valid_91|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t1124~0.offset, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1124~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t1123~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t1125~0.offset, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_~#t1123~0.offset, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t1125~0.base, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:01:05,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~a$r_buff1_thd3~0_Out-253199013 ~a$r_buff0_thd3~0_In-253199013) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-253199013 0)) (= 1 ~a$r_buff0_thd1~0_Out-253199013) (= ~a$r_buff0_thd0~0_In-253199013 ~a$r_buff1_thd0~0_Out-253199013) (= ~a$r_buff0_thd1~0_In-253199013 ~a$r_buff1_thd1~0_Out-253199013) (= ~a$r_buff1_thd2~0_Out-253199013 ~a$r_buff0_thd2~0_In-253199013) (= ~x~0_In-253199013 ~__unbuffered_p0_EAX~0_Out-253199013)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-253199013, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-253199013, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-253199013, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-253199013, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-253199013, ~x~0=~x~0_In-253199013} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-253199013, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-253199013, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-253199013, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-253199013, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-253199013, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-253199013, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-253199013, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-253199013, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-253199013, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-253199013, ~x~0=~x~0_In-253199013} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:01:05,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1124~0.base_9| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1124~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1124~0.base_9|) |v_ULTIMATE.start_main_~#t1124~0.offset_7| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1124~0.base_9|)) (= 0 |v_ULTIMATE.start_main_~#t1124~0.offset_7|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1124~0.base_9| 4)) (not (= |v_ULTIMATE.start_main_~#t1124~0.base_9| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1124~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1124~0.offset=|v_ULTIMATE.start_main_~#t1124~0.offset_7|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1124~0.base=|v_ULTIMATE.start_main_~#t1124~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1124~0.offset, #length, ULTIMATE.start_main_~#t1124~0.base] because there is no mapped edge [2019-12-07 15:01:05,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1125~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1125~0.base_9|) |v_ULTIMATE.start_main_~#t1125~0.offset_8| 2))) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1125~0.base_9| 4)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1125~0.base_9| 1)) (not (= |v_ULTIMATE.start_main_~#t1125~0.base_9| 0)) (= |v_ULTIMATE.start_main_~#t1125~0.offset_8| 0) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1125~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1125~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1125~0.base=|v_ULTIMATE.start_main_~#t1125~0.base_9|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1125~0.offset=|v_ULTIMATE.start_main_~#t1125~0.offset_8|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1125~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1125~0.offset, #length] because there is no mapped edge [2019-12-07 15:01:05,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-1344652306 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In-1344652306 256) 0)) (.cse0 (= |P1Thread1of1ForFork2_#t~ite10_Out-1344652306| |P1Thread1of1ForFork2_#t~ite9_Out-1344652306|))) (or (and (= ~a$w_buff1~0_In-1344652306 |P1Thread1of1ForFork2_#t~ite9_Out-1344652306|) .cse0 (not .cse1) (not .cse2)) (and (= ~a~0_In-1344652306 |P1Thread1of1ForFork2_#t~ite9_Out-1344652306|) (or .cse1 .cse2) .cse0))) InVars {~a~0=~a~0_In-1344652306, ~a$w_buff1~0=~a$w_buff1~0_In-1344652306, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1344652306, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1344652306} OutVars{~a~0=~a~0_In-1344652306, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1344652306|, ~a$w_buff1~0=~a$w_buff1~0_In-1344652306, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1344652306, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-1344652306|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1344652306} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:01:05,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In878161127 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In878161127 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out878161127| 0)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out878161127| ~a$w_buff0_used~0_In878161127) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In878161127, ~a$w_buff0_used~0=~a$w_buff0_used~0_In878161127} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In878161127, ~a$w_buff0_used~0=~a$w_buff0_used~0_In878161127, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out878161127|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:01:05,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In465363218 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In465363218 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In465363218 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In465363218 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In465363218 |P1Thread1of1ForFork2_#t~ite12_Out465363218|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out465363218|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In465363218, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In465363218, ~a$w_buff0_used~0=~a$w_buff0_used~0_In465363218, ~a$w_buff1_used~0=~a$w_buff1_used~0_In465363218} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In465363218, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In465363218, ~a$w_buff0_used~0=~a$w_buff0_used~0_In465363218, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out465363218|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In465363218} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:01:05,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-403900020 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out-403900020| |P2Thread1of1ForFork0_#t~ite21_Out-403900020|) .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out-403900020| ~a$w_buff0~0_In-403900020) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-403900020 256)))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In-403900020 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-403900020 256) 0) (and (= 0 (mod ~a$w_buff1_used~0_In-403900020 256)) .cse1)))) (and (= |P2Thread1of1ForFork0_#t~ite20_In-403900020| |P2Thread1of1ForFork0_#t~ite20_Out-403900020|) (= |P2Thread1of1ForFork0_#t~ite21_Out-403900020| ~a$w_buff0~0_In-403900020) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-403900020, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-403900020, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-403900020, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-403900020, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-403900020, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-403900020|, ~weak$$choice2~0=~weak$$choice2~0_In-403900020} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-403900020|, ~a$w_buff0~0=~a$w_buff0~0_In-403900020, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-403900020, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-403900020, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-403900020, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-403900020|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-403900020, ~weak$$choice2~0=~weak$$choice2~0_In-403900020} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:01:05,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd2~0_In-797291343 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-797291343 256) 0))) (or (and (= ~a$r_buff0_thd2~0_In-797291343 |P1Thread1of1ForFork2_#t~ite13_Out-797291343|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-797291343|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-797291343, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-797291343} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-797291343, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-797291343, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-797291343|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:01:05,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= (mod ~a$w_buff1_used~0_In2066610572 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In2066610572 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In2066610572 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In2066610572 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite14_Out2066610572| ~a$r_buff1_thd2~0_In2066610572) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out2066610572| 0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2066610572, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2066610572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2066610572, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2066610572} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2066610572, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2066610572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2066610572, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2066610572, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out2066610572|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:01:05,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:01:05,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-395301839 256) 0))) (or (and (= ~a$w_buff1~0_In-395301839 |P2Thread1of1ForFork0_#t~ite24_Out-395301839|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In-395301839| |P2Thread1of1ForFork0_#t~ite23_Out-395301839|)) (and (= ~a$w_buff1~0_In-395301839 |P2Thread1of1ForFork0_#t~ite23_Out-395301839|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-395301839 256)))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In-395301839 256)) .cse1) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-395301839 256))) (= (mod ~a$w_buff0_used~0_In-395301839 256) 0))) .cse0 (= |P2Thread1of1ForFork0_#t~ite24_Out-395301839| |P2Thread1of1ForFork0_#t~ite23_Out-395301839|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-395301839, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-395301839|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-395301839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-395301839, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-395301839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-395301839, ~weak$$choice2~0=~weak$$choice2~0_In-395301839} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-395301839, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-395301839|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-395301839|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-395301839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-395301839, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-395301839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-395301839, ~weak$$choice2~0=~weak$$choice2~0_In-395301839} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 15:01:05,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1588612407 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite27_Out-1588612407| |P2Thread1of1ForFork0_#t~ite26_Out-1588612407|) (= ~a$w_buff0_used~0_In-1588612407 |P2Thread1of1ForFork0_#t~ite26_Out-1588612407|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1588612407 256)))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1588612407 256))) (and .cse1 (= (mod ~a$w_buff1_used~0_In-1588612407 256) 0)) (= (mod ~a$w_buff0_used~0_In-1588612407 256) 0)))) (and (= ~a$w_buff0_used~0_In-1588612407 |P2Thread1of1ForFork0_#t~ite27_Out-1588612407|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-1588612407| |P2Thread1of1ForFork0_#t~ite26_Out-1588612407|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1588612407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1588612407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1588612407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1588612407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1588612407, ~weak$$choice2~0=~weak$$choice2~0_In-1588612407} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1588612407|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1588612407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1588612407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1588612407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1588612407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1588612407, ~weak$$choice2~0=~weak$$choice2~0_In-1588612407} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:01:05,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:01:05,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 15:01:05,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1617963135 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1617963135 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1617963135| ~a~0_In-1617963135)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1617963135| ~a$w_buff1~0_In-1617963135)))) InVars {~a~0=~a~0_In-1617963135, ~a$w_buff1~0=~a$w_buff1~0_In-1617963135, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1617963135, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1617963135} OutVars{~a~0=~a~0_In-1617963135, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1617963135|, ~a$w_buff1~0=~a$w_buff1~0_In-1617963135, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1617963135, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1617963135} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:01:05,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:01:05,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-246507355 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-246507355 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-246507355| ~a$w_buff0_used~0_In-246507355)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-246507355| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-246507355, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-246507355} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-246507355|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-246507355, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-246507355} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:01:05,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In664576017 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In664576017 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out664576017| 0)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out664576017| ~a$w_buff0_used~0_In664576017) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In664576017, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In664576017} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out664576017|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In664576017, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In664576017} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:01:05,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In892162267 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd1~0_In892162267 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In892162267 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In892162267 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out892162267|)) (and (= ~a$w_buff1_used~0_In892162267 |P0Thread1of1ForFork1_#t~ite6_Out892162267|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In892162267, ~a$w_buff0_used~0=~a$w_buff0_used~0_In892162267, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In892162267, ~a$w_buff1_used~0=~a$w_buff1_used~0_In892162267} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out892162267|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In892162267, ~a$w_buff0_used~0=~a$w_buff0_used~0_In892162267, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In892162267, ~a$w_buff1_used~0=~a$w_buff1_used~0_In892162267} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:01:05,637 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1180315853 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1180315853 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_Out1180315853 ~a$r_buff0_thd1~0_In1180315853))) (or (and .cse0 .cse1) (and (not .cse0) (= ~a$r_buff0_thd1~0_Out1180315853 0) (not .cse2)) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1180315853, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1180315853} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1180315853|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1180315853, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1180315853} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:01:05,637 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd1~0_In1506096029 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1506096029 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1506096029 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In1506096029 256)))) (or (and (= ~a$r_buff1_thd1~0_In1506096029 |P0Thread1of1ForFork1_#t~ite8_Out1506096029|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1506096029|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1506096029, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1506096029, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1506096029, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1506096029} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1506096029|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1506096029, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1506096029, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1506096029, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1506096029} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:01:05,637 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:01:05,637 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In1273074350 256))) (.cse3 (= (mod ~a$r_buff1_thd3~0_In1273074350 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1273074350 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1273074350 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1273074350|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In1273074350 |P2Thread1of1ForFork0_#t~ite41_Out1273074350|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1273074350, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1273074350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1273074350, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1273074350} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1273074350, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1273074350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1273074350, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1273074350, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1273074350|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:01:05,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1205151473 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1205151473 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1205151473|) (not .cse1)) (and (or .cse0 .cse1) (= ~a$r_buff0_thd3~0_In1205151473 |P2Thread1of1ForFork0_#t~ite42_Out1205151473|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1205151473, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1205151473} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1205151473, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1205151473, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1205151473|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:01:05,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In462570625 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In462570625 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In462570625 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In462570625 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out462570625|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~a$r_buff1_thd3~0_In462570625 |P2Thread1of1ForFork0_#t~ite43_Out462570625|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In462570625, ~a$w_buff0_used~0=~a$w_buff0_used~0_In462570625, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In462570625, ~a$w_buff1_used~0=~a$w_buff1_used~0_In462570625} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out462570625|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In462570625, ~a$w_buff0_used~0=~a$w_buff0_used~0_In462570625, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In462570625, ~a$w_buff1_used~0=~a$w_buff1_used~0_In462570625} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:01:05,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:01:05,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:01:05,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In6450241 256))) (.cse1 (= (mod ~a$r_buff1_thd0~0_In6450241 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out6450241| |ULTIMATE.start_main_#t~ite48_Out6450241|))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In6450241 |ULTIMATE.start_main_#t~ite47_Out6450241|) .cse2) (and (or .cse0 .cse1) (= ~a~0_In6450241 |ULTIMATE.start_main_#t~ite47_Out6450241|) .cse2))) InVars {~a~0=~a~0_In6450241, ~a$w_buff1~0=~a$w_buff1~0_In6450241, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In6450241, ~a$w_buff1_used~0=~a$w_buff1_used~0_In6450241} OutVars{~a~0=~a~0_In6450241, ~a$w_buff1~0=~a$w_buff1~0_In6450241, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out6450241|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In6450241, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out6450241|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In6450241} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:01:05,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In369803856 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In369803856 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out369803856|)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out369803856| ~a$w_buff0_used~0_In369803856)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In369803856, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In369803856} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In369803856, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out369803856|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In369803856} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:01:05,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse3 (= (mod ~a$r_buff0_thd0~0_In-156830557 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-156830557 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-156830557 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-156830557 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite50_Out-156830557| ~a$w_buff1_used~0_In-156830557)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite50_Out-156830557| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-156830557, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-156830557, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-156830557, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-156830557} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-156830557|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-156830557, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-156830557, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-156830557, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-156830557} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:01:05,640 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In-1595864320 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1595864320 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1595864320| 0)) (and (= |ULTIMATE.start_main_#t~ite51_Out-1595864320| ~a$r_buff0_thd0~0_In-1595864320) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1595864320, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1595864320} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1595864320|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1595864320, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1595864320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:01:05,640 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-988858907 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-988858907 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-988858907 256))) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-988858907 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-988858907| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite52_Out-988858907| ~a$r_buff1_thd0~0_In-988858907) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-988858907, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-988858907, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-988858907, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-988858907} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-988858907|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-988858907, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-988858907, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-988858907, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-988858907} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:01:05,640 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~main$tmp_guard1~0_19 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_66) (= v_~__unbuffered_p2_EBX~0_30 0) (= v_~y~0_31 2) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:01:05,692 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:01:05 BasicIcfg [2019-12-07 15:01:05,692 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:01:05,692 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:01:05,692 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:01:05,692 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:01:05,693 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:59:52" (3/4) ... [2019-12-07 15:01:05,694 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:01:05,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_93| 0 0))) (and (= v_~main$tmp_guard0~0_31 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1123~0.base_55| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1123~0.base_55|) |v_ULTIMATE.start_main_~#t1123~0.offset_34| 0)) |v_#memory_int_21|) (= 0 v_~a$read_delayed_var~0.base_8) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1123~0.base_55|) (= v_~a$r_buff1_thd3~0_279 0) (= v_~a$flush_delayed~0_36 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$mem_tmp~0_25 0) (= v_~a$r_buff0_thd3~0_364 0) (= v_~__unbuffered_p2_EBX~0_67 0) (= v_~y~0_75 0) (= v_~a~0_169 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard1~0_56 0) (= 0 v_~a$w_buff1~0_224) (= 0 |v_ULTIMATE.start_main_~#t1123~0.offset_34|) (= 0 v_~__unbuffered_cnt~0_98) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1123~0.base_55|)) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 v_~weak$$choice0~0_21) (= 0 |v_#NULL.base_4|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1123~0.base_55| 4)) (= 0 v_~a$w_buff1_used~0_506) (= |v_#valid_91| (store .cse0 |v_ULTIMATE.start_main_~#t1123~0.base_55| 1)) (= 0 v_~__unbuffered_p2_EAX~0_61) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= 0 v_~__unbuffered_p0_EAX~0_116) (= v_~z~0_20 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~x~0_91 0) (= v_~weak$$choice2~0_114 0) (= v_~a$r_buff1_thd0~0_166 0) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_93|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ULTIMATE.start_main_~#t1124~0.offset=|v_ULTIMATE.start_main_~#t1124~0.offset_19|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_169, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_105|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_116, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_61, ULTIMATE.start_main_~#t1124~0.base=|v_ULTIMATE.start_main_~#t1124~0.base_41|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_67, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ULTIMATE.start_main_~#t1123~0.base=|v_ULTIMATE.start_main_~#t1123~0.base_55|, ~weak$$choice0~0=v_~weak$$choice0~0_21, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_166, ULTIMATE.start_main_~#t1125~0.offset=|v_ULTIMATE.start_main_~#t1125~0.offset_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_91, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_56, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_25, ULTIMATE.start_main_~#t1123~0.offset=|v_ULTIMATE.start_main_~#t1123~0.offset_34|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_75, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ULTIMATE.start_main_~#t1125~0.base=|v_ULTIMATE.start_main_~#t1125~0.base_28|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_36, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_37|, #valid=|v_#valid_91|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_114, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t1124~0.offset, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1124~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t1123~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t1125~0.offset, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_~#t1123~0.offset, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t1125~0.base, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:01:05,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~a$r_buff1_thd3~0_Out-253199013 ~a$r_buff0_thd3~0_In-253199013) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-253199013 0)) (= 1 ~a$r_buff0_thd1~0_Out-253199013) (= ~a$r_buff0_thd0~0_In-253199013 ~a$r_buff1_thd0~0_Out-253199013) (= ~a$r_buff0_thd1~0_In-253199013 ~a$r_buff1_thd1~0_Out-253199013) (= ~a$r_buff1_thd2~0_Out-253199013 ~a$r_buff0_thd2~0_In-253199013) (= ~x~0_In-253199013 ~__unbuffered_p0_EAX~0_Out-253199013)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-253199013, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-253199013, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-253199013, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-253199013, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-253199013, ~x~0=~x~0_In-253199013} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-253199013, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-253199013, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-253199013, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-253199013, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-253199013, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-253199013, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-253199013, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-253199013, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-253199013, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-253199013, ~x~0=~x~0_In-253199013} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:01:05,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1124~0.base_9| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1124~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1124~0.base_9|) |v_ULTIMATE.start_main_~#t1124~0.offset_7| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1124~0.base_9|)) (= 0 |v_ULTIMATE.start_main_~#t1124~0.offset_7|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1124~0.base_9| 4)) (not (= |v_ULTIMATE.start_main_~#t1124~0.base_9| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1124~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1124~0.offset=|v_ULTIMATE.start_main_~#t1124~0.offset_7|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1124~0.base=|v_ULTIMATE.start_main_~#t1124~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1124~0.offset, #length, ULTIMATE.start_main_~#t1124~0.base] because there is no mapped edge [2019-12-07 15:01:05,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1125~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1125~0.base_9|) |v_ULTIMATE.start_main_~#t1125~0.offset_8| 2))) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1125~0.base_9| 4)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1125~0.base_9| 1)) (not (= |v_ULTIMATE.start_main_~#t1125~0.base_9| 0)) (= |v_ULTIMATE.start_main_~#t1125~0.offset_8| 0) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1125~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1125~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1125~0.base=|v_ULTIMATE.start_main_~#t1125~0.base_9|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1125~0.offset=|v_ULTIMATE.start_main_~#t1125~0.offset_8|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1125~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1125~0.offset, #length] because there is no mapped edge [2019-12-07 15:01:05,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-1344652306 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In-1344652306 256) 0)) (.cse0 (= |P1Thread1of1ForFork2_#t~ite10_Out-1344652306| |P1Thread1of1ForFork2_#t~ite9_Out-1344652306|))) (or (and (= ~a$w_buff1~0_In-1344652306 |P1Thread1of1ForFork2_#t~ite9_Out-1344652306|) .cse0 (not .cse1) (not .cse2)) (and (= ~a~0_In-1344652306 |P1Thread1of1ForFork2_#t~ite9_Out-1344652306|) (or .cse1 .cse2) .cse0))) InVars {~a~0=~a~0_In-1344652306, ~a$w_buff1~0=~a$w_buff1~0_In-1344652306, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1344652306, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1344652306} OutVars{~a~0=~a~0_In-1344652306, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1344652306|, ~a$w_buff1~0=~a$w_buff1~0_In-1344652306, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1344652306, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-1344652306|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1344652306} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:01:05,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In878161127 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In878161127 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out878161127| 0)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out878161127| ~a$w_buff0_used~0_In878161127) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In878161127, ~a$w_buff0_used~0=~a$w_buff0_used~0_In878161127} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In878161127, ~a$w_buff0_used~0=~a$w_buff0_used~0_In878161127, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out878161127|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:01:05,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In465363218 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In465363218 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In465363218 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In465363218 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In465363218 |P1Thread1of1ForFork2_#t~ite12_Out465363218|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out465363218|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In465363218, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In465363218, ~a$w_buff0_used~0=~a$w_buff0_used~0_In465363218, ~a$w_buff1_used~0=~a$w_buff1_used~0_In465363218} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In465363218, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In465363218, ~a$w_buff0_used~0=~a$w_buff0_used~0_In465363218, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out465363218|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In465363218} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:01:05,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-403900020 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out-403900020| |P2Thread1of1ForFork0_#t~ite21_Out-403900020|) .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out-403900020| ~a$w_buff0~0_In-403900020) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-403900020 256)))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In-403900020 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-403900020 256) 0) (and (= 0 (mod ~a$w_buff1_used~0_In-403900020 256)) .cse1)))) (and (= |P2Thread1of1ForFork0_#t~ite20_In-403900020| |P2Thread1of1ForFork0_#t~ite20_Out-403900020|) (= |P2Thread1of1ForFork0_#t~ite21_Out-403900020| ~a$w_buff0~0_In-403900020) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-403900020, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-403900020, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-403900020, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-403900020, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-403900020, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-403900020|, ~weak$$choice2~0=~weak$$choice2~0_In-403900020} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-403900020|, ~a$w_buff0~0=~a$w_buff0~0_In-403900020, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-403900020, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-403900020, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-403900020, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-403900020|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-403900020, ~weak$$choice2~0=~weak$$choice2~0_In-403900020} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:01:05,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd2~0_In-797291343 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-797291343 256) 0))) (or (and (= ~a$r_buff0_thd2~0_In-797291343 |P1Thread1of1ForFork2_#t~ite13_Out-797291343|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-797291343|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-797291343, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-797291343} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-797291343, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-797291343, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-797291343|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:01:05,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= (mod ~a$w_buff1_used~0_In2066610572 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In2066610572 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In2066610572 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In2066610572 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite14_Out2066610572| ~a$r_buff1_thd2~0_In2066610572) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out2066610572| 0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2066610572, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2066610572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2066610572, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2066610572} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2066610572, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2066610572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2066610572, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2066610572, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out2066610572|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:01:05,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:01:05,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-395301839 256) 0))) (or (and (= ~a$w_buff1~0_In-395301839 |P2Thread1of1ForFork0_#t~ite24_Out-395301839|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In-395301839| |P2Thread1of1ForFork0_#t~ite23_Out-395301839|)) (and (= ~a$w_buff1~0_In-395301839 |P2Thread1of1ForFork0_#t~ite23_Out-395301839|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-395301839 256)))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In-395301839 256)) .cse1) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-395301839 256))) (= (mod ~a$w_buff0_used~0_In-395301839 256) 0))) .cse0 (= |P2Thread1of1ForFork0_#t~ite24_Out-395301839| |P2Thread1of1ForFork0_#t~ite23_Out-395301839|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-395301839, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-395301839|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-395301839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-395301839, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-395301839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-395301839, ~weak$$choice2~0=~weak$$choice2~0_In-395301839} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-395301839, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-395301839|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-395301839|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-395301839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-395301839, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-395301839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-395301839, ~weak$$choice2~0=~weak$$choice2~0_In-395301839} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 15:01:05,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1588612407 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite27_Out-1588612407| |P2Thread1of1ForFork0_#t~ite26_Out-1588612407|) (= ~a$w_buff0_used~0_In-1588612407 |P2Thread1of1ForFork0_#t~ite26_Out-1588612407|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1588612407 256)))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1588612407 256))) (and .cse1 (= (mod ~a$w_buff1_used~0_In-1588612407 256) 0)) (= (mod ~a$w_buff0_used~0_In-1588612407 256) 0)))) (and (= ~a$w_buff0_used~0_In-1588612407 |P2Thread1of1ForFork0_#t~ite27_Out-1588612407|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-1588612407| |P2Thread1of1ForFork0_#t~ite26_Out-1588612407|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1588612407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1588612407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1588612407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1588612407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1588612407, ~weak$$choice2~0=~weak$$choice2~0_In-1588612407} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1588612407|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1588612407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1588612407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1588612407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1588612407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1588612407, ~weak$$choice2~0=~weak$$choice2~0_In-1588612407} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:01:05,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:01:05,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 15:01:05,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1617963135 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1617963135 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1617963135| ~a~0_In-1617963135)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1617963135| ~a$w_buff1~0_In-1617963135)))) InVars {~a~0=~a~0_In-1617963135, ~a$w_buff1~0=~a$w_buff1~0_In-1617963135, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1617963135, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1617963135} OutVars{~a~0=~a~0_In-1617963135, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1617963135|, ~a$w_buff1~0=~a$w_buff1~0_In-1617963135, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1617963135, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1617963135} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:01:05,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:01:05,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-246507355 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-246507355 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-246507355| ~a$w_buff0_used~0_In-246507355)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-246507355| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-246507355, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-246507355} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-246507355|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-246507355, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-246507355} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:01:05,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In664576017 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In664576017 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out664576017| 0)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out664576017| ~a$w_buff0_used~0_In664576017) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In664576017, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In664576017} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out664576017|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In664576017, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In664576017} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:01:05,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In892162267 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd1~0_In892162267 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In892162267 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In892162267 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out892162267|)) (and (= ~a$w_buff1_used~0_In892162267 |P0Thread1of1ForFork1_#t~ite6_Out892162267|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In892162267, ~a$w_buff0_used~0=~a$w_buff0_used~0_In892162267, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In892162267, ~a$w_buff1_used~0=~a$w_buff1_used~0_In892162267} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out892162267|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In892162267, ~a$w_buff0_used~0=~a$w_buff0_used~0_In892162267, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In892162267, ~a$w_buff1_used~0=~a$w_buff1_used~0_In892162267} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:01:05,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1180315853 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1180315853 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_Out1180315853 ~a$r_buff0_thd1~0_In1180315853))) (or (and .cse0 .cse1) (and (not .cse0) (= ~a$r_buff0_thd1~0_Out1180315853 0) (not .cse2)) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1180315853, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1180315853} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1180315853|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1180315853, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1180315853} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:01:05,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd1~0_In1506096029 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1506096029 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1506096029 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In1506096029 256)))) (or (and (= ~a$r_buff1_thd1~0_In1506096029 |P0Thread1of1ForFork1_#t~ite8_Out1506096029|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1506096029|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1506096029, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1506096029, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1506096029, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1506096029} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1506096029|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1506096029, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1506096029, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1506096029, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1506096029} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:01:05,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:01:05,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In1273074350 256))) (.cse3 (= (mod ~a$r_buff1_thd3~0_In1273074350 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1273074350 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1273074350 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1273074350|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In1273074350 |P2Thread1of1ForFork0_#t~ite41_Out1273074350|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1273074350, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1273074350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1273074350, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1273074350} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1273074350, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1273074350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1273074350, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1273074350, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1273074350|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:01:05,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1205151473 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1205151473 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1205151473|) (not .cse1)) (and (or .cse0 .cse1) (= ~a$r_buff0_thd3~0_In1205151473 |P2Thread1of1ForFork0_#t~ite42_Out1205151473|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1205151473, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1205151473} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1205151473, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1205151473, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1205151473|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:01:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In462570625 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In462570625 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In462570625 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In462570625 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out462570625|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~a$r_buff1_thd3~0_In462570625 |P2Thread1of1ForFork0_#t~ite43_Out462570625|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In462570625, ~a$w_buff0_used~0=~a$w_buff0_used~0_In462570625, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In462570625, ~a$w_buff1_used~0=~a$w_buff1_used~0_In462570625} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out462570625|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In462570625, ~a$w_buff0_used~0=~a$w_buff0_used~0_In462570625, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In462570625, ~a$w_buff1_used~0=~a$w_buff1_used~0_In462570625} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:01:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:01:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:01:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In6450241 256))) (.cse1 (= (mod ~a$r_buff1_thd0~0_In6450241 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out6450241| |ULTIMATE.start_main_#t~ite48_Out6450241|))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In6450241 |ULTIMATE.start_main_#t~ite47_Out6450241|) .cse2) (and (or .cse0 .cse1) (= ~a~0_In6450241 |ULTIMATE.start_main_#t~ite47_Out6450241|) .cse2))) InVars {~a~0=~a~0_In6450241, ~a$w_buff1~0=~a$w_buff1~0_In6450241, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In6450241, ~a$w_buff1_used~0=~a$w_buff1_used~0_In6450241} OutVars{~a~0=~a~0_In6450241, ~a$w_buff1~0=~a$w_buff1~0_In6450241, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out6450241|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In6450241, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out6450241|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In6450241} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:01:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In369803856 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In369803856 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out369803856|)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out369803856| ~a$w_buff0_used~0_In369803856)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In369803856, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In369803856} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In369803856, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out369803856|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In369803856} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:01:05,706 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse3 (= (mod ~a$r_buff0_thd0~0_In-156830557 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-156830557 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-156830557 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-156830557 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite50_Out-156830557| ~a$w_buff1_used~0_In-156830557)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite50_Out-156830557| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-156830557, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-156830557, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-156830557, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-156830557} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-156830557|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-156830557, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-156830557, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-156830557, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-156830557} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:01:05,706 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In-1595864320 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1595864320 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1595864320| 0)) (and (= |ULTIMATE.start_main_#t~ite51_Out-1595864320| ~a$r_buff0_thd0~0_In-1595864320) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1595864320, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1595864320} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1595864320|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1595864320, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1595864320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:01:05,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-988858907 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-988858907 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-988858907 256))) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-988858907 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-988858907| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite52_Out-988858907| ~a$r_buff1_thd0~0_In-988858907) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-988858907, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-988858907, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-988858907, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-988858907} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-988858907|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-988858907, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-988858907, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-988858907, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-988858907} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:01:05,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~main$tmp_guard1~0_19 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_66) (= v_~__unbuffered_p2_EBX~0_30 0) (= v_~y~0_31 2) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_66, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~y~0=v_~y~0_31, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:01:05,760 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_5bff34f4-91a6-48e7-8348-17fef0a349c2/bin/uautomizer/witness.graphml [2019-12-07 15:01:05,760 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:01:05,761 INFO L168 Benchmark]: Toolchain (without parser) took 74601.49 ms. Allocated memory was 1.0 GB in the beginning and 5.8 GB in the end (delta: 4.8 GB). Free memory was 934.0 MB in the beginning and 1.6 GB in the end (delta: -710.7 MB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2019-12-07 15:01:05,761 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:01:05,762 INFO L168 Benchmark]: CACSL2BoogieTranslator took 421.89 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 81.8 MB). Free memory was 934.0 MB in the beginning and 1.0 GB in the end (delta: -114.1 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 15:01:05,762 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.12 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:01:05,762 INFO L168 Benchmark]: Boogie Preprocessor took 26.66 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:01:05,762 INFO L168 Benchmark]: RCFGBuilder took 406.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 988.6 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 15:01:05,762 INFO L168 Benchmark]: TraceAbstraction took 73636.85 ms. Allocated memory was 1.1 GB in the beginning and 5.8 GB in the end (delta: 4.7 GB). Free memory was 983.2 MB in the beginning and 1.7 GB in the end (delta: -682.8 MB). Peak memory consumption was 4.0 GB. Max. memory is 11.5 GB. [2019-12-07 15:01:05,763 INFO L168 Benchmark]: Witness Printer took 68.05 ms. Allocated memory is still 5.8 GB. Free memory was 1.7 GB in the beginning and 1.6 GB in the end (delta: 21.3 MB). Peak memory consumption was 21.3 MB. Max. memory is 11.5 GB. [2019-12-07 15:01:05,764 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 421.89 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 81.8 MB). Free memory was 934.0 MB in the beginning and 1.0 GB in the end (delta: -114.1 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.12 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.66 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 406.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 988.6 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 73636.85 ms. Allocated memory was 1.1 GB in the beginning and 5.8 GB in the end (delta: 4.7 GB). Free memory was 983.2 MB in the beginning and 1.7 GB in the end (delta: -682.8 MB). Peak memory consumption was 4.0 GB. Max. memory is 11.5 GB. * Witness Printer took 68.05 ms. Allocated memory is still 5.8 GB. Free memory was 1.7 GB in the beginning and 1.6 GB in the end (delta: 21.3 MB). Peak memory consumption was 21.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 100 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 33 ChoiceCompositions, 7302 VarBasedMoverChecksPositive, 250 VarBasedMoverChecksNegative, 40 SemBasedMoverChecksPositive, 286 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 87212 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L830] FCALL, FORK 0 pthread_create(&t1123, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L733] 1 a$w_buff1 = a$w_buff0 [L734] 1 a$w_buff0 = 1 [L735] 1 a$w_buff1_used = a$w_buff0_used [L736] 1 a$w_buff0_used = (_Bool)1 [L832] FCALL, FORK 0 pthread_create(&t1124, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L762] 2 x = 1 [L765] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L768] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L768] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L834] FCALL, FORK 0 pthread_create(&t1125, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L782] 3 y = 2 [L785] 3 z = 1 [L788] 3 __unbuffered_p2_EAX = z [L791] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L792] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L793] 3 a$flush_delayed = weak$$choice2 [L794] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L795] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L795] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L769] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L796] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L770] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L771] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L748] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L797] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L798] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L799] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=1] [L799] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=1] [L801] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L802] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L748] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L807] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L749] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L750] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L808] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L809] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L810] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L840] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, z=1] [L840] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L841] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L842] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L843] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 73.4s, OverallIterations: 34, TraceHistogramMax: 1, AutomataDifference: 24.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7981 SDtfs, 11910 SDslu, 20264 SDs, 0 SdLazy, 16245 SolverSat, 826 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 489 GetRequests, 110 SyntacticMatches, 27 SemanticMatches, 352 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2101 ImplicationChecksByTransitivity, 3.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=137801occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 30.2s AutomataMinimizationTime, 33 MinimizatonAttempts, 609605 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 1434 NumberOfCodeBlocks, 1434 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 1334 ConstructedInterpolants, 0 QuantifiedInterpolants, 298562 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...