./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix042_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix042_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4894e6ae27d36c847963604533794c4dadc2447b .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:17:53,607 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:17:53,608 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:17:53,615 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:17:53,615 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:17:53,616 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:17:53,617 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:17:53,618 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:17:53,619 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:17:53,620 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:17:53,621 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:17:53,621 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:17:53,622 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:17:53,622 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:17:53,623 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:17:53,624 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:17:53,624 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:17:53,625 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:17:53,626 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:17:53,627 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:17:53,629 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:17:53,629 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:17:53,630 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:17:53,630 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:17:53,632 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:17:53,632 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:17:53,632 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:17:53,633 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:17:53,633 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:17:53,634 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:17:53,634 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:17:53,634 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:17:53,635 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:17:53,635 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:17:53,636 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:17:53,636 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:17:53,636 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:17:53,636 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:17:53,636 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:17:53,637 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:17:53,637 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:17:53,638 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:17:53,647 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:17:53,647 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:17:53,647 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:17:53,648 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:17:53,648 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:17:53,648 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:17:53,648 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:17:53,648 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:17:53,648 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:17:53,648 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:17:53,648 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:17:53,648 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:17:53,649 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:17:53,649 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:17:53,649 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:17:53,649 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:17:53,649 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:17:53,649 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:17:53,649 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:17:53,649 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:17:53,649 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:17:53,649 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:17:53,650 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:17:53,650 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:17:53,650 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:17:53,650 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:17:53,650 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:17:53,650 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:17:53,650 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:17:53,650 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4894e6ae27d36c847963604533794c4dadc2447b [2019-12-07 17:17:53,748 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:17:53,757 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:17:53,760 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:17:53,761 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:17:53,761 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:17:53,762 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix042_tso.opt.i [2019-12-07 17:17:53,809 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/data/0e08ea018/63b4112d47de412b93583c53cef7fa4c/FLAG649dda23d [2019-12-07 17:17:54,264 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:17:54,264 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/sv-benchmarks/c/pthread-wmm/mix042_tso.opt.i [2019-12-07 17:17:54,276 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/data/0e08ea018/63b4112d47de412b93583c53cef7fa4c/FLAG649dda23d [2019-12-07 17:17:54,285 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/data/0e08ea018/63b4112d47de412b93583c53cef7fa4c [2019-12-07 17:17:54,287 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:17:54,288 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:17:54,289 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:17:54,289 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:17:54,291 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:17:54,292 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,294 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54, skipping insertion in model container [2019-12-07 17:17:54,294 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,298 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:17:54,327 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:17:54,570 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:17:54,578 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:17:54,622 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:17:54,669 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:17:54,669 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54 WrapperNode [2019-12-07 17:17:54,669 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:17:54,670 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:17:54,670 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:17:54,670 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:17:54,676 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,689 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,713 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:17:54,713 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:17:54,713 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:17:54,714 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:17:54,720 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,720 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,723 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,724 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,730 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,733 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,735 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54" (1/1) ... [2019-12-07 17:17:54,739 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:17:54,739 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:17:54,739 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:17:54,739 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:17:54,740 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:17:54,781 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:17:54,781 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:17:54,781 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:17:54,781 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:17:54,781 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:17:54,781 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:17:54,782 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:17:54,782 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:17:54,782 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:17:54,782 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:17:54,782 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:17:54,782 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:17:54,782 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:17:54,783 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:17:55,157 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:17:55,157 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:17:55,158 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:17:55 BoogieIcfgContainer [2019-12-07 17:17:55,158 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:17:55,159 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:17:55,159 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:17:55,161 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:17:55,161 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:17:54" (1/3) ... [2019-12-07 17:17:55,162 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70e4a42a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:17:55, skipping insertion in model container [2019-12-07 17:17:55,162 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:54" (2/3) ... [2019-12-07 17:17:55,162 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70e4a42a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:17:55, skipping insertion in model container [2019-12-07 17:17:55,162 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:17:55" (3/3) ... [2019-12-07 17:17:55,163 INFO L109 eAbstractionObserver]: Analyzing ICFG mix042_tso.opt.i [2019-12-07 17:17:55,170 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:17:55,170 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:17:55,176 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:17:55,176 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:17:55,200 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,200 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,200 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,200 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,201 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,201 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,202 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,202 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,202 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,202 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,202 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,202 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,202 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,203 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,203 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,203 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,203 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,203 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,204 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,204 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,204 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,204 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,204 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,205 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,205 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,205 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,205 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,205 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,205 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,206 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,206 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,206 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,206 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,206 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,206 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,207 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,207 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,208 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,208 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,208 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,208 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,208 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,208 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,209 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,209 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,209 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,209 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,209 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,210 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,210 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,210 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,210 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,210 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,210 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,210 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,210 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,210 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,211 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,211 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,211 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,211 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,211 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,211 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,211 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,211 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,212 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,212 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,212 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,212 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,212 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:55,223 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:17:55,236 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:17:55,236 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:17:55,236 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:17:55,236 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:17:55,236 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:17:55,236 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:17:55,236 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:17:55,236 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:17:55,249 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 165 places, 196 transitions [2019-12-07 17:17:55,251 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-12-07 17:17:55,311 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-12-07 17:17:55,311 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:17:55,320 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 476 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:17:55,330 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-12-07 17:17:55,362 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-12-07 17:17:55,362 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:17:55,367 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 476 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:17:55,378 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-12-07 17:17:55,379 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:17:58,143 WARN L192 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 17:17:58,228 INFO L206 etLargeBlockEncoding]: Checked pairs total: 50142 [2019-12-07 17:17:58,228 INFO L214 etLargeBlockEncoding]: Total number of compositions: 117 [2019-12-07 17:17:58,230 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 86 transitions [2019-12-07 17:17:58,838 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 14254 states. [2019-12-07 17:17:58,840 INFO L276 IsEmpty]: Start isEmpty. Operand 14254 states. [2019-12-07 17:17:58,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 17:17:58,844 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:17:58,844 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:17:58,845 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:17:58,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:17:58,849 INFO L82 PathProgramCache]: Analyzing trace with hash -632784469, now seen corresponding path program 1 times [2019-12-07 17:17:58,854 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:17:58,854 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1472554738] [2019-12-07 17:17:58,854 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:17:58,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:17:58,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:17:58,997 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1472554738] [2019-12-07 17:17:58,998 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:17:58,998 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:17:58,998 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936841038] [2019-12-07 17:17:59,001 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:17:59,002 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:17:59,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:17:59,011 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:17:59,012 INFO L87 Difference]: Start difference. First operand 14254 states. Second operand 3 states. [2019-12-07 17:17:59,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:17:59,229 INFO L93 Difference]: Finished difference Result 14182 states and 53160 transitions. [2019-12-07 17:17:59,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:17:59,231 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 17:17:59,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:17:59,342 INFO L225 Difference]: With dead ends: 14182 [2019-12-07 17:17:59,343 INFO L226 Difference]: Without dead ends: 13870 [2019-12-07 17:17:59,344 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:17:59,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13870 states. [2019-12-07 17:17:59,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13870 to 13870. [2019-12-07 17:17:59,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13870 states. [2019-12-07 17:17:59,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13870 states to 13870 states and 52042 transitions. [2019-12-07 17:17:59,808 INFO L78 Accepts]: Start accepts. Automaton has 13870 states and 52042 transitions. Word has length 7 [2019-12-07 17:17:59,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:17:59,809 INFO L462 AbstractCegarLoop]: Abstraction has 13870 states and 52042 transitions. [2019-12-07 17:17:59,810 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:17:59,810 INFO L276 IsEmpty]: Start isEmpty. Operand 13870 states and 52042 transitions. [2019-12-07 17:17:59,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:17:59,813 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:17:59,813 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:17:59,813 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:17:59,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:17:59,813 INFO L82 PathProgramCache]: Analyzing trace with hash -1056225825, now seen corresponding path program 1 times [2019-12-07 17:17:59,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:17:59,814 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723560430] [2019-12-07 17:17:59,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:17:59,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:17:59,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:17:59,878 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723560430] [2019-12-07 17:17:59,878 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:17:59,878 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:17:59,878 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1642951051] [2019-12-07 17:17:59,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:17:59,879 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:17:59,879 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:17:59,879 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:17:59,880 INFO L87 Difference]: Start difference. First operand 13870 states and 52042 transitions. Second operand 4 states. [2019-12-07 17:18:00,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:00,122 INFO L93 Difference]: Finished difference Result 19034 states and 69248 transitions. [2019-12-07 17:18:00,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:18:00,122 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:18:00,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:00,173 INFO L225 Difference]: With dead ends: 19034 [2019-12-07 17:18:00,173 INFO L226 Difference]: Without dead ends: 19034 [2019-12-07 17:18:00,174 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:00,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19034 states. [2019-12-07 17:18:00,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19034 to 18800. [2019-12-07 17:18:00,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18800 states. [2019-12-07 17:18:00,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18800 states to 18800 states and 68487 transitions. [2019-12-07 17:18:00,674 INFO L78 Accepts]: Start accepts. Automaton has 18800 states and 68487 transitions. Word has length 13 [2019-12-07 17:18:00,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:00,674 INFO L462 AbstractCegarLoop]: Abstraction has 18800 states and 68487 transitions. [2019-12-07 17:18:00,674 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:18:00,674 INFO L276 IsEmpty]: Start isEmpty. Operand 18800 states and 68487 transitions. [2019-12-07 17:18:00,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:18:00,677 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:00,677 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:00,677 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:00,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:00,677 INFO L82 PathProgramCache]: Analyzing trace with hash 746093816, now seen corresponding path program 1 times [2019-12-07 17:18:00,678 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:00,678 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1703251743] [2019-12-07 17:18:00,678 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:00,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:00,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:00,723 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1703251743] [2019-12-07 17:18:00,724 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:00,724 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:18:00,724 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1759808079] [2019-12-07 17:18:00,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:18:00,724 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:00,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:18:00,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:18:00,725 INFO L87 Difference]: Start difference. First operand 18800 states and 68487 transitions. Second operand 4 states. [2019-12-07 17:18:00,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:00,998 INFO L93 Difference]: Finished difference Result 27022 states and 96312 transitions. [2019-12-07 17:18:00,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:18:00,999 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:18:00,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:01,058 INFO L225 Difference]: With dead ends: 27022 [2019-12-07 17:18:01,058 INFO L226 Difference]: Without dead ends: 27008 [2019-12-07 17:18:01,058 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:01,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27008 states. [2019-12-07 17:18:01,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27008 to 22366. [2019-12-07 17:18:01,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22366 states. [2019-12-07 17:18:01,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22366 states to 22366 states and 80994 transitions. [2019-12-07 17:18:01,546 INFO L78 Accepts]: Start accepts. Automaton has 22366 states and 80994 transitions. Word has length 13 [2019-12-07 17:18:01,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:01,546 INFO L462 AbstractCegarLoop]: Abstraction has 22366 states and 80994 transitions. [2019-12-07 17:18:01,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:18:01,546 INFO L276 IsEmpty]: Start isEmpty. Operand 22366 states and 80994 transitions. [2019-12-07 17:18:01,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:18:01,551 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:01,551 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:01,552 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:01,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:01,552 INFO L82 PathProgramCache]: Analyzing trace with hash -1347005908, now seen corresponding path program 1 times [2019-12-07 17:18:01,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:01,552 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [42135745] [2019-12-07 17:18:01,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:01,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:01,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:01,604 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [42135745] [2019-12-07 17:18:01,604 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:01,604 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:18:01,604 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1736440972] [2019-12-07 17:18:01,604 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:18:01,604 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:01,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:18:01,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:01,605 INFO L87 Difference]: Start difference. First operand 22366 states and 80994 transitions. Second operand 5 states. [2019-12-07 17:18:01,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:01,928 INFO L93 Difference]: Finished difference Result 30132 states and 106959 transitions. [2019-12-07 17:18:01,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:18:01,928 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:18:01,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:01,989 INFO L225 Difference]: With dead ends: 30132 [2019-12-07 17:18:01,989 INFO L226 Difference]: Without dead ends: 30118 [2019-12-07 17:18:01,990 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:18:02,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30118 states. [2019-12-07 17:18:02,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30118 to 22270. [2019-12-07 17:18:02,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22270 states. [2019-12-07 17:18:02,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22270 states to 22270 states and 80486 transitions. [2019-12-07 17:18:02,511 INFO L78 Accepts]: Start accepts. Automaton has 22270 states and 80486 transitions. Word has length 19 [2019-12-07 17:18:02,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:02,511 INFO L462 AbstractCegarLoop]: Abstraction has 22270 states and 80486 transitions. [2019-12-07 17:18:02,511 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:18:02,511 INFO L276 IsEmpty]: Start isEmpty. Operand 22270 states and 80486 transitions. [2019-12-07 17:18:02,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:18:02,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:02,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:02,527 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:02,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:02,527 INFO L82 PathProgramCache]: Analyzing trace with hash 1614023153, now seen corresponding path program 1 times [2019-12-07 17:18:02,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:02,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316487501] [2019-12-07 17:18:02,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:02,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:02,577 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:02,578 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [316487501] [2019-12-07 17:18:02,578 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:02,578 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:18:02,578 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1298963332] [2019-12-07 17:18:02,578 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:18:02,578 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:02,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:18:02,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:18:02,579 INFO L87 Difference]: Start difference. First operand 22270 states and 80486 transitions. Second operand 4 states. [2019-12-07 17:18:02,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:02,625 INFO L93 Difference]: Finished difference Result 13342 states and 41523 transitions. [2019-12-07 17:18:02,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:18:02,625 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2019-12-07 17:18:02,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:02,641 INFO L225 Difference]: With dead ends: 13342 [2019-12-07 17:18:02,641 INFO L226 Difference]: Without dead ends: 12812 [2019-12-07 17:18:02,641 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:02,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12812 states. [2019-12-07 17:18:02,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12812 to 12812. [2019-12-07 17:18:02,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12812 states. [2019-12-07 17:18:02,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12812 states to 12812 states and 40017 transitions. [2019-12-07 17:18:02,817 INFO L78 Accepts]: Start accepts. Automaton has 12812 states and 40017 transitions. Word has length 27 [2019-12-07 17:18:02,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:02,817 INFO L462 AbstractCegarLoop]: Abstraction has 12812 states and 40017 transitions. [2019-12-07 17:18:02,817 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:18:02,817 INFO L276 IsEmpty]: Start isEmpty. Operand 12812 states and 40017 transitions. [2019-12-07 17:18:02,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:18:02,823 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:02,823 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:02,823 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:02,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:02,823 INFO L82 PathProgramCache]: Analyzing trace with hash -1806206056, now seen corresponding path program 1 times [2019-12-07 17:18:02,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:02,823 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2081291136] [2019-12-07 17:18:02,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:02,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:02,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:02,872 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2081291136] [2019-12-07 17:18:02,873 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:02,873 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:18:02,873 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [149498180] [2019-12-07 17:18:02,873 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:18:02,873 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:02,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:18:02,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:02,874 INFO L87 Difference]: Start difference. First operand 12812 states and 40017 transitions. Second operand 5 states. [2019-12-07 17:18:02,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:02,905 INFO L93 Difference]: Finished difference Result 2336 states and 5507 transitions. [2019-12-07 17:18:02,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:18:02,906 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 17:18:02,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:02,907 INFO L225 Difference]: With dead ends: 2336 [2019-12-07 17:18:02,907 INFO L226 Difference]: Without dead ends: 2027 [2019-12-07 17:18:02,908 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:18:02,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2027 states. [2019-12-07 17:18:02,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2027 to 2027. [2019-12-07 17:18:02,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2027 states. [2019-12-07 17:18:02,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2027 states to 2027 states and 4646 transitions. [2019-12-07 17:18:02,926 INFO L78 Accepts]: Start accepts. Automaton has 2027 states and 4646 transitions. Word has length 28 [2019-12-07 17:18:02,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:02,926 INFO L462 AbstractCegarLoop]: Abstraction has 2027 states and 4646 transitions. [2019-12-07 17:18:02,926 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:18:02,926 INFO L276 IsEmpty]: Start isEmpty. Operand 2027 states and 4646 transitions. [2019-12-07 17:18:02,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:18:02,928 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:02,929 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:02,929 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:02,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:02,929 INFO L82 PathProgramCache]: Analyzing trace with hash -1654876811, now seen corresponding path program 1 times [2019-12-07 17:18:02,929 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:02,929 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241973595] [2019-12-07 17:18:02,929 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:02,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:02,993 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:02,993 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241973595] [2019-12-07 17:18:02,993 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:02,993 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:18:02,993 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [251905928] [2019-12-07 17:18:02,993 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:18:02,994 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:02,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:18:02,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:18:02,994 INFO L87 Difference]: Start difference. First operand 2027 states and 4646 transitions. Second operand 6 states. [2019-12-07 17:18:03,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:03,037 INFO L93 Difference]: Finished difference Result 690 states and 1578 transitions. [2019-12-07 17:18:03,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:18:03,037 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 17:18:03,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:03,038 INFO L225 Difference]: With dead ends: 690 [2019-12-07 17:18:03,038 INFO L226 Difference]: Without dead ends: 644 [2019-12-07 17:18:03,038 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:18:03,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 644 states. [2019-12-07 17:18:03,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 644 to 588. [2019-12-07 17:18:03,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 588 states. [2019-12-07 17:18:03,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 588 states to 588 states and 1356 transitions. [2019-12-07 17:18:03,044 INFO L78 Accepts]: Start accepts. Automaton has 588 states and 1356 transitions. Word has length 40 [2019-12-07 17:18:03,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:03,044 INFO L462 AbstractCegarLoop]: Abstraction has 588 states and 1356 transitions. [2019-12-07 17:18:03,044 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:18:03,044 INFO L276 IsEmpty]: Start isEmpty. Operand 588 states and 1356 transitions. [2019-12-07 17:18:03,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:18:03,045 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:03,046 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:03,046 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:03,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:03,046 INFO L82 PathProgramCache]: Analyzing trace with hash 149828223, now seen corresponding path program 1 times [2019-12-07 17:18:03,046 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:03,046 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1433968864] [2019-12-07 17:18:03,046 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:03,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:03,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:03,085 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1433968864] [2019-12-07 17:18:03,085 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:03,085 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:18:03,085 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1026766585] [2019-12-07 17:18:03,085 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:18:03,085 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:03,086 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:18:03,086 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:03,086 INFO L87 Difference]: Start difference. First operand 588 states and 1356 transitions. Second operand 3 states. [2019-12-07 17:18:03,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:03,111 INFO L93 Difference]: Finished difference Result 602 states and 1375 transitions. [2019-12-07 17:18:03,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:18:03,112 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 17:18:03,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:03,112 INFO L225 Difference]: With dead ends: 602 [2019-12-07 17:18:03,112 INFO L226 Difference]: Without dead ends: 602 [2019-12-07 17:18:03,113 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:03,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 602 states. [2019-12-07 17:18:03,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 602 to 596. [2019-12-07 17:18:03,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 596 states. [2019-12-07 17:18:03,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 596 states to 596 states and 1368 transitions. [2019-12-07 17:18:03,118 INFO L78 Accepts]: Start accepts. Automaton has 596 states and 1368 transitions. Word has length 55 [2019-12-07 17:18:03,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:03,118 INFO L462 AbstractCegarLoop]: Abstraction has 596 states and 1368 transitions. [2019-12-07 17:18:03,118 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:18:03,118 INFO L276 IsEmpty]: Start isEmpty. Operand 596 states and 1368 transitions. [2019-12-07 17:18:03,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:18:03,119 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:03,119 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:03,119 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:03,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:03,120 INFO L82 PathProgramCache]: Analyzing trace with hash 1719525699, now seen corresponding path program 1 times [2019-12-07 17:18:03,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:03,120 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [680224223] [2019-12-07 17:18:03,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:03,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:03,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:03,176 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [680224223] [2019-12-07 17:18:03,176 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:03,176 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:18:03,176 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1170081003] [2019-12-07 17:18:03,176 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:18:03,177 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:03,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:18:03,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:03,177 INFO L87 Difference]: Start difference. First operand 596 states and 1368 transitions. Second operand 5 states. [2019-12-07 17:18:03,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:03,296 INFO L93 Difference]: Finished difference Result 867 states and 1997 transitions. [2019-12-07 17:18:03,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:18:03,296 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2019-12-07 17:18:03,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:03,297 INFO L225 Difference]: With dead ends: 867 [2019-12-07 17:18:03,297 INFO L226 Difference]: Without dead ends: 867 [2019-12-07 17:18:03,297 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:18:03,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 867 states. [2019-12-07 17:18:03,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 867 to 789. [2019-12-07 17:18:03,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 789 states. [2019-12-07 17:18:03,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 789 states to 789 states and 1820 transitions. [2019-12-07 17:18:03,334 INFO L78 Accepts]: Start accepts. Automaton has 789 states and 1820 transitions. Word has length 55 [2019-12-07 17:18:03,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:03,335 INFO L462 AbstractCegarLoop]: Abstraction has 789 states and 1820 transitions. [2019-12-07 17:18:03,335 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:18:03,335 INFO L276 IsEmpty]: Start isEmpty. Operand 789 states and 1820 transitions. [2019-12-07 17:18:03,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:18:03,336 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:03,336 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:03,336 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:03,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:03,336 INFO L82 PathProgramCache]: Analyzing trace with hash 1740404695, now seen corresponding path program 2 times [2019-12-07 17:18:03,336 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:03,336 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1422570457] [2019-12-07 17:18:03,337 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:03,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:03,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:03,388 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1422570457] [2019-12-07 17:18:03,389 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:03,389 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:18:03,389 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [950881266] [2019-12-07 17:18:03,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:18:03,389 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:03,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:18:03,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:03,389 INFO L87 Difference]: Start difference. First operand 789 states and 1820 transitions. Second operand 3 states. [2019-12-07 17:18:03,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:03,416 INFO L93 Difference]: Finished difference Result 789 states and 1819 transitions. [2019-12-07 17:18:03,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:18:03,416 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 17:18:03,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:03,417 INFO L225 Difference]: With dead ends: 789 [2019-12-07 17:18:03,417 INFO L226 Difference]: Without dead ends: 789 [2019-12-07 17:18:03,417 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:03,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 789 states. [2019-12-07 17:18:03,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 789 to 632. [2019-12-07 17:18:03,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 632 states. [2019-12-07 17:18:03,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 632 states to 632 states and 1459 transitions. [2019-12-07 17:18:03,423 INFO L78 Accepts]: Start accepts. Automaton has 632 states and 1459 transitions. Word has length 55 [2019-12-07 17:18:03,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:03,423 INFO L462 AbstractCegarLoop]: Abstraction has 632 states and 1459 transitions. [2019-12-07 17:18:03,424 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:18:03,424 INFO L276 IsEmpty]: Start isEmpty. Operand 632 states and 1459 transitions. [2019-12-07 17:18:03,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:18:03,425 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:03,425 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:03,425 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:03,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:03,425 INFO L82 PathProgramCache]: Analyzing trace with hash 1993080434, now seen corresponding path program 1 times [2019-12-07 17:18:03,425 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:03,426 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552557096] [2019-12-07 17:18:03,426 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:03,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:03,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:03,478 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552557096] [2019-12-07 17:18:03,478 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:03,478 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:18:03,479 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [637871689] [2019-12-07 17:18:03,479 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:18:03,479 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:03,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:18:03,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:03,479 INFO L87 Difference]: Start difference. First operand 632 states and 1459 transitions. Second operand 3 states. [2019-12-07 17:18:03,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:03,489 INFO L93 Difference]: Finished difference Result 632 states and 1429 transitions. [2019-12-07 17:18:03,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:18:03,489 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 17:18:03,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:03,490 INFO L225 Difference]: With dead ends: 632 [2019-12-07 17:18:03,490 INFO L226 Difference]: Without dead ends: 632 [2019-12-07 17:18:03,490 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:03,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 632 states. [2019-12-07 17:18:03,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 632 to 596. [2019-12-07 17:18:03,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 596 states. [2019-12-07 17:18:03,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 596 states to 596 states and 1343 transitions. [2019-12-07 17:18:03,496 INFO L78 Accepts]: Start accepts. Automaton has 596 states and 1343 transitions. Word has length 56 [2019-12-07 17:18:03,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:03,496 INFO L462 AbstractCegarLoop]: Abstraction has 596 states and 1343 transitions. [2019-12-07 17:18:03,496 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:18:03,496 INFO L276 IsEmpty]: Start isEmpty. Operand 596 states and 1343 transitions. [2019-12-07 17:18:03,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:18:03,497 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:03,497 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:03,497 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:03,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:03,497 INFO L82 PathProgramCache]: Analyzing trace with hash 2052620165, now seen corresponding path program 1 times [2019-12-07 17:18:03,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:03,497 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1655901260] [2019-12-07 17:18:03,497 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:03,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:03,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:03,681 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1655901260] [2019-12-07 17:18:03,681 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:03,681 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 17:18:03,681 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [300245716] [2019-12-07 17:18:03,681 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:18:03,682 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:03,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:18:03,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:18:03,682 INFO L87 Difference]: Start difference. First operand 596 states and 1343 transitions. Second operand 12 states. [2019-12-07 17:18:04,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:04,049 INFO L93 Difference]: Finished difference Result 1200 states and 2407 transitions. [2019-12-07 17:18:04,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:18:04,049 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 57 [2019-12-07 17:18:04,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:04,050 INFO L225 Difference]: With dead ends: 1200 [2019-12-07 17:18:04,050 INFO L226 Difference]: Without dead ends: 600 [2019-12-07 17:18:04,051 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=427, Unknown=0, NotChecked=0, Total=600 [2019-12-07 17:18:04,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 600 states. [2019-12-07 17:18:04,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 600 to 534. [2019-12-07 17:18:04,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 534 states. [2019-12-07 17:18:04,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 534 states to 534 states and 1164 transitions. [2019-12-07 17:18:04,055 INFO L78 Accepts]: Start accepts. Automaton has 534 states and 1164 transitions. Word has length 57 [2019-12-07 17:18:04,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:04,055 INFO L462 AbstractCegarLoop]: Abstraction has 534 states and 1164 transitions. [2019-12-07 17:18:04,055 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:18:04,055 INFO L276 IsEmpty]: Start isEmpty. Operand 534 states and 1164 transitions. [2019-12-07 17:18:04,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:18:04,056 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:04,056 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:04,056 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:04,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:04,057 INFO L82 PathProgramCache]: Analyzing trace with hash -892812541, now seen corresponding path program 2 times [2019-12-07 17:18:04,057 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:04,057 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [230545852] [2019-12-07 17:18:04,057 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:04,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:04,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:04,413 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [230545852] [2019-12-07 17:18:04,413 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:04,413 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 17:18:04,413 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1337404500] [2019-12-07 17:18:04,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 17:18:04,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:04,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 17:18:04,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=289, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:18:04,414 INFO L87 Difference]: Start difference. First operand 534 states and 1164 transitions. Second operand 19 states. [2019-12-07 17:18:05,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:05,268 INFO L93 Difference]: Finished difference Result 1295 states and 2888 transitions. [2019-12-07 17:18:05,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 17:18:05,268 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 57 [2019-12-07 17:18:05,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:05,269 INFO L225 Difference]: With dead ends: 1295 [2019-12-07 17:18:05,269 INFO L226 Difference]: Without dead ends: 1265 [2019-12-07 17:18:05,270 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 284 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=252, Invalid=1230, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 17:18:05,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1265 states. [2019-12-07 17:18:05,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1265 to 716. [2019-12-07 17:18:05,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 716 states. [2019-12-07 17:18:05,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 716 states to 716 states and 1564 transitions. [2019-12-07 17:18:05,277 INFO L78 Accepts]: Start accepts. Automaton has 716 states and 1564 transitions. Word has length 57 [2019-12-07 17:18:05,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:05,278 INFO L462 AbstractCegarLoop]: Abstraction has 716 states and 1564 transitions. [2019-12-07 17:18:05,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 17:18:05,278 INFO L276 IsEmpty]: Start isEmpty. Operand 716 states and 1564 transitions. [2019-12-07 17:18:05,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:18:05,278 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:05,279 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:05,279 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:05,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:05,279 INFO L82 PathProgramCache]: Analyzing trace with hash -495942269, now seen corresponding path program 3 times [2019-12-07 17:18:05,279 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:05,279 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1443679396] [2019-12-07 17:18:05,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:05,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:05,500 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:05,500 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1443679396] [2019-12-07 17:18:05,500 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:05,500 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:18:05,500 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410283481] [2019-12-07 17:18:05,500 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:18:05,500 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:05,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:18:05,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:18:05,501 INFO L87 Difference]: Start difference. First operand 716 states and 1564 transitions. Second operand 14 states. [2019-12-07 17:18:05,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:05,888 INFO L93 Difference]: Finished difference Result 1162 states and 2537 transitions. [2019-12-07 17:18:05,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 17:18:05,888 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 57 [2019-12-07 17:18:05,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:05,889 INFO L225 Difference]: With dead ends: 1162 [2019-12-07 17:18:05,889 INFO L226 Difference]: Without dead ends: 1132 [2019-12-07 17:18:05,890 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=130, Invalid=520, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:18:05,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1132 states. [2019-12-07 17:18:05,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1132 to 776. [2019-12-07 17:18:05,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 776 states. [2019-12-07 17:18:05,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 776 states to 776 states and 1710 transitions. [2019-12-07 17:18:05,897 INFO L78 Accepts]: Start accepts. Automaton has 776 states and 1710 transitions. Word has length 57 [2019-12-07 17:18:05,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:05,897 INFO L462 AbstractCegarLoop]: Abstraction has 776 states and 1710 transitions. [2019-12-07 17:18:05,897 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:18:05,897 INFO L276 IsEmpty]: Start isEmpty. Operand 776 states and 1710 transitions. [2019-12-07 17:18:05,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:18:05,898 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:05,898 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:05,898 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:05,898 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:05,898 INFO L82 PathProgramCache]: Analyzing trace with hash 60491955, now seen corresponding path program 4 times [2019-12-07 17:18:05,898 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:05,899 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572884343] [2019-12-07 17:18:05,899 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:05,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:06,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:06,091 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572884343] [2019-12-07 17:18:06,091 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:06,091 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:18:06,091 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1419529551] [2019-12-07 17:18:06,091 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:18:06,091 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:06,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:18:06,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:18:06,092 INFO L87 Difference]: Start difference. First operand 776 states and 1710 transitions. Second operand 15 states. [2019-12-07 17:18:06,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:06,603 INFO L93 Difference]: Finished difference Result 1150 states and 2505 transitions. [2019-12-07 17:18:06,604 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:18:06,604 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 57 [2019-12-07 17:18:06,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:06,606 INFO L225 Difference]: With dead ends: 1150 [2019-12-07 17:18:06,606 INFO L226 Difference]: Without dead ends: 1120 [2019-12-07 17:18:06,607 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=144, Invalid=612, Unknown=0, NotChecked=0, Total=756 [2019-12-07 17:18:06,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1120 states. [2019-12-07 17:18:06,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1120 to 772. [2019-12-07 17:18:06,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 772 states. [2019-12-07 17:18:06,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 772 states to 772 states and 1700 transitions. [2019-12-07 17:18:06,622 INFO L78 Accepts]: Start accepts. Automaton has 772 states and 1700 transitions. Word has length 57 [2019-12-07 17:18:06,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:06,622 INFO L462 AbstractCegarLoop]: Abstraction has 772 states and 1700 transitions. [2019-12-07 17:18:06,622 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:18:06,622 INFO L276 IsEmpty]: Start isEmpty. Operand 772 states and 1700 transitions. [2019-12-07 17:18:06,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:18:06,624 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:06,624 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:06,624 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:06,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:06,625 INFO L82 PathProgramCache]: Analyzing trace with hash 729108355, now seen corresponding path program 5 times [2019-12-07 17:18:06,625 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:06,625 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158625221] [2019-12-07 17:18:06,625 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:06,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:18:06,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:18:06,694 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:18:06,694 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:18:06,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_56| 0 0))) (and (= v_~y$w_buff0_used~0_565 0) (= v_~y$w_buff1_used~0_304 0) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff0_thd0~0_292 0) (= 0 v_~weak$$choice2~0_82) (= 0 v_~y$read_delayed_var~0.offset_8) (= |v_ULTIMATE.start_main_~#t1126~0.offset_21| 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1126~0.base_27| 1) |v_#valid_54|) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1126~0.base_27| 4) |v_#length_19|) (= 0 v_~__unbuffered_cnt~0_94) (= 0 v_~y$r_buff1_thd3~0_89) (= v_~y$read_delayed~0_8 0) (= 0 v_~y$r_buff1_thd2~0_113) (= v_~main$tmp_guard1~0_30 0) (= v_~x~0_51 0) (= v_~y$w_buff1~0_136 0) (= 0 v_~y$r_buff0_thd2~0_108) (< 0 |v_#StackHeapBarrier_14|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1126~0.base_27| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1126~0.base_27|) |v_ULTIMATE.start_main_~#t1126~0.offset_21| 0)) |v_#memory_int_15|) (= v_~y$r_buff0_thd1~0_41 0) (= v_~a~0_57 0) (= v_~y$mem_tmp~0_17 0) (= v_~z~0_41 0) (= 0 v_~y$r_buff1_thd1~0_40) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~y~0_123 0) (= v_~y$r_buff1_thd0~0_196 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff0_thd3~0_130) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_54) (= (select .cse0 |v_ULTIMATE.start_main_~#t1126~0.base_27|) 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1126~0.base_27|) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 0 v_~weak$$choice0~0_13) (= 0 |v_#NULL.base_5|) (= 0 v_~y$flush_delayed~0_34) (= 0 v_~y$w_buff0~0_162))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, ULTIMATE.start_main_~#t1127~0.base=|v_ULTIMATE.start_main_~#t1127~0.base_26|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_35|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_50|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_57, ~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_89, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_41, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_54, ULTIMATE.start_main_~#t1127~0.offset=|v_ULTIMATE.start_main_~#t1127~0.offset_20|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_116|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_33|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_~#t1126~0.offset=|v_ULTIMATE.start_main_~#t1126~0.offset_21|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_25|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_136, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_196, ~x~0=v_~x~0_51, ULTIMATE.start_main_~#t1128~0.base=|v_ULTIMATE.start_main_~#t1128~0.base_21|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_565, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_49|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_27|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_27|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_40, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_28|, ~y$w_buff0~0=v_~y$w_buff0~0_162, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_130, ~y~0=v_~y~0_123, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_32|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_196|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_28|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_~#t1126~0.base=|v_ULTIMATE.start_main_~#t1126~0.base_27|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_110|, ULTIMATE.start_main_~#t1128~0.offset=|v_ULTIMATE.start_main_~#t1128~0.offset_16|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_113, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_26|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_292, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_41, ~weak$$choice2~0=v_~weak$$choice2~0_82, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1127~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1127~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t1126~0.offset, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t1128~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_~#t1126~0.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1128~0.offset, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:18:06,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L812-1-->L814: Formula: (and (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1127~0.base_9| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1127~0.base_9| 4)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1127~0.base_9|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1127~0.base_9|) (= |v_ULTIMATE.start_main_~#t1127~0.offset_8| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1127~0.base_9|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1127~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1127~0.base_9|) |v_ULTIMATE.start_main_~#t1127~0.offset_8| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1127~0.base=|v_ULTIMATE.start_main_~#t1127~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1127~0.offset=|v_ULTIMATE.start_main_~#t1127~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1127~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1127~0.offset] because there is no mapped edge [2019-12-07 17:18:06,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L816: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1128~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t1128~0.offset_10| 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1128~0.base_10|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1128~0.base_10|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1128~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1128~0.base_10|) |v_ULTIMATE.start_main_~#t1128~0.offset_10| 2)) |v_#memory_int_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1128~0.base_10| 4)) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1128~0.base_10| 1) |v_#valid_29|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1128~0.base=|v_ULTIMATE.start_main_~#t1128~0.base_10|, ULTIMATE.start_main_~#t1128~0.offset=|v_ULTIMATE.start_main_~#t1128~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1128~0.base, ULTIMATE.start_main_~#t1128~0.offset] because there is no mapped edge [2019-12-07 17:18:06,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L4-->L789: Formula: (and (not (= 0 P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1069832289)) (= 1 ~z~0_Out-1069832289) (= ~y$r_buff0_thd3~0_In-1069832289 ~y$r_buff1_thd3~0_Out-1069832289) (= ~__unbuffered_p2_EAX~0_Out-1069832289 ~z~0_Out-1069832289) (= ~__unbuffered_p2_EBX~0_Out-1069832289 ~a~0_In-1069832289) (= ~y$r_buff1_thd2~0_Out-1069832289 ~y$r_buff0_thd2~0_In-1069832289) (= ~y$r_buff1_thd1~0_Out-1069832289 ~y$r_buff0_thd1~0_In-1069832289) (= 1 ~y$r_buff0_thd3~0_Out-1069832289) (= ~y$r_buff1_thd0~0_Out-1069832289 ~y$r_buff0_thd0~0_In-1069832289)) InVars {~a~0=~a~0_In-1069832289, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1069832289, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1069832289, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1069832289, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1069832289, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1069832289} OutVars{~__unbuffered_p2_EBX~0=~__unbuffered_p2_EBX~0_Out-1069832289, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1069832289, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_Out-1069832289, ~a~0=~a~0_In-1069832289, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_Out-1069832289, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_Out-1069832289, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1069832289, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1069832289, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1069832289, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1069832289, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_Out-1069832289, ~z~0=~z~0_Out-1069832289, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_Out-1069832289} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 17:18:06,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_8 |v_P0Thread1of1ForFork2_#in~arg.base_10|) (= v_~a~0_22 1) (= v_~x~0_29 v_~__unbuffered_p0_EAX~0_17) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_P0Thread1of1ForFork2_~arg.offset_8 |v_P0Thread1of1ForFork2_#in~arg.offset_10|) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, ~x~0=v_~x~0_29} OutVars{~a~0=v_~a~0_22, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_8, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_29, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_8} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 17:18:06,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L754-2-->L754-5: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In892162267 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In892162267 256))) (.cse2 (= |P1Thread1of1ForFork0_#t~ite3_Out892162267| |P1Thread1of1ForFork0_#t~ite4_Out892162267|))) (or (and (= |P1Thread1of1ForFork0_#t~ite3_Out892162267| ~y$w_buff1~0_In892162267) (not .cse0) (not .cse1) .cse2) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite3_Out892162267| ~y~0_In892162267) .cse2))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In892162267, ~y$w_buff1~0=~y$w_buff1~0_In892162267, ~y~0=~y~0_In892162267, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In892162267, ~y$w_buff1~0=~y$w_buff1~0_In892162267, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out892162267|, ~y~0=~y~0_In892162267, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out892162267|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 17:18:06,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1205151473 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1205151473 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite11_Out1205151473|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In1205151473 |P2Thread1of1ForFork1_#t~ite11_Out1205151473|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1205151473, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1205151473} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1205151473, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out1205151473|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1205151473} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:18:06,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L791-->L791-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-2025061003 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-2025061003 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-2025061003 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-2025061003 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite12_Out-2025061003| 0)) (and (= ~y$w_buff1_used~0_In-2025061003 |P2Thread1of1ForFork1_#t~ite12_Out-2025061003|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2025061003, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2025061003, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2025061003, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2025061003} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2025061003, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2025061003, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2025061003, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out-2025061003|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2025061003} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:18:06,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L792-->L793: Formula: (let ((.cse0 (= ~y$r_buff0_thd3~0_In465363218 ~y$r_buff0_thd3~0_Out465363218)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In465363218 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In465363218 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse2) (not .cse1) (= 0 ~y$r_buff0_thd3~0_Out465363218)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In465363218, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In465363218} OutVars{P2Thread1of1ForFork1_#t~ite13=|P2Thread1of1ForFork1_#t~ite13_Out465363218|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In465363218, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out465363218} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite13, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:18:06,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L793-->L793-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In265863989 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In265863989 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd3~0_In265863989 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In265863989 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite14_Out265863989| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork1_#t~ite14_Out265863989| ~y$r_buff1_thd3~0_In265863989) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In265863989, ~y$w_buff0_used~0=~y$w_buff0_used~0_In265863989, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In265863989, ~y$w_buff1_used~0=~y$w_buff1_used~0_In265863989} OutVars{P2Thread1of1ForFork1_#t~ite14=|P2Thread1of1ForFork1_#t~ite14_Out265863989|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In265863989, ~y$w_buff0_used~0=~y$w_buff0_used~0_In265863989, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In265863989, ~y$w_buff1_used~0=~y$w_buff1_used~0_In265863989} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:18:06,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L793-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_59 1) v_~__unbuffered_cnt~0_58) (= |v_P2Thread1of1ForFork1_#t~ite14_34| v_~y$r_buff1_thd3~0_55) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59} OutVars{P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_33|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_55, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 17:18:06,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-988858907 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-988858907 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite5_Out-988858907| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite5_Out-988858907| ~y$w_buff0_used~0_In-988858907) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-988858907, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-988858907} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-988858907, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-988858907, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out-988858907|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:18:06,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L756-->L756-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd2~0_In-1595864320 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1595864320 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1595864320 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1595864320 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-1595864320 |P1Thread1of1ForFork0_#t~ite6_Out-1595864320|)) (and (= 0 |P1Thread1of1ForFork0_#t~ite6_Out-1595864320|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1595864320, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1595864320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1595864320, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1595864320, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out-1595864320|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:18:06,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1344652306 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1344652306 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd2~0_In-1344652306 |P1Thread1of1ForFork0_#t~ite7_Out-1344652306|)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork0_#t~ite7_Out-1344652306| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1344652306, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1344652306} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1344652306, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1344652306, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out-1344652306|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 17:18:06,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-797291343 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-797291343 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-797291343 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In-797291343 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite8_Out-797291343| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-797291343 |P1Thread1of1ForFork0_#t~ite8_Out-797291343|) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-797291343, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-797291343, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-797291343, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-797291343} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-797291343, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-797291343, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-797291343, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out-797291343|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-797291343} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:18:06,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= v_~y$r_buff1_thd2~0_82 |v_P1Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_36|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_82, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_35|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 17:18:06,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L820-->L822-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_253 256)) (= (mod v_~y$r_buff0_thd0~0_142 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:18:06,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L822-2-->L822-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite19_Out1256221764| |ULTIMATE.start_main_#t~ite18_Out1256221764|)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1256221764 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1256221764 256)))) (or (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite18_Out1256221764| ~y~0_In1256221764)) (and .cse0 (= ~y$w_buff1~0_In1256221764 |ULTIMATE.start_main_#t~ite18_Out1256221764|) (not .cse2) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1256221764, ~y~0=~y~0_In1256221764, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1256221764, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1256221764} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1256221764, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1256221764|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1256221764|, ~y~0=~y~0_In1256221764, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1256221764, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1256221764} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:18:06,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-403900020 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-403900020 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite20_Out-403900020|)) (and (= |ULTIMATE.start_main_#t~ite20_Out-403900020| ~y$w_buff0_used~0_In-403900020) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-403900020, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-403900020} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-403900020, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-403900020, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-403900020|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:18:06,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L824-->L824-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-156830557 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-156830557 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-156830557 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-156830557 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite21_Out-156830557|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$w_buff1_used~0_In-156830557 |ULTIMATE.start_main_#t~ite21_Out-156830557|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-156830557, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-156830557, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-156830557, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-156830557} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-156830557, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-156830557, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-156830557|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-156830557, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-156830557} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:18:06,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In664576017 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In664576017 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out664576017| ~y$r_buff0_thd0~0_In664576017) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite22_Out664576017| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In664576017, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In664576017} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In664576017, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In664576017, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out664576017|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:18:06,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L826-->L826-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In-507587312 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-507587312 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In-507587312 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-507587312 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In-507587312 |ULTIMATE.start_main_#t~ite23_Out-507587312|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite23_Out-507587312|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-507587312, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-507587312, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-507587312, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507587312} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-507587312, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-507587312, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-507587312, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-507587312|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507587312} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:18:06,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1781654037 256)))) (or (and (= |ULTIMATE.start_main_#t~ite30_Out1781654037| ~y$w_buff0~0_In1781654037) (not .cse0) (= |ULTIMATE.start_main_#t~ite29_In1781654037| |ULTIMATE.start_main_#t~ite29_Out1781654037|)) (and .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1781654037 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In1781654037 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In1781654037 256) 0) (and (= 0 (mod ~y$w_buff1_used~0_In1781654037 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite29_Out1781654037| ~y$w_buff0~0_In1781654037) (= |ULTIMATE.start_main_#t~ite29_Out1781654037| |ULTIMATE.start_main_#t~ite30_Out1781654037|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1781654037, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In1781654037|, ~y$w_buff0~0=~y$w_buff0~0_In1781654037, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1781654037, ~weak$$choice2~0=~weak$$choice2~0_In1781654037, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1781654037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1781654037} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out1781654037|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1781654037, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1781654037|, ~y$w_buff0~0=~y$w_buff0~0_In1781654037, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1781654037, ~weak$$choice2~0=~weak$$choice2~0_In1781654037, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1781654037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1781654037} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:18:06,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L836-->L836-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1918455684 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite36_Out1918455684| ~y$w_buff0_used~0_In1918455684) (= |ULTIMATE.start_main_#t~ite35_In1918455684| |ULTIMATE.start_main_#t~ite35_Out1918455684|) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite35_Out1918455684| |ULTIMATE.start_main_#t~ite36_Out1918455684|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1918455684 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In1918455684 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In1918455684 256) 0) (and .cse1 (= (mod ~y$w_buff1_used~0_In1918455684 256) 0)))) (= |ULTIMATE.start_main_#t~ite35_Out1918455684| ~y$w_buff0_used~0_In1918455684)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1918455684, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1918455684, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In1918455684|, ~weak$$choice2~0=~weak$$choice2~0_In1918455684, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1918455684, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1918455684} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1918455684, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1918455684, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out1918455684|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out1918455684|, ~weak$$choice2~0=~weak$$choice2~0_In1918455684, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1918455684, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1918455684} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 17:18:06,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L837-->L837-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-253199013 256)))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-253199013 256) 0))) (or (and .cse0 (= (mod ~y$r_buff1_thd0~0_In-253199013 256) 0)) (and (= 0 (mod ~y$w_buff1_used~0_In-253199013 256)) .cse0) (= 0 (mod ~y$w_buff0_used~0_In-253199013 256)))) (= |ULTIMATE.start_main_#t~ite38_Out-253199013| |ULTIMATE.start_main_#t~ite39_Out-253199013|) .cse1 (= |ULTIMATE.start_main_#t~ite38_Out-253199013| ~y$w_buff1_used~0_In-253199013)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite39_Out-253199013| ~y$w_buff1_used~0_In-253199013) (= |ULTIMATE.start_main_#t~ite38_In-253199013| |ULTIMATE.start_main_#t~ite38_Out-253199013|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-253199013, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-253199013, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-253199013|, ~weak$$choice2~0=~weak$$choice2~0_In-253199013, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-253199013, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-253199013} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-253199013, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-253199013|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-253199013, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-253199013|, ~weak$$choice2~0=~weak$$choice2~0_In-253199013, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-253199013, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-253199013} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 17:18:06,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L838-->L839: Formula: (and (not (= (mod v_~weak$$choice2~0_22 256) 0)) (= v_~y$r_buff0_thd0~0_108 v_~y$r_buff0_thd0~0_107)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_22} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:18:06,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L839-->L839-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In300433352 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_In300433352| |ULTIMATE.start_main_#t~ite44_Out300433352|) (= ~y$r_buff1_thd0~0_In300433352 |ULTIMATE.start_main_#t~ite45_Out300433352|) (not .cse0)) (and .cse0 (= |ULTIMATE.start_main_#t~ite45_Out300433352| |ULTIMATE.start_main_#t~ite44_Out300433352|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In300433352 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In300433352 256)) .cse1) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In300433352 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In300433352 256)))) (= ~y$r_buff1_thd0~0_In300433352 |ULTIMATE.start_main_#t~ite44_Out300433352|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In300433352, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In300433352, ~weak$$choice2~0=~weak$$choice2~0_In300433352, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In300433352, ~y$w_buff1_used~0=~y$w_buff1_used~0_In300433352, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In300433352|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In300433352, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In300433352, ~weak$$choice2~0=~weak$$choice2~0_In300433352, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In300433352, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out300433352|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out300433352|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In300433352} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 17:18:06,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L841-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_27) (= v_~y~0_103 v_~y$mem_tmp~0_13) (not (= 0 (mod v_~y$flush_delayed~0_28 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:18:06,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:18:06,750 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:18:06 BasicIcfg [2019-12-07 17:18:06,751 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:18:06,751 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:18:06,751 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:18:06,751 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:18:06,751 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:17:55" (3/4) ... [2019-12-07 17:18:06,753 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:18:06,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_56| 0 0))) (and (= v_~y$w_buff0_used~0_565 0) (= v_~y$w_buff1_used~0_304 0) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff0_thd0~0_292 0) (= 0 v_~weak$$choice2~0_82) (= 0 v_~y$read_delayed_var~0.offset_8) (= |v_ULTIMATE.start_main_~#t1126~0.offset_21| 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1126~0.base_27| 1) |v_#valid_54|) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1126~0.base_27| 4) |v_#length_19|) (= 0 v_~__unbuffered_cnt~0_94) (= 0 v_~y$r_buff1_thd3~0_89) (= v_~y$read_delayed~0_8 0) (= 0 v_~y$r_buff1_thd2~0_113) (= v_~main$tmp_guard1~0_30 0) (= v_~x~0_51 0) (= v_~y$w_buff1~0_136 0) (= 0 v_~y$r_buff0_thd2~0_108) (< 0 |v_#StackHeapBarrier_14|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1126~0.base_27| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1126~0.base_27|) |v_ULTIMATE.start_main_~#t1126~0.offset_21| 0)) |v_#memory_int_15|) (= v_~y$r_buff0_thd1~0_41 0) (= v_~a~0_57 0) (= v_~y$mem_tmp~0_17 0) (= v_~z~0_41 0) (= 0 v_~y$r_buff1_thd1~0_40) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~y~0_123 0) (= v_~y$r_buff1_thd0~0_196 0) (= |v_#NULL.offset_5| 0) (= 0 v_~y$r_buff0_thd3~0_130) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_54) (= (select .cse0 |v_ULTIMATE.start_main_~#t1126~0.base_27|) 0) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1126~0.base_27|) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 0 v_~weak$$choice0~0_13) (= 0 |v_#NULL.base_5|) (= 0 v_~y$flush_delayed~0_34) (= 0 v_~y$w_buff0~0_162))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, ULTIMATE.start_main_~#t1127~0.base=|v_ULTIMATE.start_main_~#t1127~0.base_26|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_29|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_35|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_50|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_57, ~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_89, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_41, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_54, ULTIMATE.start_main_~#t1127~0.offset=|v_ULTIMATE.start_main_~#t1127~0.offset_20|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_17|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_116|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_33|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_32|, ULTIMATE.start_main_~#t1126~0.offset=|v_ULTIMATE.start_main_~#t1126~0.offset_21|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_25|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_136, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_196, ~x~0=v_~x~0_51, ULTIMATE.start_main_~#t1128~0.base=|v_ULTIMATE.start_main_~#t1128~0.base_21|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_565, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_49|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_27|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_27|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_42|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_40, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_28|, ~y$w_buff0~0=v_~y$w_buff0~0_162, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_130, ~y~0=v_~y~0_123, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_32|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_196|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_28|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_~#t1126~0.base=|v_ULTIMATE.start_main_~#t1126~0.base_27|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_110|, ULTIMATE.start_main_~#t1128~0.offset=|v_ULTIMATE.start_main_~#t1128~0.offset_16|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_113, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_26|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_292, #valid=|v_#valid_54|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_10|, ~z~0=v_~z~0_41, ~weak$$choice2~0=v_~weak$$choice2~0_82, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t1127~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1127~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t1126~0.offset, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t1128~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_~#t1126~0.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1128~0.offset, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:18:06,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L812-1-->L814: Formula: (and (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1127~0.base_9| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1127~0.base_9| 4)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1127~0.base_9|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1127~0.base_9|) (= |v_ULTIMATE.start_main_~#t1127~0.offset_8| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1127~0.base_9|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1127~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1127~0.base_9|) |v_ULTIMATE.start_main_~#t1127~0.offset_8| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1127~0.base=|v_ULTIMATE.start_main_~#t1127~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1127~0.offset=|v_ULTIMATE.start_main_~#t1127~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1127~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1127~0.offset] because there is no mapped edge [2019-12-07 17:18:06,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L816: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1128~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t1128~0.offset_10| 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1128~0.base_10|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1128~0.base_10|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1128~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1128~0.base_10|) |v_ULTIMATE.start_main_~#t1128~0.offset_10| 2)) |v_#memory_int_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1128~0.base_10| 4)) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1128~0.base_10| 1) |v_#valid_29|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1128~0.base=|v_ULTIMATE.start_main_~#t1128~0.base_10|, ULTIMATE.start_main_~#t1128~0.offset=|v_ULTIMATE.start_main_~#t1128~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1128~0.base, ULTIMATE.start_main_~#t1128~0.offset] because there is no mapped edge [2019-12-07 17:18:06,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L4-->L789: Formula: (and (not (= 0 P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1069832289)) (= 1 ~z~0_Out-1069832289) (= ~y$r_buff0_thd3~0_In-1069832289 ~y$r_buff1_thd3~0_Out-1069832289) (= ~__unbuffered_p2_EAX~0_Out-1069832289 ~z~0_Out-1069832289) (= ~__unbuffered_p2_EBX~0_Out-1069832289 ~a~0_In-1069832289) (= ~y$r_buff1_thd2~0_Out-1069832289 ~y$r_buff0_thd2~0_In-1069832289) (= ~y$r_buff1_thd1~0_Out-1069832289 ~y$r_buff0_thd1~0_In-1069832289) (= 1 ~y$r_buff0_thd3~0_Out-1069832289) (= ~y$r_buff1_thd0~0_Out-1069832289 ~y$r_buff0_thd0~0_In-1069832289)) InVars {~a~0=~a~0_In-1069832289, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1069832289, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1069832289, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1069832289, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1069832289, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1069832289} OutVars{~__unbuffered_p2_EBX~0=~__unbuffered_p2_EBX~0_Out-1069832289, P2Thread1of1ForFork1___VERIFIER_assert_~expression=P2Thread1of1ForFork1___VERIFIER_assert_~expression_In-1069832289, ~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_Out-1069832289, ~a~0=~a~0_In-1069832289, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_Out-1069832289, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_Out-1069832289, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1069832289, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1069832289, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1069832289, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1069832289, ~__unbuffered_p2_EAX~0=~__unbuffered_p2_EAX~0_Out-1069832289, ~z~0=~z~0_Out-1069832289, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_Out-1069832289} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~__unbuffered_p2_EBX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 17:18:06,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_8 |v_P0Thread1of1ForFork2_#in~arg.base_10|) (= v_~a~0_22 1) (= v_~x~0_29 v_~__unbuffered_p0_EAX~0_17) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_P0Thread1of1ForFork2_~arg.offset_8 |v_P0Thread1of1ForFork2_#in~arg.offset_10|) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, ~x~0=v_~x~0_29} OutVars{~a~0=v_~a~0_22, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_10|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_8, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_10|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_29, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_8} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 17:18:06,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L754-2-->L754-5: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In892162267 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In892162267 256))) (.cse2 (= |P1Thread1of1ForFork0_#t~ite3_Out892162267| |P1Thread1of1ForFork0_#t~ite4_Out892162267|))) (or (and (= |P1Thread1of1ForFork0_#t~ite3_Out892162267| ~y$w_buff1~0_In892162267) (not .cse0) (not .cse1) .cse2) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite3_Out892162267| ~y~0_In892162267) .cse2))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In892162267, ~y$w_buff1~0=~y$w_buff1~0_In892162267, ~y~0=~y~0_In892162267, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In892162267, ~y$w_buff1~0=~y$w_buff1~0_In892162267, P1Thread1of1ForFork0_#t~ite3=|P1Thread1of1ForFork0_#t~ite3_Out892162267|, ~y~0=~y~0_In892162267, P1Thread1of1ForFork0_#t~ite4=|P1Thread1of1ForFork0_#t~ite4_Out892162267|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite3, P1Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 17:18:06,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L790-->L790-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1205151473 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1205151473 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite11_Out1205151473|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In1205151473 |P2Thread1of1ForFork1_#t~ite11_Out1205151473|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1205151473, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1205151473} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1205151473, P2Thread1of1ForFork1_#t~ite11=|P2Thread1of1ForFork1_#t~ite11_Out1205151473|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1205151473} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:18:06,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L791-->L791-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-2025061003 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-2025061003 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-2025061003 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-2025061003 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite12_Out-2025061003| 0)) (and (= ~y$w_buff1_used~0_In-2025061003 |P2Thread1of1ForFork1_#t~ite12_Out-2025061003|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2025061003, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2025061003, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2025061003, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2025061003} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2025061003, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2025061003, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2025061003, P2Thread1of1ForFork1_#t~ite12=|P2Thread1of1ForFork1_#t~ite12_Out-2025061003|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2025061003} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:18:06,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L792-->L793: Formula: (let ((.cse0 (= ~y$r_buff0_thd3~0_In465363218 ~y$r_buff0_thd3~0_Out465363218)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In465363218 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In465363218 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse2) (not .cse1) (= 0 ~y$r_buff0_thd3~0_Out465363218)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In465363218, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In465363218} OutVars{P2Thread1of1ForFork1_#t~ite13=|P2Thread1of1ForFork1_#t~ite13_Out465363218|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In465363218, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out465363218} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite13, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 17:18:06,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L793-->L793-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In265863989 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In265863989 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd3~0_In265863989 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In265863989 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite14_Out265863989| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork1_#t~ite14_Out265863989| ~y$r_buff1_thd3~0_In265863989) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In265863989, ~y$w_buff0_used~0=~y$w_buff0_used~0_In265863989, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In265863989, ~y$w_buff1_used~0=~y$w_buff1_used~0_In265863989} OutVars{P2Thread1of1ForFork1_#t~ite14=|P2Thread1of1ForFork1_#t~ite14_Out265863989|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In265863989, ~y$w_buff0_used~0=~y$w_buff0_used~0_In265863989, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In265863989, ~y$w_buff1_used~0=~y$w_buff1_used~0_In265863989} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:18:06,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L793-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_59 1) v_~__unbuffered_cnt~0_58) (= |v_P2Thread1of1ForFork1_#t~ite14_34| v_~y$r_buff1_thd3~0_55) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59} OutVars{P2Thread1of1ForFork1_#t~ite14=|v_P2Thread1of1ForFork1_#t~ite14_33|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_55, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 17:18:06,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-988858907 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-988858907 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite5_Out-988858907| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite5_Out-988858907| ~y$w_buff0_used~0_In-988858907) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-988858907, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-988858907} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-988858907, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-988858907, P1Thread1of1ForFork0_#t~ite5=|P1Thread1of1ForFork0_#t~ite5_Out-988858907|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:18:06,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L756-->L756-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd2~0_In-1595864320 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1595864320 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1595864320 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1595864320 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-1595864320 |P1Thread1of1ForFork0_#t~ite6_Out-1595864320|)) (and (= 0 |P1Thread1of1ForFork0_#t~ite6_Out-1595864320|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1595864320, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1595864320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1595864320, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1595864320, P1Thread1of1ForFork0_#t~ite6=|P1Thread1of1ForFork0_#t~ite6_Out-1595864320|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:18:06,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1344652306 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1344652306 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd2~0_In-1344652306 |P1Thread1of1ForFork0_#t~ite7_Out-1344652306|)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork0_#t~ite7_Out-1344652306| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1344652306, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1344652306} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1344652306, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1344652306, P1Thread1of1ForFork0_#t~ite7=|P1Thread1of1ForFork0_#t~ite7_Out-1344652306|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 17:18:06,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-797291343 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-797291343 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-797291343 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In-797291343 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite8_Out-797291343| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-797291343 |P1Thread1of1ForFork0_#t~ite8_Out-797291343|) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-797291343, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-797291343, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-797291343, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-797291343} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-797291343, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-797291343, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-797291343, P1Thread1of1ForFork0_#t~ite8=|P1Thread1of1ForFork0_#t~ite8_Out-797291343|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-797291343} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:18:06,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= v_~y$r_buff1_thd2~0_82 |v_P1Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_36|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_82, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#t~ite8=|v_P1Thread1of1ForFork0_#t~ite8_35|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#t~ite8, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 17:18:06,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L820-->L822-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_253 256)) (= (mod v_~y$r_buff0_thd0~0_142 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_253, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_142, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:18:06,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L822-2-->L822-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite19_Out1256221764| |ULTIMATE.start_main_#t~ite18_Out1256221764|)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1256221764 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1256221764 256)))) (or (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite18_Out1256221764| ~y~0_In1256221764)) (and .cse0 (= ~y$w_buff1~0_In1256221764 |ULTIMATE.start_main_#t~ite18_Out1256221764|) (not .cse2) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1256221764, ~y~0=~y~0_In1256221764, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1256221764, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1256221764} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1256221764, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1256221764|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1256221764|, ~y~0=~y~0_In1256221764, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1256221764, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1256221764} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:18:06,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [700] [700] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-403900020 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-403900020 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite20_Out-403900020|)) (and (= |ULTIMATE.start_main_#t~ite20_Out-403900020| ~y$w_buff0_used~0_In-403900020) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-403900020, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-403900020} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-403900020, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-403900020, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-403900020|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:18:06,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L824-->L824-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-156830557 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-156830557 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-156830557 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-156830557 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite21_Out-156830557|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$w_buff1_used~0_In-156830557 |ULTIMATE.start_main_#t~ite21_Out-156830557|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-156830557, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-156830557, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-156830557, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-156830557} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-156830557, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-156830557, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-156830557|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-156830557, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-156830557} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:18:06,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In664576017 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In664576017 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out664576017| ~y$r_buff0_thd0~0_In664576017) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite22_Out664576017| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In664576017, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In664576017} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In664576017, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In664576017, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out664576017|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:18:06,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L826-->L826-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In-507587312 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-507587312 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In-507587312 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-507587312 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In-507587312 |ULTIMATE.start_main_#t~ite23_Out-507587312|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite23_Out-507587312|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-507587312, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-507587312, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-507587312, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507587312} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-507587312, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-507587312, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-507587312, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-507587312|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507587312} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:18:06,759 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1781654037 256)))) (or (and (= |ULTIMATE.start_main_#t~ite30_Out1781654037| ~y$w_buff0~0_In1781654037) (not .cse0) (= |ULTIMATE.start_main_#t~ite29_In1781654037| |ULTIMATE.start_main_#t~ite29_Out1781654037|)) (and .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1781654037 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In1781654037 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In1781654037 256) 0) (and (= 0 (mod ~y$w_buff1_used~0_In1781654037 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite29_Out1781654037| ~y$w_buff0~0_In1781654037) (= |ULTIMATE.start_main_#t~ite29_Out1781654037| |ULTIMATE.start_main_#t~ite30_Out1781654037|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1781654037, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In1781654037|, ~y$w_buff0~0=~y$w_buff0~0_In1781654037, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1781654037, ~weak$$choice2~0=~weak$$choice2~0_In1781654037, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1781654037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1781654037} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out1781654037|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1781654037, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1781654037|, ~y$w_buff0~0=~y$w_buff0~0_In1781654037, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1781654037, ~weak$$choice2~0=~weak$$choice2~0_In1781654037, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1781654037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1781654037} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:18:06,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L836-->L836-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1918455684 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite36_Out1918455684| ~y$w_buff0_used~0_In1918455684) (= |ULTIMATE.start_main_#t~ite35_In1918455684| |ULTIMATE.start_main_#t~ite35_Out1918455684|) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite35_Out1918455684| |ULTIMATE.start_main_#t~ite36_Out1918455684|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1918455684 256)))) (or (and (= (mod ~y$r_buff1_thd0~0_In1918455684 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In1918455684 256) 0) (and .cse1 (= (mod ~y$w_buff1_used~0_In1918455684 256) 0)))) (= |ULTIMATE.start_main_#t~ite35_Out1918455684| ~y$w_buff0_used~0_In1918455684)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1918455684, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1918455684, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In1918455684|, ~weak$$choice2~0=~weak$$choice2~0_In1918455684, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1918455684, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1918455684} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1918455684, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1918455684, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out1918455684|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out1918455684|, ~weak$$choice2~0=~weak$$choice2~0_In1918455684, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1918455684, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1918455684} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 17:18:06,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L837-->L837-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-253199013 256)))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-253199013 256) 0))) (or (and .cse0 (= (mod ~y$r_buff1_thd0~0_In-253199013 256) 0)) (and (= 0 (mod ~y$w_buff1_used~0_In-253199013 256)) .cse0) (= 0 (mod ~y$w_buff0_used~0_In-253199013 256)))) (= |ULTIMATE.start_main_#t~ite38_Out-253199013| |ULTIMATE.start_main_#t~ite39_Out-253199013|) .cse1 (= |ULTIMATE.start_main_#t~ite38_Out-253199013| ~y$w_buff1_used~0_In-253199013)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite39_Out-253199013| ~y$w_buff1_used~0_In-253199013) (= |ULTIMATE.start_main_#t~ite38_In-253199013| |ULTIMATE.start_main_#t~ite38_Out-253199013|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-253199013, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-253199013, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-253199013|, ~weak$$choice2~0=~weak$$choice2~0_In-253199013, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-253199013, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-253199013} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-253199013, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-253199013|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-253199013, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-253199013|, ~weak$$choice2~0=~weak$$choice2~0_In-253199013, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-253199013, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-253199013} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 17:18:06,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L838-->L839: Formula: (and (not (= (mod v_~weak$$choice2~0_22 256) 0)) (= v_~y$r_buff0_thd0~0_108 v_~y$r_buff0_thd0~0_107)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_108, ~weak$$choice2~0=v_~weak$$choice2~0_22} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:18:06,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L839-->L839-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In300433352 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_In300433352| |ULTIMATE.start_main_#t~ite44_Out300433352|) (= ~y$r_buff1_thd0~0_In300433352 |ULTIMATE.start_main_#t~ite45_Out300433352|) (not .cse0)) (and .cse0 (= |ULTIMATE.start_main_#t~ite45_Out300433352| |ULTIMATE.start_main_#t~ite44_Out300433352|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In300433352 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In300433352 256)) .cse1) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In300433352 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In300433352 256)))) (= ~y$r_buff1_thd0~0_In300433352 |ULTIMATE.start_main_#t~ite44_Out300433352|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In300433352, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In300433352, ~weak$$choice2~0=~weak$$choice2~0_In300433352, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In300433352, ~y$w_buff1_used~0=~y$w_buff1_used~0_In300433352, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In300433352|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In300433352, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In300433352, ~weak$$choice2~0=~weak$$choice2~0_In300433352, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In300433352, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out300433352|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out300433352|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In300433352} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 17:18:06,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L841-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_27) (= v_~y~0_103 v_~y$mem_tmp~0_13) (not (= 0 (mod v_~y$flush_delayed~0_28 256))) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_28, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:18:06,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:18:06,811 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_eec7982e-0fd9-4992-85c9-d41686bd0e7b/bin/uautomizer/witness.graphml [2019-12-07 17:18:06,811 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:18:06,812 INFO L168 Benchmark]: Toolchain (without parser) took 12523.65 ms. Allocated memory was 1.0 GB in the beginning and 1.7 GB in the end (delta: 706.7 MB). Free memory was 934.4 MB in the beginning and 1.4 GB in the end (delta: -434.2 MB). Peak memory consumption was 272.5 MB. Max. memory is 11.5 GB. [2019-12-07 17:18:06,812 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:18:06,812 INFO L168 Benchmark]: CACSL2BoogieTranslator took 380.47 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 934.4 MB in the beginning and 1.1 GB in the end (delta: -134.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:18:06,813 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:18:06,813 INFO L168 Benchmark]: Boogie Preprocessor took 25.44 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:18:06,813 INFO L168 Benchmark]: RCFGBuilder took 419.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:18:06,813 INFO L168 Benchmark]: TraceAbstraction took 11591.87 ms. Allocated memory was 1.1 GB in the beginning and 1.7 GB in the end (delta: 605.6 MB). Free memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: -381.2 MB). Peak memory consumption was 224.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:18:06,814 INFO L168 Benchmark]: Witness Printer took 60.07 ms. Allocated memory is still 1.7 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 19.7 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. [2019-12-07 17:18:06,815 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 380.47 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 934.4 MB in the beginning and 1.1 GB in the end (delta: -134.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.44 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 419.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 11591.87 ms. Allocated memory was 1.1 GB in the beginning and 1.7 GB in the end (delta: 605.6 MB). Free memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: -381.2 MB). Peak memory consumption was 224.3 MB. Max. memory is 11.5 GB. * Witness Printer took 60.07 ms. Allocated memory is still 1.7 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 19.7 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.9s, 165 ProgramPointsBefore, 79 ProgramPointsAfterwards, 196 TransitionsBefore, 86 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 38 ConcurrentYvCompositions, 28 ChoiceCompositions, 4263 VarBasedMoverChecksPositive, 162 VarBasedMoverChecksNegative, 17 SemBasedMoverChecksPositive, 192 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 50142 CheckedPairsTotal, 117 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L812] FCALL, FORK 0 pthread_create(&t1126, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1127, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK 0 pthread_create(&t1128, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L768] 3 y$w_buff1 = y$w_buff0 [L769] 3 y$w_buff0 = 2 [L770] 3 y$w_buff1_used = y$w_buff0_used [L771] 3 y$w_buff0_used = (_Bool)1 [L789] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 x = 1 [L751] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L754] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L789] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L790] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L791] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L818] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L822] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L823] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L824] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L825] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L826] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L829] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L830] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L831] 0 y$flush_delayed = weak$$choice2 [L832] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L833] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L833] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L834] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L835] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L835] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L836] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L837] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L839] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L840] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 156 locations, 2 error locations. Result: UNSAFE, OverallTime: 11.4s, OverallIterations: 16, TraceHistogramMax: 1, AutomataDifference: 3.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1594 SDtfs, 2243 SDslu, 4695 SDs, 0 SdLazy, 3428 SolverSat, 224 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 175 GetRequests, 15 SyntacticMatches, 14 SemanticMatches, 146 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 605 ImplicationChecksByTransitivity, 1.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22366occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.2s AutomataMinimizationTime, 15 MinimizatonAttempts, 14376 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 653 NumberOfCodeBlocks, 653 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 581 ConstructedInterpolants, 0 QuantifiedInterpolants, 142733 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 15 InterpolantComputations, 15 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...