./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix043_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix043_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 54003f2b4870d7af6966ed22460f3781d186d1ed ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:09:17,869 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:09:17,870 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:09:17,877 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:09:17,878 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:09:17,878 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:09:17,879 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:09:17,881 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:09:17,882 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:09:17,883 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:09:17,884 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:09:17,885 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:09:17,885 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:09:17,886 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:09:17,887 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:09:17,888 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:09:17,889 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:09:17,890 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:09:17,892 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:09:17,894 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:09:17,895 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:09:17,896 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:09:17,897 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:09:17,897 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:09:17,899 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:09:17,900 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:09:17,900 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:09:17,900 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:09:17,901 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:09:17,902 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:09:17,902 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:09:17,902 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:09:17,903 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:09:17,903 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:09:17,904 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:09:17,904 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:09:17,905 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:09:17,905 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:09:17,905 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:09:17,906 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:09:17,906 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:09:17,907 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 13:09:17,919 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:09:17,919 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:09:17,920 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 13:09:17,920 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 13:09:17,920 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 13:09:17,921 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:09:17,921 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:09:17,921 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:09:17,921 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:09:17,921 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:09:17,921 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:09:17,922 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:09:17,922 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:09:17,922 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:09:17,922 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:09:17,922 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:09:17,922 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:09:17,923 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:09:17,923 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 13:09:17,923 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:09:17,923 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:09:17,923 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:09:17,923 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:09:17,924 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:09:17,924 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:09:17,924 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 13:09:17,924 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:09:17,924 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:09:17,924 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:09:17,925 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 54003f2b4870d7af6966ed22460f3781d186d1ed [2019-12-07 13:09:18,042 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:09:18,050 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:09:18,053 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:09:18,054 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:09:18,054 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:09:18,054 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix043_rmo.opt.i [2019-12-07 13:09:18,094 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/data/17e58738b/34c3952c38d241dda85fb006c9f2d632/FLAG4cc8eff99 [2019-12-07 13:09:18,477 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:09:18,478 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/sv-benchmarks/c/pthread-wmm/mix043_rmo.opt.i [2019-12-07 13:09:18,489 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/data/17e58738b/34c3952c38d241dda85fb006c9f2d632/FLAG4cc8eff99 [2019-12-07 13:09:18,498 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/data/17e58738b/34c3952c38d241dda85fb006c9f2d632 [2019-12-07 13:09:18,500 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:09:18,501 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:09:18,501 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:09:18,501 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:09:18,504 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:09:18,504 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:09:18" (1/1) ... [2019-12-07 13:09:18,506 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5bd1e142 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18, skipping insertion in model container [2019-12-07 13:09:18,506 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:09:18" (1/1) ... [2019-12-07 13:09:18,511 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:09:18,541 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:09:18,786 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:09:18,794 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:09:18,836 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:09:18,881 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:09:18,882 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18 WrapperNode [2019-12-07 13:09:18,882 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:09:18,882 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:09:18,882 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:09:18,882 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:09:18,887 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18" (1/1) ... [2019-12-07 13:09:18,900 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18" (1/1) ... [2019-12-07 13:09:18,921 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:09:18,921 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:09:18,921 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:09:18,922 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:09:18,928 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18" (1/1) ... [2019-12-07 13:09:18,928 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18" (1/1) ... [2019-12-07 13:09:18,931 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18" (1/1) ... [2019-12-07 13:09:18,931 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18" (1/1) ... [2019-12-07 13:09:18,938 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18" (1/1) ... [2019-12-07 13:09:18,941 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18" (1/1) ... [2019-12-07 13:09:18,944 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18" (1/1) ... [2019-12-07 13:09:18,946 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:09:18,947 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:09:18,947 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:09:18,947 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:09:18,948 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:09:18,988 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:09:18,989 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:09:18,989 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:09:18,989 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:09:18,989 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:09:18,989 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:09:18,989 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:09:18,989 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:09:18,989 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:09:18,989 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:09:18,989 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 13:09:18,989 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 13:09:18,990 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:09:18,990 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:09:18,990 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:09:18,991 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:09:19,369 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:09:19,370 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:09:19,371 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:09:19 BoogieIcfgContainer [2019-12-07 13:09:19,371 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:09:19,372 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:09:19,372 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:09:19,374 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:09:19,375 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:09:18" (1/3) ... [2019-12-07 13:09:19,375 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c50ce26 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:09:19, skipping insertion in model container [2019-12-07 13:09:19,375 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:09:18" (2/3) ... [2019-12-07 13:09:19,376 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c50ce26 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:09:19, skipping insertion in model container [2019-12-07 13:09:19,376 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:09:19" (3/3) ... [2019-12-07 13:09:19,377 INFO L109 eAbstractionObserver]: Analyzing ICFG mix043_rmo.opt.i [2019-12-07 13:09:19,386 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:09:19,386 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:09:19,392 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:09:19,393 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:09:19,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,418 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,418 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,418 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,419 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,419 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,419 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,419 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,419 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,419 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,420 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,423 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,423 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,423 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,423 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,423 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,424 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,424 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,424 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,424 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,425 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,426 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,426 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,426 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,426 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,426 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,426 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,426 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,426 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,426 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,427 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,427 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,427 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,427 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,427 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:09:19,439 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 13:09:19,451 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:09:19,451 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:09:19,451 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:09:19,451 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:09:19,451 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:09:19,452 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:09:19,452 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:09:19,452 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:09:19,463 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 182 places, 210 transitions [2019-12-07 13:09:19,464 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-07 13:09:19,517 INFO L134 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-07 13:09:19,517 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:09:19,526 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 469 event pairs. 12/175 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 13:09:19,537 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-07 13:09:19,564 INFO L134 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-07 13:09:19,564 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:09:19,568 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 469 event pairs. 12/175 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 13:09:19,580 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 13:09:19,581 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:09:22,665 WARN L192 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 99 [2019-12-07 13:09:22,770 INFO L206 etLargeBlockEncoding]: Checked pairs total: 56592 [2019-12-07 13:09:22,770 INFO L214 etLargeBlockEncoding]: Total number of compositions: 126 [2019-12-07 13:09:22,772 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 90 places, 97 transitions [2019-12-07 13:09:24,568 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 33838 states. [2019-12-07 13:09:24,570 INFO L276 IsEmpty]: Start isEmpty. Operand 33838 states. [2019-12-07 13:09:24,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 13:09:24,574 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:24,574 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:24,575 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:24,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:24,578 INFO L82 PathProgramCache]: Analyzing trace with hash -1752766824, now seen corresponding path program 1 times [2019-12-07 13:09:24,583 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:24,584 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633050869] [2019-12-07 13:09:24,584 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:24,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:24,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:24,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1633050869] [2019-12-07 13:09:24,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:24,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:09:24,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635155932] [2019-12-07 13:09:24,738 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:09:24,738 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:24,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:09:24,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:09:24,749 INFO L87 Difference]: Start difference. First operand 33838 states. Second operand 3 states. [2019-12-07 13:09:25,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:25,070 INFO L93 Difference]: Finished difference Result 33638 states and 143712 transitions. [2019-12-07 13:09:25,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:09:25,072 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 13:09:25,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:25,247 INFO L225 Difference]: With dead ends: 33638 [2019-12-07 13:09:25,247 INFO L226 Difference]: Without dead ends: 32966 [2019-12-07 13:09:25,248 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:09:25,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32966 states. [2019-12-07 13:09:26,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32966 to 32966. [2019-12-07 13:09:26,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32966 states. [2019-12-07 13:09:26,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32966 states to 32966 states and 140968 transitions. [2019-12-07 13:09:26,231 INFO L78 Accepts]: Start accepts. Automaton has 32966 states and 140968 transitions. Word has length 9 [2019-12-07 13:09:26,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:26,232 INFO L462 AbstractCegarLoop]: Abstraction has 32966 states and 140968 transitions. [2019-12-07 13:09:26,232 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:09:26,232 INFO L276 IsEmpty]: Start isEmpty. Operand 32966 states and 140968 transitions. [2019-12-07 13:09:26,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 13:09:26,237 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:26,237 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:26,237 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:26,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:26,238 INFO L82 PathProgramCache]: Analyzing trace with hash -666575947, now seen corresponding path program 1 times [2019-12-07 13:09:26,238 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:26,238 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [354994169] [2019-12-07 13:09:26,238 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:26,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:26,300 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:26,300 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [354994169] [2019-12-07 13:09:26,300 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:26,300 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:09:26,300 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [677218133] [2019-12-07 13:09:26,301 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:09:26,301 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:26,302 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:09:26,302 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:09:26,302 INFO L87 Difference]: Start difference. First operand 32966 states and 140968 transitions. Second operand 4 states. [2019-12-07 13:09:26,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:26,733 INFO L93 Difference]: Finished difference Result 44494 states and 185824 transitions. [2019-12-07 13:09:26,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:09:26,733 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 13:09:26,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:26,844 INFO L225 Difference]: With dead ends: 44494 [2019-12-07 13:09:26,844 INFO L226 Difference]: Without dead ends: 44494 [2019-12-07 13:09:26,845 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:09:27,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44494 states. [2019-12-07 13:09:27,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44494 to 43986. [2019-12-07 13:09:27,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43986 states. [2019-12-07 13:09:27,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43986 states to 43986 states and 183912 transitions. [2019-12-07 13:09:27,845 INFO L78 Accepts]: Start accepts. Automaton has 43986 states and 183912 transitions. Word has length 15 [2019-12-07 13:09:27,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:27,845 INFO L462 AbstractCegarLoop]: Abstraction has 43986 states and 183912 transitions. [2019-12-07 13:09:27,845 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:09:27,845 INFO L276 IsEmpty]: Start isEmpty. Operand 43986 states and 183912 transitions. [2019-12-07 13:09:27,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 13:09:27,847 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:27,847 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:27,848 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:27,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:27,848 INFO L82 PathProgramCache]: Analyzing trace with hash 703479247, now seen corresponding path program 1 times [2019-12-07 13:09:27,848 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:27,848 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1630866732] [2019-12-07 13:09:27,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:27,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:27,892 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:27,892 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1630866732] [2019-12-07 13:09:27,892 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:27,892 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:09:27,893 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [47136631] [2019-12-07 13:09:27,893 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:09:27,893 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:27,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:09:27,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:09:27,894 INFO L87 Difference]: Start difference. First operand 43986 states and 183912 transitions. Second operand 4 states. [2019-12-07 13:09:28,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:28,285 INFO L93 Difference]: Finished difference Result 62082 states and 254960 transitions. [2019-12-07 13:09:28,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:09:28,285 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 13:09:28,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:28,607 INFO L225 Difference]: With dead ends: 62082 [2019-12-07 13:09:28,607 INFO L226 Difference]: Without dead ends: 62054 [2019-12-07 13:09:28,607 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:09:28,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62054 states. [2019-12-07 13:09:29,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62054 to 51774. [2019-12-07 13:09:29,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51774 states. [2019-12-07 13:09:29,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51774 states to 51774 states and 215576 transitions. [2019-12-07 13:09:29,859 INFO L78 Accepts]: Start accepts. Automaton has 51774 states and 215576 transitions. Word has length 15 [2019-12-07 13:09:29,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:29,859 INFO L462 AbstractCegarLoop]: Abstraction has 51774 states and 215576 transitions. [2019-12-07 13:09:29,859 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:09:29,859 INFO L276 IsEmpty]: Start isEmpty. Operand 51774 states and 215576 transitions. [2019-12-07 13:09:29,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 13:09:29,870 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:29,870 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:29,870 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:29,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:29,870 INFO L82 PathProgramCache]: Analyzing trace with hash -1831569488, now seen corresponding path program 1 times [2019-12-07 13:09:29,871 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:29,871 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [620263753] [2019-12-07 13:09:29,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:29,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:29,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:29,930 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [620263753] [2019-12-07 13:09:29,930 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:29,930 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:09:29,930 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [745479172] [2019-12-07 13:09:29,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:09:29,931 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:29,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:09:29,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:09:29,931 INFO L87 Difference]: Start difference. First operand 51774 states and 215576 transitions. Second operand 5 states. [2019-12-07 13:09:30,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:30,422 INFO L93 Difference]: Finished difference Result 68854 states and 281988 transitions. [2019-12-07 13:09:30,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:09:30,423 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 13:09:30,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:30,578 INFO L225 Difference]: With dead ends: 68854 [2019-12-07 13:09:30,578 INFO L226 Difference]: Without dead ends: 68826 [2019-12-07 13:09:30,578 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:09:30,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68826 states. [2019-12-07 13:09:31,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68826 to 51450. [2019-12-07 13:09:31,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51450 states. [2019-12-07 13:09:31,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51450 states to 51450 states and 213896 transitions. [2019-12-07 13:09:31,916 INFO L78 Accepts]: Start accepts. Automaton has 51450 states and 213896 transitions. Word has length 21 [2019-12-07 13:09:31,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:31,916 INFO L462 AbstractCegarLoop]: Abstraction has 51450 states and 213896 transitions. [2019-12-07 13:09:31,917 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:09:31,917 INFO L276 IsEmpty]: Start isEmpty. Operand 51450 states and 213896 transitions. [2019-12-07 13:09:31,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 13:09:31,951 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:31,951 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:31,951 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:31,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:31,951 INFO L82 PathProgramCache]: Analyzing trace with hash 2027885083, now seen corresponding path program 1 times [2019-12-07 13:09:31,951 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:31,952 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103551130] [2019-12-07 13:09:31,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:31,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:31,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:31,991 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1103551130] [2019-12-07 13:09:31,991 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:31,991 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:09:31,991 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691116953] [2019-12-07 13:09:31,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:09:31,991 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:31,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:09:31,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:09:31,992 INFO L87 Difference]: Start difference. First operand 51450 states and 213896 transitions. Second operand 3 states. [2019-12-07 13:09:32,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:32,270 INFO L93 Difference]: Finished difference Result 64130 states and 263832 transitions. [2019-12-07 13:09:32,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:09:32,270 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 13:09:32,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:32,590 INFO L225 Difference]: With dead ends: 64130 [2019-12-07 13:09:32,590 INFO L226 Difference]: Without dead ends: 64130 [2019-12-07 13:09:32,591 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:09:32,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64130 states. [2019-12-07 13:09:33,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64130 to 56646. [2019-12-07 13:09:33,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56646 states. [2019-12-07 13:09:33,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56646 states to 56646 states and 234808 transitions. [2019-12-07 13:09:33,771 INFO L78 Accepts]: Start accepts. Automaton has 56646 states and 234808 transitions. Word has length 29 [2019-12-07 13:09:33,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:33,771 INFO L462 AbstractCegarLoop]: Abstraction has 56646 states and 234808 transitions. [2019-12-07 13:09:33,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:09:33,772 INFO L276 IsEmpty]: Start isEmpty. Operand 56646 states and 234808 transitions. [2019-12-07 13:09:33,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 13:09:33,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:33,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:33,802 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:33,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:33,803 INFO L82 PathProgramCache]: Analyzing trace with hash 1811393886, now seen corresponding path program 1 times [2019-12-07 13:09:33,803 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:33,803 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608560388] [2019-12-07 13:09:33,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:33,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:33,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:33,857 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608560388] [2019-12-07 13:09:33,857 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:33,857 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:09:33,857 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1743248370] [2019-12-07 13:09:33,858 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:09:33,858 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:33,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:09:33,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:09:33,858 INFO L87 Difference]: Start difference. First operand 56646 states and 234808 transitions. Second operand 6 states. [2019-12-07 13:09:34,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:34,432 INFO L93 Difference]: Finished difference Result 81602 states and 332376 transitions. [2019-12-07 13:09:34,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:09:34,432 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2019-12-07 13:09:34,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:34,770 INFO L225 Difference]: With dead ends: 81602 [2019-12-07 13:09:34,770 INFO L226 Difference]: Without dead ends: 81538 [2019-12-07 13:09:34,770 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:09:35,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81538 states. [2019-12-07 13:09:36,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81538 to 65578. [2019-12-07 13:09:36,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65578 states. [2019-12-07 13:09:36,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65578 states to 65578 states and 270440 transitions. [2019-12-07 13:09:36,176 INFO L78 Accepts]: Start accepts. Automaton has 65578 states and 270440 transitions. Word has length 29 [2019-12-07 13:09:36,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:36,177 INFO L462 AbstractCegarLoop]: Abstraction has 65578 states and 270440 transitions. [2019-12-07 13:09:36,177 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:09:36,177 INFO L276 IsEmpty]: Start isEmpty. Operand 65578 states and 270440 transitions. [2019-12-07 13:09:36,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 13:09:36,239 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:36,239 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:36,239 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:36,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:36,239 INFO L82 PathProgramCache]: Analyzing trace with hash -1048930675, now seen corresponding path program 1 times [2019-12-07 13:09:36,240 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:36,240 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1515810442] [2019-12-07 13:09:36,240 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:36,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:36,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:36,293 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1515810442] [2019-12-07 13:09:36,293 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:36,293 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:09:36,294 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1467027081] [2019-12-07 13:09:36,294 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:09:36,294 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:36,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:09:36,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:09:36,294 INFO L87 Difference]: Start difference. First operand 65578 states and 270440 transitions. Second operand 3 states. [2019-12-07 13:09:36,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:36,727 INFO L93 Difference]: Finished difference Result 65578 states and 269720 transitions. [2019-12-07 13:09:36,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:09:36,728 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-12-07 13:09:36,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:36,867 INFO L225 Difference]: With dead ends: 65578 [2019-12-07 13:09:36,868 INFO L226 Difference]: Without dead ends: 65578 [2019-12-07 13:09:36,868 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:09:37,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65578 states. [2019-12-07 13:09:38,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65578 to 65578. [2019-12-07 13:09:38,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65578 states. [2019-12-07 13:09:38,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65578 states to 65578 states and 269720 transitions. [2019-12-07 13:09:38,180 INFO L78 Accepts]: Start accepts. Automaton has 65578 states and 269720 transitions. Word has length 35 [2019-12-07 13:09:38,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:38,180 INFO L462 AbstractCegarLoop]: Abstraction has 65578 states and 269720 transitions. [2019-12-07 13:09:38,180 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:09:38,180 INFO L276 IsEmpty]: Start isEmpty. Operand 65578 states and 269720 transitions. [2019-12-07 13:09:38,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 13:09:38,229 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:38,229 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:38,229 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:38,229 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:38,230 INFO L82 PathProgramCache]: Analyzing trace with hash 1735231015, now seen corresponding path program 1 times [2019-12-07 13:09:38,230 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:38,230 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1523318360] [2019-12-07 13:09:38,230 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:38,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:38,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:38,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1523318360] [2019-12-07 13:09:38,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:38,318 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:09:38,318 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [158359015] [2019-12-07 13:09:38,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:09:38,318 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:38,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:09:38,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:09:38,319 INFO L87 Difference]: Start difference. First operand 65578 states and 269720 transitions. Second operand 7 states. [2019-12-07 13:09:39,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:39,177 INFO L93 Difference]: Finished difference Result 89414 states and 361616 transitions. [2019-12-07 13:09:39,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 13:09:39,178 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 35 [2019-12-07 13:09:39,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:39,372 INFO L225 Difference]: With dead ends: 89414 [2019-12-07 13:09:39,373 INFO L226 Difference]: Without dead ends: 89310 [2019-12-07 13:09:39,373 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2019-12-07 13:09:39,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89310 states. [2019-12-07 13:09:40,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89310 to 58886. [2019-12-07 13:09:40,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58886 states. [2019-12-07 13:09:40,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58886 states to 58886 states and 243296 transitions. [2019-12-07 13:09:40,966 INFO L78 Accepts]: Start accepts. Automaton has 58886 states and 243296 transitions. Word has length 35 [2019-12-07 13:09:40,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:40,967 INFO L462 AbstractCegarLoop]: Abstraction has 58886 states and 243296 transitions. [2019-12-07 13:09:40,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:09:40,967 INFO L276 IsEmpty]: Start isEmpty. Operand 58886 states and 243296 transitions. [2019-12-07 13:09:41,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 13:09:41,011 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:41,012 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:41,012 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:41,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:41,012 INFO L82 PathProgramCache]: Analyzing trace with hash 903389864, now seen corresponding path program 1 times [2019-12-07 13:09:41,012 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:41,012 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833474208] [2019-12-07 13:09:41,012 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:41,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:41,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:41,054 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833474208] [2019-12-07 13:09:41,055 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:41,055 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:09:41,055 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [895341501] [2019-12-07 13:09:41,055 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:09:41,055 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:41,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:09:41,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:09:41,056 INFO L87 Difference]: Start difference. First operand 58886 states and 243296 transitions. Second operand 4 states. [2019-12-07 13:09:41,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:41,221 INFO L93 Difference]: Finished difference Result 47360 states and 179978 transitions. [2019-12-07 13:09:41,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:09:41,222 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-12-07 13:09:41,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:41,307 INFO L225 Difference]: With dead ends: 47360 [2019-12-07 13:09:41,307 INFO L226 Difference]: Without dead ends: 46252 [2019-12-07 13:09:41,307 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:09:41,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46252 states. [2019-12-07 13:09:42,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46252 to 46252. [2019-12-07 13:09:42,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46252 states. [2019-12-07 13:09:42,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46252 states to 46252 states and 176502 transitions. [2019-12-07 13:09:42,175 INFO L78 Accepts]: Start accepts. Automaton has 46252 states and 176502 transitions. Word has length 35 [2019-12-07 13:09:42,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:42,175 INFO L462 AbstractCegarLoop]: Abstraction has 46252 states and 176502 transitions. [2019-12-07 13:09:42,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:09:42,176 INFO L276 IsEmpty]: Start isEmpty. Operand 46252 states and 176502 transitions. [2019-12-07 13:09:42,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-12-07 13:09:42,208 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:42,208 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:42,208 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:42,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:42,209 INFO L82 PathProgramCache]: Analyzing trace with hash 1617947594, now seen corresponding path program 1 times [2019-12-07 13:09:42,209 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:42,209 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1361813812] [2019-12-07 13:09:42,209 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:42,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:42,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:42,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1361813812] [2019-12-07 13:09:42,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:42,287 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:09:42,287 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1157810907] [2019-12-07 13:09:42,287 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:09:42,287 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:42,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:09:42,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:09:42,288 INFO L87 Difference]: Start difference. First operand 46252 states and 176502 transitions. Second operand 6 states. [2019-12-07 13:09:42,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:42,723 INFO L93 Difference]: Finished difference Result 58248 states and 224178 transitions. [2019-12-07 13:09:42,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 13:09:42,723 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2019-12-07 13:09:42,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:42,831 INFO L225 Difference]: With dead ends: 58248 [2019-12-07 13:09:42,831 INFO L226 Difference]: Without dead ends: 55647 [2019-12-07 13:09:42,832 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:09:43,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55647 states. [2019-12-07 13:09:43,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55647 to 51679. [2019-12-07 13:09:43,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51679 states. [2019-12-07 13:09:43,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51679 states to 51679 states and 198408 transitions. [2019-12-07 13:09:43,863 INFO L78 Accepts]: Start accepts. Automaton has 51679 states and 198408 transitions. Word has length 36 [2019-12-07 13:09:43,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:43,863 INFO L462 AbstractCegarLoop]: Abstraction has 51679 states and 198408 transitions. [2019-12-07 13:09:43,863 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:09:43,863 INFO L276 IsEmpty]: Start isEmpty. Operand 51679 states and 198408 transitions. [2019-12-07 13:09:43,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-07 13:09:43,907 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:43,907 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:43,907 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:43,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:43,907 INFO L82 PathProgramCache]: Analyzing trace with hash 859028932, now seen corresponding path program 1 times [2019-12-07 13:09:43,907 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:43,907 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689289837] [2019-12-07 13:09:43,907 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:43,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:43,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:43,966 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689289837] [2019-12-07 13:09:43,966 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:43,966 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:09:43,966 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [882709291] [2019-12-07 13:09:43,967 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:09:43,967 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:43,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:09:43,967 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:09:43,967 INFO L87 Difference]: Start difference. First operand 51679 states and 198408 transitions. Second operand 5 states. [2019-12-07 13:09:44,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:44,048 INFO L93 Difference]: Finished difference Result 22140 states and 70370 transitions. [2019-12-07 13:09:44,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:09:44,049 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 38 [2019-12-07 13:09:44,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:44,074 INFO L225 Difference]: With dead ends: 22140 [2019-12-07 13:09:44,074 INFO L226 Difference]: Without dead ends: 21264 [2019-12-07 13:09:44,074 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:09:44,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21264 states. [2019-12-07 13:09:44,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21264 to 21264. [2019-12-07 13:09:44,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21264 states. [2019-12-07 13:09:44,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21264 states to 21264 states and 67572 transitions. [2019-12-07 13:09:44,365 INFO L78 Accepts]: Start accepts. Automaton has 21264 states and 67572 transitions. Word has length 38 [2019-12-07 13:09:44,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:44,365 INFO L462 AbstractCegarLoop]: Abstraction has 21264 states and 67572 transitions. [2019-12-07 13:09:44,365 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:09:44,366 INFO L276 IsEmpty]: Start isEmpty. Operand 21264 states and 67572 transitions. [2019-12-07 13:09:44,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 13:09:44,377 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:44,377 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:44,377 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:44,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:44,377 INFO L82 PathProgramCache]: Analyzing trace with hash -1508152385, now seen corresponding path program 1 times [2019-12-07 13:09:44,377 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:44,377 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316775469] [2019-12-07 13:09:44,377 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:44,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:44,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:44,455 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1316775469] [2019-12-07 13:09:44,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:44,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:09:44,455 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [675822044] [2019-12-07 13:09:44,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:09:44,455 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:44,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:09:44,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:09:44,455 INFO L87 Difference]: Start difference. First operand 21264 states and 67572 transitions. Second operand 7 states. [2019-12-07 13:09:44,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:44,644 INFO L93 Difference]: Finished difference Result 36395 states and 116077 transitions. [2019-12-07 13:09:44,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 13:09:44,644 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2019-12-07 13:09:44,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:44,666 INFO L225 Difference]: With dead ends: 36395 [2019-12-07 13:09:44,666 INFO L226 Difference]: Without dead ends: 17493 [2019-12-07 13:09:44,667 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:09:44,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17493 states. [2019-12-07 13:09:44,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17493 to 16368. [2019-12-07 13:09:44,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16368 states. [2019-12-07 13:09:44,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16368 states to 16368 states and 52247 transitions. [2019-12-07 13:09:44,926 INFO L78 Accepts]: Start accepts. Automaton has 16368 states and 52247 transitions. Word has length 39 [2019-12-07 13:09:44,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:44,927 INFO L462 AbstractCegarLoop]: Abstraction has 16368 states and 52247 transitions. [2019-12-07 13:09:44,927 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:09:44,927 INFO L276 IsEmpty]: Start isEmpty. Operand 16368 states and 52247 transitions. [2019-12-07 13:09:44,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 13:09:44,935 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:44,935 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:44,935 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:44,935 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:44,935 INFO L82 PathProgramCache]: Analyzing trace with hash 2053204377, now seen corresponding path program 2 times [2019-12-07 13:09:44,935 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:44,935 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215935513] [2019-12-07 13:09:44,935 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:44,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:45,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:45,073 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215935513] [2019-12-07 13:09:45,073 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:45,073 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:09:45,074 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430719779] [2019-12-07 13:09:45,074 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:09:45,074 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:45,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:09:45,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:09:45,074 INFO L87 Difference]: Start difference. First operand 16368 states and 52247 transitions. Second operand 10 states. [2019-12-07 13:09:45,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:45,518 INFO L93 Difference]: Finished difference Result 25059 states and 80548 transitions. [2019-12-07 13:09:45,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 13:09:45,518 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2019-12-07 13:09:45,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:45,545 INFO L225 Difference]: With dead ends: 25059 [2019-12-07 13:09:45,545 INFO L226 Difference]: Without dead ends: 21883 [2019-12-07 13:09:45,546 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=70, Invalid=272, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:09:45,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21883 states. [2019-12-07 13:09:45,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21883 to 19009. [2019-12-07 13:09:45,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19009 states. [2019-12-07 13:09:45,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19009 states to 19009 states and 60693 transitions. [2019-12-07 13:09:45,846 INFO L78 Accepts]: Start accepts. Automaton has 19009 states and 60693 transitions. Word has length 39 [2019-12-07 13:09:45,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:45,846 INFO L462 AbstractCegarLoop]: Abstraction has 19009 states and 60693 transitions. [2019-12-07 13:09:45,846 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:09:45,846 INFO L276 IsEmpty]: Start isEmpty. Operand 19009 states and 60693 transitions. [2019-12-07 13:09:45,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 13:09:45,857 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:45,857 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:45,858 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:45,858 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:45,858 INFO L82 PathProgramCache]: Analyzing trace with hash -1961307543, now seen corresponding path program 1 times [2019-12-07 13:09:45,858 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:45,858 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [400148266] [2019-12-07 13:09:45,858 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:45,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:45,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:45,913 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [400148266] [2019-12-07 13:09:45,914 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:45,914 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:09:45,914 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [239042649] [2019-12-07 13:09:45,914 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:09:45,914 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:45,914 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:09:45,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:09:45,914 INFO L87 Difference]: Start difference. First operand 19009 states and 60693 transitions. Second operand 6 states. [2019-12-07 13:09:45,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:45,960 INFO L93 Difference]: Finished difference Result 3342 states and 8386 transitions. [2019-12-07 13:09:45,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:09:45,960 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 13:09:45,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:45,962 INFO L225 Difference]: With dead ends: 3342 [2019-12-07 13:09:45,962 INFO L226 Difference]: Without dead ends: 3011 [2019-12-07 13:09:45,963 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:09:45,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3011 states. [2019-12-07 13:09:45,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3011 to 3011. [2019-12-07 13:09:45,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3011 states. [2019-12-07 13:09:45,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3011 states to 3011 states and 7460 transitions. [2019-12-07 13:09:45,991 INFO L78 Accepts]: Start accepts. Automaton has 3011 states and 7460 transitions. Word has length 40 [2019-12-07 13:09:45,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:45,991 INFO L462 AbstractCegarLoop]: Abstraction has 3011 states and 7460 transitions. [2019-12-07 13:09:45,991 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:09:45,991 INFO L276 IsEmpty]: Start isEmpty. Operand 3011 states and 7460 transitions. [2019-12-07 13:09:45,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-12-07 13:09:45,993 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:45,993 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:45,993 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:45,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:45,993 INFO L82 PathProgramCache]: Analyzing trace with hash -784185183, now seen corresponding path program 1 times [2019-12-07 13:09:45,994 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:45,994 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713132448] [2019-12-07 13:09:45,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:46,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:46,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:46,052 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [713132448] [2019-12-07 13:09:46,052 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:46,052 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:09:46,053 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1484280886] [2019-12-07 13:09:46,053 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:09:46,053 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:46,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:09:46,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:09:46,053 INFO L87 Difference]: Start difference. First operand 3011 states and 7460 transitions. Second operand 7 states. [2019-12-07 13:09:46,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:46,119 INFO L93 Difference]: Finished difference Result 1216 states and 3318 transitions. [2019-12-07 13:09:46,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:09:46,120 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48 [2019-12-07 13:09:46,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:46,121 INFO L225 Difference]: With dead ends: 1216 [2019-12-07 13:09:46,121 INFO L226 Difference]: Without dead ends: 1170 [2019-12-07 13:09:46,121 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=65, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:09:46,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1170 states. [2019-12-07 13:09:46,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1170 to 1058. [2019-12-07 13:09:46,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1058 states. [2019-12-07 13:09:46,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1058 states to 1058 states and 2908 transitions. [2019-12-07 13:09:46,132 INFO L78 Accepts]: Start accepts. Automaton has 1058 states and 2908 transitions. Word has length 48 [2019-12-07 13:09:46,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:46,132 INFO L462 AbstractCegarLoop]: Abstraction has 1058 states and 2908 transitions. [2019-12-07 13:09:46,132 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:09:46,133 INFO L276 IsEmpty]: Start isEmpty. Operand 1058 states and 2908 transitions. [2019-12-07 13:09:46,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:09:46,133 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:46,134 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:46,134 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:46,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:46,134 INFO L82 PathProgramCache]: Analyzing trace with hash -1193491105, now seen corresponding path program 1 times [2019-12-07 13:09:46,134 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:46,134 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504573443] [2019-12-07 13:09:46,134 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:46,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:46,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:46,197 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [504573443] [2019-12-07 13:09:46,197 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:46,197 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:09:46,197 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896082458] [2019-12-07 13:09:46,198 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:09:46,198 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:46,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:09:46,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:09:46,198 INFO L87 Difference]: Start difference. First operand 1058 states and 2908 transitions. Second operand 6 states. [2019-12-07 13:09:46,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:46,239 INFO L93 Difference]: Finished difference Result 1592 states and 4093 transitions. [2019-12-07 13:09:46,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:09:46,239 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2019-12-07 13:09:46,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:46,240 INFO L225 Difference]: With dead ends: 1592 [2019-12-07 13:09:46,240 INFO L226 Difference]: Without dead ends: 595 [2019-12-07 13:09:46,240 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:09:46,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 595 states. [2019-12-07 13:09:46,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 595 to 595. [2019-12-07 13:09:46,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 595 states. [2019-12-07 13:09:46,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 595 states to 595 states and 1322 transitions. [2019-12-07 13:09:46,245 INFO L78 Accepts]: Start accepts. Automaton has 595 states and 1322 transitions. Word has length 59 [2019-12-07 13:09:46,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:46,245 INFO L462 AbstractCegarLoop]: Abstraction has 595 states and 1322 transitions. [2019-12-07 13:09:46,245 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:09:46,245 INFO L276 IsEmpty]: Start isEmpty. Operand 595 states and 1322 transitions. [2019-12-07 13:09:46,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:09:46,246 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:46,246 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:46,246 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:46,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:46,246 INFO L82 PathProgramCache]: Analyzing trace with hash 1632162753, now seen corresponding path program 2 times [2019-12-07 13:09:46,246 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:46,246 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2074744573] [2019-12-07 13:09:46,247 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:46,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:46,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:46,276 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2074744573] [2019-12-07 13:09:46,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:46,276 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:09:46,276 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1372297669] [2019-12-07 13:09:46,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:09:46,277 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:46,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:09:46,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:09:46,277 INFO L87 Difference]: Start difference. First operand 595 states and 1322 transitions. Second operand 3 states. [2019-12-07 13:09:46,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:46,286 INFO L93 Difference]: Finished difference Result 572 states and 1242 transitions. [2019-12-07 13:09:46,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:09:46,287 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 13:09:46,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:46,287 INFO L225 Difference]: With dead ends: 572 [2019-12-07 13:09:46,287 INFO L226 Difference]: Without dead ends: 572 [2019-12-07 13:09:46,287 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:09:46,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2019-12-07 13:09:46,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 572. [2019-12-07 13:09:46,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 572 states. [2019-12-07 13:09:46,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 572 states to 572 states and 1242 transitions. [2019-12-07 13:09:46,292 INFO L78 Accepts]: Start accepts. Automaton has 572 states and 1242 transitions. Word has length 59 [2019-12-07 13:09:46,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:46,292 INFO L462 AbstractCegarLoop]: Abstraction has 572 states and 1242 transitions. [2019-12-07 13:09:46,292 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:09:46,293 INFO L276 IsEmpty]: Start isEmpty. Operand 572 states and 1242 transitions. [2019-12-07 13:09:46,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:09:46,293 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:46,293 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:46,293 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:46,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:46,293 INFO L82 PathProgramCache]: Analyzing trace with hash 1384719400, now seen corresponding path program 1 times [2019-12-07 13:09:46,293 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:46,294 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1220848520] [2019-12-07 13:09:46,294 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:46,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:46,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:46,778 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1220848520] [2019-12-07 13:09:46,778 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:46,778 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 13:09:46,778 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1293695132] [2019-12-07 13:09:46,779 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 13:09:46,779 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:46,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 13:09:46,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=340, Unknown=0, NotChecked=0, Total=420 [2019-12-07 13:09:46,779 INFO L87 Difference]: Start difference. First operand 572 states and 1242 transitions. Second operand 21 states. [2019-12-07 13:09:47,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:47,501 INFO L93 Difference]: Finished difference Result 1230 states and 2697 transitions. [2019-12-07 13:09:47,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 13:09:47,501 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 60 [2019-12-07 13:09:47,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:47,502 INFO L225 Difference]: With dead ends: 1230 [2019-12-07 13:09:47,502 INFO L226 Difference]: Without dead ends: 1196 [2019-12-07 13:09:47,503 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 313 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=213, Invalid=977, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 13:09:47,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1196 states. [2019-12-07 13:09:47,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1196 to 688. [2019-12-07 13:09:47,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 688 states. [2019-12-07 13:09:47,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 688 states to 688 states and 1491 transitions. [2019-12-07 13:09:47,510 INFO L78 Accepts]: Start accepts. Automaton has 688 states and 1491 transitions. Word has length 60 [2019-12-07 13:09:47,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:47,510 INFO L462 AbstractCegarLoop]: Abstraction has 688 states and 1491 transitions. [2019-12-07 13:09:47,510 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 13:09:47,510 INFO L276 IsEmpty]: Start isEmpty. Operand 688 states and 1491 transitions. [2019-12-07 13:09:47,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:09:47,511 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:47,511 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:47,511 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:47,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:47,511 INFO L82 PathProgramCache]: Analyzing trace with hash -1530067714, now seen corresponding path program 2 times [2019-12-07 13:09:47,511 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:47,512 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10041932] [2019-12-07 13:09:47,512 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:47,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:47,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:47,783 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10041932] [2019-12-07 13:09:47,783 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:47,783 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 13:09:47,783 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1776946942] [2019-12-07 13:09:47,784 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 13:09:47,784 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:47,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 13:09:47,784 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=243, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:09:47,784 INFO L87 Difference]: Start difference. First operand 688 states and 1491 transitions. Second operand 18 states. [2019-12-07 13:09:48,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:48,372 INFO L93 Difference]: Finished difference Result 1188 states and 2616 transitions. [2019-12-07 13:09:48,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 13:09:48,373 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 60 [2019-12-07 13:09:48,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:48,373 INFO L225 Difference]: With dead ends: 1188 [2019-12-07 13:09:48,374 INFO L226 Difference]: Without dead ends: 1154 [2019-12-07 13:09:48,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=180, Invalid=812, Unknown=0, NotChecked=0, Total=992 [2019-12-07 13:09:48,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1154 states. [2019-12-07 13:09:48,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1154 to 762. [2019-12-07 13:09:48,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 762 states. [2019-12-07 13:09:48,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 762 states to 762 states and 1677 transitions. [2019-12-07 13:09:48,381 INFO L78 Accepts]: Start accepts. Automaton has 762 states and 1677 transitions. Word has length 60 [2019-12-07 13:09:48,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:48,381 INFO L462 AbstractCegarLoop]: Abstraction has 762 states and 1677 transitions. [2019-12-07 13:09:48,381 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 13:09:48,381 INFO L276 IsEmpty]: Start isEmpty. Operand 762 states and 1677 transitions. [2019-12-07 13:09:48,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:09:48,382 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:48,382 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:48,382 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:48,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:48,382 INFO L82 PathProgramCache]: Analyzing trace with hash -1323156580, now seen corresponding path program 3 times [2019-12-07 13:09:48,382 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:48,383 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1805451063] [2019-12-07 13:09:48,383 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:48,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:48,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:48,534 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1805451063] [2019-12-07 13:09:48,535 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:48,535 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 13:09:48,535 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1351923079] [2019-12-07 13:09:48,535 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 13:09:48,535 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:48,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 13:09:48,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:09:48,536 INFO L87 Difference]: Start difference. First operand 762 states and 1677 transitions. Second operand 12 states. [2019-12-07 13:09:48,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:48,820 INFO L93 Difference]: Finished difference Result 1095 states and 2407 transitions. [2019-12-07 13:09:48,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 13:09:48,820 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 60 [2019-12-07 13:09:48,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:48,821 INFO L225 Difference]: With dead ends: 1095 [2019-12-07 13:09:48,821 INFO L226 Difference]: Without dead ends: 1061 [2019-12-07 13:09:48,821 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=337, Unknown=0, NotChecked=0, Total=420 [2019-12-07 13:09:48,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1061 states. [2019-12-07 13:09:48,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1061 to 752. [2019-12-07 13:09:48,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 752 states. [2019-12-07 13:09:48,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 752 states to 752 states and 1641 transitions. [2019-12-07 13:09:48,828 INFO L78 Accepts]: Start accepts. Automaton has 752 states and 1641 transitions. Word has length 60 [2019-12-07 13:09:48,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:48,828 INFO L462 AbstractCegarLoop]: Abstraction has 752 states and 1641 transitions. [2019-12-07 13:09:48,828 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 13:09:48,828 INFO L276 IsEmpty]: Start isEmpty. Operand 752 states and 1641 transitions. [2019-12-07 13:09:48,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:09:48,829 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:48,829 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:48,829 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:48,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:48,829 INFO L82 PathProgramCache]: Analyzing trace with hash -713679046, now seen corresponding path program 4 times [2019-12-07 13:09:48,830 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:48,830 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1805097222] [2019-12-07 13:09:48,830 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:48,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:48,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:48,971 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1805097222] [2019-12-07 13:09:48,971 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:48,972 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 13:09:48,972 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1235907567] [2019-12-07 13:09:48,972 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:09:48,972 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:48,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:09:48,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:09:48,973 INFO L87 Difference]: Start difference. First operand 752 states and 1641 transitions. Second operand 13 states. [2019-12-07 13:09:49,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:49,293 INFO L93 Difference]: Finished difference Result 1009 states and 2185 transitions. [2019-12-07 13:09:49,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 13:09:49,294 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 13:09:49,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:49,295 INFO L225 Difference]: With dead ends: 1009 [2019-12-07 13:09:49,295 INFO L226 Difference]: Without dead ends: 975 [2019-12-07 13:09:49,295 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=95, Invalid=411, Unknown=0, NotChecked=0, Total=506 [2019-12-07 13:09:49,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 975 states. [2019-12-07 13:09:49,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 975 to 760. [2019-12-07 13:09:49,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 760 states. [2019-12-07 13:09:49,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 760 states to 760 states and 1659 transitions. [2019-12-07 13:09:49,302 INFO L78 Accepts]: Start accepts. Automaton has 760 states and 1659 transitions. Word has length 60 [2019-12-07 13:09:49,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:49,302 INFO L462 AbstractCegarLoop]: Abstraction has 760 states and 1659 transitions. [2019-12-07 13:09:49,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:09:49,302 INFO L276 IsEmpty]: Start isEmpty. Operand 760 states and 1659 transitions. [2019-12-07 13:09:49,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:09:49,303 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:49,303 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:49,303 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:49,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:49,303 INFO L82 PathProgramCache]: Analyzing trace with hash -1887301962, now seen corresponding path program 5 times [2019-12-07 13:09:49,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:49,303 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1111685745] [2019-12-07 13:09:49,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:49,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:49,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:49,516 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1111685745] [2019-12-07 13:09:49,516 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:49,516 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:09:49,516 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638340193] [2019-12-07 13:09:49,516 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:09:49,516 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:49,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:09:49,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:09:49,516 INFO L87 Difference]: Start difference. First operand 760 states and 1659 transitions. Second operand 15 states. [2019-12-07 13:09:50,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:50,022 INFO L93 Difference]: Finished difference Result 1319 states and 2850 transitions. [2019-12-07 13:09:50,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 13:09:50,022 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 60 [2019-12-07 13:09:50,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:50,023 INFO L225 Difference]: With dead ends: 1319 [2019-12-07 13:09:50,023 INFO L226 Difference]: Without dead ends: 1285 [2019-12-07 13:09:50,024 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=146, Invalid=666, Unknown=0, NotChecked=0, Total=812 [2019-12-07 13:09:50,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1285 states. [2019-12-07 13:09:50,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1285 to 780. [2019-12-07 13:09:50,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 780 states. [2019-12-07 13:09:50,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 780 states to 780 states and 1705 transitions. [2019-12-07 13:09:50,032 INFO L78 Accepts]: Start accepts. Automaton has 780 states and 1705 transitions. Word has length 60 [2019-12-07 13:09:50,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:50,032 INFO L462 AbstractCegarLoop]: Abstraction has 780 states and 1705 transitions. [2019-12-07 13:09:50,032 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:09:50,032 INFO L276 IsEmpty]: Start isEmpty. Operand 780 states and 1705 transitions. [2019-12-07 13:09:50,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:09:50,033 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:50,033 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:50,033 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:50,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:50,033 INFO L82 PathProgramCache]: Analyzing trace with hash -80830086, now seen corresponding path program 6 times [2019-12-07 13:09:50,034 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:50,034 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725330464] [2019-12-07 13:09:50,034 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:50,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:09:50,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:09:50,253 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1725330464] [2019-12-07 13:09:50,253 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:09:50,253 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 13:09:50,253 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2068375214] [2019-12-07 13:09:50,253 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 13:09:50,254 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:09:50,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 13:09:50,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2019-12-07 13:09:50,254 INFO L87 Difference]: Start difference. First operand 780 states and 1705 transitions. Second operand 16 states. [2019-12-07 13:09:50,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:09:50,906 INFO L93 Difference]: Finished difference Result 1202 states and 2624 transitions. [2019-12-07 13:09:50,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 13:09:50,906 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 60 [2019-12-07 13:09:50,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:09:50,907 INFO L225 Difference]: With dead ends: 1202 [2019-12-07 13:09:50,907 INFO L226 Difference]: Without dead ends: 1168 [2019-12-07 13:09:50,907 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 220 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=232, Invalid=1028, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 13:09:50,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1168 states. [2019-12-07 13:09:50,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1168 to 776. [2019-12-07 13:09:50,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 776 states. [2019-12-07 13:09:50,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 776 states to 776 states and 1695 transitions. [2019-12-07 13:09:50,915 INFO L78 Accepts]: Start accepts. Automaton has 776 states and 1695 transitions. Word has length 60 [2019-12-07 13:09:50,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:09:50,915 INFO L462 AbstractCegarLoop]: Abstraction has 776 states and 1695 transitions. [2019-12-07 13:09:50,915 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 13:09:50,915 INFO L276 IsEmpty]: Start isEmpty. Operand 776 states and 1695 transitions. [2019-12-07 13:09:50,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:09:50,915 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:09:50,916 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:09:50,916 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:09:50,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:09:50,916 INFO L82 PathProgramCache]: Analyzing trace with hash 483952232, now seen corresponding path program 7 times [2019-12-07 13:09:50,916 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:09:50,916 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2051069422] [2019-12-07 13:09:50,916 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:09:50,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:09:50,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:09:50,985 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 13:09:50,985 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:09:50,988 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= v_~z$r_buff1_thd1~0_136 0) (= 0 v_~__unbuffered_p3_EBX~0_151) (= |v_#memory_int_27| (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1149~0.base_21| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1149~0.base_21|) |v_ULTIMATE.start_main_~#t1149~0.offset_16| 0))) (= 0 v_~__unbuffered_p0_EAX~0_45) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= v_~__unbuffered_p3_EAX~0_151 0) (= v_~__unbuffered_cnt~0_172 0) (= v_~main$tmp_guard0~0_29 0) (= v_~z$r_buff1_thd0~0_320 0) (= v_~y~0_38 0) (= v_~z$w_buff1~0_115 0) (= 0 v_~weak$$choice0~0_17) (= v_~z$mem_tmp~0_24 0) (= v_~z$read_delayed~0_5 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t1149~0.base_21|) (= v_~z$r_buff0_thd2~0_135 0) (= 0 v_~z$r_buff1_thd3~0_221) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t1149~0.base_21| 1)) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$r_buff1_thd2~0_136 0) (= v_~z$w_buff1_used~0_340 0) (= v_~main$tmp_guard1~0_28 0) (= 0 v_~z$flush_delayed~0_43) (= v_~z$w_buff0_used~0_571 0) (= v_~b~0_164 0) (= 0 v_~z$r_buff0_thd3~0_200) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1149~0.base_21|)) (< 0 |v_#StackHeapBarrier_20|) (= 0 |v_#NULL.base_7|) (= v_~z~0_188 0) (= v_~weak$$choice2~0_123 0) (= v_~a~0_136 0) (= v_~z$r_buff0_thd0~0_374 0) (= v_~z$r_buff0_thd1~0_137 0) (= 0 v_~__unbuffered_p1_EAX~0_36) (= (store |v_#length_28| |v_ULTIMATE.start_main_~#t1149~0.base_21| 4) |v_#length_27|) (= 0 v_~z$r_buff1_thd4~0_193) (= 0 |v_ULTIMATE.start_main_~#t1149~0.offset_16|) (= v_~z$w_buff0~0_113 0) (= v_~x~0_47 0) (= 0 v_~z$r_buff0_thd4~0_323))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_28|, #length=|v_#length_28|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_80|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_136, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_40|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_35|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_27|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_16|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_32|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_49|, ~a~0=v_~a~0_136, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_374, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_45, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_36, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_323, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_151, #length=|v_#length_27|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_73|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_105|, ULTIMATE.start_main_~#t1151~0.base=|v_ULTIMATE.start_main_~#t1151~0.base_21|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_340, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_192|, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_18|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_28|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_44|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_136, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_200, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_172, ~x~0=v_~x~0_47, ULTIMATE.start_main_~#t1152~0.base=|v_ULTIMATE.start_main_~#t1152~0.base_22|, ULTIMATE.start_main_~#t1150~0.offset=|v_ULTIMATE.start_main_~#t1150~0.offset_16|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_193, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_27|, ~z$read_delayed~0=v_~z$read_delayed~0_5, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~z$w_buff1~0=v_~z$w_buff1~0_115, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_42|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_22|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_32|, ULTIMATE.start_main_~#t1150~0.base=|v_ULTIMATE.start_main_~#t1150~0.base_22|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_320, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_26|, ~y~0=v_~y~0_38, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_135, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_571, ~z$w_buff0~0=v_~z$w_buff0~0_113, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_26|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_221, ULTIMATE.start_main_~#t1149~0.offset=|v_ULTIMATE.start_main_~#t1149~0.offset_16|, ULTIMATE.start_main_~#t1152~0.offset=|v_ULTIMATE.start_main_~#t1152~0.offset_16|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_120|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ULTIMATE.start_main_~#t1149~0.base=|v_ULTIMATE.start_main_~#t1149~0.base_21|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_151, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_27|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_24|, ULTIMATE.start_main_~#t1151~0.offset=|v_ULTIMATE.start_main_~#t1151~0.offset_16|, ~b~0=v_~b~0_164, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_15|, ~z~0=v_~z~0_188, ~weak$$choice2~0=v_~weak$$choice2~0_123, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_137} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t1151~0.base, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1152~0.base, ULTIMATE.start_main_~#t1150~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1150~0.base, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t1149~0.offset, ULTIMATE.start_main_~#t1152~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1149~0.base, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1151~0.offset, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:09:50,989 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1150~0.base_12| 0)) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1150~0.base_12|)) (= |v_ULTIMATE.start_main_~#t1150~0.offset_10| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1150~0.base_12|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1150~0.base_12| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1150~0.base_12|) |v_ULTIMATE.start_main_~#t1150~0.offset_10| 1)) |v_#memory_int_21|) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1150~0.base_12| 1)) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1150~0.base_12| 4) |v_#length_21|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1150~0.offset=|v_ULTIMATE.start_main_~#t1150~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1150~0.base=|v_ULTIMATE.start_main_~#t1150~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1150~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1150~0.base] because there is no mapped edge [2019-12-07 13:09:50,989 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L837-1-->L839: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1151~0.offset_8|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1151~0.base_8| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1151~0.base_8|) |v_ULTIMATE.start_main_~#t1151~0.offset_8| 2)) |v_#memory_int_17|) (not (= 0 |v_ULTIMATE.start_main_~#t1151~0.base_8|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1151~0.base_8|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1151~0.base_8| 4)) (= (select |v_#valid_36| |v_ULTIMATE.start_main_~#t1151~0.base_8|) 0) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t1151~0.base_8| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1151~0.offset=|v_ULTIMATE.start_main_~#t1151~0.offset_8|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1151~0.base=|v_ULTIMATE.start_main_~#t1151~0.base_8|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_3|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1151~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1151~0.base, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 13:09:50,990 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L839-1-->L841: Formula: (and (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1152~0.base_12|) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1152~0.base_12| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1152~0.base_12|) |v_ULTIMATE.start_main_~#t1152~0.offset_10| 3)) |v_#memory_int_23|) (= |v_ULTIMATE.start_main_~#t1152~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1152~0.base_12|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1152~0.base_12| 4)) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1152~0.base_12| 1)) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1152~0.base_12|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1152~0.offset=|v_ULTIMATE.start_main_~#t1152~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_23|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_4|, ULTIMATE.start_main_~#t1152~0.base=|v_ULTIMATE.start_main_~#t1152~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1152~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1152~0.base] because there is no mapped edge [2019-12-07 13:09:50,990 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L4-->L812: Formula: (and (= ~b~0_In2123978896 ~__unbuffered_p3_EBX~0_Out2123978896) (= ~z$r_buff0_thd0~0_In2123978896 ~z$r_buff1_thd0~0_Out2123978896) (= ~z$r_buff1_thd3~0_Out2123978896 ~z$r_buff0_thd3~0_In2123978896) (= ~z$r_buff0_thd2~0_In2123978896 ~z$r_buff1_thd2~0_Out2123978896) (= ~z$r_buff0_thd1~0_In2123978896 ~z$r_buff1_thd1~0_Out2123978896) (= 1 ~z$r_buff0_thd4~0_Out2123978896) (= ~a~0_Out2123978896 1) (not (= 0 P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2123978896)) (= ~z$r_buff1_thd4~0_Out2123978896 ~z$r_buff0_thd4~0_In2123978896) (= ~a~0_Out2123978896 ~__unbuffered_p3_EAX~0_Out2123978896)) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2123978896, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2123978896, ~b~0=~b~0_In2123978896, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In2123978896, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2123978896, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2123978896, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2123978896} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2123978896, ~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_Out2123978896, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out2123978896, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out2123978896, ~__unbuffered_p3_EBX~0=~__unbuffered_p3_EBX~0_Out2123978896, ~a~0=~a~0_Out2123978896, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2123978896, ~b~0=~b~0_In2123978896, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out2123978896, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out2123978896, ~__unbuffered_p3_EAX~0=~__unbuffered_p3_EAX~0_Out2123978896, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out2123978896, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2123978896, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2123978896, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2123978896} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 13:09:50,991 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork0_~arg.base_18 |v_P0Thread1of1ForFork0_#in~arg.base_20|) (= v_P0Thread1of1ForFork0_~arg.offset_18 |v_P0Thread1of1ForFork0_#in~arg.offset_20|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x~0_33 v_~__unbuffered_p0_EAX~0_26) (= v_~b~0_72 1) (= v_~__unbuffered_cnt~0_115 (+ v_~__unbuffered_cnt~0_116 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_116, ~x~0=v_~x~0_33} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_26, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~b~0=v_~b~0_72, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_115, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_18, ~x~0=v_~x~0_33, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_18} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 13:09:50,991 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= v_~y~0_25 v_~__unbuffered_p1_EAX~0_14) (= v_~x~0_18 1) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y~0=v_~y~0_25} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_14, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, ~y~0=v_~y~0_25, ~x~0=v_~x~0_18, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:09:50,992 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In720055874 256))) (.cse0 (= (mod ~z$r_buff0_thd4~0_In720055874 256) 0))) (or (and (= ~z$w_buff0_used~0_In720055874 |P3Thread1of1ForFork3_#t~ite11_Out720055874|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out720055874| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In720055874, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In720055874} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In720055874, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In720055874, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out720055874|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 13:09:50,992 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L776-2-->L776-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1690536730 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1690536730 256)))) (or (and (= ~z$w_buff1~0_In-1690536730 |P2Thread1of1ForFork2_#t~ite3_Out-1690536730|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z~0_In-1690536730 |P2Thread1of1ForFork2_#t~ite3_Out-1690536730|)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1690536730, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1690536730, ~z$w_buff1~0=~z$w_buff1~0_In-1690536730, ~z~0=~z~0_In-1690536730} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-1690536730|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1690536730, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1690536730, ~z$w_buff1~0=~z$w_buff1~0_In-1690536730, ~z~0=~z~0_In-1690536730} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 13:09:50,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L776-4-->L777: Formula: (= v_~z~0_18 |v_P2Thread1of1ForFork2_#t~ite3_6|) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_6|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_7|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_5|, ~z~0=v_~z~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 13:09:50,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L777-->L777-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1702099860 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1702099860 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1702099860 |P2Thread1of1ForFork2_#t~ite5_Out-1702099860|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out-1702099860|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1702099860, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1702099860} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1702099860|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1702099860, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1702099860} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 13:09:50,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1383902662 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1383902662 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1383902662 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1383902662 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-1383902662|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-1383902662 |P2Thread1of1ForFork2_#t~ite6_Out-1383902662|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1383902662, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1383902662, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1383902662, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1383902662} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-1383902662|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1383902662, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1383902662, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1383902662, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1383902662} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 13:09:50,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1218995097 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1218995097 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite7_Out-1218995097| ~z$r_buff0_thd3~0_In-1218995097)) (and (= |P2Thread1of1ForFork2_#t~ite7_Out-1218995097| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1218995097, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1218995097} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1218995097, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1218995097, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-1218995097|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 13:09:50,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L780-->L780-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1407154415 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1407154415 256))) (.cse3 (= (mod ~z$r_buff1_thd3~0_In-1407154415 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1407154415 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite8_Out-1407154415|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In-1407154415 |P2Thread1of1ForFork2_#t~ite8_Out-1407154415|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1407154415, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1407154415, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1407154415, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1407154415} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1407154415, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1407154415, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1407154415, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1407154415, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out-1407154415|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:09:50,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L780-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork2_#t~ite8_42| v_~z$r_buff1_thd3~0_114) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_42|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_114, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_41|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:09:50,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L814-->L814-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd4~0_In-1604893785 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1604893785 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd4~0_In-1604893785 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1604893785 256) 0))) (or (and (= 0 |P3Thread1of1ForFork3_#t~ite12_Out-1604893785|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In-1604893785 |P3Thread1of1ForFork3_#t~ite12_Out-1604893785|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1604893785, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1604893785, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1604893785, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1604893785} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1604893785, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1604893785, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1604893785, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1604893785, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-1604893785|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 13:09:50,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [735] [735] L815-->L816: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-1619532252 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1619532252 256))) (.cse1 (= ~z$r_buff0_thd4~0_In-1619532252 ~z$r_buff0_thd4~0_Out-1619532252))) (or (and .cse0 .cse1) (and (not .cse0) (= 0 ~z$r_buff0_thd4~0_Out-1619532252) (not .cse2)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1619532252, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1619532252} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1619532252, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-1619532252, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-1619532252|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 13:09:50,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In761629441 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In761629441 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In761629441 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd4~0_In761629441 256)))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite14_Out761629441| ~z$r_buff1_thd4~0_In761629441) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P3Thread1of1ForFork3_#t~ite14_Out761629441|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In761629441, ~z$w_buff0_used~0=~z$w_buff0_used~0_In761629441, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In761629441, ~z$w_buff1_used~0=~z$w_buff1_used~0_In761629441} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In761629441, ~z$w_buff0_used~0=~z$w_buff0_used~0_In761629441, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out761629441|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In761629441, ~z$w_buff1_used~0=~z$w_buff1_used~0_In761629441} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 13:09:50,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_46| v_~z$r_buff1_thd4~0_102) (= v_~__unbuffered_cnt~0_106 (+ v_~__unbuffered_cnt~0_107 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_102, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_45|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_106, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 13:09:50,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L845-->L847-2: Formula: (and (or (= 0 (mod v_~z$w_buff0_used~0_79 256)) (= (mod v_~z$r_buff0_thd0~0_53 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 13:09:50,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L847-2-->L847-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite20_Out-1618586037| |ULTIMATE.start_main_#t~ite19_Out-1618586037|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1618586037 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1618586037 256)))) (or (and .cse0 (= ~z$w_buff1~0_In-1618586037 |ULTIMATE.start_main_#t~ite19_Out-1618586037|) (not .cse1) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= ~z~0_In-1618586037 |ULTIMATE.start_main_#t~ite19_Out-1618586037|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1618586037, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1618586037, ~z$w_buff1~0=~z$w_buff1~0_In-1618586037, ~z~0=~z~0_In-1618586037} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1618586037|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1618586037, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1618586037, ~z$w_buff1~0=~z$w_buff1~0_In-1618586037, ~z~0=~z~0_In-1618586037, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1618586037|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 13:09:50,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L848-->L848-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1327061332 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1327061332 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out-1327061332|)) (and (= |ULTIMATE.start_main_#t~ite21_Out-1327061332| ~z$w_buff0_used~0_In-1327061332) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1327061332, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1327061332} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1327061332, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1327061332, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1327061332|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 13:09:50,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L849-->L849-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-896575203 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-896575203 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-896575203 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-896575203 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out-896575203|)) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-896575203 |ULTIMATE.start_main_#t~ite22_Out-896575203|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-896575203, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-896575203, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-896575203, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-896575203} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-896575203, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-896575203, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-896575203, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-896575203, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-896575203|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 13:09:50,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-107296222 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-107296222 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite23_Out-107296222|)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-107296222 |ULTIMATE.start_main_#t~ite23_Out-107296222|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-107296222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-107296222} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-107296222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-107296222, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-107296222|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 13:09:50,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L851-->L851-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1584577094 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1584577094 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1584577094 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-1584577094 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite24_Out-1584577094| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite24_Out-1584577094| ~z$r_buff1_thd0~0_In-1584577094) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1584577094, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1584577094, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1584577094, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1584577094} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1584577094, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1584577094, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1584577094, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1584577094|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1584577094} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 13:09:50,999 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L861-->L861-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1098635954 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite37_Out-1098635954| |ULTIMATE.start_main_#t~ite36_Out-1098635954|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1098635954 256) 0))) (or (and (= 0 (mod ~z$r_buff1_thd0~0_In-1098635954 256)) .cse1) (and (= 0 (mod ~z$w_buff1_used~0_In-1098635954 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-1098635954 256)))) (= ~z$w_buff0_used~0_In-1098635954 |ULTIMATE.start_main_#t~ite36_Out-1098635954|)) (and (= |ULTIMATE.start_main_#t~ite36_In-1098635954| |ULTIMATE.start_main_#t~ite36_Out-1098635954|) (not .cse0) (= ~z$w_buff0_used~0_In-1098635954 |ULTIMATE.start_main_#t~ite37_Out-1098635954|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1098635954, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1098635954, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1098635954, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1098635954, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_In-1098635954|, ~weak$$choice2~0=~weak$$choice2~0_In-1098635954} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1098635954, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1098635954, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1098635954, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1098635954, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-1098635954|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-1098635954|, ~weak$$choice2~0=~weak$$choice2~0_In-1098635954} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 13:09:50,999 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L862-->L862-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-493917411 256)))) (or (and (= |ULTIMATE.start_main_#t~ite39_Out-493917411| |ULTIMATE.start_main_#t~ite40_Out-493917411|) (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-493917411 256) 0))) (or (and (= 0 (mod ~z$r_buff1_thd0~0_In-493917411 256)) .cse0) (and (= (mod ~z$w_buff1_used~0_In-493917411 256) 0) .cse0) (= 0 (mod ~z$w_buff0_used~0_In-493917411 256)))) (= |ULTIMATE.start_main_#t~ite39_Out-493917411| ~z$w_buff1_used~0_In-493917411) .cse1) (and (= ~z$w_buff1_used~0_In-493917411 |ULTIMATE.start_main_#t~ite40_Out-493917411|) (= |ULTIMATE.start_main_#t~ite39_In-493917411| |ULTIMATE.start_main_#t~ite39_Out-493917411|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-493917411, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-493917411, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-493917411|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-493917411, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-493917411, ~weak$$choice2~0=~weak$$choice2~0_In-493917411} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-493917411, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-493917411|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-493917411|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-493917411, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-493917411, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-493917411, ~weak$$choice2~0=~weak$$choice2~0_In-493917411} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 13:09:51,000 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L863-->L864: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~z$r_buff0_thd0~0_79 v_~z$r_buff0_thd0~0_80)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_80, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_79, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_24, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 13:09:51,000 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L866-->L4: Formula: (and (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (not (= (mod v_~z$flush_delayed~0_29 256) 0)) (= v_~z$mem_tmp~0_15 v_~z~0_103) (= 0 v_~z$flush_delayed~0_28)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_29} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_15, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_28, ~z~0=v_~z~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:09:51,001 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 13:09:51,060 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:09:51 BasicIcfg [2019-12-07 13:09:51,060 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:09:51,060 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:09:51,060 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:09:51,060 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:09:51,060 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:09:19" (3/4) ... [2019-12-07 13:09:51,062 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:09:51,062 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= v_~z$r_buff1_thd1~0_136 0) (= 0 v_~__unbuffered_p3_EBX~0_151) (= |v_#memory_int_27| (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1149~0.base_21| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1149~0.base_21|) |v_ULTIMATE.start_main_~#t1149~0.offset_16| 0))) (= 0 v_~__unbuffered_p0_EAX~0_45) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= v_~__unbuffered_p3_EAX~0_151 0) (= v_~__unbuffered_cnt~0_172 0) (= v_~main$tmp_guard0~0_29 0) (= v_~z$r_buff1_thd0~0_320 0) (= v_~y~0_38 0) (= v_~z$w_buff1~0_115 0) (= 0 v_~weak$$choice0~0_17) (= v_~z$mem_tmp~0_24 0) (= v_~z$read_delayed~0_5 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t1149~0.base_21|) (= v_~z$r_buff0_thd2~0_135 0) (= 0 v_~z$r_buff1_thd3~0_221) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t1149~0.base_21| 1)) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$r_buff1_thd2~0_136 0) (= v_~z$w_buff1_used~0_340 0) (= v_~main$tmp_guard1~0_28 0) (= 0 v_~z$flush_delayed~0_43) (= v_~z$w_buff0_used~0_571 0) (= v_~b~0_164 0) (= 0 v_~z$r_buff0_thd3~0_200) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1149~0.base_21|)) (< 0 |v_#StackHeapBarrier_20|) (= 0 |v_#NULL.base_7|) (= v_~z~0_188 0) (= v_~weak$$choice2~0_123 0) (= v_~a~0_136 0) (= v_~z$r_buff0_thd0~0_374 0) (= v_~z$r_buff0_thd1~0_137 0) (= 0 v_~__unbuffered_p1_EAX~0_36) (= (store |v_#length_28| |v_ULTIMATE.start_main_~#t1149~0.base_21| 4) |v_#length_27|) (= 0 v_~z$r_buff1_thd4~0_193) (= 0 |v_ULTIMATE.start_main_~#t1149~0.offset_16|) (= v_~z$w_buff0~0_113 0) (= v_~x~0_47 0) (= 0 v_~z$r_buff0_thd4~0_323))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_28|, #length=|v_#length_28|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_80|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_136, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_40|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_35|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_27|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_16|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_32|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_49|, ~a~0=v_~a~0_136, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_374, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_45, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_36, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_323, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_151, #length=|v_#length_27|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_73|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_105|, ULTIMATE.start_main_~#t1151~0.base=|v_ULTIMATE.start_main_~#t1151~0.base_21|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_340, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_192|, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_18|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_28|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_44|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_136, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_200, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_172, ~x~0=v_~x~0_47, ULTIMATE.start_main_~#t1152~0.base=|v_ULTIMATE.start_main_~#t1152~0.base_22|, ULTIMATE.start_main_~#t1150~0.offset=|v_ULTIMATE.start_main_~#t1150~0.offset_16|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_193, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_27|, ~z$read_delayed~0=v_~z$read_delayed~0_5, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~z$w_buff1~0=v_~z$w_buff1~0_115, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_42|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_22|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_32|, ULTIMATE.start_main_~#t1150~0.base=|v_ULTIMATE.start_main_~#t1150~0.base_22|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_320, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_26|, ~y~0=v_~y~0_38, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_135, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_571, ~z$w_buff0~0=v_~z$w_buff0~0_113, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_26|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_221, ULTIMATE.start_main_~#t1149~0.offset=|v_ULTIMATE.start_main_~#t1149~0.offset_16|, ULTIMATE.start_main_~#t1152~0.offset=|v_ULTIMATE.start_main_~#t1152~0.offset_16|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_120|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ULTIMATE.start_main_~#t1149~0.base=|v_ULTIMATE.start_main_~#t1149~0.base_21|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_151, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_27|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_24|, ULTIMATE.start_main_~#t1151~0.offset=|v_ULTIMATE.start_main_~#t1151~0.offset_16|, ~b~0=v_~b~0_164, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_15|, ~z~0=v_~z~0_188, ~weak$$choice2~0=v_~weak$$choice2~0_123, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_137} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t1151~0.base, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1152~0.base, ULTIMATE.start_main_~#t1150~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1150~0.base, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t1149~0.offset, ULTIMATE.start_main_~#t1152~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1149~0.base, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1151~0.offset, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:09:51,063 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1150~0.base_12| 0)) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1150~0.base_12|)) (= |v_ULTIMATE.start_main_~#t1150~0.offset_10| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1150~0.base_12|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1150~0.base_12| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1150~0.base_12|) |v_ULTIMATE.start_main_~#t1150~0.offset_10| 1)) |v_#memory_int_21|) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1150~0.base_12| 1)) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1150~0.base_12| 4) |v_#length_21|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1150~0.offset=|v_ULTIMATE.start_main_~#t1150~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1150~0.base=|v_ULTIMATE.start_main_~#t1150~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1150~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1150~0.base] because there is no mapped edge [2019-12-07 13:09:51,063 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L837-1-->L839: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1151~0.offset_8|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1151~0.base_8| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1151~0.base_8|) |v_ULTIMATE.start_main_~#t1151~0.offset_8| 2)) |v_#memory_int_17|) (not (= 0 |v_ULTIMATE.start_main_~#t1151~0.base_8|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1151~0.base_8|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1151~0.base_8| 4)) (= (select |v_#valid_36| |v_ULTIMATE.start_main_~#t1151~0.base_8|) 0) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t1151~0.base_8| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1151~0.offset=|v_ULTIMATE.start_main_~#t1151~0.offset_8|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1151~0.base=|v_ULTIMATE.start_main_~#t1151~0.base_8|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_3|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1151~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1151~0.base, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 13:09:51,063 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L839-1-->L841: Formula: (and (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1152~0.base_12|) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1152~0.base_12| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1152~0.base_12|) |v_ULTIMATE.start_main_~#t1152~0.offset_10| 3)) |v_#memory_int_23|) (= |v_ULTIMATE.start_main_~#t1152~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1152~0.base_12|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1152~0.base_12| 4)) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1152~0.base_12| 1)) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1152~0.base_12|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1152~0.offset=|v_ULTIMATE.start_main_~#t1152~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_23|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_4|, ULTIMATE.start_main_~#t1152~0.base=|v_ULTIMATE.start_main_~#t1152~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1152~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1152~0.base] because there is no mapped edge [2019-12-07 13:09:51,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L4-->L812: Formula: (and (= ~b~0_In2123978896 ~__unbuffered_p3_EBX~0_Out2123978896) (= ~z$r_buff0_thd0~0_In2123978896 ~z$r_buff1_thd0~0_Out2123978896) (= ~z$r_buff1_thd3~0_Out2123978896 ~z$r_buff0_thd3~0_In2123978896) (= ~z$r_buff0_thd2~0_In2123978896 ~z$r_buff1_thd2~0_Out2123978896) (= ~z$r_buff0_thd1~0_In2123978896 ~z$r_buff1_thd1~0_Out2123978896) (= 1 ~z$r_buff0_thd4~0_Out2123978896) (= ~a~0_Out2123978896 1) (not (= 0 P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2123978896)) (= ~z$r_buff1_thd4~0_Out2123978896 ~z$r_buff0_thd4~0_In2123978896) (= ~a~0_Out2123978896 ~__unbuffered_p3_EAX~0_Out2123978896)) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2123978896, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2123978896, ~b~0=~b~0_In2123978896, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In2123978896, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2123978896, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2123978896, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2123978896} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2123978896, ~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_Out2123978896, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out2123978896, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out2123978896, ~__unbuffered_p3_EBX~0=~__unbuffered_p3_EBX~0_Out2123978896, ~a~0=~a~0_Out2123978896, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2123978896, ~b~0=~b~0_In2123978896, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out2123978896, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out2123978896, ~__unbuffered_p3_EAX~0=~__unbuffered_p3_EAX~0_Out2123978896, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out2123978896, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2123978896, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2123978896, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2123978896} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 13:09:51,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork0_~arg.base_18 |v_P0Thread1of1ForFork0_#in~arg.base_20|) (= v_P0Thread1of1ForFork0_~arg.offset_18 |v_P0Thread1of1ForFork0_#in~arg.offset_20|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x~0_33 v_~__unbuffered_p0_EAX~0_26) (= v_~b~0_72 1) (= v_~__unbuffered_cnt~0_115 (+ v_~__unbuffered_cnt~0_116 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_116, ~x~0=v_~x~0_33} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_26, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~b~0=v_~b~0_72, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_115, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_18, ~x~0=v_~x~0_33, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_18} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 13:09:51,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= v_~y~0_25 v_~__unbuffered_p1_EAX~0_14) (= v_~x~0_18 1) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y~0=v_~y~0_25} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_14, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, ~y~0=v_~y~0_25, ~x~0=v_~x~0_18, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:09:51,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In720055874 256))) (.cse0 (= (mod ~z$r_buff0_thd4~0_In720055874 256) 0))) (or (and (= ~z$w_buff0_used~0_In720055874 |P3Thread1of1ForFork3_#t~ite11_Out720055874|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out720055874| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In720055874, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In720055874} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In720055874, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In720055874, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out720055874|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 13:09:51,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L776-2-->L776-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1690536730 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1690536730 256)))) (or (and (= ~z$w_buff1~0_In-1690536730 |P2Thread1of1ForFork2_#t~ite3_Out-1690536730|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z~0_In-1690536730 |P2Thread1of1ForFork2_#t~ite3_Out-1690536730|)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1690536730, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1690536730, ~z$w_buff1~0=~z$w_buff1~0_In-1690536730, ~z~0=~z~0_In-1690536730} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-1690536730|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1690536730, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1690536730, ~z$w_buff1~0=~z$w_buff1~0_In-1690536730, ~z~0=~z~0_In-1690536730} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 13:09:51,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L776-4-->L777: Formula: (= v_~z~0_18 |v_P2Thread1of1ForFork2_#t~ite3_6|) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_6|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_7|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_5|, ~z~0=v_~z~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 13:09:51,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L777-->L777-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1702099860 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1702099860 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1702099860 |P2Thread1of1ForFork2_#t~ite5_Out-1702099860|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out-1702099860|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1702099860, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1702099860} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1702099860|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1702099860, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1702099860} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 13:09:51,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1383902662 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1383902662 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1383902662 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1383902662 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-1383902662|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-1383902662 |P2Thread1of1ForFork2_#t~ite6_Out-1383902662|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1383902662, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1383902662, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1383902662, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1383902662} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-1383902662|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1383902662, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1383902662, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1383902662, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1383902662} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 13:09:51,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1218995097 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1218995097 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite7_Out-1218995097| ~z$r_buff0_thd3~0_In-1218995097)) (and (= |P2Thread1of1ForFork2_#t~ite7_Out-1218995097| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1218995097, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1218995097} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1218995097, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1218995097, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-1218995097|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 13:09:51,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L780-->L780-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1407154415 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1407154415 256))) (.cse3 (= (mod ~z$r_buff1_thd3~0_In-1407154415 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1407154415 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite8_Out-1407154415|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In-1407154415 |P2Thread1of1ForFork2_#t~ite8_Out-1407154415|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1407154415, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1407154415, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1407154415, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1407154415} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1407154415, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1407154415, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1407154415, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1407154415, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out-1407154415|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:09:51,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L780-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork2_#t~ite8_42| v_~z$r_buff1_thd3~0_114) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_42|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_114, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_41|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:09:51,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L814-->L814-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd4~0_In-1604893785 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1604893785 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd4~0_In-1604893785 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1604893785 256) 0))) (or (and (= 0 |P3Thread1of1ForFork3_#t~ite12_Out-1604893785|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In-1604893785 |P3Thread1of1ForFork3_#t~ite12_Out-1604893785|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1604893785, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1604893785, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1604893785, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1604893785} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1604893785, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1604893785, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1604893785, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1604893785, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-1604893785|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 13:09:51,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [735] [735] L815-->L816: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-1619532252 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1619532252 256))) (.cse1 (= ~z$r_buff0_thd4~0_In-1619532252 ~z$r_buff0_thd4~0_Out-1619532252))) (or (and .cse0 .cse1) (and (not .cse0) (= 0 ~z$r_buff0_thd4~0_Out-1619532252) (not .cse2)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1619532252, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1619532252} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1619532252, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-1619532252, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-1619532252|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 13:09:51,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In761629441 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In761629441 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In761629441 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd4~0_In761629441 256)))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite14_Out761629441| ~z$r_buff1_thd4~0_In761629441) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P3Thread1of1ForFork3_#t~ite14_Out761629441|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In761629441, ~z$w_buff0_used~0=~z$w_buff0_used~0_In761629441, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In761629441, ~z$w_buff1_used~0=~z$w_buff1_used~0_In761629441} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In761629441, ~z$w_buff0_used~0=~z$w_buff0_used~0_In761629441, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out761629441|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In761629441, ~z$w_buff1_used~0=~z$w_buff1_used~0_In761629441} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 13:09:51,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_46| v_~z$r_buff1_thd4~0_102) (= v_~__unbuffered_cnt~0_106 (+ v_~__unbuffered_cnt~0_107 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_102, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_45|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_106, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 13:09:51,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L845-->L847-2: Formula: (and (or (= 0 (mod v_~z$w_buff0_used~0_79 256)) (= (mod v_~z$r_buff0_thd0~0_53 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 13:09:51,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L847-2-->L847-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite20_Out-1618586037| |ULTIMATE.start_main_#t~ite19_Out-1618586037|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1618586037 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1618586037 256)))) (or (and .cse0 (= ~z$w_buff1~0_In-1618586037 |ULTIMATE.start_main_#t~ite19_Out-1618586037|) (not .cse1) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= ~z~0_In-1618586037 |ULTIMATE.start_main_#t~ite19_Out-1618586037|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1618586037, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1618586037, ~z$w_buff1~0=~z$w_buff1~0_In-1618586037, ~z~0=~z~0_In-1618586037} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1618586037|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1618586037, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1618586037, ~z$w_buff1~0=~z$w_buff1~0_In-1618586037, ~z~0=~z~0_In-1618586037, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1618586037|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 13:09:51,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L848-->L848-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1327061332 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1327061332 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out-1327061332|)) (and (= |ULTIMATE.start_main_#t~ite21_Out-1327061332| ~z$w_buff0_used~0_In-1327061332) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1327061332, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1327061332} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1327061332, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1327061332, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1327061332|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 13:09:51,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L849-->L849-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-896575203 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-896575203 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-896575203 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-896575203 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out-896575203|)) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-896575203 |ULTIMATE.start_main_#t~ite22_Out-896575203|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-896575203, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-896575203, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-896575203, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-896575203} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-896575203, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-896575203, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-896575203, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-896575203, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-896575203|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 13:09:51,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-107296222 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-107296222 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite23_Out-107296222|)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-107296222 |ULTIMATE.start_main_#t~ite23_Out-107296222|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-107296222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-107296222} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-107296222, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-107296222, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-107296222|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 13:09:51,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L851-->L851-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1584577094 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1584577094 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1584577094 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-1584577094 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite24_Out-1584577094| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite24_Out-1584577094| ~z$r_buff1_thd0~0_In-1584577094) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1584577094, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1584577094, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1584577094, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1584577094} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1584577094, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1584577094, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1584577094, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1584577094|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1584577094} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 13:09:51,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L861-->L861-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1098635954 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite37_Out-1098635954| |ULTIMATE.start_main_#t~ite36_Out-1098635954|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1098635954 256) 0))) (or (and (= 0 (mod ~z$r_buff1_thd0~0_In-1098635954 256)) .cse1) (and (= 0 (mod ~z$w_buff1_used~0_In-1098635954 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-1098635954 256)))) (= ~z$w_buff0_used~0_In-1098635954 |ULTIMATE.start_main_#t~ite36_Out-1098635954|)) (and (= |ULTIMATE.start_main_#t~ite36_In-1098635954| |ULTIMATE.start_main_#t~ite36_Out-1098635954|) (not .cse0) (= ~z$w_buff0_used~0_In-1098635954 |ULTIMATE.start_main_#t~ite37_Out-1098635954|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1098635954, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1098635954, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1098635954, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1098635954, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_In-1098635954|, ~weak$$choice2~0=~weak$$choice2~0_In-1098635954} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1098635954, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1098635954, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1098635954, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1098635954, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-1098635954|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-1098635954|, ~weak$$choice2~0=~weak$$choice2~0_In-1098635954} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 13:09:51,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L862-->L862-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-493917411 256)))) (or (and (= |ULTIMATE.start_main_#t~ite39_Out-493917411| |ULTIMATE.start_main_#t~ite40_Out-493917411|) (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-493917411 256) 0))) (or (and (= 0 (mod ~z$r_buff1_thd0~0_In-493917411 256)) .cse0) (and (= (mod ~z$w_buff1_used~0_In-493917411 256) 0) .cse0) (= 0 (mod ~z$w_buff0_used~0_In-493917411 256)))) (= |ULTIMATE.start_main_#t~ite39_Out-493917411| ~z$w_buff1_used~0_In-493917411) .cse1) (and (= ~z$w_buff1_used~0_In-493917411 |ULTIMATE.start_main_#t~ite40_Out-493917411|) (= |ULTIMATE.start_main_#t~ite39_In-493917411| |ULTIMATE.start_main_#t~ite39_Out-493917411|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-493917411, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-493917411, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-493917411|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-493917411, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-493917411, ~weak$$choice2~0=~weak$$choice2~0_In-493917411} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-493917411, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-493917411|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-493917411|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-493917411, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-493917411, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-493917411, ~weak$$choice2~0=~weak$$choice2~0_In-493917411} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 13:09:51,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L863-->L864: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~z$r_buff0_thd0~0_79 v_~z$r_buff0_thd0~0_80)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_80, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_79, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_24, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 13:09:51,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L866-->L4: Formula: (and (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (not (= (mod v_~z$flush_delayed~0_29 256) 0)) (= v_~z$mem_tmp~0_15 v_~z~0_103) (= 0 v_~z$flush_delayed~0_28)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_29} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_15, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_28, ~z~0=v_~z~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:09:51,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 13:09:51,130 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_96b9b89e-5904-4458-a456-efdeaf25c58d/bin/uautomizer/witness.graphml [2019-12-07 13:09:51,130 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:09:51,131 INFO L168 Benchmark]: Toolchain (without parser) took 32630.73 ms. Allocated memory was 1.0 GB in the beginning and 3.7 GB in the end (delta: 2.7 GB). Free memory was 938.7 MB in the beginning and 2.0 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. [2019-12-07 13:09:51,131 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:09:51,132 INFO L168 Benchmark]: CACSL2BoogieTranslator took 380.58 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.4 MB). Free memory was 938.7 MB in the beginning and 1.1 GB in the end (delta: -134.4 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 13:09:51,132 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.23 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:09:51,132 INFO L168 Benchmark]: Boogie Preprocessor took 25.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:09:51,132 INFO L168 Benchmark]: RCFGBuilder took 424.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. [2019-12-07 13:09:51,133 INFO L168 Benchmark]: TraceAbstraction took 31687.86 ms. Allocated memory was 1.1 GB in the beginning and 3.7 GB in the end (delta: 2.6 GB). Free memory was 1.0 GB in the beginning and 2.1 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-12-07 13:09:51,133 INFO L168 Benchmark]: Witness Printer took 70.36 ms. Allocated memory is still 3.7 GB. Free memory was 2.1 GB in the beginning and 2.0 GB in the end (delta: 61.2 MB). Peak memory consumption was 61.2 MB. Max. memory is 11.5 GB. [2019-12-07 13:09:51,134 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 380.58 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.4 MB). Free memory was 938.7 MB in the beginning and 1.1 GB in the end (delta: -134.4 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.23 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 424.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 31687.86 ms. Allocated memory was 1.1 GB in the beginning and 3.7 GB in the end (delta: 2.6 GB). Free memory was 1.0 GB in the beginning and 2.1 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. * Witness Printer took 70.36 ms. Allocated memory is still 3.7 GB. Free memory was 2.1 GB in the beginning and 2.0 GB in the end (delta: 61.2 MB). Peak memory consumption was 61.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 182 ProgramPointsBefore, 90 ProgramPointsAfterwards, 210 TransitionsBefore, 97 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 8 FixpointIterations, 38 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 38 ConcurrentYvCompositions, 26 ChoiceCompositions, 4720 VarBasedMoverChecksPositive, 197 VarBasedMoverChecksNegative, 35 SemBasedMoverChecksPositive, 226 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 56592 CheckedPairsTotal, 126 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t1149, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1150, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L839] FCALL, FORK 0 pthread_create(&t1151, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] FCALL, FORK 0 pthread_create(&t1152, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L790] 4 z$w_buff1 = z$w_buff0 [L791] 4 z$w_buff0 = 2 [L792] 4 z$w_buff1_used = z$w_buff0_used [L793] 4 z$w_buff0_used = (_Bool)1 [L812] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L770] 3 y = 1 [L773] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L812] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L776] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L777] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L778] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L779] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L813] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L814] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L843] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L847] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L848] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L849] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L850] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L851] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L854] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L855] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L856] 0 z$flush_delayed = weak$$choice2 [L857] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L859] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L859] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L860] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L860] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L861] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L862] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L864] EXPR 0 weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L864] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L865] 0 main$tmp_guard1 = !(z == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 0 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 31.5s, OverallIterations: 24, TraceHistogramMax: 1, AutomataDifference: 10.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3161 SDtfs, 4571 SDslu, 10738 SDs, 0 SdLazy, 6118 SolverSat, 442 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 311 GetRequests, 28 SyntacticMatches, 14 SemanticMatches, 269 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1079 ImplicationChecksByTransitivity, 2.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=65578occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 12.8s AutomataMinimizationTime, 23 MinimizatonAttempts, 92432 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.1s InterpolantComputationTime, 1001 NumberOfCodeBlocks, 1001 NumberOfCodeBlocksAsserted, 24 NumberOfCheckSat, 918 ConstructedInterpolants, 0 QuantifiedInterpolants, 231750 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 23 InterpolantComputations, 23 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...