./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix043_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix043_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 052ed80493e12dc7fd2bf576cd0505f916c66ac8 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:59:33,844 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:59:33,845 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:59:33,853 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:59:33,854 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:59:33,855 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:59:33,856 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:59:33,857 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:59:33,859 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:59:33,860 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:59:33,861 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:59:33,862 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:59:33,862 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:59:33,863 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:59:33,864 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:59:33,865 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:59:33,866 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:59:33,867 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:59:33,869 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:59:33,871 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:59:33,872 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:59:33,873 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:59:33,874 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:59:33,875 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:59:33,877 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:59:33,877 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:59:33,877 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:59:33,878 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:59:33,878 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:59:33,879 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:59:33,879 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:59:33,880 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:59:33,880 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:59:33,881 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:59:33,882 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:59:33,882 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:59:33,883 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:59:33,883 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:59:33,883 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:59:33,884 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:59:33,884 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:59:33,885 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:59:33,896 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:59:33,896 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:59:33,896 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:59:33,897 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:59:33,897 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:59:33,897 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:59:33,897 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:59:33,897 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:59:33,897 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:59:33,897 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:59:33,897 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:59:33,897 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:59:33,898 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:59:33,898 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:59:33,898 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:59:33,898 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:59:33,898 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:59:33,898 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:59:33,898 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:59:33,899 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:59:33,899 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:59:33,899 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:59:33,899 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:59:33,899 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:59:33,899 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:59:33,899 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:59:33,899 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:59:33,900 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:59:33,900 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:59:33,900 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 052ed80493e12dc7fd2bf576cd0505f916c66ac8 [2019-12-07 18:59:34,010 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:59:34,020 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:59:34,023 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:59:34,024 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:59:34,025 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:59:34,025 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix043_tso.opt.i [2019-12-07 18:59:34,070 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/data/64945910d/64be84b710d547dea0ef714f3dab97fb/FLAG2d2a5213f [2019-12-07 18:59:34,441 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:59:34,441 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/sv-benchmarks/c/pthread-wmm/mix043_tso.opt.i [2019-12-07 18:59:34,452 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/data/64945910d/64be84b710d547dea0ef714f3dab97fb/FLAG2d2a5213f [2019-12-07 18:59:34,460 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/data/64945910d/64be84b710d547dea0ef714f3dab97fb [2019-12-07 18:59:34,462 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:59:34,463 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:59:34,464 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:59:34,464 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:59:34,466 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:59:34,466 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:59:34" (1/1) ... [2019-12-07 18:59:34,468 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34, skipping insertion in model container [2019-12-07 18:59:34,468 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:59:34" (1/1) ... [2019-12-07 18:59:34,473 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:59:34,501 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:59:34,776 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:59:34,786 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:59:34,841 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:59:34,891 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:59:34,892 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34 WrapperNode [2019-12-07 18:59:34,892 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:59:34,893 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:59:34,893 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:59:34,893 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:59:34,899 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34" (1/1) ... [2019-12-07 18:59:34,917 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34" (1/1) ... [2019-12-07 18:59:34,946 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:59:34,946 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:59:34,946 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:59:34,946 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:59:34,953 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34" (1/1) ... [2019-12-07 18:59:34,953 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34" (1/1) ... [2019-12-07 18:59:34,958 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34" (1/1) ... [2019-12-07 18:59:34,958 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34" (1/1) ... [2019-12-07 18:59:34,967 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34" (1/1) ... [2019-12-07 18:59:34,971 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34" (1/1) ... [2019-12-07 18:59:34,974 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34" (1/1) ... [2019-12-07 18:59:34,978 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:59:34,979 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:59:34,979 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:59:34,979 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:59:34,980 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:59:35,023 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:59:35,024 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:59:35,024 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:59:35,024 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:59:35,024 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:59:35,024 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:59:35,024 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:59:35,024 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:59:35,025 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:59:35,025 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:59:35,025 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 18:59:35,025 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 18:59:35,025 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:59:35,025 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:59:35,025 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:59:35,027 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:59:35,378 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:59:35,378 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:59:35,379 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:59:35 BoogieIcfgContainer [2019-12-07 18:59:35,379 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:59:35,380 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:59:35,380 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:59:35,382 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:59:35,382 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:59:34" (1/3) ... [2019-12-07 18:59:35,383 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@77743013 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:59:35, skipping insertion in model container [2019-12-07 18:59:35,383 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:59:34" (2/3) ... [2019-12-07 18:59:35,383 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@77743013 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:59:35, skipping insertion in model container [2019-12-07 18:59:35,383 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:59:35" (3/3) ... [2019-12-07 18:59:35,384 INFO L109 eAbstractionObserver]: Analyzing ICFG mix043_tso.opt.i [2019-12-07 18:59:35,391 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:59:35,391 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:59:35,396 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:59:35,397 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:59:35,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,423 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,423 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,424 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,424 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,424 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,424 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,425 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,425 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,425 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,426 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,426 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,426 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,426 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,426 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,426 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,426 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,427 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,427 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,427 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,427 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,427 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,427 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,427 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,428 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,429 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,429 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,429 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,429 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,429 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,429 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,430 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,430 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,431 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,431 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,431 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,431 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,431 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,431 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,431 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,432 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,432 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,432 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,432 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,432 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,432 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,432 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,432 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,432 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,432 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,433 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,433 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,433 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,433 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,433 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,433 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,433 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,434 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,434 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,434 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,434 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,434 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,434 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,434 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,434 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:59:35,447 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 18:59:35,460 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:59:35,460 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:59:35,460 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:59:35,460 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:59:35,460 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:59:35,460 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:59:35,460 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:59:35,461 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:59:35,473 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 182 places, 210 transitions [2019-12-07 18:59:35,474 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-07 18:59:35,533 INFO L134 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-07 18:59:35,534 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:59:35,543 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 469 event pairs. 12/175 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 18:59:35,554 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-07 18:59:35,581 INFO L134 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-07 18:59:35,581 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:59:35,585 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 469 event pairs. 12/175 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 18:59:35,596 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 18:59:35,597 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:59:38,710 WARN L192 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 99 [2019-12-07 18:59:38,809 INFO L206 etLargeBlockEncoding]: Checked pairs total: 56592 [2019-12-07 18:59:38,809 INFO L214 etLargeBlockEncoding]: Total number of compositions: 126 [2019-12-07 18:59:38,812 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 90 places, 97 transitions [2019-12-07 18:59:40,640 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 33838 states. [2019-12-07 18:59:40,642 INFO L276 IsEmpty]: Start isEmpty. Operand 33838 states. [2019-12-07 18:59:40,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 18:59:40,646 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:40,646 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:40,647 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:40,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:40,650 INFO L82 PathProgramCache]: Analyzing trace with hash -1752766824, now seen corresponding path program 1 times [2019-12-07 18:59:40,656 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:40,656 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544616077] [2019-12-07 18:59:40,656 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:40,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:40,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:40,810 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [544616077] [2019-12-07 18:59:40,810 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:40,810 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:59:40,811 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [779650325] [2019-12-07 18:59:40,814 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:59:40,814 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:40,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:59:40,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:59:40,824 INFO L87 Difference]: Start difference. First operand 33838 states. Second operand 3 states. [2019-12-07 18:59:41,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:41,160 INFO L93 Difference]: Finished difference Result 33638 states and 143712 transitions. [2019-12-07 18:59:41,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:59:41,161 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 18:59:41,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:41,406 INFO L225 Difference]: With dead ends: 33638 [2019-12-07 18:59:41,407 INFO L226 Difference]: Without dead ends: 32966 [2019-12-07 18:59:41,407 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:59:41,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32966 states. [2019-12-07 18:59:42,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32966 to 32966. [2019-12-07 18:59:42,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32966 states. [2019-12-07 18:59:42,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32966 states to 32966 states and 140968 transitions. [2019-12-07 18:59:42,362 INFO L78 Accepts]: Start accepts. Automaton has 32966 states and 140968 transitions. Word has length 9 [2019-12-07 18:59:42,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:42,363 INFO L462 AbstractCegarLoop]: Abstraction has 32966 states and 140968 transitions. [2019-12-07 18:59:42,363 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:59:42,363 INFO L276 IsEmpty]: Start isEmpty. Operand 32966 states and 140968 transitions. [2019-12-07 18:59:42,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:59:42,369 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:42,369 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:42,369 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:42,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:42,369 INFO L82 PathProgramCache]: Analyzing trace with hash -666575947, now seen corresponding path program 1 times [2019-12-07 18:59:42,369 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:42,370 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2067906016] [2019-12-07 18:59:42,370 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:42,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:42,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:42,429 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2067906016] [2019-12-07 18:59:42,429 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:42,429 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:59:42,429 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [775404337] [2019-12-07 18:59:42,430 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:59:42,430 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:42,431 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:59:42,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:59:42,431 INFO L87 Difference]: Start difference. First operand 32966 states and 140968 transitions. Second operand 4 states. [2019-12-07 18:59:42,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:42,855 INFO L93 Difference]: Finished difference Result 44494 states and 185824 transitions. [2019-12-07 18:59:42,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:59:42,855 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:59:42,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:43,049 INFO L225 Difference]: With dead ends: 44494 [2019-12-07 18:59:43,049 INFO L226 Difference]: Without dead ends: 44494 [2019-12-07 18:59:43,049 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:59:43,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44494 states. [2019-12-07 18:59:43,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44494 to 43986. [2019-12-07 18:59:43,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43986 states. [2019-12-07 18:59:44,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43986 states to 43986 states and 183912 transitions. [2019-12-07 18:59:44,048 INFO L78 Accepts]: Start accepts. Automaton has 43986 states and 183912 transitions. Word has length 15 [2019-12-07 18:59:44,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:44,048 INFO L462 AbstractCegarLoop]: Abstraction has 43986 states and 183912 transitions. [2019-12-07 18:59:44,048 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:59:44,048 INFO L276 IsEmpty]: Start isEmpty. Operand 43986 states and 183912 transitions. [2019-12-07 18:59:44,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:59:44,051 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:44,051 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:44,051 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:44,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:44,051 INFO L82 PathProgramCache]: Analyzing trace with hash 703479247, now seen corresponding path program 1 times [2019-12-07 18:59:44,051 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:44,051 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721564306] [2019-12-07 18:59:44,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:44,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:44,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:44,096 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721564306] [2019-12-07 18:59:44,097 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:44,097 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:59:44,097 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212028117] [2019-12-07 18:59:44,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:59:44,097 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:44,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:59:44,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:59:44,097 INFO L87 Difference]: Start difference. First operand 43986 states and 183912 transitions. Second operand 4 states. [2019-12-07 18:59:44,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:44,478 INFO L93 Difference]: Finished difference Result 62082 states and 254960 transitions. [2019-12-07 18:59:44,479 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:59:44,479 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:59:44,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:44,607 INFO L225 Difference]: With dead ends: 62082 [2019-12-07 18:59:44,607 INFO L226 Difference]: Without dead ends: 62054 [2019-12-07 18:59:44,608 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:59:45,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62054 states. [2019-12-07 18:59:45,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62054 to 51774. [2019-12-07 18:59:45,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51774 states. [2019-12-07 18:59:45,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51774 states to 51774 states and 215576 transitions. [2019-12-07 18:59:45,999 INFO L78 Accepts]: Start accepts. Automaton has 51774 states and 215576 transitions. Word has length 15 [2019-12-07 18:59:45,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:45,999 INFO L462 AbstractCegarLoop]: Abstraction has 51774 states and 215576 transitions. [2019-12-07 18:59:45,999 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:59:45,999 INFO L276 IsEmpty]: Start isEmpty. Operand 51774 states and 215576 transitions. [2019-12-07 18:59:46,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 18:59:46,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:46,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:46,009 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:46,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:46,009 INFO L82 PathProgramCache]: Analyzing trace with hash -1831569488, now seen corresponding path program 1 times [2019-12-07 18:59:46,009 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:46,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1493467385] [2019-12-07 18:59:46,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:46,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:46,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:46,066 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1493467385] [2019-12-07 18:59:46,066 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:46,066 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:59:46,066 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917202986] [2019-12-07 18:59:46,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:59:46,067 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:46,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:59:46,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:59:46,067 INFO L87 Difference]: Start difference. First operand 51774 states and 215576 transitions. Second operand 5 states. [2019-12-07 18:59:46,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:46,567 INFO L93 Difference]: Finished difference Result 68854 states and 281988 transitions. [2019-12-07 18:59:46,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:59:46,568 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 18:59:46,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:46,717 INFO L225 Difference]: With dead ends: 68854 [2019-12-07 18:59:46,717 INFO L226 Difference]: Without dead ends: 68826 [2019-12-07 18:59:46,718 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:59:47,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68826 states. [2019-12-07 18:59:47,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68826 to 51450. [2019-12-07 18:59:47,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51450 states. [2019-12-07 18:59:47,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51450 states to 51450 states and 213896 transitions. [2019-12-07 18:59:47,987 INFO L78 Accepts]: Start accepts. Automaton has 51450 states and 213896 transitions. Word has length 21 [2019-12-07 18:59:47,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:47,988 INFO L462 AbstractCegarLoop]: Abstraction has 51450 states and 213896 transitions. [2019-12-07 18:59:47,988 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:59:47,988 INFO L276 IsEmpty]: Start isEmpty. Operand 51450 states and 213896 transitions. [2019-12-07 18:59:48,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:59:48,017 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:48,017 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:48,017 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:48,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:48,017 INFO L82 PathProgramCache]: Analyzing trace with hash 2027885083, now seen corresponding path program 1 times [2019-12-07 18:59:48,017 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:48,017 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1293187336] [2019-12-07 18:59:48,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:48,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:48,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:48,054 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1293187336] [2019-12-07 18:59:48,054 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:48,054 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:59:48,054 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1294294361] [2019-12-07 18:59:48,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:59:48,055 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:48,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:59:48,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:59:48,055 INFO L87 Difference]: Start difference. First operand 51450 states and 213896 transitions. Second operand 3 states. [2019-12-07 18:59:48,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:48,351 INFO L93 Difference]: Finished difference Result 64130 states and 263832 transitions. [2019-12-07 18:59:48,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:59:48,352 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 18:59:48,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:48,493 INFO L225 Difference]: With dead ends: 64130 [2019-12-07 18:59:48,493 INFO L226 Difference]: Without dead ends: 64130 [2019-12-07 18:59:48,493 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:59:48,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64130 states. [2019-12-07 18:59:49,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64130 to 56646. [2019-12-07 18:59:49,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56646 states. [2019-12-07 18:59:49,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56646 states to 56646 states and 234808 transitions. [2019-12-07 18:59:49,785 INFO L78 Accepts]: Start accepts. Automaton has 56646 states and 234808 transitions. Word has length 29 [2019-12-07 18:59:49,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:49,785 INFO L462 AbstractCegarLoop]: Abstraction has 56646 states and 234808 transitions. [2019-12-07 18:59:49,785 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:59:49,785 INFO L276 IsEmpty]: Start isEmpty. Operand 56646 states and 234808 transitions. [2019-12-07 18:59:49,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:59:49,813 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:49,813 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:49,813 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:49,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:49,813 INFO L82 PathProgramCache]: Analyzing trace with hash 1811393886, now seen corresponding path program 1 times [2019-12-07 18:59:49,814 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:49,814 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920466667] [2019-12-07 18:59:49,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:49,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:49,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:49,868 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920466667] [2019-12-07 18:59:49,868 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:49,868 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:59:49,868 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011629275] [2019-12-07 18:59:49,868 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:59:49,869 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:49,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:59:49,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:59:49,869 INFO L87 Difference]: Start difference. First operand 56646 states and 234808 transitions. Second operand 6 states. [2019-12-07 18:59:50,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:50,399 INFO L93 Difference]: Finished difference Result 81602 states and 332376 transitions. [2019-12-07 18:59:50,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:59:50,399 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2019-12-07 18:59:50,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:50,577 INFO L225 Difference]: With dead ends: 81602 [2019-12-07 18:59:50,577 INFO L226 Difference]: Without dead ends: 81538 [2019-12-07 18:59:50,577 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:59:51,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81538 states. [2019-12-07 18:59:51,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81538 to 65578. [2019-12-07 18:59:51,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65578 states. [2019-12-07 18:59:52,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65578 states to 65578 states and 270440 transitions. [2019-12-07 18:59:52,120 INFO L78 Accepts]: Start accepts. Automaton has 65578 states and 270440 transitions. Word has length 29 [2019-12-07 18:59:52,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:52,120 INFO L462 AbstractCegarLoop]: Abstraction has 65578 states and 270440 transitions. [2019-12-07 18:59:52,121 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:59:52,121 INFO L276 IsEmpty]: Start isEmpty. Operand 65578 states and 270440 transitions. [2019-12-07 18:59:52,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 18:59:52,180 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:52,181 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:52,181 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:52,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:52,181 INFO L82 PathProgramCache]: Analyzing trace with hash -1048930675, now seen corresponding path program 1 times [2019-12-07 18:59:52,181 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:52,181 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2247127] [2019-12-07 18:59:52,181 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:52,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:52,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:52,273 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2247127] [2019-12-07 18:59:52,273 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:52,273 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:59:52,274 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [133083083] [2019-12-07 18:59:52,274 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:59:52,274 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:52,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:59:52,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:59:52,274 INFO L87 Difference]: Start difference. First operand 65578 states and 270440 transitions. Second operand 6 states. [2019-12-07 18:59:52,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:52,742 INFO L93 Difference]: Finished difference Result 81126 states and 337460 transitions. [2019-12-07 18:59:52,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:59:52,743 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2019-12-07 18:59:52,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:53,075 INFO L225 Difference]: With dead ends: 81126 [2019-12-07 18:59:53,075 INFO L226 Difference]: Without dead ends: 77806 [2019-12-07 18:59:53,076 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:59:53,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77806 states. [2019-12-07 18:59:54,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77806 to 72670. [2019-12-07 18:59:54,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72670 states. [2019-12-07 18:59:54,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72670 states to 72670 states and 301260 transitions. [2019-12-07 18:59:54,510 INFO L78 Accepts]: Start accepts. Automaton has 72670 states and 301260 transitions. Word has length 35 [2019-12-07 18:59:54,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:54,510 INFO L462 AbstractCegarLoop]: Abstraction has 72670 states and 301260 transitions. [2019-12-07 18:59:54,510 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:59:54,511 INFO L276 IsEmpty]: Start isEmpty. Operand 72670 states and 301260 transitions. [2019-12-07 18:59:54,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 18:59:54,568 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:54,568 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:54,568 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:54,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:54,569 INFO L82 PathProgramCache]: Analyzing trace with hash 1735231015, now seen corresponding path program 1 times [2019-12-07 18:59:54,569 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:54,569 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331536138] [2019-12-07 18:59:54,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:54,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:54,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:54,632 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [331536138] [2019-12-07 18:59:54,632 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:54,632 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:59:54,632 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [200189870] [2019-12-07 18:59:54,632 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:59:54,632 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:54,632 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:59:54,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:59:54,633 INFO L87 Difference]: Start difference. First operand 72670 states and 301260 transitions. Second operand 7 states. [2019-12-07 18:59:55,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:55,520 INFO L93 Difference]: Finished difference Result 97478 states and 396392 transitions. [2019-12-07 18:59:55,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:59:55,521 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 35 [2019-12-07 18:59:55,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:55,731 INFO L225 Difference]: With dead ends: 97478 [2019-12-07 18:59:55,732 INFO L226 Difference]: Without dead ends: 97062 [2019-12-07 18:59:55,732 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:59:56,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97062 states. [2019-12-07 18:59:57,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97062 to 65978. [2019-12-07 18:59:57,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65978 states. [2019-12-07 18:59:57,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65978 states to 65978 states and 274944 transitions. [2019-12-07 18:59:57,449 INFO L78 Accepts]: Start accepts. Automaton has 65978 states and 274944 transitions. Word has length 35 [2019-12-07 18:59:57,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:57,449 INFO L462 AbstractCegarLoop]: Abstraction has 65978 states and 274944 transitions. [2019-12-07 18:59:57,449 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:59:57,449 INFO L276 IsEmpty]: Start isEmpty. Operand 65978 states and 274944 transitions. [2019-12-07 18:59:57,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-12-07 18:59:57,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:57,501 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:57,502 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:57,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:57,502 INFO L82 PathProgramCache]: Analyzing trace with hash 898283378, now seen corresponding path program 1 times [2019-12-07 18:59:57,502 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:57,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511609392] [2019-12-07 18:59:57,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:57,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:57,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:57,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [511609392] [2019-12-07 18:59:57,531 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:57,531 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:59:57,531 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1670646703] [2019-12-07 18:59:57,531 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:59:57,531 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:57,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:59:57,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:59:57,532 INFO L87 Difference]: Start difference. First operand 65978 states and 274944 transitions. Second operand 3 states. [2019-12-07 18:59:57,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:57,843 INFO L93 Difference]: Finished difference Result 65978 states and 274224 transitions. [2019-12-07 18:59:57,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:59:57,844 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2019-12-07 18:59:57,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:57,988 INFO L225 Difference]: With dead ends: 65978 [2019-12-07 18:59:57,988 INFO L226 Difference]: Without dead ends: 65978 [2019-12-07 18:59:57,989 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:59:58,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65978 states. [2019-12-07 18:59:59,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65978 to 65978. [2019-12-07 18:59:59,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65978 states. [2019-12-07 18:59:59,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65978 states to 65978 states and 274224 transitions. [2019-12-07 18:59:59,411 INFO L78 Accepts]: Start accepts. Automaton has 65978 states and 274224 transitions. Word has length 36 [2019-12-07 18:59:59,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:59,411 INFO L462 AbstractCegarLoop]: Abstraction has 65978 states and 274224 transitions. [2019-12-07 18:59:59,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:59:59,411 INFO L276 IsEmpty]: Start isEmpty. Operand 65978 states and 274224 transitions. [2019-12-07 18:59:59,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 18:59:59,463 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:59,463 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:59,463 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:59,463 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:59,463 INFO L82 PathProgramCache]: Analyzing trace with hash 1363817762, now seen corresponding path program 1 times [2019-12-07 18:59:59,463 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:59,463 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379368326] [2019-12-07 18:59:59,464 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:59,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:59,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:59,557 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1379368326] [2019-12-07 18:59:59,558 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:59,558 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:59:59,558 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [239000485] [2019-12-07 18:59:59,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:59:59,558 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:59,558 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:59:59,558 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:59:59,559 INFO L87 Difference]: Start difference. First operand 65978 states and 274224 transitions. Second operand 9 states. [2019-12-07 19:00:00,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:00,304 INFO L93 Difference]: Finished difference Result 119146 states and 495152 transitions. [2019-12-07 19:00:00,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 19:00:00,305 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 37 [2019-12-07 19:00:00,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:00,540 INFO L225 Difference]: With dead ends: 119146 [2019-12-07 19:00:00,541 INFO L226 Difference]: Without dead ends: 99178 [2019-12-07 19:00:00,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=210, Unknown=0, NotChecked=0, Total=272 [2019-12-07 19:00:00,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99178 states. [2019-12-07 19:00:02,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99178 to 94581. [2019-12-07 19:00:02,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94581 states. [2019-12-07 19:00:04,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94581 states to 94581 states and 394878 transitions. [2019-12-07 19:00:04,606 INFO L78 Accepts]: Start accepts. Automaton has 94581 states and 394878 transitions. Word has length 37 [2019-12-07 19:00:04,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:04,606 INFO L462 AbstractCegarLoop]: Abstraction has 94581 states and 394878 transitions. [2019-12-07 19:00:04,606 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 19:00:04,606 INFO L276 IsEmpty]: Start isEmpty. Operand 94581 states and 394878 transitions. [2019-12-07 19:00:04,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-07 19:00:04,723 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:04,723 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:04,723 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:04,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:04,723 INFO L82 PathProgramCache]: Analyzing trace with hash -475384636, now seen corresponding path program 1 times [2019-12-07 19:00:04,723 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:04,723 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [819803088] [2019-12-07 19:00:04,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:04,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:04,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:04,847 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [819803088] [2019-12-07 19:00:04,847 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:04,847 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:00:04,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1199418698] [2019-12-07 19:00:04,847 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:00:04,847 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:04,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:00:04,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:00:04,848 INFO L87 Difference]: Start difference. First operand 94581 states and 394878 transitions. Second operand 11 states. [2019-12-07 19:00:05,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:05,974 INFO L93 Difference]: Finished difference Result 149216 states and 619958 transitions. [2019-12-07 19:00:05,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 19:00:05,975 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 38 [2019-12-07 19:00:05,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:06,288 INFO L225 Difference]: With dead ends: 149216 [2019-12-07 19:00:06,289 INFO L226 Difference]: Without dead ends: 129632 [2019-12-07 19:00:06,289 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=328, Unknown=0, NotChecked=0, Total=420 [2019-12-07 19:00:06,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129632 states. [2019-12-07 19:00:08,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129632 to 88070. [2019-12-07 19:00:08,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88070 states. [2019-12-07 19:00:08,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88070 states to 88070 states and 364104 transitions. [2019-12-07 19:00:08,369 INFO L78 Accepts]: Start accepts. Automaton has 88070 states and 364104 transitions. Word has length 38 [2019-12-07 19:00:08,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:08,370 INFO L462 AbstractCegarLoop]: Abstraction has 88070 states and 364104 transitions. [2019-12-07 19:00:08,370 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:00:08,370 INFO L276 IsEmpty]: Start isEmpty. Operand 88070 states and 364104 transitions. [2019-12-07 19:00:08,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-07 19:00:08,467 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:08,467 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:08,467 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:08,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:08,467 INFO L82 PathProgramCache]: Analyzing trace with hash 438975875, now seen corresponding path program 1 times [2019-12-07 19:00:08,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:08,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205319917] [2019-12-07 19:00:08,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:08,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:08,847 WARN L192 SmtUtils]: Spent 312.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 9 [2019-12-07 19:00:08,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:08,877 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1205319917] [2019-12-07 19:00:08,877 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:08,877 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:00:08,878 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1260046709] [2019-12-07 19:00:08,878 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:00:08,878 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:08,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:00:08,878 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:00:08,878 INFO L87 Difference]: Start difference. First operand 88070 states and 364104 transitions. Second operand 7 states. [2019-12-07 19:00:09,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:09,284 INFO L93 Difference]: Finished difference Result 78630 states and 317196 transitions. [2019-12-07 19:00:09,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:00:09,284 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 38 [2019-12-07 19:00:09,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:09,434 INFO L225 Difference]: With dead ends: 78630 [2019-12-07 19:00:09,434 INFO L226 Difference]: Without dead ends: 74870 [2019-12-07 19:00:09,435 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 5 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:00:09,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74870 states. [2019-12-07 19:00:10,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74870 to 70790. [2019-12-07 19:00:10,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70790 states. [2019-12-07 19:00:10,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70790 states to 70790 states and 287948 transitions. [2019-12-07 19:00:10,824 INFO L78 Accepts]: Start accepts. Automaton has 70790 states and 287948 transitions. Word has length 38 [2019-12-07 19:00:10,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:10,825 INFO L462 AbstractCegarLoop]: Abstraction has 70790 states and 287948 transitions. [2019-12-07 19:00:10,825 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:00:10,825 INFO L276 IsEmpty]: Start isEmpty. Operand 70790 states and 287948 transitions. [2019-12-07 19:00:10,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 19:00:10,902 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:10,902 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:10,902 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:10,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:10,902 INFO L82 PathProgramCache]: Analyzing trace with hash 922127842, now seen corresponding path program 1 times [2019-12-07 19:00:10,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:10,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [962927669] [2019-12-07 19:00:10,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:10,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:10,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:10,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [962927669] [2019-12-07 19:00:10,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:10,958 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:00:10,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [199748544] [2019-12-07 19:00:10,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:00:10,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:10,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:00:10,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:00:10,959 INFO L87 Difference]: Start difference. First operand 70790 states and 287948 transitions. Second operand 4 states. [2019-12-07 19:00:11,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:11,174 INFO L93 Difference]: Finished difference Result 56238 states and 210137 transitions. [2019-12-07 19:00:11,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:00:11,174 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2019-12-07 19:00:11,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:11,269 INFO L225 Difference]: With dead ends: 56238 [2019-12-07 19:00:11,269 INFO L226 Difference]: Without dead ends: 55066 [2019-12-07 19:00:11,270 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:00:11,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55066 states. [2019-12-07 19:00:12,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55066 to 55066. [2019-12-07 19:00:12,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55066 states. [2019-12-07 19:00:12,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55066 states to 55066 states and 206437 transitions. [2019-12-07 19:00:12,186 INFO L78 Accepts]: Start accepts. Automaton has 55066 states and 206437 transitions. Word has length 39 [2019-12-07 19:00:12,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:12,186 INFO L462 AbstractCegarLoop]: Abstraction has 55066 states and 206437 transitions. [2019-12-07 19:00:12,186 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:00:12,186 INFO L276 IsEmpty]: Start isEmpty. Operand 55066 states and 206437 transitions. [2019-12-07 19:00:12,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 19:00:12,237 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:12,237 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:12,237 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:12,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:12,237 INFO L82 PathProgramCache]: Analyzing trace with hash 1151366660, now seen corresponding path program 1 times [2019-12-07 19:00:12,237 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:12,237 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003801017] [2019-12-07 19:00:12,237 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:12,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:12,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:12,300 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2003801017] [2019-12-07 19:00:12,300 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:12,300 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:00:12,300 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058644513] [2019-12-07 19:00:12,300 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:00:12,300 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:12,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:00:12,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:00:12,300 INFO L87 Difference]: Start difference. First operand 55066 states and 206437 transitions. Second operand 6 states. [2019-12-07 19:00:12,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:12,705 INFO L93 Difference]: Finished difference Result 80768 states and 296674 transitions. [2019-12-07 19:00:12,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:00:12,706 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 19:00:12,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:12,784 INFO L225 Difference]: With dead ends: 80768 [2019-12-07 19:00:12,784 INFO L226 Difference]: Without dead ends: 45706 [2019-12-07 19:00:12,784 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:00:12,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45706 states. [2019-12-07 19:00:13,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45706 to 45706. [2019-12-07 19:00:13,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45706 states. [2019-12-07 19:00:13,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45706 states to 45706 states and 168716 transitions. [2019-12-07 19:00:13,537 INFO L78 Accepts]: Start accepts. Automaton has 45706 states and 168716 transitions. Word has length 40 [2019-12-07 19:00:13,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:13,537 INFO L462 AbstractCegarLoop]: Abstraction has 45706 states and 168716 transitions. [2019-12-07 19:00:13,537 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:00:13,537 INFO L276 IsEmpty]: Start isEmpty. Operand 45706 states and 168716 transitions. [2019-12-07 19:00:13,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 19:00:13,575 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:13,575 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:13,575 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:13,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:13,575 INFO L82 PathProgramCache]: Analyzing trace with hash 71622762, now seen corresponding path program 2 times [2019-12-07 19:00:13,575 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:13,576 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [633059942] [2019-12-07 19:00:13,576 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:13,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:13,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:13,622 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [633059942] [2019-12-07 19:00:13,623 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:13,623 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:00:13,623 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318868043] [2019-12-07 19:00:13,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:00:13,623 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:13,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:00:13,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:00:13,623 INFO L87 Difference]: Start difference. First operand 45706 states and 168716 transitions. Second operand 5 states. [2019-12-07 19:00:13,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:13,687 INFO L93 Difference]: Finished difference Result 16000 states and 49798 transitions. [2019-12-07 19:00:13,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:00:13,688 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 19:00:13,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:13,704 INFO L225 Difference]: With dead ends: 16000 [2019-12-07 19:00:13,704 INFO L226 Difference]: Without dead ends: 15146 [2019-12-07 19:00:13,704 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:00:13,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15146 states. [2019-12-07 19:00:13,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15146 to 15146. [2019-12-07 19:00:13,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15146 states. [2019-12-07 19:00:13,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15146 states to 15146 states and 47069 transitions. [2019-12-07 19:00:13,902 INFO L78 Accepts]: Start accepts. Automaton has 15146 states and 47069 transitions. Word has length 40 [2019-12-07 19:00:13,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:13,902 INFO L462 AbstractCegarLoop]: Abstraction has 15146 states and 47069 transitions. [2019-12-07 19:00:13,902 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:00:13,902 INFO L276 IsEmpty]: Start isEmpty. Operand 15146 states and 47069 transitions. [2019-12-07 19:00:13,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 19:00:13,910 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:13,910 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:13,911 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:13,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:13,911 INFO L82 PathProgramCache]: Analyzing trace with hash 1368489979, now seen corresponding path program 1 times [2019-12-07 19:00:13,911 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:13,911 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1574812183] [2019-12-07 19:00:13,911 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:13,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:13,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:13,959 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1574812183] [2019-12-07 19:00:13,959 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:13,959 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:00:13,959 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2035418168] [2019-12-07 19:00:13,959 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:00:13,959 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:13,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:00:13,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:00:13,960 INFO L87 Difference]: Start difference. First operand 15146 states and 47069 transitions. Second operand 6 states. [2019-12-07 19:00:14,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:14,006 INFO L93 Difference]: Finished difference Result 3176 states and 7971 transitions. [2019-12-07 19:00:14,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:00:14,006 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 19:00:14,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:14,008 INFO L225 Difference]: With dead ends: 3176 [2019-12-07 19:00:14,008 INFO L226 Difference]: Without dead ends: 2829 [2019-12-07 19:00:14,009 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:00:14,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2829 states. [2019-12-07 19:00:14,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2829 to 2765. [2019-12-07 19:00:14,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2765 states. [2019-12-07 19:00:14,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2765 states to 2765 states and 6785 transitions. [2019-12-07 19:00:14,032 INFO L78 Accepts]: Start accepts. Automaton has 2765 states and 6785 transitions. Word has length 41 [2019-12-07 19:00:14,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:14,032 INFO L462 AbstractCegarLoop]: Abstraction has 2765 states and 6785 transitions. [2019-12-07 19:00:14,032 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:00:14,032 INFO L276 IsEmpty]: Start isEmpty. Operand 2765 states and 6785 transitions. [2019-12-07 19:00:14,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-12-07 19:00:14,034 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:14,034 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:14,034 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:14,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:14,034 INFO L82 PathProgramCache]: Analyzing trace with hash -784185183, now seen corresponding path program 1 times [2019-12-07 19:00:14,034 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:14,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829998632] [2019-12-07 19:00:14,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:14,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:14,086 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:14,087 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829998632] [2019-12-07 19:00:14,087 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:14,087 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:00:14,087 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [539627865] [2019-12-07 19:00:14,087 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:00:14,088 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:14,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:00:14,088 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:00:14,088 INFO L87 Difference]: Start difference. First operand 2765 states and 6785 transitions. Second operand 7 states. [2019-12-07 19:00:14,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:14,161 INFO L93 Difference]: Finished difference Result 1208 states and 3304 transitions. [2019-12-07 19:00:14,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:00:14,161 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48 [2019-12-07 19:00:14,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:14,163 INFO L225 Difference]: With dead ends: 1208 [2019-12-07 19:00:14,163 INFO L226 Difference]: Without dead ends: 1162 [2019-12-07 19:00:14,163 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=65, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:00:14,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1162 states. [2019-12-07 19:00:14,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1162 to 1050. [2019-12-07 19:00:14,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1050 states. [2019-12-07 19:00:14,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1050 states to 1050 states and 2894 transitions. [2019-12-07 19:00:14,179 INFO L78 Accepts]: Start accepts. Automaton has 1050 states and 2894 transitions. Word has length 48 [2019-12-07 19:00:14,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:14,179 INFO L462 AbstractCegarLoop]: Abstraction has 1050 states and 2894 transitions. [2019-12-07 19:00:14,179 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:00:14,179 INFO L276 IsEmpty]: Start isEmpty. Operand 1050 states and 2894 transitions. [2019-12-07 19:00:14,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 19:00:14,181 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:14,181 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:14,181 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:14,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:14,181 INFO L82 PathProgramCache]: Analyzing trace with hash -1193491105, now seen corresponding path program 1 times [2019-12-07 19:00:14,181 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:14,181 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1579212465] [2019-12-07 19:00:14,181 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:14,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:14,248 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:14,248 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1579212465] [2019-12-07 19:00:14,248 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:14,248 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:00:14,248 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [542063781] [2019-12-07 19:00:14,249 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:00:14,249 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:14,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:00:14,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:00:14,249 INFO L87 Difference]: Start difference. First operand 1050 states and 2894 transitions. Second operand 6 states. [2019-12-07 19:00:14,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:14,289 INFO L93 Difference]: Finished difference Result 1576 states and 4065 transitions. [2019-12-07 19:00:14,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:00:14,289 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2019-12-07 19:00:14,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:14,290 INFO L225 Difference]: With dead ends: 1576 [2019-12-07 19:00:14,290 INFO L226 Difference]: Without dead ends: 587 [2019-12-07 19:00:14,290 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:00:14,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 587 states. [2019-12-07 19:00:14,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 587 to 587. [2019-12-07 19:00:14,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 587 states. [2019-12-07 19:00:14,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 587 states to 587 states and 1308 transitions. [2019-12-07 19:00:14,295 INFO L78 Accepts]: Start accepts. Automaton has 587 states and 1308 transitions. Word has length 59 [2019-12-07 19:00:14,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:14,295 INFO L462 AbstractCegarLoop]: Abstraction has 587 states and 1308 transitions. [2019-12-07 19:00:14,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:00:14,295 INFO L276 IsEmpty]: Start isEmpty. Operand 587 states and 1308 transitions. [2019-12-07 19:00:14,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 19:00:14,296 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:14,296 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:14,296 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:14,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:14,296 INFO L82 PathProgramCache]: Analyzing trace with hash 1632162753, now seen corresponding path program 2 times [2019-12-07 19:00:14,296 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:14,296 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294819844] [2019-12-07 19:00:14,296 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:14,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:14,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:14,333 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294819844] [2019-12-07 19:00:14,333 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:14,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:00:14,333 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1311989156] [2019-12-07 19:00:14,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:00:14,333 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:14,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:00:14,333 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:00:14,334 INFO L87 Difference]: Start difference. First operand 587 states and 1308 transitions. Second operand 3 states. [2019-12-07 19:00:14,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:14,343 INFO L93 Difference]: Finished difference Result 564 states and 1228 transitions. [2019-12-07 19:00:14,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:00:14,343 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 19:00:14,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:14,344 INFO L225 Difference]: With dead ends: 564 [2019-12-07 19:00:14,344 INFO L226 Difference]: Without dead ends: 564 [2019-12-07 19:00:14,344 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:00:14,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 564 states. [2019-12-07 19:00:14,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 564 to 564. [2019-12-07 19:00:14,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 564 states. [2019-12-07 19:00:14,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 564 states to 564 states and 1228 transitions. [2019-12-07 19:00:14,349 INFO L78 Accepts]: Start accepts. Automaton has 564 states and 1228 transitions. Word has length 59 [2019-12-07 19:00:14,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:14,349 INFO L462 AbstractCegarLoop]: Abstraction has 564 states and 1228 transitions. [2019-12-07 19:00:14,349 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:00:14,349 INFO L276 IsEmpty]: Start isEmpty. Operand 564 states and 1228 transitions. [2019-12-07 19:00:14,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 19:00:14,349 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:14,350 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:14,350 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:14,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:14,350 INFO L82 PathProgramCache]: Analyzing trace with hash 1384719400, now seen corresponding path program 1 times [2019-12-07 19:00:14,350 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:14,350 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [265576576] [2019-12-07 19:00:14,350 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:14,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:14,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:14,502 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [265576576] [2019-12-07 19:00:14,502 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:14,502 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 19:00:14,502 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1283026176] [2019-12-07 19:00:14,502 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:00:14,502 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:14,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:00:14,502 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:00:14,503 INFO L87 Difference]: Start difference. First operand 564 states and 1228 transitions. Second operand 12 states. [2019-12-07 19:00:14,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:14,757 INFO L93 Difference]: Finished difference Result 892 states and 1953 transitions. [2019-12-07 19:00:14,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 19:00:14,757 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 60 [2019-12-07 19:00:14,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:14,758 INFO L225 Difference]: With dead ends: 892 [2019-12-07 19:00:14,758 INFO L226 Difference]: Without dead ends: 709 [2019-12-07 19:00:14,759 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=337, Unknown=0, NotChecked=0, Total=420 [2019-12-07 19:00:14,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 709 states. [2019-12-07 19:00:14,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 709 to 588. [2019-12-07 19:00:14,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 588 states. [2019-12-07 19:00:14,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 588 states to 588 states and 1280 transitions. [2019-12-07 19:00:14,766 INFO L78 Accepts]: Start accepts. Automaton has 588 states and 1280 transitions. Word has length 60 [2019-12-07 19:00:14,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:14,766 INFO L462 AbstractCegarLoop]: Abstraction has 588 states and 1280 transitions. [2019-12-07 19:00:14,767 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:00:14,767 INFO L276 IsEmpty]: Start isEmpty. Operand 588 states and 1280 transitions. [2019-12-07 19:00:14,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 19:00:14,767 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:14,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:14,768 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:14,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:14,768 INFO L82 PathProgramCache]: Analyzing trace with hash -713679046, now seen corresponding path program 2 times [2019-12-07 19:00:14,768 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:14,768 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087630064] [2019-12-07 19:00:14,768 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:14,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:15,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:15,129 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1087630064] [2019-12-07 19:00:15,130 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:15,130 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 19:00:15,130 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1449094806] [2019-12-07 19:00:15,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 19:00:15,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:15,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 19:00:15,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=285, Unknown=0, NotChecked=0, Total=342 [2019-12-07 19:00:15,131 INFO L87 Difference]: Start difference. First operand 588 states and 1280 transitions. Second operand 19 states. [2019-12-07 19:00:15,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:15,987 INFO L93 Difference]: Finished difference Result 913 states and 2004 transitions. [2019-12-07 19:00:15,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 19:00:15,987 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 60 [2019-12-07 19:00:15,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:15,988 INFO L225 Difference]: With dead ends: 913 [2019-12-07 19:00:15,988 INFO L226 Difference]: Without dead ends: 770 [2019-12-07 19:00:15,989 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=268, Invalid=1292, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 19:00:15,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 770 states. [2019-12-07 19:00:15,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 770 to 582. [2019-12-07 19:00:15,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 582 states. [2019-12-07 19:00:15,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 582 states to 582 states and 1263 transitions. [2019-12-07 19:00:15,994 INFO L78 Accepts]: Start accepts. Automaton has 582 states and 1263 transitions. Word has length 60 [2019-12-07 19:00:15,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:15,994 INFO L462 AbstractCegarLoop]: Abstraction has 582 states and 1263 transitions. [2019-12-07 19:00:15,994 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 19:00:15,995 INFO L276 IsEmpty]: Start isEmpty. Operand 582 states and 1263 transitions. [2019-12-07 19:00:15,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 19:00:15,995 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:15,995 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:15,995 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:15,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:15,996 INFO L82 PathProgramCache]: Analyzing trace with hash 894658354, now seen corresponding path program 3 times [2019-12-07 19:00:15,996 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:15,996 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568024871] [2019-12-07 19:00:15,996 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:16,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:16,158 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:16,158 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1568024871] [2019-12-07 19:00:16,159 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:16,159 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:00:16,159 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1404570996] [2019-12-07 19:00:16,159 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 19:00:16,159 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:16,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 19:00:16,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:00:16,159 INFO L87 Difference]: Start difference. First operand 582 states and 1263 transitions. Second operand 14 states. [2019-12-07 19:00:16,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:16,408 INFO L93 Difference]: Finished difference Result 786 states and 1686 transitions. [2019-12-07 19:00:16,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 19:00:16,408 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 60 [2019-12-07 19:00:16,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:16,409 INFO L225 Difference]: With dead ends: 786 [2019-12-07 19:00:16,409 INFO L226 Difference]: Without dead ends: 601 [2019-12-07 19:00:16,409 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=124, Invalid=476, Unknown=0, NotChecked=0, Total=600 [2019-12-07 19:00:16,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 601 states. [2019-12-07 19:00:16,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 601 to 532. [2019-12-07 19:00:16,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 532 states. [2019-12-07 19:00:16,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 532 states to 532 states and 1146 transitions. [2019-12-07 19:00:16,414 INFO L78 Accepts]: Start accepts. Automaton has 532 states and 1146 transitions. Word has length 60 [2019-12-07 19:00:16,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:16,414 INFO L462 AbstractCegarLoop]: Abstraction has 532 states and 1146 transitions. [2019-12-07 19:00:16,414 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 19:00:16,414 INFO L276 IsEmpty]: Start isEmpty. Operand 532 states and 1146 transitions. [2019-12-07 19:00:16,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 19:00:16,415 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:16,415 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:16,415 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:16,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:16,415 INFO L82 PathProgramCache]: Analyzing trace with hash 483952232, now seen corresponding path program 4 times [2019-12-07 19:00:16,415 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:16,416 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529828021] [2019-12-07 19:00:16,416 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:16,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:00:16,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:00:16,481 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 19:00:16,481 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:00:16,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= (store |v_#length_28| |v_ULTIMATE.start_main_~#t1157~0.base_21| 4) |v_#length_27|) (= v_~z$r_buff1_thd1~0_136 0) (= 0 v_~__unbuffered_p3_EBX~0_151) (= 0 v_~__unbuffered_p0_EAX~0_45) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= v_~__unbuffered_p3_EAX~0_151 0) (= v_~__unbuffered_cnt~0_172 0) (= v_~main$tmp_guard0~0_29 0) (= v_~z$r_buff1_thd0~0_320 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1157~0.base_21|) 0) (= v_~y~0_38 0) (= v_~z$w_buff1~0_115 0) (= 0 v_~weak$$choice0~0_17) (= v_~z$mem_tmp~0_24 0) (= v_~z$read_delayed~0_5 0) (= v_~z$r_buff0_thd2~0_135 0) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t1157~0.base_21| 1)) (= 0 v_~z$r_buff1_thd3~0_221) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$r_buff1_thd2~0_136 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t1157~0.base_21|) (= v_~z$w_buff1_used~0_340 0) (= v_~main$tmp_guard1~0_28 0) (= 0 |v_ULTIMATE.start_main_~#t1157~0.offset_16|) (= 0 v_~z$flush_delayed~0_43) (= v_~z$w_buff0_used~0_571 0) (= v_~b~0_164 0) (= 0 v_~z$r_buff0_thd3~0_200) (< 0 |v_#StackHeapBarrier_20|) (= 0 |v_#NULL.base_7|) (= v_~z~0_188 0) (= v_~weak$$choice2~0_123 0) (= v_~a~0_136 0) (= v_~z$r_buff0_thd0~0_374 0) (= v_~z$r_buff0_thd1~0_137 0) (= 0 v_~__unbuffered_p1_EAX~0_36) (= 0 v_~z$r_buff1_thd4~0_193) (= v_~z$w_buff0~0_113 0) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1157~0.base_21| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1157~0.base_21|) |v_ULTIMATE.start_main_~#t1157~0.offset_16| 0)) |v_#memory_int_27|) (= v_~x~0_47 0) (= 0 v_~z$r_buff0_thd4~0_323))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_28|, #length=|v_#length_28|} OutVars{ULTIMATE.start_main_~#t1157~0.offset=|v_ULTIMATE.start_main_~#t1157~0.offset_16|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_80|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_136, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_40|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_35|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_27|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_16|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_32|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_49|, ~a~0=v_~a~0_136, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_374, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_45, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_36, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_323, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_151, #length=|v_#length_27|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_73|, ULTIMATE.start_main_~#t1157~0.base=|v_ULTIMATE.start_main_~#t1157~0.base_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_105|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_340, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_192|, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_18|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_28|, ULTIMATE.start_main_~#t1158~0.base=|v_ULTIMATE.start_main_~#t1158~0.base_22|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_44|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_136, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_200, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_172, ~x~0=v_~x~0_47, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_193, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_27|, ULTIMATE.start_main_~#t1159~0.base=|v_ULTIMATE.start_main_~#t1159~0.base_21|, ULTIMATE.start_main_~#t1160~0.offset=|v_ULTIMATE.start_main_~#t1160~0.offset_16|, ~z$read_delayed~0=v_~z$read_delayed~0_5, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~z$w_buff1~0=v_~z$w_buff1~0_115, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_42|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_22|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_32|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_320, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_26|, ~y~0=v_~y~0_38, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_135, ULTIMATE.start_main_~#t1160~0.base=|v_ULTIMATE.start_main_~#t1160~0.base_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_571, ~z$w_buff0~0=v_~z$w_buff0~0_113, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_26|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_221, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_120|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ULTIMATE.start_main_~#t1159~0.offset=|v_ULTIMATE.start_main_~#t1159~0.offset_16|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_151, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_27|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_24|, ~b~0=v_~b~0_164, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_15|, ULTIMATE.start_main_~#t1158~0.offset=|v_ULTIMATE.start_main_~#t1158~0.offset_16|, ~z~0=v_~z~0_188, ~weak$$choice2~0=v_~weak$$choice2~0_123, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_137} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1157~0.offset, ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_~#t1157~0.base, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1158~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1159~0.base, ULTIMATE.start_main_~#t1160~0.offset, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1160~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1159~0.offset, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ULTIMATE.start_main_~#t1158~0.offset, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:00:16,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1158~0.base_12| 0)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1158~0.base_12|) (= 0 |v_ULTIMATE.start_main_~#t1158~0.offset_10|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1158~0.base_12| 4)) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1158~0.base_12| 1)) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1158~0.base_12|)) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1158~0.base_12| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1158~0.base_12|) |v_ULTIMATE.start_main_~#t1158~0.offset_10| 1)) |v_#memory_int_21|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1158~0.base=|v_ULTIMATE.start_main_~#t1158~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1158~0.offset=|v_ULTIMATE.start_main_~#t1158~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1158~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1158~0.offset] because there is no mapped edge [2019-12-07 19:00:16,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L837-1-->L839: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1159~0.offset_8|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1159~0.base_8|) (not (= 0 |v_ULTIMATE.start_main_~#t1159~0.base_8|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1159~0.base_8| 4)) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t1159~0.base_8|)) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1159~0.base_8| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1159~0.base_8|) |v_ULTIMATE.start_main_~#t1159~0.offset_8| 2))) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t1159~0.base_8| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1159~0.base=|v_ULTIMATE.start_main_~#t1159~0.base_8|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_3|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1159~0.offset=|v_ULTIMATE.start_main_~#t1159~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1159~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1159~0.offset] because there is no mapped edge [2019-12-07 19:00:16,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L839-1-->L841: Formula: (and (= |v_ULTIMATE.start_main_~#t1160~0.offset_10| 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1160~0.base_12| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1160~0.base_12|) |v_ULTIMATE.start_main_~#t1160~0.offset_10| 3)) |v_#memory_int_23|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1160~0.base_12| 1)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1160~0.base_12|) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1160~0.base_12| 4)) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1160~0.base_12|)) (not (= |v_ULTIMATE.start_main_~#t1160~0.base_12| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1160~0.base=|v_ULTIMATE.start_main_~#t1160~0.base_12|, ULTIMATE.start_main_~#t1160~0.offset=|v_ULTIMATE.start_main_~#t1160~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_23|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1160~0.base, ULTIMATE.start_main_~#t1160~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-12-07 19:00:16,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L4-->L812: Formula: (and (= ~z$r_buff0_thd4~0_Out-1738544923 1) (= ~__unbuffered_p3_EBX~0_Out-1738544923 ~b~0_In-1738544923) (= ~a~0_Out-1738544923 ~__unbuffered_p3_EAX~0_Out-1738544923) (= ~z$r_buff1_thd4~0_Out-1738544923 ~z$r_buff0_thd4~0_In-1738544923) (= ~a~0_Out-1738544923 1) (= ~z$r_buff0_thd3~0_In-1738544923 ~z$r_buff1_thd3~0_Out-1738544923) (= ~z$r_buff1_thd1~0_Out-1738544923 ~z$r_buff0_thd1~0_In-1738544923) (not (= 0 P3Thread1of1ForFork3___VERIFIER_assert_~expression_In-1738544923)) (= ~z$r_buff1_thd2~0_Out-1738544923 ~z$r_buff0_thd2~0_In-1738544923) (= ~z$r_buff0_thd0~0_In-1738544923 ~z$r_buff1_thd0~0_Out-1738544923)) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In-1738544923, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1738544923, ~b~0=~b~0_In-1738544923, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1738544923, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1738544923, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1738544923, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1738544923} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In-1738544923, ~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_Out-1738544923, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-1738544923, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-1738544923, ~__unbuffered_p3_EBX~0=~__unbuffered_p3_EBX~0_Out-1738544923, ~a~0=~a~0_Out-1738544923, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1738544923, ~b~0=~b~0_In-1738544923, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-1738544923, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-1738544923, ~__unbuffered_p3_EAX~0=~__unbuffered_p3_EAX~0_Out-1738544923, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-1738544923, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1738544923, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1738544923, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1738544923} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 19:00:16,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork0_~arg.base_18 |v_P0Thread1of1ForFork0_#in~arg.base_20|) (= v_P0Thread1of1ForFork0_~arg.offset_18 |v_P0Thread1of1ForFork0_#in~arg.offset_20|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x~0_33 v_~__unbuffered_p0_EAX~0_26) (= v_~b~0_72 1) (= v_~__unbuffered_cnt~0_115 (+ v_~__unbuffered_cnt~0_116 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_116, ~x~0=v_~x~0_33} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_26, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~b~0=v_~b~0_72, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_115, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_18, ~x~0=v_~x~0_33, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_18} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 19:00:16,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= v_~y~0_25 v_~__unbuffered_p1_EAX~0_14) (= v_~x~0_18 1) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y~0=v_~y~0_25} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_14, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, ~y~0=v_~y~0_25, ~x~0=v_~x~0_18, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 19:00:16,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In374936013 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In374936013 256)))) (or (and (= ~z$w_buff0_used~0_In374936013 |P3Thread1of1ForFork3_#t~ite11_Out374936013|) (or .cse0 .cse1)) (and (= 0 |P3Thread1of1ForFork3_#t~ite11_Out374936013|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In374936013, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In374936013} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In374936013, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In374936013, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out374936013|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 19:00:16,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L776-2-->L776-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-654080605 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-654080605 256)))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-654080605 |P2Thread1of1ForFork2_#t~ite3_Out-654080605|)) (and (= ~z~0_In-654080605 |P2Thread1of1ForFork2_#t~ite3_Out-654080605|) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-654080605, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-654080605, ~z$w_buff1~0=~z$w_buff1~0_In-654080605, ~z~0=~z~0_In-654080605} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-654080605|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-654080605, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-654080605, ~z$w_buff1~0=~z$w_buff1~0_In-654080605, ~z~0=~z~0_In-654080605} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 19:00:16,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L776-4-->L777: Formula: (= v_~z~0_18 |v_P2Thread1of1ForFork2_#t~ite3_6|) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_6|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_7|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_5|, ~z~0=v_~z~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 19:00:16,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-1623597840 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1623597840 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite5_Out-1623597840| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite5_Out-1623597840| ~z$w_buff0_used~0_In-1623597840)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1623597840, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1623597840} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1623597840|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1623597840, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1623597840} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 19:00:16,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-444418147 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-444418147 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-444418147 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-444418147 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite6_Out-444418147| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P2Thread1of1ForFork2_#t~ite6_Out-444418147| ~z$w_buff1_used~0_In-444418147)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-444418147, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-444418147, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-444418147, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-444418147} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-444418147|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-444418147, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-444418147, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-444418147, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-444418147} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 19:00:16,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1063765423 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1063765423 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite7_Out-1063765423| 0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite7_Out-1063765423| ~z$r_buff0_thd3~0_In-1063765423) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1063765423, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1063765423} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1063765423, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1063765423, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-1063765423|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 19:00:16,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L780-->L780-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd3~0_In-1270986780 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1270986780 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1270986780 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1270986780 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite8_Out-1270986780|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In-1270986780 |P2Thread1of1ForFork2_#t~ite8_Out-1270986780|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1270986780, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1270986780, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1270986780, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1270986780} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1270986780, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1270986780, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1270986780, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1270986780, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out-1270986780|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 19:00:16,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L780-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork2_#t~ite8_42| v_~z$r_buff1_thd3~0_114) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_42|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_114, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_41|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 19:00:16,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd4~0_In1291462227 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In1291462227 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In1291462227 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1291462227 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite12_Out1291462227| ~z$w_buff1_used~0_In1291462227) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P3Thread1of1ForFork3_#t~ite12_Out1291462227| 0)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1291462227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1291462227, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1291462227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1291462227} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1291462227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1291462227, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1291462227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1291462227, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out1291462227|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 19:00:16,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [735] [735] L815-->L816: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1993916498 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In1993916498 256))) (.cse1 (= ~z$r_buff0_thd4~0_Out1993916498 ~z$r_buff0_thd4~0_In1993916498))) (or (and .cse0 .cse1) (and (not .cse2) (= ~z$r_buff0_thd4~0_Out1993916498 0) (not .cse0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1993916498, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1993916498} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1993916498, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out1993916498, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out1993916498|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 19:00:16,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L816-->L816-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd4~0_In-2033956694 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-2033956694 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd4~0_In-2033956694 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-2033956694 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out-2033956694| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite14_Out-2033956694| ~z$r_buff1_thd4~0_In-2033956694) (or .cse3 .cse2)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-2033956694, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2033956694, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-2033956694, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2033956694} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-2033956694, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2033956694, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-2033956694|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-2033956694, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2033956694} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 19:00:16,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_46| v_~z$r_buff1_thd4~0_102) (= v_~__unbuffered_cnt~0_106 (+ v_~__unbuffered_cnt~0_107 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_102, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_45|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_106, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 19:00:16,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L845-->L847-2: Formula: (and (or (= 0 (mod v_~z$w_buff0_used~0_79 256)) (= (mod v_~z$r_buff0_thd0~0_53 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 19:00:16,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L847-2-->L847-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1336015862 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1336015862 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite20_Out1336015862| |ULTIMATE.start_main_#t~ite19_Out1336015862|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~z$w_buff1~0_In1336015862 |ULTIMATE.start_main_#t~ite19_Out1336015862|)) (and (= ~z~0_In1336015862 |ULTIMATE.start_main_#t~ite19_Out1336015862|) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1336015862, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1336015862, ~z$w_buff1~0=~z$w_buff1~0_In1336015862, ~z~0=~z~0_In1336015862} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1336015862|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1336015862, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1336015862, ~z$w_buff1~0=~z$w_buff1~0_In1336015862, ~z~0=~z~0_In1336015862, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1336015862|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 19:00:16,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1106559730 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1106559730 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out1106559730|)) (and (= |ULTIMATE.start_main_#t~ite21_Out1106559730| ~z$w_buff0_used~0_In1106559730) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1106559730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1106559730} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1106559730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1106559730, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1106559730|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 19:00:16,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In680750930 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In680750930 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd0~0_In680750930 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In680750930 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite22_Out680750930| 0)) (and (= |ULTIMATE.start_main_#t~ite22_Out680750930| ~z$w_buff1_used~0_In680750930) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In680750930, ~z$w_buff0_used~0=~z$w_buff0_used~0_In680750930, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In680750930, ~z$w_buff1_used~0=~z$w_buff1_used~0_In680750930} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In680750930, ~z$w_buff0_used~0=~z$w_buff0_used~0_In680750930, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In680750930, ~z$w_buff1_used~0=~z$w_buff1_used~0_In680750930, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out680750930|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 19:00:16,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2130880463 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In2130880463 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite23_Out2130880463| 0)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In2130880463 |ULTIMATE.start_main_#t~ite23_Out2130880463|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2130880463, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2130880463} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2130880463, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2130880463, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out2130880463|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 19:00:16,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1044708823 256))) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-1044708823 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1044708823 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-1044708823 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite24_Out-1044708823|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In-1044708823 |ULTIMATE.start_main_#t~ite24_Out-1044708823|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1044708823, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1044708823, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1044708823, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1044708823} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1044708823, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1044708823, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1044708823, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1044708823|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1044708823} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 19:00:16,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L861-->L861-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2111742757 256) 0))) (or (and (= ~z$w_buff0_used~0_In-2111742757 |ULTIMATE.start_main_#t~ite37_Out-2111742757|) (not .cse0) (= |ULTIMATE.start_main_#t~ite36_In-2111742757| |ULTIMATE.start_main_#t~ite36_Out-2111742757|)) (and (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-2111742757 256) 0))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-2111742757 256))) (and .cse1 (= (mod ~z$w_buff1_used~0_In-2111742757 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In-2111742757 256)))) (= |ULTIMATE.start_main_#t~ite37_Out-2111742757| |ULTIMATE.start_main_#t~ite36_Out-2111742757|) .cse0 (= ~z$w_buff0_used~0_In-2111742757 |ULTIMATE.start_main_#t~ite36_Out-2111742757|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2111742757, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2111742757, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2111742757, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2111742757, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_In-2111742757|, ~weak$$choice2~0=~weak$$choice2~0_In-2111742757} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2111742757, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2111742757, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2111742757, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2111742757, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-2111742757|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-2111742757|, ~weak$$choice2~0=~weak$$choice2~0_In-2111742757} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 19:00:16,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L862-->L862-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1670342603 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_In1670342603| |ULTIMATE.start_main_#t~ite39_Out1670342603|) (= ~z$w_buff1_used~0_In1670342603 |ULTIMATE.start_main_#t~ite40_Out1670342603|)) (and (= ~z$w_buff1_used~0_In1670342603 |ULTIMATE.start_main_#t~ite39_Out1670342603|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1670342603 256) 0))) (or (= (mod ~z$w_buff0_used~0_In1670342603 256) 0) (and (= (mod ~z$w_buff1_used~0_In1670342603 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd0~0_In1670342603 256) 0) .cse1))) (= |ULTIMATE.start_main_#t~ite40_Out1670342603| |ULTIMATE.start_main_#t~ite39_Out1670342603|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1670342603, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1670342603, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In1670342603|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1670342603, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1670342603, ~weak$$choice2~0=~weak$$choice2~0_In1670342603} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1670342603, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1670342603|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1670342603|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1670342603, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1670342603, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1670342603, ~weak$$choice2~0=~weak$$choice2~0_In1670342603} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 19:00:16,495 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L863-->L864: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~z$r_buff0_thd0~0_79 v_~z$r_buff0_thd0~0_80)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_80, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_79, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_24, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 19:00:16,495 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L866-->L4: Formula: (and (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (not (= (mod v_~z$flush_delayed~0_29 256) 0)) (= v_~z$mem_tmp~0_15 v_~z~0_103) (= 0 v_~z$flush_delayed~0_28)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_29} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_15, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_28, ~z~0=v_~z~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:00:16,495 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:00:16,556 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:00:16 BasicIcfg [2019-12-07 19:00:16,556 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:00:16,556 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:00:16,556 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:00:16,556 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:00:16,557 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:59:35" (3/4) ... [2019-12-07 19:00:16,558 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:00:16,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= (store |v_#length_28| |v_ULTIMATE.start_main_~#t1157~0.base_21| 4) |v_#length_27|) (= v_~z$r_buff1_thd1~0_136 0) (= 0 v_~__unbuffered_p3_EBX~0_151) (= 0 v_~__unbuffered_p0_EAX~0_45) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= v_~__unbuffered_p3_EAX~0_151 0) (= v_~__unbuffered_cnt~0_172 0) (= v_~main$tmp_guard0~0_29 0) (= v_~z$r_buff1_thd0~0_320 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1157~0.base_21|) 0) (= v_~y~0_38 0) (= v_~z$w_buff1~0_115 0) (= 0 v_~weak$$choice0~0_17) (= v_~z$mem_tmp~0_24 0) (= v_~z$read_delayed~0_5 0) (= v_~z$r_buff0_thd2~0_135 0) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t1157~0.base_21| 1)) (= 0 v_~z$r_buff1_thd3~0_221) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$r_buff1_thd2~0_136 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t1157~0.base_21|) (= v_~z$w_buff1_used~0_340 0) (= v_~main$tmp_guard1~0_28 0) (= 0 |v_ULTIMATE.start_main_~#t1157~0.offset_16|) (= 0 v_~z$flush_delayed~0_43) (= v_~z$w_buff0_used~0_571 0) (= v_~b~0_164 0) (= 0 v_~z$r_buff0_thd3~0_200) (< 0 |v_#StackHeapBarrier_20|) (= 0 |v_#NULL.base_7|) (= v_~z~0_188 0) (= v_~weak$$choice2~0_123 0) (= v_~a~0_136 0) (= v_~z$r_buff0_thd0~0_374 0) (= v_~z$r_buff0_thd1~0_137 0) (= 0 v_~__unbuffered_p1_EAX~0_36) (= 0 v_~z$r_buff1_thd4~0_193) (= v_~z$w_buff0~0_113 0) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1157~0.base_21| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1157~0.base_21|) |v_ULTIMATE.start_main_~#t1157~0.offset_16| 0)) |v_#memory_int_27|) (= v_~x~0_47 0) (= 0 v_~z$r_buff0_thd4~0_323))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_28|, #length=|v_#length_28|} OutVars{ULTIMATE.start_main_~#t1157~0.offset=|v_ULTIMATE.start_main_~#t1157~0.offset_16|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_80|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_136, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_40|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_35|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_27|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_16|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_32|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_49|, ~a~0=v_~a~0_136, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_374, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_45, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_36, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_323, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_151, #length=|v_#length_27|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_73|, ULTIMATE.start_main_~#t1157~0.base=|v_ULTIMATE.start_main_~#t1157~0.base_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_105|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_340, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_192|, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_18|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_28|, ULTIMATE.start_main_~#t1158~0.base=|v_ULTIMATE.start_main_~#t1158~0.base_22|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_44|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_136, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_200, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_172, ~x~0=v_~x~0_47, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_193, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_27|, ULTIMATE.start_main_~#t1159~0.base=|v_ULTIMATE.start_main_~#t1159~0.base_21|, ULTIMATE.start_main_~#t1160~0.offset=|v_ULTIMATE.start_main_~#t1160~0.offset_16|, ~z$read_delayed~0=v_~z$read_delayed~0_5, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~z$w_buff1~0=v_~z$w_buff1~0_115, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_42|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_22|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_32|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_320, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_26|, ~y~0=v_~y~0_38, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_135, ULTIMATE.start_main_~#t1160~0.base=|v_ULTIMATE.start_main_~#t1160~0.base_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_571, ~z$w_buff0~0=v_~z$w_buff0~0_113, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_26|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_221, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_120|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ULTIMATE.start_main_~#t1159~0.offset=|v_ULTIMATE.start_main_~#t1159~0.offset_16|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_151, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_27|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_24|, ~b~0=v_~b~0_164, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_15|, ULTIMATE.start_main_~#t1158~0.offset=|v_ULTIMATE.start_main_~#t1158~0.offset_16|, ~z~0=v_~z~0_188, ~weak$$choice2~0=v_~weak$$choice2~0_123, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_137} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1157~0.offset, ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_~#t1157~0.base, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1158~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1159~0.base, ULTIMATE.start_main_~#t1160~0.offset, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1160~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1159~0.offset, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ULTIMATE.start_main_~#t1158~0.offset, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:00:16,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1158~0.base_12| 0)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1158~0.base_12|) (= 0 |v_ULTIMATE.start_main_~#t1158~0.offset_10|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1158~0.base_12| 4)) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1158~0.base_12| 1)) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1158~0.base_12|)) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1158~0.base_12| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1158~0.base_12|) |v_ULTIMATE.start_main_~#t1158~0.offset_10| 1)) |v_#memory_int_21|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1158~0.base=|v_ULTIMATE.start_main_~#t1158~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1158~0.offset=|v_ULTIMATE.start_main_~#t1158~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1158~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1158~0.offset] because there is no mapped edge [2019-12-07 19:00:16,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L837-1-->L839: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1159~0.offset_8|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1159~0.base_8|) (not (= 0 |v_ULTIMATE.start_main_~#t1159~0.base_8|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1159~0.base_8| 4)) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t1159~0.base_8|)) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1159~0.base_8| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1159~0.base_8|) |v_ULTIMATE.start_main_~#t1159~0.offset_8| 2))) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t1159~0.base_8| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1159~0.base=|v_ULTIMATE.start_main_~#t1159~0.base_8|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_3|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1159~0.offset=|v_ULTIMATE.start_main_~#t1159~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1159~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1159~0.offset] because there is no mapped edge [2019-12-07 19:00:16,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L839-1-->L841: Formula: (and (= |v_ULTIMATE.start_main_~#t1160~0.offset_10| 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1160~0.base_12| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1160~0.base_12|) |v_ULTIMATE.start_main_~#t1160~0.offset_10| 3)) |v_#memory_int_23|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1160~0.base_12| 1)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1160~0.base_12|) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1160~0.base_12| 4)) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1160~0.base_12|)) (not (= |v_ULTIMATE.start_main_~#t1160~0.base_12| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1160~0.base=|v_ULTIMATE.start_main_~#t1160~0.base_12|, ULTIMATE.start_main_~#t1160~0.offset=|v_ULTIMATE.start_main_~#t1160~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_23|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1160~0.base, ULTIMATE.start_main_~#t1160~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-12-07 19:00:16,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L4-->L812: Formula: (and (= ~z$r_buff0_thd4~0_Out-1738544923 1) (= ~__unbuffered_p3_EBX~0_Out-1738544923 ~b~0_In-1738544923) (= ~a~0_Out-1738544923 ~__unbuffered_p3_EAX~0_Out-1738544923) (= ~z$r_buff1_thd4~0_Out-1738544923 ~z$r_buff0_thd4~0_In-1738544923) (= ~a~0_Out-1738544923 1) (= ~z$r_buff0_thd3~0_In-1738544923 ~z$r_buff1_thd3~0_Out-1738544923) (= ~z$r_buff1_thd1~0_Out-1738544923 ~z$r_buff0_thd1~0_In-1738544923) (not (= 0 P3Thread1of1ForFork3___VERIFIER_assert_~expression_In-1738544923)) (= ~z$r_buff1_thd2~0_Out-1738544923 ~z$r_buff0_thd2~0_In-1738544923) (= ~z$r_buff0_thd0~0_In-1738544923 ~z$r_buff1_thd0~0_Out-1738544923)) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In-1738544923, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1738544923, ~b~0=~b~0_In-1738544923, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1738544923, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1738544923, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1738544923, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1738544923} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In-1738544923, ~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_Out-1738544923, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-1738544923, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-1738544923, ~__unbuffered_p3_EBX~0=~__unbuffered_p3_EBX~0_Out-1738544923, ~a~0=~a~0_Out-1738544923, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1738544923, ~b~0=~b~0_In-1738544923, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-1738544923, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-1738544923, ~__unbuffered_p3_EAX~0=~__unbuffered_p3_EAX~0_Out-1738544923, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-1738544923, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1738544923, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1738544923, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1738544923} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 19:00:16,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork0_~arg.base_18 |v_P0Thread1of1ForFork0_#in~arg.base_20|) (= v_P0Thread1of1ForFork0_~arg.offset_18 |v_P0Thread1of1ForFork0_#in~arg.offset_20|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x~0_33 v_~__unbuffered_p0_EAX~0_26) (= v_~b~0_72 1) (= v_~__unbuffered_cnt~0_115 (+ v_~__unbuffered_cnt~0_116 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_116, ~x~0=v_~x~0_33} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_26, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~b~0=v_~b~0_72, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_115, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_18, ~x~0=v_~x~0_33, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_18} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 19:00:16,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= v_~y~0_25 v_~__unbuffered_p1_EAX~0_14) (= v_~x~0_18 1) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y~0=v_~y~0_25} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_14, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, ~y~0=v_~y~0_25, ~x~0=v_~x~0_18, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 19:00:16,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In374936013 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In374936013 256)))) (or (and (= ~z$w_buff0_used~0_In374936013 |P3Thread1of1ForFork3_#t~ite11_Out374936013|) (or .cse0 .cse1)) (and (= 0 |P3Thread1of1ForFork3_#t~ite11_Out374936013|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In374936013, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In374936013} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In374936013, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In374936013, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out374936013|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 19:00:16,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L776-2-->L776-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-654080605 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-654080605 256)))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-654080605 |P2Thread1of1ForFork2_#t~ite3_Out-654080605|)) (and (= ~z~0_In-654080605 |P2Thread1of1ForFork2_#t~ite3_Out-654080605|) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-654080605, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-654080605, ~z$w_buff1~0=~z$w_buff1~0_In-654080605, ~z~0=~z~0_In-654080605} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-654080605|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-654080605, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-654080605, ~z$w_buff1~0=~z$w_buff1~0_In-654080605, ~z~0=~z~0_In-654080605} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 19:00:16,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L776-4-->L777: Formula: (= v_~z~0_18 |v_P2Thread1of1ForFork2_#t~ite3_6|) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_6|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_7|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_5|, ~z~0=v_~z~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 19:00:16,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-1623597840 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1623597840 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite5_Out-1623597840| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite5_Out-1623597840| ~z$w_buff0_used~0_In-1623597840)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1623597840, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1623597840} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1623597840|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1623597840, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1623597840} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 19:00:16,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-444418147 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-444418147 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-444418147 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-444418147 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite6_Out-444418147| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P2Thread1of1ForFork2_#t~ite6_Out-444418147| ~z$w_buff1_used~0_In-444418147)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-444418147, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-444418147, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-444418147, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-444418147} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-444418147|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-444418147, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-444418147, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-444418147, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-444418147} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 19:00:16,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1063765423 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1063765423 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite7_Out-1063765423| 0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite7_Out-1063765423| ~z$r_buff0_thd3~0_In-1063765423) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1063765423, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1063765423} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1063765423, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1063765423, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-1063765423|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 19:00:16,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L780-->L780-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd3~0_In-1270986780 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1270986780 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1270986780 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1270986780 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite8_Out-1270986780|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In-1270986780 |P2Thread1of1ForFork2_#t~ite8_Out-1270986780|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1270986780, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1270986780, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1270986780, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1270986780} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1270986780, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1270986780, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1270986780, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1270986780, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out-1270986780|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 19:00:16,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L780-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork2_#t~ite8_42| v_~z$r_buff1_thd3~0_114) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_42|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_114, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_41|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 19:00:16,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd4~0_In1291462227 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In1291462227 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In1291462227 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1291462227 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite12_Out1291462227| ~z$w_buff1_used~0_In1291462227) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P3Thread1of1ForFork3_#t~ite12_Out1291462227| 0)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1291462227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1291462227, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1291462227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1291462227} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1291462227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1291462227, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1291462227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1291462227, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out1291462227|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 19:00:16,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [735] [735] L815-->L816: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1993916498 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In1993916498 256))) (.cse1 (= ~z$r_buff0_thd4~0_Out1993916498 ~z$r_buff0_thd4~0_In1993916498))) (or (and .cse0 .cse1) (and (not .cse2) (= ~z$r_buff0_thd4~0_Out1993916498 0) (not .cse0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1993916498, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1993916498} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1993916498, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out1993916498, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out1993916498|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 19:00:16,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L816-->L816-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd4~0_In-2033956694 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-2033956694 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd4~0_In-2033956694 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-2033956694 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out-2033956694| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite14_Out-2033956694| ~z$r_buff1_thd4~0_In-2033956694) (or .cse3 .cse2)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-2033956694, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2033956694, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-2033956694, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2033956694} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-2033956694, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2033956694, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-2033956694|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-2033956694, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2033956694} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 19:00:16,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_46| v_~z$r_buff1_thd4~0_102) (= v_~__unbuffered_cnt~0_106 (+ v_~__unbuffered_cnt~0_107 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_102, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_45|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_106, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 19:00:16,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L845-->L847-2: Formula: (and (or (= 0 (mod v_~z$w_buff0_used~0_79 256)) (= (mod v_~z$r_buff0_thd0~0_53 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 19:00:16,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L847-2-->L847-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1336015862 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1336015862 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite20_Out1336015862| |ULTIMATE.start_main_#t~ite19_Out1336015862|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~z$w_buff1~0_In1336015862 |ULTIMATE.start_main_#t~ite19_Out1336015862|)) (and (= ~z~0_In1336015862 |ULTIMATE.start_main_#t~ite19_Out1336015862|) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1336015862, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1336015862, ~z$w_buff1~0=~z$w_buff1~0_In1336015862, ~z~0=~z~0_In1336015862} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1336015862|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1336015862, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1336015862, ~z$w_buff1~0=~z$w_buff1~0_In1336015862, ~z~0=~z~0_In1336015862, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1336015862|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 19:00:16,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1106559730 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1106559730 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out1106559730|)) (and (= |ULTIMATE.start_main_#t~ite21_Out1106559730| ~z$w_buff0_used~0_In1106559730) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1106559730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1106559730} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1106559730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1106559730, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1106559730|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 19:00:16,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In680750930 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In680750930 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd0~0_In680750930 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In680750930 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite22_Out680750930| 0)) (and (= |ULTIMATE.start_main_#t~ite22_Out680750930| ~z$w_buff1_used~0_In680750930) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In680750930, ~z$w_buff0_used~0=~z$w_buff0_used~0_In680750930, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In680750930, ~z$w_buff1_used~0=~z$w_buff1_used~0_In680750930} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In680750930, ~z$w_buff0_used~0=~z$w_buff0_used~0_In680750930, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In680750930, ~z$w_buff1_used~0=~z$w_buff1_used~0_In680750930, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out680750930|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 19:00:16,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2130880463 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In2130880463 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite23_Out2130880463| 0)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In2130880463 |ULTIMATE.start_main_#t~ite23_Out2130880463|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2130880463, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2130880463} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2130880463, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2130880463, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out2130880463|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 19:00:16,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1044708823 256))) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-1044708823 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1044708823 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-1044708823 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite24_Out-1044708823|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In-1044708823 |ULTIMATE.start_main_#t~ite24_Out-1044708823|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1044708823, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1044708823, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1044708823, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1044708823} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1044708823, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1044708823, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1044708823, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1044708823|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1044708823} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 19:00:16,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L861-->L861-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2111742757 256) 0))) (or (and (= ~z$w_buff0_used~0_In-2111742757 |ULTIMATE.start_main_#t~ite37_Out-2111742757|) (not .cse0) (= |ULTIMATE.start_main_#t~ite36_In-2111742757| |ULTIMATE.start_main_#t~ite36_Out-2111742757|)) (and (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-2111742757 256) 0))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-2111742757 256))) (and .cse1 (= (mod ~z$w_buff1_used~0_In-2111742757 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In-2111742757 256)))) (= |ULTIMATE.start_main_#t~ite37_Out-2111742757| |ULTIMATE.start_main_#t~ite36_Out-2111742757|) .cse0 (= ~z$w_buff0_used~0_In-2111742757 |ULTIMATE.start_main_#t~ite36_Out-2111742757|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2111742757, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2111742757, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2111742757, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2111742757, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_In-2111742757|, ~weak$$choice2~0=~weak$$choice2~0_In-2111742757} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2111742757, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2111742757, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2111742757, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2111742757, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-2111742757|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-2111742757|, ~weak$$choice2~0=~weak$$choice2~0_In-2111742757} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 19:00:16,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L862-->L862-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1670342603 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_In1670342603| |ULTIMATE.start_main_#t~ite39_Out1670342603|) (= ~z$w_buff1_used~0_In1670342603 |ULTIMATE.start_main_#t~ite40_Out1670342603|)) (and (= ~z$w_buff1_used~0_In1670342603 |ULTIMATE.start_main_#t~ite39_Out1670342603|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1670342603 256) 0))) (or (= (mod ~z$w_buff0_used~0_In1670342603 256) 0) (and (= (mod ~z$w_buff1_used~0_In1670342603 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd0~0_In1670342603 256) 0) .cse1))) (= |ULTIMATE.start_main_#t~ite40_Out1670342603| |ULTIMATE.start_main_#t~ite39_Out1670342603|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1670342603, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1670342603, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In1670342603|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1670342603, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1670342603, ~weak$$choice2~0=~weak$$choice2~0_In1670342603} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1670342603, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1670342603|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1670342603|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1670342603, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1670342603, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1670342603, ~weak$$choice2~0=~weak$$choice2~0_In1670342603} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 19:00:16,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L863-->L864: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~z$r_buff0_thd0~0_79 v_~z$r_buff0_thd0~0_80)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_80, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_79, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_24, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 19:00:16,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L866-->L4: Formula: (and (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (not (= (mod v_~z$flush_delayed~0_29 256) 0)) (= v_~z$mem_tmp~0_15 v_~z~0_103) (= 0 v_~z$flush_delayed~0_28)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_29} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_15, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_28, ~z~0=v_~z~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:00:16,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:00:16,621 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_e1de5a88-d97c-43f1-b133-bd6323a6f13d/bin/uautomizer/witness.graphml [2019-12-07 19:00:16,622 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:00:16,623 INFO L168 Benchmark]: Toolchain (without parser) took 42159.67 ms. Allocated memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: 3.7 GB). Free memory was 939.3 MB in the beginning and 1.6 GB in the end (delta: -643.5 MB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2019-12-07 19:00:16,623 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:00:16,623 INFO L168 Benchmark]: CACSL2BoogieTranslator took 428.68 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 89.7 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -116.7 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 19:00:16,623 INFO L168 Benchmark]: Boogie Procedure Inliner took 53.52 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:00:16,623 INFO L168 Benchmark]: Boogie Preprocessor took 32.29 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:00:16,624 INFO L168 Benchmark]: RCFGBuilder took 400.61 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 994.6 MB in the end (delta: 50.6 MB). Peak memory consumption was 50.6 MB. Max. memory is 11.5 GB. [2019-12-07 19:00:16,624 INFO L168 Benchmark]: TraceAbstraction took 41176.02 ms. Allocated memory was 1.1 GB in the beginning and 4.7 GB in the end (delta: 3.6 GB). Free memory was 989.3 MB in the beginning and 1.6 GB in the end (delta: -610.0 MB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2019-12-07 19:00:16,624 INFO L168 Benchmark]: Witness Printer took 65.37 ms. Allocated memory is still 4.7 GB. Free memory was 1.6 GB in the beginning and 1.6 GB in the end (delta: 16.5 MB). Peak memory consumption was 16.5 MB. Max. memory is 11.5 GB. [2019-12-07 19:00:16,625 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 428.68 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 89.7 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -116.7 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 53.52 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 32.29 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 400.61 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 994.6 MB in the end (delta: 50.6 MB). Peak memory consumption was 50.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 41176.02 ms. Allocated memory was 1.1 GB in the beginning and 4.7 GB in the end (delta: 3.6 GB). Free memory was 989.3 MB in the beginning and 1.6 GB in the end (delta: -610.0 MB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. * Witness Printer took 65.37 ms. Allocated memory is still 4.7 GB. Free memory was 1.6 GB in the beginning and 1.6 GB in the end (delta: 16.5 MB). Peak memory consumption was 16.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 182 ProgramPointsBefore, 90 ProgramPointsAfterwards, 210 TransitionsBefore, 97 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 8 FixpointIterations, 38 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 38 ConcurrentYvCompositions, 26 ChoiceCompositions, 4720 VarBasedMoverChecksPositive, 197 VarBasedMoverChecksNegative, 35 SemBasedMoverChecksPositive, 226 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 56592 CheckedPairsTotal, 126 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t1157, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1158, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L839] FCALL, FORK 0 pthread_create(&t1159, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] FCALL, FORK 0 pthread_create(&t1160, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L790] 4 z$w_buff1 = z$w_buff0 [L791] 4 z$w_buff0 = 2 [L792] 4 z$w_buff1_used = z$w_buff0_used [L793] 4 z$w_buff0_used = (_Bool)1 [L812] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L770] 3 y = 1 [L773] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L812] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L776] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L777] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L778] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L779] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L813] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L814] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L843] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L847] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L848] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L849] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L850] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L851] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L854] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L855] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L856] 0 z$flush_delayed = weak$$choice2 [L857] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L859] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L859] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L860] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L860] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L861] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L862] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L864] EXPR 0 weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L864] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L865] 0 main$tmp_guard1 = !(z == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 0 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 41.0s, OverallIterations: 23, TraceHistogramMax: 1, AutomataDifference: 11.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3001 SDtfs, 4116 SDslu, 9054 SDs, 0 SdLazy, 4281 SolverSat, 346 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 248 GetRequests, 24 SyntacticMatches, 17 SemanticMatches, 207 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 618 ImplicationChecksByTransitivity, 2.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=94581occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 21.4s AutomataMinimizationTime, 22 MinimizatonAttempts, 138621 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 903 NumberOfCodeBlocks, 903 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 821 ConstructedInterpolants, 0 QuantifiedInterpolants, 181982 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 22 InterpolantComputations, 22 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...