./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix044_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix044_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d570086bb5d98921fcfd7326e5b0ff24ba41a7b2 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:43:39,256 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:43:39,257 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:43:39,265 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:43:39,265 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:43:39,266 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:43:39,267 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:43:39,268 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:43:39,269 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:43:39,270 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:43:39,271 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:43:39,272 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:43:39,272 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:43:39,273 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:43:39,273 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:43:39,275 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:43:39,275 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:43:39,276 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:43:39,277 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:43:39,278 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:43:39,279 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:43:39,280 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:43:39,281 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:43:39,281 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:43:39,283 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:43:39,283 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:43:39,283 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:43:39,284 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:43:39,284 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:43:39,284 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:43:39,285 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:43:39,285 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:43:39,285 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:43:39,286 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:43:39,286 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:43:39,287 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:43:39,287 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:43:39,287 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:43:39,287 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:43:39,288 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:43:39,288 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:43:39,289 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:43:39,297 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:43:39,298 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:43:39,298 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:43:39,298 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:43:39,299 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:43:39,299 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:43:39,299 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:43:39,299 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:43:39,299 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:43:39,299 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:43:39,299 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:43:39,299 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:43:39,299 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:43:39,300 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:43:39,300 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:43:39,300 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:43:39,300 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:43:39,300 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:43:39,300 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:43:39,300 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:43:39,300 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:43:39,301 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:43:39,301 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:43:39,301 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:43:39,301 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:43:39,301 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:43:39,301 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:43:39,301 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:43:39,301 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:43:39,302 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d570086bb5d98921fcfd7326e5b0ff24ba41a7b2 [2019-12-07 18:43:39,409 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:43:39,417 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:43:39,419 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:43:39,420 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:43:39,420 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:43:39,421 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix044_power.opt.i [2019-12-07 18:43:39,458 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/data/03eda1d6d/449940d28d1047b0b2df11970b45b65b/FLAG49b0903cf [2019-12-07 18:43:39,958 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:43:39,959 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/sv-benchmarks/c/pthread-wmm/mix044_power.opt.i [2019-12-07 18:43:39,969 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/data/03eda1d6d/449940d28d1047b0b2df11970b45b65b/FLAG49b0903cf [2019-12-07 18:43:39,978 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/data/03eda1d6d/449940d28d1047b0b2df11970b45b65b [2019-12-07 18:43:39,980 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:43:39,981 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:43:39,982 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:43:39,982 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:43:39,984 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:43:39,985 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:43:39" (1/1) ... [2019-12-07 18:43:39,986 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@fb68fac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:39, skipping insertion in model container [2019-12-07 18:43:39,986 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:43:39" (1/1) ... [2019-12-07 18:43:39,991 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:43:40,024 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:43:40,273 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:43:40,281 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:43:40,326 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:43:40,372 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:43:40,373 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40 WrapperNode [2019-12-07 18:43:40,373 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:43:40,373 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:43:40,374 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:43:40,374 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:43:40,379 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40" (1/1) ... [2019-12-07 18:43:40,393 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40" (1/1) ... [2019-12-07 18:43:40,417 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:43:40,417 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:43:40,418 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:43:40,418 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:43:40,424 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40" (1/1) ... [2019-12-07 18:43:40,425 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40" (1/1) ... [2019-12-07 18:43:40,428 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40" (1/1) ... [2019-12-07 18:43:40,428 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40" (1/1) ... [2019-12-07 18:43:40,435 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40" (1/1) ... [2019-12-07 18:43:40,438 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40" (1/1) ... [2019-12-07 18:43:40,441 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40" (1/1) ... [2019-12-07 18:43:40,444 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:43:40,444 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:43:40,444 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:43:40,444 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:43:40,445 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:43:40,488 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:43:40,488 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:43:40,488 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:43:40,488 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:43:40,489 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:43:40,489 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:43:40,489 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:43:40,489 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:43:40,489 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:43:40,489 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:43:40,489 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 18:43:40,489 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 18:43:40,489 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:43:40,490 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:43:40,490 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:43:40,491 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:43:40,852 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:43:40,853 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:43:40,853 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:43:40 BoogieIcfgContainer [2019-12-07 18:43:40,854 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:43:40,854 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:43:40,854 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:43:40,857 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:43:40,857 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:43:39" (1/3) ... [2019-12-07 18:43:40,858 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@73fe941e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:43:40, skipping insertion in model container [2019-12-07 18:43:40,858 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:43:40" (2/3) ... [2019-12-07 18:43:40,858 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@73fe941e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:43:40, skipping insertion in model container [2019-12-07 18:43:40,858 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:43:40" (3/3) ... [2019-12-07 18:43:40,860 INFO L109 eAbstractionObserver]: Analyzing ICFG mix044_power.opt.i [2019-12-07 18:43:40,866 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:43:40,866 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:43:40,871 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:43:40,872 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:43:40,900 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,901 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,901 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,901 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,901 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,902 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,902 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,902 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,902 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,903 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,903 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,903 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,904 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,909 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,909 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,909 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,909 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,909 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,909 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,910 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,910 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,910 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,910 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,910 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,911 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,912 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,913 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,914 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:43:40,928 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 18:43:40,940 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:43:40,940 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:43:40,941 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:43:40,941 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:43:40,941 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:43:40,941 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:43:40,941 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:43:40,941 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:43:40,951 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 181 places, 209 transitions [2019-12-07 18:43:40,952 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 18:43:41,019 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 18:43:41,019 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:43:41,030 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 18:43:41,040 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 18:43:41,069 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 18:43:41,069 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:43:41,073 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 18:43:41,084 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 18:43:41,085 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:43:43,977 WARN L192 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 18:43:44,079 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 95 [2019-12-07 18:43:44,105 INFO L206 etLargeBlockEncoding]: Checked pairs total: 52490 [2019-12-07 18:43:44,105 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-12-07 18:43:44,107 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 18:43:46,040 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 37086 states. [2019-12-07 18:43:46,042 INFO L276 IsEmpty]: Start isEmpty. Operand 37086 states. [2019-12-07 18:43:46,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 18:43:46,047 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:46,047 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:46,048 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:46,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:46,051 INFO L82 PathProgramCache]: Analyzing trace with hash -1862617909, now seen corresponding path program 1 times [2019-12-07 18:43:46,057 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:46,057 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107960044] [2019-12-07 18:43:46,057 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:46,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:46,211 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:46,211 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [107960044] [2019-12-07 18:43:46,212 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:46,212 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:43:46,213 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826892464] [2019-12-07 18:43:46,215 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:43:46,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:46,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:43:46,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:46,226 INFO L87 Difference]: Start difference. First operand 37086 states. Second operand 3 states. [2019-12-07 18:43:46,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:46,567 INFO L93 Difference]: Finished difference Result 36830 states and 157144 transitions. [2019-12-07 18:43:46,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:43:46,568 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 18:43:46,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:46,771 INFO L225 Difference]: With dead ends: 36830 [2019-12-07 18:43:46,771 INFO L226 Difference]: Without dead ends: 36102 [2019-12-07 18:43:46,772 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:47,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36102 states. [2019-12-07 18:43:47,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36102 to 36102. [2019-12-07 18:43:47,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36102 states. [2019-12-07 18:43:47,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36102 states to 36102 states and 154176 transitions. [2019-12-07 18:43:47,996 INFO L78 Accepts]: Start accepts. Automaton has 36102 states and 154176 transitions. Word has length 9 [2019-12-07 18:43:47,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:47,997 INFO L462 AbstractCegarLoop]: Abstraction has 36102 states and 154176 transitions. [2019-12-07 18:43:47,997 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:43:47,998 INFO L276 IsEmpty]: Start isEmpty. Operand 36102 states and 154176 transitions. [2019-12-07 18:43:48,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:43:48,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:48,004 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:48,004 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:48,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:48,005 INFO L82 PathProgramCache]: Analyzing trace with hash 290643941, now seen corresponding path program 1 times [2019-12-07 18:43:48,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:48,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805523717] [2019-12-07 18:43:48,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:48,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:48,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:48,071 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805523717] [2019-12-07 18:43:48,071 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:48,071 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:43:48,072 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [862964082] [2019-12-07 18:43:48,073 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:43:48,073 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:48,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:43:48,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:43:48,074 INFO L87 Difference]: Start difference. First operand 36102 states and 154176 transitions. Second operand 4 states. [2019-12-07 18:43:48,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:48,496 INFO L93 Difference]: Finished difference Result 56134 states and 231868 transitions. [2019-12-07 18:43:48,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:43:48,497 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:43:48,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:48,654 INFO L225 Difference]: With dead ends: 56134 [2019-12-07 18:43:48,654 INFO L226 Difference]: Without dead ends: 56106 [2019-12-07 18:43:48,655 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:43:48,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56106 states. [2019-12-07 18:43:49,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56106 to 51222. [2019-12-07 18:43:49,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51222 states. [2019-12-07 18:43:49,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51222 states to 51222 states and 213628 transitions. [2019-12-07 18:43:49,919 INFO L78 Accepts]: Start accepts. Automaton has 51222 states and 213628 transitions. Word has length 15 [2019-12-07 18:43:49,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:49,919 INFO L462 AbstractCegarLoop]: Abstraction has 51222 states and 213628 transitions. [2019-12-07 18:43:49,919 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:43:49,919 INFO L276 IsEmpty]: Start isEmpty. Operand 51222 states and 213628 transitions. [2019-12-07 18:43:49,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:43:49,922 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:49,922 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:49,922 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:49,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:49,922 INFO L82 PathProgramCache]: Analyzing trace with hash -497322091, now seen corresponding path program 1 times [2019-12-07 18:43:49,923 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:49,923 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [128434637] [2019-12-07 18:43:49,923 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:50,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:50,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:50,116 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [128434637] [2019-12-07 18:43:50,116 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:50,117 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:43:50,117 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1880187218] [2019-12-07 18:43:50,117 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:43:50,117 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:50,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:43:50,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:43:50,117 INFO L87 Difference]: Start difference. First operand 51222 states and 213628 transitions. Second operand 4 states. [2019-12-07 18:43:50,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:50,459 INFO L93 Difference]: Finished difference Result 64218 states and 266056 transitions. [2019-12-07 18:43:50,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:43:50,460 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:43:50,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:50,605 INFO L225 Difference]: With dead ends: 64218 [2019-12-07 18:43:50,605 INFO L226 Difference]: Without dead ends: 64218 [2019-12-07 18:43:50,606 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:43:50,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64218 states. [2019-12-07 18:43:51,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64218 to 57026. [2019-12-07 18:43:51,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57026 states. [2019-12-07 18:43:51,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57026 states to 57026 states and 237588 transitions. [2019-12-07 18:43:51,933 INFO L78 Accepts]: Start accepts. Automaton has 57026 states and 237588 transitions. Word has length 15 [2019-12-07 18:43:51,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:51,933 INFO L462 AbstractCegarLoop]: Abstraction has 57026 states and 237588 transitions. [2019-12-07 18:43:51,934 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:43:51,934 INFO L276 IsEmpty]: Start isEmpty. Operand 57026 states and 237588 transitions. [2019-12-07 18:43:51,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 18:43:51,945 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:51,945 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:51,945 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:51,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:51,945 INFO L82 PathProgramCache]: Analyzing trace with hash -210168677, now seen corresponding path program 1 times [2019-12-07 18:43:51,945 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:51,945 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [956371786] [2019-12-07 18:43:51,946 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:51,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:51,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:51,997 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [956371786] [2019-12-07 18:43:51,997 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:51,997 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:43:51,997 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896976371] [2019-12-07 18:43:51,998 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:43:51,998 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:51,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:43:51,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:43:51,998 INFO L87 Difference]: Start difference. First operand 57026 states and 237588 transitions. Second operand 5 states. [2019-12-07 18:43:52,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:52,712 INFO L93 Difference]: Finished difference Result 76194 states and 312200 transitions. [2019-12-07 18:43:52,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:43:52,713 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 18:43:52,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:52,887 INFO L225 Difference]: With dead ends: 76194 [2019-12-07 18:43:52,887 INFO L226 Difference]: Without dead ends: 76166 [2019-12-07 18:43:52,888 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:43:53,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76166 states. [2019-12-07 18:43:54,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76166 to 57282. [2019-12-07 18:43:54,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57282 states. [2019-12-07 18:43:55,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57282 states to 57282 states and 238068 transitions. [2019-12-07 18:43:55,631 INFO L78 Accepts]: Start accepts. Automaton has 57282 states and 238068 transitions. Word has length 21 [2019-12-07 18:43:55,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:55,631 INFO L462 AbstractCegarLoop]: Abstraction has 57282 states and 238068 transitions. [2019-12-07 18:43:55,631 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:43:55,631 INFO L276 IsEmpty]: Start isEmpty. Operand 57282 states and 238068 transitions. [2019-12-07 18:43:55,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:43:55,666 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:55,666 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:55,667 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:55,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:55,667 INFO L82 PathProgramCache]: Analyzing trace with hash 1504447988, now seen corresponding path program 1 times [2019-12-07 18:43:55,667 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:55,667 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1752218201] [2019-12-07 18:43:55,667 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:55,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:55,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:55,708 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1752218201] [2019-12-07 18:43:55,709 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:55,709 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:43:55,709 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [69780569] [2019-12-07 18:43:55,709 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:43:55,709 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:55,709 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:43:55,709 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:55,709 INFO L87 Difference]: Start difference. First operand 57282 states and 238068 transitions. Second operand 3 states. [2019-12-07 18:43:55,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:55,860 INFO L93 Difference]: Finished difference Result 44947 states and 172600 transitions. [2019-12-07 18:43:55,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:43:55,860 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 18:43:55,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:55,942 INFO L225 Difference]: With dead ends: 44947 [2019-12-07 18:43:55,943 INFO L226 Difference]: Without dead ends: 44947 [2019-12-07 18:43:55,943 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:56,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44947 states. [2019-12-07 18:43:56,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44947 to 44947. [2019-12-07 18:43:56,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44947 states. [2019-12-07 18:43:56,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44947 states to 44947 states and 172600 transitions. [2019-12-07 18:43:56,770 INFO L78 Accepts]: Start accepts. Automaton has 44947 states and 172600 transitions. Word has length 29 [2019-12-07 18:43:56,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:56,770 INFO L462 AbstractCegarLoop]: Abstraction has 44947 states and 172600 transitions. [2019-12-07 18:43:56,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:43:56,771 INFO L276 IsEmpty]: Start isEmpty. Operand 44947 states and 172600 transitions. [2019-12-07 18:43:56,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:43:56,795 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:56,795 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:56,795 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:56,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:56,795 INFO L82 PathProgramCache]: Analyzing trace with hash -28022635, now seen corresponding path program 1 times [2019-12-07 18:43:56,795 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:56,795 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [519556426] [2019-12-07 18:43:56,796 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:56,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:56,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:56,830 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [519556426] [2019-12-07 18:43:56,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:56,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:43:56,831 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776933117] [2019-12-07 18:43:56,831 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:43:56,831 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:56,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:43:56,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:43:56,831 INFO L87 Difference]: Start difference. First operand 44947 states and 172600 transitions. Second operand 4 states. [2019-12-07 18:43:56,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:56,882 INFO L93 Difference]: Finished difference Result 18682 states and 59454 transitions. [2019-12-07 18:43:56,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:43:56,882 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 18:43:56,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:56,905 INFO L225 Difference]: With dead ends: 18682 [2019-12-07 18:43:56,905 INFO L226 Difference]: Without dead ends: 18682 [2019-12-07 18:43:56,905 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:43:56,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18682 states. [2019-12-07 18:43:57,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18682 to 18682. [2019-12-07 18:43:57,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18682 states. [2019-12-07 18:43:57,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18682 states to 18682 states and 59454 transitions. [2019-12-07 18:43:57,175 INFO L78 Accepts]: Start accepts. Automaton has 18682 states and 59454 transitions. Word has length 30 [2019-12-07 18:43:57,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:57,175 INFO L462 AbstractCegarLoop]: Abstraction has 18682 states and 59454 transitions. [2019-12-07 18:43:57,175 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:43:57,175 INFO L276 IsEmpty]: Start isEmpty. Operand 18682 states and 59454 transitions. [2019-12-07 18:43:57,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 18:43:57,184 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:57,184 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:57,184 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:57,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:57,185 INFO L82 PathProgramCache]: Analyzing trace with hash -882612910, now seen corresponding path program 1 times [2019-12-07 18:43:57,185 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:57,185 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647974557] [2019-12-07 18:43:57,185 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:57,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:57,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:57,233 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [647974557] [2019-12-07 18:43:57,233 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:57,233 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:43:57,233 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1058996400] [2019-12-07 18:43:57,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:43:57,234 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:57,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:43:57,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:43:57,234 INFO L87 Difference]: Start difference. First operand 18682 states and 59454 transitions. Second operand 5 states. [2019-12-07 18:43:57,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:57,264 INFO L93 Difference]: Finished difference Result 3095 states and 7883 transitions. [2019-12-07 18:43:57,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:43:57,264 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 18:43:57,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:57,268 INFO L225 Difference]: With dead ends: 3095 [2019-12-07 18:43:57,268 INFO L226 Difference]: Without dead ends: 3095 [2019-12-07 18:43:57,269 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:43:57,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3095 states. [2019-12-07 18:43:57,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3095 to 3095. [2019-12-07 18:43:57,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3095 states. [2019-12-07 18:43:57,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3095 states to 3095 states and 7883 transitions. [2019-12-07 18:43:57,298 INFO L78 Accepts]: Start accepts. Automaton has 3095 states and 7883 transitions. Word has length 31 [2019-12-07 18:43:57,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:57,299 INFO L462 AbstractCegarLoop]: Abstraction has 3095 states and 7883 transitions. [2019-12-07 18:43:57,299 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:43:57,299 INFO L276 IsEmpty]: Start isEmpty. Operand 3095 states and 7883 transitions. [2019-12-07 18:43:57,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 18:43:57,302 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:57,302 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:57,302 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:57,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:57,302 INFO L82 PathProgramCache]: Analyzing trace with hash 368185348, now seen corresponding path program 1 times [2019-12-07 18:43:57,302 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:57,302 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088955953] [2019-12-07 18:43:57,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:57,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:57,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:57,419 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2088955953] [2019-12-07 18:43:57,419 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:57,419 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:43:57,419 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [680028351] [2019-12-07 18:43:57,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:43:57,420 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:57,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:43:57,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:43:57,420 INFO L87 Difference]: Start difference. First operand 3095 states and 7883 transitions. Second operand 6 states. [2019-12-07 18:43:57,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:57,457 INFO L93 Difference]: Finished difference Result 1376 states and 3911 transitions. [2019-12-07 18:43:57,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:43:57,458 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 18:43:57,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:57,460 INFO L225 Difference]: With dead ends: 1376 [2019-12-07 18:43:57,460 INFO L226 Difference]: Without dead ends: 1376 [2019-12-07 18:43:57,460 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:43:57,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1376 states. [2019-12-07 18:43:57,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1376 to 1236. [2019-12-07 18:43:57,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1236 states. [2019-12-07 18:43:57,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1236 states to 1236 states and 3511 transitions. [2019-12-07 18:43:57,476 INFO L78 Accepts]: Start accepts. Automaton has 1236 states and 3511 transitions. Word has length 43 [2019-12-07 18:43:57,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:57,476 INFO L462 AbstractCegarLoop]: Abstraction has 1236 states and 3511 transitions. [2019-12-07 18:43:57,476 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:43:57,476 INFO L276 IsEmpty]: Start isEmpty. Operand 1236 states and 3511 transitions. [2019-12-07 18:43:57,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:43:57,478 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:57,478 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:57,478 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:57,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:57,479 INFO L82 PathProgramCache]: Analyzing trace with hash 2028178460, now seen corresponding path program 1 times [2019-12-07 18:43:57,479 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:57,479 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1710467056] [2019-12-07 18:43:57,479 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:57,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:57,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:57,530 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1710467056] [2019-12-07 18:43:57,530 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:57,530 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:43:57,531 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1086291126] [2019-12-07 18:43:57,531 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:43:57,531 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:57,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:43:57,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:57,531 INFO L87 Difference]: Start difference. First operand 1236 states and 3511 transitions. Second operand 3 states. [2019-12-07 18:43:57,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:57,564 INFO L93 Difference]: Finished difference Result 1249 states and 3529 transitions. [2019-12-07 18:43:57,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:43:57,564 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 18:43:57,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:57,566 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 18:43:57,566 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 18:43:57,566 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:57,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 18:43:57,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1243. [2019-12-07 18:43:57,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2019-12-07 18:43:57,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 3522 transitions. [2019-12-07 18:43:57,583 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 3522 transitions. Word has length 58 [2019-12-07 18:43:57,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:57,584 INFO L462 AbstractCegarLoop]: Abstraction has 1243 states and 3522 transitions. [2019-12-07 18:43:57,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:43:57,584 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 3522 transitions. [2019-12-07 18:43:57,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:43:57,586 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:57,586 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:57,586 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:57,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:57,586 INFO L82 PathProgramCache]: Analyzing trace with hash 1114375606, now seen corresponding path program 1 times [2019-12-07 18:43:57,587 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:57,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1759944739] [2019-12-07 18:43:57,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:57,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:57,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:57,626 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1759944739] [2019-12-07 18:43:57,627 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:57,627 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:43:57,627 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1730662309] [2019-12-07 18:43:57,627 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:43:57,627 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:57,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:43:57,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:57,627 INFO L87 Difference]: Start difference. First operand 1243 states and 3522 transitions. Second operand 3 states. [2019-12-07 18:43:57,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:57,654 INFO L93 Difference]: Finished difference Result 1249 states and 3519 transitions. [2019-12-07 18:43:57,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:43:57,654 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 18:43:57,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:57,656 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 18:43:57,656 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 18:43:57,656 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:57,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 18:43:57,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1240. [2019-12-07 18:43:57,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1240 states. [2019-12-07 18:43:57,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1240 states to 1240 states and 3510 transitions. [2019-12-07 18:43:57,669 INFO L78 Accepts]: Start accepts. Automaton has 1240 states and 3510 transitions. Word has length 58 [2019-12-07 18:43:57,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:57,669 INFO L462 AbstractCegarLoop]: Abstraction has 1240 states and 3510 transitions. [2019-12-07 18:43:57,669 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:43:57,669 INFO L276 IsEmpty]: Start isEmpty. Operand 1240 states and 3510 transitions. [2019-12-07 18:43:57,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:43:57,671 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:57,671 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:57,671 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:57,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:57,672 INFO L82 PathProgramCache]: Analyzing trace with hash 1114895507, now seen corresponding path program 1 times [2019-12-07 18:43:57,672 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:57,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038804695] [2019-12-07 18:43:57,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:57,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:57,726 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:57,726 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038804695] [2019-12-07 18:43:57,727 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:57,727 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:43:57,727 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146419901] [2019-12-07 18:43:57,727 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:43:57,727 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:57,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:43:57,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:43:57,727 INFO L87 Difference]: Start difference. First operand 1240 states and 3510 transitions. Second operand 5 states. [2019-12-07 18:43:57,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:57,846 INFO L93 Difference]: Finished difference Result 1781 states and 5032 transitions. [2019-12-07 18:43:57,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:43:57,846 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-12-07 18:43:57,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:57,848 INFO L225 Difference]: With dead ends: 1781 [2019-12-07 18:43:57,848 INFO L226 Difference]: Without dead ends: 1781 [2019-12-07 18:43:57,849 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:43:57,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1781 states. [2019-12-07 18:43:57,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1781 to 1605. [2019-12-07 18:43:57,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1605 states. [2019-12-07 18:43:57,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1605 states to 1605 states and 4540 transitions. [2019-12-07 18:43:57,864 INFO L78 Accepts]: Start accepts. Automaton has 1605 states and 4540 transitions. Word has length 58 [2019-12-07 18:43:57,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:57,864 INFO L462 AbstractCegarLoop]: Abstraction has 1605 states and 4540 transitions. [2019-12-07 18:43:57,865 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:43:57,865 INFO L276 IsEmpty]: Start isEmpty. Operand 1605 states and 4540 transitions. [2019-12-07 18:43:57,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:43:57,867 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:57,867 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:57,867 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:57,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:57,867 INFO L82 PathProgramCache]: Analyzing trace with hash -217131029, now seen corresponding path program 2 times [2019-12-07 18:43:57,867 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:57,868 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240195622] [2019-12-07 18:43:57,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:57,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:57,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:57,941 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240195622] [2019-12-07 18:43:57,941 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:57,941 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:43:57,941 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869948143] [2019-12-07 18:43:57,941 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:43:57,941 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:57,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:43:57,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:43:57,942 INFO L87 Difference]: Start difference. First operand 1605 states and 4540 transitions. Second operand 6 states. [2019-12-07 18:43:58,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:58,175 INFO L93 Difference]: Finished difference Result 2387 states and 6749 transitions. [2019-12-07 18:43:58,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:43:58,175 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 18:43:58,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:58,177 INFO L225 Difference]: With dead ends: 2387 [2019-12-07 18:43:58,177 INFO L226 Difference]: Without dead ends: 2387 [2019-12-07 18:43:58,178 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:43:58,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2387 states. [2019-12-07 18:43:58,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2387 to 1749. [2019-12-07 18:43:58,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1749 states. [2019-12-07 18:43:58,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1749 states to 1749 states and 4968 transitions. [2019-12-07 18:43:58,197 INFO L78 Accepts]: Start accepts. Automaton has 1749 states and 4968 transitions. Word has length 58 [2019-12-07 18:43:58,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:58,198 INFO L462 AbstractCegarLoop]: Abstraction has 1749 states and 4968 transitions. [2019-12-07 18:43:58,198 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:43:58,198 INFO L276 IsEmpty]: Start isEmpty. Operand 1749 states and 4968 transitions. [2019-12-07 18:43:58,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:43:58,200 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:58,200 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:58,200 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:58,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:58,200 INFO L82 PathProgramCache]: Analyzing trace with hash 1417485459, now seen corresponding path program 3 times [2019-12-07 18:43:58,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:58,200 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2067772737] [2019-12-07 18:43:58,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:58,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:58,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:58,276 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2067772737] [2019-12-07 18:43:58,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:58,276 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:43:58,276 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [735456077] [2019-12-07 18:43:58,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:43:58,277 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:58,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:43:58,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:43:58,277 INFO L87 Difference]: Start difference. First operand 1749 states and 4968 transitions. Second operand 6 states. [2019-12-07 18:43:58,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:58,483 INFO L93 Difference]: Finished difference Result 2563 states and 7224 transitions. [2019-12-07 18:43:58,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:43:58,484 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 18:43:58,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:58,486 INFO L225 Difference]: With dead ends: 2563 [2019-12-07 18:43:58,486 INFO L226 Difference]: Without dead ends: 2563 [2019-12-07 18:43:58,487 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 8 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:43:58,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2563 states. [2019-12-07 18:43:58,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2563 to 1909. [2019-12-07 18:43:58,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1909 states. [2019-12-07 18:43:58,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1909 states to 1909 states and 5424 transitions. [2019-12-07 18:43:58,510 INFO L78 Accepts]: Start accepts. Automaton has 1909 states and 5424 transitions. Word has length 58 [2019-12-07 18:43:58,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:58,510 INFO L462 AbstractCegarLoop]: Abstraction has 1909 states and 5424 transitions. [2019-12-07 18:43:58,510 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:43:58,510 INFO L276 IsEmpty]: Start isEmpty. Operand 1909 states and 5424 transitions. [2019-12-07 18:43:58,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 18:43:58,514 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:58,514 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:58,514 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:58,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:58,514 INFO L82 PathProgramCache]: Analyzing trace with hash -687244225, now seen corresponding path program 4 times [2019-12-07 18:43:58,514 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:58,515 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114628317] [2019-12-07 18:43:58,515 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:58,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:58,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:58,601 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114628317] [2019-12-07 18:43:58,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:58,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:43:58,602 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1564996471] [2019-12-07 18:43:58,602 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:43:58,602 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:58,602 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:43:58,602 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:43:58,602 INFO L87 Difference]: Start difference. First operand 1909 states and 5424 transitions. Second operand 8 states. [2019-12-07 18:43:58,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:58,865 INFO L93 Difference]: Finished difference Result 2844 states and 8023 transitions. [2019-12-07 18:43:58,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:43:58,865 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 58 [2019-12-07 18:43:58,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:58,868 INFO L225 Difference]: With dead ends: 2844 [2019-12-07 18:43:58,868 INFO L226 Difference]: Without dead ends: 2844 [2019-12-07 18:43:58,868 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:43:58,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2844 states. [2019-12-07 18:43:58,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2844 to 1853. [2019-12-07 18:43:58,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1853 states. [2019-12-07 18:43:58,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1853 states to 1853 states and 5264 transitions. [2019-12-07 18:43:58,890 INFO L78 Accepts]: Start accepts. Automaton has 1853 states and 5264 transitions. Word has length 58 [2019-12-07 18:43:58,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:58,890 INFO L462 AbstractCegarLoop]: Abstraction has 1853 states and 5264 transitions. [2019-12-07 18:43:58,890 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:43:58,890 INFO L276 IsEmpty]: Start isEmpty. Operand 1853 states and 5264 transitions. [2019-12-07 18:43:58,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 18:43:58,892 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:58,892 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:58,892 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:58,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:58,892 INFO L82 PathProgramCache]: Analyzing trace with hash 658273713, now seen corresponding path program 1 times [2019-12-07 18:43:58,893 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:58,893 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1605465254] [2019-12-07 18:43:58,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:58,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:58,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:58,931 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1605465254] [2019-12-07 18:43:58,931 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:58,931 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:43:58,932 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007876311] [2019-12-07 18:43:58,932 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:43:58,932 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:58,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:43:58,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:58,932 INFO L87 Difference]: Start difference. First operand 1853 states and 5264 transitions. Second operand 3 states. [2019-12-07 18:43:58,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:58,964 INFO L93 Difference]: Finished difference Result 1852 states and 5262 transitions. [2019-12-07 18:43:58,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:43:58,964 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 18:43:58,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:58,966 INFO L225 Difference]: With dead ends: 1852 [2019-12-07 18:43:58,966 INFO L226 Difference]: Without dead ends: 1852 [2019-12-07 18:43:58,966 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:58,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1852 states. [2019-12-07 18:43:58,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1852 to 1319. [2019-12-07 18:43:58,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1319 states. [2019-12-07 18:43:58,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1319 states to 1319 states and 3756 transitions. [2019-12-07 18:43:58,980 INFO L78 Accepts]: Start accepts. Automaton has 1319 states and 3756 transitions. Word has length 59 [2019-12-07 18:43:58,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:58,980 INFO L462 AbstractCegarLoop]: Abstraction has 1319 states and 3756 transitions. [2019-12-07 18:43:58,980 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:43:58,980 INFO L276 IsEmpty]: Start isEmpty. Operand 1319 states and 3756 transitions. [2019-12-07 18:43:58,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 18:43:58,982 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:58,982 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:58,982 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:58,982 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:58,982 INFO L82 PathProgramCache]: Analyzing trace with hash 368051854, now seen corresponding path program 1 times [2019-12-07 18:43:58,982 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:58,983 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445685411] [2019-12-07 18:43:58,983 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:58,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:59,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:59,015 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1445685411] [2019-12-07 18:43:59,015 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:59,015 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:43:59,015 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [245507387] [2019-12-07 18:43:59,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:43:59,015 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:59,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:43:59,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:59,016 INFO L87 Difference]: Start difference. First operand 1319 states and 3756 transitions. Second operand 3 states. [2019-12-07 18:43:59,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:59,027 INFO L93 Difference]: Finished difference Result 1251 states and 3484 transitions. [2019-12-07 18:43:59,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:43:59,028 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 18:43:59,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:59,030 INFO L225 Difference]: With dead ends: 1251 [2019-12-07 18:43:59,030 INFO L226 Difference]: Without dead ends: 1251 [2019-12-07 18:43:59,030 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:43:59,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1251 states. [2019-12-07 18:43:59,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1251 to 1187. [2019-12-07 18:43:59,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1187 states. [2019-12-07 18:43:59,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1187 states to 1187 states and 3300 transitions. [2019-12-07 18:43:59,046 INFO L78 Accepts]: Start accepts. Automaton has 1187 states and 3300 transitions. Word has length 59 [2019-12-07 18:43:59,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:59,047 INFO L462 AbstractCegarLoop]: Abstraction has 1187 states and 3300 transitions. [2019-12-07 18:43:59,047 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:43:59,047 INFO L276 IsEmpty]: Start isEmpty. Operand 1187 states and 3300 transitions. [2019-12-07 18:43:59,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 18:43:59,048 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:59,048 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:59,048 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:59,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:59,049 INFO L82 PathProgramCache]: Analyzing trace with hash -1391147504, now seen corresponding path program 1 times [2019-12-07 18:43:59,049 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:59,049 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1981798868] [2019-12-07 18:43:59,049 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:59,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:59,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:59,216 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1981798868] [2019-12-07 18:43:59,216 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:59,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 18:43:59,216 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1282635565] [2019-12-07 18:43:59,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:43:59,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:59,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:43:59,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:43:59,217 INFO L87 Difference]: Start difference. First operand 1187 states and 3300 transitions. Second operand 13 states. [2019-12-07 18:43:59,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:59,505 INFO L93 Difference]: Finished difference Result 1979 states and 5265 transitions. [2019-12-07 18:43:59,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:43:59,506 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 18:43:59,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:59,508 INFO L225 Difference]: With dead ends: 1979 [2019-12-07 18:43:59,508 INFO L226 Difference]: Without dead ends: 1947 [2019-12-07 18:43:59,508 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=81, Invalid=339, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:43:59,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1947 states. [2019-12-07 18:43:59,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1947 to 1519. [2019-12-07 18:43:59,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1519 states. [2019-12-07 18:43:59,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1519 states to 1519 states and 4201 transitions. [2019-12-07 18:43:59,523 INFO L78 Accepts]: Start accepts. Automaton has 1519 states and 4201 transitions. Word has length 60 [2019-12-07 18:43:59,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:59,523 INFO L462 AbstractCegarLoop]: Abstraction has 1519 states and 4201 transitions. [2019-12-07 18:43:59,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:43:59,523 INFO L276 IsEmpty]: Start isEmpty. Operand 1519 states and 4201 transitions. [2019-12-07 18:43:59,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 18:43:59,525 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:59,525 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:59,525 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:59,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:59,526 INFO L82 PathProgramCache]: Analyzing trace with hash -792498070, now seen corresponding path program 2 times [2019-12-07 18:43:59,526 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:59,526 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1490549741] [2019-12-07 18:43:59,526 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:59,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:59,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:59,711 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1490549741] [2019-12-07 18:43:59,712 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:59,712 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 18:43:59,712 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1898789951] [2019-12-07 18:43:59,713 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:43:59,713 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:59,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:43:59,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:43:59,713 INFO L87 Difference]: Start difference. First operand 1519 states and 4201 transitions. Second operand 13 states. [2019-12-07 18:44:00,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:44:00,113 INFO L93 Difference]: Finished difference Result 3419 states and 8645 transitions. [2019-12-07 18:44:00,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:44:00,113 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 18:44:00,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:44:00,115 INFO L225 Difference]: With dead ends: 3419 [2019-12-07 18:44:00,115 INFO L226 Difference]: Without dead ends: 2327 [2019-12-07 18:44:00,116 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=123, Invalid=339, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:44:00,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2327 states. [2019-12-07 18:44:00,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2327 to 1519. [2019-12-07 18:44:00,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1519 states. [2019-12-07 18:44:00,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1519 states to 1519 states and 4171 transitions. [2019-12-07 18:44:00,135 INFO L78 Accepts]: Start accepts. Automaton has 1519 states and 4171 transitions. Word has length 60 [2019-12-07 18:44:00,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:44:00,135 INFO L462 AbstractCegarLoop]: Abstraction has 1519 states and 4171 transitions. [2019-12-07 18:44:00,135 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:44:00,135 INFO L276 IsEmpty]: Start isEmpty. Operand 1519 states and 4171 transitions. [2019-12-07 18:44:00,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 18:44:00,137 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:44:00,137 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:44:00,137 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:44:00,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:44:00,137 INFO L82 PathProgramCache]: Analyzing trace with hash -234763928, now seen corresponding path program 3 times [2019-12-07 18:44:00,137 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:44:00,137 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904459694] [2019-12-07 18:44:00,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:44:00,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:44:00,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:44:00,306 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904459694] [2019-12-07 18:44:00,307 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:44:00,307 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 18:44:00,307 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1297157179] [2019-12-07 18:44:00,307 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:44:00,307 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:44:00,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:44:00,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:44:00,307 INFO L87 Difference]: Start difference. First operand 1519 states and 4171 transitions. Second operand 12 states. [2019-12-07 18:44:01,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:44:01,170 INFO L93 Difference]: Finished difference Result 2876 states and 7390 transitions. [2019-12-07 18:44:01,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:44:01,171 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 60 [2019-12-07 18:44:01,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:44:01,173 INFO L225 Difference]: With dead ends: 2876 [2019-12-07 18:44:01,173 INFO L226 Difference]: Without dead ends: 2312 [2019-12-07 18:44:01,173 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 162 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=174, Invalid=696, Unknown=0, NotChecked=0, Total=870 [2019-12-07 18:44:01,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2312 states. [2019-12-07 18:44:01,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2312 to 1393. [2019-12-07 18:44:01,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1393 states. [2019-12-07 18:44:01,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1393 states to 1393 states and 3777 transitions. [2019-12-07 18:44:01,189 INFO L78 Accepts]: Start accepts. Automaton has 1393 states and 3777 transitions. Word has length 60 [2019-12-07 18:44:01,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:44:01,190 INFO L462 AbstractCegarLoop]: Abstraction has 1393 states and 3777 transitions. [2019-12-07 18:44:01,190 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:44:01,190 INFO L276 IsEmpty]: Start isEmpty. Operand 1393 states and 3777 transitions. [2019-12-07 18:44:01,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 18:44:01,191 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:44:01,191 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:44:01,191 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:44:01,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:44:01,191 INFO L82 PathProgramCache]: Analyzing trace with hash 1307700408, now seen corresponding path program 4 times [2019-12-07 18:44:01,191 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:44:01,191 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1333277261] [2019-12-07 18:44:01,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:44:01,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:44:01,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:44:01,268 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1333277261] [2019-12-07 18:44:01,268 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:44:01,268 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:44:01,268 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2011499884] [2019-12-07 18:44:01,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:44:01,268 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:44:01,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:44:01,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:44:01,269 INFO L87 Difference]: Start difference. First operand 1393 states and 3777 transitions. Second operand 6 states. [2019-12-07 18:44:01,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:44:01,326 INFO L93 Difference]: Finished difference Result 1886 states and 4763 transitions. [2019-12-07 18:44:01,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:44:01,326 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 18:44:01,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:44:01,327 INFO L225 Difference]: With dead ends: 1886 [2019-12-07 18:44:01,327 INFO L226 Difference]: Without dead ends: 1106 [2019-12-07 18:44:01,328 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:44:01,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1106 states. [2019-12-07 18:44:01,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1106 to 1034. [2019-12-07 18:44:01,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1034 states. [2019-12-07 18:44:01,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1034 states to 1034 states and 2454 transitions. [2019-12-07 18:44:01,336 INFO L78 Accepts]: Start accepts. Automaton has 1034 states and 2454 transitions. Word has length 60 [2019-12-07 18:44:01,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:44:01,336 INFO L462 AbstractCegarLoop]: Abstraction has 1034 states and 2454 transitions. [2019-12-07 18:44:01,336 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:44:01,336 INFO L276 IsEmpty]: Start isEmpty. Operand 1034 states and 2454 transitions. [2019-12-07 18:44:01,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 18:44:01,337 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:44:01,337 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:44:01,337 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:44:01,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:44:01,338 INFO L82 PathProgramCache]: Analyzing trace with hash 1667445582, now seen corresponding path program 5 times [2019-12-07 18:44:01,338 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:44:01,338 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1170241107] [2019-12-07 18:44:01,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:44:01,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:44:01,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:44:01,398 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1170241107] [2019-12-07 18:44:01,399 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:44:01,399 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:44:01,399 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [851006800] [2019-12-07 18:44:01,399 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:44:01,399 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:44:01,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:44:01,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:44:01,400 INFO L87 Difference]: Start difference. First operand 1034 states and 2454 transitions. Second operand 6 states. [2019-12-07 18:44:01,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:44:01,444 INFO L93 Difference]: Finished difference Result 1316 states and 2940 transitions. [2019-12-07 18:44:01,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:44:01,445 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 18:44:01,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:44:01,445 INFO L225 Difference]: With dead ends: 1316 [2019-12-07 18:44:01,445 INFO L226 Difference]: Without dead ends: 329 [2019-12-07 18:44:01,446 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:44:01,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2019-12-07 18:44:01,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 329. [2019-12-07 18:44:01,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2019-12-07 18:44:01,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 569 transitions. [2019-12-07 18:44:01,450 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 569 transitions. Word has length 60 [2019-12-07 18:44:01,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:44:01,450 INFO L462 AbstractCegarLoop]: Abstraction has 329 states and 569 transitions. [2019-12-07 18:44:01,450 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:44:01,450 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 569 transitions. [2019-12-07 18:44:01,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 18:44:01,451 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:44:01,451 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:44:01,451 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:44:01,451 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:44:01,451 INFO L82 PathProgramCache]: Analyzing trace with hash -1893006908, now seen corresponding path program 6 times [2019-12-07 18:44:01,451 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:44:01,451 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [939779061] [2019-12-07 18:44:01,451 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:44:01,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:44:01,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:44:01,615 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [939779061] [2019-12-07 18:44:01,615 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:44:01,615 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 18:44:01,616 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1171665665] [2019-12-07 18:44:01,616 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:44:01,616 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:44:01,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:44:01,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:44:01,616 INFO L87 Difference]: Start difference. First operand 329 states and 569 transitions. Second operand 13 states. [2019-12-07 18:44:01,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:44:01,930 INFO L93 Difference]: Finished difference Result 487 states and 824 transitions. [2019-12-07 18:44:01,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 18:44:01,930 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 18:44:01,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:44:01,930 INFO L225 Difference]: With dead ends: 487 [2019-12-07 18:44:01,931 INFO L226 Difference]: Without dead ends: 455 [2019-12-07 18:44:01,931 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=348, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:44:01,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 455 states. [2019-12-07 18:44:01,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 455 to 337. [2019-12-07 18:44:01,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 337 states. [2019-12-07 18:44:01,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 585 transitions. [2019-12-07 18:44:01,934 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 585 transitions. Word has length 60 [2019-12-07 18:44:01,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:44:01,934 INFO L462 AbstractCegarLoop]: Abstraction has 337 states and 585 transitions. [2019-12-07 18:44:01,934 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:44:01,934 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 585 transitions. [2019-12-07 18:44:01,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 18:44:01,935 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:44:01,935 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:44:01,935 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:44:01,935 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:44:01,935 INFO L82 PathProgramCache]: Analyzing trace with hash -1191078724, now seen corresponding path program 7 times [2019-12-07 18:44:01,935 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:44:01,935 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122359603] [2019-12-07 18:44:01,935 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:44:01,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:44:02,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:44:02,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2122359603] [2019-12-07 18:44:02,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:44:02,105 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 18:44:02,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1558255148] [2019-12-07 18:44:02,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:44:02,105 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:44:02,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:44:02,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:44:02,106 INFO L87 Difference]: Start difference. First operand 337 states and 585 transitions. Second operand 13 states. [2019-12-07 18:44:02,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:44:02,411 INFO L93 Difference]: Finished difference Result 447 states and 750 transitions. [2019-12-07 18:44:02,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:44:02,412 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 18:44:02,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:44:02,412 INFO L225 Difference]: With dead ends: 447 [2019-12-07 18:44:02,412 INFO L226 Difference]: Without dead ends: 415 [2019-12-07 18:44:02,413 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=90, Invalid=372, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:44:02,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 415 states. [2019-12-07 18:44:02,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 415 to 345. [2019-12-07 18:44:02,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2019-12-07 18:44:02,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 599 transitions. [2019-12-07 18:44:02,416 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 599 transitions. Word has length 60 [2019-12-07 18:44:02,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:44:02,416 INFO L462 AbstractCegarLoop]: Abstraction has 345 states and 599 transitions. [2019-12-07 18:44:02,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:44:02,416 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 599 transitions. [2019-12-07 18:44:02,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 18:44:02,416 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:44:02,417 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:44:02,417 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:44:02,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:44:02,417 INFO L82 PathProgramCache]: Analyzing trace with hash -1108974140, now seen corresponding path program 8 times [2019-12-07 18:44:02,417 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:44:02,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266695218] [2019-12-07 18:44:02,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:44:02,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:44:02,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:44:02,488 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:44:02,488 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:44:02,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_#NULL.offset_7| 0) (= v_~z$r_buff1_thd1~0_233 0) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= v_~b~0_102 0) (= 0 |v_ULTIMATE.start_main_~#t1165~0.offset_16|) (= v_~y~0_38 0) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (= 0 v_~weak$$choice0~0_17) (= v_~z$w_buff1~0_400 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1165~0.base_19| 4) |v_#length_29|) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~__unbuffered_p3_EAX~0_243 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1165~0.base_19|)) (= v_~z$r_buff0_thd0~0_435 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1165~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1165~0.base_19|) |v_ULTIMATE.start_main_~#t1165~0.offset_16| 0)) |v_#memory_int_25|) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1165~0.base_19|) (= 0 |v_#NULL.base_7|) (= v_~z$r_buff0_thd1~0_87 0) (= v_~x~0_42 0) (= v_~z$w_buff1_used~0_620 0) (= v_~main$tmp_guard1~0_25 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t1165~0.base_19| 1)) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ULTIMATE.start_main_~#t1167~0.base=|v_ULTIMATE.start_main_~#t1167~0.base_21|, ULTIMATE.start_main_~#t1167~0.offset=|v_ULTIMATE.start_main_~#t1167~0.offset_16|, ~a~0=v_~a~0_234, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ULTIMATE.start_main_~#t1165~0.offset=|v_ULTIMATE.start_main_~#t1165~0.offset_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~x~0=v_~x~0_42, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ULTIMATE.start_main_~#t1168~0.base=|v_ULTIMATE.start_main_~#t1168~0.base_22|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_38, ULTIMATE.start_main_~#t1165~0.base=|v_ULTIMATE.start_main_~#t1165~0.base_19|, ULTIMATE.start_main_~#t1166~0.offset=|v_ULTIMATE.start_main_~#t1166~0.offset_17|, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ULTIMATE.start_main_~#t1166~0.base=|v_ULTIMATE.start_main_~#t1166~0.base_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ~b~0=v_~b~0_102, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87, ULTIMATE.start_main_~#t1168~0.offset=|v_ULTIMATE.start_main_~#t1168~0.offset_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1167~0.base, ULTIMATE.start_main_~#t1167~0.offset, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_~#t1165~0.offset, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1168~0.base, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ULTIMATE.start_main_~#t1165~0.base, ULTIMATE.start_main_~#t1166~0.offset, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1166~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ULTIMATE.start_main_~#t1168~0.offset] because there is no mapped edge [2019-12-07 18:44:02,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1166~0.base_13|)) (not (= 0 |v_ULTIMATE.start_main_~#t1166~0.base_13|)) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1166~0.base_13| 1)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1166~0.base_13|) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1166~0.base_13| 4)) (= 0 |v_ULTIMATE.start_main_~#t1166~0.offset_11|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1166~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1166~0.base_13|) |v_ULTIMATE.start_main_~#t1166~0.offset_11| 1)) |v_#memory_int_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1166~0.base=|v_ULTIMATE.start_main_~#t1166~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1166~0.offset=|v_ULTIMATE.start_main_~#t1166~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1166~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1166~0.offset] because there is no mapped edge [2019-12-07 18:44:02,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1167~0.base_12|)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1167~0.base_12|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1167~0.base_12|)) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1167~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1167~0.base_12|) |v_ULTIMATE.start_main_~#t1167~0.offset_10| 2))) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1167~0.base_12| 4) |v_#length_21|) (= 0 |v_ULTIMATE.start_main_~#t1167~0.offset_10|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1167~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1167~0.base=|v_ULTIMATE.start_main_~#t1167~0.base_12|, ULTIMATE.start_main_~#t1167~0.offset=|v_ULTIMATE.start_main_~#t1167~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1167~0.base, ULTIMATE.start_main_~#t1167~0.offset] because there is no mapped edge [2019-12-07 18:44:02,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1168~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1168~0.base_12|) |v_ULTIMATE.start_main_~#t1168~0.offset_10| 3))) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1168~0.base_12|) (= 0 |v_ULTIMATE.start_main_~#t1168~0.offset_10|) (not (= |v_ULTIMATE.start_main_~#t1168~0.base_12| 0)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1168~0.base_12|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1168~0.base_12| 4)) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1168~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1168~0.base=|v_ULTIMATE.start_main_~#t1168~0.base_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ULTIMATE.start_main_~#t1168~0.offset=|v_ULTIMATE.start_main_~#t1168~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1168~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1168~0.offset] because there is no mapped edge [2019-12-07 18:44:02,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 18:44:02,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|) (= v_~x~0_27 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_27, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:44:02,495 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= v_~y~0_28 v_~__unbuffered_p1_EAX~0_19) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x~0_32 2) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89, ~y~0=v_~y~0_28} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_19, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_28, ~x~0=v_~x~0_32, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:44:02,496 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In-613652410 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-613652410 256) 0))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork3_#t~ite11_Out-613652410| 0)) (and (= |P3Thread1of1ForFork3_#t~ite11_Out-613652410| ~z$w_buff0_used~0_In-613652410) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-613652410, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-613652410} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-613652410, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-613652410, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-613652410|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 18:44:02,496 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-2114984786 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-2114984786 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite3_Out-2114984786| ~z~0_In-2114984786)) (and (= |P2Thread1of1ForFork2_#t~ite3_Out-2114984786| ~z$w_buff1~0_In-2114984786) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2114984786, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2114984786, ~z$w_buff1~0=~z$w_buff1~0_In-2114984786, ~z~0=~z~0_In-2114984786} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-2114984786|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2114984786, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2114984786, ~z$w_buff1~0=~z$w_buff1~0_In-2114984786, ~z~0=~z~0_In-2114984786} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 18:44:02,496 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In397514182 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In397514182 256))) (.cse2 (= (mod ~z$r_buff0_thd4~0_In397514182 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In397514182 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite12_Out397514182| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork3_#t~ite12_Out397514182| ~z$w_buff1_used~0_In397514182) (or .cse2 .cse3)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In397514182, ~z$w_buff0_used~0=~z$w_buff0_used~0_In397514182, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In397514182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In397514182} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In397514182, ~z$w_buff0_used~0=~z$w_buff0_used~0_In397514182, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In397514182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In397514182, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out397514182|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 18:44:02,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-958276150 256))) (.cse2 (= ~z$r_buff0_thd4~0_Out-958276150 ~z$r_buff0_thd4~0_In-958276150)) (.cse1 (= (mod ~z$r_buff0_thd4~0_In-958276150 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 ~z$r_buff0_thd4~0_Out-958276150)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-958276150, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-958276150} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-958276150, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-958276150, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-958276150|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 18:44:02,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd4~0_In265150277 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In265150277 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In265150277 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd4~0_In265150277 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out265150277| ~z$r_buff1_thd4~0_In265150277) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork3_#t~ite14_Out265150277|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In265150277, ~z$w_buff0_used~0=~z$w_buff0_used~0_In265150277, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In265150277, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265150277} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In265150277, ~z$w_buff0_used~0=~z$w_buff0_used~0_In265150277, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out265150277|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In265150277, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265150277} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 18:44:02,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:44:02,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 18:44:02,497 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In97539641 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In97539641 256)))) (or (and (= ~z$w_buff0_used~0_In97539641 |P2Thread1of1ForFork2_#t~ite5_Out97539641|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out97539641|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In97539641, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In97539641} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out97539641|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In97539641, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In97539641} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:44:02,498 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-428746132 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-428746132 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-428746132 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-428746132 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite6_Out-428746132| ~z$w_buff1_used~0_In-428746132) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-428746132|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-428746132, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-428746132, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-428746132, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-428746132} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-428746132|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-428746132, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-428746132, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-428746132, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-428746132} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:44:02,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-626548670 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-626548670 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite7_Out-626548670| ~z$r_buff0_thd3~0_In-626548670)) (and (= 0 |P2Thread1of1ForFork2_#t~ite7_Out-626548670|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-626548670, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-626548670} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-626548670, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-626548670, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-626548670|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:44:02,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1581157002 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1581157002 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In1581157002 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In1581157002 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite8_Out1581157002|)) (and (or .cse1 .cse0) (= ~z$r_buff1_thd3~0_In1581157002 |P2Thread1of1ForFork2_#t~ite8_Out1581157002|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1581157002, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1581157002, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1581157002, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1581157002} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1581157002, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1581157002, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1581157002, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1581157002, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1581157002|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:44:02,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:44:02,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 18:44:02,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1426239369 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In1426239369 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out1426239369| ~z~0_In1426239369) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite19_Out1426239369| ~z$w_buff1~0_In1426239369)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426239369, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426239369, ~z$w_buff1~0=~z$w_buff1~0_In1426239369, ~z~0=~z~0_In1426239369} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1426239369|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426239369, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426239369, ~z$w_buff1~0=~z$w_buff1~0_In1426239369, ~z~0=~z~0_In1426239369} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 18:44:02,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 18:44:02,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-713884249 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-713884249 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-713884249| ~z$w_buff0_used~0_In-713884249) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite21_Out-713884249| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-713884249, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-713884249} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-713884249, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-713884249, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-713884249|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 18:44:02,501 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd0~0_In864431426 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In864431426 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In864431426 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In864431426 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In864431426 |ULTIMATE.start_main_#t~ite22_Out864431426|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out864431426|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In864431426, ~z$w_buff0_used~0=~z$w_buff0_used~0_In864431426, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In864431426, ~z$w_buff1_used~0=~z$w_buff1_used~0_In864431426} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In864431426, ~z$w_buff0_used~0=~z$w_buff0_used~0_In864431426, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In864431426, ~z$w_buff1_used~0=~z$w_buff1_used~0_In864431426, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out864431426|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 18:44:02,501 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-713852215 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-713852215 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite23_Out-713852215|) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-713852215 |ULTIMATE.start_main_#t~ite23_Out-713852215|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-713852215, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-713852215} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-713852215, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-713852215, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-713852215|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 18:44:02,502 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In2001553632 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In2001553632 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In2001553632 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In2001553632 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite24_Out2001553632|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In2001553632 |ULTIMATE.start_main_#t~ite24_Out2001553632|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2001553632, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2001553632, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2001553632, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2001553632} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2001553632, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2001553632, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2001553632, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out2001553632|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2001553632} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 18:44:02,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-52336036 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_In-52336036| |ULTIMATE.start_main_#t~ite39_Out-52336036|) (= |ULTIMATE.start_main_#t~ite40_Out-52336036| ~z$w_buff1_used~0_In-52336036)) (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-52336036 256) 0))) (or (= (mod ~z$w_buff0_used~0_In-52336036 256) 0) (and (= 0 (mod ~z$w_buff1_used~0_In-52336036 256)) .cse1) (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-52336036 256))))) (= ~z$w_buff1_used~0_In-52336036 |ULTIMATE.start_main_#t~ite39_Out-52336036|) (= |ULTIMATE.start_main_#t~ite40_Out-52336036| |ULTIMATE.start_main_#t~ite39_Out-52336036|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-52336036, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-52336036, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-52336036|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-52336036, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-52336036, ~weak$$choice2~0=~weak$$choice2~0_In-52336036} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-52336036, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-52336036|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-52336036|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-52336036, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-52336036, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-52336036, ~weak$$choice2~0=~weak$$choice2~0_In-52336036} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 18:44:02,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:44:02,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In887785384 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_In887785384| |ULTIMATE.start_main_#t~ite45_Out887785384|) (= ~z$r_buff1_thd0~0_In887785384 |ULTIMATE.start_main_#t~ite46_Out887785384|) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite46_Out887785384| |ULTIMATE.start_main_#t~ite45_Out887785384|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In887785384 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In887785384 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In887785384 256)) (and (= 0 (mod ~z$r_buff1_thd0~0_In887785384 256)) .cse1))) (= ~z$r_buff1_thd0~0_In887785384 |ULTIMATE.start_main_#t~ite45_Out887785384|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In887785384, ~z$w_buff0_used~0=~z$w_buff0_used~0_In887785384, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In887785384, ~z$w_buff1_used~0=~z$w_buff1_used~0_In887785384, ~weak$$choice2~0=~weak$$choice2~0_In887785384, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In887785384|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In887785384, ~z$w_buff0_used~0=~z$w_buff0_used~0_In887785384, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In887785384, ~z$w_buff1_used~0=~z$w_buff1_used~0_In887785384, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out887785384|, ~weak$$choice2~0=~weak$$choice2~0_In887785384, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out887785384|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:44:02,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:44:02,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:44:02,565 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:44:02 BasicIcfg [2019-12-07 18:44:02,565 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:44:02,565 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:44:02,565 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:44:02,565 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:44:02,566 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:43:40" (3/4) ... [2019-12-07 18:44:02,567 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:44:02,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_#NULL.offset_7| 0) (= v_~z$r_buff1_thd1~0_233 0) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= v_~b~0_102 0) (= 0 |v_ULTIMATE.start_main_~#t1165~0.offset_16|) (= v_~y~0_38 0) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (= 0 v_~weak$$choice0~0_17) (= v_~z$w_buff1~0_400 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1165~0.base_19| 4) |v_#length_29|) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~__unbuffered_p3_EAX~0_243 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1165~0.base_19|)) (= v_~z$r_buff0_thd0~0_435 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1165~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1165~0.base_19|) |v_ULTIMATE.start_main_~#t1165~0.offset_16| 0)) |v_#memory_int_25|) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1165~0.base_19|) (= 0 |v_#NULL.base_7|) (= v_~z$r_buff0_thd1~0_87 0) (= v_~x~0_42 0) (= v_~z$w_buff1_used~0_620 0) (= v_~main$tmp_guard1~0_25 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t1165~0.base_19| 1)) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ULTIMATE.start_main_~#t1167~0.base=|v_ULTIMATE.start_main_~#t1167~0.base_21|, ULTIMATE.start_main_~#t1167~0.offset=|v_ULTIMATE.start_main_~#t1167~0.offset_16|, ~a~0=v_~a~0_234, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ULTIMATE.start_main_~#t1165~0.offset=|v_ULTIMATE.start_main_~#t1165~0.offset_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~x~0=v_~x~0_42, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ULTIMATE.start_main_~#t1168~0.base=|v_ULTIMATE.start_main_~#t1168~0.base_22|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_38, ULTIMATE.start_main_~#t1165~0.base=|v_ULTIMATE.start_main_~#t1165~0.base_19|, ULTIMATE.start_main_~#t1166~0.offset=|v_ULTIMATE.start_main_~#t1166~0.offset_17|, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ULTIMATE.start_main_~#t1166~0.base=|v_ULTIMATE.start_main_~#t1166~0.base_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ~b~0=v_~b~0_102, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87, ULTIMATE.start_main_~#t1168~0.offset=|v_ULTIMATE.start_main_~#t1168~0.offset_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1167~0.base, ULTIMATE.start_main_~#t1167~0.offset, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_~#t1165~0.offset, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t1168~0.base, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ULTIMATE.start_main_~#t1165~0.base, ULTIMATE.start_main_~#t1166~0.offset, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1166~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ULTIMATE.start_main_~#t1168~0.offset] because there is no mapped edge [2019-12-07 18:44:02,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1166~0.base_13|)) (not (= 0 |v_ULTIMATE.start_main_~#t1166~0.base_13|)) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1166~0.base_13| 1)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1166~0.base_13|) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1166~0.base_13| 4)) (= 0 |v_ULTIMATE.start_main_~#t1166~0.offset_11|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1166~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1166~0.base_13|) |v_ULTIMATE.start_main_~#t1166~0.offset_11| 1)) |v_#memory_int_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1166~0.base=|v_ULTIMATE.start_main_~#t1166~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1166~0.offset=|v_ULTIMATE.start_main_~#t1166~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1166~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1166~0.offset] because there is no mapped edge [2019-12-07 18:44:02,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1167~0.base_12|)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1167~0.base_12|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1167~0.base_12|)) (= |v_#memory_int_17| (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1167~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1167~0.base_12|) |v_ULTIMATE.start_main_~#t1167~0.offset_10| 2))) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1167~0.base_12| 4) |v_#length_21|) (= 0 |v_ULTIMATE.start_main_~#t1167~0.offset_10|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1167~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1167~0.base=|v_ULTIMATE.start_main_~#t1167~0.base_12|, ULTIMATE.start_main_~#t1167~0.offset=|v_ULTIMATE.start_main_~#t1167~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1167~0.base, ULTIMATE.start_main_~#t1167~0.offset] because there is no mapped edge [2019-12-07 18:44:02,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1168~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1168~0.base_12|) |v_ULTIMATE.start_main_~#t1168~0.offset_10| 3))) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1168~0.base_12|) (= 0 |v_ULTIMATE.start_main_~#t1168~0.offset_10|) (not (= |v_ULTIMATE.start_main_~#t1168~0.base_12| 0)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1168~0.base_12|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1168~0.base_12| 4)) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1168~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1168~0.base=|v_ULTIMATE.start_main_~#t1168~0.base_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ULTIMATE.start_main_~#t1168~0.offset=|v_ULTIMATE.start_main_~#t1168~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1168~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1168~0.offset] because there is no mapped edge [2019-12-07 18:44:02,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 18:44:02,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|) (= v_~x~0_27 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_27, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 18:44:02,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= v_~y~0_28 v_~__unbuffered_p1_EAX~0_19) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x~0_32 2) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89, ~y~0=v_~y~0_28} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_19, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_28, ~x~0=v_~x~0_32, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:44:02,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In-613652410 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-613652410 256) 0))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork3_#t~ite11_Out-613652410| 0)) (and (= |P3Thread1of1ForFork3_#t~ite11_Out-613652410| ~z$w_buff0_used~0_In-613652410) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-613652410, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-613652410} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-613652410, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-613652410, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-613652410|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 18:44:02,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-2114984786 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-2114984786 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite3_Out-2114984786| ~z~0_In-2114984786)) (and (= |P2Thread1of1ForFork2_#t~ite3_Out-2114984786| ~z$w_buff1~0_In-2114984786) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2114984786, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2114984786, ~z$w_buff1~0=~z$w_buff1~0_In-2114984786, ~z~0=~z~0_In-2114984786} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-2114984786|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2114984786, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2114984786, ~z$w_buff1~0=~z$w_buff1~0_In-2114984786, ~z~0=~z~0_In-2114984786} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 18:44:02,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In397514182 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In397514182 256))) (.cse2 (= (mod ~z$r_buff0_thd4~0_In397514182 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In397514182 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite12_Out397514182| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork3_#t~ite12_Out397514182| ~z$w_buff1_used~0_In397514182) (or .cse2 .cse3)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In397514182, ~z$w_buff0_used~0=~z$w_buff0_used~0_In397514182, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In397514182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In397514182} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In397514182, ~z$w_buff0_used~0=~z$w_buff0_used~0_In397514182, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In397514182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In397514182, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out397514182|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 18:44:02,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-958276150 256))) (.cse2 (= ~z$r_buff0_thd4~0_Out-958276150 ~z$r_buff0_thd4~0_In-958276150)) (.cse1 (= (mod ~z$r_buff0_thd4~0_In-958276150 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 ~z$r_buff0_thd4~0_Out-958276150)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-958276150, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-958276150} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-958276150, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-958276150, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-958276150|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 18:44:02,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd4~0_In265150277 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In265150277 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In265150277 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd4~0_In265150277 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out265150277| ~z$r_buff1_thd4~0_In265150277) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork3_#t~ite14_Out265150277|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In265150277, ~z$w_buff0_used~0=~z$w_buff0_used~0_In265150277, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In265150277, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265150277} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In265150277, ~z$w_buff0_used~0=~z$w_buff0_used~0_In265150277, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out265150277|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In265150277, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265150277} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 18:44:02,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:44:02,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 18:44:02,572 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In97539641 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In97539641 256)))) (or (and (= ~z$w_buff0_used~0_In97539641 |P2Thread1of1ForFork2_#t~ite5_Out97539641|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out97539641|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In97539641, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In97539641} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out97539641|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In97539641, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In97539641} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:44:02,572 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-428746132 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-428746132 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-428746132 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-428746132 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite6_Out-428746132| ~z$w_buff1_used~0_In-428746132) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-428746132|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-428746132, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-428746132, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-428746132, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-428746132} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-428746132|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-428746132, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-428746132, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-428746132, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-428746132} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:44:02,572 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-626548670 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-626548670 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite7_Out-626548670| ~z$r_buff0_thd3~0_In-626548670)) (and (= 0 |P2Thread1of1ForFork2_#t~ite7_Out-626548670|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-626548670, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-626548670} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-626548670, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-626548670, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-626548670|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:44:02,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1581157002 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1581157002 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In1581157002 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In1581157002 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite8_Out1581157002|)) (and (or .cse1 .cse0) (= ~z$r_buff1_thd3~0_In1581157002 |P2Thread1of1ForFork2_#t~ite8_Out1581157002|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1581157002, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1581157002, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1581157002, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1581157002} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1581157002, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1581157002, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1581157002, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1581157002, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1581157002|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:44:02,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:44:02,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 18:44:02,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1426239369 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In1426239369 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out1426239369| ~z~0_In1426239369) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite19_Out1426239369| ~z$w_buff1~0_In1426239369)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426239369, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426239369, ~z$w_buff1~0=~z$w_buff1~0_In1426239369, ~z~0=~z~0_In1426239369} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1426239369|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426239369, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426239369, ~z$w_buff1~0=~z$w_buff1~0_In1426239369, ~z~0=~z~0_In1426239369} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 18:44:02,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 18:44:02,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-713884249 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-713884249 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-713884249| ~z$w_buff0_used~0_In-713884249) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite21_Out-713884249| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-713884249, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-713884249} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-713884249, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-713884249, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-713884249|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 18:44:02,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd0~0_In864431426 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In864431426 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In864431426 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In864431426 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In864431426 |ULTIMATE.start_main_#t~ite22_Out864431426|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out864431426|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In864431426, ~z$w_buff0_used~0=~z$w_buff0_used~0_In864431426, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In864431426, ~z$w_buff1_used~0=~z$w_buff1_used~0_In864431426} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In864431426, ~z$w_buff0_used~0=~z$w_buff0_used~0_In864431426, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In864431426, ~z$w_buff1_used~0=~z$w_buff1_used~0_In864431426, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out864431426|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 18:44:02,574 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-713852215 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-713852215 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite23_Out-713852215|) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-713852215 |ULTIMATE.start_main_#t~ite23_Out-713852215|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-713852215, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-713852215} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-713852215, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-713852215, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-713852215|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 18:44:02,575 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In2001553632 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In2001553632 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In2001553632 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In2001553632 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite24_Out2001553632|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In2001553632 |ULTIMATE.start_main_#t~ite24_Out2001553632|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2001553632, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2001553632, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2001553632, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2001553632} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2001553632, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2001553632, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2001553632, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out2001553632|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2001553632} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 18:44:02,577 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-52336036 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_In-52336036| |ULTIMATE.start_main_#t~ite39_Out-52336036|) (= |ULTIMATE.start_main_#t~ite40_Out-52336036| ~z$w_buff1_used~0_In-52336036)) (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-52336036 256) 0))) (or (= (mod ~z$w_buff0_used~0_In-52336036 256) 0) (and (= 0 (mod ~z$w_buff1_used~0_In-52336036 256)) .cse1) (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-52336036 256))))) (= ~z$w_buff1_used~0_In-52336036 |ULTIMATE.start_main_#t~ite39_Out-52336036|) (= |ULTIMATE.start_main_#t~ite40_Out-52336036| |ULTIMATE.start_main_#t~ite39_Out-52336036|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-52336036, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-52336036, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-52336036|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-52336036, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-52336036, ~weak$$choice2~0=~weak$$choice2~0_In-52336036} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-52336036, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-52336036|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-52336036|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-52336036, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-52336036, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-52336036, ~weak$$choice2~0=~weak$$choice2~0_In-52336036} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 18:44:02,578 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:44:02,578 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In887785384 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_In887785384| |ULTIMATE.start_main_#t~ite45_Out887785384|) (= ~z$r_buff1_thd0~0_In887785384 |ULTIMATE.start_main_#t~ite46_Out887785384|) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite46_Out887785384| |ULTIMATE.start_main_#t~ite45_Out887785384|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In887785384 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In887785384 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In887785384 256)) (and (= 0 (mod ~z$r_buff1_thd0~0_In887785384 256)) .cse1))) (= ~z$r_buff1_thd0~0_In887785384 |ULTIMATE.start_main_#t~ite45_Out887785384|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In887785384, ~z$w_buff0_used~0=~z$w_buff0_used~0_In887785384, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In887785384, ~z$w_buff1_used~0=~z$w_buff1_used~0_In887785384, ~weak$$choice2~0=~weak$$choice2~0_In887785384, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In887785384|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In887785384, ~z$w_buff0_used~0=~z$w_buff0_used~0_In887785384, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In887785384, ~z$w_buff1_used~0=~z$w_buff1_used~0_In887785384, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out887785384|, ~weak$$choice2~0=~weak$$choice2~0_In887785384, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out887785384|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:44:02,578 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:44:02,578 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:44:02,631 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_1fb3ca6c-8e0e-4723-a0e5-165438f929cc/bin/uautomizer/witness.graphml [2019-12-07 18:44:02,631 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:44:02,632 INFO L168 Benchmark]: Toolchain (without parser) took 22651.17 ms. Allocated memory was 1.0 GB in the beginning and 4.0 GB in the end (delta: 3.0 GB). Free memory was 934.0 MB in the beginning and 3.0 GB in the end (delta: -2.1 GB). Peak memory consumption was 923.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:44:02,632 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:44:02,633 INFO L168 Benchmark]: CACSL2BoogieTranslator took 391.49 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -131.2 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:44:02,633 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.79 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:44:02,633 INFO L168 Benchmark]: Boogie Preprocessor took 26.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:44:02,634 INFO L168 Benchmark]: RCFGBuilder took 409.39 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.9 MB). Peak memory consumption was 55.9 MB. Max. memory is 11.5 GB. [2019-12-07 18:44:02,634 INFO L168 Benchmark]: TraceAbstraction took 21710.69 ms. Allocated memory was 1.1 GB in the beginning and 4.0 GB in the end (delta: 2.9 GB). Free memory was 1.0 GB in the beginning and 3.1 GB in the end (delta: -2.1 GB). Peak memory consumption was 847.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:44:02,634 INFO L168 Benchmark]: Witness Printer took 66.09 ms. Allocated memory is still 4.0 GB. Free memory was 3.1 GB in the beginning and 3.0 GB in the end (delta: 47.1 MB). Peak memory consumption was 47.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:44:02,636 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 391.49 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -131.2 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.79 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 409.39 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.9 MB). Peak memory consumption was 55.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 21710.69 ms. Allocated memory was 1.1 GB in the beginning and 4.0 GB in the end (delta: 2.9 GB). Free memory was 1.0 GB in the beginning and 3.1 GB in the end (delta: -2.1 GB). Peak memory consumption was 847.2 MB. Max. memory is 11.5 GB. * Witness Printer took 66.09 ms. Allocated memory is still 4.0 GB. Free memory was 3.1 GB in the beginning and 3.0 GB in the end (delta: 47.1 MB). Peak memory consumption was 47.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 181 ProgramPointsBefore, 92 ProgramPointsAfterwards, 209 TransitionsBefore, 100 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 7 FixpointIterations, 37 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 4988 VarBasedMoverChecksPositive, 283 VarBasedMoverChecksNegative, 145 SemBasedMoverChecksPositive, 210 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 52490 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L833] FCALL, FORK 0 pthread_create(&t1165, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] FCALL, FORK 0 pthread_create(&t1166, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1167, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L839] FCALL, FORK 0 pthread_create(&t1168, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L788] 4 z$w_buff1 = z$w_buff0 [L789] 4 z$w_buff0 = 2 [L790] 4 z$w_buff1_used = z$w_buff0_used [L791] 4 z$w_buff0_used = (_Bool)1 [L810] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 3 y = 1 [L771] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L810] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L774] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L811] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L812] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L775] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L776] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L777] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L845] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L846] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L847] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L848] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L849] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L852] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L853] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L854] 0 z$flush_delayed = weak$$choice2 [L855] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L857] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L857] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L858] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L859] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L859] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L860] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L862] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L863] 0 main$tmp_guard1 = !(x == 2 && z == 2 && __unbuffered_p1_EAX == 0 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 21.5s, OverallIterations: 24, TraceHistogramMax: 1, AutomataDifference: 6.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2699 SDtfs, 3119 SDslu, 8027 SDs, 0 SdLazy, 3975 SolverSat, 244 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 232 GetRequests, 41 SyntacticMatches, 15 SemanticMatches, 176 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 443 ImplicationChecksByTransitivity, 1.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=57282occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 7.8s AutomataMinimizationTime, 23 MinimizatonAttempts, 36586 StatesRemovedByMinimization, 18 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 1139 NumberOfCodeBlocks, 1139 NumberOfCodeBlocksAsserted, 24 NumberOfCheckSat, 1056 ConstructedInterpolants, 0 QuantifiedInterpolants, 261393 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 23 InterpolantComputations, 23 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...