./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix044_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix044_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash eb491e4922a7755aae1356d70859120bc09a42a6 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:40:06,255 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:40:06,256 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:40:06,264 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:40:06,264 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:40:06,265 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:40:06,266 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:40:06,267 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:40:06,269 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:40:06,269 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:40:06,270 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:40:06,271 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:40:06,271 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:40:06,272 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:40:06,273 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:40:06,273 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:40:06,274 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:40:06,275 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:40:06,276 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:40:06,278 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:40:06,279 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:40:06,279 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:40:06,280 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:40:06,280 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:40:06,282 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:40:06,282 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:40:06,282 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:40:06,283 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:40:06,283 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:40:06,284 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:40:06,284 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:40:06,284 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:40:06,285 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:40:06,285 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:40:06,286 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:40:06,286 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:40:06,286 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:40:06,287 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:40:06,287 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:40:06,287 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:40:06,288 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:40:06,288 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:40:06,298 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:40:06,298 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:40:06,299 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:40:06,299 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:40:06,299 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:40:06,299 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:40:06,299 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:40:06,299 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:40:06,300 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:40:06,300 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:40:06,300 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:40:06,300 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:40:06,300 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:40:06,300 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:40:06,300 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:40:06,301 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:40:06,301 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:40:06,301 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:40:06,301 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:40:06,301 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:40:06,301 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:40:06,301 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:40:06,302 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:40:06,302 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:40:06,302 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:40:06,302 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:40:06,302 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:40:06,302 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:40:06,302 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:40:06,302 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> eb491e4922a7755aae1356d70859120bc09a42a6 [2019-12-07 17:40:06,400 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:40:06,409 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:40:06,411 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:40:06,412 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:40:06,412 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:40:06,413 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix044_rmo.opt.i [2019-12-07 17:40:06,451 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/data/bc2983ee8/461dafca981446b19239a0f917ef835f/FLAG19361b80e [2019-12-07 17:40:06,837 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:40:06,837 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/sv-benchmarks/c/pthread-wmm/mix044_rmo.opt.i [2019-12-07 17:40:06,850 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/data/bc2983ee8/461dafca981446b19239a0f917ef835f/FLAG19361b80e [2019-12-07 17:40:06,859 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/data/bc2983ee8/461dafca981446b19239a0f917ef835f [2019-12-07 17:40:06,861 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:40:06,862 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:40:06,863 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:40:06,863 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:40:06,865 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:40:06,865 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:40:06" (1/1) ... [2019-12-07 17:40:06,867 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:06, skipping insertion in model container [2019-12-07 17:40:06,867 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:40:06" (1/1) ... [2019-12-07 17:40:06,872 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:40:06,901 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:40:07,162 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:40:07,170 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:40:07,210 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:40:07,255 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:40:07,256 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07 WrapperNode [2019-12-07 17:40:07,256 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:40:07,256 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:40:07,256 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:40:07,256 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:40:07,262 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07" (1/1) ... [2019-12-07 17:40:07,275 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07" (1/1) ... [2019-12-07 17:40:07,297 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:40:07,297 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:40:07,297 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:40:07,297 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:40:07,304 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07" (1/1) ... [2019-12-07 17:40:07,304 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07" (1/1) ... [2019-12-07 17:40:07,307 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07" (1/1) ... [2019-12-07 17:40:07,307 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07" (1/1) ... [2019-12-07 17:40:07,314 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07" (1/1) ... [2019-12-07 17:40:07,317 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07" (1/1) ... [2019-12-07 17:40:07,319 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07" (1/1) ... [2019-12-07 17:40:07,322 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:40:07,322 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:40:07,322 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:40:07,322 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:40:07,323 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:40:07,362 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:40:07,362 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:40:07,362 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:40:07,362 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:40:07,362 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:40:07,363 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:40:07,363 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:40:07,363 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:40:07,363 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:40:07,363 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:40:07,363 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 17:40:07,363 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 17:40:07,364 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:40:07,364 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:40:07,364 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:40:07,365 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:40:07,747 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:40:07,747 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:40:07,748 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:40:07 BoogieIcfgContainer [2019-12-07 17:40:07,748 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:40:07,748 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:40:07,748 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:40:07,750 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:40:07,750 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:40:06" (1/3) ... [2019-12-07 17:40:07,751 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@174c8494 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:40:07, skipping insertion in model container [2019-12-07 17:40:07,751 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:40:07" (2/3) ... [2019-12-07 17:40:07,751 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@174c8494 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:40:07, skipping insertion in model container [2019-12-07 17:40:07,751 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:40:07" (3/3) ... [2019-12-07 17:40:07,752 INFO L109 eAbstractionObserver]: Analyzing ICFG mix044_rmo.opt.i [2019-12-07 17:40:07,759 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:40:07,759 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:40:07,764 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:40:07,764 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:40:07,787 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,788 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,788 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,788 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,788 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,788 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,789 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,789 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,789 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,789 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,789 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,789 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,790 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,790 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,793 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,793 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,793 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,793 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,793 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,793 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,794 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,794 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,794 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,794 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,794 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,794 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,794 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,794 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:40:07,809 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 17:40:07,821 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:40:07,821 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:40:07,821 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:40:07,821 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:40:07,822 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:40:07,822 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:40:07,822 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:40:07,822 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:40:07,833 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 181 places, 209 transitions [2019-12-07 17:40:07,834 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 17:40:07,886 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 17:40:07,887 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:40:07,895 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 17:40:07,907 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 17:40:07,934 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 17:40:07,934 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:40:07,938 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 17:40:07,950 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 17:40:07,951 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:40:10,854 WARN L192 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 17:40:10,958 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 95 [2019-12-07 17:40:10,974 INFO L206 etLargeBlockEncoding]: Checked pairs total: 52490 [2019-12-07 17:40:10,974 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-12-07 17:40:10,976 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 17:40:12,966 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 37086 states. [2019-12-07 17:40:12,968 INFO L276 IsEmpty]: Start isEmpty. Operand 37086 states. [2019-12-07 17:40:12,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 17:40:12,972 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:12,973 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:12,973 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:12,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:12,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1862617909, now seen corresponding path program 1 times [2019-12-07 17:40:12,982 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:12,982 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1550710956] [2019-12-07 17:40:12,983 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:13,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:13,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:13,138 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1550710956] [2019-12-07 17:40:13,138 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:13,139 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:40:13,139 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1725542691] [2019-12-07 17:40:13,142 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:40:13,142 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:13,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:40:13,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:13,153 INFO L87 Difference]: Start difference. First operand 37086 states. Second operand 3 states. [2019-12-07 17:40:13,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:13,529 INFO L93 Difference]: Finished difference Result 36830 states and 157144 transitions. [2019-12-07 17:40:13,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:40:13,531 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 17:40:13,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:13,767 INFO L225 Difference]: With dead ends: 36830 [2019-12-07 17:40:13,767 INFO L226 Difference]: Without dead ends: 36102 [2019-12-07 17:40:13,768 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:14,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36102 states. [2019-12-07 17:40:14,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36102 to 36102. [2019-12-07 17:40:14,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36102 states. [2019-12-07 17:40:14,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36102 states to 36102 states and 154176 transitions. [2019-12-07 17:40:14,928 INFO L78 Accepts]: Start accepts. Automaton has 36102 states and 154176 transitions. Word has length 9 [2019-12-07 17:40:14,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:14,929 INFO L462 AbstractCegarLoop]: Abstraction has 36102 states and 154176 transitions. [2019-12-07 17:40:14,929 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:40:14,930 INFO L276 IsEmpty]: Start isEmpty. Operand 36102 states and 154176 transitions. [2019-12-07 17:40:14,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 17:40:14,936 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:14,936 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:14,936 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:14,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:14,937 INFO L82 PathProgramCache]: Analyzing trace with hash 290643941, now seen corresponding path program 1 times [2019-12-07 17:40:14,937 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:14,937 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210314394] [2019-12-07 17:40:14,937 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:14,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:14,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:14,995 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210314394] [2019-12-07 17:40:14,995 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:14,996 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:40:14,996 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043332727] [2019-12-07 17:40:14,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:40:14,997 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:14,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:40:14,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:40:14,997 INFO L87 Difference]: Start difference. First operand 36102 states and 154176 transitions. Second operand 4 states. [2019-12-07 17:40:15,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:15,425 INFO L93 Difference]: Finished difference Result 56134 states and 231868 transitions. [2019-12-07 17:40:15,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:40:15,426 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 17:40:15,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:15,715 INFO L225 Difference]: With dead ends: 56134 [2019-12-07 17:40:15,715 INFO L226 Difference]: Without dead ends: 56106 [2019-12-07 17:40:15,716 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:40:16,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56106 states. [2019-12-07 17:40:16,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56106 to 51222. [2019-12-07 17:40:16,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51222 states. [2019-12-07 17:40:17,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51222 states to 51222 states and 213628 transitions. [2019-12-07 17:40:17,110 INFO L78 Accepts]: Start accepts. Automaton has 51222 states and 213628 transitions. Word has length 15 [2019-12-07 17:40:17,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:17,111 INFO L462 AbstractCegarLoop]: Abstraction has 51222 states and 213628 transitions. [2019-12-07 17:40:17,111 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:40:17,111 INFO L276 IsEmpty]: Start isEmpty. Operand 51222 states and 213628 transitions. [2019-12-07 17:40:17,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 17:40:17,113 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:17,113 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:17,114 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:17,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:17,114 INFO L82 PathProgramCache]: Analyzing trace with hash -497322091, now seen corresponding path program 1 times [2019-12-07 17:40:17,114 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:17,114 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117865992] [2019-12-07 17:40:17,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:17,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:17,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:17,163 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117865992] [2019-12-07 17:40:17,164 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:17,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:40:17,164 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [401526151] [2019-12-07 17:40:17,164 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:40:17,164 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:17,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:40:17,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:40:17,165 INFO L87 Difference]: Start difference. First operand 51222 states and 213628 transitions. Second operand 4 states. [2019-12-07 17:40:17,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:17,539 INFO L93 Difference]: Finished difference Result 64218 states and 266056 transitions. [2019-12-07 17:40:17,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:40:17,540 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 17:40:17,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:17,693 INFO L225 Difference]: With dead ends: 64218 [2019-12-07 17:40:17,693 INFO L226 Difference]: Without dead ends: 64218 [2019-12-07 17:40:17,693 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:40:18,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64218 states. [2019-12-07 17:40:19,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64218 to 57026. [2019-12-07 17:40:19,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57026 states. [2019-12-07 17:40:20,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57026 states to 57026 states and 237588 transitions. [2019-12-07 17:40:20,411 INFO L78 Accepts]: Start accepts. Automaton has 57026 states and 237588 transitions. Word has length 15 [2019-12-07 17:40:20,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:20,412 INFO L462 AbstractCegarLoop]: Abstraction has 57026 states and 237588 transitions. [2019-12-07 17:40:20,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:40:20,412 INFO L276 IsEmpty]: Start isEmpty. Operand 57026 states and 237588 transitions. [2019-12-07 17:40:20,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 17:40:20,426 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:20,426 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:20,426 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:20,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:20,427 INFO L82 PathProgramCache]: Analyzing trace with hash -210168677, now seen corresponding path program 1 times [2019-12-07 17:40:20,427 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:20,427 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1059691876] [2019-12-07 17:40:20,427 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:20,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:20,499 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:20,500 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1059691876] [2019-12-07 17:40:20,500 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:20,500 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:40:20,500 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [522633945] [2019-12-07 17:40:20,501 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:40:20,501 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:20,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:40:20,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:40:20,502 INFO L87 Difference]: Start difference. First operand 57026 states and 237588 transitions. Second operand 5 states. [2019-12-07 17:40:21,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:21,086 INFO L93 Difference]: Finished difference Result 76194 states and 312200 transitions. [2019-12-07 17:40:21,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:40:21,087 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 17:40:21,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:21,258 INFO L225 Difference]: With dead ends: 76194 [2019-12-07 17:40:21,258 INFO L226 Difference]: Without dead ends: 76166 [2019-12-07 17:40:21,259 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:40:21,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76166 states. [2019-12-07 17:40:22,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76166 to 57282. [2019-12-07 17:40:22,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57282 states. [2019-12-07 17:40:22,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57282 states to 57282 states and 238068 transitions. [2019-12-07 17:40:22,714 INFO L78 Accepts]: Start accepts. Automaton has 57282 states and 238068 transitions. Word has length 21 [2019-12-07 17:40:22,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:22,714 INFO L462 AbstractCegarLoop]: Abstraction has 57282 states and 238068 transitions. [2019-12-07 17:40:22,715 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:40:22,715 INFO L276 IsEmpty]: Start isEmpty. Operand 57282 states and 238068 transitions. [2019-12-07 17:40:22,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 17:40:22,753 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:22,753 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:22,753 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:22,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:22,753 INFO L82 PathProgramCache]: Analyzing trace with hash 1504447988, now seen corresponding path program 1 times [2019-12-07 17:40:22,753 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:22,753 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1302256290] [2019-12-07 17:40:22,754 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:22,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:22,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:22,798 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1302256290] [2019-12-07 17:40:22,798 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:22,798 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:40:22,798 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [941324636] [2019-12-07 17:40:22,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:40:22,799 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:22,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:40:22,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:22,799 INFO L87 Difference]: Start difference. First operand 57282 states and 238068 transitions. Second operand 3 states. [2019-12-07 17:40:22,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:22,959 INFO L93 Difference]: Finished difference Result 44947 states and 172600 transitions. [2019-12-07 17:40:22,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:40:22,960 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 17:40:22,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:23,064 INFO L225 Difference]: With dead ends: 44947 [2019-12-07 17:40:23,064 INFO L226 Difference]: Without dead ends: 44947 [2019-12-07 17:40:23,065 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:23,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44947 states. [2019-12-07 17:40:23,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44947 to 44947. [2019-12-07 17:40:23,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44947 states. [2019-12-07 17:40:24,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44947 states to 44947 states and 172600 transitions. [2019-12-07 17:40:24,035 INFO L78 Accepts]: Start accepts. Automaton has 44947 states and 172600 transitions. Word has length 29 [2019-12-07 17:40:24,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:24,035 INFO L462 AbstractCegarLoop]: Abstraction has 44947 states and 172600 transitions. [2019-12-07 17:40:24,035 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:40:24,036 INFO L276 IsEmpty]: Start isEmpty. Operand 44947 states and 172600 transitions. [2019-12-07 17:40:24,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:40:24,062 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:24,062 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:24,062 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:24,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:24,063 INFO L82 PathProgramCache]: Analyzing trace with hash -28022635, now seen corresponding path program 1 times [2019-12-07 17:40:24,063 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:24,063 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1692059680] [2019-12-07 17:40:24,063 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:24,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:24,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:24,108 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1692059680] [2019-12-07 17:40:24,109 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:24,109 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:40:24,109 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2010943331] [2019-12-07 17:40:24,109 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:40:24,109 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:24,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:40:24,110 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:40:24,110 INFO L87 Difference]: Start difference. First operand 44947 states and 172600 transitions. Second operand 4 states. [2019-12-07 17:40:24,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:24,172 INFO L93 Difference]: Finished difference Result 18682 states and 59454 transitions. [2019-12-07 17:40:24,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:40:24,173 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 17:40:24,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:24,196 INFO L225 Difference]: With dead ends: 18682 [2019-12-07 17:40:24,197 INFO L226 Difference]: Without dead ends: 18682 [2019-12-07 17:40:24,197 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:40:24,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18682 states. [2019-12-07 17:40:24,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18682 to 18682. [2019-12-07 17:40:24,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18682 states. [2019-12-07 17:40:24,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18682 states to 18682 states and 59454 transitions. [2019-12-07 17:40:24,480 INFO L78 Accepts]: Start accepts. Automaton has 18682 states and 59454 transitions. Word has length 30 [2019-12-07 17:40:24,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:24,481 INFO L462 AbstractCegarLoop]: Abstraction has 18682 states and 59454 transitions. [2019-12-07 17:40:24,481 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:40:24,481 INFO L276 IsEmpty]: Start isEmpty. Operand 18682 states and 59454 transitions. [2019-12-07 17:40:24,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:40:24,491 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:24,491 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:24,491 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:24,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:24,491 INFO L82 PathProgramCache]: Analyzing trace with hash -882612910, now seen corresponding path program 1 times [2019-12-07 17:40:24,491 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:24,492 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [424808716] [2019-12-07 17:40:24,492 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:24,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:24,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:24,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [424808716] [2019-12-07 17:40:24,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:24,527 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:40:24,527 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54684172] [2019-12-07 17:40:24,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:40:24,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:24,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:40:24,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:40:24,528 INFO L87 Difference]: Start difference. First operand 18682 states and 59454 transitions. Second operand 5 states. [2019-12-07 17:40:24,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:24,555 INFO L93 Difference]: Finished difference Result 3095 states and 7883 transitions. [2019-12-07 17:40:24,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:40:24,556 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 17:40:24,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:24,559 INFO L225 Difference]: With dead ends: 3095 [2019-12-07 17:40:24,560 INFO L226 Difference]: Without dead ends: 3095 [2019-12-07 17:40:24,560 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:40:24,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3095 states. [2019-12-07 17:40:24,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3095 to 3095. [2019-12-07 17:40:24,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3095 states. [2019-12-07 17:40:24,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3095 states to 3095 states and 7883 transitions. [2019-12-07 17:40:24,594 INFO L78 Accepts]: Start accepts. Automaton has 3095 states and 7883 transitions. Word has length 31 [2019-12-07 17:40:24,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:24,595 INFO L462 AbstractCegarLoop]: Abstraction has 3095 states and 7883 transitions. [2019-12-07 17:40:24,595 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:40:24,595 INFO L276 IsEmpty]: Start isEmpty. Operand 3095 states and 7883 transitions. [2019-12-07 17:40:24,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 17:40:24,598 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:24,598 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:24,598 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:24,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:24,598 INFO L82 PathProgramCache]: Analyzing trace with hash 368185348, now seen corresponding path program 1 times [2019-12-07 17:40:24,599 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:24,599 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293214390] [2019-12-07 17:40:24,599 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:24,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:24,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:24,644 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [293214390] [2019-12-07 17:40:24,644 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:24,644 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:40:24,644 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1735112488] [2019-12-07 17:40:24,645 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:40:24,645 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:24,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:40:24,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:40:24,645 INFO L87 Difference]: Start difference. First operand 3095 states and 7883 transitions. Second operand 6 states. [2019-12-07 17:40:24,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:24,675 INFO L93 Difference]: Finished difference Result 1376 states and 3911 transitions. [2019-12-07 17:40:24,675 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:40:24,675 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 17:40:24,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:24,677 INFO L225 Difference]: With dead ends: 1376 [2019-12-07 17:40:24,677 INFO L226 Difference]: Without dead ends: 1376 [2019-12-07 17:40:24,678 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:40:24,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1376 states. [2019-12-07 17:40:24,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1376 to 1236. [2019-12-07 17:40:24,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1236 states. [2019-12-07 17:40:24,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1236 states to 1236 states and 3511 transitions. [2019-12-07 17:40:24,702 INFO L78 Accepts]: Start accepts. Automaton has 1236 states and 3511 transitions. Word has length 43 [2019-12-07 17:40:24,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:24,703 INFO L462 AbstractCegarLoop]: Abstraction has 1236 states and 3511 transitions. [2019-12-07 17:40:24,703 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:40:24,703 INFO L276 IsEmpty]: Start isEmpty. Operand 1236 states and 3511 transitions. [2019-12-07 17:40:24,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:40:24,705 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:24,706 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:24,706 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:24,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:24,706 INFO L82 PathProgramCache]: Analyzing trace with hash 2028178460, now seen corresponding path program 1 times [2019-12-07 17:40:24,706 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:24,706 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250490794] [2019-12-07 17:40:24,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:24,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:24,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:24,758 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250490794] [2019-12-07 17:40:24,758 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:24,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:40:24,759 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [44107727] [2019-12-07 17:40:24,759 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:40:24,759 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:24,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:40:24,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:24,760 INFO L87 Difference]: Start difference. First operand 1236 states and 3511 transitions. Second operand 3 states. [2019-12-07 17:40:24,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:24,796 INFO L93 Difference]: Finished difference Result 1249 states and 3529 transitions. [2019-12-07 17:40:24,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:40:24,797 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 17:40:24,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:24,799 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 17:40:24,799 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 17:40:24,799 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:24,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 17:40:24,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1243. [2019-12-07 17:40:24,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2019-12-07 17:40:24,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 3522 transitions. [2019-12-07 17:40:24,817 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 3522 transitions. Word has length 58 [2019-12-07 17:40:24,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:24,818 INFO L462 AbstractCegarLoop]: Abstraction has 1243 states and 3522 transitions. [2019-12-07 17:40:24,818 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:40:24,818 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 3522 transitions. [2019-12-07 17:40:24,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:40:24,820 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:24,820 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:24,820 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:24,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:24,821 INFO L82 PathProgramCache]: Analyzing trace with hash 1114375606, now seen corresponding path program 1 times [2019-12-07 17:40:24,821 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:24,821 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [154960664] [2019-12-07 17:40:24,821 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:24,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:24,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:24,869 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [154960664] [2019-12-07 17:40:24,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:24,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:40:24,870 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [774301246] [2019-12-07 17:40:24,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:40:24,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:24,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:40:24,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:24,871 INFO L87 Difference]: Start difference. First operand 1243 states and 3522 transitions. Second operand 3 states. [2019-12-07 17:40:24,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:24,907 INFO L93 Difference]: Finished difference Result 1249 states and 3519 transitions. [2019-12-07 17:40:24,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:40:24,908 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 17:40:24,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:24,910 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 17:40:24,910 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 17:40:24,910 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:24,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 17:40:24,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1240. [2019-12-07 17:40:24,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1240 states. [2019-12-07 17:40:24,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1240 states to 1240 states and 3510 transitions. [2019-12-07 17:40:24,927 INFO L78 Accepts]: Start accepts. Automaton has 1240 states and 3510 transitions. Word has length 58 [2019-12-07 17:40:24,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:24,928 INFO L462 AbstractCegarLoop]: Abstraction has 1240 states and 3510 transitions. [2019-12-07 17:40:24,928 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:40:24,928 INFO L276 IsEmpty]: Start isEmpty. Operand 1240 states and 3510 transitions. [2019-12-07 17:40:24,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:40:24,930 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:24,930 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:24,930 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:24,931 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:24,931 INFO L82 PathProgramCache]: Analyzing trace with hash 1114895507, now seen corresponding path program 1 times [2019-12-07 17:40:24,931 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:24,931 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [112266288] [2019-12-07 17:40:24,931 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:24,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:25,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:25,007 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [112266288] [2019-12-07 17:40:25,007 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:25,008 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:40:25,008 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1151343079] [2019-12-07 17:40:25,008 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:40:25,008 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:25,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:40:25,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:40:25,009 INFO L87 Difference]: Start difference. First operand 1240 states and 3510 transitions. Second operand 5 states. [2019-12-07 17:40:25,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:25,136 INFO L93 Difference]: Finished difference Result 1781 states and 5032 transitions. [2019-12-07 17:40:25,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:40:25,136 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-12-07 17:40:25,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:25,138 INFO L225 Difference]: With dead ends: 1781 [2019-12-07 17:40:25,138 INFO L226 Difference]: Without dead ends: 1781 [2019-12-07 17:40:25,138 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:40:25,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1781 states. [2019-12-07 17:40:25,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1781 to 1605. [2019-12-07 17:40:25,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1605 states. [2019-12-07 17:40:25,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1605 states to 1605 states and 4540 transitions. [2019-12-07 17:40:25,153 INFO L78 Accepts]: Start accepts. Automaton has 1605 states and 4540 transitions. Word has length 58 [2019-12-07 17:40:25,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:25,154 INFO L462 AbstractCegarLoop]: Abstraction has 1605 states and 4540 transitions. [2019-12-07 17:40:25,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:40:25,154 INFO L276 IsEmpty]: Start isEmpty. Operand 1605 states and 4540 transitions. [2019-12-07 17:40:25,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:40:25,155 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:25,156 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:25,156 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:25,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:25,156 INFO L82 PathProgramCache]: Analyzing trace with hash -217131029, now seen corresponding path program 2 times [2019-12-07 17:40:25,156 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:25,156 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682546791] [2019-12-07 17:40:25,156 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:25,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:25,235 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:25,235 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1682546791] [2019-12-07 17:40:25,235 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:25,235 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:40:25,235 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [123635068] [2019-12-07 17:40:25,236 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:40:25,236 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:25,236 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:40:25,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:40:25,236 INFO L87 Difference]: Start difference. First operand 1605 states and 4540 transitions. Second operand 6 states. [2019-12-07 17:40:25,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:25,476 INFO L93 Difference]: Finished difference Result 2387 states and 6749 transitions. [2019-12-07 17:40:25,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:40:25,476 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 17:40:25,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:25,478 INFO L225 Difference]: With dead ends: 2387 [2019-12-07 17:40:25,479 INFO L226 Difference]: Without dead ends: 2387 [2019-12-07 17:40:25,479 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:40:25,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2387 states. [2019-12-07 17:40:25,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2387 to 1749. [2019-12-07 17:40:25,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1749 states. [2019-12-07 17:40:25,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1749 states to 1749 states and 4968 transitions. [2019-12-07 17:40:25,498 INFO L78 Accepts]: Start accepts. Automaton has 1749 states and 4968 transitions. Word has length 58 [2019-12-07 17:40:25,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:25,498 INFO L462 AbstractCegarLoop]: Abstraction has 1749 states and 4968 transitions. [2019-12-07 17:40:25,499 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:40:25,499 INFO L276 IsEmpty]: Start isEmpty. Operand 1749 states and 4968 transitions. [2019-12-07 17:40:25,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 17:40:25,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:25,501 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:25,501 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:25,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:25,501 INFO L82 PathProgramCache]: Analyzing trace with hash 1417485459, now seen corresponding path program 3 times [2019-12-07 17:40:25,501 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:25,501 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1622669570] [2019-12-07 17:40:25,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:25,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:25,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:25,564 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1622669570] [2019-12-07 17:40:25,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:25,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:40:25,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079687166] [2019-12-07 17:40:25,565 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:40:25,565 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:25,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:40:25,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:25,565 INFO L87 Difference]: Start difference. First operand 1749 states and 4968 transitions. Second operand 3 states. [2019-12-07 17:40:25,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:25,599 INFO L93 Difference]: Finished difference Result 1748 states and 4966 transitions. [2019-12-07 17:40:25,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:40:25,600 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 17:40:25,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:25,602 INFO L225 Difference]: With dead ends: 1748 [2019-12-07 17:40:25,602 INFO L226 Difference]: Without dead ends: 1748 [2019-12-07 17:40:25,602 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:25,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1748 states. [2019-12-07 17:40:25,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1748 to 1319. [2019-12-07 17:40:25,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1319 states. [2019-12-07 17:40:25,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1319 states to 1319 states and 3756 transitions. [2019-12-07 17:40:25,623 INFO L78 Accepts]: Start accepts. Automaton has 1319 states and 3756 transitions. Word has length 58 [2019-12-07 17:40:25,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:25,623 INFO L462 AbstractCegarLoop]: Abstraction has 1319 states and 3756 transitions. [2019-12-07 17:40:25,623 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:40:25,623 INFO L276 IsEmpty]: Start isEmpty. Operand 1319 states and 3756 transitions. [2019-12-07 17:40:25,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:40:25,626 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:25,626 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:25,626 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:25,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:25,626 INFO L82 PathProgramCache]: Analyzing trace with hash 368051854, now seen corresponding path program 1 times [2019-12-07 17:40:25,626 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:25,627 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1293785877] [2019-12-07 17:40:25,627 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:25,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:25,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:25,707 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1293785877] [2019-12-07 17:40:25,707 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:25,707 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:40:25,708 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [878776055] [2019-12-07 17:40:25,708 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:40:25,708 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:25,708 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:40:25,708 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:40:25,708 INFO L87 Difference]: Start difference. First operand 1319 states and 3756 transitions. Second operand 6 states. [2019-12-07 17:40:25,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:25,758 INFO L93 Difference]: Finished difference Result 1877 states and 5042 transitions. [2019-12-07 17:40:25,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:40:25,758 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2019-12-07 17:40:25,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:25,759 INFO L225 Difference]: With dead ends: 1877 [2019-12-07 17:40:25,759 INFO L226 Difference]: Without dead ends: 1187 [2019-12-07 17:40:25,760 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:40:25,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1187 states. [2019-12-07 17:40:25,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1187 to 1187. [2019-12-07 17:40:25,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1187 states. [2019-12-07 17:40:25,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1187 states to 1187 states and 3309 transitions. [2019-12-07 17:40:25,772 INFO L78 Accepts]: Start accepts. Automaton has 1187 states and 3309 transitions. Word has length 59 [2019-12-07 17:40:25,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:25,772 INFO L462 AbstractCegarLoop]: Abstraction has 1187 states and 3309 transitions. [2019-12-07 17:40:25,772 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:40:25,772 INFO L276 IsEmpty]: Start isEmpty. Operand 1187 states and 3309 transitions. [2019-12-07 17:40:25,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:40:25,773 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:25,774 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:25,774 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:25,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:25,774 INFO L82 PathProgramCache]: Analyzing trace with hash 1147587362, now seen corresponding path program 2 times [2019-12-07 17:40:25,774 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:25,774 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1080313962] [2019-12-07 17:40:25,774 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:25,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:25,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:25,867 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1080313962] [2019-12-07 17:40:25,868 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:25,868 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:40:25,868 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1384343036] [2019-12-07 17:40:25,868 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:40:25,868 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:25,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:40:25,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:40:25,868 INFO L87 Difference]: Start difference. First operand 1187 states and 3309 transitions. Second operand 6 states. [2019-12-07 17:40:25,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:25,924 INFO L93 Difference]: Finished difference Result 1679 states and 4436 transitions. [2019-12-07 17:40:25,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:40:25,924 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2019-12-07 17:40:25,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:25,926 INFO L225 Difference]: With dead ends: 1679 [2019-12-07 17:40:25,926 INFO L226 Difference]: Without dead ends: 987 [2019-12-07 17:40:25,926 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:40:25,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 987 states. [2019-12-07 17:40:25,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 987 to 875. [2019-12-07 17:40:25,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 875 states. [2019-12-07 17:40:25,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 2144 transitions. [2019-12-07 17:40:25,935 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 2144 transitions. Word has length 59 [2019-12-07 17:40:25,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:25,935 INFO L462 AbstractCegarLoop]: Abstraction has 875 states and 2144 transitions. [2019-12-07 17:40:25,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:40:25,935 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 2144 transitions. [2019-12-07 17:40:25,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:40:25,936 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:25,936 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:25,936 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:25,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:25,936 INFO L82 PathProgramCache]: Analyzing trace with hash 83225480, now seen corresponding path program 3 times [2019-12-07 17:40:25,937 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:25,937 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2109416022] [2019-12-07 17:40:25,937 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:25,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:26,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:26,025 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2109416022] [2019-12-07 17:40:26,025 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:26,025 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:40:26,025 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526365990] [2019-12-07 17:40:26,026 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:40:26,026 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:26,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:40:26,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:40:26,026 INFO L87 Difference]: Start difference. First operand 875 states and 2144 transitions. Second operand 7 states. [2019-12-07 17:40:26,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:26,125 INFO L93 Difference]: Finished difference Result 1413 states and 3460 transitions. [2019-12-07 17:40:26,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 17:40:26,125 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 59 [2019-12-07 17:40:26,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:26,126 INFO L225 Difference]: With dead ends: 1413 [2019-12-07 17:40:26,126 INFO L226 Difference]: Without dead ends: 346 [2019-12-07 17:40:26,127 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:40:26,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2019-12-07 17:40:26,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 290. [2019-12-07 17:40:26,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 290 states. [2019-12-07 17:40:26,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 531 transitions. [2019-12-07 17:40:26,130 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 531 transitions. Word has length 59 [2019-12-07 17:40:26,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:26,131 INFO L462 AbstractCegarLoop]: Abstraction has 290 states and 531 transitions. [2019-12-07 17:40:26,131 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:40:26,131 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 531 transitions. [2019-12-07 17:40:26,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 17:40:26,132 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:26,132 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:26,132 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:26,132 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:26,132 INFO L82 PathProgramCache]: Analyzing trace with hash 211375676, now seen corresponding path program 4 times [2019-12-07 17:40:26,132 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:26,132 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487339914] [2019-12-07 17:40:26,133 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:26,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:26,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:26,165 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487339914] [2019-12-07 17:40:26,165 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:26,165 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:40:26,165 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667220359] [2019-12-07 17:40:26,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:40:26,165 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:26,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:40:26,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:26,166 INFO L87 Difference]: Start difference. First operand 290 states and 531 transitions. Second operand 3 states. [2019-12-07 17:40:26,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:26,174 INFO L93 Difference]: Finished difference Result 269 states and 474 transitions. [2019-12-07 17:40:26,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:40:26,174 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 17:40:26,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:26,174 INFO L225 Difference]: With dead ends: 269 [2019-12-07 17:40:26,174 INFO L226 Difference]: Without dead ends: 269 [2019-12-07 17:40:26,175 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:40:26,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2019-12-07 17:40:26,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 237. [2019-12-07 17:40:26,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2019-12-07 17:40:26,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 414 transitions. [2019-12-07 17:40:26,177 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 414 transitions. Word has length 59 [2019-12-07 17:40:26,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:26,177 INFO L462 AbstractCegarLoop]: Abstraction has 237 states and 414 transitions. [2019-12-07 17:40:26,177 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:40:26,177 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 414 transitions. [2019-12-07 17:40:26,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:40:26,177 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:26,178 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:26,178 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:26,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:26,178 INFO L82 PathProgramCache]: Analyzing trace with hash -1893006908, now seen corresponding path program 1 times [2019-12-07 17:40:26,178 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:26,178 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821989760] [2019-12-07 17:40:26,178 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:26,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:26,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:26,424 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821989760] [2019-12-07 17:40:26,424 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:26,424 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:40:26,424 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [504576080] [2019-12-07 17:40:26,424 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:40:26,424 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:26,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:40:26,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=148, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:40:26,425 INFO L87 Difference]: Start difference. First operand 237 states and 414 transitions. Second operand 14 states. [2019-12-07 17:40:26,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:26,708 INFO L93 Difference]: Finished difference Result 403 states and 684 transitions. [2019-12-07 17:40:26,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:40:26,709 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 60 [2019-12-07 17:40:26,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:26,709 INFO L225 Difference]: With dead ends: 403 [2019-12-07 17:40:26,709 INFO L226 Difference]: Without dead ends: 371 [2019-12-07 17:40:26,709 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=82, Invalid=380, Unknown=0, NotChecked=0, Total=462 [2019-12-07 17:40:26,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-12-07 17:40:26,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 337. [2019-12-07 17:40:26,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 337 states. [2019-12-07 17:40:26,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 585 transitions. [2019-12-07 17:40:26,712 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 585 transitions. Word has length 60 [2019-12-07 17:40:26,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:26,712 INFO L462 AbstractCegarLoop]: Abstraction has 337 states and 585 transitions. [2019-12-07 17:40:26,712 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:40:26,712 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 585 transitions. [2019-12-07 17:40:26,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:40:26,713 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:26,713 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:26,713 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:26,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:26,713 INFO L82 PathProgramCache]: Analyzing trace with hash -1191078724, now seen corresponding path program 2 times [2019-12-07 17:40:26,713 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:26,714 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379253264] [2019-12-07 17:40:26,714 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:26,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:40:26,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:40:26,954 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [379253264] [2019-12-07 17:40:26,954 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:40:26,954 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:40:26,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1724798517] [2019-12-07 17:40:26,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:40:26,954 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:40:26,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:40:26,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:40:26,955 INFO L87 Difference]: Start difference. First operand 337 states and 585 transitions. Second operand 14 states. [2019-12-07 17:40:27,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:40:27,207 INFO L93 Difference]: Finished difference Result 439 states and 735 transitions. [2019-12-07 17:40:27,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:40:27,207 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 60 [2019-12-07 17:40:27,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:40:27,208 INFO L225 Difference]: With dead ends: 439 [2019-12-07 17:40:27,208 INFO L226 Difference]: Without dead ends: 407 [2019-12-07 17:40:27,208 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=452, Unknown=0, NotChecked=0, Total=552 [2019-12-07 17:40:27,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 407 states. [2019-12-07 17:40:27,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 407 to 345. [2019-12-07 17:40:27,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2019-12-07 17:40:27,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 599 transitions. [2019-12-07 17:40:27,211 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 599 transitions. Word has length 60 [2019-12-07 17:40:27,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:40:27,211 INFO L462 AbstractCegarLoop]: Abstraction has 345 states and 599 transitions. [2019-12-07 17:40:27,211 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:40:27,211 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 599 transitions. [2019-12-07 17:40:27,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 17:40:27,211 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:40:27,212 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:40:27,212 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:40:27,212 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:40:27,212 INFO L82 PathProgramCache]: Analyzing trace with hash -1108974140, now seen corresponding path program 3 times [2019-12-07 17:40:27,212 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:40:27,212 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647274028] [2019-12-07 17:40:27,212 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:40:27,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:40:27,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:40:27,294 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:40:27,295 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:40:27,297 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_#NULL.offset_7| 0) (= v_~z$r_buff1_thd1~0_233 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1181~0.base_19|) 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1181~0.base_19|) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1181~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1181~0.base_19|) |v_ULTIMATE.start_main_~#t1181~0.offset_16| 0)) |v_#memory_int_25|) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= v_~b~0_102 0) (= v_~y~0_38 0) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (= 0 v_~weak$$choice0~0_17) (= v_~z$w_buff1~0_400 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t1181~0.base_19| 1)) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1181~0.base_19| 4) |v_#length_29|) (= v_~__unbuffered_p3_EAX~0_243 0) (= v_~z$r_buff0_thd0~0_435 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (= 0 |v_#NULL.base_7|) (= v_~z$r_buff0_thd1~0_87 0) (= v_~x~0_42 0) (= v_~z$w_buff1_used~0_620 0) (= 0 |v_ULTIMATE.start_main_~#t1181~0.offset_16|) (= v_~main$tmp_guard1~0_25 0) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ULTIMATE.start_main_~#t1182~0.base=|v_ULTIMATE.start_main_~#t1182~0.base_22|, ~a~0=v_~a~0_234, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ULTIMATE.start_main_~#t1182~0.offset=|v_ULTIMATE.start_main_~#t1182~0.offset_17|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_~#t1184~0.offset=|v_ULTIMATE.start_main_~#t1184~0.offset_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ULTIMATE.start_main_~#t1181~0.base=|v_ULTIMATE.start_main_~#t1181~0.base_19|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~x~0=v_~x~0_42, ULTIMATE.start_main_~#t1183~0.offset=|v_ULTIMATE.start_main_~#t1183~0.offset_16|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_~#t1183~0.base=|v_ULTIMATE.start_main_~#t1183~0.base_21|, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_38, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_~#t1181~0.offset=|v_ULTIMATE.start_main_~#t1181~0.offset_16|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ~b~0=v_~b~0_102, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87, ULTIMATE.start_main_~#t1184~0.base=|v_ULTIMATE.start_main_~#t1184~0.base_22|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1182~0.base, ~a~0, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t1182~0.offset, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_~#t1184~0.offset, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1181~0.base, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1183~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1183~0.base, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t1181~0.offset, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ULTIMATE.start_main_~#t1184~0.base] because there is no mapped edge [2019-12-07 17:40:27,298 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1182~0.base_13|) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1182~0.base_13|)) (not (= 0 |v_ULTIMATE.start_main_~#t1182~0.base_13|)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1182~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1182~0.base_13|) |v_ULTIMATE.start_main_~#t1182~0.offset_11| 1)) |v_#memory_int_19|) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1182~0.base_13| 4)) (= (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1182~0.base_13| 1) |v_#valid_48|) (= 0 |v_ULTIMATE.start_main_~#t1182~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t1182~0.offset=|v_ULTIMATE.start_main_~#t1182~0.offset_11|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1182~0.base=|v_ULTIMATE.start_main_~#t1182~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1182~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1182~0.base] because there is no mapped edge [2019-12-07 17:40:27,298 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1183~0.base_12| 0)) (= 0 |v_ULTIMATE.start_main_~#t1183~0.offset_10|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1183~0.base_12| 1)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1183~0.base_12|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1183~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1183~0.base_12|) |v_ULTIMATE.start_main_~#t1183~0.offset_10| 2)) |v_#memory_int_17|) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1183~0.base_12| 4) |v_#length_21|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1183~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1183~0.offset=|v_ULTIMATE.start_main_~#t1183~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1183~0.base=|v_ULTIMATE.start_main_~#t1183~0.base_12|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1183~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1183~0.base, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 17:40:27,299 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1184~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1184~0.base_12|) |v_ULTIMATE.start_main_~#t1184~0.offset_10| 3)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t1184~0.offset_10|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1184~0.base_12|)) (not (= 0 |v_ULTIMATE.start_main_~#t1184~0.base_12|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1184~0.base_12|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1184~0.base_12| 4)) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1184~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1184~0.offset=|v_ULTIMATE.start_main_~#t1184~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ULTIMATE.start_main_~#t1184~0.base=|v_ULTIMATE.start_main_~#t1184~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1184~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1184~0.base] because there is no mapped edge [2019-12-07 17:40:27,299 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 17:40:27,300 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|) (= v_~x~0_27 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_27, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:40:27,300 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= v_~y~0_28 v_~__unbuffered_p1_EAX~0_19) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x~0_32 2) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89, ~y~0=v_~y~0_28} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_19, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_28, ~x~0=v_~x~0_32, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:40:27,301 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-1716681304 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1716681304 256) 0))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite11_Out-1716681304| ~z$w_buff0_used~0_In-1716681304)) (and (not .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out-1716681304| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1716681304, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1716681304} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1716681304, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1716681304, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-1716681304|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 17:40:27,301 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1954168184 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1954168184 256)))) (or (and (or .cse0 .cse1) (= ~z~0_In1954168184 |P2Thread1of1ForFork2_#t~ite3_Out1954168184|)) (and (not .cse0) (= ~z$w_buff1~0_In1954168184 |P2Thread1of1ForFork2_#t~ite3_Out1954168184|) (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1954168184, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1954168184, ~z$w_buff1~0=~z$w_buff1~0_In1954168184, ~z~0=~z~0_In1954168184} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out1954168184|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1954168184, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1954168184, ~z$w_buff1~0=~z$w_buff1~0_In1954168184, ~z~0=~z~0_In1954168184} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:40:27,301 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd4~0_In1209155858 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1209155858 256))) (.cse1 (= (mod ~z$r_buff0_thd4~0_In1209155858 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1209155858 256)))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite12_Out1209155858| ~z$w_buff1_used~0_In1209155858) (or .cse2 .cse3)) (and (= |P3Thread1of1ForFork3_#t~ite12_Out1209155858| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1209155858, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1209155858, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1209155858, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1209155858} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1209155858, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1209155858, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1209155858, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1209155858, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out1209155858|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 17:40:27,302 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd4~0_In-2139884882 256) 0)) (.cse1 (= ~z$r_buff0_thd4~0_In-2139884882 ~z$r_buff0_thd4~0_Out-2139884882)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2139884882 256)))) (or (and .cse0 .cse1) (and (= 0 ~z$r_buff0_thd4~0_Out-2139884882) (not .cse0) (not .cse2)) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2139884882, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-2139884882} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2139884882, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-2139884882, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-2139884882|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 17:40:27,302 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-343203905 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In-343203905 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-343203905 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In-343203905 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out-343203905| ~z$r_buff1_thd4~0_In-343203905) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P3Thread1of1ForFork3_#t~ite14_Out-343203905|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-343203905, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-343203905, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-343203905, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-343203905} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-343203905, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-343203905, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-343203905|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-343203905, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-343203905} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 17:40:27,302 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 17:40:27,302 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 17:40:27,302 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1448644609 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1448644609 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out1448644609|)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1448644609 |P2Thread1of1ForFork2_#t~ite5_Out1448644609|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1448644609, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1448644609} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out1448644609|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1448644609, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1448644609} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:40:27,303 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-226044341 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-226044341 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-226044341 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-226044341 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-226044341|)) (and (= ~z$w_buff1_used~0_In-226044341 |P2Thread1of1ForFork2_#t~ite6_Out-226044341|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-226044341, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-226044341, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-226044341, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-226044341} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-226044341|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-226044341, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-226044341, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-226044341, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-226044341} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:40:27,303 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-198880881 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-198880881 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In-198880881 |P2Thread1of1ForFork2_#t~ite7_Out-198880881|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite7_Out-198880881|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-198880881, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-198880881} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-198880881, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-198880881, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-198880881|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:40:27,303 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1516821418 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1516821418 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1516821418 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1516821418 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite8_Out-1516821418|)) (and (= ~z$r_buff1_thd3~0_In-1516821418 |P2Thread1of1ForFork2_#t~ite8_Out-1516821418|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1516821418, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1516821418, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1516821418, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1516821418} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1516821418, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1516821418, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1516821418, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1516821418, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out-1516821418|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:40:27,303 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:40:27,303 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 17:40:27,304 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In396682221 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In396682221 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out396682221| ~z$w_buff1~0_In396682221) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite19_Out396682221| ~z~0_In396682221) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In396682221, ~z$w_buff1_used~0=~z$w_buff1_used~0_In396682221, ~z$w_buff1~0=~z$w_buff1~0_In396682221, ~z~0=~z~0_In396682221} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out396682221|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In396682221, ~z$w_buff1_used~0=~z$w_buff1_used~0_In396682221, ~z$w_buff1~0=~z$w_buff1~0_In396682221, ~z~0=~z~0_In396682221} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:40:27,304 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:40:27,304 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1177858547 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1177858547 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out1177858547| ~z$w_buff0_used~0_In1177858547) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out1177858547|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1177858547, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1177858547} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1177858547, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1177858547, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1177858547|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:40:27,304 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In959618197 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In959618197 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In959618197 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In959618197 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out959618197|)) (and (= ~z$w_buff1_used~0_In959618197 |ULTIMATE.start_main_#t~ite22_Out959618197|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In959618197, ~z$w_buff0_used~0=~z$w_buff0_used~0_In959618197, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In959618197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In959618197} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In959618197, ~z$w_buff0_used~0=~z$w_buff0_used~0_In959618197, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In959618197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In959618197, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out959618197|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:40:27,305 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In132744489 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In132744489 256) 0))) (or (and (= ~z$r_buff0_thd0~0_In132744489 |ULTIMATE.start_main_#t~ite23_Out132744489|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite23_Out132744489|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In132744489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In132744489} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In132744489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In132744489, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out132744489|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:40:27,305 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-2065337732 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-2065337732 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-2065337732 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-2065337732 256) 0))) (or (and (= ~z$r_buff1_thd0~0_In-2065337732 |ULTIMATE.start_main_#t~ite24_Out-2065337732|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite24_Out-2065337732|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2065337732, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2065337732, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2065337732, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2065337732} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2065337732, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2065337732, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2065337732, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-2065337732|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2065337732} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 17:40:27,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1160220521 256)))) (or (and (= |ULTIMATE.start_main_#t~ite39_In-1160220521| |ULTIMATE.start_main_#t~ite39_Out-1160220521|) (= |ULTIMATE.start_main_#t~ite40_Out-1160220521| ~z$w_buff1_used~0_In-1160220521) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite40_Out-1160220521| |ULTIMATE.start_main_#t~ite39_Out-1160220521|) (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1160220521 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In-1160220521 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd0~0_In-1160220521 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-1160220521 256)))) .cse0 (= ~z$w_buff1_used~0_In-1160220521 |ULTIMATE.start_main_#t~ite39_Out-1160220521|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1160220521, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1160220521, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-1160220521|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1160220521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1160220521, ~weak$$choice2~0=~weak$$choice2~0_In-1160220521} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1160220521, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-1160220521|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1160220521|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1160220521, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1160220521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1160220521, ~weak$$choice2~0=~weak$$choice2~0_In-1160220521} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 17:40:27,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:40:27,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2024642296 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_In2024642296| |ULTIMATE.start_main_#t~ite45_Out2024642296|) (not .cse0) (= |ULTIMATE.start_main_#t~ite46_Out2024642296| ~z$r_buff1_thd0~0_In2024642296)) (and (= |ULTIMATE.start_main_#t~ite45_Out2024642296| ~z$r_buff1_thd0~0_In2024642296) (= |ULTIMATE.start_main_#t~ite45_Out2024642296| |ULTIMATE.start_main_#t~ite46_Out2024642296|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In2024642296 256) 0))) (or (and (= (mod ~z$r_buff1_thd0~0_In2024642296 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In2024642296 256)) (and .cse1 (= (mod ~z$w_buff1_used~0_In2024642296 256) 0))))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2024642296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2024642296, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2024642296, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2024642296, ~weak$$choice2~0=~weak$$choice2~0_In2024642296, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In2024642296|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2024642296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2024642296, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2024642296, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2024642296, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out2024642296|, ~weak$$choice2~0=~weak$$choice2~0_In2024642296, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out2024642296|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:40:27,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:40:27,309 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:40:27,366 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:40:27 BasicIcfg [2019-12-07 17:40:27,366 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:40:27,366 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:40:27,366 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:40:27,366 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:40:27,367 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:40:07" (3/4) ... [2019-12-07 17:40:27,368 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:40:27,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_#NULL.offset_7| 0) (= v_~z$r_buff1_thd1~0_233 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1181~0.base_19|) 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1181~0.base_19|) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1181~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1181~0.base_19|) |v_ULTIMATE.start_main_~#t1181~0.offset_16| 0)) |v_#memory_int_25|) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= v_~b~0_102 0) (= v_~y~0_38 0) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (= 0 v_~weak$$choice0~0_17) (= v_~z$w_buff1~0_400 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t1181~0.base_19| 1)) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1181~0.base_19| 4) |v_#length_29|) (= v_~__unbuffered_p3_EAX~0_243 0) (= v_~z$r_buff0_thd0~0_435 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (= 0 |v_#NULL.base_7|) (= v_~z$r_buff0_thd1~0_87 0) (= v_~x~0_42 0) (= v_~z$w_buff1_used~0_620 0) (= 0 |v_ULTIMATE.start_main_~#t1181~0.offset_16|) (= v_~main$tmp_guard1~0_25 0) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ULTIMATE.start_main_~#t1182~0.base=|v_ULTIMATE.start_main_~#t1182~0.base_22|, ~a~0=v_~a~0_234, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ULTIMATE.start_main_~#t1182~0.offset=|v_ULTIMATE.start_main_~#t1182~0.offset_17|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_~#t1184~0.offset=|v_ULTIMATE.start_main_~#t1184~0.offset_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ULTIMATE.start_main_~#t1181~0.base=|v_ULTIMATE.start_main_~#t1181~0.base_19|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~x~0=v_~x~0_42, ULTIMATE.start_main_~#t1183~0.offset=|v_ULTIMATE.start_main_~#t1183~0.offset_16|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_~#t1183~0.base=|v_ULTIMATE.start_main_~#t1183~0.base_21|, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_38, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_~#t1181~0.offset=|v_ULTIMATE.start_main_~#t1181~0.offset_16|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ~b~0=v_~b~0_102, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87, ULTIMATE.start_main_~#t1184~0.base=|v_ULTIMATE.start_main_~#t1184~0.base_22|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1182~0.base, ~a~0, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t1182~0.offset, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_~#t1184~0.offset, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t1181~0.base, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1183~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1183~0.base, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t1181~0.offset, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ULTIMATE.start_main_~#t1184~0.base] because there is no mapped edge [2019-12-07 17:40:27,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1182~0.base_13|) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1182~0.base_13|)) (not (= 0 |v_ULTIMATE.start_main_~#t1182~0.base_13|)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1182~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1182~0.base_13|) |v_ULTIMATE.start_main_~#t1182~0.offset_11| 1)) |v_#memory_int_19|) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1182~0.base_13| 4)) (= (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1182~0.base_13| 1) |v_#valid_48|) (= 0 |v_ULTIMATE.start_main_~#t1182~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t1182~0.offset=|v_ULTIMATE.start_main_~#t1182~0.offset_11|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1182~0.base=|v_ULTIMATE.start_main_~#t1182~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1182~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1182~0.base] because there is no mapped edge [2019-12-07 17:40:27,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1183~0.base_12| 0)) (= 0 |v_ULTIMATE.start_main_~#t1183~0.offset_10|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1183~0.base_12| 1)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1183~0.base_12|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1183~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1183~0.base_12|) |v_ULTIMATE.start_main_~#t1183~0.offset_10| 2)) |v_#memory_int_17|) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1183~0.base_12| 4) |v_#length_21|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1183~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1183~0.offset=|v_ULTIMATE.start_main_~#t1183~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1183~0.base=|v_ULTIMATE.start_main_~#t1183~0.base_12|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1183~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1183~0.base, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 17:40:27,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1184~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1184~0.base_12|) |v_ULTIMATE.start_main_~#t1184~0.offset_10| 3)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t1184~0.offset_10|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1184~0.base_12|)) (not (= 0 |v_ULTIMATE.start_main_~#t1184~0.base_12|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1184~0.base_12|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1184~0.base_12| 4)) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1184~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1184~0.offset=|v_ULTIMATE.start_main_~#t1184~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ULTIMATE.start_main_~#t1184~0.base=|v_ULTIMATE.start_main_~#t1184~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1184~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1184~0.base] because there is no mapped edge [2019-12-07 17:40:27,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 17:40:27,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|) (= v_~x~0_27 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_27, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:40:27,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= v_~y~0_28 v_~__unbuffered_p1_EAX~0_19) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x~0_32 2) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89, ~y~0=v_~y~0_28} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_19, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_28, ~x~0=v_~x~0_32, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:40:27,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-1716681304 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1716681304 256) 0))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite11_Out-1716681304| ~z$w_buff0_used~0_In-1716681304)) (and (not .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out-1716681304| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1716681304, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1716681304} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1716681304, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1716681304, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-1716681304|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 17:40:27,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1954168184 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1954168184 256)))) (or (and (or .cse0 .cse1) (= ~z~0_In1954168184 |P2Thread1of1ForFork2_#t~ite3_Out1954168184|)) (and (not .cse0) (= ~z$w_buff1~0_In1954168184 |P2Thread1of1ForFork2_#t~ite3_Out1954168184|) (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1954168184, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1954168184, ~z$w_buff1~0=~z$w_buff1~0_In1954168184, ~z~0=~z~0_In1954168184} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out1954168184|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1954168184, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1954168184, ~z$w_buff1~0=~z$w_buff1~0_In1954168184, ~z~0=~z~0_In1954168184} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:40:27,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd4~0_In1209155858 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1209155858 256))) (.cse1 (= (mod ~z$r_buff0_thd4~0_In1209155858 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1209155858 256)))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork3_#t~ite12_Out1209155858| ~z$w_buff1_used~0_In1209155858) (or .cse2 .cse3)) (and (= |P3Thread1of1ForFork3_#t~ite12_Out1209155858| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1209155858, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1209155858, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1209155858, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1209155858} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1209155858, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1209155858, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1209155858, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1209155858, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out1209155858|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 17:40:27,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd4~0_In-2139884882 256) 0)) (.cse1 (= ~z$r_buff0_thd4~0_In-2139884882 ~z$r_buff0_thd4~0_Out-2139884882)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2139884882 256)))) (or (and .cse0 .cse1) (and (= 0 ~z$r_buff0_thd4~0_Out-2139884882) (not .cse0) (not .cse2)) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2139884882, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-2139884882} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2139884882, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-2139884882, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-2139884882|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 17:40:27,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-343203905 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In-343203905 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-343203905 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In-343203905 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out-343203905| ~z$r_buff1_thd4~0_In-343203905) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P3Thread1of1ForFork3_#t~ite14_Out-343203905|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-343203905, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-343203905, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-343203905, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-343203905} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-343203905, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-343203905, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-343203905|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-343203905, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-343203905} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 17:40:27,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 17:40:27,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 17:40:27,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1448644609 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1448644609 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out1448644609|)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1448644609 |P2Thread1of1ForFork2_#t~ite5_Out1448644609|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1448644609, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1448644609} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out1448644609|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1448644609, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1448644609} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:40:27,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-226044341 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-226044341 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-226044341 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-226044341 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-226044341|)) (and (= ~z$w_buff1_used~0_In-226044341 |P2Thread1of1ForFork2_#t~ite6_Out-226044341|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-226044341, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-226044341, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-226044341, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-226044341} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-226044341|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-226044341, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-226044341, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-226044341, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-226044341} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:40:27,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-198880881 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-198880881 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In-198880881 |P2Thread1of1ForFork2_#t~ite7_Out-198880881|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite7_Out-198880881|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-198880881, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-198880881} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-198880881, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-198880881, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out-198880881|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:40:27,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1516821418 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1516821418 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1516821418 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1516821418 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite8_Out-1516821418|)) (and (= ~z$r_buff1_thd3~0_In-1516821418 |P2Thread1of1ForFork2_#t~ite8_Out-1516821418|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1516821418, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1516821418, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1516821418, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1516821418} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1516821418, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1516821418, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1516821418, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1516821418, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out-1516821418|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:40:27,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:40:27,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 17:40:27,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In396682221 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In396682221 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out396682221| ~z$w_buff1~0_In396682221) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite19_Out396682221| ~z~0_In396682221) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In396682221, ~z$w_buff1_used~0=~z$w_buff1_used~0_In396682221, ~z$w_buff1~0=~z$w_buff1~0_In396682221, ~z~0=~z~0_In396682221} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out396682221|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In396682221, ~z$w_buff1_used~0=~z$w_buff1_used~0_In396682221, ~z$w_buff1~0=~z$w_buff1~0_In396682221, ~z~0=~z~0_In396682221} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:40:27,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:40:27,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1177858547 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1177858547 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out1177858547| ~z$w_buff0_used~0_In1177858547) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite21_Out1177858547|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1177858547, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1177858547} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1177858547, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1177858547, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1177858547|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:40:27,375 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In959618197 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In959618197 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In959618197 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In959618197 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out959618197|)) (and (= ~z$w_buff1_used~0_In959618197 |ULTIMATE.start_main_#t~ite22_Out959618197|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In959618197, ~z$w_buff0_used~0=~z$w_buff0_used~0_In959618197, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In959618197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In959618197} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In959618197, ~z$w_buff0_used~0=~z$w_buff0_used~0_In959618197, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In959618197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In959618197, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out959618197|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:40:27,375 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In132744489 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In132744489 256) 0))) (or (and (= ~z$r_buff0_thd0~0_In132744489 |ULTIMATE.start_main_#t~ite23_Out132744489|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite23_Out132744489|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In132744489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In132744489} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In132744489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In132744489, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out132744489|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:40:27,375 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-2065337732 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-2065337732 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-2065337732 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-2065337732 256) 0))) (or (and (= ~z$r_buff1_thd0~0_In-2065337732 |ULTIMATE.start_main_#t~ite24_Out-2065337732|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite24_Out-2065337732|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2065337732, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2065337732, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2065337732, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2065337732} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2065337732, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2065337732, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2065337732, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-2065337732|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2065337732} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 17:40:27,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1160220521 256)))) (or (and (= |ULTIMATE.start_main_#t~ite39_In-1160220521| |ULTIMATE.start_main_#t~ite39_Out-1160220521|) (= |ULTIMATE.start_main_#t~ite40_Out-1160220521| ~z$w_buff1_used~0_In-1160220521) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite40_Out-1160220521| |ULTIMATE.start_main_#t~ite39_Out-1160220521|) (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1160220521 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In-1160220521 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd0~0_In-1160220521 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-1160220521 256)))) .cse0 (= ~z$w_buff1_used~0_In-1160220521 |ULTIMATE.start_main_#t~ite39_Out-1160220521|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1160220521, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1160220521, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-1160220521|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1160220521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1160220521, ~weak$$choice2~0=~weak$$choice2~0_In-1160220521} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1160220521, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-1160220521|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1160220521|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1160220521, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1160220521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1160220521, ~weak$$choice2~0=~weak$$choice2~0_In-1160220521} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 17:40:27,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:40:27,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2024642296 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_In2024642296| |ULTIMATE.start_main_#t~ite45_Out2024642296|) (not .cse0) (= |ULTIMATE.start_main_#t~ite46_Out2024642296| ~z$r_buff1_thd0~0_In2024642296)) (and (= |ULTIMATE.start_main_#t~ite45_Out2024642296| ~z$r_buff1_thd0~0_In2024642296) (= |ULTIMATE.start_main_#t~ite45_Out2024642296| |ULTIMATE.start_main_#t~ite46_Out2024642296|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In2024642296 256) 0))) (or (and (= (mod ~z$r_buff1_thd0~0_In2024642296 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In2024642296 256)) (and .cse1 (= (mod ~z$w_buff1_used~0_In2024642296 256) 0))))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2024642296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2024642296, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2024642296, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2024642296, ~weak$$choice2~0=~weak$$choice2~0_In2024642296, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In2024642296|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2024642296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2024642296, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2024642296, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2024642296, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out2024642296|, ~weak$$choice2~0=~weak$$choice2~0_In2024642296, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out2024642296|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:40:27,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:40:27,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:40:27,431 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_41cf4d6b-f409-4502-bcef-45d5d8be3206/bin/uautomizer/witness.graphml [2019-12-07 17:40:27,431 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:40:27,432 INFO L168 Benchmark]: Toolchain (without parser) took 20570.22 ms. Allocated memory was 1.0 GB in the beginning and 3.6 GB in the end (delta: 2.5 GB). Free memory was 939.9 MB in the beginning and 2.0 GB in the end (delta: -1.0 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-12-07 17:40:27,432 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:40:27,433 INFO L168 Benchmark]: CACSL2BoogieTranslator took 393.43 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 939.9 MB in the beginning and 1.1 GB in the end (delta: -164.1 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:40:27,433 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.78 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:40:27,433 INFO L168 Benchmark]: Boogie Preprocessor took 24.88 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:40:27,433 INFO L168 Benchmark]: RCFGBuilder took 425.52 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:40:27,434 INFO L168 Benchmark]: TraceAbstraction took 19617.73 ms. Allocated memory was 1.2 GB in the beginning and 3.6 GB in the end (delta: 2.4 GB). Free memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: -924.2 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-12-07 17:40:27,434 INFO L168 Benchmark]: Witness Printer took 65.01 ms. Allocated memory is still 3.6 GB. Free memory was 2.0 GB in the beginning and 2.0 GB in the end (delta: 8.9 MB). Peak memory consumption was 8.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:40:27,435 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 393.43 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 939.9 MB in the beginning and 1.1 GB in the end (delta: -164.1 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.78 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.88 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 425.52 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 19617.73 ms. Allocated memory was 1.2 GB in the beginning and 3.6 GB in the end (delta: 2.4 GB). Free memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: -924.2 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. * Witness Printer took 65.01 ms. Allocated memory is still 3.6 GB. Free memory was 2.0 GB in the beginning and 2.0 GB in the end (delta: 8.9 MB). Peak memory consumption was 8.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 181 ProgramPointsBefore, 92 ProgramPointsAfterwards, 209 TransitionsBefore, 100 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 7 FixpointIterations, 37 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 4988 VarBasedMoverChecksPositive, 283 VarBasedMoverChecksNegative, 145 SemBasedMoverChecksPositive, 210 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 52490 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L833] FCALL, FORK 0 pthread_create(&t1181, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] FCALL, FORK 0 pthread_create(&t1182, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1183, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L839] FCALL, FORK 0 pthread_create(&t1184, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L788] 4 z$w_buff1 = z$w_buff0 [L789] 4 z$w_buff0 = 2 [L790] 4 z$w_buff1_used = z$w_buff0_used [L791] 4 z$w_buff0_used = (_Bool)1 [L810] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 3 y = 1 [L771] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L810] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L774] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L811] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L812] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L775] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L776] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L777] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L845] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L846] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L847] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L848] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L849] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L852] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L853] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L854] 0 z$flush_delayed = weak$$choice2 [L855] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L857] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L857] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L858] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L859] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L859] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L860] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L862] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L863] 0 main$tmp_guard1 = !(x == 2 && z == 2 && __unbuffered_p1_EAX == 0 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 19.4s, OverallIterations: 20, TraceHistogramMax: 1, AutomataDifference: 4.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2152 SDtfs, 2209 SDslu, 4676 SDs, 0 SdLazy, 1938 SolverSat, 164 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 137 GetRequests, 27 SyntacticMatches, 7 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 156 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=57282occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 8.1s AutomataMinimizationTime, 19 MinimizatonAttempts, 32654 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 899 NumberOfCodeBlocks, 899 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 820 ConstructedInterpolants, 0 QuantifiedInterpolants, 185920 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 19 InterpolantComputations, 19 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...