./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix044_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix044_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ea5e8bbaf4d83dde2b088d68d2e07db409059ba8 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:50:37,133 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:50:37,134 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:50:37,141 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:50:37,142 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:50:37,142 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:50:37,143 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:50:37,145 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:50:37,146 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:50:37,147 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:50:37,147 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:50:37,148 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:50:37,148 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:50:37,149 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:50:37,150 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:50:37,150 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:50:37,151 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:50:37,152 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:50:37,153 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:50:37,155 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:50:37,156 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:50:37,157 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:50:37,158 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:50:37,158 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:50:37,160 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:50:37,160 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:50:37,160 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:50:37,161 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:50:37,161 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:50:37,162 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:50:37,162 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:50:37,162 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:50:37,163 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:50:37,163 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:50:37,164 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:50:37,164 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:50:37,164 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:50:37,164 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:50:37,164 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:50:37,165 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:50:37,165 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:50:37,166 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 13:50:37,175 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:50:37,175 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:50:37,176 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 13:50:37,176 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 13:50:37,176 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 13:50:37,176 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:50:37,177 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:50:37,177 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:50:37,177 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:50:37,177 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:50:37,177 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:50:37,177 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:50:37,177 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:50:37,177 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:50:37,177 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:50:37,178 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:50:37,178 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:50:37,178 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:50:37,178 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 13:50:37,178 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:50:37,178 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:50:37,178 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:50:37,178 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:50:37,179 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:50:37,179 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:50:37,179 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 13:50:37,179 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:50:37,179 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:50:37,179 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:50:37,179 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ea5e8bbaf4d83dde2b088d68d2e07db409059ba8 [2019-12-07 13:50:37,282 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:50:37,292 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:50:37,295 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:50:37,296 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:50:37,296 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:50:37,297 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix044_tso.opt.i [2019-12-07 13:50:37,344 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/data/9b33bfce4/09841adf180f48eba6c1559c5a7b17b9/FLAG3cfba5700 [2019-12-07 13:50:37,822 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:50:37,823 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/sv-benchmarks/c/pthread-wmm/mix044_tso.opt.i [2019-12-07 13:50:37,833 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/data/9b33bfce4/09841adf180f48eba6c1559c5a7b17b9/FLAG3cfba5700 [2019-12-07 13:50:37,842 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/data/9b33bfce4/09841adf180f48eba6c1559c5a7b17b9 [2019-12-07 13:50:37,844 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:50:37,845 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:50:37,845 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:50:37,845 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:50:37,848 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:50:37,848 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:50:37" (1/1) ... [2019-12-07 13:50:37,850 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:37, skipping insertion in model container [2019-12-07 13:50:37,851 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:50:37" (1/1) ... [2019-12-07 13:50:37,856 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:50:37,890 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:50:38,141 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:50:38,150 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:50:38,192 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:50:38,239 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:50:38,239 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38 WrapperNode [2019-12-07 13:50:38,239 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:50:38,240 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:50:38,240 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:50:38,240 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:50:38,246 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38" (1/1) ... [2019-12-07 13:50:38,260 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38" (1/1) ... [2019-12-07 13:50:38,282 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:50:38,283 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:50:38,283 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:50:38,283 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:50:38,289 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38" (1/1) ... [2019-12-07 13:50:38,289 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38" (1/1) ... [2019-12-07 13:50:38,293 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38" (1/1) ... [2019-12-07 13:50:38,293 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38" (1/1) ... [2019-12-07 13:50:38,300 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38" (1/1) ... [2019-12-07 13:50:38,303 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38" (1/1) ... [2019-12-07 13:50:38,305 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38" (1/1) ... [2019-12-07 13:50:38,309 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:50:38,310 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:50:38,310 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:50:38,310 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:50:38,311 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:50:38,358 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:50:38,358 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:50:38,358 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:50:38,358 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:50:38,358 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:50:38,358 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:50:38,358 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:50:38,359 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:50:38,359 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:50:38,359 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:50:38,359 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 13:50:38,359 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 13:50:38,359 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:50:38,359 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:50:38,359 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:50:38,360 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:50:38,743 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:50:38,743 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:50:38,744 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:50:38 BoogieIcfgContainer [2019-12-07 13:50:38,745 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:50:38,746 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:50:38,746 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:50:38,748 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:50:38,748 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:50:37" (1/3) ... [2019-12-07 13:50:38,749 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@31516edd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:50:38, skipping insertion in model container [2019-12-07 13:50:38,749 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:50:38" (2/3) ... [2019-12-07 13:50:38,749 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@31516edd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:50:38, skipping insertion in model container [2019-12-07 13:50:38,750 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:50:38" (3/3) ... [2019-12-07 13:50:38,751 INFO L109 eAbstractionObserver]: Analyzing ICFG mix044_tso.opt.i [2019-12-07 13:50:38,759 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:50:38,759 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:50:38,764 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:50:38,764 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:50:38,787 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,787 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,787 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,787 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,788 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,788 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,788 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,788 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,788 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,788 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,788 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,789 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,789 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,789 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,793 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,793 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,793 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,793 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,794 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,794 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,794 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,794 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,794 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,794 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,794 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,795 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,796 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,797 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:50:38,809 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 13:50:38,822 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:50:38,822 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:50:38,822 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:50:38,822 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:50:38,822 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:50:38,822 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:50:38,822 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:50:38,823 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:50:38,835 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 181 places, 209 transitions [2019-12-07 13:50:38,836 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 13:50:38,894 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 13:50:38,894 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:50:38,904 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 13:50:38,916 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 13:50:38,942 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 13:50:38,942 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:50:38,946 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 13:50:38,957 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 13:50:38,958 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:50:41,853 WARN L192 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 13:50:41,979 INFO L206 etLargeBlockEncoding]: Checked pairs total: 52490 [2019-12-07 13:50:41,979 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-12-07 13:50:41,982 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 13:50:43,933 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 37086 states. [2019-12-07 13:50:43,935 INFO L276 IsEmpty]: Start isEmpty. Operand 37086 states. [2019-12-07 13:50:43,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 13:50:43,939 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:43,940 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:43,940 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:43,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:43,944 INFO L82 PathProgramCache]: Analyzing trace with hash -1862617909, now seen corresponding path program 1 times [2019-12-07 13:50:43,949 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:43,949 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [867195378] [2019-12-07 13:50:43,950 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:44,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:44,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:44,101 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [867195378] [2019-12-07 13:50:44,102 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:44,102 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:50:44,102 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1666679535] [2019-12-07 13:50:44,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:50:44,105 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:44,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:50:44,115 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:44,116 INFO L87 Difference]: Start difference. First operand 37086 states. Second operand 3 states. [2019-12-07 13:50:44,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:44,487 INFO L93 Difference]: Finished difference Result 36830 states and 157144 transitions. [2019-12-07 13:50:44,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:50:44,488 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 13:50:44,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:44,721 INFO L225 Difference]: With dead ends: 36830 [2019-12-07 13:50:44,722 INFO L226 Difference]: Without dead ends: 36102 [2019-12-07 13:50:44,723 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:45,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36102 states. [2019-12-07 13:50:45,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36102 to 36102. [2019-12-07 13:50:45,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36102 states. [2019-12-07 13:50:45,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36102 states to 36102 states and 154176 transitions. [2019-12-07 13:50:45,942 INFO L78 Accepts]: Start accepts. Automaton has 36102 states and 154176 transitions. Word has length 9 [2019-12-07 13:50:45,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:45,943 INFO L462 AbstractCegarLoop]: Abstraction has 36102 states and 154176 transitions. [2019-12-07 13:50:45,943 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:50:45,944 INFO L276 IsEmpty]: Start isEmpty. Operand 36102 states and 154176 transitions. [2019-12-07 13:50:45,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 13:50:45,948 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:45,949 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:45,949 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:45,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:45,949 INFO L82 PathProgramCache]: Analyzing trace with hash 290643941, now seen corresponding path program 1 times [2019-12-07 13:50:45,949 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:45,949 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1525756971] [2019-12-07 13:50:45,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:45,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:46,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:46,006 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1525756971] [2019-12-07 13:50:46,006 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:46,006 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:50:46,006 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119905583] [2019-12-07 13:50:46,007 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:50:46,007 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:46,007 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:50:46,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:50:46,008 INFO L87 Difference]: Start difference. First operand 36102 states and 154176 transitions. Second operand 4 states. [2019-12-07 13:50:46,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:46,425 INFO L93 Difference]: Finished difference Result 56134 states and 231868 transitions. [2019-12-07 13:50:46,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:50:46,426 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 13:50:46,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:46,707 INFO L225 Difference]: With dead ends: 56134 [2019-12-07 13:50:46,708 INFO L226 Difference]: Without dead ends: 56106 [2019-12-07 13:50:46,708 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:50:47,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56106 states. [2019-12-07 13:50:47,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56106 to 51222. [2019-12-07 13:50:47,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51222 states. [2019-12-07 13:50:47,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51222 states to 51222 states and 213628 transitions. [2019-12-07 13:50:47,944 INFO L78 Accepts]: Start accepts. Automaton has 51222 states and 213628 transitions. Word has length 15 [2019-12-07 13:50:47,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:47,944 INFO L462 AbstractCegarLoop]: Abstraction has 51222 states and 213628 transitions. [2019-12-07 13:50:47,944 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:50:47,944 INFO L276 IsEmpty]: Start isEmpty. Operand 51222 states and 213628 transitions. [2019-12-07 13:50:47,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 13:50:47,946 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:47,946 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:47,946 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:47,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:47,946 INFO L82 PathProgramCache]: Analyzing trace with hash -497322091, now seen corresponding path program 1 times [2019-12-07 13:50:47,947 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:47,947 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [547045729] [2019-12-07 13:50:47,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:47,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:47,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:47,992 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [547045729] [2019-12-07 13:50:47,993 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:47,993 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:50:47,993 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [190954623] [2019-12-07 13:50:47,993 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:50:47,993 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:47,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:50:47,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:50:47,994 INFO L87 Difference]: Start difference. First operand 51222 states and 213628 transitions. Second operand 4 states. [2019-12-07 13:50:48,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:48,471 INFO L93 Difference]: Finished difference Result 64218 states and 266056 transitions. [2019-12-07 13:50:48,471 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:50:48,471 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 13:50:48,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:48,601 INFO L225 Difference]: With dead ends: 64218 [2019-12-07 13:50:48,601 INFO L226 Difference]: Without dead ends: 64218 [2019-12-07 13:50:48,602 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:50:48,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64218 states. [2019-12-07 13:50:49,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64218 to 57026. [2019-12-07 13:50:49,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57026 states. [2019-12-07 13:50:49,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57026 states to 57026 states and 237588 transitions. [2019-12-07 13:50:49,936 INFO L78 Accepts]: Start accepts. Automaton has 57026 states and 237588 transitions. Word has length 15 [2019-12-07 13:50:49,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:49,936 INFO L462 AbstractCegarLoop]: Abstraction has 57026 states and 237588 transitions. [2019-12-07 13:50:49,936 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:50:49,936 INFO L276 IsEmpty]: Start isEmpty. Operand 57026 states and 237588 transitions. [2019-12-07 13:50:49,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 13:50:49,947 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:49,947 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:49,947 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:49,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:49,947 INFO L82 PathProgramCache]: Analyzing trace with hash -210168677, now seen corresponding path program 1 times [2019-12-07 13:50:49,947 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:49,947 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62482355] [2019-12-07 13:50:49,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:49,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:49,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:49,982 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [62482355] [2019-12-07 13:50:49,982 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:49,982 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:50:49,982 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1564950592] [2019-12-07 13:50:49,982 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:50:49,983 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:49,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:50:49,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:49,983 INFO L87 Difference]: Start difference. First operand 57026 states and 237588 transitions. Second operand 3 states. [2019-12-07 13:50:50,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:50,133 INFO L93 Difference]: Finished difference Result 44521 states and 171347 transitions. [2019-12-07 13:50:50,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:50:50,134 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 13:50:50,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:50,211 INFO L225 Difference]: With dead ends: 44521 [2019-12-07 13:50:50,212 INFO L226 Difference]: Without dead ends: 44521 [2019-12-07 13:50:50,212 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:50,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44521 states. [2019-12-07 13:50:51,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44521 to 44521. [2019-12-07 13:50:51,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44521 states. [2019-12-07 13:50:51,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44521 states to 44521 states and 171347 transitions. [2019-12-07 13:50:51,088 INFO L78 Accepts]: Start accepts. Automaton has 44521 states and 171347 transitions. Word has length 21 [2019-12-07 13:50:51,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:51,088 INFO L462 AbstractCegarLoop]: Abstraction has 44521 states and 171347 transitions. [2019-12-07 13:50:51,088 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:50:51,088 INFO L276 IsEmpty]: Start isEmpty. Operand 44521 states and 171347 transitions. [2019-12-07 13:50:51,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:50:51,095 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:51,095 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:51,095 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:51,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:51,095 INFO L82 PathProgramCache]: Analyzing trace with hash -1714249668, now seen corresponding path program 1 times [2019-12-07 13:50:51,095 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:51,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579743025] [2019-12-07 13:50:51,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:51,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:51,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:51,141 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [579743025] [2019-12-07 13:50:51,141 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:51,141 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:50:51,142 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1102477436] [2019-12-07 13:50:51,142 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:50:51,142 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:51,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:50:51,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:50:51,143 INFO L87 Difference]: Start difference. First operand 44521 states and 171347 transitions. Second operand 5 states. [2019-12-07 13:50:51,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:51,591 INFO L93 Difference]: Finished difference Result 59343 states and 224314 transitions. [2019-12-07 13:50:51,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:50:51,591 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 13:50:51,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:51,700 INFO L225 Difference]: With dead ends: 59343 [2019-12-07 13:50:51,700 INFO L226 Difference]: Without dead ends: 59322 [2019-12-07 13:50:51,700 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:50:52,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59322 states. [2019-12-07 13:50:52,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59322 to 44947. [2019-12-07 13:50:52,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44947 states. [2019-12-07 13:50:52,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44947 states to 44947 states and 172600 transitions. [2019-12-07 13:50:52,664 INFO L78 Accepts]: Start accepts. Automaton has 44947 states and 172600 transitions. Word has length 22 [2019-12-07 13:50:52,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:52,664 INFO L462 AbstractCegarLoop]: Abstraction has 44947 states and 172600 transitions. [2019-12-07 13:50:52,664 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:50:52,664 INFO L276 IsEmpty]: Start isEmpty. Operand 44947 states and 172600 transitions. [2019-12-07 13:50:52,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 13:50:52,689 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:52,689 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:52,689 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:52,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:52,689 INFO L82 PathProgramCache]: Analyzing trace with hash -28022635, now seen corresponding path program 1 times [2019-12-07 13:50:52,689 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:52,689 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1592781599] [2019-12-07 13:50:52,689 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:52,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:52,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:52,736 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1592781599] [2019-12-07 13:50:52,736 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:52,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:50:52,737 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [363341663] [2019-12-07 13:50:52,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:50:52,737 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:52,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:50:52,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:50:52,737 INFO L87 Difference]: Start difference. First operand 44947 states and 172600 transitions. Second operand 4 states. [2019-12-07 13:50:52,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:52,800 INFO L93 Difference]: Finished difference Result 18682 states and 59454 transitions. [2019-12-07 13:50:52,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:50:52,800 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 13:50:52,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:52,821 INFO L225 Difference]: With dead ends: 18682 [2019-12-07 13:50:52,821 INFO L226 Difference]: Without dead ends: 18682 [2019-12-07 13:50:52,821 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:50:52,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18682 states. [2019-12-07 13:50:53,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18682 to 18682. [2019-12-07 13:50:53,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18682 states. [2019-12-07 13:50:53,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18682 states to 18682 states and 59454 transitions. [2019-12-07 13:50:53,075 INFO L78 Accepts]: Start accepts. Automaton has 18682 states and 59454 transitions. Word has length 30 [2019-12-07 13:50:53,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:53,076 INFO L462 AbstractCegarLoop]: Abstraction has 18682 states and 59454 transitions. [2019-12-07 13:50:53,076 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:50:53,076 INFO L276 IsEmpty]: Start isEmpty. Operand 18682 states and 59454 transitions. [2019-12-07 13:50:53,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 13:50:53,084 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:53,084 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:53,084 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:53,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:53,085 INFO L82 PathProgramCache]: Analyzing trace with hash -882612910, now seen corresponding path program 1 times [2019-12-07 13:50:53,085 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:53,085 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1972019559] [2019-12-07 13:50:53,085 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:53,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:53,123 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:53,123 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1972019559] [2019-12-07 13:50:53,123 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:53,123 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:50:53,124 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1329191813] [2019-12-07 13:50:53,124 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:50:53,124 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:53,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:50:53,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:50:53,125 INFO L87 Difference]: Start difference. First operand 18682 states and 59454 transitions. Second operand 5 states. [2019-12-07 13:50:53,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:53,152 INFO L93 Difference]: Finished difference Result 3095 states and 7883 transitions. [2019-12-07 13:50:53,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:50:53,152 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 13:50:53,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:53,155 INFO L225 Difference]: With dead ends: 3095 [2019-12-07 13:50:53,155 INFO L226 Difference]: Without dead ends: 3095 [2019-12-07 13:50:53,155 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:50:53,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3095 states. [2019-12-07 13:50:53,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3095 to 3095. [2019-12-07 13:50:53,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3095 states. [2019-12-07 13:50:53,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3095 states to 3095 states and 7883 transitions. [2019-12-07 13:50:53,184 INFO L78 Accepts]: Start accepts. Automaton has 3095 states and 7883 transitions. Word has length 31 [2019-12-07 13:50:53,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:53,184 INFO L462 AbstractCegarLoop]: Abstraction has 3095 states and 7883 transitions. [2019-12-07 13:50:53,184 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:50:53,185 INFO L276 IsEmpty]: Start isEmpty. Operand 3095 states and 7883 transitions. [2019-12-07 13:50:53,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 13:50:53,188 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:53,188 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:53,188 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:53,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:53,188 INFO L82 PathProgramCache]: Analyzing trace with hash 368185348, now seen corresponding path program 1 times [2019-12-07 13:50:53,188 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:53,188 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347171249] [2019-12-07 13:50:53,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:53,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:53,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:53,232 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347171249] [2019-12-07 13:50:53,233 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:53,233 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:50:53,233 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067527865] [2019-12-07 13:50:53,233 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:50:53,233 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:53,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:50:53,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:50:53,234 INFO L87 Difference]: Start difference. First operand 3095 states and 7883 transitions. Second operand 6 states. [2019-12-07 13:50:53,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:53,262 INFO L93 Difference]: Finished difference Result 1376 states and 3911 transitions. [2019-12-07 13:50:53,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:50:53,262 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 13:50:53,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:53,264 INFO L225 Difference]: With dead ends: 1376 [2019-12-07 13:50:53,264 INFO L226 Difference]: Without dead ends: 1376 [2019-12-07 13:50:53,264 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:50:53,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1376 states. [2019-12-07 13:50:53,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1376 to 1236. [2019-12-07 13:50:53,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1236 states. [2019-12-07 13:50:53,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1236 states to 1236 states and 3511 transitions. [2019-12-07 13:50:53,277 INFO L78 Accepts]: Start accepts. Automaton has 1236 states and 3511 transitions. Word has length 43 [2019-12-07 13:50:53,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:53,277 INFO L462 AbstractCegarLoop]: Abstraction has 1236 states and 3511 transitions. [2019-12-07 13:50:53,277 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:50:53,277 INFO L276 IsEmpty]: Start isEmpty. Operand 1236 states and 3511 transitions. [2019-12-07 13:50:53,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:50:53,279 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:53,279 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:53,279 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:53,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:53,280 INFO L82 PathProgramCache]: Analyzing trace with hash 2028178460, now seen corresponding path program 1 times [2019-12-07 13:50:53,280 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:53,280 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809684654] [2019-12-07 13:50:53,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:53,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:53,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:53,317 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809684654] [2019-12-07 13:50:53,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:53,318 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:50:53,318 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [291923039] [2019-12-07 13:50:53,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:50:53,318 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:53,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:50:53,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:53,318 INFO L87 Difference]: Start difference. First operand 1236 states and 3511 transitions. Second operand 3 states. [2019-12-07 13:50:53,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:53,353 INFO L93 Difference]: Finished difference Result 1249 states and 3529 transitions. [2019-12-07 13:50:53,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:50:53,353 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 13:50:53,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:53,355 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 13:50:53,355 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 13:50:53,355 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:53,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 13:50:53,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1243. [2019-12-07 13:50:53,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2019-12-07 13:50:53,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 3522 transitions. [2019-12-07 13:50:53,367 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 3522 transitions. Word has length 58 [2019-12-07 13:50:53,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:53,367 INFO L462 AbstractCegarLoop]: Abstraction has 1243 states and 3522 transitions. [2019-12-07 13:50:53,367 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:50:53,368 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 3522 transitions. [2019-12-07 13:50:53,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:50:53,369 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:53,369 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:53,369 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:53,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:53,370 INFO L82 PathProgramCache]: Analyzing trace with hash 1114375606, now seen corresponding path program 1 times [2019-12-07 13:50:53,370 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:53,370 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31884900] [2019-12-07 13:50:53,370 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:53,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:53,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:53,404 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [31884900] [2019-12-07 13:50:53,405 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:53,405 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:50:53,405 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1694674694] [2019-12-07 13:50:53,405 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:50:53,405 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:53,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:50:53,405 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:53,405 INFO L87 Difference]: Start difference. First operand 1243 states and 3522 transitions. Second operand 3 states. [2019-12-07 13:50:53,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:53,439 INFO L93 Difference]: Finished difference Result 1249 states and 3519 transitions. [2019-12-07 13:50:53,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:50:53,440 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 13:50:53,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:53,442 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 13:50:53,442 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 13:50:53,442 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:53,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 13:50:53,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1240. [2019-12-07 13:50:53,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1240 states. [2019-12-07 13:50:53,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1240 states to 1240 states and 3510 transitions. [2019-12-07 13:50:53,459 INFO L78 Accepts]: Start accepts. Automaton has 1240 states and 3510 transitions. Word has length 58 [2019-12-07 13:50:53,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:53,459 INFO L462 AbstractCegarLoop]: Abstraction has 1240 states and 3510 transitions. [2019-12-07 13:50:53,459 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:50:53,459 INFO L276 IsEmpty]: Start isEmpty. Operand 1240 states and 3510 transitions. [2019-12-07 13:50:53,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:50:53,461 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:53,461 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:53,461 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:53,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:53,462 INFO L82 PathProgramCache]: Analyzing trace with hash 1114895507, now seen corresponding path program 1 times [2019-12-07 13:50:53,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:53,462 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995374782] [2019-12-07 13:50:53,462 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:53,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:53,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:53,523 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995374782] [2019-12-07 13:50:53,524 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:53,524 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:50:53,524 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [582333991] [2019-12-07 13:50:53,524 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:50:53,524 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:53,525 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:50:53,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:50:53,525 INFO L87 Difference]: Start difference. First operand 1240 states and 3510 transitions. Second operand 5 states. [2019-12-07 13:50:53,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:53,658 INFO L93 Difference]: Finished difference Result 1781 states and 5032 transitions. [2019-12-07 13:50:53,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:50:53,659 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-12-07 13:50:53,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:53,661 INFO L225 Difference]: With dead ends: 1781 [2019-12-07 13:50:53,661 INFO L226 Difference]: Without dead ends: 1781 [2019-12-07 13:50:53,661 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:50:53,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1781 states. [2019-12-07 13:50:53,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1781 to 1605. [2019-12-07 13:50:53,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1605 states. [2019-12-07 13:50:53,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1605 states to 1605 states and 4540 transitions. [2019-12-07 13:50:53,677 INFO L78 Accepts]: Start accepts. Automaton has 1605 states and 4540 transitions. Word has length 58 [2019-12-07 13:50:53,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:53,677 INFO L462 AbstractCegarLoop]: Abstraction has 1605 states and 4540 transitions. [2019-12-07 13:50:53,678 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:50:53,678 INFO L276 IsEmpty]: Start isEmpty. Operand 1605 states and 4540 transitions. [2019-12-07 13:50:53,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:50:53,680 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:53,680 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:53,680 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:53,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:53,680 INFO L82 PathProgramCache]: Analyzing trace with hash -217131029, now seen corresponding path program 2 times [2019-12-07 13:50:53,680 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:53,680 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164909999] [2019-12-07 13:50:53,680 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:53,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:53,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:53,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164909999] [2019-12-07 13:50:53,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:53,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:50:53,744 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1534982638] [2019-12-07 13:50:53,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:50:53,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:53,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:50:53,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:50:53,745 INFO L87 Difference]: Start difference. First operand 1605 states and 4540 transitions. Second operand 6 states. [2019-12-07 13:50:53,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:53,997 INFO L93 Difference]: Finished difference Result 2387 states and 6749 transitions. [2019-12-07 13:50:53,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:50:53,997 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 13:50:53,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:54,000 INFO L225 Difference]: With dead ends: 2387 [2019-12-07 13:50:54,000 INFO L226 Difference]: Without dead ends: 2387 [2019-12-07 13:50:54,000 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:50:54,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2387 states. [2019-12-07 13:50:54,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2387 to 1749. [2019-12-07 13:50:54,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1749 states. [2019-12-07 13:50:54,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1749 states to 1749 states and 4968 transitions. [2019-12-07 13:50:54,027 INFO L78 Accepts]: Start accepts. Automaton has 1749 states and 4968 transitions. Word has length 58 [2019-12-07 13:50:54,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:54,028 INFO L462 AbstractCegarLoop]: Abstraction has 1749 states and 4968 transitions. [2019-12-07 13:50:54,028 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:50:54,028 INFO L276 IsEmpty]: Start isEmpty. Operand 1749 states and 4968 transitions. [2019-12-07 13:50:54,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:50:54,030 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:54,030 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:54,031 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:54,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:54,031 INFO L82 PathProgramCache]: Analyzing trace with hash 1417485459, now seen corresponding path program 3 times [2019-12-07 13:50:54,031 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:54,031 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1812173381] [2019-12-07 13:50:54,031 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:54,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:54,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:54,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1812173381] [2019-12-07 13:50:54,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:54,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:50:54,100 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [79798825] [2019-12-07 13:50:54,101 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:50:54,101 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:54,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:50:54,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:50:54,101 INFO L87 Difference]: Start difference. First operand 1749 states and 4968 transitions. Second operand 6 states. [2019-12-07 13:50:54,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:54,295 INFO L93 Difference]: Finished difference Result 2563 states and 7224 transitions. [2019-12-07 13:50:54,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 13:50:54,295 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 13:50:54,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:54,298 INFO L225 Difference]: With dead ends: 2563 [2019-12-07 13:50:54,298 INFO L226 Difference]: Without dead ends: 2563 [2019-12-07 13:50:54,298 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:50:54,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2563 states. [2019-12-07 13:50:54,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2563 to 1909. [2019-12-07 13:50:54,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1909 states. [2019-12-07 13:50:54,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1909 states to 1909 states and 5424 transitions. [2019-12-07 13:50:54,321 INFO L78 Accepts]: Start accepts. Automaton has 1909 states and 5424 transitions. Word has length 58 [2019-12-07 13:50:54,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:54,321 INFO L462 AbstractCegarLoop]: Abstraction has 1909 states and 5424 transitions. [2019-12-07 13:50:54,321 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:50:54,321 INFO L276 IsEmpty]: Start isEmpty. Operand 1909 states and 5424 transitions. [2019-12-07 13:50:54,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:50:54,323 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:54,323 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:54,324 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:54,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:54,324 INFO L82 PathProgramCache]: Analyzing trace with hash -687244225, now seen corresponding path program 4 times [2019-12-07 13:50:54,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:54,324 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164311785] [2019-12-07 13:50:54,324 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:54,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:54,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:54,383 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164311785] [2019-12-07 13:50:54,383 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:54,383 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:50:54,383 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1910383354] [2019-12-07 13:50:54,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:50:54,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:54,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:50:54,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:50:54,384 INFO L87 Difference]: Start difference. First operand 1909 states and 5424 transitions. Second operand 7 states. [2019-12-07 13:50:54,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:54,655 INFO L93 Difference]: Finished difference Result 2844 states and 8023 transitions. [2019-12-07 13:50:54,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 13:50:54,655 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 58 [2019-12-07 13:50:54,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:54,658 INFO L225 Difference]: With dead ends: 2844 [2019-12-07 13:50:54,658 INFO L226 Difference]: Without dead ends: 2844 [2019-12-07 13:50:54,658 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:50:54,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2844 states. [2019-12-07 13:50:54,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2844 to 1853. [2019-12-07 13:50:54,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1853 states. [2019-12-07 13:50:54,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1853 states to 1853 states and 5264 transitions. [2019-12-07 13:50:54,680 INFO L78 Accepts]: Start accepts. Automaton has 1853 states and 5264 transitions. Word has length 58 [2019-12-07 13:50:54,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:54,680 INFO L462 AbstractCegarLoop]: Abstraction has 1853 states and 5264 transitions. [2019-12-07 13:50:54,680 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:50:54,680 INFO L276 IsEmpty]: Start isEmpty. Operand 1853 states and 5264 transitions. [2019-12-07 13:50:54,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:50:54,682 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:54,682 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:54,682 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:54,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:54,683 INFO L82 PathProgramCache]: Analyzing trace with hash 658273713, now seen corresponding path program 1 times [2019-12-07 13:50:54,683 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:54,683 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2090990837] [2019-12-07 13:50:54,683 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:54,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:54,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:54,776 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2090990837] [2019-12-07 13:50:54,776 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:54,776 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:50:54,776 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807115229] [2019-12-07 13:50:54,777 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:50:54,777 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:54,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:50:54,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:50:54,777 INFO L87 Difference]: Start difference. First operand 1853 states and 5264 transitions. Second operand 7 states. [2019-12-07 13:50:54,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:54,862 INFO L93 Difference]: Finished difference Result 3707 states and 9810 transitions. [2019-12-07 13:50:54,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 13:50:54,863 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 59 [2019-12-07 13:50:54,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:54,865 INFO L225 Difference]: With dead ends: 3707 [2019-12-07 13:50:54,865 INFO L226 Difference]: Without dead ends: 2638 [2019-12-07 13:50:54,865 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:50:54,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2638 states. [2019-12-07 13:50:54,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2638 to 1721. [2019-12-07 13:50:54,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1721 states. [2019-12-07 13:50:54,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1721 states to 1721 states and 4817 transitions. [2019-12-07 13:50:54,885 INFO L78 Accepts]: Start accepts. Automaton has 1721 states and 4817 transitions. Word has length 59 [2019-12-07 13:50:54,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:54,885 INFO L462 AbstractCegarLoop]: Abstraction has 1721 states and 4817 transitions. [2019-12-07 13:50:54,885 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:50:54,885 INFO L276 IsEmpty]: Start isEmpty. Operand 1721 states and 4817 transitions. [2019-12-07 13:50:54,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:50:54,887 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:54,887 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:54,887 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:54,887 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:54,887 INFO L82 PathProgramCache]: Analyzing trace with hash 726022051, now seen corresponding path program 2 times [2019-12-07 13:50:54,887 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:54,887 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524875336] [2019-12-07 13:50:54,887 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:54,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:54,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:54,936 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524875336] [2019-12-07 13:50:54,936 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:54,936 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:50:54,936 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1146359912] [2019-12-07 13:50:54,936 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:50:54,937 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:54,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:50:54,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:54,937 INFO L87 Difference]: Start difference. First operand 1721 states and 4817 transitions. Second operand 3 states. [2019-12-07 13:50:54,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:54,969 INFO L93 Difference]: Finished difference Result 1720 states and 4815 transitions. [2019-12-07 13:50:54,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:50:54,969 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 13:50:54,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:54,971 INFO L225 Difference]: With dead ends: 1720 [2019-12-07 13:50:54,971 INFO L226 Difference]: Without dead ends: 1720 [2019-12-07 13:50:54,971 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:54,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1720 states. [2019-12-07 13:50:54,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1720 to 1187. [2019-12-07 13:50:54,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1187 states. [2019-12-07 13:50:54,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1187 states to 1187 states and 3309 transitions. [2019-12-07 13:50:54,987 INFO L78 Accepts]: Start accepts. Automaton has 1187 states and 3309 transitions. Word has length 59 [2019-12-07 13:50:54,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:54,987 INFO L462 AbstractCegarLoop]: Abstraction has 1187 states and 3309 transitions. [2019-12-07 13:50:54,987 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:50:54,987 INFO L276 IsEmpty]: Start isEmpty. Operand 1187 states and 3309 transitions. [2019-12-07 13:50:54,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:50:54,989 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:54,989 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:54,989 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:54,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:54,990 INFO L82 PathProgramCache]: Analyzing trace with hash 1147587362, now seen corresponding path program 1 times [2019-12-07 13:50:54,990 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:54,990 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [796129754] [2019-12-07 13:50:54,990 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:55,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:55,033 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:55,034 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [796129754] [2019-12-07 13:50:55,034 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:55,034 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:50:55,034 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [893885145] [2019-12-07 13:50:55,034 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:50:55,034 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:55,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:50:55,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:55,035 INFO L87 Difference]: Start difference. First operand 1187 states and 3309 transitions. Second operand 3 states. [2019-12-07 13:50:55,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:55,046 INFO L93 Difference]: Finished difference Result 1125 states and 3060 transitions. [2019-12-07 13:50:55,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:50:55,046 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 13:50:55,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:55,048 INFO L225 Difference]: With dead ends: 1125 [2019-12-07 13:50:55,048 INFO L226 Difference]: Without dead ends: 1125 [2019-12-07 13:50:55,048 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:55,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1125 states. [2019-12-07 13:50:55,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1125 to 1061. [2019-12-07 13:50:55,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1061 states. [2019-12-07 13:50:55,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1061 states to 1061 states and 2876 transitions. [2019-12-07 13:50:55,064 INFO L78 Accepts]: Start accepts. Automaton has 1061 states and 2876 transitions. Word has length 59 [2019-12-07 13:50:55,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:55,064 INFO L462 AbstractCegarLoop]: Abstraction has 1061 states and 2876 transitions. [2019-12-07 13:50:55,064 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:50:55,064 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 2876 transitions. [2019-12-07 13:50:55,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:50:55,066 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:55,066 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:55,066 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:55,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:55,067 INFO L82 PathProgramCache]: Analyzing trace with hash 709050974, now seen corresponding path program 1 times [2019-12-07 13:50:55,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:55,067 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2096523140] [2019-12-07 13:50:55,067 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:55,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:55,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:55,146 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2096523140] [2019-12-07 13:50:55,147 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:55,147 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:50:55,147 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744313545] [2019-12-07 13:50:55,147 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:50:55,148 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:55,148 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:50:55,148 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:50:55,148 INFO L87 Difference]: Start difference. First operand 1061 states and 2876 transitions. Second operand 6 states. [2019-12-07 13:50:55,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:55,206 INFO L93 Difference]: Finished difference Result 1462 states and 3707 transitions. [2019-12-07 13:50:55,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:50:55,206 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 13:50:55,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:55,207 INFO L225 Difference]: With dead ends: 1462 [2019-12-07 13:50:55,207 INFO L226 Difference]: Without dead ends: 854 [2019-12-07 13:50:55,207 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:50:55,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 854 states. [2019-12-07 13:50:55,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 854 to 782. [2019-12-07 13:50:55,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 782 states. [2019-12-07 13:50:55,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 782 states to 782 states and 1855 transitions. [2019-12-07 13:50:55,215 INFO L78 Accepts]: Start accepts. Automaton has 782 states and 1855 transitions. Word has length 60 [2019-12-07 13:50:55,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:55,215 INFO L462 AbstractCegarLoop]: Abstraction has 782 states and 1855 transitions. [2019-12-07 13:50:55,216 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:50:55,216 INFO L276 IsEmpty]: Start isEmpty. Operand 782 states and 1855 transitions. [2019-12-07 13:50:55,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:50:55,217 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:55,217 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:55,217 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:55,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:55,217 INFO L82 PathProgramCache]: Analyzing trace with hash -1492443498, now seen corresponding path program 2 times [2019-12-07 13:50:55,217 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:55,217 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [51066821] [2019-12-07 13:50:55,217 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:55,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:55,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:55,421 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [51066821] [2019-12-07 13:50:55,421 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:55,421 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:50:55,421 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1933597582] [2019-12-07 13:50:55,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:50:55,422 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:55,422 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:50:55,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:50:55,422 INFO L87 Difference]: Start difference. First operand 782 states and 1855 transitions. Second operand 13 states. [2019-12-07 13:50:56,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:56,195 INFO L93 Difference]: Finished difference Result 2100 states and 4912 transitions. [2019-12-07 13:50:56,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 13:50:56,196 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 13:50:56,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:56,196 INFO L225 Difference]: With dead ends: 2100 [2019-12-07 13:50:56,196 INFO L226 Difference]: Without dead ends: 269 [2019-12-07 13:50:56,197 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=277, Invalid=845, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 13:50:56,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2019-12-07 13:50:56,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 237. [2019-12-07 13:50:56,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2019-12-07 13:50:56,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 414 transitions. [2019-12-07 13:50:56,199 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 414 transitions. Word has length 60 [2019-12-07 13:50:56,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:56,199 INFO L462 AbstractCegarLoop]: Abstraction has 237 states and 414 transitions. [2019-12-07 13:50:56,199 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:50:56,199 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 414 transitions. [2019-12-07 13:50:56,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:50:56,200 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:56,200 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:56,200 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:56,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:56,200 INFO L82 PathProgramCache]: Analyzing trace with hash -1893006908, now seen corresponding path program 3 times [2019-12-07 13:50:56,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:56,200 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963800975] [2019-12-07 13:50:56,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:56,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:56,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:56,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [963800975] [2019-12-07 13:50:56,373 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:56,373 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:50:56,374 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [165649752] [2019-12-07 13:50:56,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 13:50:56,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:56,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 13:50:56,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2019-12-07 13:50:56,374 INFO L87 Difference]: Start difference. First operand 237 states and 414 transitions. Second operand 14 states. [2019-12-07 13:50:56,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:56,670 INFO L93 Difference]: Finished difference Result 403 states and 684 transitions. [2019-12-07 13:50:56,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 13:50:56,670 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 60 [2019-12-07 13:50:56,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:56,671 INFO L225 Difference]: With dead ends: 403 [2019-12-07 13:50:56,671 INFO L226 Difference]: Without dead ends: 371 [2019-12-07 13:50:56,671 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=91, Invalid=461, Unknown=0, NotChecked=0, Total=552 [2019-12-07 13:50:56,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-12-07 13:50:56,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 337. [2019-12-07 13:50:56,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 337 states. [2019-12-07 13:50:56,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 585 transitions. [2019-12-07 13:50:56,674 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 585 transitions. Word has length 60 [2019-12-07 13:50:56,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:56,674 INFO L462 AbstractCegarLoop]: Abstraction has 337 states and 585 transitions. [2019-12-07 13:50:56,674 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 13:50:56,674 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 585 transitions. [2019-12-07 13:50:56,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:50:56,674 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:56,675 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:56,675 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:56,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:56,675 INFO L82 PathProgramCache]: Analyzing trace with hash -1191078724, now seen corresponding path program 4 times [2019-12-07 13:50:56,675 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:56,675 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808518997] [2019-12-07 13:50:56,675 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:56,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:56,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:56,835 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1808518997] [2019-12-07 13:50:56,835 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:56,835 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 13:50:56,835 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [30578858] [2019-12-07 13:50:56,835 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:50:56,835 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:56,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:50:56,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:50:56,836 INFO L87 Difference]: Start difference. First operand 337 states and 585 transitions. Second operand 13 states. [2019-12-07 13:50:57,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:57,107 INFO L93 Difference]: Finished difference Result 447 states and 750 transitions. [2019-12-07 13:50:57,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 13:50:57,107 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 13:50:57,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:57,108 INFO L225 Difference]: With dead ends: 447 [2019-12-07 13:50:57,108 INFO L226 Difference]: Without dead ends: 415 [2019-12-07 13:50:57,108 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=372, Unknown=0, NotChecked=0, Total=462 [2019-12-07 13:50:57,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 415 states. [2019-12-07 13:50:57,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 415 to 345. [2019-12-07 13:50:57,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2019-12-07 13:50:57,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 599 transitions. [2019-12-07 13:50:57,111 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 599 transitions. Word has length 60 [2019-12-07 13:50:57,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:57,111 INFO L462 AbstractCegarLoop]: Abstraction has 345 states and 599 transitions. [2019-12-07 13:50:57,111 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:50:57,111 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 599 transitions. [2019-12-07 13:50:57,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:50:57,112 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:57,112 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:57,112 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:57,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:57,112 INFO L82 PathProgramCache]: Analyzing trace with hash -1108974140, now seen corresponding path program 5 times [2019-12-07 13:50:57,112 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:57,113 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383563292] [2019-12-07 13:50:57,113 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:57,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:50:57,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:50:57,184 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 13:50:57,185 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:50:57,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_#NULL.offset_7| 0) (= v_~z$r_buff1_thd1~0_233 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1189~0.base_19| 4) |v_#length_29|) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= v_~b~0_102 0) (= v_~y~0_38 0) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (= 0 v_~weak$$choice0~0_17) (= v_~z$w_buff1~0_400 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1189~0.base_19|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1189~0.base_19|) 0) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~__unbuffered_p3_EAX~0_243 0) (= v_~z$r_buff0_thd0~0_435 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (= 0 |v_#NULL.base_7|) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1189~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1189~0.base_19|) |v_ULTIMATE.start_main_~#t1189~0.offset_16| 0)) |v_#memory_int_25|) (= |v_ULTIMATE.start_main_~#t1189~0.offset_16| 0) (= v_~z$r_buff0_thd1~0_87 0) (= v_~x~0_42 0) (= v_~z$w_buff1_used~0_620 0) (= v_~main$tmp_guard1~0_25 0) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1189~0.base_19| 1) |v_#valid_70|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_~#t1191~0.base=|v_ULTIMATE.start_main_~#t1191~0.base_21|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ~a~0=v_~a~0_234, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ULTIMATE.start_main_~#t1192~0.offset=|v_ULTIMATE.start_main_~#t1192~0.offset_17|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ULTIMATE.start_main_~#t1192~0.base=|v_ULTIMATE.start_main_~#t1192~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~x~0=v_~x~0_42, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_~#t1189~0.offset=|v_ULTIMATE.start_main_~#t1189~0.offset_16|, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_38, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ULTIMATE.start_main_~#t1191~0.offset=|v_ULTIMATE.start_main_~#t1191~0.offset_16|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_~#t1189~0.base=|v_ULTIMATE.start_main_~#t1189~0.base_19|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_~#t1190~0.base=|v_ULTIMATE.start_main_~#t1190~0.base_22|, ~b~0=v_~b~0_102, ULTIMATE.start_main_~#t1190~0.offset=|v_ULTIMATE.start_main_~#t1190~0.offset_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_~#t1191~0.base, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1192~0.offset, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_~#t1192~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1189~0.offset, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1191~0.offset, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t1189~0.base, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1190~0.base, ~b~0, ULTIMATE.start_main_~#t1190~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:50:57,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (= (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1190~0.base_13| 1) |v_#valid_48|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1190~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1190~0.base_13|) |v_ULTIMATE.start_main_~#t1190~0.offset_11| 1)) |v_#memory_int_19|) (= 0 |v_ULTIMATE.start_main_~#t1190~0.offset_11|) (not (= 0 |v_ULTIMATE.start_main_~#t1190~0.base_13|)) (= (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1190~0.base_13|) 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1190~0.base_13| 4) |v_#length_23|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1190~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t1190~0.base=|v_ULTIMATE.start_main_~#t1190~0.base_13|, ULTIMATE.start_main_~#t1190~0.offset=|v_ULTIMATE.start_main_~#t1190~0.offset_11|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1190~0.base, ULTIMATE.start_main_~#t1190~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 13:50:57,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1191~0.offset_10|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1191~0.base_12|)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1191~0.base_12|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1191~0.base_12| 4)) (not (= |v_ULTIMATE.start_main_~#t1191~0.base_12| 0)) (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1191~0.base_12| 1) |v_#valid_46|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1191~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1191~0.base_12|) |v_ULTIMATE.start_main_~#t1191~0.offset_10| 2)) |v_#memory_int_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1191~0.offset=|v_ULTIMATE.start_main_~#t1191~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ULTIMATE.start_main_~#t1191~0.base=|v_ULTIMATE.start_main_~#t1191~0.base_12|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1191~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_~#t1191~0.base, #length] because there is no mapped edge [2019-12-07 13:50:57,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1192~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t1192~0.offset_10|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1192~0.base_12|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1192~0.base_12| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1192~0.base_12|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1192~0.base_12| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1192~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1192~0.base_12|) |v_ULTIMATE.start_main_~#t1192~0.offset_10| 3)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1192~0.base=|v_ULTIMATE.start_main_~#t1192~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1192~0.offset=|v_ULTIMATE.start_main_~#t1192~0.offset_10|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1192~0.base, ULTIMATE.start_main_~#t1192~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-12-07 13:50:57,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 13:50:57,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|) (= v_~x~0_27 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_27, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 13:50:57,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= v_~y~0_28 v_~__unbuffered_p1_EAX~0_19) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x~0_32 2) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89, ~y~0=v_~y~0_28} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_19, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_28, ~x~0=v_~x~0_32, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:50:57,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In1179881601 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1179881601 256)))) (or (and (= 0 |P3Thread1of1ForFork3_#t~ite11_Out1179881601|) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In1179881601 |P3Thread1of1ForFork3_#t~ite11_Out1179881601|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1179881601, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1179881601} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1179881601, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1179881601, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out1179881601|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 13:50:57,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In589904065 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In589904065 256)))) (or (and (= ~z$w_buff1~0_In589904065 |P2Thread1of1ForFork2_#t~ite3_Out589904065|) (not .cse0) (not .cse1)) (and (= ~z~0_In589904065 |P2Thread1of1ForFork2_#t~ite3_Out589904065|) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In589904065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In589904065, ~z$w_buff1~0=~z$w_buff1~0_In589904065, ~z~0=~z~0_In589904065} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out589904065|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In589904065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In589904065, ~z$w_buff1~0=~z$w_buff1~0_In589904065, ~z~0=~z~0_In589904065} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 13:50:57,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In582267171 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In582267171 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd4~0_In582267171 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In582267171 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork3_#t~ite12_Out582267171|)) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In582267171 |P3Thread1of1ForFork3_#t~ite12_Out582267171|) (or .cse2 .cse3)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In582267171, ~z$w_buff0_used~0=~z$w_buff0_used~0_In582267171, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In582267171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In582267171} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In582267171, ~z$w_buff0_used~0=~z$w_buff0_used~0_In582267171, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In582267171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In582267171, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out582267171|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 13:50:57,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1749382372 256))) (.cse1 (= ~z$r_buff0_thd4~0_Out1749382372 ~z$r_buff0_thd4~0_In1749382372)) (.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In1749382372 256)))) (or (and .cse0 .cse1) (and (not .cse2) (= ~z$r_buff0_thd4~0_Out1749382372 0) (not .cse0)) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1749382372, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1749382372} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1749382372, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out1749382372, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out1749382372|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 13:50:57,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd4~0_In388181351 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In388181351 256))) (.cse1 (= (mod ~z$r_buff1_thd4~0_In388181351 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In388181351 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork3_#t~ite14_Out388181351| ~z$r_buff1_thd4~0_In388181351)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P3Thread1of1ForFork3_#t~ite14_Out388181351|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In388181351, ~z$w_buff0_used~0=~z$w_buff0_used~0_In388181351, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In388181351, ~z$w_buff1_used~0=~z$w_buff1_used~0_In388181351} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In388181351, ~z$w_buff0_used~0=~z$w_buff0_used~0_In388181351, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out388181351|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In388181351, ~z$w_buff1_used~0=~z$w_buff1_used~0_In388181351} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 13:50:57,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 13:50:57,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 13:50:57,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1412050353 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1412050353 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1412050353 |P2Thread1of1ForFork2_#t~ite5_Out-1412050353|)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite5_Out-1412050353| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412050353, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412050353} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1412050353|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412050353, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412050353} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 13:50:57,193 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1693755387 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1693755387 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1693755387 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-1693755387 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1693755387 |P2Thread1of1ForFork2_#t~ite6_Out-1693755387|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-1693755387|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1693755387, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1693755387, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1693755387, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1693755387} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-1693755387|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1693755387, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1693755387, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1693755387, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1693755387} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 13:50:57,193 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In824674567 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In824674567 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In824674567 |P2Thread1of1ForFork2_#t~ite7_Out824674567|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite7_Out824674567|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In824674567, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In824674567} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In824674567, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In824674567, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out824674567|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 13:50:57,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In187448628 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In187448628 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In187448628 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In187448628 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite8_Out187448628| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In187448628 |P2Thread1of1ForFork2_#t~ite8_Out187448628|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In187448628, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In187448628, ~z$w_buff1_used~0=~z$w_buff1_used~0_In187448628, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In187448628} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In187448628, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In187448628, ~z$w_buff1_used~0=~z$w_buff1_used~0_In187448628, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In187448628, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out187448628|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:50:57,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:50:57,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 13:50:57,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In129169599 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In129169599 256) 0))) (or (and (= ~z~0_In129169599 |ULTIMATE.start_main_#t~ite19_Out129169599|) (or .cse0 .cse1)) (and (= ~z$w_buff1~0_In129169599 |ULTIMATE.start_main_#t~ite19_Out129169599|) (not .cse0) (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In129169599, ~z$w_buff1_used~0=~z$w_buff1_used~0_In129169599, ~z$w_buff1~0=~z$w_buff1~0_In129169599, ~z~0=~z~0_In129169599} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out129169599|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In129169599, ~z$w_buff1_used~0=~z$w_buff1_used~0_In129169599, ~z$w_buff1~0=~z$w_buff1~0_In129169599, ~z~0=~z~0_In129169599} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 13:50:57,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 13:50:57,194 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1328065588 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1328065588 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out1328065588| ~z$w_buff0_used~0_In1328065588) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite21_Out1328065588|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1328065588, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1328065588} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1328065588, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1328065588, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1328065588|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 13:50:57,195 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In933430139 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd0~0_In933430139 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In933430139 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In933430139 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out933430139|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In933430139 |ULTIMATE.start_main_#t~ite22_Out933430139|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In933430139, ~z$w_buff0_used~0=~z$w_buff0_used~0_In933430139, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In933430139, ~z$w_buff1_used~0=~z$w_buff1_used~0_In933430139} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In933430139, ~z$w_buff0_used~0=~z$w_buff0_used~0_In933430139, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In933430139, ~z$w_buff1_used~0=~z$w_buff1_used~0_In933430139, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out933430139|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 13:50:57,195 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1579771423 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1579771423 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite23_Out1579771423| 0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite23_Out1579771423| ~z$r_buff0_thd0~0_In1579771423)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1579771423, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1579771423} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1579771423, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1579771423, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1579771423|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 13:50:57,195 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-602179646 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-602179646 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-602179646 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-602179646 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In-602179646 |ULTIMATE.start_main_#t~ite24_Out-602179646|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite24_Out-602179646|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-602179646, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-602179646, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-602179646, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-602179646} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-602179646, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-602179646, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-602179646, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-602179646|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-602179646} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 13:50:57,198 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1784189910 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite40_Out1784189910| ~z$w_buff1_used~0_In1784189910) (not .cse0) (= |ULTIMATE.start_main_#t~ite39_In1784189910| |ULTIMATE.start_main_#t~ite39_Out1784189910|)) (and .cse0 (= |ULTIMATE.start_main_#t~ite39_Out1784189910| ~z$w_buff1_used~0_In1784189910) (= |ULTIMATE.start_main_#t~ite40_Out1784189910| |ULTIMATE.start_main_#t~ite39_Out1784189910|) (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1784189910 256) 0))) (or (and .cse1 (= (mod ~z$r_buff1_thd0~0_In1784189910 256) 0)) (= (mod ~z$w_buff0_used~0_In1784189910 256) 0) (and .cse1 (= (mod ~z$w_buff1_used~0_In1784189910 256) 0))))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1784189910, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1784189910, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In1784189910|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1784189910, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1784189910, ~weak$$choice2~0=~weak$$choice2~0_In1784189910} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1784189910, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1784189910|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1784189910|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1784189910, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1784189910, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1784189910, ~weak$$choice2~0=~weak$$choice2~0_In1784189910} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 13:50:57,198 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 13:50:57,198 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In715907912 256)))) (or (and (not .cse0) (= ~z$r_buff1_thd0~0_In715907912 |ULTIMATE.start_main_#t~ite46_Out715907912|) (= |ULTIMATE.start_main_#t~ite45_In715907912| |ULTIMATE.start_main_#t~ite45_Out715907912|)) (and (= ~z$r_buff1_thd0~0_In715907912 |ULTIMATE.start_main_#t~ite45_Out715907912|) .cse0 (= |ULTIMATE.start_main_#t~ite46_Out715907912| |ULTIMATE.start_main_#t~ite45_Out715907912|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In715907912 256)))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In715907912 256))) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In715907912 256))) (= 0 (mod ~z$w_buff0_used~0_In715907912 256))))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In715907912, ~z$w_buff0_used~0=~z$w_buff0_used~0_In715907912, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In715907912, ~z$w_buff1_used~0=~z$w_buff1_used~0_In715907912, ~weak$$choice2~0=~weak$$choice2~0_In715907912, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In715907912|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In715907912, ~z$w_buff0_used~0=~z$w_buff0_used~0_In715907912, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In715907912, ~z$w_buff1_used~0=~z$w_buff1_used~0_In715907912, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out715907912|, ~weak$$choice2~0=~weak$$choice2~0_In715907912, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out715907912|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 13:50:57,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:50:57,199 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 13:50:57,256 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:50:57 BasicIcfg [2019-12-07 13:50:57,257 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:50:57,257 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:50:57,257 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:50:57,257 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:50:57,258 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:50:38" (3/4) ... [2019-12-07 13:50:57,259 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:50:57,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_#NULL.offset_7| 0) (= v_~z$r_buff1_thd1~0_233 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t1189~0.base_19| 4) |v_#length_29|) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= v_~b~0_102 0) (= v_~y~0_38 0) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (= 0 v_~weak$$choice0~0_17) (= v_~z$w_buff1~0_400 0) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1189~0.base_19|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1189~0.base_19|) 0) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~__unbuffered_p3_EAX~0_243 0) (= v_~z$r_buff0_thd0~0_435 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (= 0 |v_#NULL.base_7|) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1189~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1189~0.base_19|) |v_ULTIMATE.start_main_~#t1189~0.offset_16| 0)) |v_#memory_int_25|) (= |v_ULTIMATE.start_main_~#t1189~0.offset_16| 0) (= v_~z$r_buff0_thd1~0_87 0) (= v_~x~0_42 0) (= v_~z$w_buff1_used~0_620 0) (= v_~main$tmp_guard1~0_25 0) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1189~0.base_19| 1) |v_#valid_70|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_~#t1191~0.base=|v_ULTIMATE.start_main_~#t1191~0.base_21|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ~a~0=v_~a~0_234, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ULTIMATE.start_main_~#t1192~0.offset=|v_ULTIMATE.start_main_~#t1192~0.offset_17|, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ULTIMATE.start_main_~#t1192~0.base=|v_ULTIMATE.start_main_~#t1192~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~x~0=v_~x~0_42, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_~#t1189~0.offset=|v_ULTIMATE.start_main_~#t1189~0.offset_16|, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_38, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ULTIMATE.start_main_~#t1191~0.offset=|v_ULTIMATE.start_main_~#t1191~0.offset_16|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_~#t1189~0.base=|v_ULTIMATE.start_main_~#t1189~0.base_19|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_~#t1190~0.base=|v_ULTIMATE.start_main_~#t1190~0.base_22|, ~b~0=v_~b~0_102, ULTIMATE.start_main_~#t1190~0.offset=|v_ULTIMATE.start_main_~#t1190~0.offset_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_~#t1191~0.base, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1192~0.offset, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_~#t1192~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1189~0.offset, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1191~0.offset, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t1189~0.base, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1190~0.base, ~b~0, ULTIMATE.start_main_~#t1190~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:50:57,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (= (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1190~0.base_13| 1) |v_#valid_48|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1190~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1190~0.base_13|) |v_ULTIMATE.start_main_~#t1190~0.offset_11| 1)) |v_#memory_int_19|) (= 0 |v_ULTIMATE.start_main_~#t1190~0.offset_11|) (not (= 0 |v_ULTIMATE.start_main_~#t1190~0.base_13|)) (= (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1190~0.base_13|) 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1190~0.base_13| 4) |v_#length_23|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1190~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t1190~0.base=|v_ULTIMATE.start_main_~#t1190~0.base_13|, ULTIMATE.start_main_~#t1190~0.offset=|v_ULTIMATE.start_main_~#t1190~0.offset_11|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1190~0.base, ULTIMATE.start_main_~#t1190~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 13:50:57,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1191~0.offset_10|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1191~0.base_12|)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1191~0.base_12|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1191~0.base_12| 4)) (not (= |v_ULTIMATE.start_main_~#t1191~0.base_12| 0)) (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1191~0.base_12| 1) |v_#valid_46|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1191~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1191~0.base_12|) |v_ULTIMATE.start_main_~#t1191~0.offset_10| 2)) |v_#memory_int_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1191~0.offset=|v_ULTIMATE.start_main_~#t1191~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ULTIMATE.start_main_~#t1191~0.base=|v_ULTIMATE.start_main_~#t1191~0.base_12|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1191~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_~#t1191~0.base, #length] because there is no mapped edge [2019-12-07 13:50:57,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1192~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t1192~0.offset_10|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1192~0.base_12|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1192~0.base_12| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1192~0.base_12|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1192~0.base_12| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1192~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1192~0.base_12|) |v_ULTIMATE.start_main_~#t1192~0.offset_10| 3)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1192~0.base=|v_ULTIMATE.start_main_~#t1192~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1192~0.offset=|v_ULTIMATE.start_main_~#t1192~0.offset_10|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1192~0.base, ULTIMATE.start_main_~#t1192~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-12-07 13:50:57,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 13:50:57,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|) (= v_~x~0_27 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_27, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, ~x~0, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 13:50:57,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= v_~y~0_28 v_~__unbuffered_p1_EAX~0_19) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x~0_32 2) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89, ~y~0=v_~y~0_28} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_19, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_28, ~x~0=v_~x~0_32, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:50:57,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In1179881601 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1179881601 256)))) (or (and (= 0 |P3Thread1of1ForFork3_#t~ite11_Out1179881601|) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In1179881601 |P3Thread1of1ForFork3_#t~ite11_Out1179881601|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1179881601, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1179881601} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1179881601, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1179881601, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out1179881601|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 13:50:57,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In589904065 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In589904065 256)))) (or (and (= ~z$w_buff1~0_In589904065 |P2Thread1of1ForFork2_#t~ite3_Out589904065|) (not .cse0) (not .cse1)) (and (= ~z~0_In589904065 |P2Thread1of1ForFork2_#t~ite3_Out589904065|) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In589904065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In589904065, ~z$w_buff1~0=~z$w_buff1~0_In589904065, ~z~0=~z~0_In589904065} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out589904065|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In589904065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In589904065, ~z$w_buff1~0=~z$w_buff1~0_In589904065, ~z~0=~z~0_In589904065} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 13:50:57,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In582267171 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd4~0_In582267171 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd4~0_In582267171 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In582267171 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork3_#t~ite12_Out582267171|)) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In582267171 |P3Thread1of1ForFork3_#t~ite12_Out582267171|) (or .cse2 .cse3)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In582267171, ~z$w_buff0_used~0=~z$w_buff0_used~0_In582267171, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In582267171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In582267171} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In582267171, ~z$w_buff0_used~0=~z$w_buff0_used~0_In582267171, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In582267171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In582267171, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out582267171|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 13:50:57,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1749382372 256))) (.cse1 (= ~z$r_buff0_thd4~0_Out1749382372 ~z$r_buff0_thd4~0_In1749382372)) (.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In1749382372 256)))) (or (and .cse0 .cse1) (and (not .cse2) (= ~z$r_buff0_thd4~0_Out1749382372 0) (not .cse0)) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1749382372, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1749382372} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1749382372, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out1749382372, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out1749382372|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 13:50:57,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd4~0_In388181351 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In388181351 256))) (.cse1 (= (mod ~z$r_buff1_thd4~0_In388181351 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In388181351 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork3_#t~ite14_Out388181351| ~z$r_buff1_thd4~0_In388181351)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P3Thread1of1ForFork3_#t~ite14_Out388181351|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In388181351, ~z$w_buff0_used~0=~z$w_buff0_used~0_In388181351, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In388181351, ~z$w_buff1_used~0=~z$w_buff1_used~0_In388181351} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In388181351, ~z$w_buff0_used~0=~z$w_buff0_used~0_In388181351, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out388181351|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In388181351, ~z$w_buff1_used~0=~z$w_buff1_used~0_In388181351} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 13:50:57,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 13:50:57,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 13:50:57,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1412050353 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1412050353 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1412050353 |P2Thread1of1ForFork2_#t~ite5_Out-1412050353|)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite5_Out-1412050353| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412050353, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412050353} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1412050353|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412050353, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412050353} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 13:50:57,264 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1693755387 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1693755387 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1693755387 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-1693755387 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1693755387 |P2Thread1of1ForFork2_#t~ite6_Out-1693755387|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-1693755387|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1693755387, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1693755387, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1693755387, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1693755387} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-1693755387|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1693755387, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1693755387, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1693755387, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1693755387} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 13:50:57,264 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In824674567 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In824674567 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In824674567 |P2Thread1of1ForFork2_#t~ite7_Out824674567|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite7_Out824674567|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In824674567, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In824674567} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In824674567, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In824674567, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out824674567|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 13:50:57,264 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In187448628 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In187448628 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In187448628 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In187448628 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite8_Out187448628| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In187448628 |P2Thread1of1ForFork2_#t~ite8_Out187448628|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In187448628, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In187448628, ~z$w_buff1_used~0=~z$w_buff1_used~0_In187448628, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In187448628} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In187448628, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In187448628, ~z$w_buff1_used~0=~z$w_buff1_used~0_In187448628, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In187448628, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out187448628|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:50:57,264 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:50:57,265 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 13:50:57,265 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In129169599 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In129169599 256) 0))) (or (and (= ~z~0_In129169599 |ULTIMATE.start_main_#t~ite19_Out129169599|) (or .cse0 .cse1)) (and (= ~z$w_buff1~0_In129169599 |ULTIMATE.start_main_#t~ite19_Out129169599|) (not .cse0) (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In129169599, ~z$w_buff1_used~0=~z$w_buff1_used~0_In129169599, ~z$w_buff1~0=~z$w_buff1~0_In129169599, ~z~0=~z~0_In129169599} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out129169599|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In129169599, ~z$w_buff1_used~0=~z$w_buff1_used~0_In129169599, ~z$w_buff1~0=~z$w_buff1~0_In129169599, ~z~0=~z~0_In129169599} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 13:50:57,265 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 13:50:57,265 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1328065588 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1328065588 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out1328065588| ~z$w_buff0_used~0_In1328065588) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite21_Out1328065588|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1328065588, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1328065588} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1328065588, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1328065588, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1328065588|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 13:50:57,265 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In933430139 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd0~0_In933430139 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In933430139 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In933430139 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out933430139|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In933430139 |ULTIMATE.start_main_#t~ite22_Out933430139|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In933430139, ~z$w_buff0_used~0=~z$w_buff0_used~0_In933430139, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In933430139, ~z$w_buff1_used~0=~z$w_buff1_used~0_In933430139} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In933430139, ~z$w_buff0_used~0=~z$w_buff0_used~0_In933430139, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In933430139, ~z$w_buff1_used~0=~z$w_buff1_used~0_In933430139, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out933430139|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 13:50:57,266 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1579771423 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1579771423 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite23_Out1579771423| 0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite23_Out1579771423| ~z$r_buff0_thd0~0_In1579771423)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1579771423, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1579771423} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1579771423, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1579771423, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1579771423|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 13:50:57,266 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-602179646 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-602179646 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-602179646 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-602179646 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In-602179646 |ULTIMATE.start_main_#t~ite24_Out-602179646|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite24_Out-602179646|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-602179646, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-602179646, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-602179646, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-602179646} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-602179646, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-602179646, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-602179646, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-602179646|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-602179646} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 13:50:57,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1784189910 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite40_Out1784189910| ~z$w_buff1_used~0_In1784189910) (not .cse0) (= |ULTIMATE.start_main_#t~ite39_In1784189910| |ULTIMATE.start_main_#t~ite39_Out1784189910|)) (and .cse0 (= |ULTIMATE.start_main_#t~ite39_Out1784189910| ~z$w_buff1_used~0_In1784189910) (= |ULTIMATE.start_main_#t~ite40_Out1784189910| |ULTIMATE.start_main_#t~ite39_Out1784189910|) (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1784189910 256) 0))) (or (and .cse1 (= (mod ~z$r_buff1_thd0~0_In1784189910 256) 0)) (= (mod ~z$w_buff0_used~0_In1784189910 256) 0) (and .cse1 (= (mod ~z$w_buff1_used~0_In1784189910 256) 0))))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1784189910, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1784189910, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In1784189910|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1784189910, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1784189910, ~weak$$choice2~0=~weak$$choice2~0_In1784189910} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1784189910, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1784189910|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1784189910|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1784189910, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1784189910, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1784189910, ~weak$$choice2~0=~weak$$choice2~0_In1784189910} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 13:50:57,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 13:50:57,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In715907912 256)))) (or (and (not .cse0) (= ~z$r_buff1_thd0~0_In715907912 |ULTIMATE.start_main_#t~ite46_Out715907912|) (= |ULTIMATE.start_main_#t~ite45_In715907912| |ULTIMATE.start_main_#t~ite45_Out715907912|)) (and (= ~z$r_buff1_thd0~0_In715907912 |ULTIMATE.start_main_#t~ite45_Out715907912|) .cse0 (= |ULTIMATE.start_main_#t~ite46_Out715907912| |ULTIMATE.start_main_#t~ite45_Out715907912|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In715907912 256)))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In715907912 256))) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In715907912 256))) (= 0 (mod ~z$w_buff0_used~0_In715907912 256))))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In715907912, ~z$w_buff0_used~0=~z$w_buff0_used~0_In715907912, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In715907912, ~z$w_buff1_used~0=~z$w_buff1_used~0_In715907912, ~weak$$choice2~0=~weak$$choice2~0_In715907912, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In715907912|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In715907912, ~z$w_buff0_used~0=~z$w_buff0_used~0_In715907912, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In715907912, ~z$w_buff1_used~0=~z$w_buff1_used~0_In715907912, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out715907912|, ~weak$$choice2~0=~weak$$choice2~0_In715907912, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out715907912|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 13:50:57,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:50:57,270 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 13:50:57,335 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_c7b3b57d-2f29-407a-bf90-eaaf932c8e3e/bin/uautomizer/witness.graphml [2019-12-07 13:50:57,335 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:50:57,336 INFO L168 Benchmark]: Toolchain (without parser) took 19491.69 ms. Allocated memory was 1.0 GB in the beginning and 2.5 GB in the end (delta: 1.5 GB). Free memory was 939.3 MB in the beginning and 1.0 GB in the end (delta: -71.1 MB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2019-12-07 13:50:57,337 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:50:57,337 INFO L168 Benchmark]: CACSL2BoogieTranslator took 394.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 88.1 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -116.4 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 13:50:57,337 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.73 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:50:57,338 INFO L168 Benchmark]: Boogie Preprocessor took 26.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:50:57,338 INFO L168 Benchmark]: RCFGBuilder took 434.93 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 993.1 MB in the end (delta: 51.9 MB). Peak memory consumption was 51.9 MB. Max. memory is 11.5 GB. [2019-12-07 13:50:57,338 INFO L168 Benchmark]: TraceAbstraction took 18511.10 ms. Allocated memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: 1.4 GB). Free memory was 993.1 MB in the beginning and 1.0 GB in the end (delta: -50.4 MB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2019-12-07 13:50:57,339 INFO L168 Benchmark]: Witness Printer took 78.32 ms. Allocated memory is still 2.5 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 33.0 MB). Peak memory consumption was 33.0 MB. Max. memory is 11.5 GB. [2019-12-07 13:50:57,341 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 394.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 88.1 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -116.4 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.73 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 434.93 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 993.1 MB in the end (delta: 51.9 MB). Peak memory consumption was 51.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 18511.10 ms. Allocated memory was 1.1 GB in the beginning and 2.5 GB in the end (delta: 1.4 GB). Free memory was 993.1 MB in the beginning and 1.0 GB in the end (delta: -50.4 MB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. * Witness Printer took 78.32 ms. Allocated memory is still 2.5 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 33.0 MB). Peak memory consumption was 33.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 181 ProgramPointsBefore, 92 ProgramPointsAfterwards, 209 TransitionsBefore, 100 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 7 FixpointIterations, 37 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 4988 VarBasedMoverChecksPositive, 283 VarBasedMoverChecksNegative, 145 SemBasedMoverChecksPositive, 210 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 52490 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L833] FCALL, FORK 0 pthread_create(&t1189, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] FCALL, FORK 0 pthread_create(&t1190, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1191, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L839] FCALL, FORK 0 pthread_create(&t1192, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L788] 4 z$w_buff1 = z$w_buff0 [L789] 4 z$w_buff0 = 2 [L790] 4 z$w_buff1_used = z$w_buff0_used [L791] 4 z$w_buff0_used = (_Bool)1 [L810] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 3 y = 1 [L771] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L810] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L774] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L811] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L812] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L775] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L776] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L777] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L845] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L846] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L847] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L848] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L849] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L852] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L853] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L854] 0 z$flush_delayed = weak$$choice2 [L855] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L857] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L857] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L858] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L859] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L859] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L860] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L862] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L863] 0 main$tmp_guard1 = !(x == 2 && z == 2 && __unbuffered_p1_EAX == 0 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 18.3s, OverallIterations: 22, TraceHistogramMax: 1, AutomataDifference: 5.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2507 SDtfs, 2804 SDslu, 6349 SDs, 0 SdLazy, 3463 SolverSat, 212 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 202 GetRequests, 41 SyntacticMatches, 15 SemanticMatches, 146 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 364 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=57026occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.0s AutomataMinimizationTime, 21 MinimizatonAttempts, 30787 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 1011 NumberOfCodeBlocks, 1011 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 930 ConstructedInterpolants, 0 QuantifiedInterpolants, 193352 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 21 InterpolantComputations, 21 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...