./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix045_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix045_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e680a0ac7c00c740dffe8363623b9beaf394c86f ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:11:21,740 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:11:21,741 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:11:21,749 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:11:21,749 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:11:21,749 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:11:21,750 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:11:21,752 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:11:21,753 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:11:21,753 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:11:21,754 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:11:21,755 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:11:21,755 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:11:21,756 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:11:21,756 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:11:21,757 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:11:21,758 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:11:21,759 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:11:21,760 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:11:21,761 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:11:21,762 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:11:21,763 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:11:21,764 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:11:21,764 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:11:21,766 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:11:21,766 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:11:21,766 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:11:21,767 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:11:21,767 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:11:21,768 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:11:21,768 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:11:21,768 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:11:21,769 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:11:21,769 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:11:21,770 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:11:21,770 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:11:21,771 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:11:21,771 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:11:21,771 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:11:21,772 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:11:21,773 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:11:21,773 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:11:21,786 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:11:21,786 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:11:21,787 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:11:21,787 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:11:21,787 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:11:21,788 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:11:21,788 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:11:21,788 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:11:21,788 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:11:21,788 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:11:21,788 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:11:21,789 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:11:21,789 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:11:21,789 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:11:21,789 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:11:21,789 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:11:21,790 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:11:21,790 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:11:21,790 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:11:21,790 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:11:21,790 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:11:21,790 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:11:21,791 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:11:21,791 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:11:21,791 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:11:21,791 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:11:21,791 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:11:21,792 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:11:21,792 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:11:21,792 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e680a0ac7c00c740dffe8363623b9beaf394c86f [2019-12-07 17:11:21,894 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:11:21,902 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:11:21,905 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:11:21,906 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:11:21,906 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:11:21,906 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix045_power.oepc.i [2019-12-07 17:11:21,943 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/data/a9e277135/e498f082bf36470dbc576c6be341178d/FLAGa51ab0da0 [2019-12-07 17:11:22,335 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:11:22,335 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/sv-benchmarks/c/pthread-wmm/mix045_power.oepc.i [2019-12-07 17:11:22,345 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/data/a9e277135/e498f082bf36470dbc576c6be341178d/FLAGa51ab0da0 [2019-12-07 17:11:22,354 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/data/a9e277135/e498f082bf36470dbc576c6be341178d [2019-12-07 17:11:22,356 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:11:22,357 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:11:22,357 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:11:22,357 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:11:22,359 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:11:22,360 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:11:22" (1/1) ... [2019-12-07 17:11:22,362 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22, skipping insertion in model container [2019-12-07 17:11:22,362 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:11:22" (1/1) ... [2019-12-07 17:11:22,366 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:11:22,397 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:11:22,679 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:11:22,689 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:11:22,730 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:11:22,777 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:11:22,777 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22 WrapperNode [2019-12-07 17:11:22,777 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:11:22,778 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:11:22,778 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:11:22,778 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:11:22,783 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22" (1/1) ... [2019-12-07 17:11:22,797 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22" (1/1) ... [2019-12-07 17:11:22,815 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:11:22,815 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:11:22,815 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:11:22,815 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:11:22,821 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22" (1/1) ... [2019-12-07 17:11:22,822 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22" (1/1) ... [2019-12-07 17:11:22,825 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22" (1/1) ... [2019-12-07 17:11:22,825 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22" (1/1) ... [2019-12-07 17:11:22,832 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22" (1/1) ... [2019-12-07 17:11:22,835 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22" (1/1) ... [2019-12-07 17:11:22,837 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22" (1/1) ... [2019-12-07 17:11:22,841 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:11:22,841 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:11:22,841 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:11:22,841 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:11:22,842 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:11:22,883 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:11:22,883 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:11:22,883 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:11:22,883 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:11:22,883 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:11:22,883 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:11:22,884 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:11:22,884 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:11:22,884 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:11:22,884 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:11:22,884 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:11:22,884 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:11:22,884 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:11:22,885 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:11:23,248 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:11:23,248 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:11:23,249 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:11:23 BoogieIcfgContainer [2019-12-07 17:11:23,249 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:11:23,250 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:11:23,250 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:11:23,252 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:11:23,252 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:11:22" (1/3) ... [2019-12-07 17:11:23,252 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@743d3fb5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:11:23, skipping insertion in model container [2019-12-07 17:11:23,253 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:11:22" (2/3) ... [2019-12-07 17:11:23,253 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@743d3fb5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:11:23, skipping insertion in model container [2019-12-07 17:11:23,253 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:11:23" (3/3) ... [2019-12-07 17:11:23,254 INFO L109 eAbstractionObserver]: Analyzing ICFG mix045_power.oepc.i [2019-12-07 17:11:23,260 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:11:23,260 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:11:23,265 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:11:23,266 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:11:23,291 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,291 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,291 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,291 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,291 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,291 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,292 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,292 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,293 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,293 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,293 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,293 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,293 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,293 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,293 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,293 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,295 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,296 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,299 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,299 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,299 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,299 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,300 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,300 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:11:23,321 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:11:23,334 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:11:23,334 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:11:23,334 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:11:23,334 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:11:23,334 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:11:23,334 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:11:23,334 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:11:23,334 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:11:23,345 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 17:11:23,347 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 17:11:23,402 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 17:11:23,402 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:11:23,412 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 709 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:11:23,428 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 17:11:23,461 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 17:11:23,461 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:11:23,467 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 709 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:11:23,482 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 17:11:23,483 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:11:26,323 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 17:11:26,480 WARN L192 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 17:11:26,585 INFO L206 etLargeBlockEncoding]: Checked pairs total: 81673 [2019-12-07 17:11:26,585 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2019-12-07 17:11:26,587 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 104 transitions [2019-12-07 17:11:42,166 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 117422 states. [2019-12-07 17:11:42,168 INFO L276 IsEmpty]: Start isEmpty. Operand 117422 states. [2019-12-07 17:11:42,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 17:11:42,171 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:11:42,172 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 17:11:42,172 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:11:42,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:11:42,176 INFO L82 PathProgramCache]: Analyzing trace with hash 914906, now seen corresponding path program 1 times [2019-12-07 17:11:42,181 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:11:42,181 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1355724526] [2019-12-07 17:11:42,181 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:11:42,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:11:42,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:11:42,308 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1355724526] [2019-12-07 17:11:42,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:11:42,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:11:42,309 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [312072507] [2019-12-07 17:11:42,312 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:11:42,312 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:11:42,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:11:42,322 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:11:42,323 INFO L87 Difference]: Start difference. First operand 117422 states. Second operand 3 states. [2019-12-07 17:11:43,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:11:43,024 INFO L93 Difference]: Finished difference Result 116592 states and 500276 transitions. [2019-12-07 17:11:43,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:11:43,026 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 17:11:43,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:11:43,509 INFO L225 Difference]: With dead ends: 116592 [2019-12-07 17:11:43,510 INFO L226 Difference]: Without dead ends: 109832 [2019-12-07 17:11:43,510 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:11:47,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109832 states. [2019-12-07 17:11:50,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109832 to 109832. [2019-12-07 17:11:50,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109832 states. [2019-12-07 17:11:50,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109832 states to 109832 states and 470688 transitions. [2019-12-07 17:11:50,867 INFO L78 Accepts]: Start accepts. Automaton has 109832 states and 470688 transitions. Word has length 3 [2019-12-07 17:11:50,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:11:50,868 INFO L462 AbstractCegarLoop]: Abstraction has 109832 states and 470688 transitions. [2019-12-07 17:11:50,868 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:11:50,868 INFO L276 IsEmpty]: Start isEmpty. Operand 109832 states and 470688 transitions. [2019-12-07 17:11:50,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:11:50,872 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:11:50,872 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:11:50,872 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:11:50,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:11:50,873 INFO L82 PathProgramCache]: Analyzing trace with hash -406604938, now seen corresponding path program 1 times [2019-12-07 17:11:50,873 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:11:50,873 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210458667] [2019-12-07 17:11:50,873 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:11:50,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:11:50,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:11:50,940 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210458667] [2019-12-07 17:11:50,940 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:11:50,941 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:11:50,941 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526071231] [2019-12-07 17:11:50,942 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:11:50,942 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:11:50,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:11:50,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:11:50,942 INFO L87 Difference]: Start difference. First operand 109832 states and 470688 transitions. Second operand 4 states. [2019-12-07 17:11:52,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:11:52,123 INFO L93 Difference]: Finished difference Result 175346 states and 720050 transitions. [2019-12-07 17:11:52,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:11:52,123 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:11:52,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:11:52,563 INFO L225 Difference]: With dead ends: 175346 [2019-12-07 17:11:52,563 INFO L226 Difference]: Without dead ends: 175297 [2019-12-07 17:11:52,563 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:11:58,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175297 states. [2019-12-07 17:12:02,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175297 to 159417. [2019-12-07 17:12:02,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159417 states. [2019-12-07 17:12:02,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159417 states to 159417 states and 663570 transitions. [2019-12-07 17:12:02,808 INFO L78 Accepts]: Start accepts. Automaton has 159417 states and 663570 transitions. Word has length 11 [2019-12-07 17:12:02,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:12:02,809 INFO L462 AbstractCegarLoop]: Abstraction has 159417 states and 663570 transitions. [2019-12-07 17:12:02,809 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:12:02,809 INFO L276 IsEmpty]: Start isEmpty. Operand 159417 states and 663570 transitions. [2019-12-07 17:12:02,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:12:02,813 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:12:02,813 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:12:02,813 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:12:02,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:12:02,813 INFO L82 PathProgramCache]: Analyzing trace with hash 901712968, now seen corresponding path program 1 times [2019-12-07 17:12:02,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:12:02,813 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802799917] [2019-12-07 17:12:02,813 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:12:02,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:12:02,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:12:02,862 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802799917] [2019-12-07 17:12:02,862 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:12:02,862 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:12:02,863 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [90477590] [2019-12-07 17:12:02,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:12:02,863 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:12:02,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:12:02,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:12:02,864 INFO L87 Difference]: Start difference. First operand 159417 states and 663570 transitions. Second operand 4 states. [2019-12-07 17:12:03,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:12:03,958 INFO L93 Difference]: Finished difference Result 224613 states and 913627 transitions. [2019-12-07 17:12:03,959 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:12:03,959 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:12:03,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:12:04,531 INFO L225 Difference]: With dead ends: 224613 [2019-12-07 17:12:04,531 INFO L226 Difference]: Without dead ends: 224557 [2019-12-07 17:12:04,531 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:12:11,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224557 states. [2019-12-07 17:12:15,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224557 to 189220. [2019-12-07 17:12:15,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189220 states. [2019-12-07 17:12:16,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189220 states to 189220 states and 783364 transitions. [2019-12-07 17:12:16,490 INFO L78 Accepts]: Start accepts. Automaton has 189220 states and 783364 transitions. Word has length 13 [2019-12-07 17:12:16,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:12:16,491 INFO L462 AbstractCegarLoop]: Abstraction has 189220 states and 783364 transitions. [2019-12-07 17:12:16,491 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:12:16,491 INFO L276 IsEmpty]: Start isEmpty. Operand 189220 states and 783364 transitions. [2019-12-07 17:12:16,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:12:16,499 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:12:16,499 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:12:16,499 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:12:16,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:12:16,500 INFO L82 PathProgramCache]: Analyzing trace with hash -100341528, now seen corresponding path program 1 times [2019-12-07 17:12:16,500 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:12:16,500 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871966063] [2019-12-07 17:12:16,500 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:12:16,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:12:16,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:12:16,564 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871966063] [2019-12-07 17:12:16,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:12:16,565 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:12:16,565 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2098975026] [2019-12-07 17:12:16,565 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:12:16,565 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:12:16,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:12:16,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:12:16,566 INFO L87 Difference]: Start difference. First operand 189220 states and 783364 transitions. Second operand 5 states. [2019-12-07 17:12:18,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:12:18,176 INFO L93 Difference]: Finished difference Result 258403 states and 1058469 transitions. [2019-12-07 17:12:18,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:12:18,176 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 17:12:18,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:12:18,840 INFO L225 Difference]: With dead ends: 258403 [2019-12-07 17:12:18,840 INFO L226 Difference]: Without dead ends: 258403 [2019-12-07 17:12:18,840 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:12:25,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 258403 states. [2019-12-07 17:12:28,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 258403 to 213814. [2019-12-07 17:12:28,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213814 states. [2019-12-07 17:12:29,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213814 states to 213814 states and 884433 transitions. [2019-12-07 17:12:29,594 INFO L78 Accepts]: Start accepts. Automaton has 213814 states and 884433 transitions. Word has length 16 [2019-12-07 17:12:29,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:12:29,594 INFO L462 AbstractCegarLoop]: Abstraction has 213814 states and 884433 transitions. [2019-12-07 17:12:29,594 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:12:29,594 INFO L276 IsEmpty]: Start isEmpty. Operand 213814 states and 884433 transitions. [2019-12-07 17:12:29,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:12:29,606 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:12:29,606 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:12:29,606 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:12:29,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:12:29,606 INFO L82 PathProgramCache]: Analyzing trace with hash 1671186354, now seen corresponding path program 1 times [2019-12-07 17:12:29,607 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:12:29,607 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1323106656] [2019-12-07 17:12:29,607 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:12:29,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:12:29,660 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:12:29,660 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1323106656] [2019-12-07 17:12:29,660 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:12:29,660 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:12:29,661 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [774338541] [2019-12-07 17:12:29,661 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:12:29,661 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:12:29,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:12:29,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:12:29,661 INFO L87 Difference]: Start difference. First operand 213814 states and 884433 transitions. Second operand 3 states. [2019-12-07 17:12:34,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:12:34,459 INFO L93 Difference]: Finished difference Result 394424 states and 1621856 transitions. [2019-12-07 17:12:34,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:12:34,460 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:12:34,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:12:35,325 INFO L225 Difference]: With dead ends: 394424 [2019-12-07 17:12:35,325 INFO L226 Difference]: Without dead ends: 345086 [2019-12-07 17:12:35,325 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:12:42,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345086 states. [2019-12-07 17:12:47,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345086 to 330201. [2019-12-07 17:12:47,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 330201 states. [2019-12-07 17:12:49,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330201 states to 330201 states and 1362778 transitions. [2019-12-07 17:12:49,055 INFO L78 Accepts]: Start accepts. Automaton has 330201 states and 1362778 transitions. Word has length 18 [2019-12-07 17:12:49,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:12:49,055 INFO L462 AbstractCegarLoop]: Abstraction has 330201 states and 1362778 transitions. [2019-12-07 17:12:49,055 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:12:49,055 INFO L276 IsEmpty]: Start isEmpty. Operand 330201 states and 1362778 transitions. [2019-12-07 17:12:49,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:12:49,079 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:12:49,079 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:12:49,079 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:12:49,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:12:49,080 INFO L82 PathProgramCache]: Analyzing trace with hash 111959643, now seen corresponding path program 1 times [2019-12-07 17:12:49,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:12:49,080 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409599811] [2019-12-07 17:12:49,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:12:49,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:12:49,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:12:49,113 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409599811] [2019-12-07 17:12:49,113 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:12:49,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:12:49,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [575983115] [2019-12-07 17:12:49,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:12:49,114 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:12:49,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:12:49,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:12:49,114 INFO L87 Difference]: Start difference. First operand 330201 states and 1362778 transitions. Second operand 3 states. [2019-12-07 17:12:50,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:12:50,403 INFO L93 Difference]: Finished difference Result 311140 states and 1269979 transitions. [2019-12-07 17:12:50,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:12:50,404 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 17:12:50,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:12:51,842 INFO L225 Difference]: With dead ends: 311140 [2019-12-07 17:12:51,843 INFO L226 Difference]: Without dead ends: 311140 [2019-12-07 17:12:51,843 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:01,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 311140 states. [2019-12-07 17:13:05,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 311140 to 307402. [2019-12-07 17:13:05,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307402 states. [2019-12-07 17:13:06,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307402 states to 307402 states and 1256379 transitions. [2019-12-07 17:13:06,916 INFO L78 Accepts]: Start accepts. Automaton has 307402 states and 1256379 transitions. Word has length 19 [2019-12-07 17:13:06,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:06,916 INFO L462 AbstractCegarLoop]: Abstraction has 307402 states and 1256379 transitions. [2019-12-07 17:13:06,916 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:13:06,916 INFO L276 IsEmpty]: Start isEmpty. Operand 307402 states and 1256379 transitions. [2019-12-07 17:13:06,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:13:06,936 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:06,936 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:06,936 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:06,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:06,937 INFO L82 PathProgramCache]: Analyzing trace with hash -1254967176, now seen corresponding path program 1 times [2019-12-07 17:13:06,937 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:06,937 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753738721] [2019-12-07 17:13:06,937 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:06,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:06,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:06,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [753738721] [2019-12-07 17:13:06,989 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:06,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:13:06,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [173010979] [2019-12-07 17:13:06,990 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:13:06,990 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:06,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:13:06,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:13:06,990 INFO L87 Difference]: Start difference. First operand 307402 states and 1256379 transitions. Second operand 5 states. [2019-12-07 17:13:09,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:09,602 INFO L93 Difference]: Finished difference Result 411510 states and 1651042 transitions. [2019-12-07 17:13:09,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:13:09,603 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:13:09,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:10,650 INFO L225 Difference]: With dead ends: 411510 [2019-12-07 17:13:10,650 INFO L226 Difference]: Without dead ends: 410915 [2019-12-07 17:13:10,650 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:13:22,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 410915 states. [2019-12-07 17:13:27,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 410915 to 315227. [2019-12-07 17:13:27,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315227 states. [2019-12-07 17:13:28,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315227 states to 315227 states and 1286219 transitions. [2019-12-07 17:13:28,486 INFO L78 Accepts]: Start accepts. Automaton has 315227 states and 1286219 transitions. Word has length 19 [2019-12-07 17:13:28,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:28,487 INFO L462 AbstractCegarLoop]: Abstraction has 315227 states and 1286219 transitions. [2019-12-07 17:13:28,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:13:28,487 INFO L276 IsEmpty]: Start isEmpty. Operand 315227 states and 1286219 transitions. [2019-12-07 17:13:28,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:13:28,508 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:28,508 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:28,508 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:28,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:28,508 INFO L82 PathProgramCache]: Analyzing trace with hash 156990669, now seen corresponding path program 1 times [2019-12-07 17:13:28,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:28,509 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [864926130] [2019-12-07 17:13:28,509 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:28,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:28,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:28,548 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [864926130] [2019-12-07 17:13:28,548 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:28,548 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:13:28,549 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1680360625] [2019-12-07 17:13:28,549 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:13:28,549 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:28,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:13:28,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:13:28,549 INFO L87 Difference]: Start difference. First operand 315227 states and 1286219 transitions. Second operand 4 states. [2019-12-07 17:13:28,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:28,818 INFO L93 Difference]: Finished difference Result 82923 states and 283861 transitions. [2019-12-07 17:13:28,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:13:28,818 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 17:13:28,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:28,925 INFO L225 Difference]: With dead ends: 82923 [2019-12-07 17:13:28,925 INFO L226 Difference]: Without dead ends: 63589 [2019-12-07 17:13:28,926 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:13:29,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63589 states. [2019-12-07 17:13:29,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63589 to 62726. [2019-12-07 17:13:29,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62726 states. [2019-12-07 17:13:29,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62726 states to 62726 states and 202884 transitions. [2019-12-07 17:13:29,945 INFO L78 Accepts]: Start accepts. Automaton has 62726 states and 202884 transitions. Word has length 19 [2019-12-07 17:13:29,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:29,945 INFO L462 AbstractCegarLoop]: Abstraction has 62726 states and 202884 transitions. [2019-12-07 17:13:29,945 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:13:29,945 INFO L276 IsEmpty]: Start isEmpty. Operand 62726 states and 202884 transitions. [2019-12-07 17:13:30,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:13:30,439 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:30,439 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:30,439 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:30,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:30,439 INFO L82 PathProgramCache]: Analyzing trace with hash -914144456, now seen corresponding path program 1 times [2019-12-07 17:13:30,440 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:30,440 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113217726] [2019-12-07 17:13:30,440 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:30,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:30,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:30,487 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [113217726] [2019-12-07 17:13:30,488 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:30,488 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:13:30,488 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527381423] [2019-12-07 17:13:30,488 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:13:30,488 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:30,488 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:13:30,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:13:30,489 INFO L87 Difference]: Start difference. First operand 62726 states and 202884 transitions. Second operand 6 states. [2019-12-07 17:13:31,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:31,415 INFO L93 Difference]: Finished difference Result 92045 states and 289896 transitions. [2019-12-07 17:13:31,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:13:31,415 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 17:13:31,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:31,549 INFO L225 Difference]: With dead ends: 92045 [2019-12-07 17:13:31,549 INFO L226 Difference]: Without dead ends: 91947 [2019-12-07 17:13:31,549 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:13:31,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91947 states. [2019-12-07 17:13:32,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91947 to 70110. [2019-12-07 17:13:32,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70110 states. [2019-12-07 17:13:32,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70110 states to 70110 states and 224617 transitions. [2019-12-07 17:13:32,832 INFO L78 Accepts]: Start accepts. Automaton has 70110 states and 224617 transitions. Word has length 22 [2019-12-07 17:13:32,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:32,832 INFO L462 AbstractCegarLoop]: Abstraction has 70110 states and 224617 transitions. [2019-12-07 17:13:32,832 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:13:32,832 INFO L276 IsEmpty]: Start isEmpty. Operand 70110 states and 224617 transitions. [2019-12-07 17:13:32,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:13:32,854 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:32,855 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:32,855 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:32,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:32,855 INFO L82 PathProgramCache]: Analyzing trace with hash 1712753165, now seen corresponding path program 1 times [2019-12-07 17:13:32,855 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:32,855 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383791628] [2019-12-07 17:13:32,855 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:32,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:32,900 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:32,900 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1383791628] [2019-12-07 17:13:32,900 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:32,901 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:13:32,901 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1100733458] [2019-12-07 17:13:32,901 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:13:32,901 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:32,901 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:13:32,901 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:13:32,901 INFO L87 Difference]: Start difference. First operand 70110 states and 224617 transitions. Second operand 6 states. [2019-12-07 17:13:33,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:33,858 INFO L93 Difference]: Finished difference Result 90943 states and 284836 transitions. [2019-12-07 17:13:33,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 17:13:33,858 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 17:13:33,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:33,982 INFO L225 Difference]: With dead ends: 90943 [2019-12-07 17:13:33,982 INFO L226 Difference]: Without dead ends: 90551 [2019-12-07 17:13:33,982 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:13:34,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90551 states. [2019-12-07 17:13:35,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90551 to 72087. [2019-12-07 17:13:35,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72087 states. [2019-12-07 17:13:35,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72087 states to 72087 states and 230343 transitions. [2019-12-07 17:13:35,229 INFO L78 Accepts]: Start accepts. Automaton has 72087 states and 230343 transitions. Word has length 27 [2019-12-07 17:13:35,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:35,229 INFO L462 AbstractCegarLoop]: Abstraction has 72087 states and 230343 transitions. [2019-12-07 17:13:35,229 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:13:35,229 INFO L276 IsEmpty]: Start isEmpty. Operand 72087 states and 230343 transitions. [2019-12-07 17:13:35,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:13:35,251 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:35,252 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:35,252 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:35,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:35,252 INFO L82 PathProgramCache]: Analyzing trace with hash -875379459, now seen corresponding path program 1 times [2019-12-07 17:13:35,252 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:35,252 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1926579300] [2019-12-07 17:13:35,252 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:35,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:35,294 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:35,294 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1926579300] [2019-12-07 17:13:35,294 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:35,295 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:13:35,295 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [933166498] [2019-12-07 17:13:35,295 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:13:35,295 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:35,295 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:13:35,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:13:35,295 INFO L87 Difference]: Start difference. First operand 72087 states and 230343 transitions. Second operand 5 states. [2019-12-07 17:13:35,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:35,410 INFO L93 Difference]: Finished difference Result 31936 states and 98527 transitions. [2019-12-07 17:13:35,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:13:35,410 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 17:13:35,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:35,446 INFO L225 Difference]: With dead ends: 31936 [2019-12-07 17:13:35,446 INFO L226 Difference]: Without dead ends: 27933 [2019-12-07 17:13:35,446 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:13:35,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27933 states. [2019-12-07 17:13:35,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27933 to 24532. [2019-12-07 17:13:35,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24532 states. [2019-12-07 17:13:35,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24532 states to 24532 states and 75081 transitions. [2019-12-07 17:13:35,808 INFO L78 Accepts]: Start accepts. Automaton has 24532 states and 75081 transitions. Word has length 30 [2019-12-07 17:13:35,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:35,808 INFO L462 AbstractCegarLoop]: Abstraction has 24532 states and 75081 transitions. [2019-12-07 17:13:35,808 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:13:35,808 INFO L276 IsEmpty]: Start isEmpty. Operand 24532 states and 75081 transitions. [2019-12-07 17:13:35,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:13:35,924 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:35,924 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:35,924 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:35,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:35,924 INFO L82 PathProgramCache]: Analyzing trace with hash 2004852157, now seen corresponding path program 1 times [2019-12-07 17:13:35,924 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:35,925 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [444666561] [2019-12-07 17:13:35,925 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:35,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:35,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:35,978 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [444666561] [2019-12-07 17:13:35,978 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:35,978 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:13:35,978 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [806188560] [2019-12-07 17:13:35,978 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:13:35,978 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:35,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:13:35,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:13:35,978 INFO L87 Difference]: Start difference. First operand 24532 states and 75081 transitions. Second operand 7 states. [2019-12-07 17:13:36,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:36,593 INFO L93 Difference]: Finished difference Result 31365 states and 92898 transitions. [2019-12-07 17:13:36,593 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:13:36,593 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 17:13:36,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:36,627 INFO L225 Difference]: With dead ends: 31365 [2019-12-07 17:13:36,627 INFO L226 Difference]: Without dead ends: 30704 [2019-12-07 17:13:36,628 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:13:36,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30704 states. [2019-12-07 17:13:36,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30704 to 23416. [2019-12-07 17:13:36,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23416 states. [2019-12-07 17:13:37,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23416 states to 23416 states and 71567 transitions. [2019-12-07 17:13:37,011 INFO L78 Accepts]: Start accepts. Automaton has 23416 states and 71567 transitions. Word has length 33 [2019-12-07 17:13:37,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:37,011 INFO L462 AbstractCegarLoop]: Abstraction has 23416 states and 71567 transitions. [2019-12-07 17:13:37,011 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:13:37,012 INFO L276 IsEmpty]: Start isEmpty. Operand 23416 states and 71567 transitions. [2019-12-07 17:13:37,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:13:37,033 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:37,033 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:37,034 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:37,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:37,034 INFO L82 PathProgramCache]: Analyzing trace with hash -1807729966, now seen corresponding path program 1 times [2019-12-07 17:13:37,034 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:37,034 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1911446116] [2019-12-07 17:13:37,034 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:37,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:37,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:37,082 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1911446116] [2019-12-07 17:13:37,083 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:37,083 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:13:37,083 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1730524664] [2019-12-07 17:13:37,083 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:13:37,083 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:37,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:13:37,084 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:13:37,084 INFO L87 Difference]: Start difference. First operand 23416 states and 71567 transitions. Second operand 5 states. [2019-12-07 17:13:37,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:37,485 INFO L93 Difference]: Finished difference Result 33307 states and 101116 transitions. [2019-12-07 17:13:37,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:13:37,485 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 17:13:37,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:37,522 INFO L225 Difference]: With dead ends: 33307 [2019-12-07 17:13:37,523 INFO L226 Difference]: Without dead ends: 33307 [2019-12-07 17:13:37,523 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:13:37,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33307 states. [2019-12-07 17:13:37,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33307 to 29836. [2019-12-07 17:13:37,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29836 states. [2019-12-07 17:13:38,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29836 states to 29836 states and 91419 transitions. [2019-12-07 17:13:38,006 INFO L78 Accepts]: Start accepts. Automaton has 29836 states and 91419 transitions. Word has length 41 [2019-12-07 17:13:38,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:38,006 INFO L462 AbstractCegarLoop]: Abstraction has 29836 states and 91419 transitions. [2019-12-07 17:13:38,006 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:13:38,006 INFO L276 IsEmpty]: Start isEmpty. Operand 29836 states and 91419 transitions. [2019-12-07 17:13:38,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:13:38,036 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:38,036 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:38,036 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:38,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:38,036 INFO L82 PathProgramCache]: Analyzing trace with hash 1819810788, now seen corresponding path program 2 times [2019-12-07 17:13:38,036 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:38,037 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1903815159] [2019-12-07 17:13:38,037 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:38,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:38,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:38,091 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1903815159] [2019-12-07 17:13:38,091 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:38,091 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:13:38,092 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [940884288] [2019-12-07 17:13:38,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:13:38,092 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:38,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:13:38,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:13:38,092 INFO L87 Difference]: Start difference. First operand 29836 states and 91419 transitions. Second operand 6 states. [2019-12-07 17:13:38,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:38,196 INFO L93 Difference]: Finished difference Result 27869 states and 86990 transitions. [2019-12-07 17:13:38,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:13:38,196 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 17:13:38,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:38,231 INFO L225 Difference]: With dead ends: 27869 [2019-12-07 17:13:38,231 INFO L226 Difference]: Without dead ends: 26689 [2019-12-07 17:13:38,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:13:38,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26689 states. [2019-12-07 17:13:38,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26689 to 15886. [2019-12-07 17:13:38,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15886 states. [2019-12-07 17:13:38,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15886 states to 15886 states and 49962 transitions. [2019-12-07 17:13:38,531 INFO L78 Accepts]: Start accepts. Automaton has 15886 states and 49962 transitions. Word has length 41 [2019-12-07 17:13:38,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:38,532 INFO L462 AbstractCegarLoop]: Abstraction has 15886 states and 49962 transitions. [2019-12-07 17:13:38,532 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:13:38,532 INFO L276 IsEmpty]: Start isEmpty. Operand 15886 states and 49962 transitions. [2019-12-07 17:13:38,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:13:38,546 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:38,546 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:38,546 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:38,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:38,546 INFO L82 PathProgramCache]: Analyzing trace with hash 1744457316, now seen corresponding path program 1 times [2019-12-07 17:13:38,546 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:38,546 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2136952578] [2019-12-07 17:13:38,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:38,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:38,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:38,574 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2136952578] [2019-12-07 17:13:38,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:38,575 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:13:38,575 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [384876526] [2019-12-07 17:13:38,575 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:13:38,575 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:38,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:13:38,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:38,575 INFO L87 Difference]: Start difference. First operand 15886 states and 49962 transitions. Second operand 3 states. [2019-12-07 17:13:38,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:38,686 INFO L93 Difference]: Finished difference Result 21329 states and 66448 transitions. [2019-12-07 17:13:38,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:13:38,687 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 17:13:38,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:38,708 INFO L225 Difference]: With dead ends: 21329 [2019-12-07 17:13:38,709 INFO L226 Difference]: Without dead ends: 21329 [2019-12-07 17:13:38,709 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:38,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21329 states. [2019-12-07 17:13:38,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21329 to 16837. [2019-12-07 17:13:38,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16837 states. [2019-12-07 17:13:38,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16837 states to 16837 states and 52826 transitions. [2019-12-07 17:13:38,978 INFO L78 Accepts]: Start accepts. Automaton has 16837 states and 52826 transitions. Word has length 65 [2019-12-07 17:13:38,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:38,978 INFO L462 AbstractCegarLoop]: Abstraction has 16837 states and 52826 transitions. [2019-12-07 17:13:38,978 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:13:38,978 INFO L276 IsEmpty]: Start isEmpty. Operand 16837 states and 52826 transitions. [2019-12-07 17:13:38,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:13:38,992 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:38,993 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:38,993 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:38,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:38,993 INFO L82 PathProgramCache]: Analyzing trace with hash -781207822, now seen corresponding path program 1 times [2019-12-07 17:13:38,993 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:38,993 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1543342985] [2019-12-07 17:13:38,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:39,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:39,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:39,059 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1543342985] [2019-12-07 17:13:39,059 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:39,059 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:13:39,059 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1218779402] [2019-12-07 17:13:39,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:13:39,059 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:39,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:13:39,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:13:39,060 INFO L87 Difference]: Start difference. First operand 16837 states and 52826 transitions. Second operand 7 states. [2019-12-07 17:13:39,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:39,739 INFO L93 Difference]: Finished difference Result 25712 states and 78833 transitions. [2019-12-07 17:13:39,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 17:13:39,740 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 17:13:39,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:39,769 INFO L225 Difference]: With dead ends: 25712 [2019-12-07 17:13:39,769 INFO L226 Difference]: Without dead ends: 25712 [2019-12-07 17:13:39,770 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:13:39,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25712 states. [2019-12-07 17:13:40,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25712 to 17162. [2019-12-07 17:13:40,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17162 states. [2019-12-07 17:13:40,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17162 states to 17162 states and 53961 transitions. [2019-12-07 17:13:40,073 INFO L78 Accepts]: Start accepts. Automaton has 17162 states and 53961 transitions. Word has length 65 [2019-12-07 17:13:40,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:40,074 INFO L462 AbstractCegarLoop]: Abstraction has 17162 states and 53961 transitions. [2019-12-07 17:13:40,074 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:13:40,074 INFO L276 IsEmpty]: Start isEmpty. Operand 17162 states and 53961 transitions. [2019-12-07 17:13:40,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:13:40,088 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:40,089 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:40,089 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:40,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:40,089 INFO L82 PathProgramCache]: Analyzing trace with hash -1933205722, now seen corresponding path program 2 times [2019-12-07 17:13:40,089 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:40,089 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1702168941] [2019-12-07 17:13:40,089 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:40,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:40,126 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:40,126 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1702168941] [2019-12-07 17:13:40,127 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:40,127 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:13:40,127 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1183604442] [2019-12-07 17:13:40,127 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:13:40,127 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:40,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:13:40,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:40,128 INFO L87 Difference]: Start difference. First operand 17162 states and 53961 transitions. Second operand 3 states. [2019-12-07 17:13:40,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:40,208 INFO L93 Difference]: Finished difference Result 20364 states and 63785 transitions. [2019-12-07 17:13:40,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:13:40,209 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 17:13:40,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:40,231 INFO L225 Difference]: With dead ends: 20364 [2019-12-07 17:13:40,231 INFO L226 Difference]: Without dead ends: 20364 [2019-12-07 17:13:40,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:40,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20364 states. [2019-12-07 17:13:40,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20364 to 15864. [2019-12-07 17:13:40,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15864 states. [2019-12-07 17:13:40,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15864 states to 15864 states and 50408 transitions. [2019-12-07 17:13:40,487 INFO L78 Accepts]: Start accepts. Automaton has 15864 states and 50408 transitions. Word has length 65 [2019-12-07 17:13:40,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:40,487 INFO L462 AbstractCegarLoop]: Abstraction has 15864 states and 50408 transitions. [2019-12-07 17:13:40,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:13:40,487 INFO L276 IsEmpty]: Start isEmpty. Operand 15864 states and 50408 transitions. [2019-12-07 17:13:40,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:13:40,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:40,501 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:40,501 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:40,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:40,502 INFO L82 PathProgramCache]: Analyzing trace with hash -1385318173, now seen corresponding path program 1 times [2019-12-07 17:13:40,502 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:40,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [836450101] [2019-12-07 17:13:40,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:40,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:40,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:40,566 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [836450101] [2019-12-07 17:13:40,566 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:40,566 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:13:40,566 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [751799820] [2019-12-07 17:13:40,566 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:13:40,567 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:40,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:13:40,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:13:40,567 INFO L87 Difference]: Start difference. First operand 15864 states and 50408 transitions. Second operand 8 states. [2019-12-07 17:13:41,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:41,511 INFO L93 Difference]: Finished difference Result 25101 states and 76829 transitions. [2019-12-07 17:13:41,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 17:13:41,512 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 17:13:41,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:41,540 INFO L225 Difference]: With dead ends: 25101 [2019-12-07 17:13:41,540 INFO L226 Difference]: Without dead ends: 25101 [2019-12-07 17:13:41,540 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2019-12-07 17:13:41,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25101 states. [2019-12-07 17:13:41,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25101 to 15756. [2019-12-07 17:13:41,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15756 states. [2019-12-07 17:13:41,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15756 states to 15756 states and 50102 transitions. [2019-12-07 17:13:41,879 INFO L78 Accepts]: Start accepts. Automaton has 15756 states and 50102 transitions. Word has length 66 [2019-12-07 17:13:41,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:41,880 INFO L462 AbstractCegarLoop]: Abstraction has 15756 states and 50102 transitions. [2019-12-07 17:13:41,880 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:13:41,880 INFO L276 IsEmpty]: Start isEmpty. Operand 15756 states and 50102 transitions. [2019-12-07 17:13:41,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:13:41,894 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:41,894 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:41,894 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:41,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:41,894 INFO L82 PathProgramCache]: Analyzing trace with hash 646144711, now seen corresponding path program 2 times [2019-12-07 17:13:41,895 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:41,895 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460188073] [2019-12-07 17:13:41,895 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:41,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:42,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:42,080 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460188073] [2019-12-07 17:13:42,080 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:42,080 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:13:42,080 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1941772875] [2019-12-07 17:13:42,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:13:42,080 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:42,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:13:42,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:13:42,081 INFO L87 Difference]: Start difference. First operand 15756 states and 50102 transitions. Second operand 13 states. [2019-12-07 17:13:45,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:45,937 INFO L93 Difference]: Finished difference Result 73452 states and 227613 transitions. [2019-12-07 17:13:45,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 17:13:45,937 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 66 [2019-12-07 17:13:45,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:46,005 INFO L225 Difference]: With dead ends: 73452 [2019-12-07 17:13:46,005 INFO L226 Difference]: Without dead ends: 50889 [2019-12-07 17:13:46,007 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 938 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=576, Invalid=2504, Unknown=0, NotChecked=0, Total=3080 [2019-12-07 17:13:46,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50889 states. [2019-12-07 17:13:46,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50889 to 17544. [2019-12-07 17:13:46,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17544 states. [2019-12-07 17:13:46,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17544 states to 17544 states and 56399 transitions. [2019-12-07 17:13:46,513 INFO L78 Accepts]: Start accepts. Automaton has 17544 states and 56399 transitions. Word has length 66 [2019-12-07 17:13:46,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:46,514 INFO L462 AbstractCegarLoop]: Abstraction has 17544 states and 56399 transitions. [2019-12-07 17:13:46,514 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:13:46,514 INFO L276 IsEmpty]: Start isEmpty. Operand 17544 states and 56399 transitions. [2019-12-07 17:13:46,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:13:46,530 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:46,531 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:46,531 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:46,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:46,531 INFO L82 PathProgramCache]: Analyzing trace with hash -314200377, now seen corresponding path program 3 times [2019-12-07 17:13:46,531 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:46,531 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [561390524] [2019-12-07 17:13:46,533 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:46,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:46,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:46,565 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [561390524] [2019-12-07 17:13:46,566 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:46,566 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:13:46,566 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584922997] [2019-12-07 17:13:46,566 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:13:46,566 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:46,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:13:46,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:46,566 INFO L87 Difference]: Start difference. First operand 17544 states and 56399 transitions. Second operand 3 states. [2019-12-07 17:13:46,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:46,614 INFO L93 Difference]: Finished difference Result 17161 states and 54233 transitions. [2019-12-07 17:13:46,614 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:13:46,614 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:13:46,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:46,635 INFO L225 Difference]: With dead ends: 17161 [2019-12-07 17:13:46,635 INFO L226 Difference]: Without dead ends: 17161 [2019-12-07 17:13:46,635 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:13:46,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17161 states. [2019-12-07 17:13:46,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17161 to 16189. [2019-12-07 17:13:46,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16189 states. [2019-12-07 17:13:46,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16189 states to 16189 states and 51188 transitions. [2019-12-07 17:13:46,868 INFO L78 Accepts]: Start accepts. Automaton has 16189 states and 51188 transitions. Word has length 66 [2019-12-07 17:13:46,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:46,869 INFO L462 AbstractCegarLoop]: Abstraction has 16189 states and 51188 transitions. [2019-12-07 17:13:46,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:13:46,869 INFO L276 IsEmpty]: Start isEmpty. Operand 16189 states and 51188 transitions. [2019-12-07 17:13:46,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:13:46,882 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:46,883 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:46,883 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:46,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:46,883 INFO L82 PathProgramCache]: Analyzing trace with hash 284301030, now seen corresponding path program 1 times [2019-12-07 17:13:46,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:46,883 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1697781115] [2019-12-07 17:13:46,883 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:46,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:47,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:47,306 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1697781115] [2019-12-07 17:13:47,306 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:47,306 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 17:13:47,306 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653902549] [2019-12-07 17:13:47,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:13:47,306 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:47,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:13:47,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=194, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:13:47,307 INFO L87 Difference]: Start difference. First operand 16189 states and 51188 transitions. Second operand 16 states. [2019-12-07 17:13:52,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:13:52,704 INFO L93 Difference]: Finished difference Result 59872 states and 184602 transitions. [2019-12-07 17:13:52,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2019-12-07 17:13:52,704 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 17:13:52,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:13:52,754 INFO L225 Difference]: With dead ends: 59872 [2019-12-07 17:13:52,755 INFO L226 Difference]: Without dead ends: 39580 [2019-12-07 17:13:52,757 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2341 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1166, Invalid=5476, Unknown=0, NotChecked=0, Total=6642 [2019-12-07 17:13:52,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39580 states. [2019-12-07 17:13:53,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39580 to 18731. [2019-12-07 17:13:53,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18731 states. [2019-12-07 17:13:53,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18731 states to 18731 states and 58661 transitions. [2019-12-07 17:13:53,154 INFO L78 Accepts]: Start accepts. Automaton has 18731 states and 58661 transitions. Word has length 67 [2019-12-07 17:13:53,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:13:53,154 INFO L462 AbstractCegarLoop]: Abstraction has 18731 states and 58661 transitions. [2019-12-07 17:13:53,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:13:53,154 INFO L276 IsEmpty]: Start isEmpty. Operand 18731 states and 58661 transitions. [2019-12-07 17:13:53,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:13:53,171 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:13:53,171 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:13:53,171 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:13:53,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:13:53,172 INFO L82 PathProgramCache]: Analyzing trace with hash -417522054, now seen corresponding path program 2 times [2019-12-07 17:13:53,172 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:13:53,172 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [993819811] [2019-12-07 17:13:53,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:13:53,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:13:53,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:13:53,571 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [993819811] [2019-12-07 17:13:53,571 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:13:53,571 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 17:13:53,571 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [84155812] [2019-12-07 17:13:53,571 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 17:13:53,571 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:13:53,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 17:13:53,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2019-12-07 17:13:53,572 INFO L87 Difference]: Start difference. First operand 18731 states and 58661 transitions. Second operand 17 states. [2019-12-07 17:14:02,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:02,629 INFO L93 Difference]: Finished difference Result 53212 states and 163560 transitions. [2019-12-07 17:14:02,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 106 states. [2019-12-07 17:14:02,630 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 17:14:02,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:02,689 INFO L225 Difference]: With dead ends: 53212 [2019-12-07 17:14:02,689 INFO L226 Difference]: Without dead ends: 41589 [2019-12-07 17:14:02,693 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 105 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4353 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=1644, Invalid=9698, Unknown=0, NotChecked=0, Total=11342 [2019-12-07 17:14:02,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41589 states. [2019-12-07 17:14:03,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41589 to 19242. [2019-12-07 17:14:03,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19242 states. [2019-12-07 17:14:03,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19242 states to 19242 states and 59906 transitions. [2019-12-07 17:14:03,135 INFO L78 Accepts]: Start accepts. Automaton has 19242 states and 59906 transitions. Word has length 67 [2019-12-07 17:14:03,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:03,136 INFO L462 AbstractCegarLoop]: Abstraction has 19242 states and 59906 transitions. [2019-12-07 17:14:03,136 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 17:14:03,136 INFO L276 IsEmpty]: Start isEmpty. Operand 19242 states and 59906 transitions. [2019-12-07 17:14:03,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:14:03,153 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:03,153 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:03,153 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:03,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:03,153 INFO L82 PathProgramCache]: Analyzing trace with hash 1433623136, now seen corresponding path program 3 times [2019-12-07 17:14:03,153 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:03,154 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713222753] [2019-12-07 17:14:03,154 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:03,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:03,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:03,298 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1713222753] [2019-12-07 17:14:03,298 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:03,298 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:14:03,298 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [600774117] [2019-12-07 17:14:03,298 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:14:03,298 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:03,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:14:03,299 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:14:03,299 INFO L87 Difference]: Start difference. First operand 19242 states and 59906 transitions. Second operand 11 states. [2019-12-07 17:14:04,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:04,097 INFO L93 Difference]: Finished difference Result 50665 states and 157705 transitions. [2019-12-07 17:14:04,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 17:14:04,098 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 17:14:04,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:04,152 INFO L225 Difference]: With dead ends: 50665 [2019-12-07 17:14:04,152 INFO L226 Difference]: Without dead ends: 43783 [2019-12-07 17:14:04,153 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 348 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=271, Invalid=1135, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 17:14:04,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43783 states. [2019-12-07 17:14:04,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43783 to 24617. [2019-12-07 17:14:04,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24617 states. [2019-12-07 17:14:04,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24617 states to 24617 states and 76817 transitions. [2019-12-07 17:14:04,661 INFO L78 Accepts]: Start accepts. Automaton has 24617 states and 76817 transitions. Word has length 67 [2019-12-07 17:14:04,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:04,661 INFO L462 AbstractCegarLoop]: Abstraction has 24617 states and 76817 transitions. [2019-12-07 17:14:04,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:14:04,662 INFO L276 IsEmpty]: Start isEmpty. Operand 24617 states and 76817 transitions. [2019-12-07 17:14:04,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:14:04,690 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:04,690 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:04,690 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:04,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:04,690 INFO L82 PathProgramCache]: Analyzing trace with hash -1480867452, now seen corresponding path program 4 times [2019-12-07 17:14:04,690 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:04,691 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278685368] [2019-12-07 17:14:04,691 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:04,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:04,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:04,817 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278685368] [2019-12-07 17:14:04,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:04,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:14:04,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2024654737] [2019-12-07 17:14:04,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:14:04,818 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:04,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:14:04,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:14:04,818 INFO L87 Difference]: Start difference. First operand 24617 states and 76817 transitions. Second operand 11 states. [2019-12-07 17:14:05,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:05,486 INFO L93 Difference]: Finished difference Result 42313 states and 131094 transitions. [2019-12-07 17:14:05,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 17:14:05,486 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 17:14:05,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:05,525 INFO L225 Difference]: With dead ends: 42313 [2019-12-07 17:14:05,525 INFO L226 Difference]: Without dead ends: 32704 [2019-12-07 17:14:05,526 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=158, Invalid=598, Unknown=0, NotChecked=0, Total=756 [2019-12-07 17:14:05,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32704 states. [2019-12-07 17:14:05,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32704 to 18521. [2019-12-07 17:14:05,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18521 states. [2019-12-07 17:14:05,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18521 states to 18521 states and 57469 transitions. [2019-12-07 17:14:05,891 INFO L78 Accepts]: Start accepts. Automaton has 18521 states and 57469 transitions. Word has length 67 [2019-12-07 17:14:05,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:05,891 INFO L462 AbstractCegarLoop]: Abstraction has 18521 states and 57469 transitions. [2019-12-07 17:14:05,891 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:14:05,891 INFO L276 IsEmpty]: Start isEmpty. Operand 18521 states and 57469 transitions. [2019-12-07 17:14:05,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:14:05,907 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:05,907 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:05,908 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:05,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:05,908 INFO L82 PathProgramCache]: Analyzing trace with hash -1507199932, now seen corresponding path program 5 times [2019-12-07 17:14:05,908 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:05,908 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [439776902] [2019-12-07 17:14:05,908 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:05,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:06,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:06,101 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [439776902] [2019-12-07 17:14:06,101 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:06,102 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:14:06,102 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [536118166] [2019-12-07 17:14:06,102 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:14:06,102 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:06,102 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:14:06,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:14:06,102 INFO L87 Difference]: Start difference. First operand 18521 states and 57469 transitions. Second operand 13 states. [2019-12-07 17:14:10,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:10,679 INFO L93 Difference]: Finished difference Result 55852 states and 166921 transitions. [2019-12-07 17:14:10,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 17:14:10,680 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 17:14:10,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:10,746 INFO L225 Difference]: With dead ends: 55852 [2019-12-07 17:14:10,746 INFO L226 Difference]: Without dead ends: 48127 [2019-12-07 17:14:10,747 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 977 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=567, Invalid=2625, Unknown=0, NotChecked=0, Total=3192 [2019-12-07 17:14:10,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48127 states. [2019-12-07 17:14:11,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48127 to 18773. [2019-12-07 17:14:11,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18773 states. [2019-12-07 17:14:11,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18773 states to 18773 states and 57940 transitions. [2019-12-07 17:14:11,210 INFO L78 Accepts]: Start accepts. Automaton has 18773 states and 57940 transitions. Word has length 67 [2019-12-07 17:14:11,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:11,210 INFO L462 AbstractCegarLoop]: Abstraction has 18773 states and 57940 transitions. [2019-12-07 17:14:11,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:14:11,210 INFO L276 IsEmpty]: Start isEmpty. Operand 18773 states and 57940 transitions. [2019-12-07 17:14:11,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:14:11,227 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:11,227 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:11,227 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:11,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:11,228 INFO L82 PathProgramCache]: Analyzing trace with hash -72336402, now seen corresponding path program 6 times [2019-12-07 17:14:11,228 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:11,228 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625407643] [2019-12-07 17:14:11,228 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:11,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:11,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:11,563 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [625407643] [2019-12-07 17:14:11,563 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:11,563 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 17:14:11,563 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1376992152] [2019-12-07 17:14:11,563 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:14:11,563 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:11,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:14:11,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:14:11,564 INFO L87 Difference]: Start difference. First operand 18773 states and 57940 transitions. Second operand 16 states. [2019-12-07 17:14:16,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:16,597 INFO L93 Difference]: Finished difference Result 39308 states and 119433 transitions. [2019-12-07 17:14:16,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 75 states. [2019-12-07 17:14:16,598 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 17:14:16,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:16,643 INFO L225 Difference]: With dead ends: 39308 [2019-12-07 17:14:16,643 INFO L226 Difference]: Without dead ends: 38713 [2019-12-07 17:14:16,645 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2034 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=925, Invalid=4927, Unknown=0, NotChecked=0, Total=5852 [2019-12-07 17:14:16,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38713 states. [2019-12-07 17:14:17,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38713 to 18797. [2019-12-07 17:14:17,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18797 states. [2019-12-07 17:14:17,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18797 states to 18797 states and 58002 transitions. [2019-12-07 17:14:17,035 INFO L78 Accepts]: Start accepts. Automaton has 18797 states and 58002 transitions. Word has length 67 [2019-12-07 17:14:17,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:17,035 INFO L462 AbstractCegarLoop]: Abstraction has 18797 states and 58002 transitions. [2019-12-07 17:14:17,035 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:14:17,035 INFO L276 IsEmpty]: Start isEmpty. Operand 18797 states and 58002 transitions. [2019-12-07 17:14:17,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:14:17,052 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:17,052 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:17,052 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:17,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:17,052 INFO L82 PathProgramCache]: Analyzing trace with hash -21832280, now seen corresponding path program 7 times [2019-12-07 17:14:17,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:17,052 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1747841968] [2019-12-07 17:14:17,053 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:17,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:17,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:17,311 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1747841968] [2019-12-07 17:14:17,311 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:17,311 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:14:17,311 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1397541647] [2019-12-07 17:14:17,312 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:14:17,312 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:17,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:14:17,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:14:17,312 INFO L87 Difference]: Start difference. First operand 18797 states and 58002 transitions. Second operand 15 states. [2019-12-07 17:14:21,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:21,765 INFO L93 Difference]: Finished difference Result 38817 states and 117300 transitions. [2019-12-07 17:14:21,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-12-07 17:14:21,765 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 17:14:21,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:21,812 INFO L225 Difference]: With dead ends: 38817 [2019-12-07 17:14:21,812 INFO L226 Difference]: Without dead ends: 37240 [2019-12-07 17:14:21,814 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1380 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=653, Invalid=3637, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 17:14:21,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37240 states. [2019-12-07 17:14:22,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37240 to 18801. [2019-12-07 17:14:22,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18801 states. [2019-12-07 17:14:22,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18801 states to 18801 states and 58014 transitions. [2019-12-07 17:14:22,234 INFO L78 Accepts]: Start accepts. Automaton has 18801 states and 58014 transitions. Word has length 67 [2019-12-07 17:14:22,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:22,234 INFO L462 AbstractCegarLoop]: Abstraction has 18801 states and 58014 transitions. [2019-12-07 17:14:22,234 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:14:22,234 INFO L276 IsEmpty]: Start isEmpty. Operand 18801 states and 58014 transitions. [2019-12-07 17:14:22,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:14:22,249 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:22,249 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:22,249 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:22,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:22,250 INFO L82 PathProgramCache]: Analyzing trace with hash -1141632600, now seen corresponding path program 8 times [2019-12-07 17:14:22,250 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:22,250 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1000169448] [2019-12-07 17:14:22,250 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:22,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:22,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:22,561 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1000169448] [2019-12-07 17:14:22,561 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:22,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 17:14:22,562 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1939526708] [2019-12-07 17:14:22,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:14:22,562 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:22,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:14:22,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:14:22,562 INFO L87 Difference]: Start difference. First operand 18801 states and 58014 transitions. Second operand 16 states. [2019-12-07 17:14:28,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:28,633 INFO L93 Difference]: Finished difference Result 37726 states and 114776 transitions. [2019-12-07 17:14:28,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2019-12-07 17:14:28,634 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 17:14:28,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:28,678 INFO L225 Difference]: With dead ends: 37726 [2019-12-07 17:14:28,678 INFO L226 Difference]: Without dead ends: 37159 [2019-12-07 17:14:28,680 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1567 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=690, Invalid=4140, Unknown=0, NotChecked=0, Total=4830 [2019-12-07 17:14:28,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37159 states. [2019-12-07 17:14:29,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37159 to 18809. [2019-12-07 17:14:29,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18809 states. [2019-12-07 17:14:29,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18809 states to 18809 states and 58036 transitions. [2019-12-07 17:14:29,061 INFO L78 Accepts]: Start accepts. Automaton has 18809 states and 58036 transitions. Word has length 67 [2019-12-07 17:14:29,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:29,061 INFO L462 AbstractCegarLoop]: Abstraction has 18809 states and 58036 transitions. [2019-12-07 17:14:29,061 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:14:29,061 INFO L276 IsEmpty]: Start isEmpty. Operand 18809 states and 58036 transitions. [2019-12-07 17:14:29,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:14:29,078 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:29,078 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:29,078 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:29,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:29,078 INFO L82 PathProgramCache]: Analyzing trace with hash 1736760038, now seen corresponding path program 9 times [2019-12-07 17:14:29,078 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:29,078 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1604090846] [2019-12-07 17:14:29,078 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:29,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:14:29,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:14:29,199 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1604090846] [2019-12-07 17:14:29,199 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:14:29,199 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:14:29,199 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1428868337] [2019-12-07 17:14:29,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:14:29,200 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:14:29,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:14:29,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:14:29,200 INFO L87 Difference]: Start difference. First operand 18809 states and 58036 transitions. Second operand 11 states. [2019-12-07 17:14:31,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:14:31,146 INFO L93 Difference]: Finished difference Result 36517 states and 111056 transitions. [2019-12-07 17:14:31,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 17:14:31,147 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 17:14:31,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:14:31,183 INFO L225 Difference]: With dead ends: 36517 [2019-12-07 17:14:31,183 INFO L226 Difference]: Without dead ends: 35135 [2019-12-07 17:14:31,183 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 204 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=171, Invalid=821, Unknown=0, NotChecked=0, Total=992 [2019-12-07 17:14:31,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35135 states. [2019-12-07 17:14:31,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35135 to 18383. [2019-12-07 17:14:31,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18383 states. [2019-12-07 17:14:31,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18383 states to 18383 states and 56872 transitions. [2019-12-07 17:14:31,533 INFO L78 Accepts]: Start accepts. Automaton has 18383 states and 56872 transitions. Word has length 67 [2019-12-07 17:14:31,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:14:31,533 INFO L462 AbstractCegarLoop]: Abstraction has 18383 states and 56872 transitions. [2019-12-07 17:14:31,533 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:14:31,533 INFO L276 IsEmpty]: Start isEmpty. Operand 18383 states and 56872 transitions. [2019-12-07 17:14:31,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:14:31,550 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:14:31,550 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:14:31,550 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:14:31,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:14:31,550 INFO L82 PathProgramCache]: Analyzing trace with hash 968273958, now seen corresponding path program 10 times [2019-12-07 17:14:31,550 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:14:31,550 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541115070] [2019-12-07 17:14:31,551 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:14:31,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:14:31,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:14:31,628 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:14:31,628 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:14:31,630 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] ULTIMATE.startENTRY-->L828: Formula: (let ((.cse0 (store |v_#valid_76| 0 0))) (and (= v_~a$r_buff1_thd0~0_168 0) (= 0 v_~__unbuffered_p2_EAX~0_43) (= 0 |v_ULTIMATE.start_main_~#t1193~0.offset_25|) (= v_~__unbuffered_p2_EBX~0_46 0) (= |v_#NULL.offset_7| 0) (= 0 v_~a$w_buff1_used~0_387) (= (store .cse0 |v_ULTIMATE.start_main_~#t1193~0.base_37| 1) |v_#valid_74|) (= v_~a$w_buff0~0_207 0) (= 0 v_~weak$$choice0~0_17) (= v_~a$mem_tmp~0_18 0) (< 0 |v_#StackHeapBarrier_17|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1193~0.base_37| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1193~0.base_37|) |v_ULTIMATE.start_main_~#t1193~0.offset_25| 0)) |v_#memory_int_21|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1193~0.base_37|) (= 0 v_~a$r_buff0_thd2~0_167) (= 0 v_~a$r_buff1_thd1~0_155) (= v_~y~0_56 0) (= 0 v_~a$r_buff0_thd1~0_253) (= v_~a$r_buff0_thd0~0_180 0) (= 0 v_~a$w_buff1~0_155) (= v_~main$tmp_guard0~0_36 0) (= v_~a~0_177 0) (= v_~a$flush_delayed~0_31 0) (= v_~a$r_buff0_thd3~0_361 0) (= 0 |v_#NULL.base_7|) (= 0 v_~x~0_140) (= 0 v_~a$w_buff0_used~0_714) (= v_~z~0_17 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1193~0.base_37| 4)) (= 0 v_~a$r_buff1_thd2~0_176) (= (select .cse0 |v_ULTIMATE.start_main_~#t1193~0.base_37|) 0) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= v_~a$r_buff1_thd3~0_273 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~weak$$choice2~0_104 0) (= v_~__unbuffered_cnt~0_126 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_76|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_176, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_266|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_180, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_42|, ~a~0=v_~a~0_177, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, ULTIMATE.start_main_~#t1194~0.base=|v_ULTIMATE.start_main_~#t1194~0.base_37|, ULTIMATE.start_main_~#t1195~0.offset=|v_ULTIMATE.start_main_~#t1195~0.offset_15|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_43, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_46, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_273, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_714, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_253, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1194~0.offset=|v_ULTIMATE.start_main_~#t1194~0.offset_24|, ~a$w_buff0~0=v_~a$w_buff0~0_207, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_168, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126, ULTIMATE.start_main_~#t1193~0.base=|v_ULTIMATE.start_main_~#t1193~0.base_37|, ~x~0=v_~x~0_140, ~a$read_delayed~0=v_~a$read_delayed~0_6, ULTIMATE.start_main_~#t1193~0.offset=|v_ULTIMATE.start_main_~#t1193~0.offset_25|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_41|, ~a$mem_tmp~0=v_~a$mem_tmp~0_18, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_40|, ~a$w_buff1~0=v_~a$w_buff1~0_155, ~y~0=v_~y~0_56, ULTIMATE.start_main_~#t1195~0.base=|v_ULTIMATE.start_main_~#t1195~0.base_18|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_15|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_155, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_361, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_36, #NULL.base=|v_#NULL.base_7|, ~a$flush_delayed~0=v_~a$flush_delayed~0_31, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_17, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_387, ~weak$$choice2~0=v_~weak$$choice2~0_104, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t1194~0.base, ULTIMATE.start_main_~#t1195~0.offset, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1194~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1193~0.base, ~x~0, ~a$read_delayed~0, ULTIMATE.start_main_~#t1193~0.offset, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t1195~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 17:14:31,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L828-1-->L830: Formula: (and (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1194~0.base_9| 1)) (= 0 |v_ULTIMATE.start_main_~#t1194~0.offset_8|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1194~0.base_9| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1194~0.base_9| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1194~0.base_9|) |v_ULTIMATE.start_main_~#t1194~0.offset_8| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1194~0.base_9| 0)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1194~0.base_9|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1194~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1194~0.offset=|v_ULTIMATE.start_main_~#t1194~0.offset_8|, ULTIMATE.start_main_~#t1194~0.base=|v_ULTIMATE.start_main_~#t1194~0.base_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1194~0.offset, ULTIMATE.start_main_~#t1194~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:14:31,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L4-->L746: Formula: (and (= ~a$r_buff0_thd0~0_In-1473440477 ~a$r_buff1_thd0~0_Out-1473440477) (= ~a$r_buff1_thd2~0_Out-1473440477 ~a$r_buff0_thd2~0_In-1473440477) (= 1 ~x~0_Out-1473440477) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1473440477)) (= 1 ~a$r_buff0_thd1~0_Out-1473440477) (= ~a$r_buff1_thd3~0_Out-1473440477 ~a$r_buff0_thd3~0_In-1473440477) (= ~a$r_buff0_thd1~0_In-1473440477 ~a$r_buff1_thd1~0_Out-1473440477)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1473440477, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1473440477, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1473440477, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1473440477, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1473440477} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-1473440477, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-1473440477, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-1473440477, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1473440477, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-1473440477, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1473440477, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1473440477, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1473440477, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1473440477, ~x~0=~x~0_Out-1473440477} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:14:31,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L830-1-->L832: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1195~0.offset_10|) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1195~0.base_12| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1195~0.base_12| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1195~0.base_12|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1195~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1195~0.base_12|) |v_ULTIMATE.start_main_~#t1195~0.offset_10| 2)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t1195~0.base_12| 0)) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1195~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1195~0.base=|v_ULTIMATE.start_main_~#t1195~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1195~0.offset=|v_ULTIMATE.start_main_~#t1195~0.offset_10|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1195~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1195~0.offset, #length] because there is no mapped edge [2019-12-07 17:14:31,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L794-->L794-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1617421882 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out1617421882| |P2Thread1of1ForFork0_#t~ite21_Out1617421882|) .cse0 (= ~a$w_buff0~0_In1617421882 |P2Thread1of1ForFork0_#t~ite20_Out1617421882|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1617421882 256) 0))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In1617421882 256))) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In1617421882 256))) (= 0 (mod ~a$w_buff0_used~0_In1617421882 256))))) (and (= |P2Thread1of1ForFork0_#t~ite20_In1617421882| |P2Thread1of1ForFork0_#t~ite20_Out1617421882|) (not .cse0) (= ~a$w_buff0~0_In1617421882 |P2Thread1of1ForFork0_#t~ite21_Out1617421882|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In1617421882, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1617421882, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1617421882, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1617421882, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1617421882, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1617421882|, ~weak$$choice2~0=~weak$$choice2~0_In1617421882} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1617421882|, ~a$w_buff0~0=~a$w_buff0~0_In1617421882, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1617421882, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1617421882, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1617421882, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1617421882|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1617421882, ~weak$$choice2~0=~weak$$choice2~0_In1617421882} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 17:14:31,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L766-2-->L766-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite10_Out1822191220| |P1Thread1of1ForFork2_#t~ite9_Out1822191220|)) (.cse1 (= (mod ~a$w_buff1_used~0_In1822191220 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd2~0_In1822191220 256) 0))) (or (and .cse0 (= ~a$w_buff1~0_In1822191220 |P1Thread1of1ForFork2_#t~ite9_Out1822191220|) (not .cse1) (not .cse2)) (and .cse0 (= ~a~0_In1822191220 |P1Thread1of1ForFork2_#t~ite9_Out1822191220|) (or .cse1 .cse2)))) InVars {~a~0=~a~0_In1822191220, ~a$w_buff1~0=~a$w_buff1~0_In1822191220, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1822191220, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1822191220} OutVars{~a~0=~a~0_In1822191220, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1822191220|, ~a$w_buff1~0=~a$w_buff1~0_In1822191220, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1822191220, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1822191220|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1822191220} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 17:14:31,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1566783785 256))) (.cse0 (= (mod ~a$r_buff0_thd2~0_In1566783785 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1566783785| ~a$w_buff0_used~0_In1566783785) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1566783785| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1566783785, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1566783785} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1566783785, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1566783785, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1566783785|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:14:31,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L768-->L768-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1372692094 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1372692094 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In1372692094 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1372692094 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1372692094|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In1372692094 |P1Thread1of1ForFork2_#t~ite12_Out1372692094|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1372692094, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1372692094, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1372692094, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1372692094} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1372692094, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1372692094, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1372692094, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1372692094|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1372692094} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:14:31,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In1540550293 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1540550293 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1540550293|)) (and (or .cse1 .cse0) (= ~a$r_buff0_thd2~0_In1540550293 |P1Thread1of1ForFork2_#t~ite13_Out1540550293|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1540550293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1540550293} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1540550293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1540550293, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1540550293|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:14:31,636 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L796-->L796-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2099227300 256)))) (or (and (= ~a$w_buff0_used~0_In-2099227300 |P2Thread1of1ForFork0_#t~ite27_Out-2099227300|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-2099227300| |P2Thread1of1ForFork0_#t~ite26_Out-2099227300|)) (and .cse0 (= ~a$w_buff0_used~0_In-2099227300 |P2Thread1of1ForFork0_#t~ite26_Out-2099227300|) (= |P2Thread1of1ForFork0_#t~ite27_Out-2099227300| |P2Thread1of1ForFork0_#t~ite26_Out-2099227300|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-2099227300 256) 0))) (or (and (= (mod ~a$w_buff1_used~0_In-2099227300 256) 0) .cse1) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-2099227300 256))) (= (mod ~a$w_buff0_used~0_In-2099227300 256) 0)))))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-2099227300|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2099227300, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2099227300, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2099227300, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2099227300, ~weak$$choice2~0=~weak$$choice2~0_In-2099227300} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-2099227300|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-2099227300|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2099227300, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2099227300, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2099227300, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2099227300, ~weak$$choice2~0=~weak$$choice2~0_In-2099227300} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 17:14:31,637 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L798-->L799: Formula: (and (not (= (mod v_~weak$$choice2~0_21 256) 0)) (= v_~a$r_buff0_thd3~0_104 v_~a$r_buff0_thd3~0_103)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_103, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:14:31,638 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L801-->L805: Formula: (and (= v_~a$flush_delayed~0_9 0) (= v_~a~0_54 v_~a$mem_tmp~0_7) (not (= (mod v_~a$flush_delayed~0_10 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_54, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 17:14:31,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L805-2-->L805-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In-1572570503 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1572570503 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-1572570503| ~a$w_buff1~0_In-1572570503) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1572570503| ~a~0_In-1572570503)))) InVars {~a~0=~a~0_In-1572570503, ~a$w_buff1~0=~a$w_buff1~0_In-1572570503, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1572570503, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1572570503} OutVars{~a~0=~a~0_In-1572570503, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1572570503|, ~a$w_buff1~0=~a$w_buff1~0_In-1572570503, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1572570503, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1572570503} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:14:31,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L805-4-->L806: Formula: (= v_~a~0_21 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_21, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:14:31,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L806-->L806-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1632527143 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1632527143 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1632527143| 0)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out1632527143| ~a$w_buff0_used~0_In1632527143) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1632527143, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1632527143} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1632527143|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1632527143, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1632527143} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:14:31,639 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L807-->L807-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In589317413 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In589317413 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In589317413 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In589317413 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out589317413|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~a$w_buff1_used~0_In589317413 |P2Thread1of1ForFork0_#t~ite41_Out589317413|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In589317413, ~a$w_buff0_used~0=~a$w_buff0_used~0_In589317413, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In589317413, ~a$w_buff1_used~0=~a$w_buff1_used~0_In589317413} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In589317413, ~a$w_buff0_used~0=~a$w_buff0_used~0_In589317413, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In589317413, ~a$w_buff1_used~0=~a$w_buff1_used~0_In589317413, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out589317413|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:14:31,640 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1102816513 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1102816513 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1102816513| ~a$r_buff0_thd3~0_In1102816513)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1102816513|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1102816513, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1102816513} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1102816513, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1102816513, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1102816513|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:14:31,640 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In945169287 256))) (.cse1 (= (mod ~a$r_buff1_thd3~0_In945169287 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In945169287 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In945169287 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out945169287|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd3~0_In945169287 |P2Thread1of1ForFork0_#t~ite43_Out945169287|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In945169287, ~a$w_buff0_used~0=~a$w_buff0_used~0_In945169287, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In945169287, ~a$w_buff1_used~0=~a$w_buff1_used~0_In945169287} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out945169287|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In945169287, ~a$w_buff0_used~0=~a$w_buff0_used~0_In945169287, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In945169287, ~a$w_buff1_used~0=~a$w_buff1_used~0_In945169287} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:14:31,640 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L809-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_50 (+ v_~__unbuffered_cnt~0_51 1)) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_125 |v_P2Thread1of1ForFork0_#t~ite43_26|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_25|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:14:31,641 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In21236130 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In21236130 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out21236130|) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In21236130 |P0Thread1of1ForFork1_#t~ite5_Out21236130|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In21236130, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In21236130} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out21236130|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In21236130, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In21236130} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:14:31,641 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd1~0_In-913321069 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-913321069 256))) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-913321069 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-913321069 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-913321069|)) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-913321069 |P0Thread1of1ForFork1_#t~ite6_Out-913321069|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-913321069, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-913321069, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-913321069, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-913321069} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-913321069|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-913321069, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-913321069, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-913321069, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-913321069} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:14:31,641 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L749-->L750: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In926361585 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In926361585 256))) (.cse2 (= ~a$r_buff0_thd1~0_Out926361585 ~a$r_buff0_thd1~0_In926361585))) (or (and (not .cse0) (not .cse1) (= 0 ~a$r_buff0_thd1~0_Out926361585)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In926361585, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In926361585} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out926361585|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In926361585, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out926361585} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:14:31,641 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1660019355 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1660019355 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1660019355 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In1660019355 256)))) (or (and (= ~a$r_buff1_thd1~0_In1660019355 |P0Thread1of1ForFork1_#t~ite8_Out1660019355|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1660019355|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1660019355, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1660019355, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1660019355, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1660019355} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1660019355|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1660019355, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1660019355, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1660019355, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1660019355} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:14:31,642 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= v_~a$r_buff1_thd1~0_97 |v_P0Thread1of1ForFork1_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_35|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_97, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:14:31,642 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In1651619703 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In1651619703 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In1651619703 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1651619703 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1651619703| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out1651619703| ~a$r_buff1_thd2~0_In1651619703)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1651619703, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1651619703, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1651619703, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1651619703} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1651619703, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1651619703, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1651619703, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1651619703, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1651619703|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:14:31,642 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_74) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_74, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:14:31,643 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L836-->L838-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~a$r_buff0_thd0~0_58 256)) (= (mod v_~a$w_buff0_used~0_319 256) 0))) InVars {~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:14:31,643 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L838-2-->L838-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In281471796 256))) (.cse1 (= (mod ~a$r_buff1_thd0~0_In281471796 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out281471796| ~a~0_In281471796) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite47_Out281471796| ~a$w_buff1~0_In281471796) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In281471796, ~a$w_buff1~0=~a$w_buff1~0_In281471796, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In281471796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In281471796} OutVars{~a~0=~a~0_In281471796, ~a$w_buff1~0=~a$w_buff1~0_In281471796, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out281471796|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In281471796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In281471796} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 17:14:31,643 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L838-4-->L839: Formula: (= v_~a~0_33 |v_ULTIMATE.start_main_#t~ite47_7|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|} OutVars{~a~0=v_~a~0_33, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:14:31,643 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L839-->L839-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-647140950 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-647140950 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-647140950| ~a$w_buff0_used~0_In-647140950)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-647140950| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-647140950, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-647140950} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-647140950, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-647140950|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-647140950} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:14:31,643 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L840-->L840-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In-1320061449 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1320061449 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-1320061449 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1320061449 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite50_Out-1320061449| ~a$w_buff1_used~0_In-1320061449) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite50_Out-1320061449| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1320061449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1320061449, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1320061449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1320061449} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1320061449|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1320061449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1320061449, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1320061449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1320061449} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:14:31,644 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In1007074940 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1007074940 256) 0))) (or (and (= ~a$r_buff0_thd0~0_In1007074940 |ULTIMATE.start_main_#t~ite51_Out1007074940|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out1007074940|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1007074940, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1007074940} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1007074940|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1007074940, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1007074940} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:14:31,644 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L842-->L842-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In1091333495 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In1091333495 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1091333495 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1091333495 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1091333495|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~a$r_buff1_thd0~0_In1091333495 |ULTIMATE.start_main_#t~ite52_Out1091333495|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1091333495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1091333495, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1091333495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1091333495} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1091333495|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1091333495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1091333495, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1091333495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1091333495} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:14:31,644 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L842-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9| (mod v_~main$tmp_guard1~0_16 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_25 0) (= v_~y~0_24 2) (= v_~x~0_88 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_16) (= v_~a$r_buff1_thd0~0_114 |v_ULTIMATE.start_main_#t~ite52_42|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_41|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_13, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_114, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:14:31,697 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:14:31 BasicIcfg [2019-12-07 17:14:31,697 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:14:31,698 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:14:31,698 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:14:31,698 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:14:31,698 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:11:23" (3/4) ... [2019-12-07 17:14:31,700 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:14:31,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] ULTIMATE.startENTRY-->L828: Formula: (let ((.cse0 (store |v_#valid_76| 0 0))) (and (= v_~a$r_buff1_thd0~0_168 0) (= 0 v_~__unbuffered_p2_EAX~0_43) (= 0 |v_ULTIMATE.start_main_~#t1193~0.offset_25|) (= v_~__unbuffered_p2_EBX~0_46 0) (= |v_#NULL.offset_7| 0) (= 0 v_~a$w_buff1_used~0_387) (= (store .cse0 |v_ULTIMATE.start_main_~#t1193~0.base_37| 1) |v_#valid_74|) (= v_~a$w_buff0~0_207 0) (= 0 v_~weak$$choice0~0_17) (= v_~a$mem_tmp~0_18 0) (< 0 |v_#StackHeapBarrier_17|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1193~0.base_37| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1193~0.base_37|) |v_ULTIMATE.start_main_~#t1193~0.offset_25| 0)) |v_#memory_int_21|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1193~0.base_37|) (= 0 v_~a$r_buff0_thd2~0_167) (= 0 v_~a$r_buff1_thd1~0_155) (= v_~y~0_56 0) (= 0 v_~a$r_buff0_thd1~0_253) (= v_~a$r_buff0_thd0~0_180 0) (= 0 v_~a$w_buff1~0_155) (= v_~main$tmp_guard0~0_36 0) (= v_~a~0_177 0) (= v_~a$flush_delayed~0_31 0) (= v_~a$r_buff0_thd3~0_361 0) (= 0 |v_#NULL.base_7|) (= 0 v_~x~0_140) (= 0 v_~a$w_buff0_used~0_714) (= v_~z~0_17 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1193~0.base_37| 4)) (= 0 v_~a$r_buff1_thd2~0_176) (= (select .cse0 |v_ULTIMATE.start_main_~#t1193~0.base_37|) 0) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= v_~a$r_buff1_thd3~0_273 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~weak$$choice2~0_104 0) (= v_~__unbuffered_cnt~0_126 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_76|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_176, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_266|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_180, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_42|, ~a~0=v_~a~0_177, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, ULTIMATE.start_main_~#t1194~0.base=|v_ULTIMATE.start_main_~#t1194~0.base_37|, ULTIMATE.start_main_~#t1195~0.offset=|v_ULTIMATE.start_main_~#t1195~0.offset_15|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_43, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_46, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_273, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_714, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_253, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1194~0.offset=|v_ULTIMATE.start_main_~#t1194~0.offset_24|, ~a$w_buff0~0=v_~a$w_buff0~0_207, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_168, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126, ULTIMATE.start_main_~#t1193~0.base=|v_ULTIMATE.start_main_~#t1193~0.base_37|, ~x~0=v_~x~0_140, ~a$read_delayed~0=v_~a$read_delayed~0_6, ULTIMATE.start_main_~#t1193~0.offset=|v_ULTIMATE.start_main_~#t1193~0.offset_25|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_41|, ~a$mem_tmp~0=v_~a$mem_tmp~0_18, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_40|, ~a$w_buff1~0=v_~a$w_buff1~0_155, ~y~0=v_~y~0_56, ULTIMATE.start_main_~#t1195~0.base=|v_ULTIMATE.start_main_~#t1195~0.base_18|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_15|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_155, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_361, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_36, #NULL.base=|v_#NULL.base_7|, ~a$flush_delayed~0=v_~a$flush_delayed~0_31, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_17, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_387, ~weak$$choice2~0=v_~weak$$choice2~0_104, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t1194~0.base, ULTIMATE.start_main_~#t1195~0.offset, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1194~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1193~0.base, ~x~0, ~a$read_delayed~0, ULTIMATE.start_main_~#t1193~0.offset, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t1195~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 17:14:31,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L828-1-->L830: Formula: (and (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1194~0.base_9| 1)) (= 0 |v_ULTIMATE.start_main_~#t1194~0.offset_8|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1194~0.base_9| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1194~0.base_9| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1194~0.base_9|) |v_ULTIMATE.start_main_~#t1194~0.offset_8| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1194~0.base_9| 0)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1194~0.base_9|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1194~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1194~0.offset=|v_ULTIMATE.start_main_~#t1194~0.offset_8|, ULTIMATE.start_main_~#t1194~0.base=|v_ULTIMATE.start_main_~#t1194~0.base_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1194~0.offset, ULTIMATE.start_main_~#t1194~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:14:31,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L4-->L746: Formula: (and (= ~a$r_buff0_thd0~0_In-1473440477 ~a$r_buff1_thd0~0_Out-1473440477) (= ~a$r_buff1_thd2~0_Out-1473440477 ~a$r_buff0_thd2~0_In-1473440477) (= 1 ~x~0_Out-1473440477) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1473440477)) (= 1 ~a$r_buff0_thd1~0_Out-1473440477) (= ~a$r_buff1_thd3~0_Out-1473440477 ~a$r_buff0_thd3~0_In-1473440477) (= ~a$r_buff0_thd1~0_In-1473440477 ~a$r_buff1_thd1~0_Out-1473440477)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1473440477, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1473440477, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1473440477, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1473440477, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1473440477} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-1473440477, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-1473440477, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-1473440477, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1473440477, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-1473440477, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1473440477, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1473440477, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1473440477, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1473440477, ~x~0=~x~0_Out-1473440477} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:14:31,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L830-1-->L832: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1195~0.offset_10|) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1195~0.base_12| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1195~0.base_12| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1195~0.base_12|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1195~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1195~0.base_12|) |v_ULTIMATE.start_main_~#t1195~0.offset_10| 2)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t1195~0.base_12| 0)) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1195~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1195~0.base=|v_ULTIMATE.start_main_~#t1195~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1195~0.offset=|v_ULTIMATE.start_main_~#t1195~0.offset_10|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1195~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1195~0.offset, #length] because there is no mapped edge [2019-12-07 17:14:31,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L794-->L794-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1617421882 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out1617421882| |P2Thread1of1ForFork0_#t~ite21_Out1617421882|) .cse0 (= ~a$w_buff0~0_In1617421882 |P2Thread1of1ForFork0_#t~ite20_Out1617421882|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1617421882 256) 0))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In1617421882 256))) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In1617421882 256))) (= 0 (mod ~a$w_buff0_used~0_In1617421882 256))))) (and (= |P2Thread1of1ForFork0_#t~ite20_In1617421882| |P2Thread1of1ForFork0_#t~ite20_Out1617421882|) (not .cse0) (= ~a$w_buff0~0_In1617421882 |P2Thread1of1ForFork0_#t~ite21_Out1617421882|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In1617421882, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1617421882, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1617421882, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1617421882, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1617421882, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1617421882|, ~weak$$choice2~0=~weak$$choice2~0_In1617421882} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1617421882|, ~a$w_buff0~0=~a$w_buff0~0_In1617421882, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1617421882, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1617421882, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1617421882, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1617421882|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1617421882, ~weak$$choice2~0=~weak$$choice2~0_In1617421882} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 17:14:31,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L766-2-->L766-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite10_Out1822191220| |P1Thread1of1ForFork2_#t~ite9_Out1822191220|)) (.cse1 (= (mod ~a$w_buff1_used~0_In1822191220 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd2~0_In1822191220 256) 0))) (or (and .cse0 (= ~a$w_buff1~0_In1822191220 |P1Thread1of1ForFork2_#t~ite9_Out1822191220|) (not .cse1) (not .cse2)) (and .cse0 (= ~a~0_In1822191220 |P1Thread1of1ForFork2_#t~ite9_Out1822191220|) (or .cse1 .cse2)))) InVars {~a~0=~a~0_In1822191220, ~a$w_buff1~0=~a$w_buff1~0_In1822191220, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1822191220, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1822191220} OutVars{~a~0=~a~0_In1822191220, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1822191220|, ~a$w_buff1~0=~a$w_buff1~0_In1822191220, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1822191220, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1822191220|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1822191220} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 17:14:31,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1566783785 256))) (.cse0 (= (mod ~a$r_buff0_thd2~0_In1566783785 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1566783785| ~a$w_buff0_used~0_In1566783785) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1566783785| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1566783785, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1566783785} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1566783785, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1566783785, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1566783785|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:14:31,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L768-->L768-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1372692094 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1372692094 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In1372692094 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1372692094 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1372692094|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In1372692094 |P1Thread1of1ForFork2_#t~ite12_Out1372692094|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1372692094, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1372692094, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1372692094, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1372692094} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1372692094, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1372692094, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1372692094, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1372692094|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1372692094} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:14:31,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In1540550293 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1540550293 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1540550293|)) (and (or .cse1 .cse0) (= ~a$r_buff0_thd2~0_In1540550293 |P1Thread1of1ForFork2_#t~ite13_Out1540550293|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1540550293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1540550293} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1540550293, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1540550293, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1540550293|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:14:31,706 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L796-->L796-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2099227300 256)))) (or (and (= ~a$w_buff0_used~0_In-2099227300 |P2Thread1of1ForFork0_#t~ite27_Out-2099227300|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-2099227300| |P2Thread1of1ForFork0_#t~ite26_Out-2099227300|)) (and .cse0 (= ~a$w_buff0_used~0_In-2099227300 |P2Thread1of1ForFork0_#t~ite26_Out-2099227300|) (= |P2Thread1of1ForFork0_#t~ite27_Out-2099227300| |P2Thread1of1ForFork0_#t~ite26_Out-2099227300|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-2099227300 256) 0))) (or (and (= (mod ~a$w_buff1_used~0_In-2099227300 256) 0) .cse1) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-2099227300 256))) (= (mod ~a$w_buff0_used~0_In-2099227300 256) 0)))))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-2099227300|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2099227300, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2099227300, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2099227300, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2099227300, ~weak$$choice2~0=~weak$$choice2~0_In-2099227300} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-2099227300|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-2099227300|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2099227300, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2099227300, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2099227300, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2099227300, ~weak$$choice2~0=~weak$$choice2~0_In-2099227300} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 17:14:31,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L798-->L799: Formula: (and (not (= (mod v_~weak$$choice2~0_21 256) 0)) (= v_~a$r_buff0_thd3~0_104 v_~a$r_buff0_thd3~0_103)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_103, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:14:31,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L801-->L805: Formula: (and (= v_~a$flush_delayed~0_9 0) (= v_~a~0_54 v_~a$mem_tmp~0_7) (not (= (mod v_~a$flush_delayed~0_10 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_54, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 17:14:31,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L805-2-->L805-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In-1572570503 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1572570503 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-1572570503| ~a$w_buff1~0_In-1572570503) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1572570503| ~a~0_In-1572570503)))) InVars {~a~0=~a~0_In-1572570503, ~a$w_buff1~0=~a$w_buff1~0_In-1572570503, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1572570503, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1572570503} OutVars{~a~0=~a~0_In-1572570503, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1572570503|, ~a$w_buff1~0=~a$w_buff1~0_In-1572570503, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1572570503, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1572570503} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:14:31,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L805-4-->L806: Formula: (= v_~a~0_21 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_21, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:14:31,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L806-->L806-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1632527143 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1632527143 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1632527143| 0)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out1632527143| ~a$w_buff0_used~0_In1632527143) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1632527143, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1632527143} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1632527143|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1632527143, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1632527143} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:14:31,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L807-->L807-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In589317413 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In589317413 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In589317413 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In589317413 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out589317413|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~a$w_buff1_used~0_In589317413 |P2Thread1of1ForFork0_#t~ite41_Out589317413|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In589317413, ~a$w_buff0_used~0=~a$w_buff0_used~0_In589317413, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In589317413, ~a$w_buff1_used~0=~a$w_buff1_used~0_In589317413} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In589317413, ~a$w_buff0_used~0=~a$w_buff0_used~0_In589317413, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In589317413, ~a$w_buff1_used~0=~a$w_buff1_used~0_In589317413, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out589317413|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:14:31,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1102816513 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1102816513 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1102816513| ~a$r_buff0_thd3~0_In1102816513)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1102816513|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1102816513, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1102816513} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1102816513, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1102816513, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1102816513|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:14:31,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In945169287 256))) (.cse1 (= (mod ~a$r_buff1_thd3~0_In945169287 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In945169287 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In945169287 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out945169287|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd3~0_In945169287 |P2Thread1of1ForFork0_#t~ite43_Out945169287|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In945169287, ~a$w_buff0_used~0=~a$w_buff0_used~0_In945169287, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In945169287, ~a$w_buff1_used~0=~a$w_buff1_used~0_In945169287} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out945169287|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In945169287, ~a$w_buff0_used~0=~a$w_buff0_used~0_In945169287, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In945169287, ~a$w_buff1_used~0=~a$w_buff1_used~0_In945169287} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:14:31,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L809-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_50 (+ v_~__unbuffered_cnt~0_51 1)) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_125 |v_P2Thread1of1ForFork0_#t~ite43_26|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_25|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:14:31,710 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In21236130 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In21236130 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out21236130|) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In21236130 |P0Thread1of1ForFork1_#t~ite5_Out21236130|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In21236130, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In21236130} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out21236130|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In21236130, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In21236130} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:14:31,710 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd1~0_In-913321069 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-913321069 256))) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-913321069 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-913321069 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-913321069|)) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-913321069 |P0Thread1of1ForFork1_#t~ite6_Out-913321069|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-913321069, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-913321069, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-913321069, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-913321069} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-913321069|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-913321069, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-913321069, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-913321069, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-913321069} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:14:31,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L749-->L750: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In926361585 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In926361585 256))) (.cse2 (= ~a$r_buff0_thd1~0_Out926361585 ~a$r_buff0_thd1~0_In926361585))) (or (and (not .cse0) (not .cse1) (= 0 ~a$r_buff0_thd1~0_Out926361585)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In926361585, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In926361585} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out926361585|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In926361585, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out926361585} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:14:31,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1660019355 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1660019355 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1660019355 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In1660019355 256)))) (or (and (= ~a$r_buff1_thd1~0_In1660019355 |P0Thread1of1ForFork1_#t~ite8_Out1660019355|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1660019355|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1660019355, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1660019355, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1660019355, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1660019355} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1660019355|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1660019355, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1660019355, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1660019355, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1660019355} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:14:31,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= v_~a$r_buff1_thd1~0_97 |v_P0Thread1of1ForFork1_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_35|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_97, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:14:31,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In1651619703 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In1651619703 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In1651619703 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1651619703 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1651619703| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out1651619703| ~a$r_buff1_thd2~0_In1651619703)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1651619703, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1651619703, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1651619703, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1651619703} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1651619703, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1651619703, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1651619703, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1651619703, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1651619703|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:14:31,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_74) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_74, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:14:31,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L836-->L838-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~a$r_buff0_thd0~0_58 256)) (= (mod v_~a$w_buff0_used~0_319 256) 0))) InVars {~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:14:31,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L838-2-->L838-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In281471796 256))) (.cse1 (= (mod ~a$r_buff1_thd0~0_In281471796 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out281471796| ~a~0_In281471796) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite47_Out281471796| ~a$w_buff1~0_In281471796) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In281471796, ~a$w_buff1~0=~a$w_buff1~0_In281471796, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In281471796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In281471796} OutVars{~a~0=~a~0_In281471796, ~a$w_buff1~0=~a$w_buff1~0_In281471796, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out281471796|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In281471796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In281471796} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 17:14:31,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L838-4-->L839: Formula: (= v_~a~0_33 |v_ULTIMATE.start_main_#t~ite47_7|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|} OutVars{~a~0=v_~a~0_33, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:14:31,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L839-->L839-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-647140950 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-647140950 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-647140950| ~a$w_buff0_used~0_In-647140950)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-647140950| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-647140950, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-647140950} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-647140950, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-647140950|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-647140950} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:14:31,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L840-->L840-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In-1320061449 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1320061449 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-1320061449 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1320061449 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite50_Out-1320061449| ~a$w_buff1_used~0_In-1320061449) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite50_Out-1320061449| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1320061449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1320061449, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1320061449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1320061449} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1320061449|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1320061449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1320061449, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1320061449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1320061449} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:14:31,713 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In1007074940 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1007074940 256) 0))) (or (and (= ~a$r_buff0_thd0~0_In1007074940 |ULTIMATE.start_main_#t~ite51_Out1007074940|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out1007074940|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1007074940, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1007074940} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1007074940|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1007074940, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1007074940} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:14:31,713 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L842-->L842-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In1091333495 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In1091333495 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1091333495 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1091333495 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1091333495|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~a$r_buff1_thd0~0_In1091333495 |ULTIMATE.start_main_#t~ite52_Out1091333495|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1091333495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1091333495, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1091333495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1091333495} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1091333495|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1091333495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1091333495, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1091333495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1091333495} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:14:31,713 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L842-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9| (mod v_~main$tmp_guard1~0_16 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_25 0) (= v_~y~0_24 2) (= v_~x~0_88 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_16) (= v_~a$r_buff1_thd0~0_114 |v_ULTIMATE.start_main_#t~ite52_42|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_41|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_13, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_114, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:14:31,763 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_853575f7-2f52-4884-bafa-37b16b0ed97a/bin/uautomizer/witness.graphml [2019-12-07 17:14:31,763 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:14:31,764 INFO L168 Benchmark]: Toolchain (without parser) took 189407.62 ms. Allocated memory was 1.0 GB in the beginning and 8.9 GB in the end (delta: 7.9 GB). Free memory was 940.9 MB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 17:14:31,764 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:14:31,765 INFO L168 Benchmark]: CACSL2BoogieTranslator took 420.55 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.8 MB). Free memory was 940.9 MB in the beginning and 1.1 GB in the end (delta: -129.4 MB). Peak memory consumption was 19.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:14:31,765 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.95 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:14:31,765 INFO L168 Benchmark]: Boogie Preprocessor took 25.64 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:14:31,765 INFO L168 Benchmark]: RCFGBuilder took 408.43 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:14:31,766 INFO L168 Benchmark]: TraceAbstraction took 188447.68 ms. Allocated memory was 1.1 GB in the beginning and 8.9 GB in the end (delta: 7.8 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 17:14:31,766 INFO L168 Benchmark]: Witness Printer took 65.37 ms. Allocated memory is still 8.9 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 41.5 MB). Peak memory consumption was 41.5 MB. Max. memory is 11.5 GB. [2019-12-07 17:14:31,767 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 420.55 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.8 MB). Free memory was 940.9 MB in the beginning and 1.1 GB in the end (delta: -129.4 MB). Peak memory consumption was 19.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.95 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.64 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 408.43 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 188447.68 ms. Allocated memory was 1.1 GB in the beginning and 8.9 GB in the end (delta: 7.8 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. * Witness Printer took 65.37 ms. Allocated memory is still 8.9 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 41.5 MB). Peak memory consumption was 41.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 176 ProgramPointsBefore, 94 ProgramPointsAfterwards, 213 TransitionsBefore, 104 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 33 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 31 ChoiceCompositions, 7291 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 34 SemBasedMoverChecksPositive, 267 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 81673 CheckedPairsTotal, 115 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L828] FCALL, FORK 0 pthread_create(&t1193, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L731] 1 a$w_buff1 = a$w_buff0 [L732] 1 a$w_buff0 = 1 [L733] 1 a$w_buff1_used = a$w_buff0_used [L734] 1 a$w_buff0_used = (_Bool)1 [L746] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L830] FCALL, FORK 0 pthread_create(&t1194, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L760] 2 x = 2 [L763] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L766] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L832] FCALL, FORK 0 pthread_create(&t1195, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L780] 3 y = 2 [L783] 3 z = 1 [L786] 3 __unbuffered_p2_EAX = z [L789] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L790] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L791] 3 a$flush_delayed = weak$$choice2 [L792] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L793] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L793] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L766] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L767] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L768] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L794] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L795] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=2, y=2, z=1] [L795] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L796] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L797] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=1] [L797] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L799] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=1] [L799] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L800] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L805] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L806] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L807] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L808] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L746] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L747] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L748] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L769] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L834] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L839] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L840] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L841] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 188.2s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 67.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8916 SDtfs, 12778 SDslu, 35881 SDs, 0 SdLazy, 38561 SolverSat, 932 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 29.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 770 GetRequests, 36 SyntacticMatches, 28 SemanticMatches, 706 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14521 ImplicationChecksByTransitivity, 11.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=330201occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 97.6s AutomataMinimizationTime, 29 MinimizatonAttempts, 516804 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.9s InterpolantComputationTime, 1375 NumberOfCodeBlocks, 1375 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 1279 ConstructedInterpolants, 0 QuantifiedInterpolants, 500964 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...