./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix045_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix045_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e1d857642f99b1ed062d29c4155124a1508adbda ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:47:38,566 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:47:38,567 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:47:38,574 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:47:38,575 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:47:38,575 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:47:38,576 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:47:38,578 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:47:38,579 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:47:38,579 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:47:38,580 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:47:38,581 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:47:38,581 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:47:38,582 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:47:38,582 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:47:38,583 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:47:38,584 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:47:38,584 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:47:38,586 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:47:38,587 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:47:38,588 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:47:38,589 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:47:38,589 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:47:38,590 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:47:38,592 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:47:38,592 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:47:38,592 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:47:38,592 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:47:38,593 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:47:38,593 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:47:38,593 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:47:38,594 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:47:38,594 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:47:38,595 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:47:38,595 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:47:38,595 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:47:38,596 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:47:38,596 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:47:38,596 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:47:38,596 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:47:38,597 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:47:38,597 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:47:38,607 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:47:38,607 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:47:38,608 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:47:38,608 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:47:38,608 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:47:38,608 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:47:38,608 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:47:38,608 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:47:38,609 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:47:38,609 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:47:38,609 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:47:38,609 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:47:38,609 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:47:38,609 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:47:38,609 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:47:38,609 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:47:38,610 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:47:38,610 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:47:38,610 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:47:38,610 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:47:38,610 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:47:38,610 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:47:38,610 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:47:38,611 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:47:38,611 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:47:38,611 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:47:38,611 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:47:38,611 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:47:38,611 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:47:38,611 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e1d857642f99b1ed062d29c4155124a1508adbda [2019-12-07 17:47:38,710 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:47:38,721 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:47:38,723 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:47:38,725 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:47:38,725 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:47:38,726 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix045_pso.oepc.i [2019-12-07 17:47:38,767 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/data/a652ab483/5d082e6934654a06955114683fcc0a54/FLAGae87dc203 [2019-12-07 17:47:39,202 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:47:39,203 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/sv-benchmarks/c/pthread-wmm/mix045_pso.oepc.i [2019-12-07 17:47:39,213 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/data/a652ab483/5d082e6934654a06955114683fcc0a54/FLAGae87dc203 [2019-12-07 17:47:39,575 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/data/a652ab483/5d082e6934654a06955114683fcc0a54 [2019-12-07 17:47:39,581 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:47:39,583 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:47:39,584 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:47:39,584 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:47:39,588 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:47:39,589 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:47:39" (1/1) ... [2019-12-07 17:47:39,592 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7030ab51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39, skipping insertion in model container [2019-12-07 17:47:39,592 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:47:39" (1/1) ... [2019-12-07 17:47:39,599 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:47:39,634 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:47:39,874 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:47:39,882 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:47:39,922 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:47:39,969 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:47:39,969 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39 WrapperNode [2019-12-07 17:47:39,969 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:47:39,969 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:47:39,970 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:47:39,970 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:47:39,975 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39" (1/1) ... [2019-12-07 17:47:39,989 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39" (1/1) ... [2019-12-07 17:47:40,006 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:47:40,007 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:47:40,007 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:47:40,007 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:47:40,013 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39" (1/1) ... [2019-12-07 17:47:40,013 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39" (1/1) ... [2019-12-07 17:47:40,016 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39" (1/1) ... [2019-12-07 17:47:40,016 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39" (1/1) ... [2019-12-07 17:47:40,024 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39" (1/1) ... [2019-12-07 17:47:40,027 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39" (1/1) ... [2019-12-07 17:47:40,029 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39" (1/1) ... [2019-12-07 17:47:40,032 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:47:40,033 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:47:40,033 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:47:40,033 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:47:40,033 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:47:40,074 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:47:40,074 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:47:40,074 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:47:40,074 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:47:40,075 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:47:40,075 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:47:40,075 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:47:40,075 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:47:40,075 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:47:40,075 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:47:40,075 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:47:40,075 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:47:40,076 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:47:40,077 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:47:40,436 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:47:40,436 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:47:40,437 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:47:40 BoogieIcfgContainer [2019-12-07 17:47:40,438 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:47:40,439 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:47:40,439 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:47:40,441 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:47:40,441 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:47:39" (1/3) ... [2019-12-07 17:47:40,442 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@23f0a1ef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:47:40, skipping insertion in model container [2019-12-07 17:47:40,442 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:47:39" (2/3) ... [2019-12-07 17:47:40,443 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@23f0a1ef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:47:40, skipping insertion in model container [2019-12-07 17:47:40,443 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:47:40" (3/3) ... [2019-12-07 17:47:40,444 INFO L109 eAbstractionObserver]: Analyzing ICFG mix045_pso.oepc.i [2019-12-07 17:47:40,452 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:47:40,453 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:47:40,459 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:47:40,460 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:47:40,492 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,492 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,492 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,492 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,492 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,493 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,493 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,496 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,496 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,496 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,496 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,496 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,497 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,497 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,497 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,497 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,497 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,497 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,498 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,498 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,498 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,498 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,499 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,499 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,499 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,499 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,499 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,499 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,502 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,502 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,502 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,502 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,502 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,502 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,503 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,503 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,503 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,503 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,503 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,504 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,504 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,504 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,505 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,505 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,505 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,505 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,505 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,505 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,506 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,506 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,506 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,506 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,506 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,506 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,507 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,507 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,507 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,507 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,507 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,507 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,507 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,508 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,508 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,508 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,508 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,508 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,509 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,509 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,509 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,509 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,509 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,509 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,509 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,510 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,510 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,510 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,510 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,510 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,511 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,511 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,511 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,511 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,511 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,511 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,511 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,512 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,512 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,512 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,512 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,512 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,512 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,513 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,513 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,513 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,513 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,513 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,513 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,513 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:47:40,535 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:47:40,547 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:47:40,547 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:47:40,547 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:47:40,547 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:47:40,547 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:47:40,547 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:47:40,548 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:47:40,548 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:47:40,558 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 17:47:40,559 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 17:47:40,630 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 17:47:40,630 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:47:40,641 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 709 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:47:40,657 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 17:47:40,688 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 17:47:40,688 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:47:40,693 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 709 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:47:40,709 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 17:47:40,710 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:47:43,567 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 17:47:43,722 WARN L192 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 17:47:43,838 INFO L206 etLargeBlockEncoding]: Checked pairs total: 81673 [2019-12-07 17:47:43,838 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2019-12-07 17:47:43,841 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 104 transitions [2019-12-07 17:47:59,407 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 117422 states. [2019-12-07 17:47:59,408 INFO L276 IsEmpty]: Start isEmpty. Operand 117422 states. [2019-12-07 17:47:59,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 17:47:59,412 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:47:59,412 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 17:47:59,413 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:47:59,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:47:59,416 INFO L82 PathProgramCache]: Analyzing trace with hash 914906, now seen corresponding path program 1 times [2019-12-07 17:47:59,421 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:47:59,422 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998662095] [2019-12-07 17:47:59,422 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:47:59,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:47:59,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:47:59,548 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998662095] [2019-12-07 17:47:59,548 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:47:59,548 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:47:59,549 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [804516797] [2019-12-07 17:47:59,552 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:47:59,552 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:47:59,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:47:59,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:47:59,562 INFO L87 Difference]: Start difference. First operand 117422 states. Second operand 3 states. [2019-12-07 17:48:00,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:00,374 INFO L93 Difference]: Finished difference Result 116592 states and 500276 transitions. [2019-12-07 17:48:00,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:00,375 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 17:48:00,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:00,841 INFO L225 Difference]: With dead ends: 116592 [2019-12-07 17:48:00,842 INFO L226 Difference]: Without dead ends: 109832 [2019-12-07 17:48:00,842 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:05,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109832 states. [2019-12-07 17:48:08,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109832 to 109832. [2019-12-07 17:48:08,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109832 states. [2019-12-07 17:48:08,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109832 states to 109832 states and 470688 transitions. [2019-12-07 17:48:08,771 INFO L78 Accepts]: Start accepts. Automaton has 109832 states and 470688 transitions. Word has length 3 [2019-12-07 17:48:08,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:08,771 INFO L462 AbstractCegarLoop]: Abstraction has 109832 states and 470688 transitions. [2019-12-07 17:48:08,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:48:08,771 INFO L276 IsEmpty]: Start isEmpty. Operand 109832 states and 470688 transitions. [2019-12-07 17:48:08,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:48:08,774 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:08,774 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:08,775 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:08,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:08,775 INFO L82 PathProgramCache]: Analyzing trace with hash -406604938, now seen corresponding path program 1 times [2019-12-07 17:48:08,775 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:08,775 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094014759] [2019-12-07 17:48:08,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:08,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:08,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:08,833 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2094014759] [2019-12-07 17:48:08,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:08,834 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:48:08,834 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1420541507] [2019-12-07 17:48:08,835 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:08,835 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:08,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:08,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:08,835 INFO L87 Difference]: Start difference. First operand 109832 states and 470688 transitions. Second operand 4 states. [2019-12-07 17:48:09,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:09,755 INFO L93 Difference]: Finished difference Result 175346 states and 720050 transitions. [2019-12-07 17:48:09,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:48:09,756 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:48:09,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:10,238 INFO L225 Difference]: With dead ends: 175346 [2019-12-07 17:48:10,238 INFO L226 Difference]: Without dead ends: 175297 [2019-12-07 17:48:10,238 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:16,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175297 states. [2019-12-07 17:48:19,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175297 to 159417. [2019-12-07 17:48:19,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159417 states. [2019-12-07 17:48:20,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159417 states to 159417 states and 663570 transitions. [2019-12-07 17:48:20,337 INFO L78 Accepts]: Start accepts. Automaton has 159417 states and 663570 transitions. Word has length 11 [2019-12-07 17:48:20,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:20,337 INFO L462 AbstractCegarLoop]: Abstraction has 159417 states and 663570 transitions. [2019-12-07 17:48:20,337 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:20,337 INFO L276 IsEmpty]: Start isEmpty. Operand 159417 states and 663570 transitions. [2019-12-07 17:48:20,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:48:20,345 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:20,345 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:20,346 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:20,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:20,346 INFO L82 PathProgramCache]: Analyzing trace with hash 901712968, now seen corresponding path program 1 times [2019-12-07 17:48:20,346 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:20,346 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786885575] [2019-12-07 17:48:20,346 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:20,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:20,402 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:20,402 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786885575] [2019-12-07 17:48:20,402 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:20,402 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:48:20,402 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259804247] [2019-12-07 17:48:20,402 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:48:20,402 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:20,403 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:48:20,403 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:48:20,403 INFO L87 Difference]: Start difference. First operand 159417 states and 663570 transitions. Second operand 4 states. [2019-12-07 17:48:21,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:21,810 INFO L93 Difference]: Finished difference Result 224613 states and 913627 transitions. [2019-12-07 17:48:21,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:48:21,811 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:48:21,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:22,386 INFO L225 Difference]: With dead ends: 224613 [2019-12-07 17:48:22,386 INFO L226 Difference]: Without dead ends: 224557 [2019-12-07 17:48:22,386 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:28,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224557 states. [2019-12-07 17:48:34,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224557 to 189220. [2019-12-07 17:48:34,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189220 states. [2019-12-07 17:48:34,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189220 states to 189220 states and 783364 transitions. [2019-12-07 17:48:34,571 INFO L78 Accepts]: Start accepts. Automaton has 189220 states and 783364 transitions. Word has length 13 [2019-12-07 17:48:34,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:34,572 INFO L462 AbstractCegarLoop]: Abstraction has 189220 states and 783364 transitions. [2019-12-07 17:48:34,572 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:48:34,572 INFO L276 IsEmpty]: Start isEmpty. Operand 189220 states and 783364 transitions. [2019-12-07 17:48:34,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:48:34,579 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:34,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:34,579 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:34,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:34,579 INFO L82 PathProgramCache]: Analyzing trace with hash -100341528, now seen corresponding path program 1 times [2019-12-07 17:48:34,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:34,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1795062184] [2019-12-07 17:48:34,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:34,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:34,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:34,631 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1795062184] [2019-12-07 17:48:34,631 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:34,631 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:48:34,631 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1643341347] [2019-12-07 17:48:34,631 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:48:34,632 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:34,632 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:48:34,632 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:48:34,632 INFO L87 Difference]: Start difference. First operand 189220 states and 783364 transitions. Second operand 5 states. [2019-12-07 17:48:35,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:35,882 INFO L93 Difference]: Finished difference Result 258403 states and 1058469 transitions. [2019-12-07 17:48:35,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:48:35,883 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 17:48:35,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:36,550 INFO L225 Difference]: With dead ends: 258403 [2019-12-07 17:48:36,550 INFO L226 Difference]: Without dead ends: 258403 [2019-12-07 17:48:36,551 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:48:43,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 258403 states. [2019-12-07 17:48:46,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 258403 to 213814. [2019-12-07 17:48:46,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213814 states. [2019-12-07 17:48:47,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213814 states to 213814 states and 884433 transitions. [2019-12-07 17:48:47,826 INFO L78 Accepts]: Start accepts. Automaton has 213814 states and 884433 transitions. Word has length 16 [2019-12-07 17:48:47,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:48:47,827 INFO L462 AbstractCegarLoop]: Abstraction has 213814 states and 884433 transitions. [2019-12-07 17:48:47,827 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:48:47,827 INFO L276 IsEmpty]: Start isEmpty. Operand 213814 states and 884433 transitions. [2019-12-07 17:48:47,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:48:47,839 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:48:47,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:48:47,839 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:48:47,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:48:47,840 INFO L82 PathProgramCache]: Analyzing trace with hash 1671186354, now seen corresponding path program 1 times [2019-12-07 17:48:47,840 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:48:47,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449478332] [2019-12-07 17:48:47,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:48:47,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:48:47,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:48:47,880 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449478332] [2019-12-07 17:48:47,880 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:48:47,880 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:48:47,880 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [354968123] [2019-12-07 17:48:47,880 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:48:47,881 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:48:47,881 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:48:47,881 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:47,881 INFO L87 Difference]: Start difference. First operand 213814 states and 884433 transitions. Second operand 3 states. [2019-12-07 17:48:48,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:48:48,725 INFO L93 Difference]: Finished difference Result 201531 states and 824912 transitions. [2019-12-07 17:48:48,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:48:48,726 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:48:48,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:48:49,267 INFO L225 Difference]: With dead ends: 201531 [2019-12-07 17:48:49,267 INFO L226 Difference]: Without dead ends: 201531 [2019-12-07 17:48:49,267 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:48:57,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201531 states. [2019-12-07 17:48:59,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201531 to 198405. [2019-12-07 17:48:59,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198405 states. [2019-12-07 17:49:00,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198405 states to 198405 states and 813330 transitions. [2019-12-07 17:49:00,270 INFO L78 Accepts]: Start accepts. Automaton has 198405 states and 813330 transitions. Word has length 18 [2019-12-07 17:49:00,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:00,270 INFO L462 AbstractCegarLoop]: Abstraction has 198405 states and 813330 transitions. [2019-12-07 17:49:00,270 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:00,270 INFO L276 IsEmpty]: Start isEmpty. Operand 198405 states and 813330 transitions. [2019-12-07 17:49:00,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:49:00,280 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:00,280 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:00,280 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:00,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:00,281 INFO L82 PathProgramCache]: Analyzing trace with hash 1239720062, now seen corresponding path program 1 times [2019-12-07 17:49:00,281 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:00,281 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533538031] [2019-12-07 17:49:00,281 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:00,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:00,327 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:00,327 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [533538031] [2019-12-07 17:49:00,327 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:00,327 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:00,328 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1077651000] [2019-12-07 17:49:00,328 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:49:00,328 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:00,328 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:49:00,328 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:49:00,328 INFO L87 Difference]: Start difference. First operand 198405 states and 813330 transitions. Second operand 4 states. [2019-12-07 17:49:00,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:00,490 INFO L93 Difference]: Finished difference Result 49419 states and 170107 transitions. [2019-12-07 17:49:00,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:49:00,490 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 17:49:00,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:00,551 INFO L225 Difference]: With dead ends: 49419 [2019-12-07 17:49:00,551 INFO L226 Difference]: Without dead ends: 37591 [2019-12-07 17:49:00,551 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:01,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37591 states. [2019-12-07 17:49:01,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37591 to 37591. [2019-12-07 17:49:01,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37591 states. [2019-12-07 17:49:01,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37591 states to 37591 states and 121686 transitions. [2019-12-07 17:49:01,485 INFO L78 Accepts]: Start accepts. Automaton has 37591 states and 121686 transitions. Word has length 18 [2019-12-07 17:49:01,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:01,485 INFO L462 AbstractCegarLoop]: Abstraction has 37591 states and 121686 transitions. [2019-12-07 17:49:01,485 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:49:01,485 INFO L276 IsEmpty]: Start isEmpty. Operand 37591 states and 121686 transitions. [2019-12-07 17:49:01,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:49:01,490 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:01,490 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:01,490 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:01,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:01,491 INFO L82 PathProgramCache]: Analyzing trace with hash -914144456, now seen corresponding path program 1 times [2019-12-07 17:49:01,491 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:01,491 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379415714] [2019-12-07 17:49:01,491 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:01,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:01,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:01,550 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [379415714] [2019-12-07 17:49:01,550 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:01,550 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:49:01,550 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1272955087] [2019-12-07 17:49:01,550 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:49:01,551 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:01,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:49:01,551 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:49:01,551 INFO L87 Difference]: Start difference. First operand 37591 states and 121686 transitions. Second operand 6 states. [2019-12-07 17:49:02,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:02,162 INFO L93 Difference]: Finished difference Result 57410 states and 180947 transitions. [2019-12-07 17:49:02,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:49:02,163 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 17:49:02,163 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:02,245 INFO L225 Difference]: With dead ends: 57410 [2019-12-07 17:49:02,245 INFO L226 Difference]: Without dead ends: 57354 [2019-12-07 17:49:02,245 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:49:02,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57354 states. [2019-12-07 17:49:02,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57354 to 37241. [2019-12-07 17:49:02,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37241 states. [2019-12-07 17:49:02,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37241 states to 37241 states and 119723 transitions. [2019-12-07 17:49:02,994 INFO L78 Accepts]: Start accepts. Automaton has 37241 states and 119723 transitions. Word has length 22 [2019-12-07 17:49:02,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:02,994 INFO L462 AbstractCegarLoop]: Abstraction has 37241 states and 119723 transitions. [2019-12-07 17:49:02,994 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:49:02,995 INFO L276 IsEmpty]: Start isEmpty. Operand 37241 states and 119723 transitions. [2019-12-07 17:49:03,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:49:03,003 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:03,003 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:03,003 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:03,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:03,003 INFO L82 PathProgramCache]: Analyzing trace with hash 1197302566, now seen corresponding path program 1 times [2019-12-07 17:49:03,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:03,004 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [611122713] [2019-12-07 17:49:03,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:03,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:03,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:03,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [611122713] [2019-12-07 17:49:03,047 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:03,047 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:03,047 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [764265572] [2019-12-07 17:49:03,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:49:03,048 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:03,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:49:03,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:03,048 INFO L87 Difference]: Start difference. First operand 37241 states and 119723 transitions. Second operand 5 states. [2019-12-07 17:49:03,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:03,432 INFO L93 Difference]: Finished difference Result 53658 states and 168996 transitions. [2019-12-07 17:49:03,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:49:03,432 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 17:49:03,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:03,510 INFO L225 Difference]: With dead ends: 53658 [2019-12-07 17:49:03,510 INFO L226 Difference]: Without dead ends: 53645 [2019-12-07 17:49:03,510 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:49:04,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53645 states. [2019-12-07 17:49:04,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53645 to 44933. [2019-12-07 17:49:04,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44933 states. [2019-12-07 17:49:04,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44933 states to 44933 states and 144022 transitions. [2019-12-07 17:49:04,534 INFO L78 Accepts]: Start accepts. Automaton has 44933 states and 144022 transitions. Word has length 25 [2019-12-07 17:49:04,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:04,534 INFO L462 AbstractCegarLoop]: Abstraction has 44933 states and 144022 transitions. [2019-12-07 17:49:04,534 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:49:04,534 INFO L276 IsEmpty]: Start isEmpty. Operand 44933 states and 144022 transitions. [2019-12-07 17:49:04,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:49:04,545 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:04,545 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:04,546 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:04,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:04,546 INFO L82 PathProgramCache]: Analyzing trace with hash 1712753165, now seen corresponding path program 1 times [2019-12-07 17:49:04,546 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:04,546 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1907516435] [2019-12-07 17:49:04,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:04,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:04,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:04,595 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1907516435] [2019-12-07 17:49:04,596 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:04,596 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:49:04,596 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1836314986] [2019-12-07 17:49:04,596 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:49:04,596 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:04,596 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:49:04,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:49:04,597 INFO L87 Difference]: Start difference. First operand 44933 states and 144022 transitions. Second operand 6 states. [2019-12-07 17:49:05,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:05,095 INFO L93 Difference]: Finished difference Result 65075 states and 204051 transitions. [2019-12-07 17:49:05,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 17:49:05,095 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 17:49:05,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:05,187 INFO L225 Difference]: With dead ends: 65075 [2019-12-07 17:49:05,187 INFO L226 Difference]: Without dead ends: 64725 [2019-12-07 17:49:05,187 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:49:05,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64725 states. [2019-12-07 17:49:05,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64725 to 46708. [2019-12-07 17:49:05,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46708 states. [2019-12-07 17:49:06,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46708 states to 46708 states and 149465 transitions. [2019-12-07 17:49:06,055 INFO L78 Accepts]: Start accepts. Automaton has 46708 states and 149465 transitions. Word has length 27 [2019-12-07 17:49:06,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:06,055 INFO L462 AbstractCegarLoop]: Abstraction has 46708 states and 149465 transitions. [2019-12-07 17:49:06,055 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:49:06,055 INFO L276 IsEmpty]: Start isEmpty. Operand 46708 states and 149465 transitions. [2019-12-07 17:49:06,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 17:49:06,069 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:06,069 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:06,069 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:06,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:06,069 INFO L82 PathProgramCache]: Analyzing trace with hash -733244850, now seen corresponding path program 1 times [2019-12-07 17:49:06,070 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:06,070 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529709274] [2019-12-07 17:49:06,070 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:06,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:06,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:06,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529709274] [2019-12-07 17:49:06,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:06,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:06,100 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [185094165] [2019-12-07 17:49:06,100 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:06,100 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:06,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:06,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:06,101 INFO L87 Difference]: Start difference. First operand 46708 states and 149465 transitions. Second operand 3 states. [2019-12-07 17:49:06,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:06,321 INFO L93 Difference]: Finished difference Result 72152 states and 231787 transitions. [2019-12-07 17:49:06,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:06,322 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 17:49:06,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:06,369 INFO L225 Difference]: With dead ends: 72152 [2019-12-07 17:49:06,369 INFO L226 Difference]: Without dead ends: 35802 [2019-12-07 17:49:06,370 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:06,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35802 states. [2019-12-07 17:49:06,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35802 to 34721. [2019-12-07 17:49:06,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34721 states. [2019-12-07 17:49:06,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34721 states to 34721 states and 109514 transitions. [2019-12-07 17:49:06,934 INFO L78 Accepts]: Start accepts. Automaton has 34721 states and 109514 transitions. Word has length 29 [2019-12-07 17:49:06,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:06,934 INFO L462 AbstractCegarLoop]: Abstraction has 34721 states and 109514 transitions. [2019-12-07 17:49:06,934 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:06,934 INFO L276 IsEmpty]: Start isEmpty. Operand 34721 states and 109514 transitions. [2019-12-07 17:49:06,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:49:06,946 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:06,946 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:06,947 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:06,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:06,947 INFO L82 PathProgramCache]: Analyzing trace with hash 964618572, now seen corresponding path program 1 times [2019-12-07 17:49:06,947 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:06,947 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [557964240] [2019-12-07 17:49:06,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:06,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:06,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:06,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [557964240] [2019-12-07 17:49:06,989 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:06,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:49:06,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559668320] [2019-12-07 17:49:06,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:49:06,990 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:06,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:49:06,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:06,990 INFO L87 Difference]: Start difference. First operand 34721 states and 109514 transitions. Second operand 5 states. [2019-12-07 17:49:07,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:07,055 INFO L93 Difference]: Finished difference Result 15496 states and 47004 transitions. [2019-12-07 17:49:07,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:49:07,055 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 17:49:07,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:07,070 INFO L225 Difference]: With dead ends: 15496 [2019-12-07 17:49:07,071 INFO L226 Difference]: Without dead ends: 13710 [2019-12-07 17:49:07,071 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:49:07,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13710 states. [2019-12-07 17:49:07,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13710 to 13150. [2019-12-07 17:49:07,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13150 states. [2019-12-07 17:49:07,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13150 states to 13150 states and 40001 transitions. [2019-12-07 17:49:07,257 INFO L78 Accepts]: Start accepts. Automaton has 13150 states and 40001 transitions. Word has length 30 [2019-12-07 17:49:07,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:07,257 INFO L462 AbstractCegarLoop]: Abstraction has 13150 states and 40001 transitions. [2019-12-07 17:49:07,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:49:07,257 INFO L276 IsEmpty]: Start isEmpty. Operand 13150 states and 40001 transitions. [2019-12-07 17:49:07,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:49:07,269 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:07,269 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:07,270 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:07,270 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:07,270 INFO L82 PathProgramCache]: Analyzing trace with hash 2004852157, now seen corresponding path program 1 times [2019-12-07 17:49:07,270 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:07,270 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981370452] [2019-12-07 17:49:07,270 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:07,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:07,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:07,338 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [981370452] [2019-12-07 17:49:07,338 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:07,338 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:49:07,338 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [37965040] [2019-12-07 17:49:07,338 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:49:07,338 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:07,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:49:07,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:49:07,339 INFO L87 Difference]: Start difference. First operand 13150 states and 40001 transitions. Second operand 7 states. [2019-12-07 17:49:08,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:08,093 INFO L93 Difference]: Finished difference Result 18977 states and 55421 transitions. [2019-12-07 17:49:08,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:49:08,095 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 17:49:08,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:08,127 INFO L225 Difference]: With dead ends: 18977 [2019-12-07 17:49:08,127 INFO L226 Difference]: Without dead ends: 18316 [2019-12-07 17:49:08,128 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:49:08,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18316 states. [2019-12-07 17:49:08,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18316 to 12247. [2019-12-07 17:49:08,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12247 states. [2019-12-07 17:49:08,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12247 states to 12247 states and 37249 transitions. [2019-12-07 17:49:08,333 INFO L78 Accepts]: Start accepts. Automaton has 12247 states and 37249 transitions. Word has length 33 [2019-12-07 17:49:08,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:08,333 INFO L462 AbstractCegarLoop]: Abstraction has 12247 states and 37249 transitions. [2019-12-07 17:49:08,333 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:49:08,333 INFO L276 IsEmpty]: Start isEmpty. Operand 12247 states and 37249 transitions. [2019-12-07 17:49:08,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:49:08,345 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:08,345 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:08,345 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:08,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:08,345 INFO L82 PathProgramCache]: Analyzing trace with hash 1080314489, now seen corresponding path program 1 times [2019-12-07 17:49:08,345 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:08,345 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [162520319] [2019-12-07 17:49:08,345 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:08,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:08,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:08,389 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [162520319] [2019-12-07 17:49:08,389 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:08,389 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:49:08,389 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1221194281] [2019-12-07 17:49:08,390 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:49:08,390 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:08,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:49:08,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:08,390 INFO L87 Difference]: Start difference. First operand 12247 states and 37249 transitions. Second operand 5 states. [2019-12-07 17:49:08,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:08,745 INFO L93 Difference]: Finished difference Result 18315 states and 55199 transitions. [2019-12-07 17:49:08,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:49:08,745 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 17:49:08,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:08,764 INFO L225 Difference]: With dead ends: 18315 [2019-12-07 17:49:08,764 INFO L226 Difference]: Without dead ends: 18315 [2019-12-07 17:49:08,765 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:49:08,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18315 states. [2019-12-07 17:49:08,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18315 to 15619. [2019-12-07 17:49:08,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15619 states. [2019-12-07 17:49:08,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15619 states to 15619 states and 47705 transitions. [2019-12-07 17:49:08,996 INFO L78 Accepts]: Start accepts. Automaton has 15619 states and 47705 transitions. Word has length 40 [2019-12-07 17:49:08,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:08,996 INFO L462 AbstractCegarLoop]: Abstraction has 15619 states and 47705 transitions. [2019-12-07 17:49:08,996 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:49:08,996 INFO L276 IsEmpty]: Start isEmpty. Operand 15619 states and 47705 transitions. [2019-12-07 17:49:09,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:49:09,010 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:09,010 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:09,010 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:09,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:09,010 INFO L82 PathProgramCache]: Analyzing trace with hash -603783385, now seen corresponding path program 2 times [2019-12-07 17:49:09,010 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:09,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885744877] [2019-12-07 17:49:09,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:09,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:09,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:09,055 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1885744877] [2019-12-07 17:49:09,055 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:09,056 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:09,056 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [51032310] [2019-12-07 17:49:09,056 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:09,056 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:09,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:09,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:09,057 INFO L87 Difference]: Start difference. First operand 15619 states and 47705 transitions. Second operand 3 states. [2019-12-07 17:49:09,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:09,129 INFO L93 Difference]: Finished difference Result 15619 states and 47007 transitions. [2019-12-07 17:49:09,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:09,130 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 17:49:09,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:09,146 INFO L225 Difference]: With dead ends: 15619 [2019-12-07 17:49:09,147 INFO L226 Difference]: Without dead ends: 15619 [2019-12-07 17:49:09,147 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:09,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15619 states. [2019-12-07 17:49:09,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15619 to 15139. [2019-12-07 17:49:09,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15139 states. [2019-12-07 17:49:09,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15139 states to 15139 states and 45658 transitions. [2019-12-07 17:49:09,354 INFO L78 Accepts]: Start accepts. Automaton has 15139 states and 45658 transitions. Word has length 40 [2019-12-07 17:49:09,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:09,355 INFO L462 AbstractCegarLoop]: Abstraction has 15139 states and 45658 transitions. [2019-12-07 17:49:09,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:09,355 INFO L276 IsEmpty]: Start isEmpty. Operand 15139 states and 45658 transitions. [2019-12-07 17:49:09,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:49:09,367 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:09,367 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:09,367 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:09,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:09,367 INFO L82 PathProgramCache]: Analyzing trace with hash 194682416, now seen corresponding path program 1 times [2019-12-07 17:49:09,367 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:09,368 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052714449] [2019-12-07 17:49:09,368 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:09,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:09,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:09,419 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2052714449] [2019-12-07 17:49:09,419 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:09,419 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:49:09,420 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806356352] [2019-12-07 17:49:09,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:49:09,420 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:09,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:49:09,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:49:09,420 INFO L87 Difference]: Start difference. First operand 15139 states and 45658 transitions. Second operand 6 states. [2019-12-07 17:49:09,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:09,492 INFO L93 Difference]: Finished difference Result 14163 states and 43495 transitions. [2019-12-07 17:49:09,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:49:09,493 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 17:49:09,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:09,506 INFO L225 Difference]: With dead ends: 14163 [2019-12-07 17:49:09,507 INFO L226 Difference]: Without dead ends: 12553 [2019-12-07 17:49:09,507 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:49:09,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12553 states. [2019-12-07 17:49:09,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12553 to 12553. [2019-12-07 17:49:09,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12553 states. [2019-12-07 17:49:09,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12553 states to 12553 states and 39477 transitions. [2019-12-07 17:49:09,685 INFO L78 Accepts]: Start accepts. Automaton has 12553 states and 39477 transitions. Word has length 41 [2019-12-07 17:49:09,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:09,685 INFO L462 AbstractCegarLoop]: Abstraction has 12553 states and 39477 transitions. [2019-12-07 17:49:09,685 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:49:09,685 INFO L276 IsEmpty]: Start isEmpty. Operand 12553 states and 39477 transitions. [2019-12-07 17:49:09,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:49:09,698 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:09,698 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:09,698 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:09,698 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:09,698 INFO L82 PathProgramCache]: Analyzing trace with hash -1172574959, now seen corresponding path program 1 times [2019-12-07 17:49:09,698 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:09,698 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2082541245] [2019-12-07 17:49:09,698 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:09,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:09,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:09,728 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2082541245] [2019-12-07 17:49:09,728 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:09,729 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:09,729 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [914671138] [2019-12-07 17:49:09,729 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:09,729 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:09,729 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:09,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:09,730 INFO L87 Difference]: Start difference. First operand 12553 states and 39477 transitions. Second operand 3 states. [2019-12-07 17:49:09,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:09,808 INFO L93 Difference]: Finished difference Result 17618 states and 54543 transitions. [2019-12-07 17:49:09,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:09,809 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:49:09,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:09,826 INFO L225 Difference]: With dead ends: 17618 [2019-12-07 17:49:09,826 INFO L226 Difference]: Without dead ends: 17618 [2019-12-07 17:49:09,827 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:09,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17618 states. [2019-12-07 17:49:10,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17618 to 13624. [2019-12-07 17:49:10,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13624 states. [2019-12-07 17:49:10,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13624 states to 13624 states and 42545 transitions. [2019-12-07 17:49:10,043 INFO L78 Accepts]: Start accepts. Automaton has 13624 states and 42545 transitions. Word has length 66 [2019-12-07 17:49:10,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:10,043 INFO L462 AbstractCegarLoop]: Abstraction has 13624 states and 42545 transitions. [2019-12-07 17:49:10,043 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:10,043 INFO L276 IsEmpty]: Start isEmpty. Operand 13624 states and 42545 transitions. [2019-12-07 17:49:10,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:49:10,056 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:10,056 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:10,056 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:10,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:10,056 INFO L82 PathProgramCache]: Analyzing trace with hash -5215449, now seen corresponding path program 1 times [2019-12-07 17:49:10,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:10,056 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478559350] [2019-12-07 17:49:10,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:10,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:10,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:10,106 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478559350] [2019-12-07 17:49:10,106 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:10,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:10,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624057688] [2019-12-07 17:49:10,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:10,106 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:10,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:10,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:10,107 INFO L87 Difference]: Start difference. First operand 13624 states and 42545 transitions. Second operand 3 states. [2019-12-07 17:49:10,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:10,173 INFO L93 Difference]: Finished difference Result 16686 states and 51826 transitions. [2019-12-07 17:49:10,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:10,174 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:49:10,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:10,191 INFO L225 Difference]: With dead ends: 16686 [2019-12-07 17:49:10,191 INFO L226 Difference]: Without dead ends: 16686 [2019-12-07 17:49:10,192 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:10,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16686 states. [2019-12-07 17:49:10,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16686 to 12725. [2019-12-07 17:49:10,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12725 states. [2019-12-07 17:49:10,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12725 states to 12725 states and 40127 transitions. [2019-12-07 17:49:10,397 INFO L78 Accepts]: Start accepts. Automaton has 12725 states and 40127 transitions. Word has length 66 [2019-12-07 17:49:10,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:10,397 INFO L462 AbstractCegarLoop]: Abstraction has 12725 states and 40127 transitions. [2019-12-07 17:49:10,397 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:10,397 INFO L276 IsEmpty]: Start isEmpty. Operand 12725 states and 40127 transitions. [2019-12-07 17:49:10,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:49:10,409 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:10,409 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:10,409 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:10,409 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:10,409 INFO L82 PathProgramCache]: Analyzing trace with hash 284301030, now seen corresponding path program 1 times [2019-12-07 17:49:10,409 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:10,409 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1178096659] [2019-12-07 17:49:10,410 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:10,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:10,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:10,565 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1178096659] [2019-12-07 17:49:10,565 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:10,565 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:49:10,565 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [164127142] [2019-12-07 17:49:10,566 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:49:10,566 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:10,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:49:10,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:49:10,566 INFO L87 Difference]: Start difference. First operand 12725 states and 40127 transitions. Second operand 12 states. [2019-12-07 17:49:12,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:12,065 INFO L93 Difference]: Finished difference Result 30829 states and 95713 transitions. [2019-12-07 17:49:12,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 17:49:12,065 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 17:49:12,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:12,085 INFO L225 Difference]: With dead ends: 30829 [2019-12-07 17:49:12,086 INFO L226 Difference]: Without dead ends: 19442 [2019-12-07 17:49:12,086 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 264 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=238, Invalid=1022, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 17:49:12,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19442 states. [2019-12-07 17:49:12,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19442 to 15198. [2019-12-07 17:49:12,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15198 states. [2019-12-07 17:49:12,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15198 states to 15198 states and 47018 transitions. [2019-12-07 17:49:12,358 INFO L78 Accepts]: Start accepts. Automaton has 15198 states and 47018 transitions. Word has length 67 [2019-12-07 17:49:12,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:12,358 INFO L462 AbstractCegarLoop]: Abstraction has 15198 states and 47018 transitions. [2019-12-07 17:49:12,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:49:12,358 INFO L276 IsEmpty]: Start isEmpty. Operand 15198 states and 47018 transitions. [2019-12-07 17:49:12,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:49:12,371 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:12,371 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:12,371 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:12,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:12,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1433623136, now seen corresponding path program 2 times [2019-12-07 17:49:12,372 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:12,372 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114525431] [2019-12-07 17:49:12,372 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:12,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:12,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:12,506 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114525431] [2019-12-07 17:49:12,506 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:12,506 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:49:12,506 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728043591] [2019-12-07 17:49:12,506 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:49:12,506 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:12,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:49:12,507 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:49:12,507 INFO L87 Difference]: Start difference. First operand 15198 states and 47018 transitions. Second operand 11 states. [2019-12-07 17:49:13,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:13,243 INFO L93 Difference]: Finished difference Result 41566 states and 129003 transitions. [2019-12-07 17:49:13,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 17:49:13,244 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 17:49:13,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:13,283 INFO L225 Difference]: With dead ends: 41566 [2019-12-07 17:49:13,283 INFO L226 Difference]: Without dead ends: 34850 [2019-12-07 17:49:13,284 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 346 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=271, Invalid=1135, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 17:49:13,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34850 states. [2019-12-07 17:49:13,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34850 to 18949. [2019-12-07 17:49:13,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18949 states. [2019-12-07 17:49:13,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18949 states to 18949 states and 58989 transitions. [2019-12-07 17:49:13,662 INFO L78 Accepts]: Start accepts. Automaton has 18949 states and 58989 transitions. Word has length 67 [2019-12-07 17:49:13,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:13,662 INFO L462 AbstractCegarLoop]: Abstraction has 18949 states and 58989 transitions. [2019-12-07 17:49:13,662 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:49:13,662 INFO L276 IsEmpty]: Start isEmpty. Operand 18949 states and 58989 transitions. [2019-12-07 17:49:13,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:49:13,679 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:13,679 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:13,679 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:13,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:13,679 INFO L82 PathProgramCache]: Analyzing trace with hash -1480867452, now seen corresponding path program 3 times [2019-12-07 17:49:13,679 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:13,679 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [792547049] [2019-12-07 17:49:13,679 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:13,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:13,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:13,798 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [792547049] [2019-12-07 17:49:13,798 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:13,798 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:49:13,798 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [778086307] [2019-12-07 17:49:13,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:49:13,799 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:13,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:49:13,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:49:13,799 INFO L87 Difference]: Start difference. First operand 18949 states and 58989 transitions. Second operand 11 states. [2019-12-07 17:49:14,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:14,391 INFO L93 Difference]: Finished difference Result 34238 states and 105482 transitions. [2019-12-07 17:49:14,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 17:49:14,391 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 17:49:14,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:14,421 INFO L225 Difference]: With dead ends: 34238 [2019-12-07 17:49:14,421 INFO L226 Difference]: Without dead ends: 27123 [2019-12-07 17:49:14,421 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=158, Invalid=598, Unknown=0, NotChecked=0, Total=756 [2019-12-07 17:49:14,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27123 states. [2019-12-07 17:49:14,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27123 to 14818. [2019-12-07 17:49:14,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14818 states. [2019-12-07 17:49:14,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14818 states to 14818 states and 45953 transitions. [2019-12-07 17:49:14,713 INFO L78 Accepts]: Start accepts. Automaton has 14818 states and 45953 transitions. Word has length 67 [2019-12-07 17:49:14,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:14,714 INFO L462 AbstractCegarLoop]: Abstraction has 14818 states and 45953 transitions. [2019-12-07 17:49:14,714 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:49:14,714 INFO L276 IsEmpty]: Start isEmpty. Operand 14818 states and 45953 transitions. [2019-12-07 17:49:14,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:49:14,726 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:14,727 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:14,727 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:14,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:14,727 INFO L82 PathProgramCache]: Analyzing trace with hash -1507199932, now seen corresponding path program 4 times [2019-12-07 17:49:14,727 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:14,727 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278121322] [2019-12-07 17:49:14,727 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:14,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:14,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:14,787 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278121322] [2019-12-07 17:49:14,787 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:14,787 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:49:14,787 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [338245461] [2019-12-07 17:49:14,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:49:14,788 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:14,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:49:14,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:49:14,788 INFO L87 Difference]: Start difference. First operand 14818 states and 45953 transitions. Second operand 7 states. [2019-12-07 17:49:15,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:15,028 INFO L93 Difference]: Finished difference Result 28850 states and 87121 transitions. [2019-12-07 17:49:15,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:49:15,028 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 17:49:15,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:15,057 INFO L225 Difference]: With dead ends: 28850 [2019-12-07 17:49:15,057 INFO L226 Difference]: Without dead ends: 27384 [2019-12-07 17:49:15,057 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:49:15,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27384 states. [2019-12-07 17:49:15,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27384 to 15009. [2019-12-07 17:49:15,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15009 states. [2019-12-07 17:49:15,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15009 states to 15009 states and 46430 transitions. [2019-12-07 17:49:15,395 INFO L78 Accepts]: Start accepts. Automaton has 15009 states and 46430 transitions. Word has length 67 [2019-12-07 17:49:15,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:15,395 INFO L462 AbstractCegarLoop]: Abstraction has 15009 states and 46430 transitions. [2019-12-07 17:49:15,395 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:49:15,395 INFO L276 IsEmpty]: Start isEmpty. Operand 15009 states and 46430 transitions. [2019-12-07 17:49:15,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:49:15,406 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:15,406 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:15,407 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:15,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:15,407 INFO L82 PathProgramCache]: Analyzing trace with hash -72336402, now seen corresponding path program 5 times [2019-12-07 17:49:15,407 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:15,407 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284040894] [2019-12-07 17:49:15,407 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:15,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:15,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:15,700 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [284040894] [2019-12-07 17:49:15,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:15,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 17:49:15,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [369053162] [2019-12-07 17:49:15,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:49:15,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:15,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:49:15,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:49:15,701 INFO L87 Difference]: Start difference. First operand 15009 states and 46430 transitions. Second operand 16 states. [2019-12-07 17:49:18,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:18,900 INFO L93 Difference]: Finished difference Result 34099 states and 104423 transitions. [2019-12-07 17:49:18,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 17:49:18,901 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 17:49:18,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:18,936 INFO L225 Difference]: With dead ends: 34099 [2019-12-07 17:49:18,936 INFO L226 Difference]: Without dead ends: 30023 [2019-12-07 17:49:18,937 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 587 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=365, Invalid=2085, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 17:49:19,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30023 states. [2019-12-07 17:49:19,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30023 to 14975. [2019-12-07 17:49:19,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14975 states. [2019-12-07 17:49:19,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14975 states to 14975 states and 45623 transitions. [2019-12-07 17:49:19,239 INFO L78 Accepts]: Start accepts. Automaton has 14975 states and 45623 transitions. Word has length 67 [2019-12-07 17:49:19,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:19,239 INFO L462 AbstractCegarLoop]: Abstraction has 14975 states and 45623 transitions. [2019-12-07 17:49:19,239 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:49:19,239 INFO L276 IsEmpty]: Start isEmpty. Operand 14975 states and 45623 transitions. [2019-12-07 17:49:19,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:49:19,252 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:19,252 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:19,252 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:19,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:19,253 INFO L82 PathProgramCache]: Analyzing trace with hash 14018097, now seen corresponding path program 1 times [2019-12-07 17:49:19,253 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:19,253 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993129764] [2019-12-07 17:49:19,253 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:19,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:19,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:19,286 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1993129764] [2019-12-07 17:49:19,286 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:19,286 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:19,287 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [620899170] [2019-12-07 17:49:19,287 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:19,287 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:19,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:19,287 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:19,287 INFO L87 Difference]: Start difference. First operand 14975 states and 45623 transitions. Second operand 3 states. [2019-12-07 17:49:19,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:19,344 INFO L93 Difference]: Finished difference Result 17113 states and 50485 transitions. [2019-12-07 17:49:19,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:19,344 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 17:49:19,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:19,360 INFO L225 Difference]: With dead ends: 17113 [2019-12-07 17:49:19,360 INFO L226 Difference]: Without dead ends: 17113 [2019-12-07 17:49:19,360 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:19,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17113 states. [2019-12-07 17:49:19,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17113 to 15052. [2019-12-07 17:49:19,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15052 states. [2019-12-07 17:49:19,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15052 states to 15052 states and 44664 transitions. [2019-12-07 17:49:19,572 INFO L78 Accepts]: Start accepts. Automaton has 15052 states and 44664 transitions. Word has length 67 [2019-12-07 17:49:19,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:19,572 INFO L462 AbstractCegarLoop]: Abstraction has 15052 states and 44664 transitions. [2019-12-07 17:49:19,572 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:19,572 INFO L276 IsEmpty]: Start isEmpty. Operand 15052 states and 44664 transitions. [2019-12-07 17:49:19,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:49:19,584 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:19,584 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:19,584 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:19,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:19,584 INFO L82 PathProgramCache]: Analyzing trace with hash -1017311362, now seen corresponding path program 1 times [2019-12-07 17:49:19,584 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:19,584 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452915600] [2019-12-07 17:49:19,584 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:19,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:19,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:19,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1452915600] [2019-12-07 17:49:19,623 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:19,624 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:19,624 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1352400723] [2019-12-07 17:49:19,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:49:19,624 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:19,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:49:19,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:49:19,624 INFO L87 Difference]: Start difference. First operand 15052 states and 44664 transitions. Second operand 4 states. [2019-12-07 17:49:19,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:19,698 INFO L93 Difference]: Finished difference Result 14908 states and 44058 transitions. [2019-12-07 17:49:19,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:49:19,699 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 17:49:19,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:19,714 INFO L225 Difference]: With dead ends: 14908 [2019-12-07 17:49:19,714 INFO L226 Difference]: Without dead ends: 14908 [2019-12-07 17:49:19,715 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:19,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14908 states. [2019-12-07 17:49:19,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14908 to 13530. [2019-12-07 17:49:19,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13530 states. [2019-12-07 17:49:19,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13530 states to 13530 states and 39924 transitions. [2019-12-07 17:49:19,914 INFO L78 Accepts]: Start accepts. Automaton has 13530 states and 39924 transitions. Word has length 67 [2019-12-07 17:49:19,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:19,914 INFO L462 AbstractCegarLoop]: Abstraction has 13530 states and 39924 transitions. [2019-12-07 17:49:19,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:49:19,914 INFO L276 IsEmpty]: Start isEmpty. Operand 13530 states and 39924 transitions. [2019-12-07 17:49:19,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:49:19,926 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:19,926 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:19,926 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:19,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:19,926 INFO L82 PathProgramCache]: Analyzing trace with hash -165885726, now seen corresponding path program 6 times [2019-12-07 17:49:19,926 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:19,926 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690269820] [2019-12-07 17:49:19,926 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:19,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:20,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:20,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1690269820] [2019-12-07 17:49:20,069 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:20,069 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:49:20,069 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1165132047] [2019-12-07 17:49:20,070 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:49:20,070 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:20,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:49:20,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:49:20,070 INFO L87 Difference]: Start difference. First operand 13530 states and 39924 transitions. Second operand 12 states. [2019-12-07 17:49:20,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:20,590 INFO L93 Difference]: Finished difference Result 23290 states and 68298 transitions. [2019-12-07 17:49:20,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 17:49:20,590 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 17:49:20,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:20,611 INFO L225 Difference]: With dead ends: 23290 [2019-12-07 17:49:20,611 INFO L226 Difference]: Without dead ends: 22337 [2019-12-07 17:49:20,611 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=133, Invalid=569, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:49:20,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22337 states. [2019-12-07 17:49:20,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22337 to 12661. [2019-12-07 17:49:20,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12661 states. [2019-12-07 17:49:20,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12661 states to 12661 states and 37689 transitions. [2019-12-07 17:49:20,855 INFO L78 Accepts]: Start accepts. Automaton has 12661 states and 37689 transitions. Word has length 67 [2019-12-07 17:49:20,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:20,855 INFO L462 AbstractCegarLoop]: Abstraction has 12661 states and 37689 transitions. [2019-12-07 17:49:20,855 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:49:20,855 INFO L276 IsEmpty]: Start isEmpty. Operand 12661 states and 37689 transitions. [2019-12-07 17:49:20,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:49:20,866 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:20,867 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:20,867 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:20,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:20,867 INFO L82 PathProgramCache]: Analyzing trace with hash 968273958, now seen corresponding path program 7 times [2019-12-07 17:49:20,867 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:20,867 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52968237] [2019-12-07 17:49:20,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:20,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:49:20,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:49:20,943 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:49:20,943 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:49:20,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] ULTIMATE.startENTRY-->L828: Formula: (let ((.cse0 (store |v_#valid_76| 0 0))) (and (= v_~a$r_buff1_thd0~0_168 0) (= 0 v_~__unbuffered_p2_EAX~0_43) (= v_~__unbuffered_p2_EBX~0_46 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1199~0.base_37| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1199~0.base_37|) |v_ULTIMATE.start_main_~#t1199~0.offset_25| 0)) |v_#memory_int_21|) (= |v_#NULL.offset_7| 0) (= 0 v_~a$w_buff1_used~0_387) (= v_~a$w_buff0~0_207 0) (= 0 v_~weak$$choice0~0_17) (= v_~a$mem_tmp~0_18 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~a$r_buff0_thd2~0_167) (= 0 v_~a$r_buff1_thd1~0_155) (= |v_ULTIMATE.start_main_~#t1199~0.offset_25| 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1199~0.base_37| 4)) (= v_~y~0_56 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1199~0.base_37|)) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1199~0.base_37|) (= 0 v_~a$r_buff0_thd1~0_253) (= v_~a$r_buff0_thd0~0_180 0) (= 0 v_~a$w_buff1~0_155) (= v_~main$tmp_guard0~0_36 0) (= v_~a~0_177 0) (= v_~a$flush_delayed~0_31 0) (= v_~a$r_buff0_thd3~0_361 0) (= 0 |v_#NULL.base_7|) (= 0 v_~x~0_140) (= 0 v_~a$w_buff0_used~0_714) (= v_~z~0_17 0) (= 0 v_~a$r_buff1_thd2~0_176) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= v_~a$r_buff1_thd3~0_273 0) (= 0 v_~a$read_delayed_var~0.base_6) (= (store .cse0 |v_ULTIMATE.start_main_~#t1199~0.base_37| 1) |v_#valid_74|) (= v_~weak$$choice2~0_104 0) (= v_~__unbuffered_cnt~0_126 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_76|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_176, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, ULTIMATE.start_main_~#t1201~0.base=|v_ULTIMATE.start_main_~#t1201~0.base_18|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_266|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_180, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_42|, ~a~0=v_~a~0_177, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_43, ULTIMATE.start_main_~#t1200~0.offset=|v_ULTIMATE.start_main_~#t1200~0.offset_24|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_46, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_273, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_714, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_253, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_207, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_168, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126, ULTIMATE.start_main_~#t1200~0.base=|v_ULTIMATE.start_main_~#t1200~0.base_37|, ~x~0=v_~x~0_140, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_41|, ULTIMATE.start_main_~#t1199~0.base=|v_ULTIMATE.start_main_~#t1199~0.base_37|, ULTIMATE.start_main_~#t1201~0.offset=|v_ULTIMATE.start_main_~#t1201~0.offset_15|, ~a$mem_tmp~0=v_~a$mem_tmp~0_18, ULTIMATE.start_main_~#t1199~0.offset=|v_ULTIMATE.start_main_~#t1199~0.offset_25|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_40|, ~a$w_buff1~0=v_~a$w_buff1~0_155, ~y~0=v_~y~0_56, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_15|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_155, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_361, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_36, #NULL.base=|v_#NULL.base_7|, ~a$flush_delayed~0=v_~a$flush_delayed~0_31, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_17, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_387, ~weak$$choice2~0=v_~weak$$choice2~0_104, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1201~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1200~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1200~0.base, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1199~0.base, ULTIMATE.start_main_~#t1201~0.offset, ~a$mem_tmp~0, ULTIMATE.start_main_~#t1199~0.offset, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 17:49:20,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L828-1-->L830: Formula: (and (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1200~0.base_9| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1200~0.base_9|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1200~0.base_9|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1200~0.base_9| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1200~0.base_9|) |v_ULTIMATE.start_main_~#t1200~0.offset_8| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1200~0.base_9| 0)) (= 0 |v_ULTIMATE.start_main_~#t1200~0.offset_8|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1200~0.base_9| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1200~0.base=|v_ULTIMATE.start_main_~#t1200~0.base_9|, ULTIMATE.start_main_~#t1200~0.offset=|v_ULTIMATE.start_main_~#t1200~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1200~0.base, ULTIMATE.start_main_~#t1200~0.offset] because there is no mapped edge [2019-12-07 17:49:20,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L4-->L746: Formula: (and (= 1 ~x~0_Out1968944687) (= ~a$r_buff0_thd1~0_Out1968944687 1) (= ~a$r_buff1_thd3~0_Out1968944687 ~a$r_buff0_thd3~0_In1968944687) (= ~a$r_buff1_thd0~0_Out1968944687 ~a$r_buff0_thd0~0_In1968944687) (= ~a$r_buff0_thd1~0_In1968944687 ~a$r_buff1_thd1~0_Out1968944687) (= ~a$r_buff0_thd2~0_In1968944687 ~a$r_buff1_thd2~0_Out1968944687) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1968944687))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1968944687, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1968944687, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1968944687, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1968944687, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1968944687} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out1968944687, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out1968944687, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out1968944687, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1968944687, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out1968944687, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1968944687, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1968944687, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1968944687, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1968944687, ~x~0=~x~0_Out1968944687} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:49:20,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L830-1-->L832: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1201~0.base_12| 4)) (= |v_ULTIMATE.start_main_~#t1201~0.offset_10| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1201~0.base_12|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1201~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1201~0.base_12|) |v_ULTIMATE.start_main_~#t1201~0.offset_10| 2)) |v_#memory_int_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1201~0.base_12|)) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1201~0.base_12|)) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1201~0.base_12| 1) |v_#valid_29|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1201~0.base=|v_ULTIMATE.start_main_~#t1201~0.base_12|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1201~0.offset=|v_ULTIMATE.start_main_~#t1201~0.offset_10|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1201~0.base, #length, ULTIMATE.start_main_~#t1201~0.offset] because there is no mapped edge [2019-12-07 17:49:20,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L794-->L794-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In47703202 256) 0))) (or (and (= ~a$w_buff0~0_In47703202 |P2Thread1of1ForFork0_#t~ite20_Out47703202|) (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In47703202 256) 0))) (or (and .cse0 (= (mod ~a$w_buff1_used~0_In47703202 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In47703202 256)) (and (= 0 (mod ~a$r_buff1_thd3~0_In47703202 256)) .cse0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite21_Out47703202| |P2Thread1of1ForFork0_#t~ite20_Out47703202|)) (and (= |P2Thread1of1ForFork0_#t~ite20_In47703202| |P2Thread1of1ForFork0_#t~ite20_Out47703202|) (= ~a$w_buff0~0_In47703202 |P2Thread1of1ForFork0_#t~ite21_Out47703202|) (not .cse1)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In47703202, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In47703202, ~a$w_buff0_used~0=~a$w_buff0_used~0_In47703202, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In47703202, ~a$w_buff1_used~0=~a$w_buff1_used~0_In47703202, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In47703202|, ~weak$$choice2~0=~weak$$choice2~0_In47703202} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out47703202|, ~a$w_buff0~0=~a$w_buff0~0_In47703202, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In47703202, ~a$w_buff0_used~0=~a$w_buff0_used~0_In47703202, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In47703202, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out47703202|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In47703202, ~weak$$choice2~0=~weak$$choice2~0_In47703202} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 17:49:20,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L766-2-->L766-5: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1550986411 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In1550986411 256))) (.cse1 (= |P1Thread1of1ForFork2_#t~ite10_Out1550986411| |P1Thread1of1ForFork2_#t~ite9_Out1550986411|))) (or (and (not .cse0) .cse1 (not .cse2) (= ~a$w_buff1~0_In1550986411 |P1Thread1of1ForFork2_#t~ite9_Out1550986411|)) (and (= ~a~0_In1550986411 |P1Thread1of1ForFork2_#t~ite9_Out1550986411|) (or .cse0 .cse2) .cse1))) InVars {~a~0=~a~0_In1550986411, ~a$w_buff1~0=~a$w_buff1~0_In1550986411, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1550986411, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1550986411} OutVars{~a~0=~a~0_In1550986411, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1550986411|, ~a$w_buff1~0=~a$w_buff1~0_In1550986411, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1550986411, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1550986411|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1550986411} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 17:49:20,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-2086885833 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-2086885833 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-2086885833|)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-2086885833 |P1Thread1of1ForFork2_#t~ite11_Out-2086885833|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2086885833, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2086885833} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2086885833, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2086885833, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-2086885833|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:49:20,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L768-->L768-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd2~0_In-1082972240 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1082972240 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-1082972240 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1082972240 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1082972240| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1082972240| ~a$w_buff1_used~0_In-1082972240) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1082972240, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1082972240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1082972240, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1082972240} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1082972240, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1082972240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1082972240, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1082972240|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1082972240} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:49:20,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In2074315130 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In2074315130 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out2074315130|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In2074315130 |P1Thread1of1ForFork2_#t~ite13_Out2074315130|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2074315130, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2074315130} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2074315130, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2074315130, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out2074315130|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:49:20,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L796-->L796-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1406836432 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out1406836432| ~a$w_buff0_used~0_In1406836432) (= |P2Thread1of1ForFork0_#t~ite26_In1406836432| |P2Thread1of1ForFork0_#t~ite26_Out1406836432|) (not .cse0)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out1406836432| |P2Thread1of1ForFork0_#t~ite26_Out1406836432|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1406836432 256) 0))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In1406836432 256))) (= 0 (mod ~a$w_buff0_used~0_In1406836432 256)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In1406836432 256))))) (= ~a$w_buff0_used~0_In1406836432 |P2Thread1of1ForFork0_#t~ite26_Out1406836432|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1406836432|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1406836432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1406836432, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1406836432, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1406836432, ~weak$$choice2~0=~weak$$choice2~0_In1406836432} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1406836432|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1406836432|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1406836432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1406836432, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1406836432, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1406836432, ~weak$$choice2~0=~weak$$choice2~0_In1406836432} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 17:49:20,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L798-->L799: Formula: (and (not (= (mod v_~weak$$choice2~0_21 256) 0)) (= v_~a$r_buff0_thd3~0_104 v_~a$r_buff0_thd3~0_103)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_103, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:49:20,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L801-->L805: Formula: (and (= v_~a$flush_delayed~0_9 0) (= v_~a~0_54 v_~a$mem_tmp~0_7) (not (= (mod v_~a$flush_delayed~0_10 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_54, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 17:49:20,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L805-2-->L805-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In1871253811 256))) (.cse0 (= (mod ~a$r_buff1_thd3~0_In1871253811 256) 0))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In1871253811 |P2Thread1of1ForFork0_#t~ite38_Out1871253811|)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1871253811| ~a~0_In1871253811) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In1871253811, ~a$w_buff1~0=~a$w_buff1~0_In1871253811, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1871253811, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1871253811} OutVars{~a~0=~a~0_In1871253811, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1871253811|, ~a$w_buff1~0=~a$w_buff1~0_In1871253811, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1871253811, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1871253811} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:49:20,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L805-4-->L806: Formula: (= v_~a~0_21 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_21, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:49:20,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L806-->L806-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1526973204 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-1526973204 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-1526973204| 0)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1526973204| ~a$w_buff0_used~0_In-1526973204) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1526973204, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1526973204} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1526973204|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1526973204, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1526973204} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:49:20,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L807-->L807-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd3~0_In29645117 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In29645117 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In29645117 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In29645117 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out29645117| 0)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out29645117| ~a$w_buff1_used~0_In29645117) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In29645117, ~a$w_buff0_used~0=~a$w_buff0_used~0_In29645117, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In29645117, ~a$w_buff1_used~0=~a$w_buff1_used~0_In29645117} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In29645117, ~a$w_buff0_used~0=~a$w_buff0_used~0_In29645117, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In29645117, ~a$w_buff1_used~0=~a$w_buff1_used~0_In29645117, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out29645117|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:49:20,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1320994 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1320994 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1320994| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1320994| ~a$r_buff0_thd3~0_In-1320994)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1320994, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1320994} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1320994, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1320994, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1320994|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:49:20,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L809-->L809-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In-248741326 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-248741326 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In-248741326 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In-248741326 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In-248741326 |P2Thread1of1ForFork0_#t~ite43_Out-248741326|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-248741326|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-248741326, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-248741326, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-248741326, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-248741326} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-248741326|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-248741326, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-248741326, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-248741326, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-248741326} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:49:20,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L809-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_50 (+ v_~__unbuffered_cnt~0_51 1)) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_125 |v_P2Thread1of1ForFork0_#t~ite43_26|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_25|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:49:20,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1982293883 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In1982293883 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1982293883|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1982293883 |P0Thread1of1ForFork1_#t~ite5_Out1982293883|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1982293883, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1982293883} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1982293883|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1982293883, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1982293883} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:49:20,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L748-->L748-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-441933629 256))) (.cse0 (= (mod ~a$r_buff1_thd1~0_In-441933629 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-441933629 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-441933629 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-441933629|)) (and (= ~a$w_buff1_used~0_In-441933629 |P0Thread1of1ForFork1_#t~ite6_Out-441933629|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-441933629, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-441933629, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-441933629, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-441933629} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-441933629|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-441933629, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-441933629, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-441933629, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-441933629} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:49:20,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L749-->L750: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1897187168 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out1897187168 ~a$r_buff0_thd1~0_In1897187168)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1897187168 256)))) (or (and (not .cse0) (not .cse1) (= ~a$r_buff0_thd1~0_Out1897187168 0)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1897187168, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1897187168} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1897187168|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1897187168, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1897187168} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:49:20,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-506376711 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In-506376711 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-506376711 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd1~0_In-506376711 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out-506376711| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-506376711| ~a$r_buff1_thd1~0_In-506376711) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-506376711, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-506376711, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-506376711, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-506376711} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-506376711|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-506376711, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-506376711, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-506376711, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-506376711} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:49:20,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= v_~a$r_buff1_thd1~0_97 |v_P0Thread1of1ForFork1_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_35|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_97, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:49:20,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd2~0_In-500243088 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-500243088 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-500243088 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-500243088 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-500243088|)) (and (= ~a$r_buff1_thd2~0_In-500243088 |P1Thread1of1ForFork2_#t~ite14_Out-500243088|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-500243088, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-500243088, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-500243088, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-500243088} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-500243088, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-500243088, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-500243088, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-500243088, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-500243088|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:49:20,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_74) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_74, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:49:20,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L836-->L838-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~a$r_buff0_thd0~0_58 256)) (= (mod v_~a$w_buff0_used~0_319 256) 0))) InVars {~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:49:20,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L838-2-->L838-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In-549275688 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-549275688 256) 0))) (or (and (= ~a$w_buff1~0_In-549275688 |ULTIMATE.start_main_#t~ite47_Out-549275688|) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite47_Out-549275688| ~a~0_In-549275688) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In-549275688, ~a$w_buff1~0=~a$w_buff1~0_In-549275688, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-549275688, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-549275688} OutVars{~a~0=~a~0_In-549275688, ~a$w_buff1~0=~a$w_buff1~0_In-549275688, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-549275688|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-549275688, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-549275688} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 17:49:20,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L838-4-->L839: Formula: (= v_~a~0_33 |v_ULTIMATE.start_main_#t~ite47_7|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|} OutVars{~a~0=v_~a~0_33, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:49:20,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L839-->L839-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1984533797 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1984533797 256) 0))) (or (and (= ~a$w_buff0_used~0_In1984533797 |ULTIMATE.start_main_#t~ite49_Out1984533797|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out1984533797|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1984533797, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1984533797} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1984533797, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1984533797|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1984533797} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:49:20,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L840-->L840-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-593402618 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-593402618 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-593402618 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-593402618 256)))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-593402618| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-593402618 |ULTIMATE.start_main_#t~ite50_Out-593402618|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-593402618, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-593402618, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-593402618, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-593402618} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-593402618|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-593402618, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-593402618, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-593402618, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-593402618} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:49:20,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L841-->L841-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-490417550 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-490417550 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-490417550|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$r_buff0_thd0~0_In-490417550 |ULTIMATE.start_main_#t~ite51_Out-490417550|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-490417550, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-490417550} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-490417550|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-490417550, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-490417550} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:49:20,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L842-->L842-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In-1849536852 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1849536852 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1849536852 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1849536852 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-1849536852|)) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-1849536852| ~a$r_buff1_thd0~0_In-1849536852) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1849536852, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1849536852, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1849536852, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1849536852} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1849536852|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1849536852, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1849536852, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1849536852, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1849536852} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:49:20,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L842-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9| (mod v_~main$tmp_guard1~0_16 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_25 0) (= v_~y~0_24 2) (= v_~x~0_88 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_16) (= v_~a$r_buff1_thd0~0_114 |v_ULTIMATE.start_main_#t~ite52_42|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_41|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_13, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_114, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:49:21,022 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:49:21 BasicIcfg [2019-12-07 17:49:21,022 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:49:21,022 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:49:21,022 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:49:21,023 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:49:21,023 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:47:40" (3/4) ... [2019-12-07 17:49:21,025 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:49:21,025 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] ULTIMATE.startENTRY-->L828: Formula: (let ((.cse0 (store |v_#valid_76| 0 0))) (and (= v_~a$r_buff1_thd0~0_168 0) (= 0 v_~__unbuffered_p2_EAX~0_43) (= v_~__unbuffered_p2_EBX~0_46 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1199~0.base_37| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1199~0.base_37|) |v_ULTIMATE.start_main_~#t1199~0.offset_25| 0)) |v_#memory_int_21|) (= |v_#NULL.offset_7| 0) (= 0 v_~a$w_buff1_used~0_387) (= v_~a$w_buff0~0_207 0) (= 0 v_~weak$$choice0~0_17) (= v_~a$mem_tmp~0_18 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~a$r_buff0_thd2~0_167) (= 0 v_~a$r_buff1_thd1~0_155) (= |v_ULTIMATE.start_main_~#t1199~0.offset_25| 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1199~0.base_37| 4)) (= v_~y~0_56 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1199~0.base_37|)) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1199~0.base_37|) (= 0 v_~a$r_buff0_thd1~0_253) (= v_~a$r_buff0_thd0~0_180 0) (= 0 v_~a$w_buff1~0_155) (= v_~main$tmp_guard0~0_36 0) (= v_~a~0_177 0) (= v_~a$flush_delayed~0_31 0) (= v_~a$r_buff0_thd3~0_361 0) (= 0 |v_#NULL.base_7|) (= 0 v_~x~0_140) (= 0 v_~a$w_buff0_used~0_714) (= v_~z~0_17 0) (= 0 v_~a$r_buff1_thd2~0_176) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= v_~a$r_buff1_thd3~0_273 0) (= 0 v_~a$read_delayed_var~0.base_6) (= (store .cse0 |v_ULTIMATE.start_main_~#t1199~0.base_37| 1) |v_#valid_74|) (= v_~weak$$choice2~0_104 0) (= v_~__unbuffered_cnt~0_126 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_76|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_176, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, ULTIMATE.start_main_~#t1201~0.base=|v_ULTIMATE.start_main_~#t1201~0.base_18|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_266|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_180, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_42|, ~a~0=v_~a~0_177, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_43, ULTIMATE.start_main_~#t1200~0.offset=|v_ULTIMATE.start_main_~#t1200~0.offset_24|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_46, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_273, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_714, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_253, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_207, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_168, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126, ULTIMATE.start_main_~#t1200~0.base=|v_ULTIMATE.start_main_~#t1200~0.base_37|, ~x~0=v_~x~0_140, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_41|, ULTIMATE.start_main_~#t1199~0.base=|v_ULTIMATE.start_main_~#t1199~0.base_37|, ULTIMATE.start_main_~#t1201~0.offset=|v_ULTIMATE.start_main_~#t1201~0.offset_15|, ~a$mem_tmp~0=v_~a$mem_tmp~0_18, ULTIMATE.start_main_~#t1199~0.offset=|v_ULTIMATE.start_main_~#t1199~0.offset_25|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_40|, ~a$w_buff1~0=v_~a$w_buff1~0_155, ~y~0=v_~y~0_56, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_15|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_155, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_361, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_36, #NULL.base=|v_#NULL.base_7|, ~a$flush_delayed~0=v_~a$flush_delayed~0_31, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_17, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_387, ~weak$$choice2~0=v_~weak$$choice2~0_104, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1201~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1200~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1200~0.base, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1199~0.base, ULTIMATE.start_main_~#t1201~0.offset, ~a$mem_tmp~0, ULTIMATE.start_main_~#t1199~0.offset, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 17:49:21,026 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L828-1-->L830: Formula: (and (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1200~0.base_9| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1200~0.base_9|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1200~0.base_9|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1200~0.base_9| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1200~0.base_9|) |v_ULTIMATE.start_main_~#t1200~0.offset_8| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1200~0.base_9| 0)) (= 0 |v_ULTIMATE.start_main_~#t1200~0.offset_8|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1200~0.base_9| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1200~0.base=|v_ULTIMATE.start_main_~#t1200~0.base_9|, ULTIMATE.start_main_~#t1200~0.offset=|v_ULTIMATE.start_main_~#t1200~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1200~0.base, ULTIMATE.start_main_~#t1200~0.offset] because there is no mapped edge [2019-12-07 17:49:21,026 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L4-->L746: Formula: (and (= 1 ~x~0_Out1968944687) (= ~a$r_buff0_thd1~0_Out1968944687 1) (= ~a$r_buff1_thd3~0_Out1968944687 ~a$r_buff0_thd3~0_In1968944687) (= ~a$r_buff1_thd0~0_Out1968944687 ~a$r_buff0_thd0~0_In1968944687) (= ~a$r_buff0_thd1~0_In1968944687 ~a$r_buff1_thd1~0_Out1968944687) (= ~a$r_buff0_thd2~0_In1968944687 ~a$r_buff1_thd2~0_Out1968944687) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1968944687))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1968944687, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1968944687, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1968944687, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1968944687, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1968944687} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out1968944687, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out1968944687, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out1968944687, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1968944687, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out1968944687, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1968944687, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1968944687, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1968944687, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1968944687, ~x~0=~x~0_Out1968944687} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:49:21,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L830-1-->L832: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1201~0.base_12| 4)) (= |v_ULTIMATE.start_main_~#t1201~0.offset_10| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1201~0.base_12|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1201~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1201~0.base_12|) |v_ULTIMATE.start_main_~#t1201~0.offset_10| 2)) |v_#memory_int_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1201~0.base_12|)) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1201~0.base_12|)) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1201~0.base_12| 1) |v_#valid_29|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1201~0.base=|v_ULTIMATE.start_main_~#t1201~0.base_12|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1201~0.offset=|v_ULTIMATE.start_main_~#t1201~0.offset_10|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1201~0.base, #length, ULTIMATE.start_main_~#t1201~0.offset] because there is no mapped edge [2019-12-07 17:49:21,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L794-->L794-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In47703202 256) 0))) (or (and (= ~a$w_buff0~0_In47703202 |P2Thread1of1ForFork0_#t~ite20_Out47703202|) (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In47703202 256) 0))) (or (and .cse0 (= (mod ~a$w_buff1_used~0_In47703202 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In47703202 256)) (and (= 0 (mod ~a$r_buff1_thd3~0_In47703202 256)) .cse0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite21_Out47703202| |P2Thread1of1ForFork0_#t~ite20_Out47703202|)) (and (= |P2Thread1of1ForFork0_#t~ite20_In47703202| |P2Thread1of1ForFork0_#t~ite20_Out47703202|) (= ~a$w_buff0~0_In47703202 |P2Thread1of1ForFork0_#t~ite21_Out47703202|) (not .cse1)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In47703202, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In47703202, ~a$w_buff0_used~0=~a$w_buff0_used~0_In47703202, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In47703202, ~a$w_buff1_used~0=~a$w_buff1_used~0_In47703202, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In47703202|, ~weak$$choice2~0=~weak$$choice2~0_In47703202} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out47703202|, ~a$w_buff0~0=~a$w_buff0~0_In47703202, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In47703202, ~a$w_buff0_used~0=~a$w_buff0_used~0_In47703202, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In47703202, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out47703202|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In47703202, ~weak$$choice2~0=~weak$$choice2~0_In47703202} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 17:49:21,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L766-2-->L766-5: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1550986411 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In1550986411 256))) (.cse1 (= |P1Thread1of1ForFork2_#t~ite10_Out1550986411| |P1Thread1of1ForFork2_#t~ite9_Out1550986411|))) (or (and (not .cse0) .cse1 (not .cse2) (= ~a$w_buff1~0_In1550986411 |P1Thread1of1ForFork2_#t~ite9_Out1550986411|)) (and (= ~a~0_In1550986411 |P1Thread1of1ForFork2_#t~ite9_Out1550986411|) (or .cse0 .cse2) .cse1))) InVars {~a~0=~a~0_In1550986411, ~a$w_buff1~0=~a$w_buff1~0_In1550986411, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1550986411, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1550986411} OutVars{~a~0=~a~0_In1550986411, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1550986411|, ~a$w_buff1~0=~a$w_buff1~0_In1550986411, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1550986411, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1550986411|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1550986411} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 17:49:21,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-2086885833 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-2086885833 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-2086885833|)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-2086885833 |P1Thread1of1ForFork2_#t~ite11_Out-2086885833|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2086885833, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2086885833} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2086885833, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2086885833, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-2086885833|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:49:21,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L768-->L768-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd2~0_In-1082972240 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1082972240 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-1082972240 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1082972240 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1082972240| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1082972240| ~a$w_buff1_used~0_In-1082972240) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1082972240, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1082972240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1082972240, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1082972240} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1082972240, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1082972240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1082972240, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1082972240|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1082972240} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:49:21,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In2074315130 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In2074315130 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out2074315130|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In2074315130 |P1Thread1of1ForFork2_#t~ite13_Out2074315130|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2074315130, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2074315130} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2074315130, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2074315130, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out2074315130|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:49:21,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L796-->L796-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1406836432 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out1406836432| ~a$w_buff0_used~0_In1406836432) (= |P2Thread1of1ForFork0_#t~ite26_In1406836432| |P2Thread1of1ForFork0_#t~ite26_Out1406836432|) (not .cse0)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out1406836432| |P2Thread1of1ForFork0_#t~ite26_Out1406836432|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1406836432 256) 0))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In1406836432 256))) (= 0 (mod ~a$w_buff0_used~0_In1406836432 256)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In1406836432 256))))) (= ~a$w_buff0_used~0_In1406836432 |P2Thread1of1ForFork0_#t~ite26_Out1406836432|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1406836432|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1406836432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1406836432, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1406836432, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1406836432, ~weak$$choice2~0=~weak$$choice2~0_In1406836432} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1406836432|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1406836432|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1406836432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1406836432, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1406836432, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1406836432, ~weak$$choice2~0=~weak$$choice2~0_In1406836432} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 17:49:21,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L798-->L799: Formula: (and (not (= (mod v_~weak$$choice2~0_21 256) 0)) (= v_~a$r_buff0_thd3~0_104 v_~a$r_buff0_thd3~0_103)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_103, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:49:21,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L801-->L805: Formula: (and (= v_~a$flush_delayed~0_9 0) (= v_~a~0_54 v_~a$mem_tmp~0_7) (not (= (mod v_~a$flush_delayed~0_10 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_54, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 17:49:21,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L805-2-->L805-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In1871253811 256))) (.cse0 (= (mod ~a$r_buff1_thd3~0_In1871253811 256) 0))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In1871253811 |P2Thread1of1ForFork0_#t~ite38_Out1871253811|)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1871253811| ~a~0_In1871253811) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In1871253811, ~a$w_buff1~0=~a$w_buff1~0_In1871253811, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1871253811, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1871253811} OutVars{~a~0=~a~0_In1871253811, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1871253811|, ~a$w_buff1~0=~a$w_buff1~0_In1871253811, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1871253811, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1871253811} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:49:21,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L805-4-->L806: Formula: (= v_~a~0_21 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_21, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:49:21,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L806-->L806-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1526973204 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-1526973204 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-1526973204| 0)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1526973204| ~a$w_buff0_used~0_In-1526973204) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1526973204, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1526973204} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1526973204|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1526973204, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1526973204} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:49:21,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L807-->L807-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd3~0_In29645117 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In29645117 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In29645117 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In29645117 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out29645117| 0)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out29645117| ~a$w_buff1_used~0_In29645117) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In29645117, ~a$w_buff0_used~0=~a$w_buff0_used~0_In29645117, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In29645117, ~a$w_buff1_used~0=~a$w_buff1_used~0_In29645117} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In29645117, ~a$w_buff0_used~0=~a$w_buff0_used~0_In29645117, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In29645117, ~a$w_buff1_used~0=~a$w_buff1_used~0_In29645117, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out29645117|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:49:21,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1320994 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1320994 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1320994| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1320994| ~a$r_buff0_thd3~0_In-1320994)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1320994, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1320994} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1320994, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1320994, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1320994|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:49:21,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L809-->L809-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In-248741326 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-248741326 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In-248741326 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In-248741326 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In-248741326 |P2Thread1of1ForFork0_#t~ite43_Out-248741326|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-248741326|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-248741326, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-248741326, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-248741326, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-248741326} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-248741326|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-248741326, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-248741326, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-248741326, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-248741326} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:49:21,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L809-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_50 (+ v_~__unbuffered_cnt~0_51 1)) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_125 |v_P2Thread1of1ForFork0_#t~ite43_26|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_25|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:49:21,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1982293883 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In1982293883 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1982293883|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1982293883 |P0Thread1of1ForFork1_#t~ite5_Out1982293883|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1982293883, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1982293883} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1982293883|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1982293883, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1982293883} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:49:21,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L748-->L748-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-441933629 256))) (.cse0 (= (mod ~a$r_buff1_thd1~0_In-441933629 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-441933629 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-441933629 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-441933629|)) (and (= ~a$w_buff1_used~0_In-441933629 |P0Thread1of1ForFork1_#t~ite6_Out-441933629|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-441933629, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-441933629, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-441933629, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-441933629} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-441933629|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-441933629, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-441933629, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-441933629, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-441933629} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:49:21,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L749-->L750: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1897187168 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out1897187168 ~a$r_buff0_thd1~0_In1897187168)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1897187168 256)))) (or (and (not .cse0) (not .cse1) (= ~a$r_buff0_thd1~0_Out1897187168 0)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1897187168, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1897187168} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1897187168|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1897187168, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1897187168} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:49:21,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-506376711 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In-506376711 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-506376711 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd1~0_In-506376711 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out-506376711| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-506376711| ~a$r_buff1_thd1~0_In-506376711) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-506376711, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-506376711, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-506376711, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-506376711} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-506376711|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-506376711, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-506376711, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-506376711, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-506376711} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:49:21,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= v_~a$r_buff1_thd1~0_97 |v_P0Thread1of1ForFork1_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_35|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_97, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:49:21,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd2~0_In-500243088 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-500243088 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-500243088 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-500243088 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-500243088|)) (and (= ~a$r_buff1_thd2~0_In-500243088 |P1Thread1of1ForFork2_#t~ite14_Out-500243088|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-500243088, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-500243088, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-500243088, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-500243088} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-500243088, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-500243088, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-500243088, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-500243088, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-500243088|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:49:21,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_74) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_74, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:49:21,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L836-->L838-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~a$r_buff0_thd0~0_58 256)) (= (mod v_~a$w_buff0_used~0_319 256) 0))) InVars {~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:49:21,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L838-2-->L838-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In-549275688 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-549275688 256) 0))) (or (and (= ~a$w_buff1~0_In-549275688 |ULTIMATE.start_main_#t~ite47_Out-549275688|) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite47_Out-549275688| ~a~0_In-549275688) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In-549275688, ~a$w_buff1~0=~a$w_buff1~0_In-549275688, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-549275688, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-549275688} OutVars{~a~0=~a~0_In-549275688, ~a$w_buff1~0=~a$w_buff1~0_In-549275688, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-549275688|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-549275688, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-549275688} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 17:49:21,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L838-4-->L839: Formula: (= v_~a~0_33 |v_ULTIMATE.start_main_#t~ite47_7|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|} OutVars{~a~0=v_~a~0_33, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:49:21,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L839-->L839-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1984533797 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1984533797 256) 0))) (or (and (= ~a$w_buff0_used~0_In1984533797 |ULTIMATE.start_main_#t~ite49_Out1984533797|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out1984533797|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1984533797, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1984533797} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1984533797, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1984533797|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1984533797} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:49:21,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L840-->L840-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-593402618 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-593402618 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-593402618 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-593402618 256)))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-593402618| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-593402618 |ULTIMATE.start_main_#t~ite50_Out-593402618|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-593402618, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-593402618, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-593402618, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-593402618} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-593402618|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-593402618, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-593402618, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-593402618, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-593402618} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:49:21,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L841-->L841-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-490417550 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-490417550 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-490417550|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$r_buff0_thd0~0_In-490417550 |ULTIMATE.start_main_#t~ite51_Out-490417550|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-490417550, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-490417550} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-490417550|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-490417550, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-490417550} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:49:21,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L842-->L842-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In-1849536852 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1849536852 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1849536852 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1849536852 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-1849536852|)) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-1849536852| ~a$r_buff1_thd0~0_In-1849536852) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1849536852, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1849536852, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1849536852, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1849536852} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1849536852|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1849536852, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1849536852, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1849536852, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1849536852} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:49:21,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L842-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9| (mod v_~main$tmp_guard1~0_16 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_25 0) (= v_~y~0_24 2) (= v_~x~0_88 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_16) (= v_~a$r_buff1_thd0~0_114 |v_ULTIMATE.start_main_#t~ite52_42|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_41|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_13, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_114, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:49:21,101 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_851585d0-6001-4195-aae3-1a034e0ab007/bin/uautomizer/witness.graphml [2019-12-07 17:49:21,101 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:49:21,103 INFO L168 Benchmark]: Toolchain (without parser) took 101520.78 ms. Allocated memory was 1.0 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 940.8 MB in the beginning and 4.3 GB in the end (delta: -3.4 GB). Peak memory consumption was 2.9 GB. Max. memory is 11.5 GB. [2019-12-07 17:49:21,103 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:49:21,103 INFO L168 Benchmark]: CACSL2BoogieTranslator took 385.22 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.8 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -122.3 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. [2019-12-07 17:49:21,104 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:49:21,104 INFO L168 Benchmark]: Boogie Preprocessor took 25.80 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:49:21,104 INFO L168 Benchmark]: RCFGBuilder took 405.15 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 17:49:21,105 INFO L168 Benchmark]: TraceAbstraction took 100583.54 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.1 GB). Free memory was 1.0 GB in the beginning and 4.4 GB in the end (delta: -3.4 GB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. [2019-12-07 17:49:21,105 INFO L168 Benchmark]: Witness Printer took 78.97 ms. Allocated memory is still 7.3 GB. Free memory was 4.4 GB in the beginning and 4.3 GB in the end (delta: 40.9 MB). Peak memory consumption was 40.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:49:21,107 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 385.22 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.8 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -122.3 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.80 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 405.15 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 100583.54 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.1 GB). Free memory was 1.0 GB in the beginning and 4.4 GB in the end (delta: -3.4 GB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. * Witness Printer took 78.97 ms. Allocated memory is still 7.3 GB. Free memory was 4.4 GB in the beginning and 4.3 GB in the end (delta: 40.9 MB). Peak memory consumption was 40.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 176 ProgramPointsBefore, 94 ProgramPointsAfterwards, 213 TransitionsBefore, 104 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 33 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 31 ChoiceCompositions, 7291 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 34 SemBasedMoverChecksPositive, 267 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 81673 CheckedPairsTotal, 115 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L828] FCALL, FORK 0 pthread_create(&t1199, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L731] 1 a$w_buff1 = a$w_buff0 [L732] 1 a$w_buff0 = 1 [L733] 1 a$w_buff1_used = a$w_buff0_used [L734] 1 a$w_buff0_used = (_Bool)1 [L746] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L830] FCALL, FORK 0 pthread_create(&t1200, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L760] 2 x = 2 [L763] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L766] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L832] FCALL, FORK 0 pthread_create(&t1201, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L780] 3 y = 2 [L783] 3 z = 1 [L786] 3 __unbuffered_p2_EAX = z [L789] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L790] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L791] 3 a$flush_delayed = weak$$choice2 [L792] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L793] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L793] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L766] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L767] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L768] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L794] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L795] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=2, y=2, z=1] [L795] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L796] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L797] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=1] [L797] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L799] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=1] [L799] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L800] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L805] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L806] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L807] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L808] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L746] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L747] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L748] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L769] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L834] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L839] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L840] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L841] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 100.3s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 18.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5711 SDtfs, 7433 SDslu, 21311 SDs, 0 SdLazy, 10504 SolverSat, 305 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 313 GetRequests, 36 SyntacticMatches, 15 SemanticMatches, 262 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1573 ImplicationChecksByTransitivity, 2.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=213814occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 60.2s AutomataMinimizationTime, 25 MinimizatonAttempts, 237603 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 1101 NumberOfCodeBlocks, 1101 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 1009 ConstructedInterpolants, 0 QuantifiedInterpolants, 234669 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...