./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix045_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix045_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 619e29b9694bcc593d582579af07ed2d0e6503f0 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:54:38,245 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:54:38,246 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:54:38,254 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:54:38,254 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:54:38,254 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:54:38,255 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:54:38,257 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:54:38,258 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:54:38,258 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:54:38,259 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:54:38,260 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:54:38,260 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:54:38,261 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:54:38,261 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:54:38,262 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:54:38,263 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:54:38,263 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:54:38,265 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:54:38,267 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:54:38,268 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:54:38,268 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:54:38,269 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:54:38,270 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:54:38,271 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:54:38,272 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:54:38,272 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:54:38,272 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:54:38,272 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:54:38,273 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:54:38,273 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:54:38,274 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:54:38,274 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:54:38,274 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:54:38,275 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:54:38,275 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:54:38,275 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:54:38,276 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:54:38,276 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:54:38,276 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:54:38,277 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:54:38,277 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:54:38,286 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:54:38,287 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:54:38,287 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:54:38,287 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:54:38,287 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:54:38,288 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:54:38,288 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:54:38,288 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:54:38,288 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:54:38,288 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:54:38,288 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:54:38,288 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:54:38,288 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:54:38,288 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:54:38,289 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:54:38,289 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:54:38,289 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:54:38,289 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:54:38,289 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:54:38,289 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:54:38,289 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:54:38,289 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:54:38,289 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:54:38,290 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:54:38,290 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:54:38,290 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:54:38,290 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:54:38,290 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:54:38,290 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:54:38,290 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 619e29b9694bcc593d582579af07ed2d0e6503f0 [2019-12-07 18:54:38,392 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:54:38,402 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:54:38,404 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:54:38,406 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:54:38,406 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:54:38,407 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix045_rmo.oepc.i [2019-12-07 18:54:38,453 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/data/ebd00a450/738901be5a76418c903f65a83eb2a14e/FLAGf4e8fb715 [2019-12-07 18:54:38,827 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:54:38,828 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/sv-benchmarks/c/pthread-wmm/mix045_rmo.oepc.i [2019-12-07 18:54:38,838 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/data/ebd00a450/738901be5a76418c903f65a83eb2a14e/FLAGf4e8fb715 [2019-12-07 18:54:38,846 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/data/ebd00a450/738901be5a76418c903f65a83eb2a14e [2019-12-07 18:54:38,848 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:54:38,849 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:54:38,850 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:54:38,850 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:54:38,852 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:54:38,852 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:54:38" (1/1) ... [2019-12-07 18:54:38,854 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:38, skipping insertion in model container [2019-12-07 18:54:38,854 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:54:38" (1/1) ... [2019-12-07 18:54:38,859 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:54:38,884 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:54:39,135 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:54:39,143 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:54:39,187 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:54:39,232 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:54:39,232 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39 WrapperNode [2019-12-07 18:54:39,232 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:54:39,233 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:54:39,233 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:54:39,233 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:54:39,238 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39" (1/1) ... [2019-12-07 18:54:39,253 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39" (1/1) ... [2019-12-07 18:54:39,272 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:54:39,272 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:54:39,273 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:54:39,273 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:54:39,279 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39" (1/1) ... [2019-12-07 18:54:39,279 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39" (1/1) ... [2019-12-07 18:54:39,282 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39" (1/1) ... [2019-12-07 18:54:39,283 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39" (1/1) ... [2019-12-07 18:54:39,293 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39" (1/1) ... [2019-12-07 18:54:39,297 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39" (1/1) ... [2019-12-07 18:54:39,300 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39" (1/1) ... [2019-12-07 18:54:39,304 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:54:39,304 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:54:39,305 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:54:39,305 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:54:39,305 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:54:39,345 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:54:39,345 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:54:39,345 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:54:39,345 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:54:39,345 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:54:39,346 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:54:39,346 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:54:39,346 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:54:39,346 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:54:39,346 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:54:39,346 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:54:39,346 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:54:39,346 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:54:39,347 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:54:39,702 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:54:39,702 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:54:39,703 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:54:39 BoogieIcfgContainer [2019-12-07 18:54:39,703 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:54:39,704 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:54:39,704 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:54:39,705 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:54:39,706 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:54:38" (1/3) ... [2019-12-07 18:54:39,706 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@63577e58 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:54:39, skipping insertion in model container [2019-12-07 18:54:39,706 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:54:39" (2/3) ... [2019-12-07 18:54:39,707 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@63577e58 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:54:39, skipping insertion in model container [2019-12-07 18:54:39,707 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:54:39" (3/3) ... [2019-12-07 18:54:39,708 INFO L109 eAbstractionObserver]: Analyzing ICFG mix045_rmo.oepc.i [2019-12-07 18:54:39,714 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:54:39,714 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:54:39,719 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:54:39,720 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:54:39,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,745 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,745 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,745 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,746 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,746 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,746 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,746 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,746 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,746 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,746 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,747 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,747 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,747 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,747 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,747 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,747 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,747 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,747 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,747 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,748 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,748 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,748 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,748 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,748 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,748 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,748 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,748 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,749 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,749 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,749 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,749 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,749 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,749 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,749 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,750 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,750 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,750 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,751 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,752 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,753 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,753 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,753 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,754 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,754 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,754 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,755 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,756 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,757 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,758 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,759 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,760 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,761 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:54:39,779 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:54:39,792 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:54:39,793 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:54:39,793 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:54:39,793 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:54:39,793 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:54:39,793 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:54:39,793 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:54:39,793 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:54:39,805 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 18:54:39,806 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 18:54:39,871 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 18:54:39,872 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:54:39,882 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 709 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:54:39,898 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 18:54:39,926 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 18:54:39,926 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:54:39,931 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 709 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:54:39,947 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:54:39,948 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:54:42,839 WARN L192 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 18:54:43,013 WARN L192 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 18:54:43,116 INFO L206 etLargeBlockEncoding]: Checked pairs total: 81673 [2019-12-07 18:54:43,116 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2019-12-07 18:54:43,119 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 104 transitions [2019-12-07 18:54:58,793 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 117422 states. [2019-12-07 18:54:58,794 INFO L276 IsEmpty]: Start isEmpty. Operand 117422 states. [2019-12-07 18:54:58,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:54:58,798 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:54:58,799 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:54:58,799 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:54:58,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:54:58,803 INFO L82 PathProgramCache]: Analyzing trace with hash 914906, now seen corresponding path program 1 times [2019-12-07 18:54:58,808 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:54:58,809 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [900122625] [2019-12-07 18:54:58,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:54:58,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:54:58,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:54:58,936 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [900122625] [2019-12-07 18:54:58,936 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:54:58,937 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:54:58,937 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [671343114] [2019-12-07 18:54:58,940 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:54:58,940 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:54:58,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:54:58,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:54:58,951 INFO L87 Difference]: Start difference. First operand 117422 states. Second operand 3 states. [2019-12-07 18:54:59,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:54:59,675 INFO L93 Difference]: Finished difference Result 116592 states and 500276 transitions. [2019-12-07 18:54:59,675 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:54:59,676 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:54:59,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:00,163 INFO L225 Difference]: With dead ends: 116592 [2019-12-07 18:55:00,163 INFO L226 Difference]: Without dead ends: 109832 [2019-12-07 18:55:00,164 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:04,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109832 states. [2019-12-07 18:55:07,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109832 to 109832. [2019-12-07 18:55:07,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109832 states. [2019-12-07 18:55:07,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109832 states to 109832 states and 470688 transitions. [2019-12-07 18:55:07,380 INFO L78 Accepts]: Start accepts. Automaton has 109832 states and 470688 transitions. Word has length 3 [2019-12-07 18:55:07,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:07,381 INFO L462 AbstractCegarLoop]: Abstraction has 109832 states and 470688 transitions. [2019-12-07 18:55:07,381 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:07,381 INFO L276 IsEmpty]: Start isEmpty. Operand 109832 states and 470688 transitions. [2019-12-07 18:55:07,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:55:07,385 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:07,385 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:07,386 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:07,386 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:07,386 INFO L82 PathProgramCache]: Analyzing trace with hash -406604938, now seen corresponding path program 1 times [2019-12-07 18:55:07,386 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:07,386 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725883727] [2019-12-07 18:55:07,387 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:07,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:07,456 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:07,456 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1725883727] [2019-12-07 18:55:07,456 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:07,457 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:07,457 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059702067] [2019-12-07 18:55:07,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:55:07,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:07,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:55:07,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:55:07,458 INFO L87 Difference]: Start difference. First operand 109832 states and 470688 transitions. Second operand 4 states. [2019-12-07 18:55:08,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:08,711 INFO L93 Difference]: Finished difference Result 175346 states and 720050 transitions. [2019-12-07 18:55:08,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:55:08,712 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:55:08,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:09,190 INFO L225 Difference]: With dead ends: 175346 [2019-12-07 18:55:09,190 INFO L226 Difference]: Without dead ends: 175297 [2019-12-07 18:55:09,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:14,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175297 states. [2019-12-07 18:55:18,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175297 to 159417. [2019-12-07 18:55:18,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159417 states. [2019-12-07 18:55:19,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159417 states to 159417 states and 663570 transitions. [2019-12-07 18:55:19,154 INFO L78 Accepts]: Start accepts. Automaton has 159417 states and 663570 transitions. Word has length 11 [2019-12-07 18:55:19,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:19,154 INFO L462 AbstractCegarLoop]: Abstraction has 159417 states and 663570 transitions. [2019-12-07 18:55:19,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:55:19,154 INFO L276 IsEmpty]: Start isEmpty. Operand 159417 states and 663570 transitions. [2019-12-07 18:55:19,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:55:19,159 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:19,159 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:19,159 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:19,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:19,159 INFO L82 PathProgramCache]: Analyzing trace with hash 901712968, now seen corresponding path program 1 times [2019-12-07 18:55:19,160 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:19,160 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742291410] [2019-12-07 18:55:19,160 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:19,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:19,207 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:19,207 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [742291410] [2019-12-07 18:55:19,208 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:19,208 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:19,208 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1125500076] [2019-12-07 18:55:19,208 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:55:19,208 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:19,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:55:19,208 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:55:19,208 INFO L87 Difference]: Start difference. First operand 159417 states and 663570 transitions. Second operand 4 states. [2019-12-07 18:55:20,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:20,616 INFO L93 Difference]: Finished difference Result 224613 states and 913627 transitions. [2019-12-07 18:55:20,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:55:20,617 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:55:20,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:21,229 INFO L225 Difference]: With dead ends: 224613 [2019-12-07 18:55:21,230 INFO L226 Difference]: Without dead ends: 224557 [2019-12-07 18:55:21,230 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:27,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224557 states. [2019-12-07 18:55:32,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224557 to 189220. [2019-12-07 18:55:32,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189220 states. [2019-12-07 18:55:33,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189220 states to 189220 states and 783364 transitions. [2019-12-07 18:55:33,261 INFO L78 Accepts]: Start accepts. Automaton has 189220 states and 783364 transitions. Word has length 13 [2019-12-07 18:55:33,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:33,261 INFO L462 AbstractCegarLoop]: Abstraction has 189220 states and 783364 transitions. [2019-12-07 18:55:33,262 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:55:33,262 INFO L276 IsEmpty]: Start isEmpty. Operand 189220 states and 783364 transitions. [2019-12-07 18:55:33,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:55:33,269 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:33,269 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:33,269 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:33,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:33,269 INFO L82 PathProgramCache]: Analyzing trace with hash -100341528, now seen corresponding path program 1 times [2019-12-07 18:55:33,270 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:33,270 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094553184] [2019-12-07 18:55:33,270 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:33,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:33,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:33,330 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2094553184] [2019-12-07 18:55:33,330 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:33,330 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:55:33,331 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766059534] [2019-12-07 18:55:33,331 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:33,331 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:33,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:33,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:33,331 INFO L87 Difference]: Start difference. First operand 189220 states and 783364 transitions. Second operand 5 states. [2019-12-07 18:55:35,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:35,089 INFO L93 Difference]: Finished difference Result 258403 states and 1058469 transitions. [2019-12-07 18:55:35,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:55:35,090 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:55:35,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:35,794 INFO L225 Difference]: With dead ends: 258403 [2019-12-07 18:55:35,794 INFO L226 Difference]: Without dead ends: 258403 [2019-12-07 18:55:35,794 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:55:42,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 258403 states. [2019-12-07 18:55:46,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 258403 to 213814. [2019-12-07 18:55:46,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213814 states. [2019-12-07 18:55:46,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213814 states to 213814 states and 884433 transitions. [2019-12-07 18:55:46,758 INFO L78 Accepts]: Start accepts. Automaton has 213814 states and 884433 transitions. Word has length 16 [2019-12-07 18:55:46,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:46,759 INFO L462 AbstractCegarLoop]: Abstraction has 213814 states and 884433 transitions. [2019-12-07 18:55:46,759 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:55:46,759 INFO L276 IsEmpty]: Start isEmpty. Operand 213814 states and 884433 transitions. [2019-12-07 18:55:46,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:55:46,772 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:46,772 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:46,772 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:46,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:46,772 INFO L82 PathProgramCache]: Analyzing trace with hash 1671186354, now seen corresponding path program 1 times [2019-12-07 18:55:46,772 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:46,773 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232528981] [2019-12-07 18:55:46,773 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:46,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:46,826 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:46,827 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [232528981] [2019-12-07 18:55:46,827 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:46,827 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:55:46,827 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [522561877] [2019-12-07 18:55:46,827 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:55:46,827 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:46,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:55:46,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:55:46,828 INFO L87 Difference]: Start difference. First operand 213814 states and 884433 transitions. Second operand 4 states. [2019-12-07 18:55:47,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:47,020 INFO L93 Difference]: Finished difference Result 54701 states and 188332 transitions. [2019-12-07 18:55:47,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:55:47,021 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 18:55:47,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:47,090 INFO L225 Difference]: With dead ends: 54701 [2019-12-07 18:55:47,090 INFO L226 Difference]: Without dead ends: 41366 [2019-12-07 18:55:47,091 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:47,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41366 states. [2019-12-07 18:55:47,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41366 to 41210. [2019-12-07 18:55:47,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41210 states. [2019-12-07 18:55:47,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41210 states to 41210 states and 134233 transitions. [2019-12-07 18:55:47,793 INFO L78 Accepts]: Start accepts. Automaton has 41210 states and 134233 transitions. Word has length 18 [2019-12-07 18:55:47,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:47,793 INFO L462 AbstractCegarLoop]: Abstraction has 41210 states and 134233 transitions. [2019-12-07 18:55:47,793 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:55:47,793 INFO L276 IsEmpty]: Start isEmpty. Operand 41210 states and 134233 transitions. [2019-12-07 18:55:47,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:55:47,798 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:47,798 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:47,798 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:47,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:47,799 INFO L82 PathProgramCache]: Analyzing trace with hash -914144456, now seen corresponding path program 1 times [2019-12-07 18:55:47,799 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:47,799 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437416205] [2019-12-07 18:55:47,799 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:47,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:47,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:47,859 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1437416205] [2019-12-07 18:55:47,859 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:47,859 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:55:47,860 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1197539202] [2019-12-07 18:55:47,860 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:55:47,860 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:47,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:55:47,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:47,860 INFO L87 Difference]: Start difference. First operand 41210 states and 134233 transitions. Second operand 6 states. [2019-12-07 18:55:48,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:48,517 INFO L93 Difference]: Finished difference Result 61979 states and 196401 transitions. [2019-12-07 18:55:48,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:55:48,518 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 18:55:48,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:48,609 INFO L225 Difference]: With dead ends: 61979 [2019-12-07 18:55:48,609 INFO L226 Difference]: Without dead ends: 61923 [2019-12-07 18:55:48,609 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:55:48,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61923 states. [2019-12-07 18:55:49,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61923 to 40802. [2019-12-07 18:55:49,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40802 states. [2019-12-07 18:55:49,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40802 states to 40802 states and 132028 transitions. [2019-12-07 18:55:49,686 INFO L78 Accepts]: Start accepts. Automaton has 40802 states and 132028 transitions. Word has length 22 [2019-12-07 18:55:49,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:49,686 INFO L462 AbstractCegarLoop]: Abstraction has 40802 states and 132028 transitions. [2019-12-07 18:55:49,686 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:55:49,686 INFO L276 IsEmpty]: Start isEmpty. Operand 40802 states and 132028 transitions. [2019-12-07 18:55:49,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:55:49,695 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:49,695 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:49,695 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:49,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:49,695 INFO L82 PathProgramCache]: Analyzing trace with hash 1197302566, now seen corresponding path program 1 times [2019-12-07 18:55:49,695 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:49,695 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [162547681] [2019-12-07 18:55:49,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:49,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:49,757 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:49,757 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [162547681] [2019-12-07 18:55:49,758 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:49,758 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:55:49,758 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [993229242] [2019-12-07 18:55:49,758 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:49,758 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:49,758 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:49,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:49,759 INFO L87 Difference]: Start difference. First operand 40802 states and 132028 transitions. Second operand 5 states. [2019-12-07 18:55:50,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:50,142 INFO L93 Difference]: Finished difference Result 57427 states and 181950 transitions. [2019-12-07 18:55:50,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:55:50,142 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:55:50,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:50,227 INFO L225 Difference]: With dead ends: 57427 [2019-12-07 18:55:50,228 INFO L226 Difference]: Without dead ends: 57414 [2019-12-07 18:55:50,228 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:55:50,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57414 states. [2019-12-07 18:55:51,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57414 to 48490. [2019-12-07 18:55:51,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48490 states. [2019-12-07 18:55:51,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48490 states to 48490 states and 156356 transitions. [2019-12-07 18:55:51,109 INFO L78 Accepts]: Start accepts. Automaton has 48490 states and 156356 transitions. Word has length 25 [2019-12-07 18:55:51,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:51,109 INFO L462 AbstractCegarLoop]: Abstraction has 48490 states and 156356 transitions. [2019-12-07 18:55:51,109 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:55:51,109 INFO L276 IsEmpty]: Start isEmpty. Operand 48490 states and 156356 transitions. [2019-12-07 18:55:51,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:55:51,122 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:51,122 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:51,122 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:51,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:51,122 INFO L82 PathProgramCache]: Analyzing trace with hash 1712753165, now seen corresponding path program 1 times [2019-12-07 18:55:51,123 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:51,123 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [660413676] [2019-12-07 18:55:51,123 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:51,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:51,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:51,167 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [660413676] [2019-12-07 18:55:51,167 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:51,167 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:55:51,167 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [671307889] [2019-12-07 18:55:51,168 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:55:51,168 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:51,168 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:55:51,168 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:51,168 INFO L87 Difference]: Start difference. First operand 48490 states and 156356 transitions. Second operand 6 states. [2019-12-07 18:55:51,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:51,651 INFO L93 Difference]: Finished difference Result 69645 states and 219491 transitions. [2019-12-07 18:55:51,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:55:51,652 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:55:51,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:51,753 INFO L225 Difference]: With dead ends: 69645 [2019-12-07 18:55:51,753 INFO L226 Difference]: Without dead ends: 69295 [2019-12-07 18:55:51,753 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:55:52,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69295 states. [2019-12-07 18:55:52,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69295 to 52673. [2019-12-07 18:55:52,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52673 states. [2019-12-07 18:55:52,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52673 states to 52673 states and 169416 transitions. [2019-12-07 18:55:52,782 INFO L78 Accepts]: Start accepts. Automaton has 52673 states and 169416 transitions. Word has length 27 [2019-12-07 18:55:52,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:52,782 INFO L462 AbstractCegarLoop]: Abstraction has 52673 states and 169416 transitions. [2019-12-07 18:55:52,782 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:55:52,782 INFO L276 IsEmpty]: Start isEmpty. Operand 52673 states and 169416 transitions. [2019-12-07 18:55:52,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:55:52,797 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:52,798 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:52,798 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:52,798 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:52,798 INFO L82 PathProgramCache]: Analyzing trace with hash 1736862478, now seen corresponding path program 1 times [2019-12-07 18:55:52,798 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:52,798 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1227179405] [2019-12-07 18:55:52,798 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:52,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:52,866 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:52,866 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1227179405] [2019-12-07 18:55:52,867 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:52,867 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:55:52,867 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1958931467] [2019-12-07 18:55:52,867 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:52,867 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:52,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:52,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:52,868 INFO L87 Difference]: Start difference. First operand 52673 states and 169416 transitions. Second operand 5 states. [2019-12-07 18:55:53,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:53,403 INFO L93 Difference]: Finished difference Result 69916 states and 222832 transitions. [2019-12-07 18:55:53,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:55:53,404 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 18:55:53,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:53,510 INFO L225 Difference]: With dead ends: 69916 [2019-12-07 18:55:53,510 INFO L226 Difference]: Without dead ends: 69916 [2019-12-07 18:55:53,510 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:53,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69916 states. [2019-12-07 18:55:54,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69916 to 62106. [2019-12-07 18:55:54,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62106 states. [2019-12-07 18:55:54,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62106 states to 62106 states and 199720 transitions. [2019-12-07 18:55:54,755 INFO L78 Accepts]: Start accepts. Automaton has 62106 states and 199720 transitions. Word has length 28 [2019-12-07 18:55:54,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:54,755 INFO L462 AbstractCegarLoop]: Abstraction has 62106 states and 199720 transitions. [2019-12-07 18:55:54,755 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:55:54,755 INFO L276 IsEmpty]: Start isEmpty. Operand 62106 states and 199720 transitions. [2019-12-07 18:55:54,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:55:54,776 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:54,776 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:54,776 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:54,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:54,776 INFO L82 PathProgramCache]: Analyzing trace with hash -733244850, now seen corresponding path program 1 times [2019-12-07 18:55:54,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:54,776 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138140446] [2019-12-07 18:55:54,776 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:54,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:54,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:54,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [138140446] [2019-12-07 18:55:54,828 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:54,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:55:54,828 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1663978030] [2019-12-07 18:55:54,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:55:54,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:54,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:55:54,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:54,829 INFO L87 Difference]: Start difference. First operand 62106 states and 199720 transitions. Second operand 5 states. [2019-12-07 18:55:54,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:54,938 INFO L93 Difference]: Finished difference Result 30993 states and 94434 transitions. [2019-12-07 18:55:54,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:55:54,938 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 18:55:54,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:54,973 INFO L225 Difference]: With dead ends: 30993 [2019-12-07 18:55:54,973 INFO L226 Difference]: Without dead ends: 26935 [2019-12-07 18:55:54,973 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:55:55,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26935 states. [2019-12-07 18:55:55,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26935 to 24835. [2019-12-07 18:55:55,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24835 states. [2019-12-07 18:55:55,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24835 states to 24835 states and 75492 transitions. [2019-12-07 18:55:55,358 INFO L78 Accepts]: Start accepts. Automaton has 24835 states and 75492 transitions. Word has length 29 [2019-12-07 18:55:55,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:55,358 INFO L462 AbstractCegarLoop]: Abstraction has 24835 states and 75492 transitions. [2019-12-07 18:55:55,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:55:55,358 INFO L276 IsEmpty]: Start isEmpty. Operand 24835 states and 75492 transitions. [2019-12-07 18:55:55,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:55:55,383 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:55,383 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:55,383 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:55,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:55,383 INFO L82 PathProgramCache]: Analyzing trace with hash 2004852157, now seen corresponding path program 1 times [2019-12-07 18:55:55,383 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:55,384 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [288303448] [2019-12-07 18:55:55,384 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:55,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:55,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:55,439 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [288303448] [2019-12-07 18:55:55,439 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:55,439 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:55:55,440 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899199722] [2019-12-07 18:55:55,440 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:55:55,440 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:55,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:55:55,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:55:55,440 INFO L87 Difference]: Start difference. First operand 24835 states and 75492 transitions. Second operand 7 states. [2019-12-07 18:55:56,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:56,059 INFO L93 Difference]: Finished difference Result 33769 states and 99968 transitions. [2019-12-07 18:55:56,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:55:56,059 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:55:56,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:56,097 INFO L225 Difference]: With dead ends: 33769 [2019-12-07 18:55:56,097 INFO L226 Difference]: Without dead ends: 33108 [2019-12-07 18:55:56,098 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:55:56,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33108 states. [2019-12-07 18:55:56,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33108 to 23320. [2019-12-07 18:55:56,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23320 states. [2019-12-07 18:55:56,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23320 states to 23320 states and 70708 transitions. [2019-12-07 18:55:56,487 INFO L78 Accepts]: Start accepts. Automaton has 23320 states and 70708 transitions. Word has length 33 [2019-12-07 18:55:56,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:56,487 INFO L462 AbstractCegarLoop]: Abstraction has 23320 states and 70708 transitions. [2019-12-07 18:55:56,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:55:56,487 INFO L276 IsEmpty]: Start isEmpty. Operand 23320 states and 70708 transitions. [2019-12-07 18:55:56,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:55:56,507 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:56,507 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:56,507 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:56,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:56,508 INFO L82 PathProgramCache]: Analyzing trace with hash 355565333, now seen corresponding path program 1 times [2019-12-07 18:55:56,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:56,508 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635158436] [2019-12-07 18:55:56,508 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:56,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:56,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:56,563 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635158436] [2019-12-07 18:55:56,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:56,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:55:56,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1612027640] [2019-12-07 18:55:56,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:55:56,564 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:56,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:55:56,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:56,565 INFO L87 Difference]: Start difference. First operand 23320 states and 70708 transitions. Second operand 6 states. [2019-12-07 18:55:57,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:57,111 INFO L93 Difference]: Finished difference Result 40369 states and 122974 transitions. [2019-12-07 18:55:57,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:55:57,111 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2019-12-07 18:55:57,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:57,158 INFO L225 Difference]: With dead ends: 40369 [2019-12-07 18:55:57,158 INFO L226 Difference]: Without dead ends: 40369 [2019-12-07 18:55:57,158 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:55:57,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40369 states. [2019-12-07 18:55:57,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40369 to 27161. [2019-12-07 18:55:57,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27161 states. [2019-12-07 18:55:57,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27161 states to 27161 states and 82912 transitions. [2019-12-07 18:55:57,638 INFO L78 Accepts]: Start accepts. Automaton has 27161 states and 82912 transitions. Word has length 39 [2019-12-07 18:55:57,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:57,639 INFO L462 AbstractCegarLoop]: Abstraction has 27161 states and 82912 transitions. [2019-12-07 18:55:57,639 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:55:57,639 INFO L276 IsEmpty]: Start isEmpty. Operand 27161 states and 82912 transitions. [2019-12-07 18:55:57,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:55:57,661 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:57,661 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:57,661 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:57,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:57,662 INFO L82 PathProgramCache]: Analyzing trace with hash -507092483, now seen corresponding path program 2 times [2019-12-07 18:55:57,662 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:57,662 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1857199980] [2019-12-07 18:55:57,662 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:57,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:57,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:57,704 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1857199980] [2019-12-07 18:55:57,704 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:57,704 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:57,704 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [452671078] [2019-12-07 18:55:57,705 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:55:57,705 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:57,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:55:57,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:57,705 INFO L87 Difference]: Start difference. First operand 27161 states and 82912 transitions. Second operand 3 states. [2019-12-07 18:55:57,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:57,769 INFO L93 Difference]: Finished difference Result 23320 states and 70009 transitions. [2019-12-07 18:55:57,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:55:57,769 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 18:55:57,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:57,796 INFO L225 Difference]: With dead ends: 23320 [2019-12-07 18:55:57,796 INFO L226 Difference]: Without dead ends: 23320 [2019-12-07 18:55:57,796 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:57,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23320 states. [2019-12-07 18:55:58,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23320 to 23204. [2019-12-07 18:55:58,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23204 states. [2019-12-07 18:55:58,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23204 states to 23204 states and 69687 transitions. [2019-12-07 18:55:58,248 INFO L78 Accepts]: Start accepts. Automaton has 23204 states and 69687 transitions. Word has length 39 [2019-12-07 18:55:58,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:58,248 INFO L462 AbstractCegarLoop]: Abstraction has 23204 states and 69687 transitions. [2019-12-07 18:55:58,249 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:58,249 INFO L276 IsEmpty]: Start isEmpty. Operand 23204 states and 69687 transitions. [2019-12-07 18:55:58,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:55:58,266 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:58,266 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:58,266 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:58,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:58,267 INFO L82 PathProgramCache]: Analyzing trace with hash -2112529684, now seen corresponding path program 1 times [2019-12-07 18:55:58,267 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:58,267 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661204855] [2019-12-07 18:55:58,267 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:58,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:58,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:58,320 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661204855] [2019-12-07 18:55:58,320 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:58,320 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:55:58,320 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1013556746] [2019-12-07 18:55:58,320 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:55:58,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:58,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:55:58,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:55:58,321 INFO L87 Difference]: Start difference. First operand 23204 states and 69687 transitions. Second operand 6 states. [2019-12-07 18:55:58,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:58,409 INFO L93 Difference]: Finished difference Result 21843 states and 66514 transitions. [2019-12-07 18:55:58,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:55:58,410 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 18:55:58,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:58,434 INFO L225 Difference]: With dead ends: 21843 [2019-12-07 18:55:58,434 INFO L226 Difference]: Without dead ends: 21639 [2019-12-07 18:55:58,435 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:55:58,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21639 states. [2019-12-07 18:55:58,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21639 to 19179. [2019-12-07 18:55:58,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19179 states. [2019-12-07 18:55:58,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19179 states to 19179 states and 58930 transitions. [2019-12-07 18:55:58,723 INFO L78 Accepts]: Start accepts. Automaton has 19179 states and 58930 transitions. Word has length 40 [2019-12-07 18:55:58,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:58,724 INFO L462 AbstractCegarLoop]: Abstraction has 19179 states and 58930 transitions. [2019-12-07 18:55:58,724 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:55:58,724 INFO L276 IsEmpty]: Start isEmpty. Operand 19179 states and 58930 transitions. [2019-12-07 18:55:58,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:55:58,740 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:58,740 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:58,740 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:58,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:58,740 INFO L82 PathProgramCache]: Analyzing trace with hash 1722690539, now seen corresponding path program 1 times [2019-12-07 18:55:58,740 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:58,740 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689333869] [2019-12-07 18:55:58,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:58,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:58,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:58,772 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689333869] [2019-12-07 18:55:58,773 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:58,773 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:55:58,773 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [279482062] [2019-12-07 18:55:58,773 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:55:58,773 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:58,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:55:58,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:58,773 INFO L87 Difference]: Start difference. First operand 19179 states and 58930 transitions. Second operand 3 states. [2019-12-07 18:55:58,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:58,857 INFO L93 Difference]: Finished difference Result 27669 states and 83809 transitions. [2019-12-07 18:55:58,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:55:58,858 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:55:58,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:58,893 INFO L225 Difference]: With dead ends: 27669 [2019-12-07 18:55:58,893 INFO L226 Difference]: Without dead ends: 27669 [2019-12-07 18:55:58,893 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:58,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27669 states. [2019-12-07 18:55:59,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27669 to 20502. [2019-12-07 18:55:59,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20502 states. [2019-12-07 18:55:59,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20502 states to 20502 states and 62815 transitions. [2019-12-07 18:55:59,233 INFO L78 Accepts]: Start accepts. Automaton has 20502 states and 62815 transitions. Word has length 65 [2019-12-07 18:55:59,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:59,233 INFO L462 AbstractCegarLoop]: Abstraction has 20502 states and 62815 transitions. [2019-12-07 18:55:59,233 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:59,233 INFO L276 IsEmpty]: Start isEmpty. Operand 20502 states and 62815 transitions. [2019-12-07 18:55:59,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:55:59,250 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:59,250 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:59,250 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:59,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:59,250 INFO L82 PathProgramCache]: Analyzing trace with hash 1344705301, now seen corresponding path program 1 times [2019-12-07 18:55:59,251 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:59,251 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1400136606] [2019-12-07 18:55:59,251 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:59,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:59,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:59,288 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1400136606] [2019-12-07 18:55:59,289 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:59,289 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:59,289 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831920844] [2019-12-07 18:55:59,289 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:55:59,289 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:59,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:55:59,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:59,290 INFO L87 Difference]: Start difference. First operand 20502 states and 62815 transitions. Second operand 3 states. [2019-12-07 18:55:59,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:59,376 INFO L93 Difference]: Finished difference Result 25895 states and 78926 transitions. [2019-12-07 18:55:59,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:55:59,377 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:55:59,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:59,408 INFO L225 Difference]: With dead ends: 25895 [2019-12-07 18:55:59,409 INFO L226 Difference]: Without dead ends: 25895 [2019-12-07 18:55:59,409 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:59,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25895 states. [2019-12-07 18:55:59,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25895 to 21362. [2019-12-07 18:55:59,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21362 states. [2019-12-07 18:55:59,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21362 states to 21362 states and 65730 transitions. [2019-12-07 18:55:59,738 INFO L78 Accepts]: Start accepts. Automaton has 21362 states and 65730 transitions. Word has length 65 [2019-12-07 18:55:59,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:59,738 INFO L462 AbstractCegarLoop]: Abstraction has 21362 states and 65730 transitions. [2019-12-07 18:55:59,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:59,739 INFO L276 IsEmpty]: Start isEmpty. Operand 21362 states and 65730 transitions. [2019-12-07 18:55:59,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:55:59,756 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:59,756 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:59,756 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:59,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:59,757 INFO L82 PathProgramCache]: Analyzing trace with hash 1076949878, now seen corresponding path program 1 times [2019-12-07 18:55:59,757 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:59,757 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501917075] [2019-12-07 18:55:59,757 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:59,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:59,894 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:59,894 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501917075] [2019-12-07 18:55:59,894 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:59,894 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:55:59,894 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [962897238] [2019-12-07 18:55:59,894 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:55:59,895 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:59,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:55:59,895 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:55:59,895 INFO L87 Difference]: Start difference. First operand 21362 states and 65730 transitions. Second operand 9 states. [2019-12-07 18:56:01,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:01,677 INFO L93 Difference]: Finished difference Result 35043 states and 105082 transitions. [2019-12-07 18:56:01,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 18:56:01,678 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 18:56:01,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:01,716 INFO L225 Difference]: With dead ends: 35043 [2019-12-07 18:56:01,716 INFO L226 Difference]: Without dead ends: 35043 [2019-12-07 18:56:01,717 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 13 SyntacticMatches, 5 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 580 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=300, Invalid=1680, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 18:56:01,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35043 states. [2019-12-07 18:56:02,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35043 to 20240. [2019-12-07 18:56:02,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20240 states. [2019-12-07 18:56:02,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20240 states to 20240 states and 62230 transitions. [2019-12-07 18:56:02,093 INFO L78 Accepts]: Start accepts. Automaton has 20240 states and 62230 transitions. Word has length 66 [2019-12-07 18:56:02,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:02,093 INFO L462 AbstractCegarLoop]: Abstraction has 20240 states and 62230 transitions. [2019-12-07 18:56:02,093 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:56:02,093 INFO L276 IsEmpty]: Start isEmpty. Operand 20240 states and 62230 transitions. [2019-12-07 18:56:02,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:56:02,110 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:02,110 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:02,110 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:02,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:02,110 INFO L82 PathProgramCache]: Analyzing trace with hash 1019646326, now seen corresponding path program 2 times [2019-12-07 18:56:02,110 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:02,110 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886196776] [2019-12-07 18:56:02,111 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:02,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:02,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:02,162 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1886196776] [2019-12-07 18:56:02,162 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:02,162 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:56:02,163 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213653233] [2019-12-07 18:56:02,163 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:56:02,163 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:02,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:56:02,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:02,163 INFO L87 Difference]: Start difference. First operand 20240 states and 62230 transitions. Second operand 3 states. [2019-12-07 18:56:02,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:02,213 INFO L93 Difference]: Finished difference Result 20239 states and 62228 transitions. [2019-12-07 18:56:02,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:56:02,214 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:56:02,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:02,235 INFO L225 Difference]: With dead ends: 20239 [2019-12-07 18:56:02,235 INFO L226 Difference]: Without dead ends: 20239 [2019-12-07 18:56:02,235 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:02,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20239 states. [2019-12-07 18:56:02,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20239 to 15386. [2019-12-07 18:56:02,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15386 states. [2019-12-07 18:56:02,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15386 states to 15386 states and 48302 transitions. [2019-12-07 18:56:02,649 INFO L78 Accepts]: Start accepts. Automaton has 15386 states and 48302 transitions. Word has length 66 [2019-12-07 18:56:02,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:02,649 INFO L462 AbstractCegarLoop]: Abstraction has 15386 states and 48302 transitions. [2019-12-07 18:56:02,649 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:56:02,649 INFO L276 IsEmpty]: Start isEmpty. Operand 15386 states and 48302 transitions. [2019-12-07 18:56:02,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:02,662 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:02,663 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:02,663 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:02,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:02,663 INFO L82 PathProgramCache]: Analyzing trace with hash 284301030, now seen corresponding path program 1 times [2019-12-07 18:56:02,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:02,663 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [874244828] [2019-12-07 18:56:02,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:02,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:02,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:02,836 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [874244828] [2019-12-07 18:56:02,836 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:02,836 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:56:02,836 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [561891285] [2019-12-07 18:56:02,837 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:56:02,837 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:02,837 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:56:02,837 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:56:02,837 INFO L87 Difference]: Start difference. First operand 15386 states and 48302 transitions. Second operand 11 states. [2019-12-07 18:56:03,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:03,653 INFO L93 Difference]: Finished difference Result 46776 states and 146999 transitions. [2019-12-07 18:56:03,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 18:56:03,653 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:56:03,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:03,699 INFO L225 Difference]: With dead ends: 46776 [2019-12-07 18:56:03,700 INFO L226 Difference]: Without dead ends: 40222 [2019-12-07 18:56:03,700 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 348 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=271, Invalid=1135, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 18:56:03,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40222 states. [2019-12-07 18:56:04,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40222 to 22422. [2019-12-07 18:56:04,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22422 states. [2019-12-07 18:56:04,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22422 states to 22422 states and 70557 transitions. [2019-12-07 18:56:04,159 INFO L78 Accepts]: Start accepts. Automaton has 22422 states and 70557 transitions. Word has length 67 [2019-12-07 18:56:04,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:04,159 INFO L462 AbstractCegarLoop]: Abstraction has 22422 states and 70557 transitions. [2019-12-07 18:56:04,159 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:56:04,159 INFO L276 IsEmpty]: Start isEmpty. Operand 22422 states and 70557 transitions. [2019-12-07 18:56:04,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:04,178 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:04,178 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:04,179 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:04,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:04,179 INFO L82 PathProgramCache]: Analyzing trace with hash 1337361878, now seen corresponding path program 2 times [2019-12-07 18:56:04,179 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:04,179 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778375742] [2019-12-07 18:56:04,179 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:04,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:04,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:04,578 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [778375742] [2019-12-07 18:56:04,578 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:04,579 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:56:04,579 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857388627] [2019-12-07 18:56:04,579 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:56:04,579 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:04,579 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:56:04,580 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:56:04,580 INFO L87 Difference]: Start difference. First operand 22422 states and 70557 transitions. Second operand 16 states. [2019-12-07 18:56:07,980 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 19 [2019-12-07 18:56:08,312 WARN L192 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 34 [2019-12-07 18:56:10,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:10,836 INFO L93 Difference]: Finished difference Result 60754 states and 189195 transitions. [2019-12-07 18:56:10,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 18:56:10,837 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:56:10,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:10,912 INFO L225 Difference]: With dead ends: 60754 [2019-12-07 18:56:10,912 INFO L226 Difference]: Without dead ends: 55566 [2019-12-07 18:56:10,913 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 1 SyntacticMatches, 6 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 904 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=514, Invalid=2908, Unknown=0, NotChecked=0, Total=3422 [2019-12-07 18:56:11,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55566 states. [2019-12-07 18:56:11,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55566 to 23319. [2019-12-07 18:56:11,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23319 states. [2019-12-07 18:56:11,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23319 states to 23319 states and 72495 transitions. [2019-12-07 18:56:11,473 INFO L78 Accepts]: Start accepts. Automaton has 23319 states and 72495 transitions. Word has length 67 [2019-12-07 18:56:11,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:11,473 INFO L462 AbstractCegarLoop]: Abstraction has 23319 states and 72495 transitions. [2019-12-07 18:56:11,473 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:56:11,473 INFO L276 IsEmpty]: Start isEmpty. Operand 23319 states and 72495 transitions. [2019-12-07 18:56:11,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:11,494 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:11,494 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:11,495 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:11,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:11,495 INFO L82 PathProgramCache]: Analyzing trace with hash -1956463094, now seen corresponding path program 3 times [2019-12-07 18:56:11,495 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:11,495 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [123029285] [2019-12-07 18:56:11,495 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:11,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:11,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:11,602 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [123029285] [2019-12-07 18:56:11,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:11,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:56:11,602 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [816530159] [2019-12-07 18:56:11,602 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:56:11,602 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:11,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:56:11,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:56:11,603 INFO L87 Difference]: Start difference. First operand 23319 states and 72495 transitions. Second operand 11 states. [2019-12-07 18:56:12,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:12,266 INFO L93 Difference]: Finished difference Result 41191 states and 127324 transitions. [2019-12-07 18:56:12,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 18:56:12,266 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:56:12,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:12,462 INFO L225 Difference]: With dead ends: 41191 [2019-12-07 18:56:12,463 INFO L226 Difference]: Without dead ends: 31088 [2019-12-07 18:56:12,463 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=158, Invalid=598, Unknown=0, NotChecked=0, Total=756 [2019-12-07 18:56:12,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31088 states. [2019-12-07 18:56:12,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31088 to 16897. [2019-12-07 18:56:12,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16897 states. [2019-12-07 18:56:12,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16897 states to 16897 states and 51926 transitions. [2019-12-07 18:56:12,772 INFO L78 Accepts]: Start accepts. Automaton has 16897 states and 51926 transitions. Word has length 67 [2019-12-07 18:56:12,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:12,772 INFO L462 AbstractCegarLoop]: Abstraction has 16897 states and 51926 transitions. [2019-12-07 18:56:12,772 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:56:12,772 INFO L276 IsEmpty]: Start isEmpty. Operand 16897 states and 51926 transitions. [2019-12-07 18:56:12,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:12,787 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:12,787 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:12,787 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:12,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:12,788 INFO L82 PathProgramCache]: Analyzing trace with hash -1507199932, now seen corresponding path program 4 times [2019-12-07 18:56:12,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:12,788 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [583181662] [2019-12-07 18:56:12,788 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:12,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:12,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:12,847 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [583181662] [2019-12-07 18:56:12,847 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:12,847 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:56:12,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [139403029] [2019-12-07 18:56:12,847 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:56:12,847 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:12,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:56:12,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:56:12,848 INFO L87 Difference]: Start difference. First operand 16897 states and 51926 transitions. Second operand 7 states. [2019-12-07 18:56:13,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:13,108 INFO L93 Difference]: Finished difference Result 34056 states and 102750 transitions. [2019-12-07 18:56:13,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:56:13,109 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 18:56:13,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:13,143 INFO L225 Difference]: With dead ends: 34056 [2019-12-07 18:56:13,144 INFO L226 Difference]: Without dead ends: 30602 [2019-12-07 18:56:13,144 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:56:13,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30602 states. [2019-12-07 18:56:13,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30602 to 17122. [2019-12-07 18:56:13,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17122 states. [2019-12-07 18:56:13,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17122 states to 17122 states and 52354 transitions. [2019-12-07 18:56:13,483 INFO L78 Accepts]: Start accepts. Automaton has 17122 states and 52354 transitions. Word has length 67 [2019-12-07 18:56:13,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:13,483 INFO L462 AbstractCegarLoop]: Abstraction has 17122 states and 52354 transitions. [2019-12-07 18:56:13,483 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:56:13,483 INFO L276 IsEmpty]: Start isEmpty. Operand 17122 states and 52354 transitions. [2019-12-07 18:56:13,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:13,498 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:13,499 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:13,499 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:13,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:13,499 INFO L82 PathProgramCache]: Analyzing trace with hash -72336402, now seen corresponding path program 5 times [2019-12-07 18:56:13,499 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:13,499 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1615203389] [2019-12-07 18:56:13,499 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:13,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:13,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:13,807 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1615203389] [2019-12-07 18:56:13,807 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:13,807 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:56:13,807 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1658640394] [2019-12-07 18:56:13,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:56:13,808 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:13,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:56:13,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:56:13,808 INFO L87 Difference]: Start difference. First operand 17122 states and 52354 transitions. Second operand 16 states. [2019-12-07 18:56:15,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:15,936 INFO L93 Difference]: Finished difference Result 38146 states and 116192 transitions. [2019-12-07 18:56:15,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 18:56:15,936 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:56:15,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:15,985 INFO L225 Difference]: With dead ends: 38146 [2019-12-07 18:56:15,985 INFO L226 Difference]: Without dead ends: 37871 [2019-12-07 18:56:15,986 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 661 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=381, Invalid=2271, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 18:56:16,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37871 states. [2019-12-07 18:56:16,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37871 to 17468. [2019-12-07 18:56:16,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17468 states. [2019-12-07 18:56:16,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17468 states to 17468 states and 53157 transitions. [2019-12-07 18:56:16,366 INFO L78 Accepts]: Start accepts. Automaton has 17468 states and 53157 transitions. Word has length 67 [2019-12-07 18:56:16,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:16,366 INFO L462 AbstractCegarLoop]: Abstraction has 17468 states and 53157 transitions. [2019-12-07 18:56:16,366 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:56:16,366 INFO L276 IsEmpty]: Start isEmpty. Operand 17468 states and 53157 transitions. [2019-12-07 18:56:16,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:16,381 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:16,381 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:16,382 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:16,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:16,382 INFO L82 PathProgramCache]: Analyzing trace with hash -685641698, now seen corresponding path program 1 times [2019-12-07 18:56:16,382 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:16,382 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1441582779] [2019-12-07 18:56:16,382 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:16,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:16,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:16,405 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1441582779] [2019-12-07 18:56:16,405 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:16,405 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:56:16,405 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1938669594] [2019-12-07 18:56:16,405 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:56:16,405 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:16,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:56:16,405 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:16,405 INFO L87 Difference]: Start difference. First operand 17468 states and 53157 transitions. Second operand 3 states. [2019-12-07 18:56:16,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:16,477 INFO L93 Difference]: Finished difference Result 20061 states and 59311 transitions. [2019-12-07 18:56:16,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:56:16,477 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 18:56:16,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:16,498 INFO L225 Difference]: With dead ends: 20061 [2019-12-07 18:56:16,498 INFO L226 Difference]: Without dead ends: 20061 [2019-12-07 18:56:16,498 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:16,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20061 states. [2019-12-07 18:56:16,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20061 to 17790. [2019-12-07 18:56:16,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17790 states. [2019-12-07 18:56:16,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17790 states to 17790 states and 52802 transitions. [2019-12-07 18:56:16,745 INFO L78 Accepts]: Start accepts. Automaton has 17790 states and 52802 transitions. Word has length 67 [2019-12-07 18:56:16,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:16,745 INFO L462 AbstractCegarLoop]: Abstraction has 17790 states and 52802 transitions. [2019-12-07 18:56:16,745 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:56:16,745 INFO L276 IsEmpty]: Start isEmpty. Operand 17790 states and 52802 transitions. [2019-12-07 18:56:16,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:16,759 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:16,759 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:16,759 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:16,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:16,760 INFO L82 PathProgramCache]: Analyzing trace with hash -165885726, now seen corresponding path program 6 times [2019-12-07 18:56:16,760 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:16,760 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2011586813] [2019-12-07 18:56:16,760 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:16,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:17,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:17,050 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2011586813] [2019-12-07 18:56:17,051 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:17,051 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:56:17,051 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [622235057] [2019-12-07 18:56:17,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:56:17,051 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:17,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:56:17,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:56:17,051 INFO L87 Difference]: Start difference. First operand 17790 states and 52802 transitions. Second operand 16 states. [2019-12-07 18:56:19,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:19,083 INFO L93 Difference]: Finished difference Result 38662 states and 114190 transitions. [2019-12-07 18:56:19,083 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 18:56:19,083 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:56:19,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:19,271 INFO L225 Difference]: With dead ends: 38662 [2019-12-07 18:56:19,272 INFO L226 Difference]: Without dead ends: 38451 [2019-12-07 18:56:19,272 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 631 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=354, Invalid=2196, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 18:56:19,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38451 states. [2019-12-07 18:56:19,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38451 to 17790. [2019-12-07 18:56:19,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17790 states. [2019-12-07 18:56:19,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17790 states to 17790 states and 52802 transitions. [2019-12-07 18:56:19,620 INFO L78 Accepts]: Start accepts. Automaton has 17790 states and 52802 transitions. Word has length 67 [2019-12-07 18:56:19,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:19,620 INFO L462 AbstractCegarLoop]: Abstraction has 17790 states and 52802 transitions. [2019-12-07 18:56:19,620 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:56:19,620 INFO L276 IsEmpty]: Start isEmpty. Operand 17790 states and 52802 transitions. [2019-12-07 18:56:19,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:19,635 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:19,635 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:19,635 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:19,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:19,635 INFO L82 PathProgramCache]: Analyzing trace with hash -1360432764, now seen corresponding path program 7 times [2019-12-07 18:56:19,635 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:19,635 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2057527332] [2019-12-07 18:56:19,635 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:19,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:19,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:19,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2057527332] [2019-12-07 18:56:19,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:19,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:56:19,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1056379627] [2019-12-07 18:56:19,735 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:56:19,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:19,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:56:19,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:56:19,735 INFO L87 Difference]: Start difference. First operand 17790 states and 52802 transitions. Second operand 11 states. [2019-12-07 18:56:20,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:20,254 INFO L93 Difference]: Finished difference Result 31644 states and 94104 transitions. [2019-12-07 18:56:20,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:56:20,254 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:56:20,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:20,288 INFO L225 Difference]: With dead ends: 31644 [2019-12-07 18:56:20,288 INFO L226 Difference]: Without dead ends: 30451 [2019-12-07 18:56:20,288 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=128, Invalid=522, Unknown=0, NotChecked=0, Total=650 [2019-12-07 18:56:20,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30451 states. [2019-12-07 18:56:20,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30451 to 16821. [2019-12-07 18:56:20,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16821 states. [2019-12-07 18:56:20,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16821 states to 16821 states and 50293 transitions. [2019-12-07 18:56:20,613 INFO L78 Accepts]: Start accepts. Automaton has 16821 states and 50293 transitions. Word has length 67 [2019-12-07 18:56:20,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:20,613 INFO L462 AbstractCegarLoop]: Abstraction has 16821 states and 50293 transitions. [2019-12-07 18:56:20,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:56:20,613 INFO L276 IsEmpty]: Start isEmpty. Operand 16821 states and 50293 transitions. [2019-12-07 18:56:20,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:20,627 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:20,627 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:20,628 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:20,628 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:20,628 INFO L82 PathProgramCache]: Analyzing trace with hash 968273958, now seen corresponding path program 8 times [2019-12-07 18:56:20,628 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:20,628 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1565914820] [2019-12-07 18:56:20,628 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:20,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:56:20,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:56:20,698 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:56:20,698 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:56:20,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] ULTIMATE.startENTRY-->L828: Formula: (let ((.cse0 (store |v_#valid_76| 0 0))) (and (= v_~a$r_buff1_thd0~0_168 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1205~0.base_37| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1205~0.base_37|) |v_ULTIMATE.start_main_~#t1205~0.offset_25| 0)) |v_#memory_int_21|) (= 0 v_~__unbuffered_p2_EAX~0_43) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1205~0.base_37|) (= v_~__unbuffered_p2_EBX~0_46 0) (= |v_#valid_74| (store .cse0 |v_ULTIMATE.start_main_~#t1205~0.base_37| 1)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1205~0.base_37| 4)) (= |v_#NULL.offset_7| 0) (= 0 v_~a$w_buff1_used~0_387) (= v_~a$w_buff0~0_207 0) (= 0 v_~weak$$choice0~0_17) (= v_~a$mem_tmp~0_18 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 |v_ULTIMATE.start_main_~#t1205~0.offset_25|) (= 0 v_~a$r_buff0_thd2~0_167) (= 0 v_~a$r_buff1_thd1~0_155) (= v_~y~0_56 0) (= 0 v_~a$r_buff0_thd1~0_253) (= v_~a$r_buff0_thd0~0_180 0) (= 0 v_~a$w_buff1~0_155) (= v_~main$tmp_guard0~0_36 0) (= v_~a~0_177 0) (= v_~a$flush_delayed~0_31 0) (= v_~a$r_buff0_thd3~0_361 0) (= 0 |v_#NULL.base_7|) (= 0 v_~x~0_140) (= 0 v_~a$w_buff0_used~0_714) (= v_~z~0_17 0) (= 0 v_~a$r_buff1_thd2~0_176) (= 0 v_~a$read_delayed~0_6) (= (select .cse0 |v_ULTIMATE.start_main_~#t1205~0.base_37|) 0) (= v_~a$read_delayed_var~0.offset_6 0) (= v_~a$r_buff1_thd3~0_273 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~weak$$choice2~0_104 0) (= v_~__unbuffered_cnt~0_126 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_76|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_176, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_266|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_180, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_42|, ~a~0=v_~a~0_177, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1207~0.base=|v_ULTIMATE.start_main_~#t1207~0.base_18|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_43, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_46, ULTIMATE.start_main_~#t1206~0.base=|v_ULTIMATE.start_main_~#t1206~0.base_37|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_273, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_714, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_253, ULTIMATE.start_main_~#t1205~0.offset=|v_ULTIMATE.start_main_~#t1205~0.offset_25|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1205~0.base=|v_ULTIMATE.start_main_~#t1205~0.base_37|, ~a$w_buff0~0=v_~a$w_buff0~0_207, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_168, ULTIMATE.start_main_~#t1206~0.offset=|v_ULTIMATE.start_main_~#t1206~0.offset_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126, ~x~0=v_~x~0_140, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_41|, ULTIMATE.start_main_~#t1207~0.offset=|v_ULTIMATE.start_main_~#t1207~0.offset_15|, ~a$mem_tmp~0=v_~a$mem_tmp~0_18, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_40|, ~a$w_buff1~0=v_~a$w_buff1~0_155, ~y~0=v_~y~0_56, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_15|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_155, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_361, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_36, #NULL.base=|v_#NULL.base_7|, ~a$flush_delayed~0=v_~a$flush_delayed~0_31, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_17, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_387, ~weak$$choice2~0=v_~weak$$choice2~0_104, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, #length, ULTIMATE.start_main_~#t1207~0.base, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_~#t1206~0.base, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t1205~0.offset, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1205~0.base, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t1206~0.offset, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1207~0.offset, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:56:20,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L828-1-->L830: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1206~0.base_9| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1206~0.base_9|) |v_ULTIMATE.start_main_~#t1206~0.offset_8| 1)) |v_#memory_int_15|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1206~0.base_9| 1) |v_#valid_31|) (= |v_ULTIMATE.start_main_~#t1206~0.offset_8| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1206~0.base_9| 4) |v_#length_15|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1206~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1206~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1206~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1206~0.base=|v_ULTIMATE.start_main_~#t1206~0.base_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1206~0.offset=|v_ULTIMATE.start_main_~#t1206~0.offset_8|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1206~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1206~0.offset, #length] because there is no mapped edge [2019-12-07 18:56:20,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L4-->L746: Formula: (and (= ~a$r_buff0_thd1~0_Out-1846830626 1) (= ~a$r_buff0_thd0~0_In-1846830626 ~a$r_buff1_thd0~0_Out-1846830626) (= ~a$r_buff1_thd2~0_Out-1846830626 ~a$r_buff0_thd2~0_In-1846830626) (= ~x~0_Out-1846830626 1) (= ~a$r_buff1_thd3~0_Out-1846830626 ~a$r_buff0_thd3~0_In-1846830626) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1846830626 0)) (= ~a$r_buff0_thd1~0_In-1846830626 ~a$r_buff1_thd1~0_Out-1846830626)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1846830626, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1846830626, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1846830626, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1846830626, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1846830626} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-1846830626, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-1846830626, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-1846830626, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1846830626, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-1846830626, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1846830626, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1846830626, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1846830626, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1846830626, ~x~0=~x~0_Out-1846830626} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 18:56:20,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L830-1-->L832: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1207~0.base_12|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1207~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t1207~0.offset_10|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1207~0.base_12| 4)) (not (= |v_ULTIMATE.start_main_~#t1207~0.base_12| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1207~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1207~0.base_12|) |v_ULTIMATE.start_main_~#t1207~0.offset_10| 2)) |v_#memory_int_13|) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1207~0.base_12| 1) |v_#valid_29|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1207~0.base=|v_ULTIMATE.start_main_~#t1207~0.base_12|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1207~0.offset=|v_ULTIMATE.start_main_~#t1207~0.offset_10|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1207~0.base, #length, ULTIMATE.start_main_~#t1207~0.offset] because there is no mapped edge [2019-12-07 18:56:20,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L794-->L794-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1212673435 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out1212673435| |P2Thread1of1ForFork0_#t~ite21_Out1212673435|) .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out1212673435| ~a$w_buff0~0_In1212673435) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1212673435 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In1212673435 256)) (and (= 0 (mod ~a$r_buff1_thd3~0_In1212673435 256)) .cse1) (and (= 0 (mod ~a$w_buff1_used~0_In1212673435 256)) .cse1)))) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In1212673435| |P2Thread1of1ForFork0_#t~ite20_Out1212673435|) (= |P2Thread1of1ForFork0_#t~ite21_Out1212673435| ~a$w_buff0~0_In1212673435)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In1212673435, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1212673435, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1212673435, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1212673435, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1212673435, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1212673435|, ~weak$$choice2~0=~weak$$choice2~0_In1212673435} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1212673435|, ~a$w_buff0~0=~a$w_buff0~0_In1212673435, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1212673435, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1212673435, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1212673435, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1212673435|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1212673435, ~weak$$choice2~0=~weak$$choice2~0_In1212673435} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:56:20,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L766-2-->L766-5: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In-993853032 256) 0)) (.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-993853032| |P1Thread1of1ForFork2_#t~ite10_Out-993853032|)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-993853032 256)))) (or (and .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-993853032| ~a~0_In-993853032) (or .cse1 .cse2)) (and (not .cse2) (= ~a$w_buff1~0_In-993853032 |P1Thread1of1ForFork2_#t~ite9_Out-993853032|) .cse0 (not .cse1)))) InVars {~a~0=~a~0_In-993853032, ~a$w_buff1~0=~a$w_buff1~0_In-993853032, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-993853032, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-993853032} OutVars{~a~0=~a~0_In-993853032, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-993853032|, ~a$w_buff1~0=~a$w_buff1~0_In-993853032, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-993853032, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-993853032|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-993853032} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:56:20,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-861499675 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-861499675 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-861499675| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-861499675| ~a$w_buff0_used~0_In-861499675)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-861499675, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-861499675} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-861499675, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-861499675, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-861499675|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:56:20,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-2052748998 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-2052748998 256))) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-2052748998 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-2052748998 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-2052748998|)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-2052748998| ~a$w_buff1_used~0_In-2052748998) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2052748998, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2052748998, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2052748998, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2052748998} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2052748998, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2052748998, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2052748998, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2052748998|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2052748998} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:56:20,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-172604652 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-172604652 256)))) (or (and (= ~a$r_buff0_thd2~0_In-172604652 |P1Thread1of1ForFork2_#t~ite13_Out-172604652|) (or .cse0 .cse1)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out-172604652| 0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-172604652, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-172604652} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-172604652, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-172604652, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-172604652|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:56:20,706 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L796-->L796-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-155777321 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In-155777321| |P2Thread1of1ForFork0_#t~ite26_Out-155777321|) (= |P2Thread1of1ForFork0_#t~ite27_Out-155777321| ~a$w_buff0_used~0_In-155777321) (not .cse0)) (and (= |P2Thread1of1ForFork0_#t~ite26_Out-155777321| |P2Thread1of1ForFork0_#t~ite27_Out-155777321|) (= |P2Thread1of1ForFork0_#t~ite26_Out-155777321| ~a$w_buff0_used~0_In-155777321) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-155777321 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In-155777321 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-155777321 256)) (and (= (mod ~a$w_buff1_used~0_In-155777321 256) 0) .cse1))) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-155777321|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-155777321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-155777321, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-155777321, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-155777321, ~weak$$choice2~0=~weak$$choice2~0_In-155777321} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-155777321|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-155777321|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-155777321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-155777321, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-155777321, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-155777321, ~weak$$choice2~0=~weak$$choice2~0_In-155777321} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:56:20,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L798-->L799: Formula: (and (not (= (mod v_~weak$$choice2~0_21 256) 0)) (= v_~a$r_buff0_thd3~0_104 v_~a$r_buff0_thd3~0_103)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_103, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:56:20,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L801-->L805: Formula: (and (= v_~a$flush_delayed~0_9 0) (= v_~a~0_54 v_~a$mem_tmp~0_7) (not (= (mod v_~a$flush_delayed~0_10 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_54, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:56:20,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L805-2-->L805-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In1546873193 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1546873193 256)))) (or (and (= ~a$w_buff1~0_In1546873193 |P2Thread1of1ForFork0_#t~ite38_Out1546873193|) (not .cse0) (not .cse1)) (and (= ~a~0_In1546873193 |P2Thread1of1ForFork0_#t~ite38_Out1546873193|) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In1546873193, ~a$w_buff1~0=~a$w_buff1~0_In1546873193, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1546873193, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1546873193} OutVars{~a~0=~a~0_In1546873193, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1546873193|, ~a$w_buff1~0=~a$w_buff1~0_In1546873193, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1546873193, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1546873193} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:56:20,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L805-4-->L806: Formula: (= v_~a~0_21 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_21, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:56:20,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L806-->L806-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In915626569 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In915626569 256) 0))) (or (and (= ~a$w_buff0_used~0_In915626569 |P2Thread1of1ForFork0_#t~ite40_Out915626569|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out915626569|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In915626569, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In915626569} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out915626569|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In915626569, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In915626569} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:56:20,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L807-->L807-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In1813087748 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd3~0_In1813087748 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1813087748 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1813087748 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In1813087748 |P2Thread1of1ForFork0_#t~ite41_Out1813087748|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1813087748|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1813087748, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1813087748, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1813087748, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1813087748} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1813087748, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1813087748, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1813087748, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1813087748, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1813087748|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:56:20,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-1289425734 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-1289425734 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1289425734| ~a$r_buff0_thd3~0_In-1289425734) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1289425734| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1289425734, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1289425734} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1289425734, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1289425734, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1289425734|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:56:20,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L809-->L809-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-94579314 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-94579314 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-94579314 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-94579314 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In-94579314 |P2Thread1of1ForFork0_#t~ite43_Out-94579314|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out-94579314| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-94579314, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-94579314, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-94579314, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-94579314} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-94579314|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-94579314, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-94579314, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-94579314, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-94579314} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:56:20,710 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L809-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_50 (+ v_~__unbuffered_cnt~0_51 1)) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_125 |v_P2Thread1of1ForFork0_#t~ite43_26|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_25|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:56:20,710 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L747-->L747-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1671404312 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1671404312 256)))) (or (and (= ~a$w_buff0_used~0_In1671404312 |P0Thread1of1ForFork1_#t~ite5_Out1671404312|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out1671404312| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1671404312, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1671404312} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1671404312|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1671404312, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1671404312} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:56:20,710 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1702186885 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd1~0_In1702186885 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In1702186885 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1702186885 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1702186885 |P0Thread1of1ForFork1_#t~ite6_Out1702186885|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1702186885|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1702186885, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1702186885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1702186885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1702186885} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1702186885|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1702186885, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1702186885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1702186885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1702186885} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:56:20,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L749-->L750: Formula: (let ((.cse0 (= ~a$r_buff0_thd1~0_Out953774427 ~a$r_buff0_thd1~0_In953774427)) (.cse1 (= (mod ~a$w_buff0_used~0_In953774427 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In953774427 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (= ~a$r_buff0_thd1~0_Out953774427 0) (not .cse1) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In953774427, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In953774427} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out953774427|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In953774427, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out953774427} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:56:20,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L750-->L750-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In31237751 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd1~0_In31237751 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd1~0_In31237751 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In31237751 256)))) (or (and (= ~a$r_buff1_thd1~0_In31237751 |P0Thread1of1ForFork1_#t~ite8_Out31237751|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out31237751| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In31237751, ~a$w_buff0_used~0=~a$w_buff0_used~0_In31237751, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In31237751, ~a$w_buff1_used~0=~a$w_buff1_used~0_In31237751} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out31237751|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In31237751, ~a$w_buff0_used~0=~a$w_buff0_used~0_In31237751, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In31237751, ~a$w_buff1_used~0=~a$w_buff1_used~0_In31237751} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:56:20,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= v_~a$r_buff1_thd1~0_97 |v_P0Thread1of1ForFork1_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_35|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_97, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:56:20,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~a$w_buff1_used~0_In-545007716 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd2~0_In-545007716 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-545007716 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-545007716 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out-545007716| 0)) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-545007716| ~a$r_buff1_thd2~0_In-545007716) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-545007716, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-545007716, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-545007716, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-545007716} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-545007716, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-545007716, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-545007716, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-545007716, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-545007716|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:56:20,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_74) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_74, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:56:20,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L836-->L838-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~a$r_buff0_thd0~0_58 256)) (= (mod v_~a$w_buff0_used~0_319 256) 0))) InVars {~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:56:20,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L838-2-->L838-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1844041103 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-1844041103 256) 0))) (or (and (or .cse0 .cse1) (= ~a~0_In-1844041103 |ULTIMATE.start_main_#t~ite47_Out-1844041103|)) (and (= ~a$w_buff1~0_In-1844041103 |ULTIMATE.start_main_#t~ite47_Out-1844041103|) (not .cse1) (not .cse0)))) InVars {~a~0=~a~0_In-1844041103, ~a$w_buff1~0=~a$w_buff1~0_In-1844041103, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1844041103, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1844041103} OutVars{~a~0=~a~0_In-1844041103, ~a$w_buff1~0=~a$w_buff1~0_In-1844041103, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1844041103|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1844041103, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1844041103} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:56:20,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L838-4-->L839: Formula: (= v_~a~0_33 |v_ULTIMATE.start_main_#t~ite47_7|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|} OutVars{~a~0=v_~a~0_33, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:56:20,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L839-->L839-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1219135491 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1219135491 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1219135491|)) (and (= ~a$w_buff0_used~0_In-1219135491 |ULTIMATE.start_main_#t~ite49_Out-1219135491|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1219135491, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1219135491} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1219135491, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1219135491|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1219135491} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:56:20,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L840-->L840-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In691374510 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In691374510 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In691374510 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In691374510 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite50_Out691374510| ~a$w_buff1_used~0_In691374510)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out691374510| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In691374510, ~a$w_buff0_used~0=~a$w_buff0_used~0_In691374510, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In691374510, ~a$w_buff1_used~0=~a$w_buff1_used~0_In691374510} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out691374510|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In691374510, ~a$w_buff0_used~0=~a$w_buff0_used~0_In691374510, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In691374510, ~a$w_buff1_used~0=~a$w_buff1_used~0_In691374510} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:56:20,713 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L841-->L841-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1886192205 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-1886192205 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In-1886192205 |ULTIMATE.start_main_#t~ite51_Out-1886192205|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-1886192205|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1886192205, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1886192205} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1886192205|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1886192205, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1886192205} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:56:20,713 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L842-->L842-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd0~0_In1837628313 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1837628313 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In1837628313 256))) (.cse2 (= (mod ~a$r_buff0_thd0~0_In1837628313 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out1837628313| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite52_Out1837628313| ~a$r_buff1_thd0~0_In1837628313) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1837628313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1837628313, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1837628313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1837628313} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1837628313|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1837628313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1837628313, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1837628313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1837628313} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:56:20,713 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L842-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9| (mod v_~main$tmp_guard1~0_16 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_25 0) (= v_~y~0_24 2) (= v_~x~0_88 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_16) (= v_~a$r_buff1_thd0~0_114 |v_ULTIMATE.start_main_#t~ite52_42|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_41|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_13, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_114, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:56:20,764 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:56:20 BasicIcfg [2019-12-07 18:56:20,764 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:56:20,764 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:56:20,764 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:56:20,765 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:56:20,765 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:54:39" (3/4) ... [2019-12-07 18:56:20,766 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:56:20,767 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] ULTIMATE.startENTRY-->L828: Formula: (let ((.cse0 (store |v_#valid_76| 0 0))) (and (= v_~a$r_buff1_thd0~0_168 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1205~0.base_37| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1205~0.base_37|) |v_ULTIMATE.start_main_~#t1205~0.offset_25| 0)) |v_#memory_int_21|) (= 0 v_~__unbuffered_p2_EAX~0_43) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1205~0.base_37|) (= v_~__unbuffered_p2_EBX~0_46 0) (= |v_#valid_74| (store .cse0 |v_ULTIMATE.start_main_~#t1205~0.base_37| 1)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1205~0.base_37| 4)) (= |v_#NULL.offset_7| 0) (= 0 v_~a$w_buff1_used~0_387) (= v_~a$w_buff0~0_207 0) (= 0 v_~weak$$choice0~0_17) (= v_~a$mem_tmp~0_18 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 |v_ULTIMATE.start_main_~#t1205~0.offset_25|) (= 0 v_~a$r_buff0_thd2~0_167) (= 0 v_~a$r_buff1_thd1~0_155) (= v_~y~0_56 0) (= 0 v_~a$r_buff0_thd1~0_253) (= v_~a$r_buff0_thd0~0_180 0) (= 0 v_~a$w_buff1~0_155) (= v_~main$tmp_guard0~0_36 0) (= v_~a~0_177 0) (= v_~a$flush_delayed~0_31 0) (= v_~a$r_buff0_thd3~0_361 0) (= 0 |v_#NULL.base_7|) (= 0 v_~x~0_140) (= 0 v_~a$w_buff0_used~0_714) (= v_~z~0_17 0) (= 0 v_~a$r_buff1_thd2~0_176) (= 0 v_~a$read_delayed~0_6) (= (select .cse0 |v_ULTIMATE.start_main_~#t1205~0.base_37|) 0) (= v_~a$read_delayed_var~0.offset_6 0) (= v_~a$r_buff1_thd3~0_273 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~weak$$choice2~0_104 0) (= v_~__unbuffered_cnt~0_126 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_76|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_176, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_266|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_180, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_42|, ~a~0=v_~a~0_177, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1207~0.base=|v_ULTIMATE.start_main_~#t1207~0.base_18|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_43, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_46, ULTIMATE.start_main_~#t1206~0.base=|v_ULTIMATE.start_main_~#t1206~0.base_37|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_273, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_714, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_253, ULTIMATE.start_main_~#t1205~0.offset=|v_ULTIMATE.start_main_~#t1205~0.offset_25|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1205~0.base=|v_ULTIMATE.start_main_~#t1205~0.base_37|, ~a$w_buff0~0=v_~a$w_buff0~0_207, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_168, ULTIMATE.start_main_~#t1206~0.offset=|v_ULTIMATE.start_main_~#t1206~0.offset_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126, ~x~0=v_~x~0_140, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_41|, ULTIMATE.start_main_~#t1207~0.offset=|v_ULTIMATE.start_main_~#t1207~0.offset_15|, ~a$mem_tmp~0=v_~a$mem_tmp~0_18, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_40|, ~a$w_buff1~0=v_~a$w_buff1~0_155, ~y~0=v_~y~0_56, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_15|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_155, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_361, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_36, #NULL.base=|v_#NULL.base_7|, ~a$flush_delayed~0=v_~a$flush_delayed~0_31, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_17, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_387, ~weak$$choice2~0=v_~weak$$choice2~0_104, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, #length, ULTIMATE.start_main_~#t1207~0.base, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_~#t1206~0.base, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t1205~0.offset, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1205~0.base, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t1206~0.offset, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t1207~0.offset, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:56:20,767 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L828-1-->L830: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1206~0.base_9| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1206~0.base_9|) |v_ULTIMATE.start_main_~#t1206~0.offset_8| 1)) |v_#memory_int_15|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1206~0.base_9| 1) |v_#valid_31|) (= |v_ULTIMATE.start_main_~#t1206~0.offset_8| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1206~0.base_9| 4) |v_#length_15|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1206~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1206~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1206~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1206~0.base=|v_ULTIMATE.start_main_~#t1206~0.base_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1206~0.offset=|v_ULTIMATE.start_main_~#t1206~0.offset_8|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1206~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1206~0.offset, #length] because there is no mapped edge [2019-12-07 18:56:20,767 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L4-->L746: Formula: (and (= ~a$r_buff0_thd1~0_Out-1846830626 1) (= ~a$r_buff0_thd0~0_In-1846830626 ~a$r_buff1_thd0~0_Out-1846830626) (= ~a$r_buff1_thd2~0_Out-1846830626 ~a$r_buff0_thd2~0_In-1846830626) (= ~x~0_Out-1846830626 1) (= ~a$r_buff1_thd3~0_Out-1846830626 ~a$r_buff0_thd3~0_In-1846830626) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1846830626 0)) (= ~a$r_buff0_thd1~0_In-1846830626 ~a$r_buff1_thd1~0_Out-1846830626)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1846830626, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1846830626, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1846830626, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1846830626, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1846830626} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-1846830626, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-1846830626, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-1846830626, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1846830626, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-1846830626, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1846830626, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-1846830626, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1846830626, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1846830626, ~x~0=~x~0_Out-1846830626} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 18:56:20,768 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L830-1-->L832: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1207~0.base_12|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t1207~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t1207~0.offset_10|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1207~0.base_12| 4)) (not (= |v_ULTIMATE.start_main_~#t1207~0.base_12| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1207~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1207~0.base_12|) |v_ULTIMATE.start_main_~#t1207~0.offset_10| 2)) |v_#memory_int_13|) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t1207~0.base_12| 1) |v_#valid_29|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1207~0.base=|v_ULTIMATE.start_main_~#t1207~0.base_12|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1207~0.offset=|v_ULTIMATE.start_main_~#t1207~0.offset_10|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1207~0.base, #length, ULTIMATE.start_main_~#t1207~0.offset] because there is no mapped edge [2019-12-07 18:56:20,770 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L794-->L794-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1212673435 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out1212673435| |P2Thread1of1ForFork0_#t~ite21_Out1212673435|) .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out1212673435| ~a$w_buff0~0_In1212673435) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1212673435 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In1212673435 256)) (and (= 0 (mod ~a$r_buff1_thd3~0_In1212673435 256)) .cse1) (and (= 0 (mod ~a$w_buff1_used~0_In1212673435 256)) .cse1)))) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In1212673435| |P2Thread1of1ForFork0_#t~ite20_Out1212673435|) (= |P2Thread1of1ForFork0_#t~ite21_Out1212673435| ~a$w_buff0~0_In1212673435)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In1212673435, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1212673435, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1212673435, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1212673435, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1212673435, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1212673435|, ~weak$$choice2~0=~weak$$choice2~0_In1212673435} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1212673435|, ~a$w_buff0~0=~a$w_buff0~0_In1212673435, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1212673435, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1212673435, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1212673435, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1212673435|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1212673435, ~weak$$choice2~0=~weak$$choice2~0_In1212673435} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:56:20,770 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L766-2-->L766-5: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In-993853032 256) 0)) (.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-993853032| |P1Thread1of1ForFork2_#t~ite10_Out-993853032|)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-993853032 256)))) (or (and .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-993853032| ~a~0_In-993853032) (or .cse1 .cse2)) (and (not .cse2) (= ~a$w_buff1~0_In-993853032 |P1Thread1of1ForFork2_#t~ite9_Out-993853032|) .cse0 (not .cse1)))) InVars {~a~0=~a~0_In-993853032, ~a$w_buff1~0=~a$w_buff1~0_In-993853032, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-993853032, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-993853032} OutVars{~a~0=~a~0_In-993853032, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-993853032|, ~a$w_buff1~0=~a$w_buff1~0_In-993853032, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-993853032, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-993853032|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-993853032} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:56:20,770 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-861499675 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-861499675 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-861499675| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-861499675| ~a$w_buff0_used~0_In-861499675)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-861499675, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-861499675} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-861499675, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-861499675, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-861499675|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:56:20,770 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-2052748998 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-2052748998 256))) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-2052748998 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-2052748998 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-2052748998|)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-2052748998| ~a$w_buff1_used~0_In-2052748998) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2052748998, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2052748998, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2052748998, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2052748998} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2052748998, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2052748998, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2052748998, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2052748998|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2052748998} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:56:20,771 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-172604652 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-172604652 256)))) (or (and (= ~a$r_buff0_thd2~0_In-172604652 |P1Thread1of1ForFork2_#t~ite13_Out-172604652|) (or .cse0 .cse1)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out-172604652| 0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-172604652, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-172604652} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-172604652, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-172604652, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-172604652|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:56:20,772 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L796-->L796-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-155777321 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In-155777321| |P2Thread1of1ForFork0_#t~ite26_Out-155777321|) (= |P2Thread1of1ForFork0_#t~ite27_Out-155777321| ~a$w_buff0_used~0_In-155777321) (not .cse0)) (and (= |P2Thread1of1ForFork0_#t~ite26_Out-155777321| |P2Thread1of1ForFork0_#t~ite27_Out-155777321|) (= |P2Thread1of1ForFork0_#t~ite26_Out-155777321| ~a$w_buff0_used~0_In-155777321) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-155777321 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In-155777321 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-155777321 256)) (and (= (mod ~a$w_buff1_used~0_In-155777321 256) 0) .cse1))) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-155777321|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-155777321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-155777321, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-155777321, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-155777321, ~weak$$choice2~0=~weak$$choice2~0_In-155777321} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-155777321|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-155777321|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-155777321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-155777321, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-155777321, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-155777321, ~weak$$choice2~0=~weak$$choice2~0_In-155777321} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:56:20,773 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L798-->L799: Formula: (and (not (= (mod v_~weak$$choice2~0_21 256) 0)) (= v_~a$r_buff0_thd3~0_104 v_~a$r_buff0_thd3~0_103)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_103, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:56:20,773 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L801-->L805: Formula: (and (= v_~a$flush_delayed~0_9 0) (= v_~a~0_54 v_~a$mem_tmp~0_7) (not (= (mod v_~a$flush_delayed~0_10 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_54, ~a$mem_tmp~0=v_~a$mem_tmp~0_7, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:56:20,774 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L805-2-->L805-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In1546873193 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1546873193 256)))) (or (and (= ~a$w_buff1~0_In1546873193 |P2Thread1of1ForFork0_#t~ite38_Out1546873193|) (not .cse0) (not .cse1)) (and (= ~a~0_In1546873193 |P2Thread1of1ForFork0_#t~ite38_Out1546873193|) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In1546873193, ~a$w_buff1~0=~a$w_buff1~0_In1546873193, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1546873193, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1546873193} OutVars{~a~0=~a~0_In1546873193, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1546873193|, ~a$w_buff1~0=~a$w_buff1~0_In1546873193, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1546873193, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1546873193} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:56:20,774 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L805-4-->L806: Formula: (= v_~a~0_21 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_21, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:56:20,774 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L806-->L806-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In915626569 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In915626569 256) 0))) (or (and (= ~a$w_buff0_used~0_In915626569 |P2Thread1of1ForFork0_#t~ite40_Out915626569|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out915626569|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In915626569, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In915626569} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out915626569|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In915626569, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In915626569} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:56:20,774 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L807-->L807-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In1813087748 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd3~0_In1813087748 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1813087748 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1813087748 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In1813087748 |P2Thread1of1ForFork0_#t~ite41_Out1813087748|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1813087748|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1813087748, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1813087748, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1813087748, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1813087748} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1813087748, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1813087748, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1813087748, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1813087748, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1813087748|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:56:20,775 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-1289425734 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-1289425734 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1289425734| ~a$r_buff0_thd3~0_In-1289425734) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1289425734| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1289425734, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1289425734} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1289425734, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1289425734, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1289425734|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:56:20,775 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L809-->L809-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-94579314 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-94579314 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-94579314 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-94579314 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In-94579314 |P2Thread1of1ForFork0_#t~ite43_Out-94579314|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out-94579314| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-94579314, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-94579314, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-94579314, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-94579314} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-94579314|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-94579314, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-94579314, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-94579314, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-94579314} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:56:20,775 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L809-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_50 (+ v_~__unbuffered_cnt~0_51 1)) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_125 |v_P2Thread1of1ForFork0_#t~ite43_26|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_25|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_125, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:56:20,775 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L747-->L747-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1671404312 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1671404312 256)))) (or (and (= ~a$w_buff0_used~0_In1671404312 |P0Thread1of1ForFork1_#t~ite5_Out1671404312|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out1671404312| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1671404312, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1671404312} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1671404312|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1671404312, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1671404312} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:56:20,776 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1702186885 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd1~0_In1702186885 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In1702186885 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1702186885 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1702186885 |P0Thread1of1ForFork1_#t~ite6_Out1702186885|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1702186885|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1702186885, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1702186885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1702186885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1702186885} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1702186885|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1702186885, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1702186885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1702186885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1702186885} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:56:20,776 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L749-->L750: Formula: (let ((.cse0 (= ~a$r_buff0_thd1~0_Out953774427 ~a$r_buff0_thd1~0_In953774427)) (.cse1 (= (mod ~a$w_buff0_used~0_In953774427 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In953774427 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (= ~a$r_buff0_thd1~0_Out953774427 0) (not .cse1) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In953774427, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In953774427} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out953774427|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In953774427, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out953774427} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:56:20,776 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L750-->L750-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In31237751 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd1~0_In31237751 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd1~0_In31237751 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In31237751 256)))) (or (and (= ~a$r_buff1_thd1~0_In31237751 |P0Thread1of1ForFork1_#t~ite8_Out31237751|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out31237751| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In31237751, ~a$w_buff0_used~0=~a$w_buff0_used~0_In31237751, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In31237751, ~a$w_buff1_used~0=~a$w_buff1_used~0_In31237751} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out31237751|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In31237751, ~a$w_buff0_used~0=~a$w_buff0_used~0_In31237751, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In31237751, ~a$w_buff1_used~0=~a$w_buff1_used~0_In31237751} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:56:20,776 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= v_~a$r_buff1_thd1~0_97 |v_P0Thread1of1ForFork1_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_35|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_97, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:56:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~a$w_buff1_used~0_In-545007716 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd2~0_In-545007716 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-545007716 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-545007716 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out-545007716| 0)) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-545007716| ~a$r_buff1_thd2~0_In-545007716) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-545007716, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-545007716, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-545007716, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-545007716} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-545007716, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-545007716, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-545007716, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-545007716, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-545007716|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:56:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_74) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_74, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:56:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L836-->L838-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~a$r_buff0_thd0~0_58 256)) (= (mod v_~a$w_buff0_used~0_319 256) 0))) InVars {~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~a$w_buff0_used~0=v_~a$w_buff0_used~0_319, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_58, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:56:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L838-2-->L838-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1844041103 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-1844041103 256) 0))) (or (and (or .cse0 .cse1) (= ~a~0_In-1844041103 |ULTIMATE.start_main_#t~ite47_Out-1844041103|)) (and (= ~a$w_buff1~0_In-1844041103 |ULTIMATE.start_main_#t~ite47_Out-1844041103|) (not .cse1) (not .cse0)))) InVars {~a~0=~a~0_In-1844041103, ~a$w_buff1~0=~a$w_buff1~0_In-1844041103, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1844041103, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1844041103} OutVars{~a~0=~a~0_In-1844041103, ~a$w_buff1~0=~a$w_buff1~0_In-1844041103, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1844041103|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1844041103, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1844041103} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:56:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L838-4-->L839: Formula: (= v_~a~0_33 |v_ULTIMATE.start_main_#t~ite47_7|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|} OutVars{~a~0=v_~a~0_33, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:56:20,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L839-->L839-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1219135491 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1219135491 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1219135491|)) (and (= ~a$w_buff0_used~0_In-1219135491 |ULTIMATE.start_main_#t~ite49_Out-1219135491|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1219135491, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1219135491} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1219135491, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1219135491|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1219135491} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:56:20,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L840-->L840-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In691374510 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In691374510 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In691374510 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In691374510 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite50_Out691374510| ~a$w_buff1_used~0_In691374510)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out691374510| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In691374510, ~a$w_buff0_used~0=~a$w_buff0_used~0_In691374510, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In691374510, ~a$w_buff1_used~0=~a$w_buff1_used~0_In691374510} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out691374510|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In691374510, ~a$w_buff0_used~0=~a$w_buff0_used~0_In691374510, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In691374510, ~a$w_buff1_used~0=~a$w_buff1_used~0_In691374510} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:56:20,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L841-->L841-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1886192205 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-1886192205 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In-1886192205 |ULTIMATE.start_main_#t~ite51_Out-1886192205|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-1886192205|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1886192205, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1886192205} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1886192205|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1886192205, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1886192205} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:56:20,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L842-->L842-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd0~0_In1837628313 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1837628313 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In1837628313 256))) (.cse2 (= (mod ~a$r_buff0_thd0~0_In1837628313 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out1837628313| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite52_Out1837628313| ~a$r_buff1_thd0~0_In1837628313) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1837628313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1837628313, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1837628313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1837628313} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1837628313|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1837628313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1837628313, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1837628313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1837628313} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:56:20,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L842-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9| (mod v_~main$tmp_guard1~0_16 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_25 0) (= v_~y~0_24 2) (= v_~x~0_88 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_16) (= v_~a$r_buff1_thd0~0_114 |v_ULTIMATE.start_main_#t~ite52_42|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_13 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_41|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_13, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_25, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_114, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~y~0=v_~y~0_24, ~x~0=v_~x~0_88, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:56:20,828 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_633d72f9-9d11-427b-a2c6-d4a2a24fe748/bin/uautomizer/witness.graphml [2019-12-07 18:56:20,828 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:56:20,829 INFO L168 Benchmark]: Toolchain (without parser) took 101980.56 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 6.0 GB). Free memory was 935.3 MB in the beginning and 3.1 GB in the end (delta: -2.2 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2019-12-07 18:56:20,830 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:56:20,830 INFO L168 Benchmark]: CACSL2BoogieTranslator took 382.87 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.4 MB). Free memory was 935.3 MB in the beginning and 1.1 GB in the end (delta: -137.8 MB). Peak memory consumption was 19.8 MB. Max. memory is 11.5 GB. [2019-12-07 18:56:20,830 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.56 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:56:20,830 INFO L168 Benchmark]: Boogie Preprocessor took 31.84 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:56:20,830 INFO L168 Benchmark]: RCFGBuilder took 398.49 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. [2019-12-07 18:56:20,831 INFO L168 Benchmark]: TraceAbstraction took 101060.55 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 1.0 GB in the beginning and 3.1 GB in the end (delta: -2.1 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2019-12-07 18:56:20,831 INFO L168 Benchmark]: Witness Printer took 64.20 ms. Allocated memory is still 7.0 GB. Free memory was 3.1 GB in the beginning and 3.1 GB in the end (delta: 15.7 MB). Peak memory consumption was 15.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:56:20,832 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 382.87 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.4 MB). Free memory was 935.3 MB in the beginning and 1.1 GB in the end (delta: -137.8 MB). Peak memory consumption was 19.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.56 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 31.84 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 398.49 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 101060.55 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 1.0 GB in the beginning and 3.1 GB in the end (delta: -2.1 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. * Witness Printer took 64.20 ms. Allocated memory is still 7.0 GB. Free memory was 3.1 GB in the beginning and 3.1 GB in the end (delta: 15.7 MB). Peak memory consumption was 15.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 176 ProgramPointsBefore, 94 ProgramPointsAfterwards, 213 TransitionsBefore, 104 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 33 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 31 ChoiceCompositions, 7291 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 34 SemBasedMoverChecksPositive, 267 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 81673 CheckedPairsTotal, 115 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L828] FCALL, FORK 0 pthread_create(&t1205, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L731] 1 a$w_buff1 = a$w_buff0 [L732] 1 a$w_buff0 = 1 [L733] 1 a$w_buff1_used = a$w_buff0_used [L734] 1 a$w_buff0_used = (_Bool)1 [L746] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L830] FCALL, FORK 0 pthread_create(&t1206, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L760] 2 x = 2 [L763] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L766] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L832] FCALL, FORK 0 pthread_create(&t1207, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L780] 3 y = 2 [L783] 3 z = 1 [L786] 3 __unbuffered_p2_EAX = z [L789] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L790] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L791] 3 a$flush_delayed = weak$$choice2 [L792] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L793] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L793] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L766] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L767] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L768] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L794] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L795] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=2, y=2, z=1] [L795] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L796] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L797] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=1] [L797] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L799] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=1] [L799] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L800] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L805] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L806] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L807] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L808] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L746] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L747] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L748] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L769] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L834] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=1] [L839] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L840] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L841] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 100.9s, OverallIterations: 27, TraceHistogramMax: 1, AutomataDifference: 27.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6685 SDtfs, 9647 SDslu, 25978 SDs, 0 SdLazy, 16543 SolverSat, 467 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 460 GetRequests, 49 SyntacticMatches, 30 SemanticMatches, 381 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3505 ImplicationChecksByTransitivity, 5.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=213814occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 51.5s AutomataMinimizationTime, 26 MinimizatonAttempts, 344150 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 1208 NumberOfCodeBlocks, 1208 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 1115 ConstructedInterpolants, 0 QuantifiedInterpolants, 396007 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 26 InterpolantComputations, 26 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...