./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix045_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix045_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 193a3add3d9d4b806af7141f1aa33075fb27c3b6 .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:20:23,380 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:20:23,382 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:20:23,389 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:20:23,389 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:20:23,390 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:20:23,391 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:20:23,392 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:20:23,393 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:20:23,394 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:20:23,394 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:20:23,395 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:20:23,395 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:20:23,396 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:20:23,397 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:20:23,397 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:20:23,398 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:20:23,399 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:20:23,400 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:20:23,401 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:20:23,402 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:20:23,403 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:20:23,404 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:20:23,404 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:20:23,406 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:20:23,406 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:20:23,406 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:20:23,407 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:20:23,407 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:20:23,408 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:20:23,408 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:20:23,408 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:20:23,409 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:20:23,409 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:20:23,410 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:20:23,410 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:20:23,410 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:20:23,410 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:20:23,410 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:20:23,411 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:20:23,411 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:20:23,412 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 16:20:23,421 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:20:23,422 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:20:23,422 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 16:20:23,422 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 16:20:23,423 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 16:20:23,423 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:20:23,423 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:20:23,423 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:20:23,423 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:20:23,423 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:20:23,423 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:20:23,424 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:20:23,424 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:20:23,424 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:20:23,424 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:20:23,424 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:20:23,424 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:20:23,424 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:20:23,424 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 16:20:23,425 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:20:23,425 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:20:23,425 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:20:23,425 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:20:23,425 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:20:23,425 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:20:23,425 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 16:20:23,425 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:20:23,425 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:20:23,426 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:20:23,426 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 193a3add3d9d4b806af7141f1aa33075fb27c3b6 [2019-12-07 16:20:23,524 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:20:23,534 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:20:23,537 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:20:23,538 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:20:23,539 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:20:23,539 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix045_tso.oepc.i [2019-12-07 16:20:23,580 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/data/5e8a6c9bf/4fc4e628eac2456fa954975e946141b2/FLAGd878d6bda [2019-12-07 16:20:23,989 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:20:23,989 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/sv-benchmarks/c/pthread-wmm/mix045_tso.oepc.i [2019-12-07 16:20:24,000 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/data/5e8a6c9bf/4fc4e628eac2456fa954975e946141b2/FLAGd878d6bda [2019-12-07 16:20:24,374 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/data/5e8a6c9bf/4fc4e628eac2456fa954975e946141b2 [2019-12-07 16:20:24,380 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:20:24,382 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:20:24,384 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:20:24,385 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:20:24,391 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:20:24,393 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:20:24" (1/1) ... [2019-12-07 16:20:24,397 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@46581b5e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24, skipping insertion in model container [2019-12-07 16:20:24,397 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:20:24" (1/1) ... [2019-12-07 16:20:24,405 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:20:24,434 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:20:24,729 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:20:24,739 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:20:24,795 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:20:24,849 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:20:24,849 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24 WrapperNode [2019-12-07 16:20:24,850 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:20:24,850 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:20:24,850 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:20:24,850 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:20:24,857 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24" (1/1) ... [2019-12-07 16:20:24,876 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24" (1/1) ... [2019-12-07 16:20:24,909 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:20:24,909 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:20:24,909 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:20:24,909 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:20:24,916 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24" (1/1) ... [2019-12-07 16:20:24,916 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24" (1/1) ... [2019-12-07 16:20:24,920 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24" (1/1) ... [2019-12-07 16:20:24,920 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24" (1/1) ... [2019-12-07 16:20:24,927 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24" (1/1) ... [2019-12-07 16:20:24,930 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24" (1/1) ... [2019-12-07 16:20:24,932 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24" (1/1) ... [2019-12-07 16:20:24,935 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:20:24,936 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:20:24,936 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:20:24,936 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:20:24,936 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:20:24,977 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:20:24,977 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:20:24,977 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:20:24,977 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:20:24,977 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:20:24,978 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:20:24,978 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:20:24,978 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:20:24,978 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 16:20:24,978 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 16:20:24,978 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:20:24,978 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:20:24,978 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:20:24,979 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:20:25,341 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:20:25,341 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:20:25,342 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:20:25 BoogieIcfgContainer [2019-12-07 16:20:25,342 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:20:25,343 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:20:25,343 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:20:25,345 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:20:25,345 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:20:24" (1/3) ... [2019-12-07 16:20:25,346 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3653426d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:20:25, skipping insertion in model container [2019-12-07 16:20:25,346 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:20:24" (2/3) ... [2019-12-07 16:20:25,347 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3653426d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:20:25, skipping insertion in model container [2019-12-07 16:20:25,347 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:20:25" (3/3) ... [2019-12-07 16:20:25,348 INFO L109 eAbstractionObserver]: Analyzing ICFG mix045_tso.oepc.i [2019-12-07 16:20:25,354 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:20:25,354 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:20:25,359 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:20:25,359 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:20:25,381 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,381 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,381 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,381 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,381 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,382 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,382 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,382 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,386 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,386 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,386 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,386 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,386 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:20:25,400 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 16:20:25,413 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:20:25,413 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:20:25,413 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:20:25,413 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:20:25,413 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:20:25,413 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:20:25,413 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:20:25,413 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:20:25,424 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 164 places, 195 transitions [2019-12-07 16:20:25,425 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 16:20:25,475 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 16:20:25,475 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:20:25,484 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 16:20:25,495 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 16:20:25,521 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 16:20:25,521 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:20:25,524 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 16:20:25,534 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-12-07 16:20:25,534 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:20:28,283 WARN L192 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 16:20:28,382 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46792 [2019-12-07 16:20:28,382 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 16:20:28,385 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 82 places, 91 transitions [2019-12-07 16:20:29,094 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 16134 states. [2019-12-07 16:20:29,096 INFO L276 IsEmpty]: Start isEmpty. Operand 16134 states. [2019-12-07 16:20:29,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 16:20:29,100 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:29,101 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:29,101 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:29,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:29,105 INFO L82 PathProgramCache]: Analyzing trace with hash 1643101290, now seen corresponding path program 1 times [2019-12-07 16:20:29,111 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:29,111 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [485734843] [2019-12-07 16:20:29,111 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:29,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:29,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:29,285 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [485734843] [2019-12-07 16:20:29,285 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:29,286 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:20:29,286 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786612449] [2019-12-07 16:20:29,289 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:20:29,289 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:29,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:20:29,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:29,300 INFO L87 Difference]: Start difference. First operand 16134 states. Second operand 3 states. [2019-12-07 16:20:29,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:29,522 INFO L93 Difference]: Finished difference Result 16034 states and 60310 transitions. [2019-12-07 16:20:29,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:20:29,523 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 16:20:29,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:29,674 INFO L225 Difference]: With dead ends: 16034 [2019-12-07 16:20:29,675 INFO L226 Difference]: Without dead ends: 15698 [2019-12-07 16:20:29,676 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:29,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15698 states. [2019-12-07 16:20:30,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15698 to 15698. [2019-12-07 16:20:30,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15698 states. [2019-12-07 16:20:30,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15698 states to 15698 states and 59106 transitions. [2019-12-07 16:20:30,181 INFO L78 Accepts]: Start accepts. Automaton has 15698 states and 59106 transitions. Word has length 7 [2019-12-07 16:20:30,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:30,182 INFO L462 AbstractCegarLoop]: Abstraction has 15698 states and 59106 transitions. [2019-12-07 16:20:30,182 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:20:30,182 INFO L276 IsEmpty]: Start isEmpty. Operand 15698 states and 59106 transitions. [2019-12-07 16:20:30,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:20:30,186 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:30,186 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:30,186 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:30,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:30,186 INFO L82 PathProgramCache]: Analyzing trace with hash 565568960, now seen corresponding path program 1 times [2019-12-07 16:20:30,186 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:30,186 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [449410028] [2019-12-07 16:20:30,186 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:30,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:30,263 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:30,263 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [449410028] [2019-12-07 16:20:30,263 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:30,263 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:20:30,263 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [465537949] [2019-12-07 16:20:30,264 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:20:30,264 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:30,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:20:30,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:20:30,265 INFO L87 Difference]: Start difference. First operand 15698 states and 59106 transitions. Second operand 4 states. [2019-12-07 16:20:30,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:30,640 INFO L93 Difference]: Finished difference Result 24414 states and 88322 transitions. [2019-12-07 16:20:30,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:20:30,641 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 16:20:30,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:30,776 INFO L225 Difference]: With dead ends: 24414 [2019-12-07 16:20:30,776 INFO L226 Difference]: Without dead ends: 24400 [2019-12-07 16:20:30,777 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:20:30,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24400 states. [2019-12-07 16:20:31,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24400 to 22284. [2019-12-07 16:20:31,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22284 states. [2019-12-07 16:20:31,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22284 states to 22284 states and 81513 transitions. [2019-12-07 16:20:31,261 INFO L78 Accepts]: Start accepts. Automaton has 22284 states and 81513 transitions. Word has length 13 [2019-12-07 16:20:31,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:31,261 INFO L462 AbstractCegarLoop]: Abstraction has 22284 states and 81513 transitions. [2019-12-07 16:20:31,261 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:20:31,262 INFO L276 IsEmpty]: Start isEmpty. Operand 22284 states and 81513 transitions. [2019-12-07 16:20:31,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:20:31,264 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:31,264 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:31,264 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:31,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:31,264 INFO L82 PathProgramCache]: Analyzing trace with hash 1863901117, now seen corresponding path program 1 times [2019-12-07 16:20:31,265 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:31,265 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1059959228] [2019-12-07 16:20:31,265 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:31,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:31,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:31,298 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1059959228] [2019-12-07 16:20:31,299 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:31,299 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:20:31,299 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1585411311] [2019-12-07 16:20:31,299 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:20:31,299 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:31,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:20:31,299 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:31,300 INFO L87 Difference]: Start difference. First operand 22284 states and 81513 transitions. Second operand 3 states. [2019-12-07 16:20:31,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:31,395 INFO L93 Difference]: Finished difference Result 12731 states and 40311 transitions. [2019-12-07 16:20:31,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:20:31,396 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 16:20:31,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:31,425 INFO L225 Difference]: With dead ends: 12731 [2019-12-07 16:20:31,425 INFO L226 Difference]: Without dead ends: 12731 [2019-12-07 16:20:31,425 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:31,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12731 states. [2019-12-07 16:20:31,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12731 to 12731. [2019-12-07 16:20:31,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12731 states. [2019-12-07 16:20:31,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12731 states to 12731 states and 40311 transitions. [2019-12-07 16:20:31,625 INFO L78 Accepts]: Start accepts. Automaton has 12731 states and 40311 transitions. Word has length 13 [2019-12-07 16:20:31,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:31,625 INFO L462 AbstractCegarLoop]: Abstraction has 12731 states and 40311 transitions. [2019-12-07 16:20:31,626 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:20:31,626 INFO L276 IsEmpty]: Start isEmpty. Operand 12731 states and 40311 transitions. [2019-12-07 16:20:31,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 16:20:31,626 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:31,627 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:31,627 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:31,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:31,627 INFO L82 PathProgramCache]: Analyzing trace with hash -709244429, now seen corresponding path program 1 times [2019-12-07 16:20:31,627 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:31,627 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925275280] [2019-12-07 16:20:31,627 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:31,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:31,660 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:31,660 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1925275280] [2019-12-07 16:20:31,660 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:31,660 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:20:31,661 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [422108054] [2019-12-07 16:20:31,661 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:20:31,661 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:31,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:20:31,662 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:20:31,662 INFO L87 Difference]: Start difference. First operand 12731 states and 40311 transitions. Second operand 4 states. [2019-12-07 16:20:31,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:31,677 INFO L93 Difference]: Finished difference Result 1935 states and 4522 transitions. [2019-12-07 16:20:31,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:20:31,677 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 16:20:31,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:31,680 INFO L225 Difference]: With dead ends: 1935 [2019-12-07 16:20:31,680 INFO L226 Difference]: Without dead ends: 1935 [2019-12-07 16:20:31,680 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:20:31,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1935 states. [2019-12-07 16:20:31,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1935 to 1935. [2019-12-07 16:20:31,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1935 states. [2019-12-07 16:20:31,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1935 states to 1935 states and 4522 transitions. [2019-12-07 16:20:31,702 INFO L78 Accepts]: Start accepts. Automaton has 1935 states and 4522 transitions. Word has length 14 [2019-12-07 16:20:31,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:31,703 INFO L462 AbstractCegarLoop]: Abstraction has 1935 states and 4522 transitions. [2019-12-07 16:20:31,703 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:20:31,703 INFO L276 IsEmpty]: Start isEmpty. Operand 1935 states and 4522 transitions. [2019-12-07 16:20:31,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 16:20:31,704 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:31,704 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:31,704 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:31,704 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:31,704 INFO L82 PathProgramCache]: Analyzing trace with hash -1471989024, now seen corresponding path program 1 times [2019-12-07 16:20:31,704 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:31,705 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [723656481] [2019-12-07 16:20:31,705 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:31,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:31,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:31,769 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [723656481] [2019-12-07 16:20:31,769 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:31,769 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:20:31,769 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1071444650] [2019-12-07 16:20:31,770 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:20:31,770 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:31,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:20:31,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:20:31,770 INFO L87 Difference]: Start difference. First operand 1935 states and 4522 transitions. Second operand 5 states. [2019-12-07 16:20:31,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:31,788 INFO L93 Difference]: Finished difference Result 652 states and 1532 transitions. [2019-12-07 16:20:31,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:20:31,788 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 16:20:31,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:31,790 INFO L225 Difference]: With dead ends: 652 [2019-12-07 16:20:31,790 INFO L226 Difference]: Without dead ends: 652 [2019-12-07 16:20:31,790 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:20:31,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 652 states. [2019-12-07 16:20:31,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 652 to 596. [2019-12-07 16:20:31,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 596 states. [2019-12-07 16:20:31,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 596 states to 596 states and 1400 transitions. [2019-12-07 16:20:31,798 INFO L78 Accepts]: Start accepts. Automaton has 596 states and 1400 transitions. Word has length 26 [2019-12-07 16:20:31,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:31,799 INFO L462 AbstractCegarLoop]: Abstraction has 596 states and 1400 transitions. [2019-12-07 16:20:31,799 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:20:31,799 INFO L276 IsEmpty]: Start isEmpty. Operand 596 states and 1400 transitions. [2019-12-07 16:20:31,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 16:20:31,800 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:31,801 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:31,801 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:31,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:31,801 INFO L82 PathProgramCache]: Analyzing trace with hash 827870922, now seen corresponding path program 1 times [2019-12-07 16:20:31,801 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:31,801 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [520449912] [2019-12-07 16:20:31,801 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:31,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:31,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:31,863 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [520449912] [2019-12-07 16:20:31,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:31,863 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:20:31,863 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [87521702] [2019-12-07 16:20:31,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:20:31,863 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:31,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:20:31,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:31,864 INFO L87 Difference]: Start difference. First operand 596 states and 1400 transitions. Second operand 3 states. [2019-12-07 16:20:31,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:31,895 INFO L93 Difference]: Finished difference Result 608 states and 1417 transitions. [2019-12-07 16:20:31,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:20:31,895 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 16:20:31,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:31,896 INFO L225 Difference]: With dead ends: 608 [2019-12-07 16:20:31,896 INFO L226 Difference]: Without dead ends: 608 [2019-12-07 16:20:31,897 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:31,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 608 states. [2019-12-07 16:20:31,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 608 to 604. [2019-12-07 16:20:31,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 604 states. [2019-12-07 16:20:31,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 604 states to 604 states and 1413 transitions. [2019-12-07 16:20:31,905 INFO L78 Accepts]: Start accepts. Automaton has 604 states and 1413 transitions. Word has length 55 [2019-12-07 16:20:31,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:31,905 INFO L462 AbstractCegarLoop]: Abstraction has 604 states and 1413 transitions. [2019-12-07 16:20:31,905 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:20:31,905 INFO L276 IsEmpty]: Start isEmpty. Operand 604 states and 1413 transitions. [2019-12-07 16:20:31,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 16:20:31,907 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:31,907 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:31,907 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:31,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:31,908 INFO L82 PathProgramCache]: Analyzing trace with hash -345025503, now seen corresponding path program 1 times [2019-12-07 16:20:31,908 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:31,908 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564603557] [2019-12-07 16:20:31,908 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:31,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:31,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:31,958 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1564603557] [2019-12-07 16:20:31,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:31,958 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:20:31,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1771990366] [2019-12-07 16:20:31,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:20:31,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:31,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:20:31,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:31,959 INFO L87 Difference]: Start difference. First operand 604 states and 1413 transitions. Second operand 3 states. [2019-12-07 16:20:31,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:31,992 INFO L93 Difference]: Finished difference Result 608 states and 1410 transitions. [2019-12-07 16:20:31,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:20:31,992 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 16:20:31,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:31,993 INFO L225 Difference]: With dead ends: 608 [2019-12-07 16:20:31,993 INFO L226 Difference]: Without dead ends: 608 [2019-12-07 16:20:31,994 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:31,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 608 states. [2019-12-07 16:20:32,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 608 to 604. [2019-12-07 16:20:32,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 604 states. [2019-12-07 16:20:32,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 604 states to 604 states and 1406 transitions. [2019-12-07 16:20:32,002 INFO L78 Accepts]: Start accepts. Automaton has 604 states and 1406 transitions. Word has length 55 [2019-12-07 16:20:32,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:32,002 INFO L462 AbstractCegarLoop]: Abstraction has 604 states and 1406 transitions. [2019-12-07 16:20:32,002 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:20:32,002 INFO L276 IsEmpty]: Start isEmpty. Operand 604 states and 1406 transitions. [2019-12-07 16:20:32,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 16:20:32,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:32,004 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:32,004 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:32,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:32,005 INFO L82 PathProgramCache]: Analyzing trace with hash -349465323, now seen corresponding path program 1 times [2019-12-07 16:20:32,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:32,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795042785] [2019-12-07 16:20:32,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:32,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:32,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:32,080 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [795042785] [2019-12-07 16:20:32,080 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:32,080 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:20:32,080 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [501403371] [2019-12-07 16:20:32,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:20:32,080 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:32,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:20:32,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:20:32,081 INFO L87 Difference]: Start difference. First operand 604 states and 1406 transitions. Second operand 5 states. [2019-12-07 16:20:32,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:32,214 INFO L93 Difference]: Finished difference Result 893 states and 2078 transitions. [2019-12-07 16:20:32,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:20:32,214 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2019-12-07 16:20:32,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:32,215 INFO L225 Difference]: With dead ends: 893 [2019-12-07 16:20:32,215 INFO L226 Difference]: Without dead ends: 893 [2019-12-07 16:20:32,215 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:20:32,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 893 states. [2019-12-07 16:20:32,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 893 to 718. [2019-12-07 16:20:32,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 718 states. [2019-12-07 16:20:32,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1687 transitions. [2019-12-07 16:20:32,223 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1687 transitions. Word has length 55 [2019-12-07 16:20:32,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:32,223 INFO L462 AbstractCegarLoop]: Abstraction has 718 states and 1687 transitions. [2019-12-07 16:20:32,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:20:32,223 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1687 transitions. [2019-12-07 16:20:32,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 16:20:32,224 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:32,224 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:32,225 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:32,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:32,225 INFO L82 PathProgramCache]: Analyzing trace with hash -1055549477, now seen corresponding path program 2 times [2019-12-07 16:20:32,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:32,225 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [817471902] [2019-12-07 16:20:32,225 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:32,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:32,300 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:32,301 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [817471902] [2019-12-07 16:20:32,301 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:32,301 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:20:32,301 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1310572701] [2019-12-07 16:20:32,301 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:20:32,301 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:32,301 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:20:32,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:32,302 INFO L87 Difference]: Start difference. First operand 718 states and 1687 transitions. Second operand 3 states. [2019-12-07 16:20:32,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:32,338 INFO L93 Difference]: Finished difference Result 718 states and 1686 transitions. [2019-12-07 16:20:32,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:20:32,338 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 16:20:32,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:32,339 INFO L225 Difference]: With dead ends: 718 [2019-12-07 16:20:32,339 INFO L226 Difference]: Without dead ends: 718 [2019-12-07 16:20:32,339 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:32,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states. [2019-12-07 16:20:32,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 535. [2019-12-07 16:20:32,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 535 states. [2019-12-07 16:20:32,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 535 states to 535 states and 1263 transitions. [2019-12-07 16:20:32,345 INFO L78 Accepts]: Start accepts. Automaton has 535 states and 1263 transitions. Word has length 55 [2019-12-07 16:20:32,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:32,345 INFO L462 AbstractCegarLoop]: Abstraction has 535 states and 1263 transitions. [2019-12-07 16:20:32,345 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:20:32,345 INFO L276 IsEmpty]: Start isEmpty. Operand 535 states and 1263 transitions. [2019-12-07 16:20:32,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:20:32,346 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:32,347 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:32,347 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:32,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:32,347 INFO L82 PathProgramCache]: Analyzing trace with hash -916645642, now seen corresponding path program 1 times [2019-12-07 16:20:32,347 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:32,347 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180371690] [2019-12-07 16:20:32,347 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:32,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:32,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:32,441 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [180371690] [2019-12-07 16:20:32,441 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:32,441 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:20:32,441 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [555221885] [2019-12-07 16:20:32,441 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:20:32,442 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:32,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:20:32,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:20:32,442 INFO L87 Difference]: Start difference. First operand 535 states and 1263 transitions. Second operand 7 states. [2019-12-07 16:20:32,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:32,530 INFO L93 Difference]: Finished difference Result 1016 states and 2240 transitions. [2019-12-07 16:20:32,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 16:20:32,531 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 56 [2019-12-07 16:20:32,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:32,532 INFO L225 Difference]: With dead ends: 1016 [2019-12-07 16:20:32,532 INFO L226 Difference]: Without dead ends: 683 [2019-12-07 16:20:32,532 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:20:32,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 683 states. [2019-12-07 16:20:32,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 683 to 472. [2019-12-07 16:20:32,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 472 states. [2019-12-07 16:20:32,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 472 states to 472 states and 1080 transitions. [2019-12-07 16:20:32,538 INFO L78 Accepts]: Start accepts. Automaton has 472 states and 1080 transitions. Word has length 56 [2019-12-07 16:20:32,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:32,538 INFO L462 AbstractCegarLoop]: Abstraction has 472 states and 1080 transitions. [2019-12-07 16:20:32,539 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:20:32,539 INFO L276 IsEmpty]: Start isEmpty. Operand 472 states and 1080 transitions. [2019-12-07 16:20:32,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:20:32,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:32,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:32,540 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:32,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:32,540 INFO L82 PathProgramCache]: Analyzing trace with hash -310787320, now seen corresponding path program 2 times [2019-12-07 16:20:32,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:32,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404007164] [2019-12-07 16:20:32,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:32,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:32,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:32,587 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [404007164] [2019-12-07 16:20:32,587 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:32,587 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:20:32,587 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [963262483] [2019-12-07 16:20:32,588 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:20:32,588 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:32,588 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:20:32,588 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:32,588 INFO L87 Difference]: Start difference. First operand 472 states and 1080 transitions. Second operand 3 states. [2019-12-07 16:20:32,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:32,599 INFO L93 Difference]: Finished difference Result 449 states and 994 transitions. [2019-12-07 16:20:32,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:20:32,599 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 16:20:32,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:32,600 INFO L225 Difference]: With dead ends: 449 [2019-12-07 16:20:32,600 INFO L226 Difference]: Without dead ends: 449 [2019-12-07 16:20:32,601 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:20:32,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 449 states. [2019-12-07 16:20:32,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 449 to 413. [2019-12-07 16:20:32,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 413 states. [2019-12-07 16:20:32,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 908 transitions. [2019-12-07 16:20:32,607 INFO L78 Accepts]: Start accepts. Automaton has 413 states and 908 transitions. Word has length 56 [2019-12-07 16:20:32,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:32,607 INFO L462 AbstractCegarLoop]: Abstraction has 413 states and 908 transitions. [2019-12-07 16:20:32,607 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:20:32,607 INFO L276 IsEmpty]: Start isEmpty. Operand 413 states and 908 transitions. [2019-12-07 16:20:32,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 16:20:32,608 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:32,608 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:32,609 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:32,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:32,609 INFO L82 PathProgramCache]: Analyzing trace with hash 704044892, now seen corresponding path program 1 times [2019-12-07 16:20:32,609 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:32,609 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1113106894] [2019-12-07 16:20:32,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:32,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:32,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:32,708 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1113106894] [2019-12-07 16:20:32,708 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:32,708 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:20:32,709 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [130567719] [2019-12-07 16:20:32,709 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:20:32,709 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:32,709 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:20:32,709 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:20:32,709 INFO L87 Difference]: Start difference. First operand 413 states and 908 transitions. Second operand 6 states. [2019-12-07 16:20:32,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:32,771 INFO L93 Difference]: Finished difference Result 648 states and 1360 transitions. [2019-12-07 16:20:32,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:20:32,771 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 57 [2019-12-07 16:20:32,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:32,772 INFO L225 Difference]: With dead ends: 648 [2019-12-07 16:20:32,772 INFO L226 Difference]: Without dead ends: 233 [2019-12-07 16:20:32,772 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:20:32,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2019-12-07 16:20:32,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 209. [2019-12-07 16:20:32,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-12-07 16:20:32,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 361 transitions. [2019-12-07 16:20:32,775 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 361 transitions. Word has length 57 [2019-12-07 16:20:32,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:32,775 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 361 transitions. [2019-12-07 16:20:32,775 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:20:32,775 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 361 transitions. [2019-12-07 16:20:32,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 16:20:32,776 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:32,776 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:32,776 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:32,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:32,776 INFO L82 PathProgramCache]: Analyzing trace with hash -876750572, now seen corresponding path program 2 times [2019-12-07 16:20:32,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:32,777 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [835342959] [2019-12-07 16:20:32,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:32,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:20:32,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:20:32,977 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [835342959] [2019-12-07 16:20:32,977 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:20:32,977 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:20:32,977 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [254142388] [2019-12-07 16:20:32,978 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 16:20:32,978 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:20:32,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 16:20:32,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:20:32,978 INFO L87 Difference]: Start difference. First operand 209 states and 361 transitions. Second operand 13 states. [2019-12-07 16:20:33,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:20:33,235 INFO L93 Difference]: Finished difference Result 360 states and 604 transitions. [2019-12-07 16:20:33,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 16:20:33,235 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2019-12-07 16:20:33,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:20:33,235 INFO L225 Difference]: With dead ends: 360 [2019-12-07 16:20:33,235 INFO L226 Difference]: Without dead ends: 327 [2019-12-07 16:20:33,236 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=90, Invalid=416, Unknown=0, NotChecked=0, Total=506 [2019-12-07 16:20:33,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2019-12-07 16:20:33,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 317. [2019-12-07 16:20:33,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-12-07 16:20:33,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 546 transitions. [2019-12-07 16:20:33,239 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 546 transitions. Word has length 57 [2019-12-07 16:20:33,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:20:33,239 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 546 transitions. [2019-12-07 16:20:33,239 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 16:20:33,239 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 546 transitions. [2019-12-07 16:20:33,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 16:20:33,240 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:20:33,240 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:20:33,240 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:20:33,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:20:33,241 INFO L82 PathProgramCache]: Analyzing trace with hash -1963724718, now seen corresponding path program 3 times [2019-12-07 16:20:33,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:20:33,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1235290115] [2019-12-07 16:20:33,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:20:33,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:20:33,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:20:33,317 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 16:20:33,318 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:20:33,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1211~0.base_25|) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (< 0 |v_#StackHeapBarrier_17|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1211~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1211~0.base_25|) |v_ULTIMATE.start_main_~#t1211~0.offset_19| 0)) |v_#memory_int_21|) (= v_~main$tmp_guard0~0_23 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1211~0.base_25| 4) |v_#length_23|) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= v_~z~0_106 0) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1211~0.base_25| 1)) (= v_~a~0_45 0) (= |v_ULTIMATE.start_main_~#t1211~0.offset_19| 0) (= v_~y~0_155 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1211~0.base_25|)) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= v_~y$r_buff1_thd0~0_281 0) (= v_~y$w_buff0_used~0_625 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1213~0.base=|v_ULTIMATE.start_main_~#t1213~0.base_25|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ULTIMATE.start_main_~#t1213~0.offset=|v_ULTIMATE.start_main_~#t1213~0.offset_19|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_25|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_25|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_19|, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1213~0.base, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1213~0.offset, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1211~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t1212~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_~#t1211~0.offset, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:20:33,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1212~0.base_13|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1212~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1212~0.base_13|) |v_ULTIMATE.start_main_~#t1212~0.offset_11| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1212~0.base_13| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1212~0.base_13|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1212~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t1212~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1212~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_11|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_~#t1212~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 16:20:33,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1213~0.base_13| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1213~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1213~0.base_13|) |v_ULTIMATE.start_main_~#t1213~0.offset_11| 2)) |v_#memory_int_13|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1213~0.base_13| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1213~0.base_13|) (not (= |v_ULTIMATE.start_main_~#t1213~0.base_13| 0)) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1213~0.base_13|) 0) (= |v_ULTIMATE.start_main_~#t1213~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1213~0.base=|v_ULTIMATE.start_main_~#t1213~0.base_13|, ULTIMATE.start_main_~#t1213~0.offset=|v_ULTIMATE.start_main_~#t1213~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1213~0.base, ULTIMATE.start_main_~#t1213~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 16:20:33,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:20:33,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 16:20:33,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1078526536 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-1078526536 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite11_Out-1078526536|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-1078526536 |P2Thread1of1ForFork0_#t~ite11_Out-1078526536|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1078526536, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1078526536} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1078526536, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1078526536|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1078526536} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 16:20:33,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1294532941 256))) (.cse3 (= (mod ~y$r_buff0_thd3~0_In-1294532941 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1294532941 256))) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-1294532941 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite12_Out-1294532941|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1294532941 |P2Thread1of1ForFork0_#t~ite12_Out-1294532941|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1294532941, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1294532941, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1294532941, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1294532941} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1294532941, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1294532941, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1294532941|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1294532941, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1294532941} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 16:20:33,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1537798542 256))) (.cse0 (= ~y$r_buff0_thd3~0_In1537798542 ~y$r_buff0_thd3~0_Out1537798542)) (.cse2 (= (mod ~y$w_buff0_used~0_In1537798542 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~y$r_buff0_thd3~0_Out1537798542) (not .cse2) (not .cse1)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1537798542, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1537798542} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1537798542, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out1537798542, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out1537798542|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 16:20:33,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-2026637381 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-2026637381 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-2026637381 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In-2026637381 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite14_Out-2026637381|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$r_buff1_thd3~0_In-2026637381 |P2Thread1of1ForFork0_#t~ite14_Out-2026637381|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2026637381, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2026637381, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2026637381, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2026637381} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-2026637381|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2026637381, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2026637381, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2026637381, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2026637381} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 16:20:33,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 16:20:33,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-372772971 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-372772971 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite3_Out-372772971| ~y$w_buff1~0_In-372772971) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite3_Out-372772971| ~y~0_In-372772971)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-372772971, ~y$w_buff1~0=~y$w_buff1~0_In-372772971, ~y~0=~y~0_In-372772971, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-372772971} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-372772971, ~y$w_buff1~0=~y$w_buff1~0_In-372772971, ~y~0=~y~0_In-372772971, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-372772971|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-372772971} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 16:20:33,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 16:20:33,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-55725472 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-55725472 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite5_Out-55725472| ~y$w_buff0_used~0_In-55725472) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out-55725472|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-55725472, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-55725472} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-55725472, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-55725472, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out-55725472|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 16:20:33,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In1643590795 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In1643590795 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In1643590795 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1643590795 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite6_Out1643590795|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$w_buff1_used~0_In1643590795 |P1Thread1of1ForFork2_#t~ite6_Out1643590795|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1643590795, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1643590795, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1643590795, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1643590795} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1643590795, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1643590795, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1643590795, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out1643590795|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1643590795} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 16:20:33,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1562733594 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1562733594 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite7_Out1562733594| ~y$r_buff0_thd2~0_In1562733594)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite7_Out1562733594| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1562733594, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1562733594} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1562733594, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1562733594, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out1562733594|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 16:20:33,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In-885664710 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-885664710 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-885664710 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-885664710 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-885664710 |P1Thread1of1ForFork2_#t~ite8_Out-885664710|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out-885664710|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-885664710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-885664710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-885664710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-885664710} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-885664710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-885664710, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-885664710|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-885664710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-885664710} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 16:20:33,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 16:20:33,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:20:33,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite19_Out-1739963601| |ULTIMATE.start_main_#t~ite18_Out-1739963601|)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1739963601 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-1739963601 256) 0))) (or (and (= ~y~0_In-1739963601 |ULTIMATE.start_main_#t~ite18_Out-1739963601|) .cse0 (or .cse1 .cse2)) (and .cse0 (= |ULTIMATE.start_main_#t~ite18_Out-1739963601| ~y$w_buff1~0_In-1739963601) (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1739963601, ~y~0=~y~0_In-1739963601, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1739963601, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1739963601} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1739963601, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1739963601|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1739963601|, ~y~0=~y~0_In-1739963601, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1739963601, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1739963601} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 16:20:33,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In2048669462 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In2048669462 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out2048669462| ~y$w_buff0_used~0_In2048669462) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite20_Out2048669462|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2048669462, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2048669462} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2048669462, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2048669462, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out2048669462|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 16:20:33,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In-99524898 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-99524898 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-99524898 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-99524898 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite21_Out-99524898|)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite21_Out-99524898| ~y$w_buff1_used~0_In-99524898) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-99524898, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-99524898, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-99524898, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-99524898} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-99524898, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-99524898, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-99524898|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-99524898, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-99524898} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 16:20:33,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-218420770 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-218420770 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-218420770| ~y$r_buff0_thd0~0_In-218420770) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out-218420770| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-218420770, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-218420770} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-218420770, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-218420770, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-218420770|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 16:20:33,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-1896129861 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd0~0_In-1896129861 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1896129861 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1896129861 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite23_Out-1896129861|)) (and (= ~y$r_buff1_thd0~0_In-1896129861 |ULTIMATE.start_main_#t~ite23_Out-1896129861|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1896129861, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1896129861, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1896129861, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1896129861} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1896129861, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1896129861, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1896129861, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1896129861|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1896129861} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 16:20:33,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1776576061 256)))) (or (and (= ~y$w_buff1~0_In-1776576061 |ULTIMATE.start_main_#t~ite32_Out-1776576061|) .cse0 (= |ULTIMATE.start_main_#t~ite33_Out-1776576061| |ULTIMATE.start_main_#t~ite32_Out-1776576061|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1776576061 256) 0))) (or (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-1776576061 256))) (and (= (mod ~y$r_buff1_thd0~0_In-1776576061 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In-1776576061 256) 0)))) (and (not .cse0) (= ~y$w_buff1~0_In-1776576061 |ULTIMATE.start_main_#t~ite33_Out-1776576061|) (= |ULTIMATE.start_main_#t~ite32_In-1776576061| |ULTIMATE.start_main_#t~ite32_Out-1776576061|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1776576061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1776576061, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1776576061, ~weak$$choice2~0=~weak$$choice2~0_In-1776576061, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1776576061, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In-1776576061|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1776576061} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1776576061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1776576061, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1776576061, ~weak$$choice2~0=~weak$$choice2~0_In-1776576061, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1776576061|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1776576061, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out-1776576061|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1776576061} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-12-07 16:20:33,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In653187908 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite35_In653187908| |ULTIMATE.start_main_#t~ite35_Out653187908|) (= ~y$w_buff0_used~0_In653187908 |ULTIMATE.start_main_#t~ite36_Out653187908|) (not .cse0)) (and (= ~y$w_buff0_used~0_In653187908 |ULTIMATE.start_main_#t~ite35_Out653187908|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In653187908 256) 0))) (or (= (mod ~y$w_buff0_used~0_In653187908 256) 0) (and (= (mod ~y$w_buff1_used~0_In653187908 256) 0) .cse1) (and (= 0 (mod ~y$r_buff1_thd0~0_In653187908 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite36_Out653187908| |ULTIMATE.start_main_#t~ite35_Out653187908|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In653187908, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In653187908, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In653187908|, ~weak$$choice2~0=~weak$$choice2~0_In653187908, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In653187908, ~y$w_buff1_used~0=~y$w_buff1_used~0_In653187908} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In653187908, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In653187908, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out653187908|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out653187908|, ~weak$$choice2~0=~weak$$choice2~0_In653187908, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In653187908, ~y$w_buff1_used~0=~y$w_buff1_used~0_In653187908} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 16:20:33,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-183153968 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In-183153968| |ULTIMATE.start_main_#t~ite38_Out-183153968|) (= |ULTIMATE.start_main_#t~ite39_Out-183153968| ~y$w_buff1_used~0_In-183153968)) (and (= ~y$w_buff1_used~0_In-183153968 |ULTIMATE.start_main_#t~ite38_Out-183153968|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-183153968 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-183153968 256))) (= (mod ~y$w_buff0_used~0_In-183153968 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-183153968 256))))) (= |ULTIMATE.start_main_#t~ite39_Out-183153968| |ULTIMATE.start_main_#t~ite38_Out-183153968|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-183153968, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-183153968, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-183153968|, ~weak$$choice2~0=~weak$$choice2~0_In-183153968, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-183153968, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-183153968} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-183153968, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-183153968|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-183153968, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-183153968|, ~weak$$choice2~0=~weak$$choice2~0_In-183153968, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-183153968, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-183153968} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 16:20:33,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 16:20:33,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:20:33,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:20:33,392 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:20:33 BasicIcfg [2019-12-07 16:20:33,392 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:20:33,392 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:20:33,392 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:20:33,392 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:20:33,393 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:20:25" (3/4) ... [2019-12-07 16:20:33,394 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:20:33,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1211~0.base_25|) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (< 0 |v_#StackHeapBarrier_17|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1211~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1211~0.base_25|) |v_ULTIMATE.start_main_~#t1211~0.offset_19| 0)) |v_#memory_int_21|) (= v_~main$tmp_guard0~0_23 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1211~0.base_25| 4) |v_#length_23|) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= v_~z~0_106 0) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1211~0.base_25| 1)) (= v_~a~0_45 0) (= |v_ULTIMATE.start_main_~#t1211~0.offset_19| 0) (= v_~y~0_155 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1211~0.base_25|)) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= v_~y$r_buff1_thd0~0_281 0) (= v_~y$w_buff0_used~0_625 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1213~0.base=|v_ULTIMATE.start_main_~#t1213~0.base_25|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ULTIMATE.start_main_~#t1213~0.offset=|v_ULTIMATE.start_main_~#t1213~0.offset_19|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ULTIMATE.start_main_~#t1211~0.base=|v_ULTIMATE.start_main_~#t1211~0.base_25|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_25|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_~#t1211~0.offset=|v_ULTIMATE.start_main_~#t1211~0.offset_19|, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1213~0.base, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1213~0.offset, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1211~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t1212~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_~#t1211~0.offset, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:20:33,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1212~0.base_13|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1212~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1212~0.base_13|) |v_ULTIMATE.start_main_~#t1212~0.offset_11| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1212~0.base_13| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1212~0.base_13|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1212~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t1212~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1212~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1212~0.offset=|v_ULTIMATE.start_main_~#t1212~0.offset_11|, ULTIMATE.start_main_~#t1212~0.base=|v_ULTIMATE.start_main_~#t1212~0.base_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1212~0.offset, ULTIMATE.start_main_~#t1212~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 16:20:33,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1213~0.base_13| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1213~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1213~0.base_13|) |v_ULTIMATE.start_main_~#t1213~0.offset_11| 2)) |v_#memory_int_13|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1213~0.base_13| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1213~0.base_13|) (not (= |v_ULTIMATE.start_main_~#t1213~0.base_13| 0)) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1213~0.base_13|) 0) (= |v_ULTIMATE.start_main_~#t1213~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1213~0.base=|v_ULTIMATE.start_main_~#t1213~0.base_13|, ULTIMATE.start_main_~#t1213~0.offset=|v_ULTIMATE.start_main_~#t1213~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1213~0.base, ULTIMATE.start_main_~#t1213~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 16:20:33,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:20:33,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 16:20:33,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1078526536 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-1078526536 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite11_Out-1078526536|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-1078526536 |P2Thread1of1ForFork0_#t~ite11_Out-1078526536|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1078526536, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1078526536} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1078526536, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1078526536|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1078526536} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 16:20:33,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1294532941 256))) (.cse3 (= (mod ~y$r_buff0_thd3~0_In-1294532941 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1294532941 256))) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-1294532941 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite12_Out-1294532941|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1294532941 |P2Thread1of1ForFork0_#t~ite12_Out-1294532941|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1294532941, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1294532941, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1294532941, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1294532941} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1294532941, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1294532941, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1294532941|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1294532941, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1294532941} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 16:20:33,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1537798542 256))) (.cse0 (= ~y$r_buff0_thd3~0_In1537798542 ~y$r_buff0_thd3~0_Out1537798542)) (.cse2 (= (mod ~y$w_buff0_used~0_In1537798542 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~y$r_buff0_thd3~0_Out1537798542) (not .cse2) (not .cse1)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1537798542, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1537798542} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1537798542, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out1537798542, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out1537798542|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 16:20:33,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-2026637381 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-2026637381 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-2026637381 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In-2026637381 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite14_Out-2026637381|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$r_buff1_thd3~0_In-2026637381 |P2Thread1of1ForFork0_#t~ite14_Out-2026637381|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2026637381, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2026637381, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2026637381, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2026637381} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-2026637381|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2026637381, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2026637381, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2026637381, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2026637381} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 16:20:33,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 16:20:33,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-372772971 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-372772971 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite3_Out-372772971| ~y$w_buff1~0_In-372772971) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite3_Out-372772971| ~y~0_In-372772971)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-372772971, ~y$w_buff1~0=~y$w_buff1~0_In-372772971, ~y~0=~y~0_In-372772971, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-372772971} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-372772971, ~y$w_buff1~0=~y$w_buff1~0_In-372772971, ~y~0=~y~0_In-372772971, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-372772971|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-372772971} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 16:20:33,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 16:20:33,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-55725472 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-55725472 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite5_Out-55725472| ~y$w_buff0_used~0_In-55725472) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out-55725472|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-55725472, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-55725472} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-55725472, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-55725472, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out-55725472|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 16:20:33,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In1643590795 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In1643590795 256))) (.cse0 (= (mod ~y$r_buff1_thd2~0_In1643590795 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1643590795 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite6_Out1643590795|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$w_buff1_used~0_In1643590795 |P1Thread1of1ForFork2_#t~ite6_Out1643590795|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1643590795, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1643590795, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1643590795, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1643590795} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1643590795, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1643590795, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1643590795, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out1643590795|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1643590795} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 16:20:33,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1562733594 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1562733594 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite7_Out1562733594| ~y$r_buff0_thd2~0_In1562733594)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite7_Out1562733594| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1562733594, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1562733594} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1562733594, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1562733594, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out1562733594|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 16:20:33,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In-885664710 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-885664710 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-885664710 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-885664710 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-885664710 |P1Thread1of1ForFork2_#t~ite8_Out-885664710|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out-885664710|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-885664710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-885664710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-885664710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-885664710} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-885664710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-885664710, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-885664710|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-885664710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-885664710} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 16:20:33,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 16:20:33,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:20:33,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite19_Out-1739963601| |ULTIMATE.start_main_#t~ite18_Out-1739963601|)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1739963601 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-1739963601 256) 0))) (or (and (= ~y~0_In-1739963601 |ULTIMATE.start_main_#t~ite18_Out-1739963601|) .cse0 (or .cse1 .cse2)) (and .cse0 (= |ULTIMATE.start_main_#t~ite18_Out-1739963601| ~y$w_buff1~0_In-1739963601) (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1739963601, ~y~0=~y~0_In-1739963601, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1739963601, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1739963601} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1739963601, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1739963601|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1739963601|, ~y~0=~y~0_In-1739963601, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1739963601, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1739963601} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 16:20:33,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In2048669462 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In2048669462 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out2048669462| ~y$w_buff0_used~0_In2048669462) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite20_Out2048669462|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2048669462, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2048669462} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2048669462, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2048669462, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out2048669462|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 16:20:33,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In-99524898 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-99524898 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-99524898 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-99524898 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite21_Out-99524898|)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite21_Out-99524898| ~y$w_buff1_used~0_In-99524898) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-99524898, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-99524898, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-99524898, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-99524898} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-99524898, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-99524898, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-99524898|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-99524898, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-99524898} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 16:20:33,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-218420770 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-218420770 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-218420770| ~y$r_buff0_thd0~0_In-218420770) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out-218420770| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-218420770, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-218420770} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-218420770, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-218420770, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-218420770|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 16:20:33,401 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-1896129861 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd0~0_In-1896129861 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1896129861 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1896129861 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite23_Out-1896129861|)) (and (= ~y$r_buff1_thd0~0_In-1896129861 |ULTIMATE.start_main_#t~ite23_Out-1896129861|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1896129861, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1896129861, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1896129861, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1896129861} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1896129861, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1896129861, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1896129861, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1896129861|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1896129861} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 16:20:33,402 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1776576061 256)))) (or (and (= ~y$w_buff1~0_In-1776576061 |ULTIMATE.start_main_#t~ite32_Out-1776576061|) .cse0 (= |ULTIMATE.start_main_#t~ite33_Out-1776576061| |ULTIMATE.start_main_#t~ite32_Out-1776576061|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-1776576061 256) 0))) (or (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-1776576061 256))) (and (= (mod ~y$r_buff1_thd0~0_In-1776576061 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In-1776576061 256) 0)))) (and (not .cse0) (= ~y$w_buff1~0_In-1776576061 |ULTIMATE.start_main_#t~ite33_Out-1776576061|) (= |ULTIMATE.start_main_#t~ite32_In-1776576061| |ULTIMATE.start_main_#t~ite32_Out-1776576061|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1776576061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1776576061, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1776576061, ~weak$$choice2~0=~weak$$choice2~0_In-1776576061, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1776576061, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In-1776576061|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1776576061} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1776576061, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1776576061, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1776576061, ~weak$$choice2~0=~weak$$choice2~0_In-1776576061, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1776576061|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1776576061, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out-1776576061|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1776576061} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-12-07 16:20:33,402 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In653187908 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite35_In653187908| |ULTIMATE.start_main_#t~ite35_Out653187908|) (= ~y$w_buff0_used~0_In653187908 |ULTIMATE.start_main_#t~ite36_Out653187908|) (not .cse0)) (and (= ~y$w_buff0_used~0_In653187908 |ULTIMATE.start_main_#t~ite35_Out653187908|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In653187908 256) 0))) (or (= (mod ~y$w_buff0_used~0_In653187908 256) 0) (and (= (mod ~y$w_buff1_used~0_In653187908 256) 0) .cse1) (and (= 0 (mod ~y$r_buff1_thd0~0_In653187908 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite36_Out653187908| |ULTIMATE.start_main_#t~ite35_Out653187908|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In653187908, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In653187908, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In653187908|, ~weak$$choice2~0=~weak$$choice2~0_In653187908, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In653187908, ~y$w_buff1_used~0=~y$w_buff1_used~0_In653187908} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In653187908, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In653187908, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out653187908|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out653187908|, ~weak$$choice2~0=~weak$$choice2~0_In653187908, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In653187908, ~y$w_buff1_used~0=~y$w_buff1_used~0_In653187908} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 16:20:33,402 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-183153968 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In-183153968| |ULTIMATE.start_main_#t~ite38_Out-183153968|) (= |ULTIMATE.start_main_#t~ite39_Out-183153968| ~y$w_buff1_used~0_In-183153968)) (and (= ~y$w_buff1_used~0_In-183153968 |ULTIMATE.start_main_#t~ite38_Out-183153968|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-183153968 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-183153968 256))) (= (mod ~y$w_buff0_used~0_In-183153968 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-183153968 256))))) (= |ULTIMATE.start_main_#t~ite39_Out-183153968| |ULTIMATE.start_main_#t~ite38_Out-183153968|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-183153968, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-183153968, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-183153968|, ~weak$$choice2~0=~weak$$choice2~0_In-183153968, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-183153968, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-183153968} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-183153968, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-183153968|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-183153968, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-183153968|, ~weak$$choice2~0=~weak$$choice2~0_In-183153968, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-183153968, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-183153968} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 16:20:33,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 16:20:33,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:20:33,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:20:33,466 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_b6694f5d-2103-4883-bc4f-019e5d4fd299/bin/uautomizer/witness.graphml [2019-12-07 16:20:33,467 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:20:33,468 INFO L168 Benchmark]: Toolchain (without parser) took 9086.82 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 463.5 MB). Free memory was 934.5 MB in the beginning and 1.2 GB in the end (delta: -229.1 MB). Peak memory consumption was 234.3 MB. Max. memory is 11.5 GB. [2019-12-07 16:20:33,468 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 956.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:20:33,469 INFO L168 Benchmark]: CACSL2BoogieTranslator took 465.41 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 934.5 MB in the beginning and 1.1 GB in the end (delta: -173.3 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 16:20:33,469 INFO L168 Benchmark]: Boogie Procedure Inliner took 58.70 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:20:33,469 INFO L168 Benchmark]: Boogie Preprocessor took 26.32 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:20:33,469 INFO L168 Benchmark]: RCFGBuilder took 406.69 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 16:20:33,470 INFO L168 Benchmark]: TraceAbstraction took 8048.97 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 325.1 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -140.0 MB). Peak memory consumption was 185.1 MB. Max. memory is 11.5 GB. [2019-12-07 16:20:33,470 INFO L168 Benchmark]: Witness Printer took 74.63 ms. Allocated memory is still 1.5 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 23.5 MB). Peak memory consumption was 23.5 MB. Max. memory is 11.5 GB. [2019-12-07 16:20:33,472 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 956.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 465.41 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 138.4 MB). Free memory was 934.5 MB in the beginning and 1.1 GB in the end (delta: -173.3 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 58.70 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.32 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 406.69 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 8048.97 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 325.1 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -140.0 MB). Peak memory consumption was 185.1 MB. Max. memory is 11.5 GB. * Witness Printer took 74.63 ms. Allocated memory is still 1.5 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 23.5 MB). Peak memory consumption was 23.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.9s, 164 ProgramPointsBefore, 82 ProgramPointsAfterwards, 195 TransitionsBefore, 91 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 33 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 26 ChoiceCompositions, 4376 VarBasedMoverChecksPositive, 193 VarBasedMoverChecksNegative, 58 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 46792 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L810] FCALL, FORK 0 pthread_create(&t1211, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L812] FCALL, FORK 0 pthread_create(&t1212, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1213, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L771] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L772] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L773] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L774] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L775] 3 y$r_buff0_thd3 = (_Bool)1 [L778] 3 z = 1 [L781] 3 __unbuffered_p2_EAX = z [L784] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L746] 2 x = 2 [L749] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L788] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L789] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L752] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L753] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L754] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L820] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L821] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L822] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L823] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L824] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L827] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L828] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L829] 0 y$flush_delayed = weak$$choice2 [L830] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L832] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L833] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L834] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L835] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L837] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L837] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L838] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 155 locations, 2 error locations. Result: UNSAFE, OverallTime: 7.9s, OverallIterations: 14, TraceHistogramMax: 1, AutomataDifference: 1.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1244 SDtfs, 1038 SDslu, 2453 SDs, 0 SdLazy, 832 SolverSat, 79 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 76 GetRequests, 16 SyntacticMatches, 6 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 73 ImplicationChecksByTransitivity, 0.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22284occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.2s AutomataMinimizationTime, 13 MinimizatonAttempts, 2819 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 576 NumberOfCodeBlocks, 576 NumberOfCodeBlocksAsserted, 14 NumberOfCheckSat, 506 ConstructedInterpolants, 0 QuantifiedInterpolants, 109453 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 13 InterpolantComputations, 13 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...