./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix045_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix045_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d663485961f2ed853910cf53fe3560ecfddb0003 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:05:25,280 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:05:25,281 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:05:25,288 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:05:25,289 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:05:25,289 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:05:25,290 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:05:25,292 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:05:25,293 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:05:25,293 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:05:25,294 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:05:25,295 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:05:25,295 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:05:25,296 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:05:25,296 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:05:25,297 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:05:25,297 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:05:25,298 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:05:25,299 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:05:25,301 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:05:25,302 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:05:25,303 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:05:25,303 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:05:25,304 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:05:25,305 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:05:25,306 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:05:25,306 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:05:25,306 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:05:25,306 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:05:25,307 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:05:25,307 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:05:25,308 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:05:25,308 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:05:25,308 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:05:25,309 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:05:25,309 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:05:25,309 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:05:25,310 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:05:25,310 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:05:25,310 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:05:25,311 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:05:25,311 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:05:25,321 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:05:25,321 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:05:25,321 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:05:25,322 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:05:25,322 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:05:25,322 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:05:25,322 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:05:25,322 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:05:25,322 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:05:25,322 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:05:25,323 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:05:25,323 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:05:25,323 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:05:25,323 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:05:25,323 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:05:25,323 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:05:25,323 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:05:25,323 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:05:25,324 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:05:25,324 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:05:25,324 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:05:25,324 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:05:25,324 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:05:25,324 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:05:25,324 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:05:25,325 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:05:25,325 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:05:25,325 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:05:25,325 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:05:25,325 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d663485961f2ed853910cf53fe3560ecfddb0003 [2019-12-07 17:05:25,422 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:05:25,429 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:05:25,432 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:05:25,433 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:05:25,433 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:05:25,433 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix045_tso.opt.i [2019-12-07 17:05:25,470 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/data/0b932a000/169af17929124a43afdf34ee54cb837b/FLAG242aaac45 [2019-12-07 17:05:25,947 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:05:25,947 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/sv-benchmarks/c/pthread-wmm/mix045_tso.opt.i [2019-12-07 17:05:25,957 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/data/0b932a000/169af17929124a43afdf34ee54cb837b/FLAG242aaac45 [2019-12-07 17:05:25,969 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/data/0b932a000/169af17929124a43afdf34ee54cb837b [2019-12-07 17:05:25,971 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:05:25,972 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:05:25,973 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:05:25,973 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:05:25,976 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:05:25,977 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:05:25" (1/1) ... [2019-12-07 17:05:25,979 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:25, skipping insertion in model container [2019-12-07 17:05:25,979 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:05:25" (1/1) ... [2019-12-07 17:05:25,983 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:05:26,019 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:05:26,279 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:05:26,287 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:05:26,328 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:05:26,376 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:05:26,376 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26 WrapperNode [2019-12-07 17:05:26,376 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:05:26,376 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:05:26,377 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:05:26,377 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:05:26,382 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26" (1/1) ... [2019-12-07 17:05:26,394 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26" (1/1) ... [2019-12-07 17:05:26,415 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:05:26,416 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:05:26,416 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:05:26,416 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:05:26,422 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26" (1/1) ... [2019-12-07 17:05:26,422 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26" (1/1) ... [2019-12-07 17:05:26,425 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26" (1/1) ... [2019-12-07 17:05:26,425 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26" (1/1) ... [2019-12-07 17:05:26,432 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26" (1/1) ... [2019-12-07 17:05:26,435 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26" (1/1) ... [2019-12-07 17:05:26,437 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26" (1/1) ... [2019-12-07 17:05:26,440 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:05:26,441 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:05:26,441 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:05:26,441 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:05:26,442 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:05:26,485 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:05:26,486 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:05:26,486 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:05:26,486 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:05:26,486 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:05:26,486 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:05:26,486 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:05:26,486 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:05:26,486 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:05:26,486 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:05:26,486 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:05:26,487 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:05:26,487 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:05:26,488 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:05:26,835 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:05:26,835 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:05:26,836 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:05:26 BoogieIcfgContainer [2019-12-07 17:05:26,836 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:05:26,836 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:05:26,837 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:05:26,838 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:05:26,838 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:05:25" (1/3) ... [2019-12-07 17:05:26,839 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d8a7ddd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:05:26, skipping insertion in model container [2019-12-07 17:05:26,839 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:05:26" (2/3) ... [2019-12-07 17:05:26,839 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d8a7ddd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:05:26, skipping insertion in model container [2019-12-07 17:05:26,839 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:05:26" (3/3) ... [2019-12-07 17:05:26,840 INFO L109 eAbstractionObserver]: Analyzing ICFG mix045_tso.opt.i [2019-12-07 17:05:26,846 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:05:26,846 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:05:26,851 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:05:26,851 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:05:26,873 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,873 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,873 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,873 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,874 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,874 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,874 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,875 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,875 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,875 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,875 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,875 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,876 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,876 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,876 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,876 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,876 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,876 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,877 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,877 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,877 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,877 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,877 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,878 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,878 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,878 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,878 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,878 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,879 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,879 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,879 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,879 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,879 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,880 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,880 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,880 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,881 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,881 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,881 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,881 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,881 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,881 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,882 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,882 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,882 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,882 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,883 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,883 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,883 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,883 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,883 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,883 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,884 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,884 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,884 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,884 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,884 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,884 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,885 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,885 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,885 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,885 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,885 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,885 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,886 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,886 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,886 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,886 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,886 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,886 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:05:26,902 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:05:26,914 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:05:26,914 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:05:26,914 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:05:26,914 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:05:26,914 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:05:26,915 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:05:26,915 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:05:26,915 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:05:26,925 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 164 places, 195 transitions [2019-12-07 17:05:26,927 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 17:05:26,977 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 17:05:26,977 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:05:26,985 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:05:26,997 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 17:05:27,022 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 17:05:27,022 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:05:27,026 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:05:27,038 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-12-07 17:05:27,038 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:05:29,830 WARN L192 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 17:05:29,912 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46792 [2019-12-07 17:05:29,912 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 17:05:29,914 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 82 places, 91 transitions [2019-12-07 17:05:30,617 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 16134 states. [2019-12-07 17:05:30,619 INFO L276 IsEmpty]: Start isEmpty. Operand 16134 states. [2019-12-07 17:05:30,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 17:05:30,623 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:30,623 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:30,624 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:30,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:30,627 INFO L82 PathProgramCache]: Analyzing trace with hash 1643101290, now seen corresponding path program 1 times [2019-12-07 17:05:30,633 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:30,633 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1842778157] [2019-12-07 17:05:30,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:30,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:30,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:30,786 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1842778157] [2019-12-07 17:05:30,786 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:30,786 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:05:30,787 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1708985595] [2019-12-07 17:05:30,789 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:05:30,790 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:30,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:05:30,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:30,800 INFO L87 Difference]: Start difference. First operand 16134 states. Second operand 3 states. [2019-12-07 17:05:31,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:31,026 INFO L93 Difference]: Finished difference Result 16034 states and 60310 transitions. [2019-12-07 17:05:31,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:05:31,027 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 17:05:31,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:31,182 INFO L225 Difference]: With dead ends: 16034 [2019-12-07 17:05:31,182 INFO L226 Difference]: Without dead ends: 15698 [2019-12-07 17:05:31,183 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:31,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15698 states. [2019-12-07 17:05:31,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15698 to 15698. [2019-12-07 17:05:31,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15698 states. [2019-12-07 17:05:31,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15698 states to 15698 states and 59106 transitions. [2019-12-07 17:05:31,694 INFO L78 Accepts]: Start accepts. Automaton has 15698 states and 59106 transitions. Word has length 7 [2019-12-07 17:05:31,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:31,695 INFO L462 AbstractCegarLoop]: Abstraction has 15698 states and 59106 transitions. [2019-12-07 17:05:31,695 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:05:31,695 INFO L276 IsEmpty]: Start isEmpty. Operand 15698 states and 59106 transitions. [2019-12-07 17:05:31,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:05:31,698 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:31,698 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:31,698 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:31,698 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:31,699 INFO L82 PathProgramCache]: Analyzing trace with hash 565568960, now seen corresponding path program 1 times [2019-12-07 17:05:31,699 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:31,699 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2103253546] [2019-12-07 17:05:31,699 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:31,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:31,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:31,761 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2103253546] [2019-12-07 17:05:31,761 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:31,761 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:05:31,762 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976850596] [2019-12-07 17:05:31,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:05:31,763 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:31,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:05:31,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:05:31,764 INFO L87 Difference]: Start difference. First operand 15698 states and 59106 transitions. Second operand 4 states. [2019-12-07 17:05:32,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:32,076 INFO L93 Difference]: Finished difference Result 24414 states and 88322 transitions. [2019-12-07 17:05:32,077 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:05:32,077 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:05:32,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:32,186 INFO L225 Difference]: With dead ends: 24414 [2019-12-07 17:05:32,186 INFO L226 Difference]: Without dead ends: 24400 [2019-12-07 17:05:32,187 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:05:32,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24400 states. [2019-12-07 17:05:32,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24400 to 22284. [2019-12-07 17:05:32,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22284 states. [2019-12-07 17:05:32,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22284 states to 22284 states and 81513 transitions. [2019-12-07 17:05:32,749 INFO L78 Accepts]: Start accepts. Automaton has 22284 states and 81513 transitions. Word has length 13 [2019-12-07 17:05:32,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:32,749 INFO L462 AbstractCegarLoop]: Abstraction has 22284 states and 81513 transitions. [2019-12-07 17:05:32,749 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:05:32,749 INFO L276 IsEmpty]: Start isEmpty. Operand 22284 states and 81513 transitions. [2019-12-07 17:05:32,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:05:32,752 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:32,752 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:32,752 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:32,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:32,752 INFO L82 PathProgramCache]: Analyzing trace with hash 1863901117, now seen corresponding path program 1 times [2019-12-07 17:05:32,752 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:32,753 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [390994315] [2019-12-07 17:05:32,753 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:32,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:32,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:32,802 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [390994315] [2019-12-07 17:05:32,802 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:32,802 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:05:32,802 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [300164689] [2019-12-07 17:05:32,803 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:05:32,803 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:32,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:05:32,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:05:32,803 INFO L87 Difference]: Start difference. First operand 22284 states and 81513 transitions. Second operand 4 states. [2019-12-07 17:05:33,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:33,044 INFO L93 Difference]: Finished difference Result 27604 states and 99705 transitions. [2019-12-07 17:05:33,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:05:33,044 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:05:33,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:33,099 INFO L225 Difference]: With dead ends: 27604 [2019-12-07 17:05:33,099 INFO L226 Difference]: Without dead ends: 27604 [2019-12-07 17:05:33,100 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:05:33,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27604 states. [2019-12-07 17:05:33,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27604 to 24754. [2019-12-07 17:05:33,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24754 states. [2019-12-07 17:05:33,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24754 states to 24754 states and 90160 transitions. [2019-12-07 17:05:33,521 INFO L78 Accepts]: Start accepts. Automaton has 24754 states and 90160 transitions. Word has length 13 [2019-12-07 17:05:33,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:33,521 INFO L462 AbstractCegarLoop]: Abstraction has 24754 states and 90160 transitions. [2019-12-07 17:05:33,521 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:05:33,522 INFO L276 IsEmpty]: Start isEmpty. Operand 24754 states and 90160 transitions. [2019-12-07 17:05:33,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:05:33,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:33,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:33,526 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:33,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:33,526 INFO L82 PathProgramCache]: Analyzing trace with hash -1245036147, now seen corresponding path program 1 times [2019-12-07 17:05:33,526 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:33,526 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1951492172] [2019-12-07 17:05:33,526 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:33,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:33,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:33,558 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1951492172] [2019-12-07 17:05:33,558 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:33,558 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:05:33,558 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1903463211] [2019-12-07 17:05:33,559 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:05:33,559 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:33,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:05:33,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:33,559 INFO L87 Difference]: Start difference. First operand 24754 states and 90160 transitions. Second operand 3 states. [2019-12-07 17:05:33,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:33,597 INFO L93 Difference]: Finished difference Result 13966 states and 44017 transitions. [2019-12-07 17:05:33,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:05:33,598 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 17:05:33,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:33,614 INFO L225 Difference]: With dead ends: 13966 [2019-12-07 17:05:33,615 INFO L226 Difference]: Without dead ends: 13966 [2019-12-07 17:05:33,615 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:33,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13966 states. [2019-12-07 17:05:33,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13966 to 13966. [2019-12-07 17:05:33,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13966 states. [2019-12-07 17:05:33,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13966 states to 13966 states and 44017 transitions. [2019-12-07 17:05:33,895 INFO L78 Accepts]: Start accepts. Automaton has 13966 states and 44017 transitions. Word has length 19 [2019-12-07 17:05:33,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:33,895 INFO L462 AbstractCegarLoop]: Abstraction has 13966 states and 44017 transitions. [2019-12-07 17:05:33,895 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:05:33,895 INFO L276 IsEmpty]: Start isEmpty. Operand 13966 states and 44017 transitions. [2019-12-07 17:05:33,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 17:05:33,897 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:33,897 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:33,897 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:33,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:33,897 INFO L82 PathProgramCache]: Analyzing trace with hash 1059334979, now seen corresponding path program 1 times [2019-12-07 17:05:33,898 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:33,898 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [43931315] [2019-12-07 17:05:33,898 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:33,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:33,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:33,961 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [43931315] [2019-12-07 17:05:33,961 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:33,961 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:05:33,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [542968366] [2019-12-07 17:05:33,962 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:05:33,962 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:33,962 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:05:33,962 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:05:33,962 INFO L87 Difference]: Start difference. First operand 13966 states and 44017 transitions. Second operand 5 states. [2019-12-07 17:05:34,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:34,257 INFO L93 Difference]: Finished difference Result 18476 states and 56975 transitions. [2019-12-07 17:05:34,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:05:34,257 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2019-12-07 17:05:34,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:34,278 INFO L225 Difference]: With dead ends: 18476 [2019-12-07 17:05:34,278 INFO L226 Difference]: Without dead ends: 18469 [2019-12-07 17:05:34,279 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:05:34,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18469 states. [2019-12-07 17:05:34,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18469 to 14127. [2019-12-07 17:05:34,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14127 states. [2019-12-07 17:05:34,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14127 states to 14127 states and 44412 transitions. [2019-12-07 17:05:34,492 INFO L78 Accepts]: Start accepts. Automaton has 14127 states and 44412 transitions. Word has length 20 [2019-12-07 17:05:34,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:34,492 INFO L462 AbstractCegarLoop]: Abstraction has 14127 states and 44412 transitions. [2019-12-07 17:05:34,492 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:05:34,492 INFO L276 IsEmpty]: Start isEmpty. Operand 14127 states and 44412 transitions. [2019-12-07 17:05:34,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:05:34,498 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:34,499 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:34,499 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:34,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:34,499 INFO L82 PathProgramCache]: Analyzing trace with hash 1629892990, now seen corresponding path program 1 times [2019-12-07 17:05:34,499 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:34,499 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1220391601] [2019-12-07 17:05:34,499 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:34,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:34,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:34,557 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1220391601] [2019-12-07 17:05:34,557 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:34,557 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:05:34,558 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1131135736] [2019-12-07 17:05:34,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:05:34,558 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:34,558 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:05:34,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:05:34,559 INFO L87 Difference]: Start difference. First operand 14127 states and 44412 transitions. Second operand 6 states. [2019-12-07 17:05:34,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:34,815 INFO L93 Difference]: Finished difference Result 19872 states and 61083 transitions. [2019-12-07 17:05:34,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:05:34,815 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 17:05:34,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:34,836 INFO L225 Difference]: With dead ends: 19872 [2019-12-07 17:05:34,837 INFO L226 Difference]: Without dead ends: 19856 [2019-12-07 17:05:34,837 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:05:34,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19856 states. [2019-12-07 17:05:35,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19856 to 18066. [2019-12-07 17:05:35,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18066 states. [2019-12-07 17:05:35,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18066 states to 18066 states and 55900 transitions. [2019-12-07 17:05:35,105 INFO L78 Accepts]: Start accepts. Automaton has 18066 states and 55900 transitions. Word has length 28 [2019-12-07 17:05:35,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:35,105 INFO L462 AbstractCegarLoop]: Abstraction has 18066 states and 55900 transitions. [2019-12-07 17:05:35,105 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:05:35,105 INFO L276 IsEmpty]: Start isEmpty. Operand 18066 states and 55900 transitions. [2019-12-07 17:05:35,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:05:35,116 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:35,116 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:35,116 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:35,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:35,116 INFO L82 PathProgramCache]: Analyzing trace with hash 987674292, now seen corresponding path program 1 times [2019-12-07 17:05:35,117 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:35,117 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220193428] [2019-12-07 17:05:35,117 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:35,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:35,179 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:35,180 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220193428] [2019-12-07 17:05:35,180 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:35,180 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:05:35,180 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1139138134] [2019-12-07 17:05:35,180 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:05:35,181 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:35,181 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:05:35,181 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:05:35,181 INFO L87 Difference]: Start difference. First operand 18066 states and 55900 transitions. Second operand 7 states. [2019-12-07 17:05:35,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:35,661 INFO L93 Difference]: Finished difference Result 23649 states and 71858 transitions. [2019-12-07 17:05:35,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:05:35,661 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 17:05:35,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:35,686 INFO L225 Difference]: With dead ends: 23649 [2019-12-07 17:05:35,686 INFO L226 Difference]: Without dead ends: 23621 [2019-12-07 17:05:35,686 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:05:35,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23621 states. [2019-12-07 17:05:35,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23621 to 16546. [2019-12-07 17:05:35,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16546 states. [2019-12-07 17:05:35,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16546 states to 16546 states and 51456 transitions. [2019-12-07 17:05:35,932 INFO L78 Accepts]: Start accepts. Automaton has 16546 states and 51456 transitions. Word has length 34 [2019-12-07 17:05:35,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:35,932 INFO L462 AbstractCegarLoop]: Abstraction has 16546 states and 51456 transitions. [2019-12-07 17:05:35,932 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:05:35,932 INFO L276 IsEmpty]: Start isEmpty. Operand 16546 states and 51456 transitions. [2019-12-07 17:05:35,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:05:35,943 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:35,943 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:35,943 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:35,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:35,943 INFO L82 PathProgramCache]: Analyzing trace with hash -365129955, now seen corresponding path program 1 times [2019-12-07 17:05:35,943 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:35,944 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [709812189] [2019-12-07 17:05:35,944 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:35,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:35,975 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:35,975 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [709812189] [2019-12-07 17:05:35,975 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:35,975 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:05:35,975 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2019047440] [2019-12-07 17:05:35,976 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:05:35,976 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:35,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:05:35,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:35,976 INFO L87 Difference]: Start difference. First operand 16546 states and 51456 transitions. Second operand 3 states. [2019-12-07 17:05:36,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:36,047 INFO L93 Difference]: Finished difference Result 20422 states and 62777 transitions. [2019-12-07 17:05:36,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:05:36,048 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2019-12-07 17:05:36,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:36,070 INFO L225 Difference]: With dead ends: 20422 [2019-12-07 17:05:36,070 INFO L226 Difference]: Without dead ends: 20422 [2019-12-07 17:05:36,070 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:36,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20422 states. [2019-12-07 17:05:36,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20422 to 17925. [2019-12-07 17:05:36,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17925 states. [2019-12-07 17:05:36,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17925 states to 17925 states and 55527 transitions. [2019-12-07 17:05:36,368 INFO L78 Accepts]: Start accepts. Automaton has 17925 states and 55527 transitions. Word has length 34 [2019-12-07 17:05:36,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:36,368 INFO L462 AbstractCegarLoop]: Abstraction has 17925 states and 55527 transitions. [2019-12-07 17:05:36,368 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:05:36,368 INFO L276 IsEmpty]: Start isEmpty. Operand 17925 states and 55527 transitions. [2019-12-07 17:05:36,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:05:36,379 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:36,379 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:36,379 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:36,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:36,379 INFO L82 PathProgramCache]: Analyzing trace with hash -369569775, now seen corresponding path program 1 times [2019-12-07 17:05:36,379 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:36,379 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1639569758] [2019-12-07 17:05:36,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:36,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:36,448 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:36,448 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1639569758] [2019-12-07 17:05:36,448 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:36,448 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:05:36,449 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1921888217] [2019-12-07 17:05:36,449 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:05:36,449 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:36,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:05:36,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:05:36,449 INFO L87 Difference]: Start difference. First operand 17925 states and 55527 transitions. Second operand 6 states. [2019-12-07 17:05:36,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:36,618 INFO L93 Difference]: Finished difference Result 24469 states and 75051 transitions. [2019-12-07 17:05:36,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 17:05:36,619 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 17:05:36,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:36,644 INFO L225 Difference]: With dead ends: 24469 [2019-12-07 17:05:36,644 INFO L226 Difference]: Without dead ends: 22715 [2019-12-07 17:05:36,644 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:05:36,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22715 states. [2019-12-07 17:05:36,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22715 to 20030. [2019-12-07 17:05:36,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20030 states. [2019-12-07 17:05:36,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20030 states to 20030 states and 61498 transitions. [2019-12-07 17:05:36,918 INFO L78 Accepts]: Start accepts. Automaton has 20030 states and 61498 transitions. Word has length 34 [2019-12-07 17:05:36,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:36,918 INFO L462 AbstractCegarLoop]: Abstraction has 20030 states and 61498 transitions. [2019-12-07 17:05:36,918 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:05:36,918 INFO L276 IsEmpty]: Start isEmpty. Operand 20030 states and 61498 transitions. [2019-12-07 17:05:36,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 17:05:36,932 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:36,932 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:36,932 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:36,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:36,932 INFO L82 PathProgramCache]: Analyzing trace with hash 1754693472, now seen corresponding path program 1 times [2019-12-07 17:05:36,932 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:36,933 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821439288] [2019-12-07 17:05:36,933 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:36,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:36,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:36,956 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [821439288] [2019-12-07 17:05:36,956 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:36,956 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:05:36,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1217798398] [2019-12-07 17:05:36,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:05:36,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:36,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:05:36,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:36,957 INFO L87 Difference]: Start difference. First operand 20030 states and 61498 transitions. Second operand 3 states. [2019-12-07 17:05:37,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:37,022 INFO L93 Difference]: Finished difference Result 20890 states and 63222 transitions. [2019-12-07 17:05:37,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:05:37,022 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-12-07 17:05:37,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:37,044 INFO L225 Difference]: With dead ends: 20890 [2019-12-07 17:05:37,044 INFO L226 Difference]: Without dead ends: 20890 [2019-12-07 17:05:37,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:37,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20890 states. [2019-12-07 17:05:37,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20890 to 18660. [2019-12-07 17:05:37,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18660 states. [2019-12-07 17:05:37,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18660 states to 18660 states and 56880 transitions. [2019-12-07 17:05:37,287 INFO L78 Accepts]: Start accepts. Automaton has 18660 states and 56880 transitions. Word has length 35 [2019-12-07 17:05:37,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:37,287 INFO L462 AbstractCegarLoop]: Abstraction has 18660 states and 56880 transitions. [2019-12-07 17:05:37,287 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:05:37,287 INFO L276 IsEmpty]: Start isEmpty. Operand 18660 states and 56880 transitions. [2019-12-07 17:05:37,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 17:05:37,300 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:37,300 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:37,300 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:37,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:37,300 INFO L82 PathProgramCache]: Analyzing trace with hash 581797047, now seen corresponding path program 1 times [2019-12-07 17:05:37,301 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:37,301 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250487284] [2019-12-07 17:05:37,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:37,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:37,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:37,332 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250487284] [2019-12-07 17:05:37,333 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:37,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:05:37,333 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1471578773] [2019-12-07 17:05:37,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:05:37,333 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:37,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:05:37,333 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:05:37,333 INFO L87 Difference]: Start difference. First operand 18660 states and 56880 transitions. Second operand 4 states. [2019-12-07 17:05:37,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:37,348 INFO L93 Difference]: Finished difference Result 2549 states and 5680 transitions. [2019-12-07 17:05:37,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:05:37,349 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-12-07 17:05:37,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:37,351 INFO L225 Difference]: With dead ends: 2549 [2019-12-07 17:05:37,351 INFO L226 Difference]: Without dead ends: 2549 [2019-12-07 17:05:37,352 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:05:37,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2549 states. [2019-12-07 17:05:37,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2549 to 2549. [2019-12-07 17:05:37,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2549 states. [2019-12-07 17:05:37,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2549 states to 2549 states and 5680 transitions. [2019-12-07 17:05:37,378 INFO L78 Accepts]: Start accepts. Automaton has 2549 states and 5680 transitions. Word has length 35 [2019-12-07 17:05:37,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:37,378 INFO L462 AbstractCegarLoop]: Abstraction has 2549 states and 5680 transitions. [2019-12-07 17:05:37,378 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:05:37,378 INFO L276 IsEmpty]: Start isEmpty. Operand 2549 states and 5680 transitions. [2019-12-07 17:05:37,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 17:05:37,381 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:37,381 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:37,381 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:37,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:37,381 INFO L82 PathProgramCache]: Analyzing trace with hash 1726174666, now seen corresponding path program 1 times [2019-12-07 17:05:37,381 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:37,381 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923540217] [2019-12-07 17:05:37,381 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:37,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:37,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:37,413 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923540217] [2019-12-07 17:05:37,413 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:37,413 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:05:37,413 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1694572101] [2019-12-07 17:05:37,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:05:37,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:37,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:05:37,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:37,414 INFO L87 Difference]: Start difference. First operand 2549 states and 5680 transitions. Second operand 3 states. [2019-12-07 17:05:37,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:37,447 INFO L93 Difference]: Finished difference Result 2549 states and 5653 transitions. [2019-12-07 17:05:37,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:05:37,447 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-12-07 17:05:37,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:37,450 INFO L225 Difference]: With dead ends: 2549 [2019-12-07 17:05:37,450 INFO L226 Difference]: Without dead ends: 2549 [2019-12-07 17:05:37,450 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:37,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2549 states. [2019-12-07 17:05:37,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2549 to 2549. [2019-12-07 17:05:37,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2549 states. [2019-12-07 17:05:37,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2549 states to 2549 states and 5653 transitions. [2019-12-07 17:05:37,479 INFO L78 Accepts]: Start accepts. Automaton has 2549 states and 5653 transitions. Word has length 44 [2019-12-07 17:05:37,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:37,479 INFO L462 AbstractCegarLoop]: Abstraction has 2549 states and 5653 transitions. [2019-12-07 17:05:37,479 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:05:37,479 INFO L276 IsEmpty]: Start isEmpty. Operand 2549 states and 5653 transitions. [2019-12-07 17:05:37,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 17:05:37,482 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:37,482 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:37,482 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:37,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:37,482 INFO L82 PathProgramCache]: Analyzing trace with hash -582543129, now seen corresponding path program 1 times [2019-12-07 17:05:37,482 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:37,483 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136210694] [2019-12-07 17:05:37,483 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:37,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:37,516 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:37,517 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [136210694] [2019-12-07 17:05:37,517 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:37,517 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:05:37,517 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [288019951] [2019-12-07 17:05:37,517 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:05:37,517 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:37,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:05:37,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:05:37,518 INFO L87 Difference]: Start difference. First operand 2549 states and 5653 transitions. Second operand 5 states. [2019-12-07 17:05:37,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:37,531 INFO L93 Difference]: Finished difference Result 683 states and 1561 transitions. [2019-12-07 17:05:37,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:05:37,531 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-12-07 17:05:37,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:37,532 INFO L225 Difference]: With dead ends: 683 [2019-12-07 17:05:37,532 INFO L226 Difference]: Without dead ends: 683 [2019-12-07 17:05:37,532 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:05:37,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 683 states. [2019-12-07 17:05:37,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 683 to 627. [2019-12-07 17:05:37,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 627 states. [2019-12-07 17:05:37,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 627 states to 627 states and 1429 transitions. [2019-12-07 17:05:37,543 INFO L78 Accepts]: Start accepts. Automaton has 627 states and 1429 transitions. Word has length 45 [2019-12-07 17:05:37,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:37,543 INFO L462 AbstractCegarLoop]: Abstraction has 627 states and 1429 transitions. [2019-12-07 17:05:37,543 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:05:37,544 INFO L276 IsEmpty]: Start isEmpty. Operand 627 states and 1429 transitions. [2019-12-07 17:05:37,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:05:37,544 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:37,544 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:37,544 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:37,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:37,545 INFO L82 PathProgramCache]: Analyzing trace with hash -502873348, now seen corresponding path program 1 times [2019-12-07 17:05:37,545 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:37,545 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1006918791] [2019-12-07 17:05:37,545 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:37,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:37,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:37,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1006918791] [2019-12-07 17:05:37,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:37,609 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:05:37,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [697697350] [2019-12-07 17:05:37,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:05:37,609 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:37,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:05:37,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:05:37,610 INFO L87 Difference]: Start difference. First operand 627 states and 1429 transitions. Second operand 6 states. [2019-12-07 17:05:37,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:37,656 INFO L93 Difference]: Finished difference Result 911 states and 1924 transitions. [2019-12-07 17:05:37,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:05:37,656 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-12-07 17:05:37,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:37,657 INFO L225 Difference]: With dead ends: 911 [2019-12-07 17:05:37,657 INFO L226 Difference]: Without dead ends: 564 [2019-12-07 17:05:37,657 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:05:37,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 564 states. [2019-12-07 17:05:37,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 564 to 564. [2019-12-07 17:05:37,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 564 states. [2019-12-07 17:05:37,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 564 states to 564 states and 1246 transitions. [2019-12-07 17:05:37,662 INFO L78 Accepts]: Start accepts. Automaton has 564 states and 1246 transitions. Word has length 56 [2019-12-07 17:05:37,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:37,662 INFO L462 AbstractCegarLoop]: Abstraction has 564 states and 1246 transitions. [2019-12-07 17:05:37,662 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:05:37,662 INFO L276 IsEmpty]: Start isEmpty. Operand 564 states and 1246 transitions. [2019-12-07 17:05:37,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:05:37,663 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:37,663 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:37,663 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:37,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:37,663 INFO L82 PathProgramCache]: Analyzing trace with hash 102984974, now seen corresponding path program 2 times [2019-12-07 17:05:37,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:37,664 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [823989511] [2019-12-07 17:05:37,664 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:37,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:37,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:37,738 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [823989511] [2019-12-07 17:05:37,738 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:37,738 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:05:37,738 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1761126501] [2019-12-07 17:05:37,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:05:37,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:37,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:05:37,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:05:37,739 INFO L87 Difference]: Start difference. First operand 564 states and 1246 transitions. Second operand 6 states. [2019-12-07 17:05:37,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:37,794 INFO L93 Difference]: Finished difference Result 829 states and 1798 transitions. [2019-12-07 17:05:37,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:05:37,794 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-12-07 17:05:37,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:37,795 INFO L225 Difference]: With dead ends: 829 [2019-12-07 17:05:37,795 INFO L226 Difference]: Without dead ends: 252 [2019-12-07 17:05:37,795 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:05:37,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2019-12-07 17:05:37,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 220. [2019-12-07 17:05:37,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-12-07 17:05:37,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 394 transitions. [2019-12-07 17:05:37,797 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 394 transitions. Word has length 56 [2019-12-07 17:05:37,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:37,797 INFO L462 AbstractCegarLoop]: Abstraction has 220 states and 394 transitions. [2019-12-07 17:05:37,797 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:05:37,797 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 394 transitions. [2019-12-07 17:05:37,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:05:37,797 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:37,797 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:37,798 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:37,798 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:37,798 INFO L82 PathProgramCache]: Analyzing trace with hash -2026218410, now seen corresponding path program 3 times [2019-12-07 17:05:37,798 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:37,798 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1630646835] [2019-12-07 17:05:37,798 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:37,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:37,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:37,834 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1630646835] [2019-12-07 17:05:37,835 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:37,835 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:05:37,835 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1582593868] [2019-12-07 17:05:37,835 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:05:37,835 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:37,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:05:37,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:37,836 INFO L87 Difference]: Start difference. First operand 220 states and 394 transitions. Second operand 3 states. [2019-12-07 17:05:37,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:37,843 INFO L93 Difference]: Finished difference Result 209 states and 361 transitions. [2019-12-07 17:05:37,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:05:37,844 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 17:05:37,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:37,844 INFO L225 Difference]: With dead ends: 209 [2019-12-07 17:05:37,844 INFO L226 Difference]: Without dead ends: 209 [2019-12-07 17:05:37,844 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:05:37,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2019-12-07 17:05:37,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2019-12-07 17:05:37,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-12-07 17:05:37,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 361 transitions. [2019-12-07 17:05:37,846 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 361 transitions. Word has length 56 [2019-12-07 17:05:37,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:37,846 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 361 transitions. [2019-12-07 17:05:37,846 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:05:37,846 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 361 transitions. [2019-12-07 17:05:37,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:05:37,847 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:37,847 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:37,847 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:37,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:37,847 INFO L82 PathProgramCache]: Analyzing trace with hash -876750572, now seen corresponding path program 1 times [2019-12-07 17:05:37,847 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:37,847 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711231446] [2019-12-07 17:05:37,847 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:37,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:37,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:37,992 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711231446] [2019-12-07 17:05:37,992 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:37,992 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:05:37,992 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1358553459] [2019-12-07 17:05:37,992 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:05:37,992 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:05:37,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:05:37,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:05:37,993 INFO L87 Difference]: Start difference. First operand 209 states and 361 transitions. Second operand 12 states. [2019-12-07 17:05:38,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:38,234 INFO L93 Difference]: Finished difference Result 362 states and 607 transitions. [2019-12-07 17:05:38,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 17:05:38,235 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 57 [2019-12-07 17:05:38,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:38,235 INFO L225 Difference]: With dead ends: 362 [2019-12-07 17:05:38,235 INFO L226 Difference]: Without dead ends: 327 [2019-12-07 17:05:38,235 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=342, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:05:38,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2019-12-07 17:05:38,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 317. [2019-12-07 17:05:38,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-12-07 17:05:38,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 546 transitions. [2019-12-07 17:05:38,238 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 546 transitions. Word has length 57 [2019-12-07 17:05:38,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:38,238 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 546 transitions. [2019-12-07 17:05:38,238 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:05:38,238 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 546 transitions. [2019-12-07 17:05:38,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:05:38,238 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:38,239 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:38,239 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:38,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:38,239 INFO L82 PathProgramCache]: Analyzing trace with hash -1963724718, now seen corresponding path program 2 times [2019-12-07 17:05:38,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:05:38,239 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [693929721] [2019-12-07 17:05:38,239 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:38,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:05:38,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:05:38,318 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:05:38,318 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:05:38,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1214~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1214~0.base_25|) |v_ULTIMATE.start_main_~#t1214~0.offset_19| 0)) |v_#memory_int_21|) (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (= |v_#NULL.offset_6| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1214~0.base_25| 4)) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= v_~z~0_106 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1214~0.base_25|) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= (store .cse0 |v_ULTIMATE.start_main_~#t1214~0.base_25| 1) |v_#valid_62|) (= v_~a~0_45 0) (= v_~y~0_155 0) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= v_~y$r_buff1_thd0~0_281 0) (= v_~y$w_buff0_used~0_625 0) (= 0 |v_ULTIMATE.start_main_~#t1214~0.offset_19|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1214~0.base_25|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1216~0.base=|v_ULTIMATE.start_main_~#t1216~0.base_25|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ULTIMATE.start_main_~#t1215~0.offset=|v_ULTIMATE.start_main_~#t1215~0.offset_19|, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_~#t1216~0.offset=|v_ULTIMATE.start_main_~#t1216~0.offset_19|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_~#t1214~0.offset=|v_ULTIMATE.start_main_~#t1214~0.offset_19|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, ULTIMATE.start_main_~#t1215~0.base=|v_ULTIMATE.start_main_~#t1215~0.base_25|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_~#t1214~0.base=|v_ULTIMATE.start_main_~#t1214~0.base_25|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1216~0.base, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ULTIMATE.start_main_~#t1215~0.offset, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1216~0.offset, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t1214~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1215~0.base, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1214~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:05:38,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1215~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t1215~0.base_13| 0)) (= 0 (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1215~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1215~0.base_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1215~0.base_13| 4)) (= 0 |v_ULTIMATE.start_main_~#t1215~0.offset_11|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1215~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1215~0.base_13|) |v_ULTIMATE.start_main_~#t1215~0.offset_11| 1)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1215~0.offset=|v_ULTIMATE.start_main_~#t1215~0.offset_11|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1215~0.base=|v_ULTIMATE.start_main_~#t1215~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1215~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1215~0.base] because there is no mapped edge [2019-12-07 17:05:38,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1216~0.base_13|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1216~0.base_13| 1)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1216~0.base_13|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1216~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1216~0.base_13|) |v_ULTIMATE.start_main_~#t1216~0.offset_11| 2)) |v_#memory_int_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1216~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t1216~0.offset_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1216~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1216~0.base=|v_ULTIMATE.start_main_~#t1216~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1216~0.offset=|v_ULTIMATE.start_main_~#t1216~0.offset_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1216~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1216~0.offset, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 17:05:38,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:05:38,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 17:05:38,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1203692821 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1203692821 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out-1203692821| ~y$w_buff0_used~0_In-1203692821)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite11_Out-1203692821| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1203692821, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1203692821} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1203692821, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1203692821|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1203692821} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 17:05:38,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1455782189 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-1455782189 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1455782189 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1455782189 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite12_Out-1455782189|)) (and (= |P2Thread1of1ForFork0_#t~ite12_Out-1455782189| ~y$w_buff1_used~0_In-1455782189) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1455782189, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1455782189, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1455782189, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1455782189} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1455782189, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1455782189, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1455782189|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1455782189, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1455782189} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 17:05:38,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-1292803578 ~y$r_buff0_thd3~0_Out-1292803578)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-1292803578 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1292803578 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (= 0 ~y$r_buff0_thd3~0_Out-1292803578) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1292803578, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1292803578} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1292803578, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1292803578, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1292803578|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 17:05:38,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1709052865 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-1709052865 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In-1709052865 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1709052865 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd3~0_In-1709052865 |P2Thread1of1ForFork0_#t~ite14_Out-1709052865|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite14_Out-1709052865|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1709052865, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1709052865, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1709052865, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1709052865} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-1709052865|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1709052865, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1709052865, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1709052865, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1709052865} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 17:05:38,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:05:38,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-1588869793 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1588869793 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out-1588869793| ~y$w_buff1~0_In-1588869793)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out-1588869793| ~y~0_In-1588869793) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1588869793, ~y$w_buff1~0=~y$w_buff1~0_In-1588869793, ~y~0=~y~0_In-1588869793, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1588869793} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1588869793, ~y$w_buff1~0=~y$w_buff1~0_In-1588869793, ~y~0=~y~0_In-1588869793, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-1588869793|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1588869793} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:05:38,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:05:38,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1851961097 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1851961097 256)))) (or (and (= ~y$w_buff0_used~0_In1851961097 |P1Thread1of1ForFork2_#t~ite5_Out1851961097|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out1851961097|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1851961097, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1851961097} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1851961097, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1851961097, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out1851961097|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:05:38,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1403894688 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In-1403894688 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1403894688 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1403894688 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite6_Out-1403894688| ~y$w_buff1_used~0_In-1403894688)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork2_#t~ite6_Out-1403894688| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1403894688, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1403894688, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1403894688, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1403894688} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1403894688, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1403894688, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1403894688, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out-1403894688|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1403894688} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:05:38,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1065885849 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1065885849 256) 0))) (or (and (= ~y$r_buff0_thd2~0_In-1065885849 |P1Thread1of1ForFork2_#t~ite7_Out-1065885849|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite7_Out-1065885849|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1065885849, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1065885849} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1065885849, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1065885849, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out-1065885849|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:05:38,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In-367754904 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-367754904 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-367754904 256))) (.cse2 (= (mod ~y$r_buff0_thd2~0_In-367754904 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out-367754904|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite8_Out-367754904| ~y$r_buff1_thd2~0_In-367754904) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-367754904, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-367754904, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-367754904, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-367754904} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-367754904, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-367754904, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-367754904|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-367754904, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-367754904} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:05:38,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:05:38,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:05:38,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In1618276511 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite19_Out1618276511| |ULTIMATE.start_main_#t~ite18_Out1618276511|)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1618276511 256)))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite18_Out1618276511| ~y~0_In1618276511)) (and (not .cse0) .cse2 (not .cse1) (= ~y$w_buff1~0_In1618276511 |ULTIMATE.start_main_#t~ite18_Out1618276511|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1618276511, ~y~0=~y~0_In1618276511, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1618276511, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1618276511} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1618276511, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1618276511|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1618276511|, ~y~0=~y~0_In1618276511, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1618276511, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1618276511} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:05:38,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1878956002 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1878956002 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite20_Out1878956002|) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite20_Out1878956002| ~y$w_buff0_used~0_In1878956002) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1878956002, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1878956002} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1878956002, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1878956002, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1878956002|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:05:38,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2100101918 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In2100101918 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In2100101918 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In2100101918 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In2100101918 |ULTIMATE.start_main_#t~ite21_Out2100101918|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite21_Out2100101918| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2100101918, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2100101918, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2100101918, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2100101918} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2100101918, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2100101918, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out2100101918|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2100101918, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2100101918} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:05:38,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In269877454 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In269877454 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out269877454| ~y$r_buff0_thd0~0_In269877454) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out269877454| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In269877454, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In269877454} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In269877454, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In269877454, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out269877454|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:05:38,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-1029730548 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1029730548 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-1029730548 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-1029730548 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite23_Out-1029730548| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite23_Out-1029730548| ~y$r_buff1_thd0~0_In-1029730548) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1029730548, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1029730548, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1029730548, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1029730548} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1029730548, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1029730548, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1029730548, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1029730548|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1029730548} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:05:38,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In681139014 256)))) (or (and (= ~y$w_buff1~0_In681139014 |ULTIMATE.start_main_#t~ite32_Out681139014|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In681139014 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In681139014 256) 0) .cse1) (and (= (mod ~y$r_buff1_thd0~0_In681139014 256) 0) .cse1) (= 0 (mod ~y$w_buff0_used~0_In681139014 256)))) (= |ULTIMATE.start_main_#t~ite33_Out681139014| |ULTIMATE.start_main_#t~ite32_Out681139014|)) (and (= ~y$w_buff1~0_In681139014 |ULTIMATE.start_main_#t~ite33_Out681139014|) (not .cse0) (= |ULTIMATE.start_main_#t~ite32_In681139014| |ULTIMATE.start_main_#t~ite32_Out681139014|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In681139014, ~y$w_buff0_used~0=~y$w_buff0_used~0_In681139014, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In681139014, ~weak$$choice2~0=~weak$$choice2~0_In681139014, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In681139014, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In681139014|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In681139014} OutVars{~y$w_buff1~0=~y$w_buff1~0_In681139014, ~y$w_buff0_used~0=~y$w_buff0_used~0_In681139014, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In681139014, ~weak$$choice2~0=~weak$$choice2~0_In681139014, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out681139014|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In681139014, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out681139014|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In681139014} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-12-07 17:05:38,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1972701826 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite35_In1972701826| |ULTIMATE.start_main_#t~ite35_Out1972701826|) (= ~y$w_buff0_used~0_In1972701826 |ULTIMATE.start_main_#t~ite36_Out1972701826|)) (and (= ~y$w_buff0_used~0_In1972701826 |ULTIMATE.start_main_#t~ite35_Out1972701826|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1972701826 256)))) (or (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In1972701826 256))) (= 0 (mod ~y$w_buff0_used~0_In1972701826 256)) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In1972701826 256) 0)))) .cse0 (= |ULTIMATE.start_main_#t~ite35_Out1972701826| |ULTIMATE.start_main_#t~ite36_Out1972701826|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1972701826, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1972701826, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In1972701826|, ~weak$$choice2~0=~weak$$choice2~0_In1972701826, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1972701826, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1972701826} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1972701826, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1972701826, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out1972701826|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out1972701826|, ~weak$$choice2~0=~weak$$choice2~0_In1972701826, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1972701826, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1972701826} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 17:05:38,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In746940343 256)))) (or (and (= ~y$w_buff1_used~0_In746940343 |ULTIMATE.start_main_#t~ite39_Out746940343|) (= |ULTIMATE.start_main_#t~ite38_In746940343| |ULTIMATE.start_main_#t~ite38_Out746940343|) (not .cse0)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In746940343 256) 0))) (or (and .cse1 (= (mod ~y$r_buff1_thd0~0_In746940343 256) 0)) (and (= 0 (mod ~y$w_buff1_used~0_In746940343 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In746940343 256)))) (= |ULTIMATE.start_main_#t~ite39_Out746940343| |ULTIMATE.start_main_#t~ite38_Out746940343|) (= ~y$w_buff1_used~0_In746940343 |ULTIMATE.start_main_#t~ite38_Out746940343|) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In746940343, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In746940343, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In746940343|, ~weak$$choice2~0=~weak$$choice2~0_In746940343, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In746940343, ~y$w_buff1_used~0=~y$w_buff1_used~0_In746940343} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In746940343, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out746940343|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In746940343, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out746940343|, ~weak$$choice2~0=~weak$$choice2~0_In746940343, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In746940343, ~y$w_buff1_used~0=~y$w_buff1_used~0_In746940343} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 17:05:38,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:05:38,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:05:38,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:05:38,380 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:05:38 BasicIcfg [2019-12-07 17:05:38,380 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:05:38,380 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:05:38,380 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:05:38,380 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:05:38,380 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:05:26" (3/4) ... [2019-12-07 17:05:38,382 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:05:38,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1214~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1214~0.base_25|) |v_ULTIMATE.start_main_~#t1214~0.offset_19| 0)) |v_#memory_int_21|) (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (= |v_#NULL.offset_6| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1214~0.base_25| 4)) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= v_~z~0_106 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1214~0.base_25|) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= (store .cse0 |v_ULTIMATE.start_main_~#t1214~0.base_25| 1) |v_#valid_62|) (= v_~a~0_45 0) (= v_~y~0_155 0) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= v_~y$r_buff1_thd0~0_281 0) (= v_~y$w_buff0_used~0_625 0) (= 0 |v_ULTIMATE.start_main_~#t1214~0.offset_19|) (= (select .cse0 |v_ULTIMATE.start_main_~#t1214~0.base_25|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1216~0.base=|v_ULTIMATE.start_main_~#t1216~0.base_25|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ULTIMATE.start_main_~#t1215~0.offset=|v_ULTIMATE.start_main_~#t1215~0.offset_19|, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_~#t1216~0.offset=|v_ULTIMATE.start_main_~#t1216~0.offset_19|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_~#t1214~0.offset=|v_ULTIMATE.start_main_~#t1214~0.offset_19|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, ULTIMATE.start_main_~#t1215~0.base=|v_ULTIMATE.start_main_~#t1215~0.base_25|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_~#t1214~0.base=|v_ULTIMATE.start_main_~#t1214~0.base_25|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1216~0.base, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ULTIMATE.start_main_~#t1215~0.offset, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t1216~0.offset, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t1214~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1215~0.base, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1214~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:05:38,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1215~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t1215~0.base_13| 0)) (= 0 (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1215~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1215~0.base_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1215~0.base_13| 4)) (= 0 |v_ULTIMATE.start_main_~#t1215~0.offset_11|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1215~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1215~0.base_13|) |v_ULTIMATE.start_main_~#t1215~0.offset_11| 1)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1215~0.offset=|v_ULTIMATE.start_main_~#t1215~0.offset_11|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1215~0.base=|v_ULTIMATE.start_main_~#t1215~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1215~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1215~0.base] because there is no mapped edge [2019-12-07 17:05:38,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1216~0.base_13|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1216~0.base_13| 1)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1216~0.base_13|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1216~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1216~0.base_13|) |v_ULTIMATE.start_main_~#t1216~0.offset_11| 2)) |v_#memory_int_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1216~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t1216~0.offset_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1216~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1216~0.base=|v_ULTIMATE.start_main_~#t1216~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1216~0.offset=|v_ULTIMATE.start_main_~#t1216~0.offset_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1216~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1216~0.offset, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 17:05:38,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:05:38,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 17:05:38,384 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1203692821 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1203692821 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out-1203692821| ~y$w_buff0_used~0_In-1203692821)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite11_Out-1203692821| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1203692821, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1203692821} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1203692821, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1203692821|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1203692821} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 17:05:38,384 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1455782189 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-1455782189 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1455782189 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1455782189 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite12_Out-1455782189|)) (and (= |P2Thread1of1ForFork0_#t~ite12_Out-1455782189| ~y$w_buff1_used~0_In-1455782189) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1455782189, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1455782189, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1455782189, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1455782189} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1455782189, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1455782189, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1455782189|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1455782189, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1455782189} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 17:05:38,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-1292803578 ~y$r_buff0_thd3~0_Out-1292803578)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-1292803578 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1292803578 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (= 0 ~y$r_buff0_thd3~0_Out-1292803578) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1292803578, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1292803578} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1292803578, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1292803578, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1292803578|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 17:05:38,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1709052865 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-1709052865 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In-1709052865 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1709052865 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd3~0_In-1709052865 |P2Thread1of1ForFork0_#t~ite14_Out-1709052865|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite14_Out-1709052865|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1709052865, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1709052865, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1709052865, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1709052865} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-1709052865|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1709052865, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1709052865, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1709052865, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1709052865} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 17:05:38,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:05:38,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-1588869793 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1588869793 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out-1588869793| ~y$w_buff1~0_In-1588869793)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out-1588869793| ~y~0_In-1588869793) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1588869793, ~y$w_buff1~0=~y$w_buff1~0_In-1588869793, ~y~0=~y~0_In-1588869793, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1588869793} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1588869793, ~y$w_buff1~0=~y$w_buff1~0_In-1588869793, ~y~0=~y~0_In-1588869793, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-1588869793|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1588869793} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:05:38,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:05:38,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1851961097 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1851961097 256)))) (or (and (= ~y$w_buff0_used~0_In1851961097 |P1Thread1of1ForFork2_#t~ite5_Out1851961097|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out1851961097|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1851961097, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1851961097} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1851961097, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1851961097, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out1851961097|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:05:38,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1403894688 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In-1403894688 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1403894688 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1403894688 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite6_Out-1403894688| ~y$w_buff1_used~0_In-1403894688)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork2_#t~ite6_Out-1403894688| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1403894688, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1403894688, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1403894688, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1403894688} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1403894688, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1403894688, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1403894688, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out-1403894688|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1403894688} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:05:38,386 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1065885849 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1065885849 256) 0))) (or (and (= ~y$r_buff0_thd2~0_In-1065885849 |P1Thread1of1ForFork2_#t~ite7_Out-1065885849|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite7_Out-1065885849|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1065885849, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1065885849} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1065885849, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1065885849, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out-1065885849|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:05:38,386 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In-367754904 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-367754904 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-367754904 256))) (.cse2 (= (mod ~y$r_buff0_thd2~0_In-367754904 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out-367754904|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite8_Out-367754904| ~y$r_buff1_thd2~0_In-367754904) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-367754904, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-367754904, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-367754904, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-367754904} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-367754904, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-367754904, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-367754904|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-367754904, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-367754904} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:05:38,386 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:05:38,386 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:05:38,386 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In1618276511 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite19_Out1618276511| |ULTIMATE.start_main_#t~ite18_Out1618276511|)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1618276511 256)))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite18_Out1618276511| ~y~0_In1618276511)) (and (not .cse0) .cse2 (not .cse1) (= ~y$w_buff1~0_In1618276511 |ULTIMATE.start_main_#t~ite18_Out1618276511|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1618276511, ~y~0=~y~0_In1618276511, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1618276511, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1618276511} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1618276511, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out1618276511|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1618276511|, ~y~0=~y~0_In1618276511, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1618276511, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1618276511} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:05:38,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1878956002 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1878956002 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite20_Out1878956002|) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite20_Out1878956002| ~y$w_buff0_used~0_In1878956002) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1878956002, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1878956002} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1878956002, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1878956002, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1878956002|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:05:38,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2100101918 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In2100101918 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In2100101918 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In2100101918 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In2100101918 |ULTIMATE.start_main_#t~ite21_Out2100101918|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite21_Out2100101918| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2100101918, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2100101918, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2100101918, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2100101918} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2100101918, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2100101918, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out2100101918|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2100101918, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2100101918} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:05:38,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In269877454 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In269877454 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out269877454| ~y$r_buff0_thd0~0_In269877454) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out269877454| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In269877454, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In269877454} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In269877454, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In269877454, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out269877454|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:05:38,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-1029730548 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1029730548 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-1029730548 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-1029730548 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite23_Out-1029730548| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite23_Out-1029730548| ~y$r_buff1_thd0~0_In-1029730548) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1029730548, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1029730548, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1029730548, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1029730548} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1029730548, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1029730548, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1029730548, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1029730548|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1029730548} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:05:38,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In681139014 256)))) (or (and (= ~y$w_buff1~0_In681139014 |ULTIMATE.start_main_#t~ite32_Out681139014|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In681139014 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In681139014 256) 0) .cse1) (and (= (mod ~y$r_buff1_thd0~0_In681139014 256) 0) .cse1) (= 0 (mod ~y$w_buff0_used~0_In681139014 256)))) (= |ULTIMATE.start_main_#t~ite33_Out681139014| |ULTIMATE.start_main_#t~ite32_Out681139014|)) (and (= ~y$w_buff1~0_In681139014 |ULTIMATE.start_main_#t~ite33_Out681139014|) (not .cse0) (= |ULTIMATE.start_main_#t~ite32_In681139014| |ULTIMATE.start_main_#t~ite32_Out681139014|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In681139014, ~y$w_buff0_used~0=~y$w_buff0_used~0_In681139014, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In681139014, ~weak$$choice2~0=~weak$$choice2~0_In681139014, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In681139014, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In681139014|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In681139014} OutVars{~y$w_buff1~0=~y$w_buff1~0_In681139014, ~y$w_buff0_used~0=~y$w_buff0_used~0_In681139014, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In681139014, ~weak$$choice2~0=~weak$$choice2~0_In681139014, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out681139014|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In681139014, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out681139014|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In681139014} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-12-07 17:05:38,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1972701826 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite35_In1972701826| |ULTIMATE.start_main_#t~ite35_Out1972701826|) (= ~y$w_buff0_used~0_In1972701826 |ULTIMATE.start_main_#t~ite36_Out1972701826|)) (and (= ~y$w_buff0_used~0_In1972701826 |ULTIMATE.start_main_#t~ite35_Out1972701826|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1972701826 256)))) (or (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In1972701826 256))) (= 0 (mod ~y$w_buff0_used~0_In1972701826 256)) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In1972701826 256) 0)))) .cse0 (= |ULTIMATE.start_main_#t~ite35_Out1972701826| |ULTIMATE.start_main_#t~ite36_Out1972701826|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1972701826, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1972701826, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In1972701826|, ~weak$$choice2~0=~weak$$choice2~0_In1972701826, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1972701826, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1972701826} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1972701826, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1972701826, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out1972701826|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out1972701826|, ~weak$$choice2~0=~weak$$choice2~0_In1972701826, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1972701826, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1972701826} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 17:05:38,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In746940343 256)))) (or (and (= ~y$w_buff1_used~0_In746940343 |ULTIMATE.start_main_#t~ite39_Out746940343|) (= |ULTIMATE.start_main_#t~ite38_In746940343| |ULTIMATE.start_main_#t~ite38_Out746940343|) (not .cse0)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In746940343 256) 0))) (or (and .cse1 (= (mod ~y$r_buff1_thd0~0_In746940343 256) 0)) (and (= 0 (mod ~y$w_buff1_used~0_In746940343 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In746940343 256)))) (= |ULTIMATE.start_main_#t~ite39_Out746940343| |ULTIMATE.start_main_#t~ite38_Out746940343|) (= ~y$w_buff1_used~0_In746940343 |ULTIMATE.start_main_#t~ite38_Out746940343|) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In746940343, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In746940343, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In746940343|, ~weak$$choice2~0=~weak$$choice2~0_In746940343, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In746940343, ~y$w_buff1_used~0=~y$w_buff1_used~0_In746940343} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In746940343, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out746940343|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In746940343, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out746940343|, ~weak$$choice2~0=~weak$$choice2~0_In746940343, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In746940343, ~y$w_buff1_used~0=~y$w_buff1_used~0_In746940343} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 17:05:38,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:05:38,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:05:38,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:05:38,442 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ca0317a0-11c9-41cf-ba83-1857c26c4be0/bin/uautomizer/witness.graphml [2019-12-07 17:05:38,442 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:05:38,443 INFO L168 Benchmark]: Toolchain (without parser) took 12471.08 ms. Allocated memory was 1.0 GB in the beginning and 2.0 GB in the end (delta: 962.1 MB). Free memory was 940.8 MB in the beginning and 1.5 GB in the end (delta: -552.7 MB). Peak memory consumption was 409.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:05:38,444 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:05:38,444 INFO L168 Benchmark]: CACSL2BoogieTranslator took 402.96 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.3 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -130.2 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. [2019-12-07 17:05:38,444 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:05:38,444 INFO L168 Benchmark]: Boogie Preprocessor took 24.64 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:05:38,445 INFO L168 Benchmark]: RCFGBuilder took 395.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:05:38,445 INFO L168 Benchmark]: TraceAbstraction took 11543.33 ms. Allocated memory was 1.1 GB in the beginning and 2.0 GB in the end (delta: 858.8 MB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -511.9 MB). Peak memory consumption was 346.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:05:38,445 INFO L168 Benchmark]: Witness Printer took 62.32 ms. Allocated memory is still 2.0 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 27.3 MB). Peak memory consumption was 27.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:05:38,447 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 402.96 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.3 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -130.2 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.64 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 395.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 11543.33 ms. Allocated memory was 1.1 GB in the beginning and 2.0 GB in the end (delta: 858.8 MB). Free memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: -511.9 MB). Peak memory consumption was 346.9 MB. Max. memory is 11.5 GB. * Witness Printer took 62.32 ms. Allocated memory is still 2.0 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 27.3 MB). Peak memory consumption was 27.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.9s, 164 ProgramPointsBefore, 82 ProgramPointsAfterwards, 195 TransitionsBefore, 91 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 33 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 26 ChoiceCompositions, 4376 VarBasedMoverChecksPositive, 193 VarBasedMoverChecksNegative, 58 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 46792 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L810] FCALL, FORK 0 pthread_create(&t1214, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L812] FCALL, FORK 0 pthread_create(&t1215, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1216, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L771] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L772] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L773] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L774] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L775] 3 y$r_buff0_thd3 = (_Bool)1 [L778] 3 z = 1 [L781] 3 __unbuffered_p2_EAX = z [L784] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L746] 2 x = 2 [L749] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L788] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L789] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L752] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L753] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L754] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L820] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L821] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L822] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L823] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L824] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L827] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L828] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L829] 0 y$flush_delayed = weak$$choice2 [L830] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L832] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L833] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L834] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L835] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L837] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L837] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L838] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 155 locations, 2 error locations. Result: UNSAFE, OverallTime: 11.4s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 3.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2021 SDtfs, 1913 SDslu, 4016 SDs, 0 SdLazy, 1875 SolverSat, 128 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 117 GetRequests, 21 SyntacticMatches, 8 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=24754occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.3s AutomataMinimizationTime, 17 MinimizatonAttempts, 25683 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 643 NumberOfCodeBlocks, 643 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 569 ConstructedInterpolants, 0 QuantifiedInterpolants, 84911 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...